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Commit | Line | Data |
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caaff562 AN |
1 | /* |
2 | * I2C client/driver for the ST M41T80 family of i2c rtc chips. | |
3 | * | |
4 | * Author: Alexander Bigga <ab@mycable.de> | |
5 | * | |
6 | * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> | |
7 | * | |
8 | * 2006 (c) mycable GmbH | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | */ | |
15 | ||
a737e835 JP |
16 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
17 | ||
35aa64f3 MR |
18 | #include <linux/bcd.h> |
19 | #include <linux/i2c.h> | |
caaff562 | 20 | #include <linux/init.h> |
9fb1f68d | 21 | #include <linux/kernel.h> |
35aa64f3 MR |
22 | #include <linux/module.h> |
23 | #include <linux/rtc.h> | |
caaff562 | 24 | #include <linux/slab.h> |
613655fa | 25 | #include <linux/mutex.h> |
caaff562 | 26 | #include <linux/string.h> |
617780d2 | 27 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
617780d2 AN |
28 | #include <linux/fs.h> |
29 | #include <linux/ioctl.h> | |
35aa64f3 MR |
30 | #include <linux/miscdevice.h> |
31 | #include <linux/reboot.h> | |
32 | #include <linux/watchdog.h> | |
617780d2 | 33 | #endif |
caaff562 | 34 | |
f2b84ee8 MJ |
35 | #define M41T80_REG_SSEC 0x00 |
36 | #define M41T80_REG_SEC 0x01 | |
37 | #define M41T80_REG_MIN 0x02 | |
38 | #define M41T80_REG_HOUR 0x03 | |
39 | #define M41T80_REG_WDAY 0x04 | |
40 | #define M41T80_REG_DAY 0x05 | |
41 | #define M41T80_REG_MON 0x06 | |
42 | #define M41T80_REG_YEAR 0x07 | |
43 | #define M41T80_REG_ALARM_MON 0x0a | |
44 | #define M41T80_REG_ALARM_DAY 0x0b | |
45 | #define M41T80_REG_ALARM_HOUR 0x0c | |
46 | #define M41T80_REG_ALARM_MIN 0x0d | |
47 | #define M41T80_REG_ALARM_SEC 0x0e | |
48 | #define M41T80_REG_FLAGS 0x0f | |
49 | #define M41T80_REG_SQW 0x13 | |
caaff562 AN |
50 | |
51 | #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) | |
52 | #define M41T80_ALARM_REG_SIZE \ | |
53 | (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) | |
54 | ||
54339f3b MJ |
55 | #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ |
56 | #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ | |
57 | #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ | |
58 | #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ | |
05a7f27a | 59 | #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ |
54339f3b MJ |
60 | #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ |
61 | #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ | |
62 | #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ | |
63 | #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ | |
64 | #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ | |
caaff562 | 65 | |
54339f3b MJ |
66 | #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ |
67 | #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ | |
68 | #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ | |
69 | #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ | |
70 | #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ | |
caaff562 | 71 | |
613655fa | 72 | static DEFINE_MUTEX(m41t80_rtc_mutex); |
3760f736 | 73 | static const struct i2c_device_id m41t80_id[] = { |
f30281f4 | 74 | { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, |
d3a126fc SF |
75 | { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, |
76 | { "m41t80", M41T80_FEATURE_SQ }, | |
77 | { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, | |
78 | { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
79 | { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
80 | { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
81 | { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
82 | { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
83 | { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, | |
6b1a5235 | 84 | { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, |
3760f736 | 85 | { } |
caaff562 | 86 | }; |
3760f736 | 87 | MODULE_DEVICE_TABLE(i2c, m41t80_id); |
caaff562 AN |
88 | |
89 | struct m41t80_data { | |
3760f736 | 90 | u8 features; |
caaff562 AN |
91 | struct rtc_device *rtc; |
92 | }; | |
93 | ||
9c6dfed9 MJ |
94 | static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) |
95 | { | |
96 | struct i2c_client *client = dev_id; | |
97 | struct m41t80_data *m41t80 = i2c_get_clientdata(client); | |
98 | struct mutex *lock = &m41t80->rtc->ops_lock; | |
99 | unsigned long events = 0; | |
100 | int flags, flags_afe; | |
101 | ||
102 | mutex_lock(lock); | |
103 | ||
104 | flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
105 | if (flags_afe < 0) { | |
106 | mutex_unlock(lock); | |
107 | return IRQ_NONE; | |
108 | } | |
109 | ||
110 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
111 | if (flags <= 0) { | |
112 | mutex_unlock(lock); | |
113 | return IRQ_NONE; | |
114 | } | |
115 | ||
116 | if (flags & M41T80_FLAGS_AF) { | |
117 | flags &= ~M41T80_FLAGS_AF; | |
118 | flags_afe &= ~M41T80_ALMON_AFE; | |
119 | events |= RTC_AF; | |
120 | } | |
121 | ||
122 | if (events) { | |
123 | rtc_update_irq(m41t80->rtc, 1, events); | |
124 | i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); | |
125 | i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
126 | flags_afe); | |
127 | } | |
128 | ||
129 | mutex_unlock(lock); | |
130 | ||
131 | return IRQ_HANDLED; | |
132 | } | |
133 | ||
caaff562 AN |
134 | static int m41t80_get_datetime(struct i2c_client *client, |
135 | struct rtc_time *tm) | |
136 | { | |
f2b84ee8 | 137 | unsigned char buf[8]; |
05a7f27a MJ |
138 | int err, flags; |
139 | ||
140 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
141 | if (flags < 0) | |
142 | return flags; | |
143 | ||
144 | if (flags & M41T80_FLAGS_OF) { | |
145 | dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); | |
146 | return -EINVAL; | |
147 | } | |
caaff562 | 148 | |
f2b84ee8 MJ |
149 | err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, |
150 | sizeof(buf), buf); | |
151 | if (err < 0) { | |
152 | dev_err(&client->dev, "Unable to read date\n"); | |
caaff562 AN |
153 | return -EIO; |
154 | } | |
155 | ||
fe20ba70 AB |
156 | tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); |
157 | tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); | |
158 | tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); | |
159 | tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); | |
caaff562 | 160 | tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; |
fe20ba70 | 161 | tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; |
caaff562 AN |
162 | |
163 | /* assume 20YY not 19YY, and ignore the Century Bit */ | |
fe20ba70 | 164 | tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; |
b485fe5e | 165 | return rtc_valid_tm(tm); |
caaff562 AN |
166 | } |
167 | ||
168 | /* Sets the given date and time to the real time clock. */ | |
169 | static int m41t80_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
170 | { | |
f2b84ee8 | 171 | unsigned char buf[8]; |
05a7f27a | 172 | int err, flags; |
caaff562 | 173 | |
f2b84ee8 MJ |
174 | if (tm->tm_year < 100 || tm->tm_year > 199) |
175 | return -EINVAL; | |
caaff562 | 176 | |
caaff562 | 177 | buf[M41T80_REG_SSEC] = 0; |
f2b84ee8 MJ |
178 | buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); |
179 | buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); | |
180 | buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); | |
181 | buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); | |
182 | buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); | |
183 | buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); | |
184 | buf[M41T80_REG_WDAY] = tm->tm_wday; | |
185 | ||
186 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, | |
187 | sizeof(buf), buf); | |
188 | if (err < 0) { | |
189 | dev_err(&client->dev, "Unable to write to date registers\n"); | |
190 | return err; | |
bcebd81d | 191 | } |
caaff562 | 192 | |
05a7f27a MJ |
193 | /* Clear the OF bit of Flags Register */ |
194 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
195 | if (flags < 0) | |
196 | return flags; | |
197 | ||
198 | if (i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, | |
199 | flags & ~M41T80_FLAGS_OF)) { | |
200 | dev_err(&client->dev, "Unable to write flags register\n"); | |
201 | return -EIO; | |
202 | } | |
203 | ||
f2b84ee8 | 204 | return err; |
caaff562 AN |
205 | } |
206 | ||
caaff562 AN |
207 | static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) |
208 | { | |
209 | struct i2c_client *client = to_i2c_client(dev); | |
210 | struct m41t80_data *clientdata = i2c_get_clientdata(client); | |
211 | u8 reg; | |
212 | ||
3760f736 | 213 | if (clientdata->features & M41T80_FEATURE_BL) { |
caaff562 AN |
214 | reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); |
215 | seq_printf(seq, "battery\t\t: %s\n", | |
216 | (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); | |
217 | } | |
218 | return 0; | |
219 | } | |
caaff562 AN |
220 | |
221 | static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
222 | { | |
223 | return m41t80_get_datetime(to_i2c_client(dev), tm); | |
224 | } | |
225 | ||
226 | static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
227 | { | |
228 | return m41t80_set_datetime(to_i2c_client(dev), tm); | |
229 | } | |
230 | ||
9c6dfed9 MJ |
231 | static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) |
232 | { | |
233 | struct i2c_client *client = to_i2c_client(dev); | |
234 | int flags, retval; | |
235 | ||
236 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
237 | if (flags < 0) | |
238 | return flags; | |
239 | ||
240 | if (enabled) | |
241 | flags |= M41T80_ALMON_AFE; | |
242 | else | |
243 | flags &= ~M41T80_ALMON_AFE; | |
244 | ||
245 | retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); | |
246 | if (retval < 0) { | |
e89487fe | 247 | dev_err(dev, "Unable to enable alarm IRQ %d\n", retval); |
9c6dfed9 MJ |
248 | return retval; |
249 | } | |
250 | return 0; | |
251 | } | |
252 | ||
253 | static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
254 | { | |
255 | struct i2c_client *client = to_i2c_client(dev); | |
256 | u8 alarmvals[5]; | |
257 | int ret, err; | |
258 | ||
259 | alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); | |
260 | alarmvals[1] = bin2bcd(alrm->time.tm_mday); | |
261 | alarmvals[2] = bin2bcd(alrm->time.tm_hour); | |
262 | alarmvals[3] = bin2bcd(alrm->time.tm_min); | |
263 | alarmvals[4] = bin2bcd(alrm->time.tm_sec); | |
264 | ||
265 | /* Clear AF and AFE flags */ | |
266 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
267 | if (ret < 0) | |
268 | return ret; | |
269 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
270 | ret & ~(M41T80_ALMON_AFE)); | |
271 | if (err < 0) { | |
272 | dev_err(dev, "Unable to clear AFE bit\n"); | |
273 | return err; | |
274 | } | |
275 | ||
276 | ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
277 | if (ret < 0) | |
278 | return ret; | |
279 | ||
280 | err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, | |
281 | ret & ~(M41T80_FLAGS_AF)); | |
282 | if (err < 0) { | |
283 | dev_err(dev, "Unable to clear AF bit\n"); | |
284 | return err; | |
285 | } | |
286 | ||
287 | /* Write the alarm */ | |
288 | err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, | |
289 | 5, alarmvals); | |
290 | if (err) | |
291 | return err; | |
292 | ||
293 | /* Enable the alarm interrupt */ | |
294 | if (alrm->enabled) { | |
295 | alarmvals[0] |= M41T80_ALMON_AFE; | |
296 | err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
297 | alarmvals[0]); | |
298 | if (err) | |
299 | return err; | |
300 | } | |
301 | ||
302 | return 0; | |
303 | } | |
304 | ||
305 | static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
306 | { | |
307 | struct i2c_client *client = to_i2c_client(dev); | |
308 | u8 alarmvals[5]; | |
309 | int flags, ret; | |
310 | ||
311 | ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, | |
312 | 5, alarmvals); | |
313 | if (ret != 5) | |
314 | return ret < 0 ? ret : -EIO; | |
315 | ||
316 | flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
317 | if (flags < 0) | |
318 | return flags; | |
319 | ||
320 | alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); | |
321 | alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); | |
322 | alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); | |
9c6dfed9 MJ |
323 | alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); |
324 | alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f); | |
9c6dfed9 MJ |
325 | |
326 | alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); | |
327 | alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; | |
328 | ||
329 | return 0; | |
330 | } | |
331 | ||
caaff562 AN |
332 | static struct rtc_class_ops m41t80_rtc_ops = { |
333 | .read_time = m41t80_rtc_read_time, | |
334 | .set_time = m41t80_rtc_set_time, | |
caaff562 | 335 | .proc = m41t80_rtc_proc, |
caaff562 AN |
336 | }; |
337 | ||
ae036af8 SC |
338 | #ifdef CONFIG_PM_SLEEP |
339 | static int m41t80_suspend(struct device *dev) | |
340 | { | |
341 | struct i2c_client *client = to_i2c_client(dev); | |
342 | ||
343 | if (client->irq >= 0 && device_may_wakeup(dev)) | |
344 | enable_irq_wake(client->irq); | |
345 | ||
346 | return 0; | |
347 | } | |
348 | ||
349 | static int m41t80_resume(struct device *dev) | |
350 | { | |
351 | struct i2c_client *client = to_i2c_client(dev); | |
352 | ||
353 | if (client->irq >= 0 && device_may_wakeup(dev)) | |
354 | disable_irq_wake(client->irq); | |
355 | ||
356 | return 0; | |
357 | } | |
358 | #endif | |
359 | ||
360 | static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); | |
361 | ||
ef6b3125 MJ |
362 | static ssize_t flags_show(struct device *dev, |
363 | struct device_attribute *attr, char *buf) | |
caaff562 AN |
364 | { |
365 | struct i2c_client *client = to_i2c_client(dev); | |
366 | int val; | |
367 | ||
368 | val = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); | |
369 | if (val < 0) | |
85d77047 | 370 | return val; |
caaff562 AN |
371 | return sprintf(buf, "%#x\n", val); |
372 | } | |
ef6b3125 | 373 | static DEVICE_ATTR_RO(flags); |
caaff562 | 374 | |
ef6b3125 MJ |
375 | static ssize_t sqwfreq_show(struct device *dev, |
376 | struct device_attribute *attr, char *buf) | |
caaff562 AN |
377 | { |
378 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 379 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
f30281f4 | 380 | int val, reg_sqw; |
caaff562 | 381 | |
d3a126fc SF |
382 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
383 | return -EINVAL; | |
384 | ||
f30281f4 DG |
385 | reg_sqw = M41T80_REG_SQW; |
386 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
387 | reg_sqw = M41T80_REG_WDAY; | |
388 | val = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 389 | if (val < 0) |
85d77047 | 390 | return val; |
caaff562 AN |
391 | val = (val >> 4) & 0xf; |
392 | switch (val) { | |
393 | case 0: | |
394 | break; | |
395 | case 1: | |
396 | val = 32768; | |
397 | break; | |
398 | default: | |
399 | val = 32768 >> val; | |
400 | } | |
401 | return sprintf(buf, "%d\n", val); | |
402 | } | |
ef6b3125 MJ |
403 | |
404 | static ssize_t sqwfreq_store(struct device *dev, | |
405 | struct device_attribute *attr, | |
406 | const char *buf, size_t count) | |
caaff562 AN |
407 | { |
408 | struct i2c_client *client = to_i2c_client(dev); | |
d3a126fc | 409 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
85d77047 | 410 | int almon, sqw, reg_sqw, rc; |
fc99b901 MJ |
411 | unsigned long val; |
412 | ||
413 | rc = kstrtoul(buf, 0, &val); | |
414 | if (rc < 0) | |
415 | return rc; | |
caaff562 | 416 | |
d3a126fc SF |
417 | if (!(clientdata->features & M41T80_FEATURE_SQ)) |
418 | return -EINVAL; | |
419 | ||
caaff562 AN |
420 | if (val) { |
421 | if (!is_power_of_2(val)) | |
422 | return -EINVAL; | |
423 | val = ilog2(val); | |
424 | if (val == 15) | |
425 | val = 1; | |
426 | else if (val < 14) | |
427 | val = 15 - val; | |
428 | else | |
429 | return -EINVAL; | |
430 | } | |
431 | /* disable SQW, set SQW frequency & re-enable */ | |
432 | almon = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | |
433 | if (almon < 0) | |
85d77047 | 434 | return almon; |
f30281f4 DG |
435 | reg_sqw = M41T80_REG_SQW; |
436 | if (clientdata->features & M41T80_FEATURE_SQ_ALT) | |
437 | reg_sqw = M41T80_REG_WDAY; | |
438 | sqw = i2c_smbus_read_byte_data(client, reg_sqw); | |
caaff562 | 439 | if (sqw < 0) |
85d77047 | 440 | return sqw; |
caaff562 | 441 | sqw = (sqw & 0x0f) | (val << 4); |
85d77047 WS |
442 | |
443 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
fc99b901 | 444 | almon & ~M41T80_ALMON_SQWE); |
85d77047 WS |
445 | if (rc < 0) |
446 | return rc; | |
447 | ||
448 | if (val) { | |
449 | rc = i2c_smbus_write_byte_data(client, reg_sqw, sqw); | |
450 | if (rc < 0) | |
451 | return rc; | |
452 | ||
453 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, | |
fc99b901 MJ |
454 | almon | M41T80_ALMON_SQWE); |
455 | if (rc < 0) | |
85d77047 WS |
456 | return rc; |
457 | } | |
caaff562 AN |
458 | return count; |
459 | } | |
ef6b3125 | 460 | static DEVICE_ATTR_RW(sqwfreq); |
caaff562 AN |
461 | |
462 | static struct attribute *attrs[] = { | |
463 | &dev_attr_flags.attr, | |
464 | &dev_attr_sqwfreq.attr, | |
465 | NULL, | |
466 | }; | |
fc99b901 | 467 | |
caaff562 AN |
468 | static struct attribute_group attr_group = { |
469 | .attrs = attrs, | |
470 | }; | |
471 | ||
617780d2 AN |
472 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
473 | /* | |
474 | ***************************************************************************** | |
475 | * | |
476 | * Watchdog Driver | |
477 | * | |
478 | ***************************************************************************** | |
479 | */ | |
480 | static struct i2c_client *save_client; | |
481 | ||
482 | /* Default margin */ | |
483 | #define WD_TIMO 60 /* 1..31 seconds */ | |
484 | ||
485 | static int wdt_margin = WD_TIMO; | |
486 | module_param(wdt_margin, int, 0); | |
487 | MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); | |
488 | ||
489 | static unsigned long wdt_is_open; | |
490 | static int boot_flag; | |
491 | ||
492 | /** | |
493 | * wdt_ping: | |
494 | * | |
495 | * Reload counter one with the watchdog timeout. We don't bother reloading | |
496 | * the cascade counter. | |
497 | */ | |
498 | static void wdt_ping(void) | |
499 | { | |
500 | unsigned char i2c_data[2]; | |
501 | struct i2c_msg msgs1[1] = { | |
502 | { | |
503 | .addr = save_client->addr, | |
504 | .flags = 0, | |
505 | .len = 2, | |
506 | .buf = i2c_data, | |
507 | }, | |
508 | }; | |
d3a126fc SF |
509 | struct m41t80_data *clientdata = i2c_get_clientdata(save_client); |
510 | ||
617780d2 AN |
511 | i2c_data[0] = 0x09; /* watchdog register */ |
512 | ||
513 | if (wdt_margin > 31) | |
514 | i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ | |
515 | else | |
516 | /* | |
517 | * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) | |
518 | */ | |
fc99b901 | 519 | i2c_data[1] = wdt_margin << 2 | 0x82; |
617780d2 | 520 | |
d3a126fc SF |
521 | /* |
522 | * M41T65 has three bits for watchdog resolution. Don't set bit 7, as | |
523 | * that would be an invalid resolution. | |
524 | */ | |
525 | if (clientdata->features & M41T80_FEATURE_WD) | |
526 | i2c_data[1] &= ~M41T80_WATCHDOG_RB2; | |
527 | ||
617780d2 AN |
528 | i2c_transfer(save_client->adapter, msgs1, 1); |
529 | } | |
530 | ||
531 | /** | |
532 | * wdt_disable: | |
533 | * | |
534 | * disables watchdog. | |
535 | */ | |
536 | static void wdt_disable(void) | |
537 | { | |
538 | unsigned char i2c_data[2], i2c_buf[0x10]; | |
539 | struct i2c_msg msgs0[2] = { | |
540 | { | |
541 | .addr = save_client->addr, | |
542 | .flags = 0, | |
543 | .len = 1, | |
544 | .buf = i2c_data, | |
545 | }, | |
546 | { | |
547 | .addr = save_client->addr, | |
548 | .flags = I2C_M_RD, | |
549 | .len = 1, | |
550 | .buf = i2c_buf, | |
551 | }, | |
552 | }; | |
553 | struct i2c_msg msgs1[1] = { | |
554 | { | |
555 | .addr = save_client->addr, | |
556 | .flags = 0, | |
557 | .len = 2, | |
558 | .buf = i2c_data, | |
559 | }, | |
560 | }; | |
561 | ||
562 | i2c_data[0] = 0x09; | |
563 | i2c_transfer(save_client->adapter, msgs0, 2); | |
564 | ||
565 | i2c_data[0] = 0x09; | |
566 | i2c_data[1] = 0x00; | |
567 | i2c_transfer(save_client->adapter, msgs1, 1); | |
568 | } | |
569 | ||
570 | /** | |
571 | * wdt_write: | |
572 | * @file: file handle to the watchdog | |
573 | * @buf: buffer to write (unused as data does not matter here | |
574 | * @count: count of bytes | |
575 | * @ppos: pointer to the position to write. No seeks allowed | |
576 | * | |
577 | * A write to a watchdog device is defined as a keepalive signal. Any | |
578 | * write of data will do, as we we don't define content meaning. | |
579 | */ | |
580 | static ssize_t wdt_write(struct file *file, const char __user *buf, | |
581 | size_t count, loff_t *ppos) | |
582 | { | |
617780d2 AN |
583 | if (count) { |
584 | wdt_ping(); | |
585 | return 1; | |
586 | } | |
587 | return 0; | |
588 | } | |
589 | ||
590 | static ssize_t wdt_read(struct file *file, char __user *buf, | |
591 | size_t count, loff_t *ppos) | |
592 | { | |
593 | return 0; | |
594 | } | |
595 | ||
596 | /** | |
597 | * wdt_ioctl: | |
598 | * @inode: inode of the device | |
599 | * @file: file handle to the device | |
600 | * @cmd: watchdog command | |
601 | * @arg: argument pointer | |
602 | * | |
603 | * The watchdog API defines a common set of functions for all watchdogs | |
604 | * according to their available features. We only actually usefully support | |
605 | * querying capabilities and current status. | |
606 | */ | |
55929332 | 607 | static int wdt_ioctl(struct file *file, unsigned int cmd, |
617780d2 AN |
608 | unsigned long arg) |
609 | { | |
610 | int new_margin, rv; | |
611 | static struct watchdog_info ident = { | |
612 | .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | | |
613 | WDIOF_SETTIMEOUT, | |
614 | .firmware_version = 1, | |
615 | .identity = "M41T80 WTD" | |
616 | }; | |
617 | ||
618 | switch (cmd) { | |
619 | case WDIOC_GETSUPPORT: | |
620 | return copy_to_user((struct watchdog_info __user *)arg, &ident, | |
621 | sizeof(ident)) ? -EFAULT : 0; | |
622 | ||
623 | case WDIOC_GETSTATUS: | |
624 | case WDIOC_GETBOOTSTATUS: | |
625 | return put_user(boot_flag, (int __user *)arg); | |
626 | case WDIOC_KEEPALIVE: | |
627 | wdt_ping(); | |
628 | return 0; | |
629 | case WDIOC_SETTIMEOUT: | |
630 | if (get_user(new_margin, (int __user *)arg)) | |
631 | return -EFAULT; | |
632 | /* Arbitrary, can't find the card's limits */ | |
633 | if (new_margin < 1 || new_margin > 124) | |
634 | return -EINVAL; | |
635 | wdt_margin = new_margin; | |
636 | wdt_ping(); | |
637 | /* Fall */ | |
638 | case WDIOC_GETTIMEOUT: | |
639 | return put_user(wdt_margin, (int __user *)arg); | |
640 | ||
641 | case WDIOC_SETOPTIONS: | |
642 | if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) | |
643 | return -EFAULT; | |
644 | ||
645 | if (rv & WDIOS_DISABLECARD) { | |
a737e835 | 646 | pr_info("disable watchdog\n"); |
617780d2 AN |
647 | wdt_disable(); |
648 | } | |
649 | ||
650 | if (rv & WDIOS_ENABLECARD) { | |
a737e835 | 651 | pr_info("enable watchdog\n"); |
617780d2 AN |
652 | wdt_ping(); |
653 | } | |
654 | ||
655 | return -EINVAL; | |
656 | } | |
657 | return -ENOTTY; | |
658 | } | |
659 | ||
55929332 AB |
660 | static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, |
661 | unsigned long arg) | |
662 | { | |
663 | int ret; | |
664 | ||
613655fa | 665 | mutex_lock(&m41t80_rtc_mutex); |
55929332 | 666 | ret = wdt_ioctl(file, cmd, arg); |
613655fa | 667 | mutex_unlock(&m41t80_rtc_mutex); |
55929332 AB |
668 | |
669 | return ret; | |
670 | } | |
671 | ||
617780d2 AN |
672 | /** |
673 | * wdt_open: | |
674 | * @inode: inode of device | |
675 | * @file: file handle to device | |
676 | * | |
677 | */ | |
678 | static int wdt_open(struct inode *inode, struct file *file) | |
679 | { | |
680 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { | |
613655fa | 681 | mutex_lock(&m41t80_rtc_mutex); |
41012735 | 682 | if (test_and_set_bit(0, &wdt_is_open)) { |
613655fa | 683 | mutex_unlock(&m41t80_rtc_mutex); |
617780d2 | 684 | return -EBUSY; |
41012735 | 685 | } |
617780d2 AN |
686 | /* |
687 | * Activate | |
688 | */ | |
689 | wdt_is_open = 1; | |
613655fa | 690 | mutex_unlock(&m41t80_rtc_mutex); |
09eeb1f5 | 691 | return nonseekable_open(inode, file); |
617780d2 AN |
692 | } |
693 | return -ENODEV; | |
694 | } | |
695 | ||
696 | /** | |
697 | * wdt_close: | |
698 | * @inode: inode to board | |
699 | * @file: file handle to board | |
700 | * | |
701 | */ | |
702 | static int wdt_release(struct inode *inode, struct file *file) | |
703 | { | |
704 | if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) | |
705 | clear_bit(0, &wdt_is_open); | |
706 | return 0; | |
707 | } | |
708 | ||
709 | /** | |
710 | * notify_sys: | |
711 | * @this: our notifier block | |
712 | * @code: the event being reported | |
713 | * @unused: unused | |
714 | * | |
715 | * Our notifier is called on system shutdowns. We want to turn the card | |
716 | * off at reboot otherwise the machine will reboot again during memory | |
717 | * test or worse yet during the following fsck. This would suck, in fact | |
718 | * trust me - if it happens it does suck. | |
719 | */ | |
720 | static int wdt_notify_sys(struct notifier_block *this, unsigned long code, | |
721 | void *unused) | |
722 | { | |
723 | if (code == SYS_DOWN || code == SYS_HALT) | |
724 | /* Disable Watchdog */ | |
725 | wdt_disable(); | |
726 | return NOTIFY_DONE; | |
727 | } | |
728 | ||
729 | static const struct file_operations wdt_fops = { | |
730 | .owner = THIS_MODULE, | |
731 | .read = wdt_read, | |
55929332 | 732 | .unlocked_ioctl = wdt_unlocked_ioctl, |
617780d2 AN |
733 | .write = wdt_write, |
734 | .open = wdt_open, | |
735 | .release = wdt_release, | |
6038f373 | 736 | .llseek = no_llseek, |
617780d2 AN |
737 | }; |
738 | ||
739 | static struct miscdevice wdt_dev = { | |
740 | .minor = WATCHDOG_MINOR, | |
741 | .name = "watchdog", | |
742 | .fops = &wdt_fops, | |
743 | }; | |
744 | ||
745 | /* | |
746 | * The WDT card needs to learn about soft shutdowns in order to | |
747 | * turn the timebomb registers off. | |
748 | */ | |
749 | static struct notifier_block wdt_notifier = { | |
750 | .notifier_call = wdt_notify_sys, | |
751 | }; | |
752 | #endif /* CONFIG_RTC_DRV_M41T80_WDT */ | |
753 | ||
caaff562 AN |
754 | /* |
755 | ***************************************************************************** | |
756 | * | |
757 | * Driver Interface | |
758 | * | |
759 | ***************************************************************************** | |
760 | */ | |
ef6b3125 MJ |
761 | |
762 | static void m41t80_remove_sysfs_group(void *_dev) | |
763 | { | |
764 | struct device *dev = _dev; | |
765 | ||
766 | sysfs_remove_group(&dev->kobj, &attr_group); | |
767 | } | |
768 | ||
d2653e92 JD |
769 | static int m41t80_probe(struct i2c_client *client, |
770 | const struct i2c_device_id *id) | |
caaff562 | 771 | { |
f2b84ee8 | 772 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
3760f736 | 773 | int rc = 0; |
caaff562 AN |
774 | struct rtc_device *rtc = NULL; |
775 | struct rtc_time tm; | |
9c6dfed9 | 776 | struct m41t80_data *m41t80_data = NULL; |
caaff562 | 777 | |
f2b84ee8 MJ |
778 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
779 | I2C_FUNC_SMBUS_BYTE_DATA)) { | |
780 | dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); | |
c67fedfa | 781 | return -ENODEV; |
f2b84ee8 | 782 | } |
caaff562 | 783 | |
9c6dfed9 MJ |
784 | m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), |
785 | GFP_KERNEL); | |
786 | if (!m41t80_data) | |
c67fedfa | 787 | return -ENOMEM; |
caaff562 | 788 | |
9c6dfed9 MJ |
789 | m41t80_data->features = id->driver_data; |
790 | i2c_set_clientdata(client, m41t80_data); | |
791 | ||
792 | if (client->irq > 0) { | |
793 | rc = devm_request_threaded_irq(&client->dev, client->irq, | |
794 | NULL, m41t80_handle_irq, | |
795 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
796 | "m41t80", client); | |
797 | if (rc) { | |
798 | dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); | |
799 | client->irq = 0; | |
800 | } else { | |
801 | m41t80_rtc_ops.read_alarm = m41t80_read_alarm; | |
802 | m41t80_rtc_ops.set_alarm = m41t80_set_alarm; | |
803 | m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; | |
3726a218 MJ |
804 | /* Enable the wakealarm */ |
805 | device_init_wakeup(&client->dev, true); | |
9c6dfed9 MJ |
806 | } |
807 | } | |
a015dbc1 | 808 | |
4ebabb78 | 809 | rtc = devm_rtc_device_register(&client->dev, client->name, |
fc99b901 | 810 | &m41t80_rtc_ops, THIS_MODULE); |
c67fedfa WS |
811 | if (IS_ERR(rtc)) |
812 | return PTR_ERR(rtc); | |
caaff562 | 813 | |
9c6dfed9 | 814 | m41t80_data->rtc = rtc; |
caaff562 AN |
815 | |
816 | /* Make sure HT (Halt Update) bit is cleared */ | |
817 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); | |
caaff562 | 818 | |
c67fedfa | 819 | if (rc >= 0 && rc & M41T80_ALHOUR_HT) { |
9c6dfed9 | 820 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
caaff562 AN |
821 | m41t80_get_datetime(client, &tm); |
822 | dev_info(&client->dev, "HT bit was set!\n"); | |
823 | dev_info(&client->dev, | |
fc99b901 | 824 | "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n", |
caaff562 AN |
825 | tm.tm_year + 1900, |
826 | tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, | |
827 | tm.tm_min, tm.tm_sec); | |
828 | } | |
c67fedfa | 829 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, |
fc99b901 | 830 | rc & ~M41T80_ALHOUR_HT); |
c67fedfa WS |
831 | } |
832 | ||
833 | if (rc < 0) { | |
834 | dev_err(&client->dev, "Can't clear HT bit\n"); | |
85d77047 | 835 | return rc; |
caaff562 AN |
836 | } |
837 | ||
838 | /* Make sure ST (stop) bit is cleared */ | |
839 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); | |
caaff562 | 840 | |
c67fedfa WS |
841 | if (rc >= 0 && rc & M41T80_SEC_ST) |
842 | rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, | |
fc99b901 | 843 | rc & ~M41T80_SEC_ST); |
c67fedfa WS |
844 | if (rc < 0) { |
845 | dev_err(&client->dev, "Can't clear ST bit\n"); | |
85d77047 | 846 | return rc; |
caaff562 AN |
847 | } |
848 | ||
ef6b3125 MJ |
849 | /* Export sysfs entries */ |
850 | rc = sysfs_create_group(&(&client->dev)->kobj, &attr_group); | |
851 | if (rc) { | |
852 | dev_err(&client->dev, "Failed to create sysfs group: %d\n", rc); | |
c67fedfa | 853 | return rc; |
ef6b3125 MJ |
854 | } |
855 | ||
104b2d87 SM |
856 | rc = devm_add_action_or_reset(&client->dev, m41t80_remove_sysfs_group, |
857 | &client->dev); | |
ef6b3125 | 858 | if (rc) { |
ef6b3125 MJ |
859 | dev_err(&client->dev, |
860 | "Failed to add sysfs cleanup action: %d\n", rc); | |
861 | return rc; | |
862 | } | |
caaff562 | 863 | |
617780d2 | 864 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
9c6dfed9 | 865 | if (m41t80_data->features & M41T80_FEATURE_HT) { |
417607d0 | 866 | save_client = client; |
617780d2 AN |
867 | rc = misc_register(&wdt_dev); |
868 | if (rc) | |
c67fedfa | 869 | return rc; |
617780d2 AN |
870 | rc = register_reboot_notifier(&wdt_notifier); |
871 | if (rc) { | |
872 | misc_deregister(&wdt_dev); | |
c67fedfa | 873 | return rc; |
617780d2 | 874 | } |
617780d2 AN |
875 | } |
876 | #endif | |
caaff562 | 877 | return 0; |
caaff562 AN |
878 | } |
879 | ||
880 | static int m41t80_remove(struct i2c_client *client) | |
881 | { | |
4ebabb78 | 882 | #ifdef CONFIG_RTC_DRV_M41T80_WDT |
caaff562 | 883 | struct m41t80_data *clientdata = i2c_get_clientdata(client); |
caaff562 | 884 | |
3760f736 | 885 | if (clientdata->features & M41T80_FEATURE_HT) { |
617780d2 AN |
886 | misc_deregister(&wdt_dev); |
887 | unregister_reboot_notifier(&wdt_notifier); | |
888 | } | |
889 | #endif | |
caaff562 AN |
890 | |
891 | return 0; | |
892 | } | |
893 | ||
894 | static struct i2c_driver m41t80_driver = { | |
895 | .driver = { | |
afe1ab4d | 896 | .name = "rtc-m41t80", |
ae036af8 | 897 | .pm = &m41t80_pm, |
caaff562 AN |
898 | }, |
899 | .probe = m41t80_probe, | |
900 | .remove = m41t80_remove, | |
3760f736 | 901 | .id_table = m41t80_id, |
caaff562 AN |
902 | }; |
903 | ||
0abc9201 | 904 | module_i2c_driver(m41t80_driver); |
caaff562 AN |
905 | |
906 | MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); | |
907 | MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); | |
908 | MODULE_LICENSE("GPL"); |