[mirror_ubuntu-bionic-kernel.git] / drivers / rtc / rtc-m48t86.c

/*
 * ST M48T86 / Dallas DS12887 RTC driver
 * Copyright (c) 2006 Tower Technologies
 *
 * Author: Alessandro Zummo <a.zummo@towertech.it>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This drivers only supports the clock running in BCD and 24H mode.
 * If it will be ever adapted to binary and 12H mode, care must be taken
 * to not introduce bugs.
 */

#include <linux/module.h>
#include <linux/rtc.h>
#include <linux/platform_device.h>
#include <linux/bcd.h>
#include <linux/io.h>

#define M48T86_SEC		0x00
#define M48T86_SECALRM		0x01
#define M48T86_MIN		0x02
#define M48T86_MINALRM		0x03
#define M48T86_HOUR		0x04
#define M48T86_HOURALRM		0x05
#define M48T86_DOW		0x06 /* 1 = sunday */
#define M48T86_DOM		0x07
#define M48T86_MONTH		0x08 /* 1 - 12 */
#define M48T86_YEAR		0x09 /* 0 - 99 */
#define M48T86_A		0x0a
#define M48T86_B		0x0b
#define M48T86_B_SET		BIT(7)
#define M48T86_B_DM		BIT(2)
#define M48T86_B_H24		BIT(1)
#define M48T86_C		0x0c
#define M48T86_D		0x0d
#define M48T86_D_VRT		BIT(7)
#define M48T86_NVRAM(x)		(0x0e + (x))
#define M48T86_NVRAM_LEN	114

struct m48t86_rtc_info {
	void __iomem *index_reg;
	void __iomem *data_reg;
	struct rtc_device *rtc;
};

static unsigned char m48t86_readb(struct device *dev, unsigned long addr)
{
	struct m48t86_rtc_info *info = dev_get_drvdata(dev);
	unsigned char value;

	writeb(addr, info->index_reg);
	value = readb(info->data_reg);

	return value;
}

static void m48t86_writeb(struct device *dev,
			  unsigned char value, unsigned long addr)
{
	struct m48t86_rtc_info *info = dev_get_drvdata(dev);

	writeb(addr, info->index_reg);
	writeb(value, info->data_reg);
}

static int m48t86_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	unsigned char reg;

	reg = m48t86_readb(dev, M48T86_B);

	if (reg & M48T86_B_DM) {
		/* data (binary) mode */
		tm->tm_sec	= m48t86_readb(dev, M48T86_SEC);
		tm->tm_min	= m48t86_readb(dev, M48T86_MIN);
		tm->tm_hour	= m48t86_readb(dev, M48T86_HOUR) & 0x3f;
		tm->tm_mday	= m48t86_readb(dev, M48T86_DOM);
		/* tm_mon is 0-11 */
		tm->tm_mon	= m48t86_readb(dev, M48T86_MONTH) - 1;
		tm->tm_year	= m48t86_readb(dev, M48T86_YEAR) + 100;
		tm->tm_wday	= m48t86_readb(dev, M48T86_DOW);
	} else {
		/* bcd mode */
		tm->tm_sec	= bcd2bin(m48t86_readb(dev, M48T86_SEC));
		tm->tm_min	= bcd2bin(m48t86_readb(dev, M48T86_MIN));
		tm->tm_hour	= bcd2bin(m48t86_readb(dev, M48T86_HOUR) &
					  0x3f);
		tm->tm_mday	= bcd2bin(m48t86_readb(dev, M48T86_DOM));
		/* tm_mon is 0-11 */
		tm->tm_mon	= bcd2bin(m48t86_readb(dev, M48T86_MONTH)) - 1;
		tm->tm_year	= bcd2bin(m48t86_readb(dev, M48T86_YEAR)) + 100;
		tm->tm_wday	= bcd2bin(m48t86_readb(dev, M48T86_DOW));
	}

	/* correct the hour if the clock is in 12h mode */
	if (!(reg & M48T86_B_H24))
		if (m48t86_readb(dev, M48T86_HOUR) & 0x80)
			tm->tm_hour += 12;

	return rtc_valid_tm(tm);
}

static int m48t86_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned char reg;

	reg = m48t86_readb(dev, M48T86_B);

	/* update flag and 24h mode */
	reg |= M48T86_B_SET | M48T86_B_H24;
	m48t86_writeb(dev, reg, M48T86_B);

	if (reg & M48T86_B_DM) {
		/* data (binary) mode */
		m48t86_writeb(dev, tm->tm_sec, M48T86_SEC);
		m48t86_writeb(dev, tm->tm_min, M48T86_MIN);
		m48t86_writeb(dev, tm->tm_hour, M48T86_HOUR);
		m48t86_writeb(dev, tm->tm_mday, M48T86_DOM);
		m48t86_writeb(dev, tm->tm_mon + 1, M48T86_MONTH);
		m48t86_writeb(dev, tm->tm_year % 100, M48T86_YEAR);
		m48t86_writeb(dev, tm->tm_wday, M48T86_DOW);
	} else {
		/* bcd mode */
		m48t86_writeb(dev, bin2bcd(tm->tm_sec), M48T86_SEC);
		m48t86_writeb(dev, bin2bcd(tm->tm_min), M48T86_MIN);
		m48t86_writeb(dev, bin2bcd(tm->tm_hour), M48T86_HOUR);
		m48t86_writeb(dev, bin2bcd(tm->tm_mday), M48T86_DOM);
		m48t86_writeb(dev, bin2bcd(tm->tm_mon + 1), M48T86_MONTH);
		m48t86_writeb(dev, bin2bcd(tm->tm_year % 100), M48T86_YEAR);
		m48t86_writeb(dev, bin2bcd(tm->tm_wday), M48T86_DOW);
	}

	/* update ended */
	reg &= ~M48T86_B_SET;
	m48t86_writeb(dev, reg, M48T86_B);

	return 0;
}

static int m48t86_rtc_proc(struct device *dev, struct seq_file *seq)
{
	unsigned char reg;

	reg = m48t86_readb(dev, M48T86_B);

	seq_printf(seq, "mode\t\t: %s\n",
		   (reg & M48T86_B_DM) ? "binary" : "bcd");

	reg = m48t86_readb(dev, M48T86_D);

	seq_printf(seq, "battery\t\t: %s\n",
		   (reg & M48T86_D_VRT) ? "ok" : "exhausted");

	return 0;
}

static const struct rtc_class_ops m48t86_rtc_ops = {
	.read_time	= m48t86_rtc_read_time,
	.set_time	= m48t86_rtc_set_time,
	.proc		= m48t86_rtc_proc,
};

static int m48t86_nvram_read(void *priv, unsigned int off, void *buf,
			     size_t count)
{
	struct device *dev = priv;
	unsigned int i;

	for (i = 0; i < count; i++)
		((u8 *)buf)[i] = m48t86_readb(dev, M48T86_NVRAM(off + i));

	return 0;
}

static int m48t86_nvram_write(void *priv, unsigned int off, void *buf,
			      size_t count)
{
	struct device *dev = priv;
	unsigned int i;

	for (i = 0; i < count; i++)
		m48t86_writeb(dev, ((u8 *)buf)[i], M48T86_NVRAM(off + i));

	return 0;
}

/*
 * The RTC is an optional feature at purchase time on some Technologic Systems
 * boards. Verify that it actually exists by checking if the last two bytes
 * of the NVRAM can be changed.
 *
 * This is based on the method used in their rtc7800.c example.
 */
static bool m48t86_verify_chip(struct platform_device *pdev)
{
	unsigned int offset0 = M48T86_NVRAM(M48T86_NVRAM_LEN - 2);
	unsigned int offset1 = M48T86_NVRAM(M48T86_NVRAM_LEN - 1);
	unsigned char tmp0, tmp1;

	tmp0 = m48t86_readb(&pdev->dev, offset0);
	tmp1 = m48t86_readb(&pdev->dev, offset1);

	m48t86_writeb(&pdev->dev, 0x00, offset0);
	m48t86_writeb(&pdev->dev, 0x55, offset1);
	if (m48t86_readb(&pdev->dev, offset1) == 0x55) {
		m48t86_writeb(&pdev->dev, 0xaa, offset1);
		if (m48t86_readb(&pdev->dev, offset1) == 0xaa &&
		    m48t86_readb(&pdev->dev, offset0) == 0x00) {
			m48t86_writeb(&pdev->dev, tmp0, offset0);
			m48t86_writeb(&pdev->dev, tmp1, offset1);

			return true;
		}
	}
	return false;
}

static struct nvmem_config m48t86_nvmem_cfg = {
	.name = "m48t86_nvram",
	.word_size = 1,
	.stride = 1,
	.size = M48T86_NVRAM_LEN,
	.reg_read = m48t86_nvram_read,
	.reg_write = m48t86_nvram_write,
};

static int m48t86_rtc_probe(struct platform_device *pdev)
{
	struct m48t86_rtc_info *info;
	struct resource *res;
	unsigned char reg;
	int err;

	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
	if (!info)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENODEV;
	info->index_reg = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(info->index_reg))
		return PTR_ERR(info->index_reg);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	if (!res)
		return -ENODEV;
	info->data_reg = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(info->data_reg))
		return PTR_ERR(info->data_reg);

	dev_set_drvdata(&pdev->dev, info);

	if (!m48t86_verify_chip(pdev)) {
		dev_info(&pdev->dev, "RTC not present\n");
		return -ENODEV;
	}

	info->rtc = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(info->rtc))
		return PTR_ERR(info->rtc);

	info->rtc->ops = &m48t86_rtc_ops;

	m48t86_nvmem_cfg.priv = &pdev->dev;
	info->rtc->nvmem_config = &m48t86_nvmem_cfg;
	info->rtc->nvram_old_abi = true;

	err = rtc_register_device(info->rtc);
	if (err)
		return err;

	/* read battery status */
	reg = m48t86_readb(&pdev->dev, M48T86_D);
	dev_info(&pdev->dev, "battery %s\n",
		 (reg & M48T86_D_VRT) ? "ok" : "exhausted");

	return 0;
}

static struct platform_driver m48t86_rtc_platform_driver = {
	.driver		= {
		.name	= "rtc-m48t86",
	},
	.probe		= m48t86_rtc_probe,
};

module_platform_driver(m48t86_rtc_platform_driver);

MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
MODULE_DESCRIPTION("M48T86 RTC driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:rtc-m48t86");
Commit	Line	Data
1d98af87 AZ	1	/*
	2	* ST M48T86 / Dallas DS12887 RTC driver
	3	* Copyright (c) 2006 Tower Technologies
	4	*
	5	* Author: Alessandro Zummo <a.zummo@towertech.it>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* This drivers only supports the clock running in BCD and 24H mode.
	12	* If it will be ever adapted to binary and 12H mode, care must be taken
	13	* to not introduce bugs.
	14	*/
	15
	16	#include <linux/module.h>
	17	#include <linux/rtc.h>
	18	#include <linux/platform_device.h>
1d98af87	19	#include <linux/bcd.h>
8057c86d	20	#include <linux/io.h>
1d98af87	21
68b54f47 HS	22	#define M48T86_SEC 0x00
	23	#define M48T86_SECALRM 0x01
	24	#define M48T86_MIN 0x02
	25	#define M48T86_MINALRM 0x03
	26	#define M48T86_HOUR 0x04
	27	#define M48T86_HOURALRM 0x05
	28	#define M48T86_DOW 0x06 /* 1 = sunday */
	29	#define M48T86_DOM 0x07
	30	#define M48T86_MONTH 0x08 /* 1 - 12 */
	31	#define M48T86_YEAR 0x09 /* 0 - 99 */
	32	#define M48T86_A 0x0a
	33	#define M48T86_B 0x0b
	34	#define M48T86_B_SET BIT(7)
	35	#define M48T86_B_DM BIT(2)
	36	#define M48T86_B_H24 BIT(1)
	37	#define M48T86_C 0x0c
	38	#define M48T86_D 0x0d
	39	#define M48T86_D_VRT BIT(7)
b180cf8b HS	40	#define M48T86_NVRAM(x) (0x0e + (x))
b180cf8b HS	41	#define M48T86_NVRAM_LEN 114
1d98af87	42
8057c86d HS	43	struct m48t86_rtc_info {
	44	void __iomem *index_reg;
	45	void __iomem *data_reg;
	46	struct rtc_device *rtc;
8057c86d HS	47	};
	48
	49	static unsigned char m48t86_readb(struct device *dev, unsigned long addr)
	50	{
	51	struct m48t86_rtc_info *info = dev_get_drvdata(dev);
	52	unsigned char value;
	53
0500ce58 HS	54	writeb(addr, info->index_reg);
	55	value = readb(info->data_reg);
	56
8057c86d HS	57	return value;
	58	}
	59
	60	static void m48t86_writeb(struct device *dev,
	61	unsigned char value, unsigned long addr)
	62	{
	63	struct m48t86_rtc_info *info = dev_get_drvdata(dev);
	64
0500ce58 HS	65	writeb(addr, info->index_reg);
0500ce58 HS	66	writeb(value, info->data_reg);
8057c86d HS	67	}
8057c86d HS	68
1d98af87 AZ	69	static int m48t86_rtc_read_time(struct device dev, struct rtc_time tm)
	70	{
	71	unsigned char reg;
1d98af87	72
8057c86d	73	reg = m48t86_readb(dev, M48T86_B);
1d98af87	74
68b54f47	75	if (reg & M48T86_B_DM) {
1d98af87	76	/* data (binary) mode */
8057c86d HS	77	tm->tm_sec = m48t86_readb(dev, M48T86_SEC);
	78	tm->tm_min = m48t86_readb(dev, M48T86_MIN);
	79	tm->tm_hour = m48t86_readb(dev, M48T86_HOUR) & 0x3f;
	80	tm->tm_mday = m48t86_readb(dev, M48T86_DOM);
1d98af87	81	/* tm_mon is 0-11 */
8057c86d HS	82	tm->tm_mon = m48t86_readb(dev, M48T86_MONTH) - 1;
	83	tm->tm_year = m48t86_readb(dev, M48T86_YEAR) + 100;
	84	tm->tm_wday = m48t86_readb(dev, M48T86_DOW);
1d98af87 AZ	85	} else {
1d98af87 AZ	86	/* bcd mode */
8057c86d HS	87	tm->tm_sec = bcd2bin(m48t86_readb(dev, M48T86_SEC));
	88	tm->tm_min = bcd2bin(m48t86_readb(dev, M48T86_MIN));
	89	tm->tm_hour = bcd2bin(m48t86_readb(dev, M48T86_HOUR) &
	90	0x3f);
	91	tm->tm_mday = bcd2bin(m48t86_readb(dev, M48T86_DOM));
1d98af87	92	/* tm_mon is 0-11 */
8057c86d HS	93	tm->tm_mon = bcd2bin(m48t86_readb(dev, M48T86_MONTH)) - 1;
	94	tm->tm_year = bcd2bin(m48t86_readb(dev, M48T86_YEAR)) + 100;
	95	tm->tm_wday = bcd2bin(m48t86_readb(dev, M48T86_DOW));
1d98af87 AZ	96	}
	97
	98	/* correct the hour if the clock is in 12h mode */
68b54f47	99	if (!(reg & M48T86_B_H24))
8057c86d	100	if (m48t86_readb(dev, M48T86_HOUR) & 0x80)
1d98af87 AZ	101	tm->tm_hour += 12;
1d98af87 AZ	102
52142ed4	103	return rtc_valid_tm(tm);
1d98af87 AZ	104	}
	105
	106	static int m48t86_rtc_set_time(struct device dev, struct rtc_time tm)
	107	{
	108	unsigned char reg;
1d98af87	109
8057c86d	110	reg = m48t86_readb(dev, M48T86_B);
1d98af87 AZ	111
1d98af87 AZ	112	/* update flag and 24h mode */
68b54f47	113	reg \|= M48T86_B_SET \| M48T86_B_H24;
8057c86d	114	m48t86_writeb(dev, reg, M48T86_B);
1d98af87	115
68b54f47	116	if (reg & M48T86_B_DM) {
1d98af87	117	/* data (binary) mode */
8057c86d HS	118	m48t86_writeb(dev, tm->tm_sec, M48T86_SEC);
	119	m48t86_writeb(dev, tm->tm_min, M48T86_MIN);
	120	m48t86_writeb(dev, tm->tm_hour, M48T86_HOUR);
	121	m48t86_writeb(dev, tm->tm_mday, M48T86_DOM);
	122	m48t86_writeb(dev, tm->tm_mon + 1, M48T86_MONTH);
	123	m48t86_writeb(dev, tm->tm_year % 100, M48T86_YEAR);
	124	m48t86_writeb(dev, tm->tm_wday, M48T86_DOW);
1d98af87 AZ	125	} else {
1d98af87 AZ	126	/* bcd mode */
8057c86d HS	127	m48t86_writeb(dev, bin2bcd(tm->tm_sec), M48T86_SEC);
	128	m48t86_writeb(dev, bin2bcd(tm->tm_min), M48T86_MIN);
	129	m48t86_writeb(dev, bin2bcd(tm->tm_hour), M48T86_HOUR);
	130	m48t86_writeb(dev, bin2bcd(tm->tm_mday), M48T86_DOM);
	131	m48t86_writeb(dev, bin2bcd(tm->tm_mon + 1), M48T86_MONTH);
	132	m48t86_writeb(dev, bin2bcd(tm->tm_year % 100), M48T86_YEAR);
	133	m48t86_writeb(dev, bin2bcd(tm->tm_wday), M48T86_DOW);
1d98af87 AZ	134	}
	135
	136	/* update ended */
68b54f47	137	reg &= ~M48T86_B_SET;
8057c86d	138	m48t86_writeb(dev, reg, M48T86_B);
1d98af87 AZ	139
	140	return 0;
	141	}
	142
	143	static int m48t86_rtc_proc(struct device dev, struct seq_file seq)
	144	{
	145	unsigned char reg;
1d98af87	146
8057c86d	147	reg = m48t86_readb(dev, M48T86_B);
1d98af87	148
1d98af87	149	seq_printf(seq, "mode\t\t: %s\n",
68b54f47	150	(reg & M48T86_B_DM) ? "binary" : "bcd");
1d98af87	151
8057c86d	152	reg = m48t86_readb(dev, M48T86_D);
1d98af87 AZ	153
1d98af87 AZ	154	seq_printf(seq, "battery\t\t: %s\n",
68b54f47	155	(reg & M48T86_D_VRT) ? "ok" : "exhausted");
1d98af87 AZ	156
	157	return 0;
	158	}
	159
ff8371ac	160	static const struct rtc_class_ops m48t86_rtc_ops = {
1d98af87 AZ	161	.read_time = m48t86_rtc_read_time,
	162	.set_time = m48t86_rtc_set_time,
	163	.proc = m48t86_rtc_proc,
	164	};
	165
f8033aab AB	166	static int m48t86_nvram_read(void priv, unsigned int off, void buf,
f8033aab AB	167	size_t count)
b180cf8b	168	{
f8033aab	169	struct device *dev = priv;
b180cf8b HS	170	unsigned int i;
	171
	172	for (i = 0; i < count; i++)
f8033aab	173	((u8 *)buf)[i] = m48t86_readb(dev, M48T86_NVRAM(off + i));
b180cf8b	174
f8033aab	175	return 0;
b180cf8b HS	176	}
b180cf8b HS	177
f8033aab AB	178	static int m48t86_nvram_write(void priv, unsigned int off, void buf,
f8033aab AB	179	size_t count)
b180cf8b	180	{
f8033aab	181	struct device *dev = priv;
b180cf8b HS	182	unsigned int i;
	183
	184	for (i = 0; i < count; i++)
f8033aab	185	m48t86_writeb(dev, ((u8 *)buf)[i], M48T86_NVRAM(off + i));
b180cf8b	186
f8033aab	187	return 0;
b180cf8b HS	188	}
b180cf8b HS	189
3ea07127 HS	190	/*
	191	* The RTC is an optional feature at purchase time on some Technologic Systems
	192	* boards. Verify that it actually exists by checking if the last two bytes
	193	* of the NVRAM can be changed.
	194	*
	195	* This is based on the method used in their rtc7800.c example.
	196	*/
	197	static bool m48t86_verify_chip(struct platform_device *pdev)
	198	{
	199	unsigned int offset0 = M48T86_NVRAM(M48T86_NVRAM_LEN - 2);
	200	unsigned int offset1 = M48T86_NVRAM(M48T86_NVRAM_LEN - 1);
	201	unsigned char tmp0, tmp1;
	202
	203	tmp0 = m48t86_readb(&pdev->dev, offset0);
	204	tmp1 = m48t86_readb(&pdev->dev, offset1);
	205
	206	m48t86_writeb(&pdev->dev, 0x00, offset0);
	207	m48t86_writeb(&pdev->dev, 0x55, offset1);
	208	if (m48t86_readb(&pdev->dev, offset1) == 0x55) {
	209	m48t86_writeb(&pdev->dev, 0xaa, offset1);
	210	if (m48t86_readb(&pdev->dev, offset1) == 0xaa &&
	211	m48t86_readb(&pdev->dev, offset0) == 0x00) {
	212	m48t86_writeb(&pdev->dev, tmp0, offset0);
	213	m48t86_writeb(&pdev->dev, tmp1, offset1);
	214
	215	return true;
	216	}
	217	}
	218	return false;
	219	}
	220
f8033aab AB	221	static struct nvmem_config m48t86_nvmem_cfg = {
	222	.name = "m48t86_nvram",
	223	.word_size = 1,
	224	.stride = 1,
	225	.size = M48T86_NVRAM_LEN,
	226	.reg_read = m48t86_nvram_read,
	227	.reg_write = m48t86_nvram_write,
	228	};
	229
8057c86d	230	static int m48t86_rtc_probe(struct platform_device *pdev)
1d98af87	231	{
8057c86d	232	struct m48t86_rtc_info *info;
0500ce58	233	struct resource *res;
1d98af87	234	unsigned char reg;
5508c725	235	int err;
d5b6bb0a	236
8057c86d HS	237	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
	238	if (!info)
	239	return -ENOMEM;
	240
0500ce58 HS	241	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	242	if (!res)
	243	return -ENODEV;
	244	info->index_reg = devm_ioremap_resource(&pdev->dev, res);
	245	if (IS_ERR(info->index_reg))
	246	return PTR_ERR(info->index_reg);
	247
	248	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	249	if (!res)
	250	return -ENODEV;
	251	info->data_reg = devm_ioremap_resource(&pdev->dev, res);
	252	if (IS_ERR(info->data_reg))
	253	return PTR_ERR(info->data_reg);
1d98af87	254
8057c86d	255	dev_set_drvdata(&pdev->dev, info);
1d98af87	256
3ea07127 HS	257	if (!m48t86_verify_chip(pdev)) {
	258	dev_info(&pdev->dev, "RTC not present\n");
	259	return -ENODEV;
	260	}
	261
5508c725	262	info->rtc = devm_rtc_allocate_device(&pdev->dev);
8057c86d HS	263	if (IS_ERR(info->rtc))
8057c86d HS	264	return PTR_ERR(info->rtc);
1d98af87	265
5508c725 AB	266	info->rtc->ops = &m48t86_rtc_ops;
5508c725 AB	267
f8033aab AB	268	m48t86_nvmem_cfg.priv = &pdev->dev;
	269	info->rtc->nvmem_config = &m48t86_nvmem_cfg;
	270	info->rtc->nvram_old_abi = true;
	271
5508c725 AB	272	err = rtc_register_device(info->rtc);
	273	if (err)
	274	return err;
	275
1d98af87	276	/* read battery status */
8057c86d HS	277	reg = m48t86_readb(&pdev->dev, M48T86_D);
8057c86d HS	278	dev_info(&pdev->dev, "battery %s\n",
68b54f47	279	(reg & M48T86_D_VRT) ? "ok" : "exhausted");
1d98af87 AZ	280
	281	return 0;
	282	}
	283
1d98af87 AZ	284	static struct platform_driver m48t86_rtc_platform_driver = {
	285	.driver = {
	286	.name = "rtc-m48t86",
1d98af87 AZ	287	},
1d98af87 AZ	288	.probe = m48t86_rtc_probe,
1d98af87 AZ	289	};
1d98af87 AZ	290
0c4eae66	291	module_platform_driver(m48t86_rtc_platform_driver);
1d98af87 AZ	292
	293	MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
	294	MODULE_DESCRIPTION("M48T86 RTC driver");
	295	MODULE_LICENSE("GPL");
ad28a07b	296	MODULE_ALIAS("platform:rtc-m48t86");