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1fcbe42c JG |
1 | /* |
2 | * SPI Driver for Microchip MCP795 RTC | |
3 | * | |
4 | * Copyright (C) Josef Gajdusek <atx@atx.name> | |
5 | * | |
6 | * based on other Linux RTC drivers | |
7 | * | |
8 | * Device datasheet: | |
9 | * http://ww1.microchip.com/downloads/en/DeviceDoc/22280A.pdf | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | * | |
15 | * */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/printk.h> | |
21 | #include <linux/spi/spi.h> | |
22 | #include <linux/rtc.h> | |
7f8a5892 | 23 | #include <linux/of.h> |
bcf18d88 | 24 | #include <linux/bcd.h> |
1fcbe42c JG |
25 | |
26 | /* MCP795 Instructions, see datasheet table 3-1 */ | |
27 | #define MCP795_EEREAD 0x03 | |
28 | #define MCP795_EEWRITE 0x02 | |
29 | #define MCP795_EEWRDI 0x04 | |
30 | #define MCP795_EEWREN 0x06 | |
31 | #define MCP795_SRREAD 0x05 | |
32 | #define MCP795_SRWRITE 0x01 | |
33 | #define MCP795_READ 0x13 | |
34 | #define MCP795_WRITE 0x12 | |
35 | #define MCP795_UNLOCK 0x14 | |
36 | #define MCP795_IDWRITE 0x32 | |
37 | #define MCP795_IDREAD 0x33 | |
38 | #define MCP795_CLRWDT 0x44 | |
39 | #define MCP795_CLRRAM 0x54 | |
40 | ||
41 | #define MCP795_ST_BIT 0x80 | |
42 | #define MCP795_24_BIT 0x40 | |
e72765c6 | 43 | #define MCP795_LP_BIT BIT(5) |
1fcbe42c JG |
44 | |
45 | static int mcp795_rtcc_read(struct device *dev, u8 addr, u8 *buf, u8 count) | |
46 | { | |
47 | struct spi_device *spi = to_spi_device(dev); | |
48 | int ret; | |
49 | u8 tx[2]; | |
50 | ||
51 | tx[0] = MCP795_READ; | |
52 | tx[1] = addr; | |
53 | ret = spi_write_then_read(spi, tx, sizeof(tx), buf, count); | |
54 | ||
55 | if (ret) | |
56 | dev_err(dev, "Failed reading %d bytes from address %x.\n", | |
57 | count, addr); | |
58 | ||
59 | return ret; | |
60 | } | |
61 | ||
62 | static int mcp795_rtcc_write(struct device *dev, u8 addr, u8 *data, u8 count) | |
63 | { | |
64 | struct spi_device *spi = to_spi_device(dev); | |
65 | int ret; | |
66 | u8 tx[2 + count]; | |
67 | ||
68 | tx[0] = MCP795_WRITE; | |
69 | tx[1] = addr; | |
70 | memcpy(&tx[2], data, count); | |
71 | ||
72 | ret = spi_write(spi, tx, 2 + count); | |
73 | ||
74 | if (ret) | |
75 | dev_err(dev, "Failed to write %d bytes to address %x.\n", | |
76 | count, addr); | |
77 | ||
78 | return ret; | |
79 | } | |
80 | ||
81 | static int mcp795_rtcc_set_bits(struct device *dev, u8 addr, u8 mask, u8 state) | |
82 | { | |
83 | int ret; | |
84 | u8 tmp; | |
85 | ||
86 | ret = mcp795_rtcc_read(dev, addr, &tmp, 1); | |
87 | if (ret) | |
88 | return ret; | |
89 | ||
90 | if ((tmp & mask) != state) { | |
91 | tmp = (tmp & ~mask) | state; | |
92 | ret = mcp795_rtcc_write(dev, addr, &tmp, 1); | |
93 | } | |
94 | ||
95 | return ret; | |
96 | } | |
97 | ||
98 | static int mcp795_set_time(struct device *dev, struct rtc_time *tim) | |
99 | { | |
100 | int ret; | |
101 | u8 data[7]; | |
102 | ||
103 | /* Read first, so we can leave config bits untouched */ | |
104 | ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data)); | |
105 | ||
106 | if (ret) | |
107 | return ret; | |
108 | ||
bcf18d88 EB |
109 | data[0] = (data[0] & 0x80) | bin2bcd(tim->tm_sec); |
110 | data[1] = (data[1] & 0x80) | bin2bcd(tim->tm_min); | |
111 | data[2] = bin2bcd(tim->tm_hour); | |
112 | data[4] = bin2bcd(tim->tm_mday); | |
26eeefd5 | 113 | data[5] = (data[5] & MCP795_LP_BIT) | bin2bcd(tim->tm_mon + 1); |
1fcbe42c JG |
114 | |
115 | if (tim->tm_year > 100) | |
116 | tim->tm_year -= 100; | |
117 | ||
bcf18d88 | 118 | data[6] = bin2bcd(tim->tm_year); |
1fcbe42c JG |
119 | |
120 | ret = mcp795_rtcc_write(dev, 0x01, data, sizeof(data)); | |
121 | ||
122 | if (ret) | |
123 | return ret; | |
124 | ||
125 | dev_dbg(dev, "Set mcp795: %04d-%02d-%02d %02d:%02d:%02d\n", | |
126 | tim->tm_year + 1900, tim->tm_mon, tim->tm_mday, | |
127 | tim->tm_hour, tim->tm_min, tim->tm_sec); | |
128 | ||
129 | return 0; | |
130 | } | |
131 | ||
132 | static int mcp795_read_time(struct device *dev, struct rtc_time *tim) | |
133 | { | |
134 | int ret; | |
135 | u8 data[7]; | |
136 | ||
137 | ret = mcp795_rtcc_read(dev, 0x01, data, sizeof(data)); | |
138 | ||
139 | if (ret) | |
140 | return ret; | |
141 | ||
bcf18d88 EB |
142 | tim->tm_sec = bcd2bin(data[0] & 0x7F); |
143 | tim->tm_min = bcd2bin(data[1] & 0x7F); | |
144 | tim->tm_hour = bcd2bin(data[2] & 0x3F); | |
145 | tim->tm_mday = bcd2bin(data[4] & 0x3F); | |
26eeefd5 | 146 | tim->tm_mon = bcd2bin(data[5] & 0x1F) - 1; |
bcf18d88 | 147 | tim->tm_year = bcd2bin(data[6]) + 100; /* Assume we are in 20xx */ |
1fcbe42c JG |
148 | |
149 | dev_dbg(dev, "Read from mcp795: %04d-%02d-%02d %02d:%02d:%02d\n", | |
150 | tim->tm_year + 1900, tim->tm_mon, tim->tm_mday, | |
151 | tim->tm_hour, tim->tm_min, tim->tm_sec); | |
152 | ||
153 | return rtc_valid_tm(tim); | |
154 | } | |
155 | ||
34c7b3ac | 156 | static const struct rtc_class_ops mcp795_rtc_ops = { |
1fcbe42c JG |
157 | .read_time = mcp795_read_time, |
158 | .set_time = mcp795_set_time | |
159 | }; | |
160 | ||
161 | static int mcp795_probe(struct spi_device *spi) | |
162 | { | |
163 | struct rtc_device *rtc; | |
164 | int ret; | |
165 | ||
166 | spi->mode = SPI_MODE_0; | |
167 | spi->bits_per_word = 8; | |
168 | ret = spi_setup(spi); | |
169 | if (ret) { | |
170 | dev_err(&spi->dev, "Unable to setup SPI\n"); | |
171 | return ret; | |
172 | } | |
173 | ||
174 | /* Start the oscillator */ | |
175 | mcp795_rtcc_set_bits(&spi->dev, 0x01, MCP795_ST_BIT, MCP795_ST_BIT); | |
176 | /* Clear the 12 hour mode flag*/ | |
177 | mcp795_rtcc_set_bits(&spi->dev, 0x03, MCP795_24_BIT, 0); | |
178 | ||
179 | rtc = devm_rtc_device_register(&spi->dev, "rtc-mcp795", | |
180 | &mcp795_rtc_ops, THIS_MODULE); | |
181 | if (IS_ERR(rtc)) | |
182 | return PTR_ERR(rtc); | |
183 | ||
184 | spi_set_drvdata(spi, rtc); | |
185 | ||
186 | return 0; | |
187 | } | |
188 | ||
7f8a5892 EB |
189 | #ifdef CONFIG_OF |
190 | static const struct of_device_id mcp795_of_match[] = { | |
191 | { .compatible = "maxim,mcp795" }, | |
192 | { } | |
193 | }; | |
194 | MODULE_DEVICE_TABLE(of, mcp795_of_match); | |
195 | #endif | |
196 | ||
1fcbe42c JG |
197 | static struct spi_driver mcp795_driver = { |
198 | .driver = { | |
199 | .name = "rtc-mcp795", | |
7f8a5892 | 200 | .of_match_table = of_match_ptr(mcp795_of_match), |
1fcbe42c JG |
201 | }, |
202 | .probe = mcp795_probe, | |
203 | }; | |
204 | ||
205 | module_spi_driver(mcp795_driver); | |
206 | ||
207 | MODULE_DESCRIPTION("MCP795 RTC SPI Driver"); | |
208 | MODULE_AUTHOR("Josef Gajdusek <atx@atx.name>"); | |
209 | MODULE_LICENSE("GPL"); | |
210 | MODULE_ALIAS("spi:mcp795"); |