[mirror_ubuntu-jammy-kernel.git] / drivers / rtc / rtc-mt6397.c

// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2014-2015 MediaTek Inc.
* Author: Tianping.Fang <tianping.fang@mediatek.com>
*/

#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/mfd/mt6397/core.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/rtc.h>
#include <linux/mfd/mt6397/rtc.h>
#include <linux/mod_devicetable.h>

static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
{
	int ret;
	u32 data;

	ret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1);
	if (ret < 0)
		return ret;

	ret = regmap_read_poll_timeout(rtc->regmap,
					rtc->addr_base + RTC_BBPU, data,
					!(data & RTC_BBPU_CBUSY),
					MTK_RTC_POLL_DELAY_US,
					MTK_RTC_POLL_TIMEOUT);
	if (ret < 0)
		dev_err(rtc->rtc_dev->dev.parent,
			"failed to write WRTGR: %d\n", ret);

	return ret;
}

static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
{
	struct mt6397_rtc *rtc = data;
	u32 irqsta, irqen;
	int ret;

	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
	if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
		rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
		irqen = irqsta & ~RTC_IRQ_EN_AL;
		mutex_lock(&rtc->lock);
		if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
				 irqen) == 0)
			mtk_rtc_write_trigger(rtc);
		mutex_unlock(&rtc->lock);

		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
			       struct rtc_time *tm, int *sec)
{
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	mutex_lock(&rtc->lock);
	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
			       data, RTC_OFFSET_COUNT);
	if (ret < 0)
		goto exit;

	tm->tm_sec = data[RTC_OFFSET_SEC];
	tm->tm_min = data[RTC_OFFSET_MIN];
	tm->tm_hour = data[RTC_OFFSET_HOUR];
	tm->tm_mday = data[RTC_OFFSET_DOM];
	tm->tm_mon = data[RTC_OFFSET_MTH];
	tm->tm_year = data[RTC_OFFSET_YEAR];

	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	time64_t time;
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	int days, sec, ret;

	do {
		ret = __mtk_rtc_read_time(rtc, tm, &sec);
		if (ret < 0)
			goto exit;
	} while (sec < tm->tm_sec);

	/* HW register use 7 bits to store year data, minus
	 * RTC_MIN_YEAR_OFFSET before write year data to register, and plus
	 * RTC_MIN_YEAR_OFFSET back after read year from register
	 */
	tm->tm_year += RTC_MIN_YEAR_OFFSET;

	/* HW register start mon from one, but tm_mon start from zero. */
	tm->tm_mon--;
	time = rtc_tm_to_time64(tm);

	/* rtc_tm_to_time64 covert Gregorian date to seconds since
	 * 01-01-1970 00:00:00, and this date is Thursday.
	 */
	days = div_s64(time, 86400);
	tm->tm_wday = (days + 4) % 7;

exit:
	return ret;
}

static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
	tm->tm_mon++;

	data[RTC_OFFSET_SEC] = tm->tm_sec;
	data[RTC_OFFSET_MIN] = tm->tm_min;
	data[RTC_OFFSET_HOUR] = tm->tm_hour;
	data[RTC_OFFSET_DOM] = tm->tm_mday;
	data[RTC_OFFSET_MTH] = tm->tm_mon;
	data[RTC_OFFSET_YEAR] = tm->tm_year;

	mutex_lock(&rtc->lock);
	ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
				data, RTC_OFFSET_COUNT);
	if (ret < 0)
		goto exit;

	/* Time register write to hardware after call trigger function */
	ret = mtk_rtc_write_trigger(rtc);

exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct rtc_time *tm = &alm->time;
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	u32 irqen, pdn2;
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	mutex_lock(&rtc->lock);
	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
	if (ret < 0)
		goto err_exit;
	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
	if (ret < 0)
		goto err_exit;

	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
			       data, RTC_OFFSET_COUNT);
	if (ret < 0)
		goto err_exit;

	alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
	alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
	mutex_unlock(&rtc->lock);

	tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK;
	tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK;
	tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK;
	tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK;
	tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK;
	tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK;

	tm->tm_year += RTC_MIN_YEAR_OFFSET;
	tm->tm_mon--;

	return 0;
err_exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
{
	struct rtc_time *tm = &alm->time;
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	int ret;
	u16 data[RTC_OFFSET_COUNT];

	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
	tm->tm_mon++;

	mutex_lock(&rtc->lock);
	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
			       data, RTC_OFFSET_COUNT);
	if (ret < 0)
		goto exit;

	data[RTC_OFFSET_SEC] = ((data[RTC_OFFSET_SEC] & ~(RTC_AL_SEC_MASK)) |
				(tm->tm_sec & RTC_AL_SEC_MASK));
	data[RTC_OFFSET_MIN] = ((data[RTC_OFFSET_MIN] & ~(RTC_AL_MIN_MASK)) |
				(tm->tm_min & RTC_AL_MIN_MASK));
	data[RTC_OFFSET_HOUR] = ((data[RTC_OFFSET_HOUR] & ~(RTC_AL_HOU_MASK)) |
				(tm->tm_hour & RTC_AL_HOU_MASK));
	data[RTC_OFFSET_DOM] = ((data[RTC_OFFSET_DOM] & ~(RTC_AL_DOM_MASK)) |
				(tm->tm_mday & RTC_AL_DOM_MASK));
	data[RTC_OFFSET_MTH] = ((data[RTC_OFFSET_MTH] & ~(RTC_AL_MTH_MASK)) |
				(tm->tm_mon & RTC_AL_MTH_MASK));
	data[RTC_OFFSET_YEAR] = ((data[RTC_OFFSET_YEAR] & ~(RTC_AL_YEA_MASK)) |
				(tm->tm_year & RTC_AL_YEA_MASK));

	if (alm->enabled) {
		ret = regmap_bulk_write(rtc->regmap,
					rtc->addr_base + RTC_AL_SEC,
					data, RTC_OFFSET_COUNT);
		if (ret < 0)
			goto exit;
		ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
				   RTC_AL_MASK_DOW);
		if (ret < 0)
			goto exit;
		ret = regmap_update_bits(rtc->regmap,
					 rtc->addr_base + RTC_IRQ_EN,
					 RTC_IRQ_EN_ONESHOT_AL,
					 RTC_IRQ_EN_ONESHOT_AL);
		if (ret < 0)
			goto exit;
	} else {
		ret = regmap_update_bits(rtc->regmap,
					 rtc->addr_base + RTC_IRQ_EN,
					 RTC_IRQ_EN_ONESHOT_AL, 0);
		if (ret < 0)
			goto exit;
	}

	/* All alarm time register write to hardware after calling
	 * mtk_rtc_write_trigger. This can avoid race condition if alarm
	 * occur happen during writing alarm time register.
	 */
	ret = mtk_rtc_write_trigger(rtc);
exit:
	mutex_unlock(&rtc->lock);
	return ret;
}

static const struct rtc_class_ops mtk_rtc_ops = {
	.read_time  = mtk_rtc_read_time,
	.set_time   = mtk_rtc_set_time,
	.read_alarm = mtk_rtc_read_alarm,
	.set_alarm  = mtk_rtc_set_alarm,
};

static int mtk_rtc_probe(struct platform_device *pdev)
{
	struct resource *res;
	struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
	struct mt6397_rtc *rtc;
	int ret;

	rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
	if (!rtc)
		return -ENOMEM;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	rtc->addr_base = res->start;

	rtc->data = of_device_get_match_data(&pdev->dev);

	rtc->irq = platform_get_irq(pdev, 0);
	if (rtc->irq < 0)
		return rtc->irq;

	rtc->regmap = mt6397_chip->regmap;
	mutex_init(&rtc->lock);

	platform_set_drvdata(pdev, rtc);

	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
	if (IS_ERR(rtc->rtc_dev))
		return PTR_ERR(rtc->rtc_dev);

	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
					mtk_rtc_irq_handler_thread,
					IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
					"mt6397-rtc", rtc);

	if (ret) {
		dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
			rtc->irq, ret);
		return ret;
	}

	device_init_wakeup(&pdev->dev, 1);

	rtc->rtc_dev->ops = &mtk_rtc_ops;

	return devm_rtc_register_device(rtc->rtc_dev);
}

#ifdef CONFIG_PM_SLEEP
static int mt6397_rtc_suspend(struct device *dev)
{
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);

	if (device_may_wakeup(dev))
		enable_irq_wake(rtc->irq);

	return 0;
}

static int mt6397_rtc_resume(struct device *dev)
{
	struct mt6397_rtc *rtc = dev_get_drvdata(dev);

	if (device_may_wakeup(dev))
		disable_irq_wake(rtc->irq);

	return 0;
}
#endif

static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
			mt6397_rtc_resume);

static const struct mtk_rtc_data mt6358_rtc_data = {
	.wrtgr = RTC_WRTGR_MT6358,
};

static const struct mtk_rtc_data mt6397_rtc_data = {
	.wrtgr = RTC_WRTGR_MT6397,
};

static const struct of_device_id mt6397_rtc_of_match[] = {
	{ .compatible = "mediatek,mt6323-rtc", .data = &mt6397_rtc_data },
	{ .compatible = "mediatek,mt6358-rtc", .data = &mt6358_rtc_data },
	{ .compatible = "mediatek,mt6397-rtc", .data = &mt6397_rtc_data },
	{ }
};
MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);

static struct platform_driver mtk_rtc_driver = {
	.driver = {
		.name = "mt6397-rtc",
		.of_match_table = mt6397_rtc_of_match,
		.pm = &mt6397_pm_ops,
	},
	.probe	= mtk_rtc_probe,
};

module_platform_driver(mtk_rtc_driver);

MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");
Commit	Line	Data
1802d0be	1	// SPDX-License-Identifier: GPL-2.0-only
fc297911 TF	2	/*
	3	* Copyright (c) 2014-2015 MediaTek Inc.
	4	* Author: Tianping.Fang <tianping.fang@mediatek.com>
fc297911 TF	5	*/
fc297911 TF	6
851b8714 JF	7	#include <linux/err.h>
	8	#include <linux/interrupt.h>
	9	#include <linux/mfd/mt6397/core.h>
fc297911	10	#include <linux/module.h>
851b8714	11	#include <linux/mutex.h>
29ee4009	12	#include <linux/of_device.h>
851b8714	13	#include <linux/platform_device.h>
fc297911 TF	14	#include <linux/regmap.h>
fc297911 TF	15	#include <linux/rtc.h>
c512995c	16	#include <linux/mfd/mt6397/rtc.h>
851b8714	17	#include <linux/mod_devicetable.h>
fc297911 TF	18
	19	static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
	20	{
fc297911 TF	21	int ret;
	22	u32 data;
	23
29ee4009	24	ret = regmap_write(rtc->regmap, rtc->addr_base + rtc->data->wrtgr, 1);
fc297911 TF	25	if (ret < 0)
	26	return ret;
	27
851b8714 JF	28	ret = regmap_read_poll_timeout(rtc->regmap,
	29	rtc->addr_base + RTC_BBPU, data,
	30	!(data & RTC_BBPU_CBUSY),
	31	MTK_RTC_POLL_DELAY_US,
	32	MTK_RTC_POLL_TIMEOUT);
	33	if (ret < 0)
770c03e6 FS	34	dev_err(rtc->rtc_dev->dev.parent,
770c03e6 FS	35	"failed to write WRTGR: %d\n", ret);
fc297911 TF	36
	37	return ret;
	38	}
	39
	40	static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
	41	{
	42	struct mt6397_rtc *rtc = data;
	43	u32 irqsta, irqen;
	44	int ret;
	45
	46	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
	47	if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
	48	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF \| RTC_AF);
	49	irqen = irqsta & ~RTC_IRQ_EN_AL;
	50	mutex_lock(&rtc->lock);
	51	if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
653997ee	52	irqen) == 0)
fc297911 TF	53	mtk_rtc_write_trigger(rtc);
	54	mutex_unlock(&rtc->lock);
	55
	56	return IRQ_HANDLED;
	57	}
	58
	59	return IRQ_NONE;
	60	}
	61
	62	static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
	63	struct rtc_time tm, int sec)
	64	{
	65	int ret;
	66	u16 data[RTC_OFFSET_COUNT];
	67
	68	mutex_lock(&rtc->lock);
	69	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
	70	data, RTC_OFFSET_COUNT);
	71	if (ret < 0)
	72	goto exit;
	73
	74	tm->tm_sec = data[RTC_OFFSET_SEC];
	75	tm->tm_min = data[RTC_OFFSET_MIN];
	76	tm->tm_hour = data[RTC_OFFSET_HOUR];
	77	tm->tm_mday = data[RTC_OFFSET_DOM];
	78	tm->tm_mon = data[RTC_OFFSET_MTH];
	79	tm->tm_year = data[RTC_OFFSET_YEAR];
	80
	81	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
	82	exit:
	83	mutex_unlock(&rtc->lock);
	84	return ret;
	85	}
	86
	87	static int mtk_rtc_read_time(struct device dev, struct rtc_time tm)
	88	{
	89	time64_t time;
	90	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
93939967	91	int days, sec, ret;
fc297911 TF	92
	93	do {
	94	ret = __mtk_rtc_read_time(rtc, tm, &sec);
	95	if (ret < 0)
	96	goto exit;
	97	} while (sec < tm->tm_sec);
	98
	99	/* HW register use 7 bits to store year data, minus
	100	* RTC_MIN_YEAR_OFFSET before write year data to register, and plus
	101	* RTC_MIN_YEAR_OFFSET back after read year from register
	102	*/
	103	tm->tm_year += RTC_MIN_YEAR_OFFSET;
	104
	105	/* HW register start mon from one, but tm_mon start from zero. */
	106	tm->tm_mon--;
	107	time = rtc_tm_to_time64(tm);
	108
	109	/* rtc_tm_to_time64 covert Gregorian date to seconds since
	110	* 01-01-1970 00:00:00, and this date is Thursday.
	111	*/
93939967 AB	112	days = div_s64(time, 86400);
93939967 AB	113	tm->tm_wday = (days + 4) % 7;
fc297911 TF	114
	115	exit:
	116	return ret;
	117	}
	118
	119	static int mtk_rtc_set_time(struct device dev, struct rtc_time tm)
	120	{
	121	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	122	int ret;
	123	u16 data[RTC_OFFSET_COUNT];
	124
	125	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
	126	tm->tm_mon++;
	127
	128	data[RTC_OFFSET_SEC] = tm->tm_sec;
	129	data[RTC_OFFSET_MIN] = tm->tm_min;
	130	data[RTC_OFFSET_HOUR] = tm->tm_hour;
	131	data[RTC_OFFSET_DOM] = tm->tm_mday;
	132	data[RTC_OFFSET_MTH] = tm->tm_mon;
	133	data[RTC_OFFSET_YEAR] = tm->tm_year;
	134
	135	mutex_lock(&rtc->lock);
	136	ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
	137	data, RTC_OFFSET_COUNT);
	138	if (ret < 0)
	139	goto exit;
	140
	141	/* Time register write to hardware after call trigger function */
	142	ret = mtk_rtc_write_trigger(rtc);
	143
	144	exit:
	145	mutex_unlock(&rtc->lock);
	146	return ret;
	147	}
	148
	149	static int mtk_rtc_read_alarm(struct device dev, struct rtc_wkalrm alm)
	150	{
	151	struct rtc_time *tm = &alm->time;
	152	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	153	u32 irqen, pdn2;
	154	int ret;
	155	u16 data[RTC_OFFSET_COUNT];
	156
	157	mutex_lock(&rtc->lock);
	158	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
	159	if (ret < 0)
	160	goto err_exit;
	161	ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
	162	if (ret < 0)
	163	goto err_exit;
	164
	165	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
	166	data, RTC_OFFSET_COUNT);
	167	if (ret < 0)
	168	goto err_exit;
	169
	170	alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
	171	alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
	172	mutex_unlock(&rtc->lock);
	173
653997ee RB	174	tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK;
	175	tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK;
	176	tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK;
	177	tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK;
	178	tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK;
	179	tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK;
fc297911 TF	180
	181	tm->tm_year += RTC_MIN_YEAR_OFFSET;
	182	tm->tm_mon--;
	183
	184	return 0;
	185	err_exit:
	186	mutex_unlock(&rtc->lock);
	187	return ret;
	188	}
	189
	190	static int mtk_rtc_set_alarm(struct device dev, struct rtc_wkalrm alm)
	191	{
	192	struct rtc_time *tm = &alm->time;
	193	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	194	int ret;
	195	u16 data[RTC_OFFSET_COUNT];
	196
	197	tm->tm_year -= RTC_MIN_YEAR_OFFSET;
	198	tm->tm_mon++;
	199
fc297911	200	mutex_lock(&rtc->lock);
653997ee RB	201	ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
	202	data, RTC_OFFSET_COUNT);
	203	if (ret < 0)
	204	goto exit;
	205
	206	data[RTC_OFFSET_SEC] = ((data[RTC_OFFSET_SEC] & ~(RTC_AL_SEC_MASK)) \|
	207	(tm->tm_sec & RTC_AL_SEC_MASK));
	208	data[RTC_OFFSET_MIN] = ((data[RTC_OFFSET_MIN] & ~(RTC_AL_MIN_MASK)) \|
	209	(tm->tm_min & RTC_AL_MIN_MASK));
	210	data[RTC_OFFSET_HOUR] = ((data[RTC_OFFSET_HOUR] & ~(RTC_AL_HOU_MASK)) \|
	211	(tm->tm_hour & RTC_AL_HOU_MASK));
	212	data[RTC_OFFSET_DOM] = ((data[RTC_OFFSET_DOM] & ~(RTC_AL_DOM_MASK)) \|
	213	(tm->tm_mday & RTC_AL_DOM_MASK));
	214	data[RTC_OFFSET_MTH] = ((data[RTC_OFFSET_MTH] & ~(RTC_AL_MTH_MASK)) \|
	215	(tm->tm_mon & RTC_AL_MTH_MASK));
	216	data[RTC_OFFSET_YEAR] = ((data[RTC_OFFSET_YEAR] & ~(RTC_AL_YEA_MASK)) \|
	217	(tm->tm_year & RTC_AL_YEA_MASK));
	218
fc297911 TF	219	if (alm->enabled) {
	220	ret = regmap_bulk_write(rtc->regmap,
	221	rtc->addr_base + RTC_AL_SEC,
	222	data, RTC_OFFSET_COUNT);
	223	if (ret < 0)
	224	goto exit;
	225	ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
	226	RTC_AL_MASK_DOW);
	227	if (ret < 0)
	228	goto exit;
	229	ret = regmap_update_bits(rtc->regmap,
	230	rtc->addr_base + RTC_IRQ_EN,
	231	RTC_IRQ_EN_ONESHOT_AL,
	232	RTC_IRQ_EN_ONESHOT_AL);
	233	if (ret < 0)
	234	goto exit;
	235	} else {
	236	ret = regmap_update_bits(rtc->regmap,
	237	rtc->addr_base + RTC_IRQ_EN,
	238	RTC_IRQ_EN_ONESHOT_AL, 0);
	239	if (ret < 0)
	240	goto exit;
	241	}
	242
	243	/* All alarm time register write to hardware after calling
	244	* mtk_rtc_write_trigger. This can avoid race condition if alarm
	245	* occur happen during writing alarm time register.
	246	*/
	247	ret = mtk_rtc_write_trigger(rtc);
	248	exit:
	249	mutex_unlock(&rtc->lock);
	250	return ret;
	251	}
	252
34c7b3ac	253	static const struct rtc_class_ops mtk_rtc_ops = {
fc297911 TF	254	.read_time = mtk_rtc_read_time,
	255	.set_time = mtk_rtc_set_time,
	256	.read_alarm = mtk_rtc_read_alarm,
	257	.set_alarm = mtk_rtc_set_alarm,
	258	};
	259
	260	static int mtk_rtc_probe(struct platform_device *pdev)
	261	{
	262	struct resource *res;
	263	struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
	264	struct mt6397_rtc *rtc;
	265	int ret;
	266
	267	rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
	268	if (!rtc)
	269	return -ENOMEM;
	270
	271	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	272	rtc->addr_base = res->start;
	273
29ee4009 RB	274	rtc->data = of_device_get_match_data(&pdev->dev);
29ee4009 RB	275
e695d3a0 CZ	276	rtc->irq = platform_get_irq(pdev, 0);
	277	if (rtc->irq < 0)
	278	return rtc->irq;
fc297911 TF	279
fc297911 TF	280	rtc->regmap = mt6397_chip->regmap;
fc297911 TF	281	mutex_init(&rtc->lock);
	282
	283	platform_set_drvdata(pdev, rtc);
	284
851b8714	285	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
babab2f8 AB	286	if (IS_ERR(rtc->rtc_dev))
	287	return PTR_ERR(rtc->rtc_dev);
	288
851b8714 JF	289	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
	290	mtk_rtc_irq_handler_thread,
	291	IRQF_ONESHOT \| IRQF_TRIGGER_HIGH,
	292	"mt6397-rtc", rtc);
	293
fc297911 TF	294	if (ret) {
	295	dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
	296	rtc->irq, ret);
24db953e	297	return ret;
fc297911 TF	298	}
fc297911 TF	299
baeca449 WNH	300	device_init_wakeup(&pdev->dev, 1);
baeca449 WNH	301
babab2f8 AB	302	rtc->rtc_dev->ops = &mtk_rtc_ops;
babab2f8 AB	303
fdcfd854	304	return devm_rtc_register_device(rtc->rtc_dev);
fc297911 TF	305	}
fc297911 TF	306
d7f9777d HC	307	#ifdef CONFIG_PM_SLEEP
	308	static int mt6397_rtc_suspend(struct device *dev)
	309	{
	310	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	311
	312	if (device_may_wakeup(dev))
	313	enable_irq_wake(rtc->irq);
	314
	315	return 0;
	316	}
	317
	318	static int mt6397_rtc_resume(struct device *dev)
	319	{
	320	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
	321
	322	if (device_may_wakeup(dev))
	323	disable_irq_wake(rtc->irq);
	324
	325	return 0;
	326	}
	327	#endif
	328
	329	static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
	330	mt6397_rtc_resume);
	331
29ee4009 RB	332	static const struct mtk_rtc_data mt6358_rtc_data = {
	333	.wrtgr = RTC_WRTGR_MT6358,
	334	};
	335
	336	static const struct mtk_rtc_data mt6397_rtc_data = {
	337	.wrtgr = RTC_WRTGR_MT6397,
	338	};
	339
fc297911	340	static const struct of_device_id mt6397_rtc_of_match[] = {
29ee4009 RB	341	{ .compatible = "mediatek,mt6323-rtc", .data = &mt6397_rtc_data },
	342	{ .compatible = "mediatek,mt6358-rtc", .data = &mt6358_rtc_data },
	343	{ .compatible = "mediatek,mt6397-rtc", .data = &mt6397_rtc_data },
fc297911 TF	344	{ }
fc297911 TF	345	};
73798d5c	346	MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
fc297911 TF	347
	348	static struct platform_driver mtk_rtc_driver = {
	349	.driver = {
	350	.name = "mt6397-rtc",
	351	.of_match_table = mt6397_rtc_of_match,
d7f9777d	352	.pm = &mt6397_pm_ops,
fc297911 TF	353	},
fc297911 TF	354	.probe = mtk_rtc_probe,
fc297911 TF	355	};
	356
	357	module_platform_driver(mtk_rtc_driver);
	358
	359	MODULE_LICENSE("GPL v2");
	360	MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
	361	MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");