]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - drivers/rtc/rtc-pl031.c
rtc: pl031: encapsulate per-vendor ops
[mirror_ubuntu-zesty-kernel.git] / drivers / rtc / rtc-pl031.c
CommitLineData
8ae6e163
DS
1/*
2 * drivers/rtc/rtc-pl031.c
3 *
4 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
5 *
6 * Author: Deepak Saxena <dsaxena@plexity.net>
7 *
8 * Copyright 2006 (c) MontaVista Software, Inc.
9 *
c72881e8
LW
10 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
11 * Copyright 2010 (c) ST-Ericsson AB
12 *
8ae6e163
DS
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
17 */
8ae6e163
DS
18#include <linux/module.h>
19#include <linux/rtc.h>
20#include <linux/init.h>
8ae6e163 21#include <linux/interrupt.h>
8ae6e163 22#include <linux/amba/bus.h>
2dba8518 23#include <linux/io.h>
c72881e8
LW
24#include <linux/bcd.h>
25#include <linux/delay.h>
5a0e3ad6 26#include <linux/slab.h>
8ae6e163
DS
27
28/*
29 * Register definitions
30 */
31#define RTC_DR 0x00 /* Data read register */
32#define RTC_MR 0x04 /* Match register */
33#define RTC_LR 0x08 /* Data load register */
34#define RTC_CR 0x0c /* Control register */
35#define RTC_IMSC 0x10 /* Interrupt mask and set register */
36#define RTC_RIS 0x14 /* Raw interrupt status register */
37#define RTC_MIS 0x18 /* Masked interrupt status register */
38#define RTC_ICR 0x1c /* Interrupt clear register */
c72881e8
LW
39/* ST variants have additional timer functionality */
40#define RTC_TDR 0x20 /* Timer data read register */
41#define RTC_TLR 0x24 /* Timer data load register */
42#define RTC_TCR 0x28 /* Timer control register */
43#define RTC_YDR 0x30 /* Year data read register */
44#define RTC_YMR 0x34 /* Year match register */
45#define RTC_YLR 0x38 /* Year data load register */
46
47#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
48
49#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
50
51/* Common bit definitions for Interrupt status and control registers */
52#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
53#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
54
55/* Common bit definations for ST v2 for reading/writing time */
56#define RTC_SEC_SHIFT 0
57#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
58#define RTC_MIN_SHIFT 6
59#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
60#define RTC_HOUR_SHIFT 12
61#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
62#define RTC_WDAY_SHIFT 17
63#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
64#define RTC_MDAY_SHIFT 20
65#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
66#define RTC_MON_SHIFT 25
67#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
68
69#define RTC_TIMER_FREQ 32768
8ae6e163 70
aff05ed5
LW
71/**
72 * struct pl031_vendor_data - per-vendor variations
73 * @ops: the vendor-specific operations used on this silicon version
74 */
75struct pl031_vendor_data {
76 struct rtc_class_ops ops;
77};
78
8ae6e163 79struct pl031_local {
aff05ed5 80 struct pl031_vendor_data *vendor;
8ae6e163
DS
81 struct rtc_device *rtc;
82 void __iomem *base;
c72881e8
LW
83 u8 hw_designer;
84 u8 hw_revision:4;
8ae6e163
DS
85};
86
c72881e8
LW
87static int pl031_alarm_irq_enable(struct device *dev,
88 unsigned int enabled)
89{
90 struct pl031_local *ldata = dev_get_drvdata(dev);
91 unsigned long imsc;
92
93 /* Clear any pending alarm interrupts. */
94 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
95
96 imsc = readl(ldata->base + RTC_IMSC);
97
98 if (enabled == 1)
99 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
100 else
101 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
102
103 return 0;
104}
105
106/*
107 * Convert Gregorian date to ST v2 RTC format.
108 */
109static int pl031_stv2_tm_to_time(struct device *dev,
110 struct rtc_time *tm, unsigned long *st_time,
111 unsigned long *bcd_year)
112{
113 int year = tm->tm_year + 1900;
114 int wday = tm->tm_wday;
115
116 /* wday masking is not working in hardware so wday must be valid */
117 if (wday < -1 || wday > 6) {
118 dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
119 return -EINVAL;
120 } else if (wday == -1) {
121 /* wday is not provided, calculate it here */
122 unsigned long time;
123 struct rtc_time calc_tm;
124
125 rtc_tm_to_time(tm, &time);
126 rtc_time_to_tm(time, &calc_tm);
127 wday = calc_tm.tm_wday;
128 }
129
130 *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
131
132 *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
133 | (tm->tm_mday << RTC_MDAY_SHIFT)
134 | ((wday + 1) << RTC_WDAY_SHIFT)
135 | (tm->tm_hour << RTC_HOUR_SHIFT)
136 | (tm->tm_min << RTC_MIN_SHIFT)
137 | (tm->tm_sec << RTC_SEC_SHIFT);
138
139 return 0;
140}
141
142/*
143 * Convert ST v2 RTC format to Gregorian date.
144 */
145static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
146 struct rtc_time *tm)
147{
148 tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
149 tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
150 tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
151 tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
152 tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
153 tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
154 tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
155
156 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
157 tm->tm_year -= 1900;
158
159 return 0;
160}
161
162static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
163{
164 struct pl031_local *ldata = dev_get_drvdata(dev);
165
166 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
167 readl(ldata->base + RTC_YDR), tm);
168
169 return 0;
170}
171
172static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
173{
174 unsigned long time;
175 unsigned long bcd_year;
176 struct pl031_local *ldata = dev_get_drvdata(dev);
177 int ret;
178
179 ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
180 if (ret == 0) {
181 writel(bcd_year, ldata->base + RTC_YLR);
182 writel(time, ldata->base + RTC_LR);
183 }
184
185 return ret;
186}
187
188static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
8ae6e163 189{
c72881e8
LW
190 struct pl031_local *ldata = dev_get_drvdata(dev);
191 int ret;
8ae6e163 192
c72881e8
LW
193 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
194 readl(ldata->base + RTC_YMR), &alarm->time);
8ae6e163 195
c72881e8
LW
196 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
197 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
198
199 return ret;
8ae6e163
DS
200}
201
c72881e8 202static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
8ae6e163
DS
203{
204 struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8
LW
205 unsigned long time;
206 unsigned long bcd_year;
207 int ret;
208
209 /* At the moment, we can only deal with non-wildcarded alarm times. */
210 ret = rtc_valid_tm(&alarm->time);
211 if (ret == 0) {
212 ret = pl031_stv2_tm_to_time(dev, &alarm->time,
213 &time, &bcd_year);
214 if (ret == 0) {
215 writel(bcd_year, ldata->base + RTC_YMR);
216 writel(time, ldata->base + RTC_MR);
217
218 pl031_alarm_irq_enable(dev, alarm->enabled);
219 }
220 }
221
222 return ret;
223}
224
225static irqreturn_t pl031_interrupt(int irq, void *dev_id)
226{
227 struct pl031_local *ldata = dev_id;
228 unsigned long rtcmis;
229 unsigned long events = 0;
230
231 rtcmis = readl(ldata->base + RTC_MIS);
ac2dee59
RK
232 if (rtcmis & RTC_BIT_AI) {
233 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
234 events |= (RTC_AF | RTC_IRQF);
c72881e8 235 rtc_update_irq(ldata->rtc, 1, events);
8ae6e163 236
c72881e8 237 return IRQ_HANDLED;
8ae6e163
DS
238 }
239
c72881e8 240 return IRQ_NONE;
8ae6e163
DS
241}
242
243static int pl031_read_time(struct device *dev, struct rtc_time *tm)
244{
245 struct pl031_local *ldata = dev_get_drvdata(dev);
246
2934d6a8 247 rtc_time_to_tm(readl(ldata->base + RTC_DR), tm);
8ae6e163
DS
248
249 return 0;
250}
251
252static int pl031_set_time(struct device *dev, struct rtc_time *tm)
253{
254 unsigned long time;
255 struct pl031_local *ldata = dev_get_drvdata(dev);
c72881e8 256 int ret;
8ae6e163 257
c72881e8 258 ret = rtc_tm_to_time(tm, &time);
8ae6e163 259
c72881e8
LW
260 if (ret == 0)
261 writel(time, ldata->base + RTC_LR);
262
263 return ret;
8ae6e163
DS
264}
265
266static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
267{
268 struct pl031_local *ldata = dev_get_drvdata(dev);
269
2934d6a8 270 rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
c72881e8
LW
271
272 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
273 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
8ae6e163
DS
274
275 return 0;
276}
277
278static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
279{
280 struct pl031_local *ldata = dev_get_drvdata(dev);
281 unsigned long time;
c72881e8
LW
282 int ret;
283
284 /* At the moment, we can only deal with non-wildcarded alarm times. */
285 ret = rtc_valid_tm(&alarm->time);
286 if (ret == 0) {
287 ret = rtc_tm_to_time(&alarm->time, &time);
288 if (ret == 0) {
289 writel(time, ldata->base + RTC_MR);
290 pl031_alarm_irq_enable(dev, alarm->enabled);
291 }
292 }
293
294 return ret;
295}
296
8ae6e163
DS
297static int pl031_remove(struct amba_device *adev)
298{
299 struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
300
2dba8518
RK
301 amba_set_drvdata(adev, NULL);
302 free_irq(adev->irq[0], ldata->rtc);
303 rtc_device_unregister(ldata->rtc);
304 iounmap(ldata->base);
305 kfree(ldata);
306 amba_release_regions(adev);
8ae6e163
DS
307
308 return 0;
309}
310
aa25afad 311static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
8ae6e163
DS
312{
313 int ret;
314 struct pl031_local *ldata;
aff05ed5
LW
315 struct pl031_vendor_data *vendor = id->data;
316 struct rtc_class_ops *ops = &vendor->ops;
c0a5f4a0 317 unsigned long time;
8ae6e163 318
2dba8518
RK
319 ret = amba_request_regions(adev, NULL);
320 if (ret)
321 goto err_req;
8ae6e163 322
c72881e8 323 ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
8ae6e163
DS
324 if (!ldata) {
325 ret = -ENOMEM;
326 goto out;
327 }
aff05ed5 328 ldata->vendor = vendor;
8ae6e163 329
dc890c2d 330 ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
c72881e8 331
8ae6e163
DS
332 if (!ldata->base) {
333 ret = -ENOMEM;
334 goto out_no_remap;
335 }
336
2dba8518
RK
337 amba_set_drvdata(adev, ldata);
338
c72881e8
LW
339 ldata->hw_designer = amba_manf(adev);
340 ldata->hw_revision = amba_rev(adev);
341
342 dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer);
343 dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision);
8ae6e163 344
c72881e8 345 /* Enable the clockwatch on ST Variants */
2f397216 346 if (ldata->hw_designer == AMBA_VENDOR_ST)
c72881e8
LW
347 writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
348 ldata->base + RTC_CR);
349
c0a5f4a0
RK
350 /*
351 * On ST PL031 variants, the RTC reset value does not provide correct
352 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
353 */
354 if (ldata->hw_designer == AMBA_VENDOR_ST) {
355 if (readl(ldata->base + RTC_YDR) == 0x2000) {
356 time = readl(ldata->base + RTC_DR);
357 if ((time &
358 (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
359 == 0x02120000) {
360 time = time | (0x7 << RTC_WDAY_SHIFT);
361 writel(0x2000, ldata->base + RTC_YLR);
362 writel(time, ldata->base + RTC_LR);
363 }
364 }
365 }
366
c72881e8
LW
367 ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
368 THIS_MODULE);
8ae6e163
DS
369 if (IS_ERR(ldata->rtc)) {
370 ret = PTR_ERR(ldata->rtc);
371 goto out_no_rtc;
372 }
373
c72881e8 374 if (request_irq(adev->irq[0], pl031_interrupt,
2f6e5f94 375 0, "rtc-pl031", ldata)) {
c72881e8
LW
376 ret = -EIO;
377 goto out_no_irq;
378 }
379
8ae6e163
DS
380 return 0;
381
8ae6e163 382out_no_irq:
c72881e8
LW
383 rtc_device_unregister(ldata->rtc);
384out_no_rtc:
8ae6e163 385 iounmap(ldata->base);
2dba8518 386 amba_set_drvdata(adev, NULL);
8ae6e163 387out_no_remap:
8ae6e163
DS
388 kfree(ldata);
389out:
2dba8518
RK
390 amba_release_regions(adev);
391err_req:
c72881e8 392
8ae6e163
DS
393 return ret;
394}
395
c72881e8 396/* Operations for the original ARM version */
aff05ed5
LW
397static struct pl031_vendor_data arm_pl031 = {
398 .ops = {
399 .read_time = pl031_read_time,
400 .set_time = pl031_set_time,
401 .read_alarm = pl031_read_alarm,
402 .set_alarm = pl031_set_alarm,
403 .alarm_irq_enable = pl031_alarm_irq_enable,
404 },
c72881e8
LW
405};
406
407/* The First ST derivative */
aff05ed5
LW
408static struct pl031_vendor_data stv1_pl031 = {
409 .ops = {
410 .read_time = pl031_read_time,
411 .set_time = pl031_set_time,
412 .read_alarm = pl031_read_alarm,
413 .set_alarm = pl031_set_alarm,
414 .alarm_irq_enable = pl031_alarm_irq_enable,
415 },
c72881e8
LW
416};
417
418/* And the second ST derivative */
aff05ed5
LW
419static struct pl031_vendor_data stv2_pl031 = {
420 .ops = {
421 .read_time = pl031_stv2_read_time,
422 .set_time = pl031_stv2_set_time,
423 .read_alarm = pl031_stv2_read_alarm,
424 .set_alarm = pl031_stv2_set_alarm,
425 .alarm_irq_enable = pl031_alarm_irq_enable,
426 },
c72881e8
LW
427};
428
2c39c9e1 429static struct amba_id pl031_ids[] = {
8ae6e163 430 {
2934d6a8
LW
431 .id = 0x00041031,
432 .mask = 0x000fffff,
aff05ed5 433 .data = &arm_pl031,
c72881e8
LW
434 },
435 /* ST Micro variants */
436 {
437 .id = 0x00180031,
438 .mask = 0x00ffffff,
aff05ed5 439 .data = &stv1_pl031,
c72881e8
LW
440 },
441 {
442 .id = 0x00280031,
443 .mask = 0x00ffffff,
aff05ed5 444 .data = &stv2_pl031,
2934d6a8 445 },
8ae6e163
DS
446 {0, 0},
447};
448
f5feac2a
DM
449MODULE_DEVICE_TABLE(amba, pl031_ids);
450
8ae6e163
DS
451static struct amba_driver pl031_driver = {
452 .drv = {
453 .name = "rtc-pl031",
454 },
455 .id_table = pl031_ids,
456 .probe = pl031_probe,
457 .remove = pl031_remove,
458};
459
9e5ed094 460module_amba_driver(pl031_driver);
8ae6e163
DS
461
462MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");
463MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
464MODULE_LICENSE("GPL");