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Commit | Line | Data |
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7520b94d | 1 | /* |
37fc5e2c | 2 | * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs |
7520b94d AZ |
3 | * |
4 | * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> | |
5 | * Copyright (C) 2006 Tower Technologies | |
0053dc0d | 6 | * Copyright (C) 2008 Paul Mundt |
7520b94d AZ |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/i2c.h> | |
14 | #include <linux/rtc.h> | |
15 | #include <linux/bcd.h> | |
5a0e3ad6 | 16 | #include <linux/slab.h> |
2113852b | 17 | #include <linux/module.h> |
ff764b88 | 18 | #include <linux/of_device.h> |
7520b94d | 19 | |
cb26b572 DB |
20 | /* |
21 | * Ricoh has a family of I2C based RTCs, which differ only slightly from | |
22 | * each other. Differences center on pinout (e.g. how many interrupts, | |
23 | * output clock, etc) and how the control registers are used. The '372 | |
24 | * is significant only because that's the one this driver first supported. | |
25 | */ | |
7520b94d AZ |
26 | #define RS5C372_REG_SECS 0 |
27 | #define RS5C372_REG_MINS 1 | |
28 | #define RS5C372_REG_HOURS 2 | |
29 | #define RS5C372_REG_WDAY 3 | |
30 | #define RS5C372_REG_DAY 4 | |
31 | #define RS5C372_REG_MONTH 5 | |
32 | #define RS5C372_REG_YEAR 6 | |
33 | #define RS5C372_REG_TRIM 7 | |
cb26b572 DB |
34 | # define RS5C372_TRIM_XSL 0x80 |
35 | # define RS5C372_TRIM_MASK 0x7F | |
36 | ||
37 | #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ | |
38 | #define RS5C_REG_ALARM_A_HOURS 9 | |
39 | #define RS5C_REG_ALARM_A_WDAY 10 | |
40 | ||
41 | #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ | |
42 | #define RS5C_REG_ALARM_B_HOURS 12 | |
43 | #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ | |
44 | ||
45 | #define RS5C_REG_CTRL1 14 | |
46 | # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ | |
47 | # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ | |
48 | # define RV5C387_CTRL1_24 (1 << 5) | |
49 | # define RS5C372A_CTRL1_SL1 (1 << 5) | |
50 | # define RS5C_CTRL1_CT_MASK (7 << 0) | |
51 | # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ | |
52 | # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ | |
53 | #define RS5C_REG_CTRL2 15 | |
54 | # define RS5C372_CTRL2_24 (1 << 5) | |
37fc5e2c PM |
55 | # define R2025_CTRL2_XST (1 << 5) |
56 | # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ | |
cb26b572 DB |
57 | # define RS5C_CTRL2_CTFG (1 << 2) |
58 | # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ | |
59 | # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ | |
60 | ||
61 | ||
62 | /* to read (style 1) or write registers starting at R */ | |
63 | #define RS5C_ADDR(R) (((R) << 4) | 0) | |
64 | ||
65 | ||
66 | enum rtc_type { | |
67 | rtc_undef = 0, | |
37fc5e2c | 68 | rtc_r2025sd, |
550fcb8f | 69 | rtc_r2221tl, |
cb26b572 DB |
70 | rtc_rs5c372a, |
71 | rtc_rs5c372b, | |
72 | rtc_rv5c386, | |
73 | rtc_rv5c387a, | |
74 | }; | |
7520b94d | 75 | |
3760f736 | 76 | static const struct i2c_device_id rs5c372_id[] = { |
37fc5e2c | 77 | { "r2025sd", rtc_r2025sd }, |
550fcb8f | 78 | { "r2221tl", rtc_r2221tl }, |
3760f736 JD |
79 | { "rs5c372a", rtc_rs5c372a }, |
80 | { "rs5c372b", rtc_rs5c372b }, | |
81 | { "rv5c386", rtc_rv5c386 }, | |
82 | { "rv5c387a", rtc_rv5c387a }, | |
83 | { } | |
84 | }; | |
85 | MODULE_DEVICE_TABLE(i2c, rs5c372_id); | |
86 | ||
ff764b88 JMC |
87 | static const struct of_device_id rs5c372_of_match[] = { |
88 | { | |
89 | .compatible = "ricoh,r2025sd", | |
90 | .data = (void *)rtc_r2025sd | |
91 | }, | |
92 | { | |
93 | .compatible = "ricoh,r2221tl", | |
94 | .data = (void *)rtc_r2221tl | |
95 | }, | |
96 | { | |
97 | .compatible = "ricoh,rs5c372a", | |
98 | .data = (void *)rtc_rs5c372a | |
99 | }, | |
100 | { | |
101 | .compatible = "ricoh,rs5c372b", | |
102 | .data = (void *)rtc_rs5c372b | |
103 | }, | |
104 | { | |
105 | .compatible = "ricoh,rv5c386", | |
106 | .data = (void *)rtc_rv5c386 | |
107 | }, | |
108 | { | |
109 | .compatible = "ricoh,rv5c387a", | |
110 | .data = (void *)rtc_rv5c387a | |
111 | }, | |
112 | { } | |
113 | }; | |
114 | MODULE_DEVICE_TABLE(of, rs5c372_of_match); | |
115 | ||
cb26b572 DB |
116 | /* REVISIT: this assumes that: |
117 | * - we're in the 21st century, so it's safe to ignore the century | |
118 | * bit for rv5c38[67] (REG_MONTH bit 7); | |
119 | * - we should use ALARM_A not ALARM_B (may be wrong on some boards) | |
120 | */ | |
121 | struct rs5c372 { | |
122 | struct i2c_client *client; | |
123 | struct rtc_device *rtc; | |
124 | enum rtc_type type; | |
125 | unsigned time24:1; | |
126 | unsigned has_irq:1; | |
0053dc0d | 127 | unsigned smbus:1; |
cb26b572 DB |
128 | char buf[17]; |
129 | char *regs; | |
cb26b572 | 130 | }; |
7520b94d | 131 | |
cb26b572 DB |
132 | static int rs5c_get_regs(struct rs5c372 *rs5c) |
133 | { | |
134 | struct i2c_client *client = rs5c->client; | |
135 | struct i2c_msg msgs[] = { | |
a606757f S |
136 | { |
137 | .addr = client->addr, | |
138 | .flags = I2C_M_RD, | |
139 | .len = sizeof(rs5c->buf), | |
140 | .buf = rs5c->buf | |
141 | }, | |
cb26b572 DB |
142 | }; |
143 | ||
144 | /* This implements the third reading method from the datasheet, using | |
145 | * an internal address that's reset after each transaction (by STOP) | |
146 | * to 0x0f ... so we read extra registers, and skip the first one. | |
147 | * | |
148 | * The first method doesn't work with the iop3xx adapter driver, on at | |
149 | * least 80219 chips; this works around that bug. | |
0053dc0d PM |
150 | * |
151 | * The third method on the other hand doesn't work for the SMBus-only | |
152 | * configurations, so we use the the first method there, stripping off | |
153 | * the extra register in the process. | |
cb26b572 | 154 | */ |
0053dc0d PM |
155 | if (rs5c->smbus) { |
156 | int addr = RS5C_ADDR(RS5C372_REG_SECS); | |
157 | int size = sizeof(rs5c->buf) - 1; | |
158 | ||
159 | if (i2c_smbus_read_i2c_block_data(client, addr, size, | |
160 | rs5c->buf + 1) != size) { | |
161 | dev_warn(&client->dev, "can't read registers\n"); | |
162 | return -EIO; | |
163 | } | |
164 | } else { | |
165 | if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { | |
166 | dev_warn(&client->dev, "can't read registers\n"); | |
167 | return -EIO; | |
168 | } | |
cb26b572 | 169 | } |
7520b94d | 170 | |
cb26b572 | 171 | dev_dbg(&client->dev, |
b513e522 AS |
172 | "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n", |
173 | rs5c->regs + 0, rs5c->regs[3], | |
174 | rs5c->regs + 4, rs5c->regs[7], | |
175 | rs5c->regs + 8, rs5c->regs + 11, | |
176 | rs5c->regs[14], rs5c->regs[15]); | |
7520b94d | 177 | |
cb26b572 DB |
178 | return 0; |
179 | } | |
c6f24f99 | 180 | |
cb26b572 DB |
181 | static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) |
182 | { | |
183 | unsigned hour; | |
7520b94d | 184 | |
cb26b572 | 185 | if (rs5c->time24) |
fe20ba70 | 186 | return bcd2bin(reg & 0x3f); |
cb26b572 | 187 | |
fe20ba70 | 188 | hour = bcd2bin(reg & 0x1f); |
cb26b572 DB |
189 | if (hour == 12) |
190 | hour = 0; | |
191 | if (reg & 0x20) | |
192 | hour += 12; | |
193 | return hour; | |
194 | } | |
195 | ||
196 | static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) | |
7520b94d | 197 | { |
cb26b572 | 198 | if (rs5c->time24) |
fe20ba70 | 199 | return bin2bcd(hour); |
cb26b572 DB |
200 | |
201 | if (hour > 12) | |
fe20ba70 | 202 | return 0x20 | bin2bcd(hour - 12); |
cb26b572 | 203 | if (hour == 12) |
fe20ba70 | 204 | return 0x20 | bin2bcd(12); |
cb26b572 | 205 | if (hour == 0) |
fe20ba70 AB |
206 | return bin2bcd(12); |
207 | return bin2bcd(hour); | |
cb26b572 | 208 | } |
7520b94d | 209 | |
cb26b572 DB |
210 | static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm) |
211 | { | |
212 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
213 | int status = rs5c_get_regs(rs5c); | |
c6f24f99 | 214 | |
cb26b572 DB |
215 | if (status < 0) |
216 | return status; | |
7520b94d | 217 | |
fe20ba70 AB |
218 | tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); |
219 | tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); | |
cb26b572 | 220 | tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); |
7520b94d | 221 | |
fe20ba70 AB |
222 | tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); |
223 | tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); | |
7520b94d AZ |
224 | |
225 | /* tm->tm_mon is zero-based */ | |
fe20ba70 | 226 | tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; |
7520b94d AZ |
227 | |
228 | /* year is 1900 + tm->tm_year */ | |
fe20ba70 | 229 | tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; |
7520b94d AZ |
230 | |
231 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " | |
232 | "mday=%d, mon=%d, year=%d, wday=%d\n", | |
2a4e2b87 | 233 | __func__, |
7520b94d AZ |
234 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
235 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); | |
236 | ||
cb26b572 DB |
237 | /* rtc might need initialization */ |
238 | return rtc_valid_tm(tm); | |
7520b94d AZ |
239 | } |
240 | ||
241 | static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
242 | { | |
cb26b572 | 243 | struct rs5c372 *rs5c = i2c_get_clientdata(client); |
11836494 | 244 | unsigned char buf[7]; |
0053dc0d | 245 | int addr; |
7520b94d | 246 | |
cb26b572 | 247 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " |
7520b94d | 248 | "mday=%d, mon=%d, year=%d, wday=%d\n", |
2a4e2b87 | 249 | __func__, |
cb26b572 | 250 | tm->tm_sec, tm->tm_min, tm->tm_hour, |
7520b94d AZ |
251 | tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
252 | ||
0053dc0d | 253 | addr = RS5C_ADDR(RS5C372_REG_SECS); |
fe20ba70 AB |
254 | buf[0] = bin2bcd(tm->tm_sec); |
255 | buf[1] = bin2bcd(tm->tm_min); | |
0053dc0d | 256 | buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); |
fe20ba70 AB |
257 | buf[3] = bin2bcd(tm->tm_wday); |
258 | buf[4] = bin2bcd(tm->tm_mday); | |
259 | buf[5] = bin2bcd(tm->tm_mon + 1); | |
260 | buf[6] = bin2bcd(tm->tm_year - 100); | |
7520b94d | 261 | |
0053dc0d | 262 | if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { |
2a4e2b87 | 263 | dev_err(&client->dev, "%s: write error\n", __func__); |
7520b94d AZ |
264 | return -EIO; |
265 | } | |
266 | ||
267 | return 0; | |
268 | } | |
269 | ||
6fca3fc5 | 270 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC) |
cb26b572 DB |
271 | #define NEED_TRIM |
272 | #endif | |
273 | ||
6fca3fc5 | 274 | #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS) |
cb26b572 DB |
275 | #define NEED_TRIM |
276 | #endif | |
277 | ||
278 | #ifdef NEED_TRIM | |
7520b94d AZ |
279 | static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) |
280 | { | |
c6f24f99 | 281 | struct rs5c372 *rs5c372 = i2c_get_clientdata(client); |
cb26b572 | 282 | u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; |
7520b94d | 283 | |
7520b94d | 284 | if (osc) |
c6f24f99 | 285 | *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; |
7520b94d | 286 | |
17ad78e5 | 287 | if (trim) { |
2a4e2b87 | 288 | dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); |
cb26b572 DB |
289 | tmp &= RS5C372_TRIM_MASK; |
290 | if (tmp & 0x3e) { | |
291 | int t = tmp & 0x3f; | |
292 | ||
293 | if (tmp & 0x40) | |
294 | t = (~t | (s8)0xc0) + 1; | |
295 | else | |
296 | t = t - 1; | |
297 | ||
298 | tmp = t * 2; | |
299 | } else | |
300 | tmp = 0; | |
301 | *trim = tmp; | |
17ad78e5 | 302 | } |
7520b94d AZ |
303 | |
304 | return 0; | |
305 | } | |
cb26b572 | 306 | #endif |
7520b94d AZ |
307 | |
308 | static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
309 | { | |
310 | return rs5c372_get_datetime(to_i2c_client(dev), tm); | |
311 | } | |
312 | ||
313 | static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
314 | { | |
315 | return rs5c372_set_datetime(to_i2c_client(dev), tm); | |
316 | } | |
317 | ||
cb26b572 | 318 | |
16380c15 JS |
319 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
320 | { | |
321 | struct i2c_client *client = to_i2c_client(dev); | |
322 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
323 | unsigned char buf; | |
324 | int status, addr; | |
325 | ||
326 | buf = rs5c->regs[RS5C_REG_CTRL1]; | |
327 | ||
328 | if (!rs5c->has_irq) | |
329 | return -EINVAL; | |
330 | ||
331 | status = rs5c_get_regs(rs5c); | |
332 | if (status < 0) | |
333 | return status; | |
334 | ||
335 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
336 | if (enabled) | |
337 | buf |= RS5C_CTRL1_AALE; | |
338 | else | |
339 | buf &= ~RS5C_CTRL1_AALE; | |
340 | ||
341 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { | |
0c6516ea | 342 | dev_warn(dev, "can't update alarm\n"); |
16380c15 JS |
343 | status = -EIO; |
344 | } else | |
345 | rs5c->regs[RS5C_REG_CTRL1] = buf; | |
346 | ||
347 | return status; | |
348 | } | |
349 | ||
350 | ||
cb26b572 DB |
351 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
352 | * which only exposes a polled programming interface; and since | |
353 | * these calls map directly to those EFI requests; we don't demand | |
354 | * we have an IRQ for this chip when we go through this API. | |
355 | * | |
356 | * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs | |
357 | * though, managed through RTC_AIE_{ON,OFF} requests. | |
358 | */ | |
359 | ||
360 | static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) | |
361 | { | |
362 | struct i2c_client *client = to_i2c_client(dev); | |
363 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
364 | int status; | |
365 | ||
366 | status = rs5c_get_regs(rs5c); | |
367 | if (status < 0) | |
368 | return status; | |
369 | ||
370 | /* report alarm time */ | |
371 | t->time.tm_sec = 0; | |
fe20ba70 | 372 | t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); |
cb26b572 | 373 | t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); |
cb26b572 DB |
374 | |
375 | /* ... and status */ | |
376 | t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); | |
377 | t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); | |
378 | ||
379 | return 0; | |
380 | } | |
381 | ||
382 | static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |
383 | { | |
384 | struct i2c_client *client = to_i2c_client(dev); | |
385 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | |
0053dc0d PM |
386 | int status, addr, i; |
387 | unsigned char buf[3]; | |
cb26b572 DB |
388 | |
389 | /* only handle up to 24 hours in the future, like RTC_ALM_SET */ | |
390 | if (t->time.tm_mday != -1 | |
391 | || t->time.tm_mon != -1 | |
392 | || t->time.tm_year != -1) | |
393 | return -EINVAL; | |
394 | ||
395 | /* REVISIT: round up tm_sec */ | |
396 | ||
397 | /* if needed, disable irq (clears pending status) */ | |
398 | status = rs5c_get_regs(rs5c); | |
399 | if (status < 0) | |
400 | return status; | |
401 | if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { | |
0053dc0d PM |
402 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
403 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; | |
404 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { | |
0c6516ea | 405 | dev_dbg(dev, "can't disable alarm\n"); |
cb26b572 DB |
406 | return -EIO; |
407 | } | |
0053dc0d | 408 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
409 | } |
410 | ||
411 | /* set alarm */ | |
fe20ba70 | 412 | buf[0] = bin2bcd(t->time.tm_min); |
0053dc0d PM |
413 | buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); |
414 | buf[2] = 0x7f; /* any/all days */ | |
415 | ||
416 | for (i = 0; i < sizeof(buf); i++) { | |
417 | addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); | |
418 | if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { | |
0c6516ea | 419 | dev_dbg(dev, "can't set alarm time\n"); |
0053dc0d PM |
420 | return -EIO; |
421 | } | |
cb26b572 DB |
422 | } |
423 | ||
424 | /* ... and maybe enable its irq */ | |
425 | if (t->enabled) { | |
0053dc0d PM |
426 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
427 | buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; | |
428 | if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) | |
0c6516ea | 429 | dev_warn(dev, "can't enable alarm\n"); |
0053dc0d | 430 | rs5c->regs[RS5C_REG_CTRL1] = buf[0]; |
cb26b572 DB |
431 | } |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
6fca3fc5 | 436 | #if IS_ENABLED(CONFIG_RTC_INTF_PROC) |
cb26b572 | 437 | |
7520b94d AZ |
438 | static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) |
439 | { | |
440 | int err, osc, trim; | |
441 | ||
adfb4341 AZ |
442 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); |
443 | if (err == 0) { | |
cb26b572 DB |
444 | seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", |
445 | osc / 1000, osc % 1000); | |
446 | seq_printf(seq, "trim\t\t: %d\n", trim); | |
7520b94d AZ |
447 | } |
448 | ||
449 | return 0; | |
450 | } | |
451 | ||
cb26b572 DB |
452 | #else |
453 | #define rs5c372_rtc_proc NULL | |
454 | #endif | |
455 | ||
ff8371ac | 456 | static const struct rtc_class_ops rs5c372_rtc_ops = { |
7520b94d AZ |
457 | .proc = rs5c372_rtc_proc, |
458 | .read_time = rs5c372_rtc_read_time, | |
459 | .set_time = rs5c372_rtc_set_time, | |
cb26b572 DB |
460 | .read_alarm = rs5c_read_alarm, |
461 | .set_alarm = rs5c_set_alarm, | |
16380c15 | 462 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, |
7520b94d AZ |
463 | }; |
464 | ||
6fca3fc5 | 465 | #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS) |
cb26b572 | 466 | |
7520b94d AZ |
467 | static ssize_t rs5c372_sysfs_show_trim(struct device *dev, |
468 | struct device_attribute *attr, char *buf) | |
469 | { | |
82896072 | 470 | int err, trim; |
7520b94d | 471 | |
82896072 AZ |
472 | err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); |
473 | if (err) | |
474 | return err; | |
7520b94d | 475 | |
cb26b572 | 476 | return sprintf(buf, "%d\n", trim); |
7520b94d AZ |
477 | } |
478 | static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); | |
479 | ||
480 | static ssize_t rs5c372_sysfs_show_osc(struct device *dev, | |
481 | struct device_attribute *attr, char *buf) | |
482 | { | |
82896072 | 483 | int err, osc; |
7520b94d | 484 | |
82896072 AZ |
485 | err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); |
486 | if (err) | |
487 | return err; | |
7520b94d | 488 | |
82896072 | 489 | return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); |
7520b94d AZ |
490 | } |
491 | static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); | |
492 | ||
cb26b572 | 493 | static int rs5c_sysfs_register(struct device *dev) |
7520b94d | 494 | { |
cb26b572 DB |
495 | int err; |
496 | ||
497 | err = device_create_file(dev, &dev_attr_trim); | |
498 | if (err) | |
499 | return err; | |
500 | err = device_create_file(dev, &dev_attr_osc); | |
501 | if (err) | |
502 | device_remove_file(dev, &dev_attr_trim); | |
503 | ||
504 | return err; | |
505 | } | |
506 | ||
d815461c DB |
507 | static void rs5c_sysfs_unregister(struct device *dev) |
508 | { | |
509 | device_remove_file(dev, &dev_attr_trim); | |
510 | device_remove_file(dev, &dev_attr_osc); | |
511 | } | |
512 | ||
cb26b572 DB |
513 | #else |
514 | static int rs5c_sysfs_register(struct device *dev) | |
515 | { | |
516 | return 0; | |
7520b94d | 517 | } |
d815461c DB |
518 | |
519 | static void rs5c_sysfs_unregister(struct device *dev) | |
520 | { | |
521 | /* nothing */ | |
522 | } | |
cb26b572 DB |
523 | #endif /* SYSFS */ |
524 | ||
525 | static struct i2c_driver rs5c372_driver; | |
7520b94d | 526 | |
0053dc0d PM |
527 | static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) |
528 | { | |
529 | unsigned char buf[2]; | |
530 | int addr, i, ret = 0; | |
531 | ||
37fc5e2c | 532 | if (rs5c372->type == rtc_r2025sd) { |
a9dbe558 | 533 | if (rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST) |
37fc5e2c | 534 | return ret; |
a9dbe558 | 535 | rs5c372->regs[RS5C_REG_CTRL2] |= R2025_CTRL2_XST; |
37fc5e2c PM |
536 | } else { |
537 | if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) | |
538 | return ret; | |
539 | rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; | |
540 | } | |
0053dc0d PM |
541 | |
542 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | |
543 | buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; | |
544 | buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; | |
545 | ||
546 | /* use 24hr mode */ | |
547 | switch (rs5c372->type) { | |
548 | case rtc_rs5c372a: | |
549 | case rtc_rs5c372b: | |
550 | buf[1] |= RS5C372_CTRL2_24; | |
551 | rs5c372->time24 = 1; | |
552 | break; | |
37fc5e2c | 553 | case rtc_r2025sd: |
550fcb8f | 554 | case rtc_r2221tl: |
0053dc0d PM |
555 | case rtc_rv5c386: |
556 | case rtc_rv5c387a: | |
557 | buf[0] |= RV5C387_CTRL1_24; | |
558 | rs5c372->time24 = 1; | |
559 | break; | |
560 | default: | |
561 | /* impossible */ | |
562 | break; | |
563 | } | |
564 | ||
565 | for (i = 0; i < sizeof(buf); i++) { | |
566 | addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); | |
567 | ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); | |
568 | if (unlikely(ret < 0)) | |
569 | return ret; | |
570 | } | |
571 | ||
572 | rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; | |
573 | rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; | |
574 | ||
575 | return 0; | |
576 | } | |
577 | ||
d2653e92 JD |
578 | static int rs5c372_probe(struct i2c_client *client, |
579 | const struct i2c_device_id *id) | |
7520b94d AZ |
580 | { |
581 | int err = 0; | |
0053dc0d | 582 | int smbus_mode = 0; |
c6f24f99 | 583 | struct rs5c372 *rs5c372; |
cb26b572 | 584 | struct rtc_time tm; |
7520b94d | 585 | |
2a4e2b87 | 586 | dev_dbg(&client->dev, "%s\n", __func__); |
7520b94d | 587 | |
0053dc0d PM |
588 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | |
589 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { | |
590 | /* | |
591 | * If we don't have any master mode adapter, try breaking | |
592 | * it down in to the barest of capabilities. | |
593 | */ | |
594 | if (i2c_check_functionality(client->adapter, | |
595 | I2C_FUNC_SMBUS_BYTE_DATA | | |
596 | I2C_FUNC_SMBUS_I2C_BLOCK)) | |
597 | smbus_mode = 1; | |
598 | else { | |
599 | /* Still no good, give up */ | |
600 | err = -ENODEV; | |
601 | goto exit; | |
602 | } | |
7520b94d AZ |
603 | } |
604 | ||
b8a4b4e2 JH |
605 | rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372), |
606 | GFP_KERNEL); | |
607 | if (!rs5c372) { | |
7520b94d AZ |
608 | err = -ENOMEM; |
609 | goto exit; | |
610 | } | |
cb26b572 | 611 | |
cb26b572 | 612 | rs5c372->client = client; |
c6f24f99 | 613 | i2c_set_clientdata(client, rs5c372); |
ff764b88 JMC |
614 | if (client->dev.of_node) |
615 | rs5c372->type = (enum rtc_type) | |
616 | of_device_get_match_data(&client->dev); | |
617 | else | |
618 | rs5c372->type = id->driver_data; | |
c6f24f99 | 619 | |
e2bfe342 PM |
620 | /* we read registers 0x0f then 0x00-0x0f; skip the first one */ |
621 | rs5c372->regs = &rs5c372->buf[1]; | |
0053dc0d | 622 | rs5c372->smbus = smbus_mode; |
e2bfe342 | 623 | |
cb26b572 DB |
624 | err = rs5c_get_regs(rs5c372); |
625 | if (err < 0) | |
b8a4b4e2 | 626 | goto exit; |
cb26b572 | 627 | |
cb26b572 DB |
628 | /* clock may be set for am/pm or 24 hr time */ |
629 | switch (rs5c372->type) { | |
630 | case rtc_rs5c372a: | |
631 | case rtc_rs5c372b: | |
632 | /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. | |
633 | * so does periodic irq, except some 327a modes. | |
634 | */ | |
635 | if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) | |
636 | rs5c372->time24 = 1; | |
637 | break; | |
37fc5e2c | 638 | case rtc_r2025sd: |
550fcb8f | 639 | case rtc_r2221tl: |
cb26b572 DB |
640 | case rtc_rv5c386: |
641 | case rtc_rv5c387a: | |
642 | if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) | |
643 | rs5c372->time24 = 1; | |
644 | /* alarm uses ALARM_W; and nINTRB for alarm and periodic | |
645 | * irq, on both 386 and 387 | |
646 | */ | |
647 | break; | |
648 | default: | |
649 | dev_err(&client->dev, "unknown RTC type\n"); | |
b8a4b4e2 | 650 | goto exit; |
cb26b572 DB |
651 | } |
652 | ||
653 | /* if the oscillator lost power and no other software (like | |
654 | * the bootloader) set it up, do it here. | |
37fc5e2c PM |
655 | * |
656 | * The R2025S/D does this a little differently than the other | |
657 | * parts, so we special case that.. | |
cb26b572 | 658 | */ |
0053dc0d PM |
659 | err = rs5c_oscillator_setup(rs5c372); |
660 | if (unlikely(err < 0)) { | |
661 | dev_err(&client->dev, "setup error\n"); | |
b8a4b4e2 | 662 | goto exit; |
cb26b572 DB |
663 | } |
664 | ||
665 | if (rs5c372_get_datetime(client, &tm) < 0) | |
666 | dev_warn(&client->dev, "clock needs to be set\n"); | |
667 | ||
fa569113 | 668 | dev_info(&client->dev, "%s found, %s\n", |
cb26b572 | 669 | ({ char *s; switch (rs5c372->type) { |
37fc5e2c | 670 | case rtc_r2025sd: s = "r2025sd"; break; |
550fcb8f | 671 | case rtc_r2221tl: s = "r2221tl"; break; |
cb26b572 DB |
672 | case rtc_rs5c372a: s = "rs5c372a"; break; |
673 | case rtc_rs5c372b: s = "rs5c372b"; break; | |
674 | case rtc_rv5c386: s = "rv5c386"; break; | |
675 | case rtc_rv5c387a: s = "rv5c387a"; break; | |
676 | default: s = "chip"; break; | |
677 | }; s;}), | |
678 | rs5c372->time24 ? "24hr" : "am/pm" | |
679 | ); | |
680 | ||
d815461c | 681 | /* REVISIT use client->irq to register alarm irq ... */ |
b8a4b4e2 JH |
682 | rs5c372->rtc = devm_rtc_device_register(&client->dev, |
683 | rs5c372_driver.driver.name, | |
684 | &rs5c372_rtc_ops, THIS_MODULE); | |
7520b94d | 685 | |
c6f24f99 RV |
686 | if (IS_ERR(rs5c372->rtc)) { |
687 | err = PTR_ERR(rs5c372->rtc); | |
b8a4b4e2 | 688 | goto exit; |
7520b94d AZ |
689 | } |
690 | ||
cb26b572 | 691 | err = rs5c_sysfs_register(&client->dev); |
c6f24f99 | 692 | if (err) |
b8a4b4e2 | 693 | goto exit; |
7520b94d AZ |
694 | |
695 | return 0; | |
696 | ||
7520b94d AZ |
697 | exit: |
698 | return err; | |
699 | } | |
700 | ||
d815461c | 701 | static int rs5c372_remove(struct i2c_client *client) |
cb26b572 | 702 | { |
d815461c | 703 | rs5c_sysfs_unregister(&client->dev); |
7520b94d AZ |
704 | return 0; |
705 | } | |
706 | ||
cb26b572 DB |
707 | static struct i2c_driver rs5c372_driver = { |
708 | .driver = { | |
709 | .name = "rtc-rs5c372", | |
ff764b88 | 710 | .of_match_table = of_match_ptr(rs5c372_of_match), |
cb26b572 | 711 | }, |
d815461c DB |
712 | .probe = rs5c372_probe, |
713 | .remove = rs5c372_remove, | |
3760f736 | 714 | .id_table = rs5c372_id, |
cb26b572 DB |
715 | }; |
716 | ||
0abc9201 | 717 | module_i2c_driver(rs5c372_driver); |
7520b94d AZ |
718 | |
719 | MODULE_AUTHOR( | |
720 | "Pavel Mironchik <pmironchik@optifacio.net>, " | |
0053dc0d PM |
721 | "Alessandro Zummo <a.zummo@towertech.it>, " |
722 | "Paul Mundt <lethal@linux-sh.org>"); | |
7520b94d AZ |
723 | MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); |
724 | MODULE_LICENSE("GPL"); |