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rtc: rv3029: remove open coded regmap_update_bits
[mirror_ubuntu-jammy-kernel.git] / drivers / rtc / rtc-rv3029c2.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
52365230 2/*
c2a1c145 3 * Micro Crystal RV-3029 / RV-3049 rtc class driver
52365230
HS		 4 *
5 * Author: Gregory Hermant <gregory.hermant@calao-systems.com>
2dca3d9e 6 * Michael Buesch <m@bues.ch>
52365230
HS		 7 *
8 * based on previously existing rtc class drivers
52365230
HS		 9 */
10
11#include <linux/module.h>
12#include <linux/i2c.h>
c2a1c145 13#include <linux/spi/spi.h>
52365230
HS		 14#include <linux/bcd.h>
15#include <linux/rtc.h>
a7f6e287
MB		 16#include <linux/delay.h>
17#include <linux/of.h>
a696b31e
MB		 18#include <linux/hwmon.h>
19#include <linux/hwmon-sysfs.h>
e6e38082 20#include <linux/regmap.h>
52365230
HS		 21
22/* Register map */
23/* control section */
aba39d27 24#define RV3029_ONOFF_CTRL 0x00
7697de35
MB		 25#define RV3029_ONOFF_CTRL_WE BIT(0)
26#define RV3029_ONOFF_CTRL_TE BIT(1)
27#define RV3029_ONOFF_CTRL_TAR BIT(2)
28#define RV3029_ONOFF_CTRL_EERE BIT(3)
29#define RV3029_ONOFF_CTRL_SRON BIT(4)
30#define RV3029_ONOFF_CTRL_TD0 BIT(5)
31#define RV3029_ONOFF_CTRL_TD1 BIT(6)
32#define RV3029_ONOFF_CTRL_CLKINT BIT(7)
aba39d27 33#define RV3029_IRQ_CTRL 0x01
7697de35
MB		 34#define RV3029_IRQ_CTRL_AIE BIT(0)
35#define RV3029_IRQ_CTRL_TIE BIT(1)
36#define RV3029_IRQ_CTRL_V1IE BIT(2)
37#define RV3029_IRQ_CTRL_V2IE BIT(3)
38#define RV3029_IRQ_CTRL_SRIE BIT(4)
aba39d27 39#define RV3029_IRQ_FLAGS 0x02
7697de35
MB		 40#define RV3029_IRQ_FLAGS_AF BIT(0)
41#define RV3029_IRQ_FLAGS_TF BIT(1)
42#define RV3029_IRQ_FLAGS_V1IF BIT(2)
43#define RV3029_IRQ_FLAGS_V2IF BIT(3)
44#define RV3029_IRQ_FLAGS_SRF BIT(4)
aba39d27 45#define RV3029_STATUS 0x03
7697de35
MB		 46#define RV3029_STATUS_VLOW1 BIT(2)
47#define RV3029_STATUS_VLOW2 BIT(3)
48#define RV3029_STATUS_SR BIT(4)
49#define RV3029_STATUS_PON BIT(5)
50#define RV3029_STATUS_EEBUSY BIT(7)
aba39d27 51#define RV3029_RST_CTRL 0x04
7697de35 52#define RV3029_RST_CTRL_SYSR BIT(4)
aba39d27 53#define RV3029_CONTROL_SECTION_LEN 0x05
52365230
HS		 54
55/* watch section */
aba39d27
MB		 56#define RV3029_W_SEC 0x08
57#define RV3029_W_MINUTES 0x09
58#define RV3029_W_HOURS 0x0A
7697de35
MB		 59#define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */
60#define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */
aba39d27
MB		 61#define RV3029_W_DATE 0x0B
62#define RV3029_W_DAYS 0x0C
63#define RV3029_W_MONTHS 0x0D
64#define RV3029_W_YEARS 0x0E
65#define RV3029_WATCH_SECTION_LEN 0x07
52365230
HS		 66
67/* alarm section */
aba39d27
MB		 68#define RV3029_A_SC 0x10
69#define RV3029_A_MN 0x11
70#define RV3029_A_HR 0x12
71#define RV3029_A_DT 0x13
72#define RV3029_A_DW 0x14
73#define RV3029_A_MO 0x15
74#define RV3029_A_YR 0x16
dc492e86 75#define RV3029_A_AE_X BIT(7)
aba39d27 76#define RV3029_ALARM_SECTION_LEN 0x07
52365230
HS		 77
78/* timer section */
aba39d27
MB		 79#define RV3029_TIMER_LOW 0x18
80#define RV3029_TIMER_HIGH 0x19
52365230
HS		 81
82/* temperature section */
aba39d27 83#define RV3029_TEMP_PAGE 0x20
52365230
HS		 84
85/* eeprom data section */
aba39d27
MB		 86#define RV3029_E2P_EEDATA1 0x28
87#define RV3029_E2P_EEDATA2 0x29
7697de35 88#define RV3029_E2PDATA_SECTION_LEN 0x02
52365230
HS		 89
90/* eeprom control section */
aba39d27 91#define RV3029_CONTROL_E2P_EECTRL 0x30
7697de35
MB		 92#define RV3029_EECTRL_THP BIT(0) /* temp scan interval */
93#define RV3029_EECTRL_THE BIT(1) /* thermometer enable */
94#define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */
95#define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */
96#define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */
97#define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */
98#define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */
99#define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */
100#define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\
101 RV3029_TRICKLE_5K |\
102 RV3029_TRICKLE_20K |\
103 RV3029_TRICKLE_80K)
104#define RV3029_TRICKLE_SHIFT 4
105#define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */
106#define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
107#define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */
108#define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */
109#define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */
52365230
HS		 110
111/* user ram section */
aba39d27
MB		 112#define RV3029_USR1_RAM_PAGE 0x38
113#define RV3029_USR1_SECTION_LEN 0x04
114#define RV3029_USR2_RAM_PAGE 0x3C
115#define RV3029_USR2_SECTION_LEN 0x04
52365230 116
e6e38082
MJ		 117struct rv3029_data {
118 struct device *dev;
119 struct rtc_device *rtc;
120 struct regmap *regmap;
121 int irq;
122};
123
124static int rv3029_read_regs(struct device *dev, u8 reg, u8 *buf,
abe2f551 125 unsigned int len)
52365230 126{
e6e38082 127 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
52365230 128
e6e38082 129 return regmap_bulk_read(rv3029->regmap, reg, buf, len);
52365230
HS		 130}
131
e6e38082 132static int rv3029_write_regs(struct device *dev, u8 reg, u8 const buf[],
abe2f551 133 unsigned int len)
52365230 134{
e6e38082
MJ		 135 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
136
e6e38082 137 return regmap_bulk_write(rv3029->regmap, reg, buf, len);
52365230
HS		 138}
139
e6e38082 140static int rv3029_get_sr(struct device *dev, u8 *buf)
52365230 141{
e6e38082 142 int ret = rv3029_read_regs(dev, RV3029_STATUS, buf, 1);
52365230
HS		 143
144 if (ret < 0)
145 return -EIO;
e6e38082 146 dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
52365230
HS		 147 return 0;
148}
149
e6e38082 150static int rv3029_set_sr(struct device *dev, u8 val)
52365230
HS		 151{
152 u8 buf[1];
153 int sr;
154
155 buf[0] = val;
e6e38082
MJ		 156 sr = rv3029_write_regs(dev, RV3029_STATUS, buf, 1);
157 dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
52365230
HS		 158 if (sr < 0)
159 return -EIO;
160 return 0;
161}
162
e6e38082 163static int rv3029_eeprom_busywait(struct device *dev)
a7f6e287
MB		 164{
165 int i, ret;
166 u8 sr;
167
168 for (i = 100; i > 0; i--) {
e6e38082 169 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 170 if (ret < 0)
171 break;
172 if (!(sr & RV3029_STATUS_EEBUSY))
173 break;
174 usleep_range(1000, 10000);
175 }
176 if (i <= 0) {
e6e38082 177 dev_err(dev, "EEPROM busy wait timeout.\n");
a7f6e287
MB		 178 return -ETIMEDOUT;
179 }
180
181 return ret;
182}
183
e6e38082 184static int rv3029_eeprom_exit(struct device *dev)
a7f6e287 185{
609e97fe
AB		 186 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
187
a7f6e287 188 /* Re-enable eeprom refresh */
609e97fe 189 return regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL,
4e7f1a60
MJ		 190 RV3029_ONOFF_CTRL_EERE,
191 RV3029_ONOFF_CTRL_EERE);
a7f6e287
MB		 192}
193
e6e38082 194static int rv3029_eeprom_enter(struct device *dev)
a7f6e287 195{
609e97fe 196 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
a7f6e287
MB		 197 int ret;
198 u8 sr;
199
200 /* Check whether we are in the allowed voltage range. */
e6e38082 201 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 202 if (ret < 0)
203 return ret;
204 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
205 /* We clear the bits and retry once just in case
206 * we had a brown out in early startup.
207 */
208 sr &= ~RV3029_STATUS_VLOW1;
209 sr &= ~RV3029_STATUS_VLOW2;
e6e38082 210 ret = rv3029_set_sr(dev, sr);
a7f6e287
MB		 211 if (ret < 0)
212 return ret;
213 usleep_range(1000, 10000);
e6e38082 214 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 215 if (ret < 0)
216 return ret;
217 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
e6e38082 218 dev_err(dev,
a7f6e287
MB		 219 "Supply voltage is too low to safely access the EEPROM.\n");
220 return -ENODEV;
221 }
222 }
223
224 /* Disable eeprom refresh. */
609e97fe
AB		 225 ret = regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL,
226 RV3029_ONOFF_CTRL_EERE, 0);
a7f6e287
MB		 227 if (ret < 0)
228 return ret;
229
230 /* Wait for any previous eeprom accesses to finish. */
e6e38082 231 ret = rv3029_eeprom_busywait(dev);
a7f6e287 232 if (ret < 0)
e6e38082 233 rv3029_eeprom_exit(dev);
a7f6e287
MB		 234
235 return ret;
236}
237
e6e38082 238static int rv3029_eeprom_read(struct device *dev, u8 reg,
a7f6e287
MB		 239 u8 buf[], size_t len)
240{
241 int ret, err;
242
e6e38082 243 err = rv3029_eeprom_enter(dev);
a7f6e287
MB		 244 if (err < 0)
245 return err;
246
e6e38082 247 ret = rv3029_read_regs(dev, reg, buf, len);
a7f6e287 248
e6e38082 249 err = rv3029_eeprom_exit(dev);
a7f6e287
MB		 250 if (err < 0)
251 return err;
252
253 return ret;
254}
255
e6e38082 256static int rv3029_eeprom_write(struct device *dev, u8 reg,
a7f6e287
MB		 257 u8 const buf[], size_t len)
258{
a6f26606 259 int ret, err;
a7f6e287
MB		 260 size_t i;
261 u8 tmp;
262
a6f26606
DC		 263 err = rv3029_eeprom_enter(dev);
264 if (err < 0)
265 return err;
a7f6e287
MB		 266
267 for (i = 0; i < len; i++, reg++) {
e6e38082 268 ret = rv3029_read_regs(dev, reg, &tmp, 1);
a7f6e287
MB		 269 if (ret < 0)
270 break;
271 if (tmp != buf[i]) {
e6e38082 272 ret = rv3029_write_regs(dev, reg, &buf[i], 1);
a7f6e287
MB		 273 if (ret < 0)
274 break;
275 }
e6e38082 276 ret = rv3029_eeprom_busywait(dev);
a7f6e287
MB		 277 if (ret < 0)
278 break;
279 }
280
a6f26606
DC		 281 err = rv3029_eeprom_exit(dev);
282 if (err < 0)
283 return err;
a7f6e287 284
a6f26606 285 return ret;
a7f6e287
MB		 286}
287
e6e38082 288static int rv3029_eeprom_update_bits(struct device *dev,
39387dc2
MB		 289 u8 reg, u8 mask, u8 set)
290{
291 u8 buf;
292 int ret;
293
e6e38082 294 ret = rv3029_eeprom_read(dev, reg, &buf, 1);
39387dc2
MB		 295 if (ret < 0)
296 return ret;
297 buf &= ~mask;
298 buf |= set & mask;
e6e38082 299 ret = rv3029_eeprom_write(dev, reg, &buf, 1);
39387dc2
MB		 300 if (ret < 0)
301 return ret;
302
303 return 0;
304}
305
0ddc5b89
MJ		 306static irqreturn_t rv3029_handle_irq(int irq, void *dev_id)
307{
308 struct device *dev = dev_id;
309 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
310 struct mutex *lock = &rv3029->rtc->ops_lock;
311 unsigned long events = 0;
312 u8 flags, controls;
313 int ret;
314
315 mutex_lock(lock);
316
317 ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
318 if (ret) {
319 dev_warn(dev, "Read IRQ Control Register error %d\n", ret);
320 mutex_unlock(lock);
321 return IRQ_NONE;
322 }
323
324 ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
325 if (ret) {
326 dev_warn(dev, "Read IRQ Flags Register error %d\n", ret);
327 mutex_unlock(lock);
328 return IRQ_NONE;
329 }
330
331 if (flags & RV3029_IRQ_FLAGS_AF) {
332 flags &= ~RV3029_IRQ_FLAGS_AF;
333 controls &= ~RV3029_IRQ_CTRL_AIE;
334 events |= RTC_AF;
335 }
336
337 if (events) {
338 rtc_update_irq(rv3029->rtc, 1, events);
339 rv3029_write_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
340 rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
341 }
342 mutex_unlock(lock);
343
344 return IRQ_HANDLED;
345}
346
e6e38082 347static int rv3029_read_time(struct device *dev, struct rtc_time *tm)
52365230
HS		 348{
349 u8 buf[1];
350 int ret;
aba39d27 351 u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, };
52365230 352
e6e38082 353 ret = rv3029_get_sr(dev, buf);
52365230 354 if (ret < 0) {
e6e38082 355 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 356 return -EIO;
357 }
358
e6e38082 359 ret = rv3029_read_regs(dev, RV3029_W_SEC, regs,
4e7f1a60 360 RV3029_WATCH_SECTION_LEN);
52365230 361 if (ret < 0) {
e6e38082 362 dev_err(dev, "%s: reading RTC section failed\n", __func__);
52365230
HS		 363 return ret;
364 }
365
abe2f551
MJ		 366 tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]);
367 tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]);
52365230
HS		 368
369 /* HR field has a more complex interpretation */
370 {
abe2f551 371 const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC];
aba39d27
MB		 372
373 if (_hr & RV3029_REG_HR_12_24) {
52365230
HS		 374 /* 12h format */
375 tm->tm_hour = bcd2bin(_hr & 0x1f);
aba39d27 376 if (_hr & RV3029_REG_HR_PM) /* PM flag set */
52365230
HS		 377 tm->tm_hour += 12;
378 } else /* 24h format */
379 tm->tm_hour = bcd2bin(_hr & 0x3f);
380 }
381
abe2f551
MJ		 382 tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]);
383 tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1;
384 tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100;
385 tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1;
52365230
HS		 386
387 return 0;
388}
389
e6e38082 390static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
52365230
HS		 391{
392 struct rtc_time *const tm = &alarm->time;
393 int ret;
0ddc5b89 394 u8 regs[8], controls, flags;
52365230 395
e6e38082 396 ret = rv3029_get_sr(dev, regs);
52365230 397 if (ret < 0) {
e6e38082 398 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 399 return -EIO;
400 }
401
e6e38082 402 ret = rv3029_read_regs(dev, RV3029_A_SC, regs,
4e7f1a60 403 RV3029_ALARM_SECTION_LEN);
52365230
HS		 404
405 if (ret < 0) {
e6e38082 406 dev_err(dev, "%s: reading alarm section failed\n", __func__);
52365230
HS		 407 return ret;
408 }
409
0ddc5b89
MJ		 410 ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
411 if (ret) {
412 dev_err(dev, "Read IRQ Control Register error %d\n", ret);
413 return ret;
414 }
415 ret = rv3029_read_regs(dev, RV3029_IRQ_FLAGS, &flags, 1);
416 if (ret < 0) {
417 dev_err(dev, "Read IRQ Flags Register error %d\n", ret);
418 return ret;
419 }
420
abe2f551
MJ		 421 tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f);
422 tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f);
423 tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f);
424 tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f);
425 tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1;
426 tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100;
427 tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1;
52365230 428
0ddc5b89
MJ		 429 alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE);
430 alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled;
431
52365230
HS		 432 return 0;
433}
434
0ddc5b89 435static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable)
52365230
HS		 436{
437 int ret;
0ddc5b89
MJ		 438 u8 controls;
439
440 ret = rv3029_read_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
441 if (ret < 0) {
442 dev_warn(dev, "Read IRQ Control Register error %d\n", ret);
443 return ret;
444 }
52365230 445
2dca3d9e 446 /* enable/disable AIE irq */
0ddc5b89
MJ		 447 if (enable)
448 controls |= RV3029_IRQ_CTRL_AIE;
449 else
450 controls &= ~RV3029_IRQ_CTRL_AIE;
451
452 ret = rv3029_write_regs(dev, RV3029_IRQ_CTRL, &controls, 1);
52365230 453 if (ret < 0) {
e6e38082 454 dev_err(dev, "can't update INT reg\n");
52365230
HS		 455 return ret;
456 }
457
458 return 0;
459}
460
e6e38082 461static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
52365230
HS		 462{
463 struct rtc_time *const tm = &alarm->time;
464 int ret;
465 u8 regs[8];
466
467 /*
468 * The clock has an 8 bit wide bcd-coded register (they never learn)
469 * for the year. tm_year is an offset from 1900 and we are interested
470 * in the 2000-2099 range, so any value less than 100 is invalid.
471 */
472 if (tm->tm_year < 100)
473 return -EINVAL;
474
e6e38082 475 ret = rv3029_get_sr(dev, regs);
52365230 476 if (ret < 0) {
e6e38082 477 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 478 return -EIO;
479 }
aba39d27 480
dc492e86
MJ		 481 /* Activate all the alarms with AE_x bit */
482 regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X;
483 regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X;
484 regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f)
485 | RV3029_A_AE_X;
486 regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f)
487 | RV3029_A_AE_X;
488 regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f)
489 | RV3029_A_AE_X;
490 regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7)
491 | RV3029_A_AE_X;
492 regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100))
493 | RV3029_A_AE_X;
494
495 /* Write the alarm */
e6e38082 496 ret = rv3029_write_regs(dev, RV3029_A_SC, regs,
4e7f1a60 497 RV3029_ALARM_SECTION_LEN);
52365230
HS		 498 if (ret < 0)
499 return ret;
500
501 if (alarm->enabled) {
52365230 502 /* enable AIE irq */
0ddc5b89 503 ret = rv3029_alarm_irq_enable(dev, 1);
52365230
HS		 504 if (ret)
505 return ret;
52365230
HS		 506 } else {
507 /* disable AIE irq */
0ddc5b89 508 ret = rv3029_alarm_irq_enable(dev, 0);
52365230
HS		 509 if (ret)
510 return ret;
52365230
HS		 511 }
512
513 return 0;
514}
515
e6e38082 516static int rv3029_set_time(struct device *dev, struct rtc_time *tm)
52365230
HS		 517{
518 u8 regs[8];
519 int ret;
520
521 /*
522 * The clock has an 8 bit wide bcd-coded register (they never learn)
523 * for the year. tm_year is an offset from 1900 and we are interested
524 * in the 2000-2099 range, so any value less than 100 is invalid.
525 */
526 if (tm->tm_year < 100)
527 return -EINVAL;
528
abe2f551
MJ		 529 regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec);
530 regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min);
531 regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour);
532 regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday);
533 regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1);
38201ca3 534 regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7;
abe2f551 535 regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100);
52365230 536
e6e38082 537 ret = rv3029_write_regs(dev, RV3029_W_SEC, regs,
4e7f1a60 538 RV3029_WATCH_SECTION_LEN);
52365230
HS		 539 if (ret < 0)
540 return ret;
541
e6e38082 542 ret = rv3029_get_sr(dev, regs);
52365230 543 if (ret < 0) {
e6e38082 544 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 545 return ret;
546 }
547 /* clear PON bit */
e6e38082 548 ret = rv3029_set_sr(dev, (regs[0] & ~RV3029_STATUS_PON));
52365230 549 if (ret < 0) {
e6e38082 550 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 551 return ret;
552 }
553
554 return 0;
555}
abe2f551 556
e27e2160
MB		 557static const struct rv3029_trickle_tab_elem {
558 u32 r; /* resistance in ohms */
559 u8 conf; /* trickle config bits */
560} rv3029_trickle_tab[] = {
561 {
562 .r = 1076,
563 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
564 RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
565 }, {
566 .r = 1091,
567 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
568 RV3029_TRICKLE_20K,
569 }, {
570 .r = 1137,
571 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
572 RV3029_TRICKLE_80K,
573 }, {
574 .r = 1154,
575 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K,
576 }, {
577 .r = 1371,
578 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K |
579 RV3029_TRICKLE_80K,
580 }, {
581 .r = 1395,
582 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K,
583 }, {
584 .r = 1472,
585 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K,
586 }, {
587 .r = 1500,
588 .conf = RV3029_TRICKLE_1K,
589 }, {
590 .r = 3810,
591 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K |
592 RV3029_TRICKLE_80K,
593 }, {
594 .r = 4000,
595 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K,
596 }, {
597 .r = 4706,
598 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K,
599 }, {
600 .r = 5000,
601 .conf = RV3029_TRICKLE_5K,
602 }, {
603 .r = 16000,
604 .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
605 }, {
606 .r = 20000,
607 .conf = RV3029_TRICKLE_20K,
608 }, {
609 .r = 80000,
610 .conf = RV3029_TRICKLE_80K,
611 },
612};
613
e6e38082 614static void rv3029_trickle_config(struct device *dev)
e27e2160 615{
e6e38082 616 struct device_node *of_node = dev->of_node;
e27e2160
MB		 617 const struct rv3029_trickle_tab_elem *elem;
618 int i, err;
619 u32 ohms;
39387dc2 620 u8 trickle_set_bits;
e27e2160
MB		 621
622 if (!of_node)
623 return;
624
625 /* Configure the trickle charger. */
e27e2160
MB		 626 err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms);
627 if (err) {
628 /* Disable trickle charger. */
39387dc2 629 trickle_set_bits = 0;
e27e2160
MB		 630 } else {
631 /* Enable trickle charger. */
632 for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) {
633 elem = &rv3029_trickle_tab[i];
634 if (elem->r >= ohms)
635 break;
636 }
39387dc2 637 trickle_set_bits = elem->conf;
e6e38082 638 dev_info(dev,
e27e2160
MB		 639 "Trickle charger enabled at %d ohms resistance.\n",
640 elem->r);
641 }
e6e38082 642 err = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
39387dc2
MB		 643 RV3029_TRICKLE_MASK,
644 trickle_set_bits);
abe2f551 645 if (err < 0)
e6e38082 646 dev_err(dev, "Failed to update trickle charger config\n");
e27e2160
MB		 647}
648
a696b31e
MB		 649#ifdef CONFIG_RTC_DRV_RV3029_HWMON
650
e6e38082 651static int rv3029_read_temp(struct device *dev, int *temp_mC)
a696b31e
MB		 652{
653 int ret;
654 u8 temp;
655
e6e38082 656 ret = rv3029_read_regs(dev, RV3029_TEMP_PAGE, &temp, 1);
a696b31e
MB		 657 if (ret < 0)
658 return ret;
659
660 *temp_mC = ((int)temp - 60) * 1000;
661
662 return 0;
663}
664
665static ssize_t rv3029_hwmon_show_temp(struct device *dev,
666 struct device_attribute *attr,
667 char *buf)
668{
a696b31e
MB		 669 int ret, temp_mC;
670
e6e38082 671 ret = rv3029_read_temp(dev, &temp_mC);
a696b31e
MB		 672 if (ret < 0)
673 return ret;
674
675 return sprintf(buf, "%d\n", temp_mC);
676}
677
678static ssize_t rv3029_hwmon_set_update_interval(struct device *dev,
679 struct device_attribute *attr,
680 const char *buf,
681 size_t count)
682{
a696b31e
MB		 683 unsigned long interval_ms;
684 int ret;
685 u8 th_set_bits = 0;
686
687 ret = kstrtoul(buf, 10, &interval_ms);
688 if (ret < 0)
689 return ret;
690
691 if (interval_ms != 0) {
692 th_set_bits |= RV3029_EECTRL_THE;
693 if (interval_ms >= 16000)
694 th_set_bits |= RV3029_EECTRL_THP;
695 }
e6e38082 696 ret = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
a696b31e
MB		 697 RV3029_EECTRL_THE | RV3029_EECTRL_THP,
698 th_set_bits);
699 if (ret < 0)
700 return ret;
701
702 return count;
703}
704
705static ssize_t rv3029_hwmon_show_update_interval(struct device *dev,
706 struct device_attribute *attr,
707 char *buf)
708{
a696b31e
MB		 709 int ret, interval_ms;
710 u8 eectrl;
711
e6e38082 712 ret = rv3029_eeprom_read(dev, RV3029_CONTROL_E2P_EECTRL,
a696b31e
MB		 713 &eectrl, 1);
714 if (ret < 0)
715 return ret;
716
717 if (eectrl & RV3029_EECTRL_THE) {
718 if (eectrl & RV3029_EECTRL_THP)
719 interval_ms = 16000;
720 else
721 interval_ms = 1000;
722 } else {
723 interval_ms = 0;
724 }
725
726 return sprintf(buf, "%d\n", interval_ms);
727}
728
729static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp,
730 NULL, 0);
731static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO,
732 rv3029_hwmon_show_update_interval,
733 rv3029_hwmon_set_update_interval, 0);
734
735static struct attribute *rv3029_hwmon_attrs[] = {
736 &sensor_dev_attr_temp1_input.dev_attr.attr,
737 &sensor_dev_attr_update_interval.dev_attr.attr,
738 NULL,
739};
740ATTRIBUTE_GROUPS(rv3029_hwmon);
741
e6e38082 742static void rv3029_hwmon_register(struct device *dev, const char *name)
a696b31e 743{
e6e38082 744 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
a696b31e
MB		 745 struct device *hwmon_dev;
746
e6e38082
MJ		 747 hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029,
748 rv3029_hwmon_groups);
a696b31e 749 if (IS_ERR(hwmon_dev)) {
e6e38082 750 dev_warn(dev, "unable to register hwmon device %ld\n",
4e7f1a60 751 PTR_ERR(hwmon_dev));
a696b31e
MB		 752 }
753}
754
755#else /* CONFIG_RTC_DRV_RV3029_HWMON */
756
e6e38082 757static void rv3029_hwmon_register(struct device *dev, const char *name)
a696b31e
MB		 758{
759}
760
761#endif /* CONFIG_RTC_DRV_RV3029_HWMON */
762
0ddc5b89 763static struct rtc_class_ops rv3029_rtc_ops = {
e6e38082
MJ		 764 .read_time = rv3029_read_time,
765 .set_time = rv3029_set_time,
52365230
HS		 766};
767
e6e38082
MJ		 768static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq,
769 const char *name)
52365230 770{
e6e38082 771 struct rv3029_data *rv3029;
52365230
HS		 772 int rc = 0;
773 u8 buf[1];
774
e6e38082
MJ		 775 rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL);
776 if (!rv3029)
777 return -ENOMEM;
778
779 rv3029->regmap = regmap;
780 rv3029->irq = irq;
781 rv3029->dev = dev;
782 dev_set_drvdata(dev, rv3029);
52365230 783
e6e38082 784 rc = rv3029_get_sr(dev, buf);
67ab2440 785 if (rc < 0) {
e6e38082 786 dev_err(dev, "reading status failed\n");
67ab2440
GH		 787 return rc;
788 }
789
e6e38082
MJ		 790 rv3029_trickle_config(dev);
791 rv3029_hwmon_register(dev, name);
792
793 rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops,
794 THIS_MODULE);
0ddc5b89
MJ		 795 if (IS_ERR(rv3029->rtc)) {
796 dev_err(dev, "unable to register the class device\n");
797 return PTR_ERR(rv3029->rtc);
798 }
e27e2160 799
0ddc5b89
MJ		 800 if (rv3029->irq > 0) {
801 rc = devm_request_threaded_irq(dev, rv3029->irq,
802 NULL, rv3029_handle_irq,
803 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
804 "rv3029", dev);
805 if (rc) {
806 dev_warn(dev, "unable to request IRQ, alarms disabled\n");
807 rv3029->irq = 0;
808 } else {
809 rv3029_rtc_ops.read_alarm = rv3029_read_alarm;
810 rv3029_rtc_ops.set_alarm = rv3029_set_alarm;
811 rv3029_rtc_ops.alarm_irq_enable = rv3029_alarm_irq_enable;
812 }
813 }
814
815 return 0;
e6e38082 816}
52365230 817
c509e434
AB		 818static const struct regmap_range rv3029_holes_range[] = {
819 regmap_reg_range(0x05, 0x07),
820 regmap_reg_range(0x0f, 0x0f),
821 regmap_reg_range(0x17, 0x17),
822 regmap_reg_range(0x1a, 0x1f),
823 regmap_reg_range(0x21, 0x27),
824 regmap_reg_range(0x34, 0x37),
825};
826
827static const struct regmap_access_table rv3029_regs = {
828 .no_ranges = rv3029_holes_range,
829 .n_no_ranges = ARRAY_SIZE(rv3029_holes_range),
830};
831
832static const struct regmap_config config = {
833 .reg_bits = 8,
834 .val_bits = 8,
835 .rd_table = &rv3029_regs,
836 .wr_table = &rv3029_regs,
837 .max_register = 0x3f,
838};
839
c2a1c145
MJ		 840#if IS_ENABLED(CONFIG_I2C)
841
e6e38082
MJ		 842static int rv3029_i2c_probe(struct i2c_client *client,
843 const struct i2c_device_id *id)
844{
845 struct regmap *regmap;
e6e38082
MJ		 846 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
847 I2C_FUNC_SMBUS_BYTE)) {
848 dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n");
849 return -ENODEV;
850 }
52365230 851
e6e38082
MJ		 852 regmap = devm_regmap_init_i2c(client, &config);
853 if (IS_ERR(regmap)) {
854 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
855 __func__, PTR_ERR(regmap));
856 return PTR_ERR(regmap);
857 }
52365230 858
e6e38082 859 return rv3029_probe(&client->dev, regmap, client->irq, client->name);
52365230
HS		 860}
861
45a63518 862static const struct i2c_device_id rv3029_id[] = {
814db2bc
AB		 863 { "rv3029", 0 },
864 { "rv3029c2", 0 },
865 { }
866};
867MODULE_DEVICE_TABLE(i2c, rv3029_id);
868
e696a1dd 869static const struct of_device_id rv3029_of_match[] = {
45b611c8
AB		 870 { .compatible = "microcrystal,rv3029" },
871 /* Backward compatibility only, do not use compatibles below: */
e696a1dd
JMC		 872 { .compatible = "rv3029" },
873 { .compatible = "rv3029c2" },
874 { .compatible = "mc,rv3029c2" },
875 { }
876};
877MODULE_DEVICE_TABLE(of, rv3029_of_match);
878
aba39d27 879static struct i2c_driver rv3029_driver = {
52365230 880 .driver = {
9b45ef97 881 .name = "rv3029",
e696a1dd 882 .of_match_table = of_match_ptr(rv3029_of_match),
52365230 883 },
e6e38082 884 .probe = rv3029_i2c_probe,
aba39d27 885 .id_table = rv3029_id,
52365230
HS		 886};
887
c2a1c145
MJ		 888static int rv3029_register_driver(void)
889{
890 return i2c_add_driver(&rv3029_driver);
891}
892
893static void rv3029_unregister_driver(void)
894{
895 i2c_del_driver(&rv3029_driver);
896}
897
898#else
899
900static int rv3029_register_driver(void)
901{
902 return 0;
903}
904
905static void rv3029_unregister_driver(void)
906{
907}
908
909#endif
910
911#if IS_ENABLED(CONFIG_SPI_MASTER)
912
913static int rv3049_probe(struct spi_device *spi)
914{
c2a1c145
MJ		 915 struct regmap *regmap;
916
917 regmap = devm_regmap_init_spi(spi, &config);
918 if (IS_ERR(regmap)) {
919 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n",
920 __func__, PTR_ERR(regmap));
921 return PTR_ERR(regmap);
922 }
923
924 return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049");
925}
926
927static struct spi_driver rv3049_driver = {
928 .driver = {
929 .name = "rv3049",
930 },
931 .probe = rv3049_probe,
932};
933
934static int rv3049_register_driver(void)
935{
936 return spi_register_driver(&rv3049_driver);
937}
938
939static void rv3049_unregister_driver(void)
940{
941 spi_unregister_driver(&rv3049_driver);
942}
943
944#else
945
946static int rv3049_register_driver(void)
947{
948 return 0;
949}
950
951static void rv3049_unregister_driver(void)
952{
953}
954
955#endif
956
957static int __init rv30x9_init(void)
958{
959 int ret;
960
961 ret = rv3029_register_driver();
962 if (ret) {
963 pr_err("Failed to register rv3029 driver: %d\n", ret);
964 return ret;
965 }
966
967 ret = rv3049_register_driver();
968 if (ret) {
969 pr_err("Failed to register rv3049 driver: %d\n", ret);
970 rv3029_unregister_driver();
971 }
972
973 return ret;
974}
975module_init(rv30x9_init)
976
977static void __exit rv30x9_exit(void)
978{
979 rv3049_unregister_driver();
980 rv3029_unregister_driver();
981}
982module_exit(rv30x9_exit)
52365230
HS		 983
984MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>");
2dca3d9e 985MODULE_AUTHOR("Michael Buesch <m@bues.ch>");
c2a1c145 986MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver");
52365230 987MODULE_LICENSE("GPL");
c2a1c145 988MODULE_ALIAS("spi:rv3049");
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