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Commit | Line | Data |
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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
52365230 | 2 | /* |
c2a1c145 | 3 | * Micro Crystal RV-3029 / RV-3049 rtc class driver |
52365230 HS |
4 | * |
5 | * Author: Gregory Hermant <gregory.hermant@calao-systems.com> | |
2dca3d9e | 6 | * Michael Buesch <m@bues.ch> |
52365230 HS |
7 | * |
8 | * based on previously existing rtc class drivers | |
52365230 HS |
9 | */ |
10 | ||
11 | #include <linux/module.h> | |
12 | #include <linux/i2c.h> | |
c2a1c145 | 13 | #include <linux/spi/spi.h> |
52365230 HS |
14 | #include <linux/bcd.h> |
15 | #include <linux/rtc.h> | |
a7f6e287 MB |
16 | #include <linux/delay.h> |
17 | #include <linux/of.h> | |
a696b31e MB |
18 | #include <linux/hwmon.h> |
19 | #include <linux/hwmon-sysfs.h> | |
e6e38082 | 20 | #include <linux/regmap.h> |
52365230 HS |
21 | |
22 | /* Register map */ | |
23 | /* control section */ | |
aba39d27 | 24 | #define RV3029_ONOFF_CTRL 0x00 |
7697de35 MB |
25 | #define RV3029_ONOFF_CTRL_WE BIT(0) |
26 | #define RV3029_ONOFF_CTRL_TE BIT(1) | |
27 | #define RV3029_ONOFF_CTRL_TAR BIT(2) | |
28 | #define RV3029_ONOFF_CTRL_EERE BIT(3) | |
29 | #define RV3029_ONOFF_CTRL_SRON BIT(4) | |
30 | #define RV3029_ONOFF_CTRL_TD0 BIT(5) | |
31 | #define RV3029_ONOFF_CTRL_TD1 BIT(6) | |
32 | #define RV3029_ONOFF_CTRL_CLKINT BIT(7) | |
aba39d27 | 33 | #define RV3029_IRQ_CTRL 0x01 |
7697de35 MB |
34 | #define RV3029_IRQ_CTRL_AIE BIT(0) |
35 | #define RV3029_IRQ_CTRL_TIE BIT(1) | |
36 | #define RV3029_IRQ_CTRL_V1IE BIT(2) | |
37 | #define RV3029_IRQ_CTRL_V2IE BIT(3) | |
38 | #define RV3029_IRQ_CTRL_SRIE BIT(4) | |
aba39d27 | 39 | #define RV3029_IRQ_FLAGS 0x02 |
7697de35 MB |
40 | #define RV3029_IRQ_FLAGS_AF BIT(0) |
41 | #define RV3029_IRQ_FLAGS_TF BIT(1) | |
42 | #define RV3029_IRQ_FLAGS_V1IF BIT(2) | |
43 | #define RV3029_IRQ_FLAGS_V2IF BIT(3) | |
44 | #define RV3029_IRQ_FLAGS_SRF BIT(4) | |
aba39d27 | 45 | #define RV3029_STATUS 0x03 |
7697de35 MB |
46 | #define RV3029_STATUS_VLOW1 BIT(2) |
47 | #define RV3029_STATUS_VLOW2 BIT(3) | |
48 | #define RV3029_STATUS_SR BIT(4) | |
49 | #define RV3029_STATUS_PON BIT(5) | |
50 | #define RV3029_STATUS_EEBUSY BIT(7) | |
aba39d27 | 51 | #define RV3029_RST_CTRL 0x04 |
7697de35 | 52 | #define RV3029_RST_CTRL_SYSR BIT(4) |
aba39d27 | 53 | #define RV3029_CONTROL_SECTION_LEN 0x05 |
52365230 HS |
54 | |
55 | /* watch section */ | |
aba39d27 MB |
56 | #define RV3029_W_SEC 0x08 |
57 | #define RV3029_W_MINUTES 0x09 | |
58 | #define RV3029_W_HOURS 0x0A | |
7697de35 MB |
59 | #define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */ |
60 | #define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */ | |
aba39d27 MB |
61 | #define RV3029_W_DATE 0x0B |
62 | #define RV3029_W_DAYS 0x0C | |
63 | #define RV3029_W_MONTHS 0x0D | |
64 | #define RV3029_W_YEARS 0x0E | |
65 | #define RV3029_WATCH_SECTION_LEN 0x07 | |
52365230 HS |
66 | |
67 | /* alarm section */ | |
aba39d27 MB |
68 | #define RV3029_A_SC 0x10 |
69 | #define RV3029_A_MN 0x11 | |
70 | #define RV3029_A_HR 0x12 | |
71 | #define RV3029_A_DT 0x13 | |
72 | #define RV3029_A_DW 0x14 | |
73 | #define RV3029_A_MO 0x15 | |
74 | #define RV3029_A_YR 0x16 | |
dc492e86 | 75 | #define RV3029_A_AE_X BIT(7) |
aba39d27 | 76 | #define RV3029_ALARM_SECTION_LEN 0x07 |
52365230 HS |
77 | |
78 | /* timer section */ | |
aba39d27 MB |
79 | #define RV3029_TIMER_LOW 0x18 |
80 | #define RV3029_TIMER_HIGH 0x19 | |
52365230 HS |
81 | |
82 | /* temperature section */ | |
aba39d27 | 83 | #define RV3029_TEMP_PAGE 0x20 |
52365230 HS |
84 | |
85 | /* eeprom data section */ | |
aba39d27 MB |
86 | #define RV3029_E2P_EEDATA1 0x28 |
87 | #define RV3029_E2P_EEDATA2 0x29 | |
7697de35 | 88 | #define RV3029_E2PDATA_SECTION_LEN 0x02 |
52365230 HS |
89 | |
90 | /* eeprom control section */ | |
aba39d27 | 91 | #define RV3029_CONTROL_E2P_EECTRL 0x30 |
7697de35 MB |
92 | #define RV3029_EECTRL_THP BIT(0) /* temp scan interval */ |
93 | #define RV3029_EECTRL_THE BIT(1) /* thermometer enable */ | |
94 | #define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */ | |
95 | #define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */ | |
96 | #define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */ | |
97 | #define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */ | |
98 | #define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */ | |
99 | #define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */ | |
100 | #define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\ | |
101 | RV3029_TRICKLE_5K |\ | |
102 | RV3029_TRICKLE_20K |\ | |
103 | RV3029_TRICKLE_80K) | |
104 | #define RV3029_TRICKLE_SHIFT 4 | |
105 | #define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */ | |
106 | #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */ | |
107 | #define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */ | |
108 | #define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */ | |
109 | #define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */ | |
52365230 HS |
110 | |
111 | /* user ram section */ | |
aba39d27 MB |
112 | #define RV3029_USR1_RAM_PAGE 0x38 |
113 | #define RV3029_USR1_SECTION_LEN 0x04 | |
114 | #define RV3029_USR2_RAM_PAGE 0x3C | |
115 | #define RV3029_USR2_SECTION_LEN 0x04 | |
52365230 | 116 | |
e6e38082 MJ |
117 | struct rv3029_data { |
118 | struct device *dev; | |
119 | struct rtc_device *rtc; | |
120 | struct regmap *regmap; | |
121 | int irq; | |
122 | }; | |
123 | ||
bb72dbba | 124 | static int rv3029_eeprom_busywait(struct rv3029_data *rv3029) |
a7f6e287 | 125 | { |
bb72dbba | 126 | unsigned int sr; |
a7f6e287 | 127 | int i, ret; |
a7f6e287 MB |
128 | |
129 | for (i = 100; i > 0; i--) { | |
bb72dbba | 130 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
131 | if (ret < 0) |
132 | break; | |
133 | if (!(sr & RV3029_STATUS_EEBUSY)) | |
134 | break; | |
135 | usleep_range(1000, 10000); | |
136 | } | |
137 | if (i <= 0) { | |
bb72dbba | 138 | dev_err(rv3029->dev, "EEPROM busy wait timeout.\n"); |
a7f6e287 MB |
139 | return -ETIMEDOUT; |
140 | } | |
141 | ||
142 | return ret; | |
143 | } | |
144 | ||
7518dd9a | 145 | static int rv3029_eeprom_exit(struct rv3029_data *rv3029) |
a7f6e287 MB |
146 | { |
147 | /* Re-enable eeprom refresh */ | |
609e97fe | 148 | return regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL, |
4e7f1a60 MJ |
149 | RV3029_ONOFF_CTRL_EERE, |
150 | RV3029_ONOFF_CTRL_EERE); | |
a7f6e287 MB |
151 | } |
152 | ||
7518dd9a | 153 | static int rv3029_eeprom_enter(struct rv3029_data *rv3029) |
a7f6e287 | 154 | { |
bb72dbba | 155 | unsigned int sr; |
a7f6e287 | 156 | int ret; |
a7f6e287 MB |
157 | |
158 | /* Check whether we are in the allowed voltage range. */ | |
bb72dbba | 159 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
160 | if (ret < 0) |
161 | return ret; | |
162 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
163 | /* We clear the bits and retry once just in case | |
164 | * we had a brown out in early startup. | |
165 | */ | |
54c5970d AB |
166 | ret = regmap_update_bits(rv3029->regmap, RV3029_STATUS, |
167 | RV3029_STATUS_VLOW1 | | |
168 | RV3029_STATUS_VLOW2, 0); | |
a7f6e287 MB |
169 | if (ret < 0) |
170 | return ret; | |
171 | usleep_range(1000, 10000); | |
bb72dbba | 172 | ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); |
a7f6e287 MB |
173 | if (ret < 0) |
174 | return ret; | |
175 | if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) { | |
7518dd9a | 176 | dev_err(rv3029->dev, |
a7f6e287 MB |
177 | "Supply voltage is too low to safely access the EEPROM.\n"); |
178 | return -ENODEV; | |
179 | } | |
180 | } | |
181 | ||
182 | /* Disable eeprom refresh. */ | |
609e97fe AB |
183 | ret = regmap_update_bits(rv3029->regmap, RV3029_ONOFF_CTRL, |
184 | RV3029_ONOFF_CTRL_EERE, 0); | |
a7f6e287 MB |
185 | if (ret < 0) |
186 | return ret; | |
187 | ||
188 | /* Wait for any previous eeprom accesses to finish. */ | |
bb72dbba | 189 | ret = rv3029_eeprom_busywait(rv3029); |
a7f6e287 | 190 | if (ret < 0) |
7518dd9a | 191 | rv3029_eeprom_exit(rv3029); |
a7f6e287 MB |
192 | |
193 | return ret; | |
194 | } | |
195 | ||
7518dd9a | 196 | static int rv3029_eeprom_read(struct rv3029_data *rv3029, u8 reg, |
a7f6e287 MB |
197 | u8 buf[], size_t len) |
198 | { | |
199 | int ret, err; | |
200 | ||
7518dd9a | 201 | err = rv3029_eeprom_enter(rv3029); |
a7f6e287 MB |
202 | if (err < 0) |
203 | return err; | |
204 | ||
7518dd9a | 205 | ret = regmap_bulk_read(rv3029->regmap, reg, buf, len); |
a7f6e287 | 206 | |
7518dd9a | 207 | err = rv3029_eeprom_exit(rv3029); |
a7f6e287 MB |
208 | if (err < 0) |
209 | return err; | |
210 | ||
211 | return ret; | |
212 | } | |
213 | ||
7518dd9a | 214 | static int rv3029_eeprom_write(struct rv3029_data *rv3029, u8 reg, |
a7f6e287 MB |
215 | u8 const buf[], size_t len) |
216 | { | |
7518dd9a | 217 | unsigned int tmp; |
a6f26606 | 218 | int ret, err; |
a7f6e287 | 219 | size_t i; |
a7f6e287 | 220 | |
7518dd9a | 221 | err = rv3029_eeprom_enter(rv3029); |
a6f26606 DC |
222 | if (err < 0) |
223 | return err; | |
a7f6e287 MB |
224 | |
225 | for (i = 0; i < len; i++, reg++) { | |
7518dd9a | 226 | ret = regmap_read(rv3029->regmap, reg, &tmp); |
a7f6e287 MB |
227 | if (ret < 0) |
228 | break; | |
229 | if (tmp != buf[i]) { | |
7518dd9a AB |
230 | tmp = buf[i]; |
231 | ret = regmap_write(rv3029->regmap, reg, tmp); | |
a7f6e287 MB |
232 | if (ret < 0) |
233 | break; | |
234 | } | |
bb72dbba | 235 | ret = rv3029_eeprom_busywait(rv3029); |
a7f6e287 MB |
236 | if (ret < 0) |
237 | break; | |
238 | } | |
239 | ||
7518dd9a | 240 | err = rv3029_eeprom_exit(rv3029); |
a6f26606 DC |
241 | if (err < 0) |
242 | return err; | |
a7f6e287 | 243 | |
a6f26606 | 244 | return ret; |
a7f6e287 MB |
245 | } |
246 | ||
7518dd9a | 247 | static int rv3029_eeprom_update_bits(struct rv3029_data *rv3029, |
39387dc2 MB |
248 | u8 reg, u8 mask, u8 set) |
249 | { | |
250 | u8 buf; | |
251 | int ret; | |
252 | ||
7518dd9a | 253 | ret = rv3029_eeprom_read(rv3029, reg, &buf, 1); |
39387dc2 MB |
254 | if (ret < 0) |
255 | return ret; | |
256 | buf &= ~mask; | |
257 | buf |= set & mask; | |
7518dd9a | 258 | ret = rv3029_eeprom_write(rv3029, reg, &buf, 1); |
39387dc2 MB |
259 | if (ret < 0) |
260 | return ret; | |
261 | ||
262 | return 0; | |
263 | } | |
264 | ||
0ddc5b89 MJ |
265 | static irqreturn_t rv3029_handle_irq(int irq, void *dev_id) |
266 | { | |
267 | struct device *dev = dev_id; | |
268 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); | |
269 | struct mutex *lock = &rv3029->rtc->ops_lock; | |
7518dd9a | 270 | unsigned int flags, controls; |
0ddc5b89 | 271 | unsigned long events = 0; |
0ddc5b89 MJ |
272 | int ret; |
273 | ||
274 | mutex_lock(lock); | |
275 | ||
7518dd9a | 276 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls); |
0ddc5b89 MJ |
277 | if (ret) { |
278 | dev_warn(dev, "Read IRQ Control Register error %d\n", ret); | |
279 | mutex_unlock(lock); | |
280 | return IRQ_NONE; | |
281 | } | |
282 | ||
7518dd9a | 283 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags); |
0ddc5b89 MJ |
284 | if (ret) { |
285 | dev_warn(dev, "Read IRQ Flags Register error %d\n", ret); | |
286 | mutex_unlock(lock); | |
287 | return IRQ_NONE; | |
288 | } | |
289 | ||
290 | if (flags & RV3029_IRQ_FLAGS_AF) { | |
291 | flags &= ~RV3029_IRQ_FLAGS_AF; | |
292 | controls &= ~RV3029_IRQ_CTRL_AIE; | |
293 | events |= RTC_AF; | |
294 | } | |
295 | ||
296 | if (events) { | |
297 | rtc_update_irq(rv3029->rtc, 1, events); | |
7518dd9a AB |
298 | regmap_write(rv3029->regmap, RV3029_IRQ_FLAGS, flags); |
299 | regmap_write(rv3029->regmap, RV3029_IRQ_CTRL, controls); | |
0ddc5b89 MJ |
300 | } |
301 | mutex_unlock(lock); | |
302 | ||
303 | return IRQ_HANDLED; | |
304 | } | |
305 | ||
e6e38082 | 306 | static int rv3029_read_time(struct device *dev, struct rtc_time *tm) |
52365230 | 307 | { |
7518dd9a | 308 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 309 | int ret; |
aba39d27 | 310 | u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, }; |
52365230 | 311 | |
7518dd9a | 312 | ret = regmap_bulk_read(rv3029->regmap, RV3029_W_SEC, regs, |
4e7f1a60 | 313 | RV3029_WATCH_SECTION_LEN); |
52365230 | 314 | if (ret < 0) { |
e6e38082 | 315 | dev_err(dev, "%s: reading RTC section failed\n", __func__); |
52365230 HS |
316 | return ret; |
317 | } | |
318 | ||
abe2f551 MJ |
319 | tm->tm_sec = bcd2bin(regs[RV3029_W_SEC - RV3029_W_SEC]); |
320 | tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES - RV3029_W_SEC]); | |
52365230 HS |
321 | |
322 | /* HR field has a more complex interpretation */ | |
323 | { | |
abe2f551 | 324 | const u8 _hr = regs[RV3029_W_HOURS - RV3029_W_SEC]; |
aba39d27 MB |
325 | |
326 | if (_hr & RV3029_REG_HR_12_24) { | |
52365230 HS |
327 | /* 12h format */ |
328 | tm->tm_hour = bcd2bin(_hr & 0x1f); | |
aba39d27 | 329 | if (_hr & RV3029_REG_HR_PM) /* PM flag set */ |
52365230 HS |
330 | tm->tm_hour += 12; |
331 | } else /* 24h format */ | |
332 | tm->tm_hour = bcd2bin(_hr & 0x3f); | |
333 | } | |
334 | ||
abe2f551 MJ |
335 | tm->tm_mday = bcd2bin(regs[RV3029_W_DATE - RV3029_W_SEC]); |
336 | tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS - RV3029_W_SEC]) - 1; | |
337 | tm->tm_year = bcd2bin(regs[RV3029_W_YEARS - RV3029_W_SEC]) + 100; | |
338 | tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS - RV3029_W_SEC]) - 1; | |
52365230 HS |
339 | |
340 | return 0; | |
341 | } | |
342 | ||
e6e38082 | 343 | static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 | 344 | { |
7518dd9a | 345 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 346 | struct rtc_time *const tm = &alarm->time; |
7518dd9a | 347 | unsigned int controls, flags; |
52365230 | 348 | int ret; |
7518dd9a | 349 | u8 regs[8]; |
52365230 | 350 | |
7518dd9a | 351 | ret = regmap_bulk_read(rv3029->regmap, RV3029_A_SC, regs, |
4e7f1a60 | 352 | RV3029_ALARM_SECTION_LEN); |
52365230 | 353 | if (ret < 0) { |
e6e38082 | 354 | dev_err(dev, "%s: reading alarm section failed\n", __func__); |
52365230 HS |
355 | return ret; |
356 | } | |
357 | ||
7518dd9a | 358 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_CTRL, &controls); |
0ddc5b89 MJ |
359 | if (ret) { |
360 | dev_err(dev, "Read IRQ Control Register error %d\n", ret); | |
361 | return ret; | |
362 | } | |
7518dd9a | 363 | ret = regmap_read(rv3029->regmap, RV3029_IRQ_FLAGS, &flags); |
0ddc5b89 MJ |
364 | if (ret < 0) { |
365 | dev_err(dev, "Read IRQ Flags Register error %d\n", ret); | |
366 | return ret; | |
367 | } | |
368 | ||
abe2f551 MJ |
369 | tm->tm_sec = bcd2bin(regs[RV3029_A_SC - RV3029_A_SC] & 0x7f); |
370 | tm->tm_min = bcd2bin(regs[RV3029_A_MN - RV3029_A_SC] & 0x7f); | |
371 | tm->tm_hour = bcd2bin(regs[RV3029_A_HR - RV3029_A_SC] & 0x3f); | |
372 | tm->tm_mday = bcd2bin(regs[RV3029_A_DT - RV3029_A_SC] & 0x3f); | |
373 | tm->tm_mon = bcd2bin(regs[RV3029_A_MO - RV3029_A_SC] & 0x1f) - 1; | |
374 | tm->tm_year = bcd2bin(regs[RV3029_A_YR - RV3029_A_SC] & 0x7f) + 100; | |
375 | tm->tm_wday = bcd2bin(regs[RV3029_A_DW - RV3029_A_SC] & 0x07) - 1; | |
52365230 | 376 | |
0ddc5b89 MJ |
377 | alarm->enabled = !!(controls & RV3029_IRQ_CTRL_AIE); |
378 | alarm->pending = (flags & RV3029_IRQ_FLAGS_AF) && alarm->enabled; | |
379 | ||
52365230 HS |
380 | return 0; |
381 | } | |
382 | ||
0ddc5b89 | 383 | static int rv3029_alarm_irq_enable(struct device *dev, unsigned int enable) |
52365230 | 384 | { |
38ce8e30 | 385 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 | 386 | |
38ce8e30 AB |
387 | return regmap_update_bits(rv3029->regmap, RV3029_IRQ_CTRL, |
388 | RV3029_IRQ_CTRL_AIE, | |
389 | enable ? RV3029_IRQ_CTRL_AIE : 0); | |
52365230 HS |
390 | } |
391 | ||
e6e38082 | 392 | static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
52365230 | 393 | { |
7518dd9a | 394 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 HS |
395 | struct rtc_time *const tm = &alarm->time; |
396 | int ret; | |
397 | u8 regs[8]; | |
398 | ||
399 | /* | |
400 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
401 | * for the year. tm_year is an offset from 1900 and we are interested | |
402 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
403 | */ | |
404 | if (tm->tm_year < 100) | |
405 | return -EINVAL; | |
406 | ||
dc492e86 MJ |
407 | /* Activate all the alarms with AE_x bit */ |
408 | regs[RV3029_A_SC - RV3029_A_SC] = bin2bcd(tm->tm_sec) | RV3029_A_AE_X; | |
409 | regs[RV3029_A_MN - RV3029_A_SC] = bin2bcd(tm->tm_min) | RV3029_A_AE_X; | |
410 | regs[RV3029_A_HR - RV3029_A_SC] = (bin2bcd(tm->tm_hour) & 0x3f) | |
411 | | RV3029_A_AE_X; | |
412 | regs[RV3029_A_DT - RV3029_A_SC] = (bin2bcd(tm->tm_mday) & 0x3f) | |
413 | | RV3029_A_AE_X; | |
414 | regs[RV3029_A_MO - RV3029_A_SC] = (bin2bcd(tm->tm_mon + 1) & 0x1f) | |
415 | | RV3029_A_AE_X; | |
416 | regs[RV3029_A_DW - RV3029_A_SC] = (bin2bcd(tm->tm_wday + 1) & 0x7) | |
417 | | RV3029_A_AE_X; | |
418 | regs[RV3029_A_YR - RV3029_A_SC] = (bin2bcd(tm->tm_year - 100)) | |
419 | | RV3029_A_AE_X; | |
420 | ||
421 | /* Write the alarm */ | |
7518dd9a | 422 | ret = regmap_bulk_write(rv3029->regmap, RV3029_A_SC, regs, |
4e7f1a60 | 423 | RV3029_ALARM_SECTION_LEN); |
52365230 HS |
424 | if (ret < 0) |
425 | return ret; | |
426 | ||
8fd3d609 | 427 | return rv3029_alarm_irq_enable(dev, alarm->enabled); |
52365230 HS |
428 | } |
429 | ||
e6e38082 | 430 | static int rv3029_set_time(struct device *dev, struct rtc_time *tm) |
52365230 | 431 | { |
54c5970d | 432 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
52365230 HS |
433 | u8 regs[8]; |
434 | int ret; | |
435 | ||
436 | /* | |
437 | * The clock has an 8 bit wide bcd-coded register (they never learn) | |
438 | * for the year. tm_year is an offset from 1900 and we are interested | |
439 | * in the 2000-2099 range, so any value less than 100 is invalid. | |
440 | */ | |
441 | if (tm->tm_year < 100) | |
442 | return -EINVAL; | |
443 | ||
abe2f551 MJ |
444 | regs[RV3029_W_SEC - RV3029_W_SEC] = bin2bcd(tm->tm_sec); |
445 | regs[RV3029_W_MINUTES - RV3029_W_SEC] = bin2bcd(tm->tm_min); | |
446 | regs[RV3029_W_HOURS - RV3029_W_SEC] = bin2bcd(tm->tm_hour); | |
447 | regs[RV3029_W_DATE - RV3029_W_SEC] = bin2bcd(tm->tm_mday); | |
448 | regs[RV3029_W_MONTHS - RV3029_W_SEC] = bin2bcd(tm->tm_mon + 1); | |
38201ca3 | 449 | regs[RV3029_W_DAYS - RV3029_W_SEC] = bin2bcd(tm->tm_wday + 1) & 0x7; |
abe2f551 | 450 | regs[RV3029_W_YEARS - RV3029_W_SEC] = bin2bcd(tm->tm_year - 100); |
52365230 | 451 | |
7518dd9a | 452 | ret = regmap_bulk_write(rv3029->regmap, RV3029_W_SEC, regs, |
4e7f1a60 | 453 | RV3029_WATCH_SECTION_LEN); |
52365230 HS |
454 | if (ret < 0) |
455 | return ret; | |
456 | ||
52365230 | 457 | /* clear PON bit */ |
54c5970d AB |
458 | return regmap_update_bits(rv3029->regmap, RV3029_STATUS, |
459 | RV3029_STATUS_PON, 0); | |
52365230 | 460 | } |
abe2f551 | 461 | |
e27e2160 MB |
462 | static const struct rv3029_trickle_tab_elem { |
463 | u32 r; /* resistance in ohms */ | |
464 | u8 conf; /* trickle config bits */ | |
465 | } rv3029_trickle_tab[] = { | |
466 | { | |
467 | .r = 1076, | |
468 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
469 | RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
470 | }, { | |
471 | .r = 1091, | |
472 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
473 | RV3029_TRICKLE_20K, | |
474 | }, { | |
475 | .r = 1137, | |
476 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K | | |
477 | RV3029_TRICKLE_80K, | |
478 | }, { | |
479 | .r = 1154, | |
480 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K, | |
481 | }, { | |
482 | .r = 1371, | |
483 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K | | |
484 | RV3029_TRICKLE_80K, | |
485 | }, { | |
486 | .r = 1395, | |
487 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K, | |
488 | }, { | |
489 | .r = 1472, | |
490 | .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K, | |
491 | }, { | |
492 | .r = 1500, | |
493 | .conf = RV3029_TRICKLE_1K, | |
494 | }, { | |
495 | .r = 3810, | |
496 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K | | |
497 | RV3029_TRICKLE_80K, | |
498 | }, { | |
499 | .r = 4000, | |
500 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K, | |
501 | }, { | |
502 | .r = 4706, | |
503 | .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K, | |
504 | }, { | |
505 | .r = 5000, | |
506 | .conf = RV3029_TRICKLE_5K, | |
507 | }, { | |
508 | .r = 16000, | |
509 | .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K, | |
510 | }, { | |
511 | .r = 20000, | |
512 | .conf = RV3029_TRICKLE_20K, | |
513 | }, { | |
514 | .r = 80000, | |
515 | .conf = RV3029_TRICKLE_80K, | |
516 | }, | |
517 | }; | |
518 | ||
e6e38082 | 519 | static void rv3029_trickle_config(struct device *dev) |
e27e2160 | 520 | { |
7518dd9a | 521 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
e6e38082 | 522 | struct device_node *of_node = dev->of_node; |
e27e2160 MB |
523 | const struct rv3029_trickle_tab_elem *elem; |
524 | int i, err; | |
525 | u32 ohms; | |
39387dc2 | 526 | u8 trickle_set_bits; |
e27e2160 MB |
527 | |
528 | if (!of_node) | |
529 | return; | |
530 | ||
531 | /* Configure the trickle charger. */ | |
e27e2160 MB |
532 | err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms); |
533 | if (err) { | |
534 | /* Disable trickle charger. */ | |
39387dc2 | 535 | trickle_set_bits = 0; |
e27e2160 MB |
536 | } else { |
537 | /* Enable trickle charger. */ | |
538 | for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) { | |
539 | elem = &rv3029_trickle_tab[i]; | |
540 | if (elem->r >= ohms) | |
541 | break; | |
542 | } | |
39387dc2 | 543 | trickle_set_bits = elem->conf; |
e6e38082 | 544 | dev_info(dev, |
e27e2160 MB |
545 | "Trickle charger enabled at %d ohms resistance.\n", |
546 | elem->r); | |
547 | } | |
7518dd9a | 548 | err = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL, |
39387dc2 MB |
549 | RV3029_TRICKLE_MASK, |
550 | trickle_set_bits); | |
abe2f551 | 551 | if (err < 0) |
e6e38082 | 552 | dev_err(dev, "Failed to update trickle charger config\n"); |
e27e2160 MB |
553 | } |
554 | ||
a696b31e MB |
555 | #ifdef CONFIG_RTC_DRV_RV3029_HWMON |
556 | ||
7518dd9a | 557 | static int rv3029_read_temp(struct rv3029_data *rv3029, int *temp_mC) |
a696b31e | 558 | { |
7518dd9a | 559 | unsigned int temp; |
a696b31e | 560 | int ret; |
a696b31e | 561 | |
7518dd9a | 562 | ret = regmap_read(rv3029->regmap, RV3029_TEMP_PAGE, &temp); |
a696b31e MB |
563 | if (ret < 0) |
564 | return ret; | |
565 | ||
566 | *temp_mC = ((int)temp - 60) * 1000; | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
571 | static ssize_t rv3029_hwmon_show_temp(struct device *dev, | |
572 | struct device_attribute *attr, | |
573 | char *buf) | |
574 | { | |
7518dd9a | 575 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
576 | int ret, temp_mC; |
577 | ||
7518dd9a | 578 | ret = rv3029_read_temp(rv3029, &temp_mC); |
a696b31e MB |
579 | if (ret < 0) |
580 | return ret; | |
581 | ||
582 | return sprintf(buf, "%d\n", temp_mC); | |
583 | } | |
584 | ||
585 | static ssize_t rv3029_hwmon_set_update_interval(struct device *dev, | |
586 | struct device_attribute *attr, | |
587 | const char *buf, | |
588 | size_t count) | |
589 | { | |
7518dd9a AB |
590 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
591 | unsigned int th_set_bits = 0; | |
a696b31e MB |
592 | unsigned long interval_ms; |
593 | int ret; | |
a696b31e MB |
594 | |
595 | ret = kstrtoul(buf, 10, &interval_ms); | |
596 | if (ret < 0) | |
597 | return ret; | |
598 | ||
599 | if (interval_ms != 0) { | |
600 | th_set_bits |= RV3029_EECTRL_THE; | |
601 | if (interval_ms >= 16000) | |
602 | th_set_bits |= RV3029_EECTRL_THP; | |
603 | } | |
7518dd9a | 604 | ret = rv3029_eeprom_update_bits(rv3029, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
605 | RV3029_EECTRL_THE | RV3029_EECTRL_THP, |
606 | th_set_bits); | |
607 | if (ret < 0) | |
608 | return ret; | |
609 | ||
610 | return count; | |
611 | } | |
612 | ||
613 | static ssize_t rv3029_hwmon_show_update_interval(struct device *dev, | |
614 | struct device_attribute *attr, | |
615 | char *buf) | |
616 | { | |
7518dd9a | 617 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
618 | int ret, interval_ms; |
619 | u8 eectrl; | |
620 | ||
7518dd9a | 621 | ret = rv3029_eeprom_read(rv3029, RV3029_CONTROL_E2P_EECTRL, |
a696b31e MB |
622 | &eectrl, 1); |
623 | if (ret < 0) | |
624 | return ret; | |
625 | ||
626 | if (eectrl & RV3029_EECTRL_THE) { | |
627 | if (eectrl & RV3029_EECTRL_THP) | |
628 | interval_ms = 16000; | |
629 | else | |
630 | interval_ms = 1000; | |
631 | } else { | |
632 | interval_ms = 0; | |
633 | } | |
634 | ||
635 | return sprintf(buf, "%d\n", interval_ms); | |
636 | } | |
637 | ||
638 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp, | |
639 | NULL, 0); | |
640 | static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO, | |
641 | rv3029_hwmon_show_update_interval, | |
642 | rv3029_hwmon_set_update_interval, 0); | |
643 | ||
644 | static struct attribute *rv3029_hwmon_attrs[] = { | |
645 | &sensor_dev_attr_temp1_input.dev_attr.attr, | |
646 | &sensor_dev_attr_update_interval.dev_attr.attr, | |
647 | NULL, | |
648 | }; | |
649 | ATTRIBUTE_GROUPS(rv3029_hwmon); | |
650 | ||
e6e38082 | 651 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e | 652 | { |
e6e38082 | 653 | struct rv3029_data *rv3029 = dev_get_drvdata(dev); |
a696b31e MB |
654 | struct device *hwmon_dev; |
655 | ||
e6e38082 MJ |
656 | hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029, |
657 | rv3029_hwmon_groups); | |
a696b31e | 658 | if (IS_ERR(hwmon_dev)) { |
e6e38082 | 659 | dev_warn(dev, "unable to register hwmon device %ld\n", |
4e7f1a60 | 660 | PTR_ERR(hwmon_dev)); |
a696b31e MB |
661 | } |
662 | } | |
663 | ||
664 | #else /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
665 | ||
e6e38082 | 666 | static void rv3029_hwmon_register(struct device *dev, const char *name) |
a696b31e MB |
667 | { |
668 | } | |
669 | ||
670 | #endif /* CONFIG_RTC_DRV_RV3029_HWMON */ | |
671 | ||
0ddc5b89 | 672 | static struct rtc_class_ops rv3029_rtc_ops = { |
e6e38082 MJ |
673 | .read_time = rv3029_read_time, |
674 | .set_time = rv3029_set_time, | |
52365230 HS |
675 | }; |
676 | ||
e6e38082 MJ |
677 | static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq, |
678 | const char *name) | |
52365230 | 679 | { |
e6e38082 | 680 | struct rv3029_data *rv3029; |
52365230 | 681 | int rc = 0; |
52365230 | 682 | |
e6e38082 MJ |
683 | rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL); |
684 | if (!rv3029) | |
685 | return -ENOMEM; | |
686 | ||
687 | rv3029->regmap = regmap; | |
688 | rv3029->irq = irq; | |
689 | rv3029->dev = dev; | |
690 | dev_set_drvdata(dev, rv3029); | |
52365230 | 691 | |
e6e38082 MJ |
692 | rv3029_trickle_config(dev); |
693 | rv3029_hwmon_register(dev, name); | |
694 | ||
695 | rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops, | |
696 | THIS_MODULE); | |
0ddc5b89 MJ |
697 | if (IS_ERR(rv3029->rtc)) { |
698 | dev_err(dev, "unable to register the class device\n"); | |
699 | return PTR_ERR(rv3029->rtc); | |
700 | } | |
e27e2160 | 701 | |
0ddc5b89 MJ |
702 | if (rv3029->irq > 0) { |
703 | rc = devm_request_threaded_irq(dev, rv3029->irq, | |
704 | NULL, rv3029_handle_irq, | |
705 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | |
706 | "rv3029", dev); | |
707 | if (rc) { | |
708 | dev_warn(dev, "unable to request IRQ, alarms disabled\n"); | |
709 | rv3029->irq = 0; | |
710 | } else { | |
711 | rv3029_rtc_ops.read_alarm = rv3029_read_alarm; | |
712 | rv3029_rtc_ops.set_alarm = rv3029_set_alarm; | |
713 | rv3029_rtc_ops.alarm_irq_enable = rv3029_alarm_irq_enable; | |
714 | } | |
715 | } | |
716 | ||
717 | return 0; | |
e6e38082 | 718 | } |
52365230 | 719 | |
c509e434 AB |
720 | static const struct regmap_range rv3029_holes_range[] = { |
721 | regmap_reg_range(0x05, 0x07), | |
722 | regmap_reg_range(0x0f, 0x0f), | |
723 | regmap_reg_range(0x17, 0x17), | |
724 | regmap_reg_range(0x1a, 0x1f), | |
725 | regmap_reg_range(0x21, 0x27), | |
726 | regmap_reg_range(0x34, 0x37), | |
727 | }; | |
728 | ||
729 | static const struct regmap_access_table rv3029_regs = { | |
730 | .no_ranges = rv3029_holes_range, | |
731 | .n_no_ranges = ARRAY_SIZE(rv3029_holes_range), | |
732 | }; | |
733 | ||
734 | static const struct regmap_config config = { | |
735 | .reg_bits = 8, | |
736 | .val_bits = 8, | |
737 | .rd_table = &rv3029_regs, | |
738 | .wr_table = &rv3029_regs, | |
739 | .max_register = 0x3f, | |
740 | }; | |
741 | ||
c2a1c145 MJ |
742 | #if IS_ENABLED(CONFIG_I2C) |
743 | ||
e6e38082 MJ |
744 | static int rv3029_i2c_probe(struct i2c_client *client, |
745 | const struct i2c_device_id *id) | |
746 | { | |
747 | struct regmap *regmap; | |
e6e38082 MJ |
748 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | |
749 | I2C_FUNC_SMBUS_BYTE)) { | |
750 | dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n"); | |
751 | return -ENODEV; | |
752 | } | |
52365230 | 753 | |
e6e38082 MJ |
754 | regmap = devm_regmap_init_i2c(client, &config); |
755 | if (IS_ERR(regmap)) { | |
756 | dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", | |
757 | __func__, PTR_ERR(regmap)); | |
758 | return PTR_ERR(regmap); | |
759 | } | |
52365230 | 760 | |
e6e38082 | 761 | return rv3029_probe(&client->dev, regmap, client->irq, client->name); |
52365230 HS |
762 | } |
763 | ||
45a63518 | 764 | static const struct i2c_device_id rv3029_id[] = { |
814db2bc AB |
765 | { "rv3029", 0 }, |
766 | { "rv3029c2", 0 }, | |
767 | { } | |
768 | }; | |
769 | MODULE_DEVICE_TABLE(i2c, rv3029_id); | |
770 | ||
e696a1dd | 771 | static const struct of_device_id rv3029_of_match[] = { |
45b611c8 AB |
772 | { .compatible = "microcrystal,rv3029" }, |
773 | /* Backward compatibility only, do not use compatibles below: */ | |
e696a1dd JMC |
774 | { .compatible = "rv3029" }, |
775 | { .compatible = "rv3029c2" }, | |
776 | { .compatible = "mc,rv3029c2" }, | |
777 | { } | |
778 | }; | |
779 | MODULE_DEVICE_TABLE(of, rv3029_of_match); | |
780 | ||
aba39d27 | 781 | static struct i2c_driver rv3029_driver = { |
52365230 | 782 | .driver = { |
9b45ef97 | 783 | .name = "rv3029", |
e696a1dd | 784 | .of_match_table = of_match_ptr(rv3029_of_match), |
52365230 | 785 | }, |
e6e38082 | 786 | .probe = rv3029_i2c_probe, |
aba39d27 | 787 | .id_table = rv3029_id, |
52365230 HS |
788 | }; |
789 | ||
c2a1c145 MJ |
790 | static int rv3029_register_driver(void) |
791 | { | |
792 | return i2c_add_driver(&rv3029_driver); | |
793 | } | |
794 | ||
795 | static void rv3029_unregister_driver(void) | |
796 | { | |
797 | i2c_del_driver(&rv3029_driver); | |
798 | } | |
799 | ||
800 | #else | |
801 | ||
802 | static int rv3029_register_driver(void) | |
803 | { | |
804 | return 0; | |
805 | } | |
806 | ||
807 | static void rv3029_unregister_driver(void) | |
808 | { | |
809 | } | |
810 | ||
811 | #endif | |
812 | ||
813 | #if IS_ENABLED(CONFIG_SPI_MASTER) | |
814 | ||
815 | static int rv3049_probe(struct spi_device *spi) | |
816 | { | |
c2a1c145 MJ |
817 | struct regmap *regmap; |
818 | ||
819 | regmap = devm_regmap_init_spi(spi, &config); | |
820 | if (IS_ERR(regmap)) { | |
821 | dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", | |
822 | __func__, PTR_ERR(regmap)); | |
823 | return PTR_ERR(regmap); | |
824 | } | |
825 | ||
826 | return rv3029_probe(&spi->dev, regmap, spi->irq, "rv3049"); | |
827 | } | |
828 | ||
829 | static struct spi_driver rv3049_driver = { | |
830 | .driver = { | |
831 | .name = "rv3049", | |
832 | }, | |
833 | .probe = rv3049_probe, | |
834 | }; | |
835 | ||
836 | static int rv3049_register_driver(void) | |
837 | { | |
838 | return spi_register_driver(&rv3049_driver); | |
839 | } | |
840 | ||
841 | static void rv3049_unregister_driver(void) | |
842 | { | |
843 | spi_unregister_driver(&rv3049_driver); | |
844 | } | |
845 | ||
846 | #else | |
847 | ||
848 | static int rv3049_register_driver(void) | |
849 | { | |
850 | return 0; | |
851 | } | |
852 | ||
853 | static void rv3049_unregister_driver(void) | |
854 | { | |
855 | } | |
856 | ||
857 | #endif | |
858 | ||
859 | static int __init rv30x9_init(void) | |
860 | { | |
861 | int ret; | |
862 | ||
863 | ret = rv3029_register_driver(); | |
864 | if (ret) { | |
865 | pr_err("Failed to register rv3029 driver: %d\n", ret); | |
866 | return ret; | |
867 | } | |
868 | ||
869 | ret = rv3049_register_driver(); | |
870 | if (ret) { | |
871 | pr_err("Failed to register rv3049 driver: %d\n", ret); | |
872 | rv3029_unregister_driver(); | |
873 | } | |
874 | ||
875 | return ret; | |
876 | } | |
877 | module_init(rv30x9_init) | |
878 | ||
879 | static void __exit rv30x9_exit(void) | |
880 | { | |
881 | rv3049_unregister_driver(); | |
882 | rv3029_unregister_driver(); | |
883 | } | |
884 | module_exit(rv30x9_exit) | |
52365230 HS |
885 | |
886 | MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>"); | |
2dca3d9e | 887 | MODULE_AUTHOR("Michael Buesch <m@bues.ch>"); |
c2a1c145 | 888 | MODULE_DESCRIPTION("Micro Crystal RV3029/RV3049 RTC driver"); |
52365230 | 889 | MODULE_LICENSE("GPL"); |
c2a1c145 | 890 | MODULE_ALIAS("spi:rv3049"); |