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rtc: rv3029: convert to use regmap
[mirror_ubuntu-jammy-kernel.git] / drivers / rtc / rtc-rv3029c2.c
CommitLineData
52365230 1/*
aba39d27 2 * Micro Crystal RV-3029 rtc class driver
52365230
HS		 3 *
4 * Author: Gregory Hermant <gregory.hermant@calao-systems.com>
2dca3d9e 5 * Michael Buesch <m@bues.ch>
52365230
HS		 6 *
7 * based on previously existing rtc class drivers
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
52365230
HS		 13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/bcd.h>
18#include <linux/rtc.h>
a7f6e287
MB		 19#include <linux/delay.h>
20#include <linux/of.h>
a696b31e
MB		 21#include <linux/hwmon.h>
22#include <linux/hwmon-sysfs.h>
e6e38082 23#include <linux/regmap.h>
52365230
HS		 24
25/* Register map */
26/* control section */
aba39d27 27#define RV3029_ONOFF_CTRL 0x00
7697de35
MB		 28#define RV3029_ONOFF_CTRL_WE BIT(0)
29#define RV3029_ONOFF_CTRL_TE BIT(1)
30#define RV3029_ONOFF_CTRL_TAR BIT(2)
31#define RV3029_ONOFF_CTRL_EERE BIT(3)
32#define RV3029_ONOFF_CTRL_SRON BIT(4)
33#define RV3029_ONOFF_CTRL_TD0 BIT(5)
34#define RV3029_ONOFF_CTRL_TD1 BIT(6)
35#define RV3029_ONOFF_CTRL_CLKINT BIT(7)
aba39d27 36#define RV3029_IRQ_CTRL 0x01
7697de35
MB		 37#define RV3029_IRQ_CTRL_AIE BIT(0)
38#define RV3029_IRQ_CTRL_TIE BIT(1)
39#define RV3029_IRQ_CTRL_V1IE BIT(2)
40#define RV3029_IRQ_CTRL_V2IE BIT(3)
41#define RV3029_IRQ_CTRL_SRIE BIT(4)
aba39d27 42#define RV3029_IRQ_FLAGS 0x02
7697de35
MB		 43#define RV3029_IRQ_FLAGS_AF BIT(0)
44#define RV3029_IRQ_FLAGS_TF BIT(1)
45#define RV3029_IRQ_FLAGS_V1IF BIT(2)
46#define RV3029_IRQ_FLAGS_V2IF BIT(3)
47#define RV3029_IRQ_FLAGS_SRF BIT(4)
aba39d27 48#define RV3029_STATUS 0x03
7697de35
MB		 49#define RV3029_STATUS_VLOW1 BIT(2)
50#define RV3029_STATUS_VLOW2 BIT(3)
51#define RV3029_STATUS_SR BIT(4)
52#define RV3029_STATUS_PON BIT(5)
53#define RV3029_STATUS_EEBUSY BIT(7)
aba39d27 54#define RV3029_RST_CTRL 0x04
7697de35 55#define RV3029_RST_CTRL_SYSR BIT(4)
aba39d27 56#define RV3029_CONTROL_SECTION_LEN 0x05
52365230
HS		 57
58/* watch section */
aba39d27
MB		 59#define RV3029_W_SEC 0x08
60#define RV3029_W_MINUTES 0x09
61#define RV3029_W_HOURS 0x0A
7697de35
MB		 62#define RV3029_REG_HR_12_24 BIT(6) /* 24h/12h mode */
63#define RV3029_REG_HR_PM BIT(5) /* PM/AM bit in 12h mode */
aba39d27
MB		 64#define RV3029_W_DATE 0x0B
65#define RV3029_W_DAYS 0x0C
66#define RV3029_W_MONTHS 0x0D
67#define RV3029_W_YEARS 0x0E
68#define RV3029_WATCH_SECTION_LEN 0x07
52365230
HS		 69
70/* alarm section */
aba39d27
MB		 71#define RV3029_A_SC 0x10
72#define RV3029_A_MN 0x11
73#define RV3029_A_HR 0x12
74#define RV3029_A_DT 0x13
75#define RV3029_A_DW 0x14
76#define RV3029_A_MO 0x15
77#define RV3029_A_YR 0x16
78#define RV3029_ALARM_SECTION_LEN 0x07
52365230
HS		 79
80/* timer section */
aba39d27
MB		 81#define RV3029_TIMER_LOW 0x18
82#define RV3029_TIMER_HIGH 0x19
52365230
HS		 83
84/* temperature section */
aba39d27 85#define RV3029_TEMP_PAGE 0x20
52365230
HS		 86
87/* eeprom data section */
aba39d27
MB		 88#define RV3029_E2P_EEDATA1 0x28
89#define RV3029_E2P_EEDATA2 0x29
7697de35 90#define RV3029_E2PDATA_SECTION_LEN 0x02
52365230
HS		 91
92/* eeprom control section */
aba39d27 93#define RV3029_CONTROL_E2P_EECTRL 0x30
7697de35
MB		 94#define RV3029_EECTRL_THP BIT(0) /* temp scan interval */
95#define RV3029_EECTRL_THE BIT(1) /* thermometer enable */
96#define RV3029_EECTRL_FD0 BIT(2) /* CLKOUT */
97#define RV3029_EECTRL_FD1 BIT(3) /* CLKOUT */
98#define RV3029_TRICKLE_1K BIT(4) /* 1.5K resistance */
99#define RV3029_TRICKLE_5K BIT(5) /* 5K resistance */
100#define RV3029_TRICKLE_20K BIT(6) /* 20K resistance */
101#define RV3029_TRICKLE_80K BIT(7) /* 80K resistance */
102#define RV3029_TRICKLE_MASK (RV3029_TRICKLE_1K |\
103 RV3029_TRICKLE_5K |\
104 RV3029_TRICKLE_20K |\
105 RV3029_TRICKLE_80K)
106#define RV3029_TRICKLE_SHIFT 4
107#define RV3029_CONTROL_E2P_XOFFS 0x31 /* XTAL offset */
108#define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
109#define RV3029_CONTROL_E2P_QCOEF 0x32 /* XTAL temp drift coef */
110#define RV3029_CONTROL_E2P_TURNOVER 0x33 /* XTAL turnover temp (in *C) */
111#define RV3029_CONTROL_E2P_TOV_MASK 0x3F /* XTAL turnover temp mask */
52365230
HS		 112
113/* user ram section */
aba39d27
MB		 114#define RV3029_USR1_RAM_PAGE 0x38
115#define RV3029_USR1_SECTION_LEN 0x04
116#define RV3029_USR2_RAM_PAGE 0x3C
117#define RV3029_USR2_SECTION_LEN 0x04
52365230 118
e6e38082
MJ		 119struct rv3029_data {
120 struct device *dev;
121 struct rtc_device *rtc;
122 struct regmap *regmap;
123 int irq;
124};
125
126static int rv3029_read_regs(struct device *dev, u8 reg, u8 *buf,
4e7f1a60 127 unsigned len)
52365230 128{
e6e38082 129 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
52365230 130
aba39d27
MB		 131 if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
132 (reg + len > RV3029_USR1_RAM_PAGE + 8))
52365230
HS		 133 return -EINVAL;
134
e6e38082 135 return regmap_bulk_read(rv3029->regmap, reg, buf, len);
52365230
HS		 136}
137
e6e38082 138static int rv3029_write_regs(struct device *dev, u8 reg, u8 const buf[],
4e7f1a60 139 unsigned len)
52365230 140{
e6e38082
MJ		 141 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
142
aba39d27
MB		 143 if ((reg > RV3029_USR1_RAM_PAGE + 7) ||
144 (reg + len > RV3029_USR1_RAM_PAGE + 8))
52365230
HS		 145 return -EINVAL;
146
e6e38082 147 return regmap_bulk_write(rv3029->regmap, reg, buf, len);
52365230
HS		 148}
149
e6e38082 150static int rv3029_update_bits(struct device *dev, u8 reg, u8 mask, u8 set)
2dca3d9e
MB		 151{
152 u8 buf;
153 int ret;
154
e6e38082 155 ret = rv3029_read_regs(dev, reg, &buf, 1);
2dca3d9e
MB		 156 if (ret < 0)
157 return ret;
158 buf &= ~mask;
159 buf |= set & mask;
e6e38082 160 ret = rv3029_write_regs(dev, reg, &buf, 1);
2dca3d9e
MB		 161 if (ret < 0)
162 return ret;
163
164 return 0;
165}
166
e6e38082 167static int rv3029_get_sr(struct device *dev, u8 *buf)
52365230 168{
e6e38082 169 int ret = rv3029_read_regs(dev, RV3029_STATUS, buf, 1);
52365230
HS		 170
171 if (ret < 0)
172 return -EIO;
e6e38082 173 dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
52365230
HS		 174 return 0;
175}
176
e6e38082 177static int rv3029_set_sr(struct device *dev, u8 val)
52365230
HS		 178{
179 u8 buf[1];
180 int sr;
181
182 buf[0] = val;
e6e38082
MJ		 183 sr = rv3029_write_regs(dev, RV3029_STATUS, buf, 1);
184 dev_dbg(dev, "status = 0x%.2x (%d)\n", buf[0], buf[0]);
52365230
HS		 185 if (sr < 0)
186 return -EIO;
187 return 0;
188}
189
e6e38082 190static int rv3029_eeprom_busywait(struct device *dev)
a7f6e287
MB		 191{
192 int i, ret;
193 u8 sr;
194
195 for (i = 100; i > 0; i--) {
e6e38082 196 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 197 if (ret < 0)
198 break;
199 if (!(sr & RV3029_STATUS_EEBUSY))
200 break;
201 usleep_range(1000, 10000);
202 }
203 if (i <= 0) {
e6e38082 204 dev_err(dev, "EEPROM busy wait timeout.\n");
a7f6e287
MB		 205 return -ETIMEDOUT;
206 }
207
208 return ret;
209}
210
e6e38082 211static int rv3029_eeprom_exit(struct device *dev)
a7f6e287
MB		 212{
213 /* Re-enable eeprom refresh */
e6e38082 214 return rv3029_update_bits(dev, RV3029_ONOFF_CTRL,
4e7f1a60
MJ		 215 RV3029_ONOFF_CTRL_EERE,
216 RV3029_ONOFF_CTRL_EERE);
a7f6e287
MB		 217}
218
e6e38082 219static int rv3029_eeprom_enter(struct device *dev)
a7f6e287
MB		 220{
221 int ret;
222 u8 sr;
223
224 /* Check whether we are in the allowed voltage range. */
e6e38082 225 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 226 if (ret < 0)
227 return ret;
228 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
229 /* We clear the bits and retry once just in case
230 * we had a brown out in early startup.
231 */
232 sr &= ~RV3029_STATUS_VLOW1;
233 sr &= ~RV3029_STATUS_VLOW2;
e6e38082 234 ret = rv3029_set_sr(dev, sr);
a7f6e287
MB		 235 if (ret < 0)
236 return ret;
237 usleep_range(1000, 10000);
e6e38082 238 ret = rv3029_get_sr(dev, &sr);
a7f6e287
MB		 239 if (ret < 0)
240 return ret;
241 if (sr & (RV3029_STATUS_VLOW1 | RV3029_STATUS_VLOW2)) {
e6e38082 242 dev_err(dev,
a7f6e287
MB		 243 "Supply voltage is too low to safely access the EEPROM.\n");
244 return -ENODEV;
245 }
246 }
247
248 /* Disable eeprom refresh. */
e6e38082
MJ		 249 ret = rv3029_update_bits(dev, RV3029_ONOFF_CTRL, RV3029_ONOFF_CTRL_EERE,
250 0);
a7f6e287
MB		 251 if (ret < 0)
252 return ret;
253
254 /* Wait for any previous eeprom accesses to finish. */
e6e38082 255 ret = rv3029_eeprom_busywait(dev);
a7f6e287 256 if (ret < 0)
e6e38082 257 rv3029_eeprom_exit(dev);
a7f6e287
MB		 258
259 return ret;
260}
261
e6e38082 262static int rv3029_eeprom_read(struct device *dev, u8 reg,
a7f6e287
MB		 263 u8 buf[], size_t len)
264{
265 int ret, err;
266
e6e38082 267 err = rv3029_eeprom_enter(dev);
a7f6e287
MB		 268 if (err < 0)
269 return err;
270
e6e38082 271 ret = rv3029_read_regs(dev, reg, buf, len);
a7f6e287 272
e6e38082 273 err = rv3029_eeprom_exit(dev);
a7f6e287
MB		 274 if (err < 0)
275 return err;
276
277 return ret;
278}
279
e6e38082 280static int rv3029_eeprom_write(struct device *dev, u8 reg,
a7f6e287
MB		 281 u8 const buf[], size_t len)
282{
283 int ret, err;
284 size_t i;
285 u8 tmp;
286
e6e38082 287 err = rv3029_eeprom_enter(dev);
a7f6e287
MB		 288 if (err < 0)
289 return err;
290
291 for (i = 0; i < len; i++, reg++) {
e6e38082 292 ret = rv3029_read_regs(dev, reg, &tmp, 1);
a7f6e287
MB		 293 if (ret < 0)
294 break;
295 if (tmp != buf[i]) {
e6e38082 296 ret = rv3029_write_regs(dev, reg, &buf[i], 1);
a7f6e287
MB		 297 if (ret < 0)
298 break;
299 }
e6e38082 300 ret = rv3029_eeprom_busywait(dev);
a7f6e287
MB		 301 if (ret < 0)
302 break;
303 }
304
e6e38082 305 err = rv3029_eeprom_exit(dev);
a7f6e287
MB		 306 if (err < 0)
307 return err;
308
309 return ret;
310}
311
e6e38082 312static int rv3029_eeprom_update_bits(struct device *dev,
39387dc2
MB		 313 u8 reg, u8 mask, u8 set)
314{
315 u8 buf;
316 int ret;
317
e6e38082 318 ret = rv3029_eeprom_read(dev, reg, &buf, 1);
39387dc2
MB		 319 if (ret < 0)
320 return ret;
321 buf &= ~mask;
322 buf |= set & mask;
e6e38082 323 ret = rv3029_eeprom_write(dev, reg, &buf, 1);
39387dc2
MB		 324 if (ret < 0)
325 return ret;
326
327 return 0;
328}
329
e6e38082 330static int rv3029_read_time(struct device *dev, struct rtc_time *tm)
52365230
HS		 331{
332 u8 buf[1];
333 int ret;
aba39d27 334 u8 regs[RV3029_WATCH_SECTION_LEN] = { 0, };
52365230 335
e6e38082 336 ret = rv3029_get_sr(dev, buf);
52365230 337 if (ret < 0) {
e6e38082 338 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 339 return -EIO;
340 }
341
e6e38082 342 ret = rv3029_read_regs(dev, RV3029_W_SEC, regs,
4e7f1a60 343 RV3029_WATCH_SECTION_LEN);
52365230 344 if (ret < 0) {
e6e38082 345 dev_err(dev, "%s: reading RTC section failed\n", __func__);
52365230
HS		 346 return ret;
347 }
348
aba39d27
MB		 349 tm->tm_sec = bcd2bin(regs[RV3029_W_SEC-RV3029_W_SEC]);
350 tm->tm_min = bcd2bin(regs[RV3029_W_MINUTES-RV3029_W_SEC]);
52365230
HS		 351
352 /* HR field has a more complex interpretation */
353 {
aba39d27
MB		 354 const u8 _hr = regs[RV3029_W_HOURS-RV3029_W_SEC];
355
356 if (_hr & RV3029_REG_HR_12_24) {
52365230
HS		 357 /* 12h format */
358 tm->tm_hour = bcd2bin(_hr & 0x1f);
aba39d27 359 if (_hr & RV3029_REG_HR_PM) /* PM flag set */
52365230
HS		 360 tm->tm_hour += 12;
361 } else /* 24h format */
362 tm->tm_hour = bcd2bin(_hr & 0x3f);
363 }
364
aba39d27
MB		 365 tm->tm_mday = bcd2bin(regs[RV3029_W_DATE-RV3029_W_SEC]);
366 tm->tm_mon = bcd2bin(regs[RV3029_W_MONTHS-RV3029_W_SEC]) - 1;
367 tm->tm_year = bcd2bin(regs[RV3029_W_YEARS-RV3029_W_SEC]) + 100;
368 tm->tm_wday = bcd2bin(regs[RV3029_W_DAYS-RV3029_W_SEC]) - 1;
52365230
HS		 369
370 return 0;
371}
372
e6e38082 373static int rv3029_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
52365230
HS		 374{
375 struct rtc_time *const tm = &alarm->time;
376 int ret;
377 u8 regs[8];
378
e6e38082 379 ret = rv3029_get_sr(dev, regs);
52365230 380 if (ret < 0) {
e6e38082 381 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 382 return -EIO;
383 }
384
e6e38082 385 ret = rv3029_read_regs(dev, RV3029_A_SC, regs,
4e7f1a60 386 RV3029_ALARM_SECTION_LEN);
52365230
HS		 387
388 if (ret < 0) {
e6e38082 389 dev_err(dev, "%s: reading alarm section failed\n", __func__);
52365230
HS		 390 return ret;
391 }
392
aba39d27
MB		 393 tm->tm_sec = bcd2bin(regs[RV3029_A_SC-RV3029_A_SC] & 0x7f);
394 tm->tm_min = bcd2bin(regs[RV3029_A_MN-RV3029_A_SC] & 0x7f);
395 tm->tm_hour = bcd2bin(regs[RV3029_A_HR-RV3029_A_SC] & 0x3f);
396 tm->tm_mday = bcd2bin(regs[RV3029_A_DT-RV3029_A_SC] & 0x3f);
397 tm->tm_mon = bcd2bin(regs[RV3029_A_MO-RV3029_A_SC] & 0x1f) - 1;
398 tm->tm_year = bcd2bin(regs[RV3029_A_YR-RV3029_A_SC] & 0x7f) + 100;
399 tm->tm_wday = bcd2bin(regs[RV3029_A_DW-RV3029_A_SC] & 0x07) - 1;
52365230
HS		 400
401 return 0;
402}
403
e6e38082 404static int rv3029_rtc_alarm_set_irq(struct device *dev, int enable)
52365230
HS		 405{
406 int ret;
52365230 407
2dca3d9e 408 /* enable/disable AIE irq */
e6e38082 409 ret = rv3029_update_bits(dev, RV3029_IRQ_CTRL, RV3029_IRQ_CTRL_AIE,
4e7f1a60 410 (enable ? RV3029_IRQ_CTRL_AIE : 0));
52365230 411 if (ret < 0) {
e6e38082 412 dev_err(dev, "can't update INT reg\n");
52365230
HS		 413 return ret;
414 }
415
416 return 0;
417}
418
e6e38082 419static int rv3029_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
52365230
HS		 420{
421 struct rtc_time *const tm = &alarm->time;
422 int ret;
423 u8 regs[8];
424
425 /*
426 * The clock has an 8 bit wide bcd-coded register (they never learn)
427 * for the year. tm_year is an offset from 1900 and we are interested
428 * in the 2000-2099 range, so any value less than 100 is invalid.
429 */
430 if (tm->tm_year < 100)
431 return -EINVAL;
432
e6e38082 433 ret = rv3029_get_sr(dev, regs);
52365230 434 if (ret < 0) {
e6e38082 435 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 436 return -EIO;
437 }
aba39d27
MB		 438 regs[RV3029_A_SC-RV3029_A_SC] = bin2bcd(tm->tm_sec & 0x7f);
439 regs[RV3029_A_MN-RV3029_A_SC] = bin2bcd(tm->tm_min & 0x7f);
440 regs[RV3029_A_HR-RV3029_A_SC] = bin2bcd(tm->tm_hour & 0x3f);
441 regs[RV3029_A_DT-RV3029_A_SC] = bin2bcd(tm->tm_mday & 0x3f);
442 regs[RV3029_A_MO-RV3029_A_SC] = bin2bcd((tm->tm_mon & 0x1f) - 1);
443 regs[RV3029_A_DW-RV3029_A_SC] = bin2bcd((tm->tm_wday & 7) - 1);
444 regs[RV3029_A_YR-RV3029_A_SC] = bin2bcd((tm->tm_year & 0x7f) - 100);
445
e6e38082 446 ret = rv3029_write_regs(dev, RV3029_A_SC, regs,
4e7f1a60 447 RV3029_ALARM_SECTION_LEN);
52365230
HS		 448 if (ret < 0)
449 return ret;
450
451 if (alarm->enabled) {
52365230 452 /* clear AF flag */
e6e38082 453 ret = rv3029_update_bits(dev, RV3029_IRQ_FLAGS,
4e7f1a60 454 RV3029_IRQ_FLAGS_AF, 0);
52365230 455 if (ret < 0) {
e6e38082 456 dev_err(dev, "can't clear alarm flag\n");
52365230
HS		 457 return ret;
458 }
459 /* enable AIE irq */
e6e38082 460 ret = rv3029_rtc_alarm_set_irq(dev, 1);
52365230
HS		 461 if (ret)
462 return ret;
463
e6e38082 464 dev_dbg(dev, "alarm IRQ armed\n");
52365230
HS		 465 } else {
466 /* disable AIE irq */
e6e38082 467 ret = rv3029_rtc_alarm_set_irq(dev, 0);
52365230
HS		 468 if (ret)
469 return ret;
470
e6e38082 471 dev_dbg(dev, "alarm IRQ disabled\n");
52365230
HS		 472 }
473
474 return 0;
475}
476
e6e38082 477static int rv3029_set_time(struct device *dev, struct rtc_time *tm)
52365230
HS		 478{
479 u8 regs[8];
480 int ret;
481
482 /*
483 * The clock has an 8 bit wide bcd-coded register (they never learn)
484 * for the year. tm_year is an offset from 1900 and we are interested
485 * in the 2000-2099 range, so any value less than 100 is invalid.
486 */
487 if (tm->tm_year < 100)
488 return -EINVAL;
489
aba39d27
MB		 490 regs[RV3029_W_SEC-RV3029_W_SEC] = bin2bcd(tm->tm_sec);
491 regs[RV3029_W_MINUTES-RV3029_W_SEC] = bin2bcd(tm->tm_min);
492 regs[RV3029_W_HOURS-RV3029_W_SEC] = bin2bcd(tm->tm_hour);
493 regs[RV3029_W_DATE-RV3029_W_SEC] = bin2bcd(tm->tm_mday);
494 regs[RV3029_W_MONTHS-RV3029_W_SEC] = bin2bcd(tm->tm_mon+1);
495 regs[RV3029_W_DAYS-RV3029_W_SEC] = bin2bcd((tm->tm_wday & 7)+1);
496 regs[RV3029_W_YEARS-RV3029_W_SEC] = bin2bcd(tm->tm_year - 100);
52365230 497
e6e38082 498 ret = rv3029_write_regs(dev, RV3029_W_SEC, regs,
4e7f1a60 499 RV3029_WATCH_SECTION_LEN);
52365230
HS		 500 if (ret < 0)
501 return ret;
502
e6e38082 503 ret = rv3029_get_sr(dev, regs);
52365230 504 if (ret < 0) {
e6e38082 505 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 506 return ret;
507 }
508 /* clear PON bit */
e6e38082 509 ret = rv3029_set_sr(dev, (regs[0] & ~RV3029_STATUS_PON));
52365230 510 if (ret < 0) {
e6e38082 511 dev_err(dev, "%s: reading SR failed\n", __func__);
52365230
HS		 512 return ret;
513 }
514
515 return 0;
516}
e27e2160
MB		 517static const struct rv3029_trickle_tab_elem {
518 u32 r; /* resistance in ohms */
519 u8 conf; /* trickle config bits */
520} rv3029_trickle_tab[] = {
521 {
522 .r = 1076,
523 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
524 RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
525 }, {
526 .r = 1091,
527 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
528 RV3029_TRICKLE_20K,
529 }, {
530 .r = 1137,
531 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K |
532 RV3029_TRICKLE_80K,
533 }, {
534 .r = 1154,
535 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_5K,
536 }, {
537 .r = 1371,
538 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K |
539 RV3029_TRICKLE_80K,
540 }, {
541 .r = 1395,
542 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_20K,
543 }, {
544 .r = 1472,
545 .conf = RV3029_TRICKLE_1K | RV3029_TRICKLE_80K,
546 }, {
547 .r = 1500,
548 .conf = RV3029_TRICKLE_1K,
549 }, {
550 .r = 3810,
551 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K |
552 RV3029_TRICKLE_80K,
553 }, {
554 .r = 4000,
555 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_20K,
556 }, {
557 .r = 4706,
558 .conf = RV3029_TRICKLE_5K | RV3029_TRICKLE_80K,
559 }, {
560 .r = 5000,
561 .conf = RV3029_TRICKLE_5K,
562 }, {
563 .r = 16000,
564 .conf = RV3029_TRICKLE_20K | RV3029_TRICKLE_80K,
565 }, {
566 .r = 20000,
567 .conf = RV3029_TRICKLE_20K,
568 }, {
569 .r = 80000,
570 .conf = RV3029_TRICKLE_80K,
571 },
572};
573
e6e38082 574static void rv3029_trickle_config(struct device *dev)
e27e2160 575{
e6e38082 576 struct device_node *of_node = dev->of_node;
e27e2160
MB		 577 const struct rv3029_trickle_tab_elem *elem;
578 int i, err;
579 u32 ohms;
39387dc2 580 u8 trickle_set_bits;
e27e2160
MB		 581
582 if (!of_node)
583 return;
584
585 /* Configure the trickle charger. */
e27e2160
MB		 586 err = of_property_read_u32(of_node, "trickle-resistor-ohms", &ohms);
587 if (err) {
588 /* Disable trickle charger. */
39387dc2 589 trickle_set_bits = 0;
e27e2160
MB		 590 } else {
591 /* Enable trickle charger. */
592 for (i = 0; i < ARRAY_SIZE(rv3029_trickle_tab); i++) {
593 elem = &rv3029_trickle_tab[i];
594 if (elem->r >= ohms)
595 break;
596 }
39387dc2 597 trickle_set_bits = elem->conf;
e6e38082 598 dev_info(dev,
e27e2160
MB		 599 "Trickle charger enabled at %d ohms resistance.\n",
600 elem->r);
601 }
e6e38082 602 err = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
39387dc2
MB		 603 RV3029_TRICKLE_MASK,
604 trickle_set_bits);
e27e2160 605 if (err < 0) {
e6e38082 606 dev_err(dev, "Failed to update trickle charger config\n");
e27e2160
MB		 607 }
608}
609
a696b31e
MB		 610#ifdef CONFIG_RTC_DRV_RV3029_HWMON
611
e6e38082 612static int rv3029_read_temp(struct device *dev, int *temp_mC)
a696b31e
MB		 613{
614 int ret;
615 u8 temp;
616
e6e38082 617 ret = rv3029_read_regs(dev, RV3029_TEMP_PAGE, &temp, 1);
a696b31e
MB		 618 if (ret < 0)
619 return ret;
620
621 *temp_mC = ((int)temp - 60) * 1000;
622
623 return 0;
624}
625
626static ssize_t rv3029_hwmon_show_temp(struct device *dev,
627 struct device_attribute *attr,
628 char *buf)
629{
a696b31e
MB		 630 int ret, temp_mC;
631
e6e38082 632 ret = rv3029_read_temp(dev, &temp_mC);
a696b31e
MB		 633 if (ret < 0)
634 return ret;
635
636 return sprintf(buf, "%d\n", temp_mC);
637}
638
639static ssize_t rv3029_hwmon_set_update_interval(struct device *dev,
640 struct device_attribute *attr,
641 const char *buf,
642 size_t count)
643{
a696b31e
MB		 644 unsigned long interval_ms;
645 int ret;
646 u8 th_set_bits = 0;
647
648 ret = kstrtoul(buf, 10, &interval_ms);
649 if (ret < 0)
650 return ret;
651
652 if (interval_ms != 0) {
653 th_set_bits |= RV3029_EECTRL_THE;
654 if (interval_ms >= 16000)
655 th_set_bits |= RV3029_EECTRL_THP;
656 }
e6e38082 657 ret = rv3029_eeprom_update_bits(dev, RV3029_CONTROL_E2P_EECTRL,
a696b31e
MB		 658 RV3029_EECTRL_THE | RV3029_EECTRL_THP,
659 th_set_bits);
660 if (ret < 0)
661 return ret;
662
663 return count;
664}
665
666static ssize_t rv3029_hwmon_show_update_interval(struct device *dev,
667 struct device_attribute *attr,
668 char *buf)
669{
a696b31e
MB		 670 int ret, interval_ms;
671 u8 eectrl;
672
e6e38082 673 ret = rv3029_eeprom_read(dev, RV3029_CONTROL_E2P_EECTRL,
a696b31e
MB		 674 &eectrl, 1);
675 if (ret < 0)
676 return ret;
677
678 if (eectrl & RV3029_EECTRL_THE) {
679 if (eectrl & RV3029_EECTRL_THP)
680 interval_ms = 16000;
681 else
682 interval_ms = 1000;
683 } else {
684 interval_ms = 0;
685 }
686
687 return sprintf(buf, "%d\n", interval_ms);
688}
689
690static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, rv3029_hwmon_show_temp,
691 NULL, 0);
692static SENSOR_DEVICE_ATTR(update_interval, S_IWUSR | S_IRUGO,
693 rv3029_hwmon_show_update_interval,
694 rv3029_hwmon_set_update_interval, 0);
695
696static struct attribute *rv3029_hwmon_attrs[] = {
697 &sensor_dev_attr_temp1_input.dev_attr.attr,
698 &sensor_dev_attr_update_interval.dev_attr.attr,
699 NULL,
700};
701ATTRIBUTE_GROUPS(rv3029_hwmon);
702
e6e38082 703static void rv3029_hwmon_register(struct device *dev, const char *name)
a696b31e 704{
e6e38082 705 struct rv3029_data *rv3029 = dev_get_drvdata(dev);
a696b31e
MB		 706 struct device *hwmon_dev;
707
e6e38082
MJ		 708 hwmon_dev = devm_hwmon_device_register_with_groups(dev, name, rv3029,
709 rv3029_hwmon_groups);
a696b31e 710 if (IS_ERR(hwmon_dev)) {
e6e38082 711 dev_warn(dev, "unable to register hwmon device %ld\n",
4e7f1a60 712 PTR_ERR(hwmon_dev));
a696b31e
MB		 713 }
714}
715
716#else /* CONFIG_RTC_DRV_RV3029_HWMON */
717
e6e38082 718static void rv3029_hwmon_register(struct device *dev, const char *name)
a696b31e
MB		 719{
720}
721
722#endif /* CONFIG_RTC_DRV_RV3029_HWMON */
723
aba39d27 724static const struct rtc_class_ops rv3029_rtc_ops = {
e6e38082
MJ		 725 .read_time = rv3029_read_time,
726 .set_time = rv3029_set_time,
727 .read_alarm = rv3029_read_alarm,
728 .set_alarm = rv3029_set_alarm,
52365230
HS		 729};
730
aba39d27 731static struct i2c_device_id rv3029_id[] = {
baba623f 732 { "rv3029", 0 },
52365230
HS		 733 { "rv3029c2", 0 },
734 { }
735};
aba39d27 736MODULE_DEVICE_TABLE(i2c, rv3029_id);
52365230 737
e6e38082
MJ		 738static int rv3029_probe(struct device *dev, struct regmap *regmap, int irq,
739 const char *name)
52365230 740{
e6e38082 741 struct rv3029_data *rv3029;
52365230
HS		 742 int rc = 0;
743 u8 buf[1];
744
e6e38082
MJ		 745 rv3029 = devm_kzalloc(dev, sizeof(*rv3029), GFP_KERNEL);
746 if (!rv3029)
747 return -ENOMEM;
748
749 rv3029->regmap = regmap;
750 rv3029->irq = irq;
751 rv3029->dev = dev;
752 dev_set_drvdata(dev, rv3029);
52365230 753
e6e38082 754 rc = rv3029_get_sr(dev, buf);
67ab2440 755 if (rc < 0) {
e6e38082 756 dev_err(dev, "reading status failed\n");
67ab2440
GH		 757 return rc;
758 }
759
e6e38082
MJ		 760 rv3029_trickle_config(dev);
761 rv3029_hwmon_register(dev, name);
762
763 rv3029->rtc = devm_rtc_device_register(dev, name, &rv3029_rtc_ops,
764 THIS_MODULE);
e27e2160 765
e6e38082
MJ		 766 return PTR_ERR_OR_ZERO(rv3029->rtc);
767}
52365230 768
e6e38082
MJ		 769static int rv3029_i2c_probe(struct i2c_client *client,
770 const struct i2c_device_id *id)
771{
772 struct regmap *regmap;
773 static const struct regmap_config config = {
774 .reg_bits = 8,
775 .val_bits = 8,
776 };
777
778 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK |
779 I2C_FUNC_SMBUS_BYTE)) {
780 dev_err(&client->dev, "Adapter does not support SMBUS_I2C_BLOCK or SMBUS_I2C_BYTE\n");
781 return -ENODEV;
782 }
52365230 783
e6e38082
MJ		 784 regmap = devm_regmap_init_i2c(client, &config);
785 if (IS_ERR(regmap)) {
786 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n",
787 __func__, PTR_ERR(regmap));
788 return PTR_ERR(regmap);
789 }
52365230 790
e6e38082 791 return rv3029_probe(&client->dev, regmap, client->irq, client->name);
52365230
HS		 792}
793
aba39d27 794static struct i2c_driver rv3029_driver = {
52365230
HS		 795 .driver = {
796 .name = "rtc-rv3029c2",
797 },
e6e38082 798 .probe = rv3029_i2c_probe,
aba39d27 799 .id_table = rv3029_id,
52365230
HS		 800};
801
aba39d27 802module_i2c_driver(rv3029_driver);
52365230
HS		 803
804MODULE_AUTHOR("Gregory Hermant <gregory.hermant@calao-systems.com>");
2dca3d9e 805MODULE_AUTHOR("Michael Buesch <m@bues.ch>");
aba39d27 806MODULE_DESCRIPTION("Micro Crystal RV3029 RTC driver");
52365230 807MODULE_LICENSE("GPL");
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