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Commit | Line | Data |
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c46288b0 BB |
1 | /* |
2 | * Seiko Instruments S-35390A RTC Driver | |
3 | * | |
4 | * Copyright (c) 2007 Byron Bradley | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
12 | #include <linux/module.h> | |
13 | #include <linux/rtc.h> | |
14 | #include <linux/i2c.h> | |
15 | #include <linux/bitrev.h> | |
16 | #include <linux/bcd.h> | |
17 | #include <linux/slab.h> | |
8e6583f1 | 18 | #include <linux/delay.h> |
c46288b0 BB |
19 | |
20 | #define S35390A_CMD_STATUS1 0 | |
21 | #define S35390A_CMD_STATUS2 1 | |
22 | #define S35390A_CMD_TIME1 2 | |
542dd33a ML |
23 | #define S35390A_CMD_TIME2 3 |
24 | #define S35390A_CMD_INT2_REG1 5 | |
c46288b0 BB |
25 | |
26 | #define S35390A_BYTE_YEAR 0 | |
27 | #define S35390A_BYTE_MONTH 1 | |
28 | #define S35390A_BYTE_DAY 2 | |
29 | #define S35390A_BYTE_WDAY 3 | |
30 | #define S35390A_BYTE_HOURS 4 | |
31 | #define S35390A_BYTE_MINS 5 | |
32 | #define S35390A_BYTE_SECS 6 | |
33 | ||
542dd33a ML |
34 | #define S35390A_ALRM_BYTE_WDAY 0 |
35 | #define S35390A_ALRM_BYTE_HOURS 1 | |
36 | #define S35390A_ALRM_BYTE_MINS 2 | |
37 | ||
3bd32722 | 38 | /* flags for STATUS1 */ |
c46288b0 BB |
39 | #define S35390A_FLAG_POC 0x01 |
40 | #define S35390A_FLAG_BLD 0x02 | |
3bd32722 | 41 | #define S35390A_FLAG_INT2 0x04 |
c46288b0 BB |
42 | #define S35390A_FLAG_24H 0x40 |
43 | #define S35390A_FLAG_RESET 0x80 | |
3bd32722 UKK |
44 | |
45 | /* flag for STATUS2 */ | |
c46288b0 BB |
46 | #define S35390A_FLAG_TEST 0x01 |
47 | ||
542dd33a ML |
48 | #define S35390A_INT2_MODE_MASK 0xF0 |
49 | ||
50 | #define S35390A_INT2_MODE_NOINTR 0x00 | |
51 | #define S35390A_INT2_MODE_FREQ 0x10 | |
52 | #define S35390A_INT2_MODE_ALARM 0x40 | |
53 | #define S35390A_INT2_MODE_PMIN_EDG 0x20 | |
54 | ||
3760f736 JD |
55 | static const struct i2c_device_id s35390a_id[] = { |
56 | { "s35390a", 0 }, | |
57 | { } | |
58 | }; | |
59 | MODULE_DEVICE_TABLE(i2c, s35390a_id); | |
60 | ||
21f27432 JMC |
61 | static const struct of_device_id s35390a_of_match[] = { |
62 | { .compatible = "s35390a" }, | |
63 | { .compatible = "sii,s35390a" }, | |
64 | { } | |
65 | }; | |
66 | MODULE_DEVICE_TABLE(of, s35390a_of_match); | |
67 | ||
c46288b0 BB |
68 | struct s35390a { |
69 | struct i2c_client *client[8]; | |
70 | struct rtc_device *rtc; | |
71 | int twentyfourhour; | |
72 | }; | |
73 | ||
74 | static int s35390a_set_reg(struct s35390a *s35390a, int reg, char *buf, int len) | |
75 | { | |
76 | struct i2c_client *client = s35390a->client[reg]; | |
77 | struct i2c_msg msg[] = { | |
65659f63 S |
78 | { |
79 | .addr = client->addr, | |
80 | .len = len, | |
81 | .buf = buf | |
82 | }, | |
c46288b0 BB |
83 | }; |
84 | ||
85 | if ((i2c_transfer(client->adapter, msg, 1)) != 1) | |
86 | return -EIO; | |
87 | ||
88 | return 0; | |
89 | } | |
90 | ||
91 | static int s35390a_get_reg(struct s35390a *s35390a, int reg, char *buf, int len) | |
92 | { | |
93 | struct i2c_client *client = s35390a->client[reg]; | |
94 | struct i2c_msg msg[] = { | |
65659f63 S |
95 | { |
96 | .addr = client->addr, | |
97 | .flags = I2C_M_RD, | |
98 | .len = len, | |
99 | .buf = buf | |
100 | }, | |
c46288b0 BB |
101 | }; |
102 | ||
103 | if ((i2c_transfer(client->adapter, msg, 1)) != 1) | |
104 | return -EIO; | |
105 | ||
106 | return 0; | |
107 | } | |
108 | ||
16486d0c | 109 | static int s35390a_init(struct s35390a *s35390a) |
c46288b0 | 110 | { |
49129bcd | 111 | u8 buf; |
8e6583f1 UKK |
112 | int ret; |
113 | unsigned initcount = 0; | |
c46288b0 | 114 | |
8e6583f1 UKK |
115 | /* |
116 | * At least one of POC and BLD are set, so reinitialise chip. Keeping | |
117 | * this information in the hardware to know later that the time isn't | |
118 | * valid is unfortunately not possible because POC and BLD are cleared | |
119 | * on read. So the reset is best done now. | |
120 | * | |
121 | * The 24H bit is kept over reset, so set it already here. | |
122 | */ | |
123 | initialize: | |
8e6583f1 UKK |
124 | buf = S35390A_FLAG_RESET | S35390A_FLAG_24H; |
125 | ret = s35390a_set_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); | |
126 | ||
127 | if (ret < 0) | |
128 | return ret; | |
129 | ||
130 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &buf, 1); | |
131 | if (ret < 0) | |
132 | return ret; | |
133 | ||
134 | if (buf & (S35390A_FLAG_POC | S35390A_FLAG_BLD)) { | |
135 | /* Try up to five times to reset the chip */ | |
136 | if (initcount < 5) { | |
137 | ++initcount; | |
138 | goto initialize; | |
139 | } else | |
140 | return -EIO; | |
141 | } | |
142 | ||
143 | return 1; | |
c46288b0 BB |
144 | } |
145 | ||
16486d0c FL |
146 | /* |
147 | * Returns <0 on error, 0 if rtc is setup fine and 1 if the chip was reset. | |
148 | * To keep the information if an irq is pending, pass the value read from | |
149 | * STATUS1 to the caller. | |
150 | */ | |
151 | static int s35390a_read_status(struct s35390a *s35390a, char *status1) | |
152 | { | |
153 | int ret; | |
154 | ||
155 | ret = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, status1, 1); | |
156 | if (ret < 0) | |
157 | return ret; | |
158 | ||
159 | if (*status1 & S35390A_FLAG_POC) { | |
160 | /* | |
161 | * Do not communicate for 0.5 seconds since the power-on | |
162 | * detection circuit is in operation. | |
163 | */ | |
164 | msleep(500); | |
165 | return 1; | |
166 | } else if (*status1 & S35390A_FLAG_BLD) | |
167 | return 1; | |
168 | /* | |
169 | * If both POC and BLD are unset everything is fine. | |
170 | */ | |
171 | return 0; | |
172 | } | |
173 | ||
c46288b0 BB |
174 | static int s35390a_disable_test_mode(struct s35390a *s35390a) |
175 | { | |
176 | char buf[1]; | |
177 | ||
178 | if (s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)) < 0) | |
179 | return -EIO; | |
180 | ||
181 | if (!(buf[0] & S35390A_FLAG_TEST)) | |
182 | return 0; | |
183 | ||
184 | buf[0] &= ~S35390A_FLAG_TEST; | |
185 | return s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, buf, sizeof(buf)); | |
186 | } | |
187 | ||
188 | static char s35390a_hr2reg(struct s35390a *s35390a, int hour) | |
189 | { | |
190 | if (s35390a->twentyfourhour) | |
fe20ba70 | 191 | return bin2bcd(hour); |
c46288b0 BB |
192 | |
193 | if (hour < 12) | |
fe20ba70 | 194 | return bin2bcd(hour); |
c46288b0 | 195 | |
fe20ba70 | 196 | return 0x40 | bin2bcd(hour - 12); |
c46288b0 BB |
197 | } |
198 | ||
199 | static int s35390a_reg2hr(struct s35390a *s35390a, char reg) | |
200 | { | |
201 | unsigned hour; | |
202 | ||
203 | if (s35390a->twentyfourhour) | |
fe20ba70 | 204 | return bcd2bin(reg & 0x3f); |
c46288b0 | 205 | |
fe20ba70 | 206 | hour = bcd2bin(reg & 0x3f); |
c46288b0 BB |
207 | if (reg & 0x40) |
208 | hour += 12; | |
209 | ||
210 | return hour; | |
211 | } | |
212 | ||
213 | static int s35390a_set_datetime(struct i2c_client *client, struct rtc_time *tm) | |
214 | { | |
215 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
216 | int i, err; | |
16486d0c | 217 | char buf[7], status; |
c46288b0 BB |
218 | |
219 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d mday=%d, " | |
220 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, | |
221 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, | |
222 | tm->tm_wday); | |
223 | ||
16486d0c FL |
224 | if (s35390a_read_status(s35390a, &status) == 1) |
225 | s35390a_init(s35390a); | |
226 | ||
fe20ba70 AB |
227 | buf[S35390A_BYTE_YEAR] = bin2bcd(tm->tm_year - 100); |
228 | buf[S35390A_BYTE_MONTH] = bin2bcd(tm->tm_mon + 1); | |
229 | buf[S35390A_BYTE_DAY] = bin2bcd(tm->tm_mday); | |
230 | buf[S35390A_BYTE_WDAY] = bin2bcd(tm->tm_wday); | |
c46288b0 | 231 | buf[S35390A_BYTE_HOURS] = s35390a_hr2reg(s35390a, tm->tm_hour); |
fe20ba70 AB |
232 | buf[S35390A_BYTE_MINS] = bin2bcd(tm->tm_min); |
233 | buf[S35390A_BYTE_SECS] = bin2bcd(tm->tm_sec); | |
c46288b0 BB |
234 | |
235 | /* This chip expects the bits of each byte to be in reverse order */ | |
236 | for (i = 0; i < 7; ++i) | |
237 | buf[i] = bitrev8(buf[i]); | |
238 | ||
239 | err = s35390a_set_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); | |
240 | ||
241 | return err; | |
242 | } | |
243 | ||
244 | static int s35390a_get_datetime(struct i2c_client *client, struct rtc_time *tm) | |
245 | { | |
246 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
16486d0c | 247 | char buf[7], status; |
c46288b0 BB |
248 | int i, err; |
249 | ||
16486d0c FL |
250 | if (s35390a_read_status(s35390a, &status) == 1) |
251 | return -EINVAL; | |
252 | ||
c46288b0 BB |
253 | err = s35390a_get_reg(s35390a, S35390A_CMD_TIME1, buf, sizeof(buf)); |
254 | if (err < 0) | |
255 | return err; | |
256 | ||
257 | /* This chip returns the bits of each byte in reverse order */ | |
258 | for (i = 0; i < 7; ++i) | |
259 | buf[i] = bitrev8(buf[i]); | |
260 | ||
fe20ba70 AB |
261 | tm->tm_sec = bcd2bin(buf[S35390A_BYTE_SECS]); |
262 | tm->tm_min = bcd2bin(buf[S35390A_BYTE_MINS]); | |
c46288b0 | 263 | tm->tm_hour = s35390a_reg2hr(s35390a, buf[S35390A_BYTE_HOURS]); |
fe20ba70 AB |
264 | tm->tm_wday = bcd2bin(buf[S35390A_BYTE_WDAY]); |
265 | tm->tm_mday = bcd2bin(buf[S35390A_BYTE_DAY]); | |
266 | tm->tm_mon = bcd2bin(buf[S35390A_BYTE_MONTH]) - 1; | |
267 | tm->tm_year = bcd2bin(buf[S35390A_BYTE_YEAR]) + 100; | |
c46288b0 BB |
268 | |
269 | dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, mday=%d, " | |
270 | "mon=%d, year=%d, wday=%d\n", __func__, tm->tm_sec, | |
271 | tm->tm_min, tm->tm_hour, tm->tm_mday, tm->tm_mon, tm->tm_year, | |
272 | tm->tm_wday); | |
273 | ||
274 | return rtc_valid_tm(tm); | |
275 | } | |
276 | ||
542dd33a ML |
277 | static int s35390a_set_alarm(struct i2c_client *client, struct rtc_wkalrm *alm) |
278 | { | |
279 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
280 | char buf[3], sts = 0; | |
281 | int err, i; | |
282 | ||
283 | dev_dbg(&client->dev, "%s: alm is secs=%d, mins=%d, hours=%d mday=%d, "\ | |
284 | "mon=%d, year=%d, wday=%d\n", __func__, alm->time.tm_sec, | |
285 | alm->time.tm_min, alm->time.tm_hour, alm->time.tm_mday, | |
286 | alm->time.tm_mon, alm->time.tm_year, alm->time.tm_wday); | |
287 | ||
5227e8a2 | 288 | /* disable interrupt (which deasserts the irq line) */ |
542dd33a ML |
289 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); |
290 | if (err < 0) | |
291 | return err; | |
292 | ||
5227e8a2 | 293 | /* clear pending interrupt (in STATUS1 only), if any */ |
542dd33a ML |
294 | err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS1, &sts, sizeof(sts)); |
295 | if (err < 0) | |
296 | return err; | |
297 | ||
298 | if (alm->enabled) | |
299 | sts = S35390A_INT2_MODE_ALARM; | |
300 | else | |
301 | sts = S35390A_INT2_MODE_NOINTR; | |
302 | ||
303 | /* This chip expects the bits of each byte to be in reverse order */ | |
304 | sts = bitrev8(sts); | |
305 | ||
306 | /* set interupt mode*/ | |
307 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); | |
308 | if (err < 0) | |
309 | return err; | |
310 | ||
311 | if (alm->time.tm_wday != -1) | |
312 | buf[S35390A_ALRM_BYTE_WDAY] = bin2bcd(alm->time.tm_wday) | 0x80; | |
f87e904d UKK |
313 | else |
314 | buf[S35390A_ALRM_BYTE_WDAY] = 0; | |
542dd33a ML |
315 | |
316 | buf[S35390A_ALRM_BYTE_HOURS] = s35390a_hr2reg(s35390a, | |
317 | alm->time.tm_hour) | 0x80; | |
318 | buf[S35390A_ALRM_BYTE_MINS] = bin2bcd(alm->time.tm_min) | 0x80; | |
319 | ||
320 | if (alm->time.tm_hour >= 12) | |
321 | buf[S35390A_ALRM_BYTE_HOURS] |= 0x40; | |
322 | ||
323 | for (i = 0; i < 3; ++i) | |
324 | buf[i] = bitrev8(buf[i]); | |
325 | ||
326 | err = s35390a_set_reg(s35390a, S35390A_CMD_INT2_REG1, buf, | |
327 | sizeof(buf)); | |
328 | ||
329 | return err; | |
330 | } | |
331 | ||
332 | static int s35390a_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alm) | |
333 | { | |
334 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
335 | char buf[3], sts; | |
336 | int i, err; | |
337 | ||
338 | err = s35390a_get_reg(s35390a, S35390A_CMD_STATUS2, &sts, sizeof(sts)); | |
339 | if (err < 0) | |
340 | return err; | |
341 | ||
f87e904d UKK |
342 | if ((bitrev8(sts) & S35390A_INT2_MODE_MASK) != S35390A_INT2_MODE_ALARM) { |
343 | /* | |
344 | * When the alarm isn't enabled, the register to configure | |
345 | * the alarm time isn't accessible. | |
346 | */ | |
347 | alm->enabled = 0; | |
348 | return 0; | |
349 | } else { | |
350 | alm->enabled = 1; | |
351 | } | |
542dd33a ML |
352 | |
353 | err = s35390a_get_reg(s35390a, S35390A_CMD_INT2_REG1, buf, sizeof(buf)); | |
354 | if (err < 0) | |
355 | return err; | |
356 | ||
357 | /* This chip returns the bits of each byte in reverse order */ | |
f87e904d | 358 | for (i = 0; i < 3; ++i) |
542dd33a | 359 | buf[i] = bitrev8(buf[i]); |
542dd33a | 360 | |
f87e904d UKK |
361 | /* |
362 | * B0 of the three matching registers is an enable flag. Iff it is set | |
363 | * the configured value is used for matching. | |
364 | */ | |
365 | if (buf[S35390A_ALRM_BYTE_WDAY] & 0x80) | |
366 | alm->time.tm_wday = | |
367 | bcd2bin(buf[S35390A_ALRM_BYTE_WDAY] & ~0x80); | |
368 | ||
369 | if (buf[S35390A_ALRM_BYTE_HOURS] & 0x80) | |
370 | alm->time.tm_hour = | |
371 | s35390a_reg2hr(s35390a, | |
372 | buf[S35390A_ALRM_BYTE_HOURS] & ~0x80); | |
373 | ||
374 | if (buf[S35390A_ALRM_BYTE_MINS] & 0x80) | |
375 | alm->time.tm_min = bcd2bin(buf[S35390A_ALRM_BYTE_MINS] & ~0x80); | |
376 | ||
377 | /* alarm triggers always at s=0 */ | |
378 | alm->time.tm_sec = 0; | |
542dd33a ML |
379 | |
380 | dev_dbg(&client->dev, "%s: alm is mins=%d, hours=%d, wday=%d\n", | |
381 | __func__, alm->time.tm_min, alm->time.tm_hour, | |
382 | alm->time.tm_wday); | |
383 | ||
384 | return 0; | |
385 | } | |
386 | ||
387 | static int s35390a_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) | |
388 | { | |
389 | return s35390a_read_alarm(to_i2c_client(dev), alm); | |
390 | } | |
391 | ||
392 | static int s35390a_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | |
393 | { | |
394 | return s35390a_set_alarm(to_i2c_client(dev), alm); | |
395 | } | |
396 | ||
c46288b0 BB |
397 | static int s35390a_rtc_read_time(struct device *dev, struct rtc_time *tm) |
398 | { | |
399 | return s35390a_get_datetime(to_i2c_client(dev), tm); | |
400 | } | |
401 | ||
402 | static int s35390a_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
403 | { | |
404 | return s35390a_set_datetime(to_i2c_client(dev), tm); | |
405 | } | |
406 | ||
7a1fe407 FL |
407 | static int s35390a_rtc_ioctl(struct device *dev, unsigned int cmd, |
408 | unsigned long arg) | |
409 | { | |
410 | struct i2c_client *client = to_i2c_client(dev); | |
411 | struct s35390a *s35390a = i2c_get_clientdata(client); | |
412 | char sts; | |
413 | int err; | |
414 | ||
415 | switch (cmd) { | |
416 | case RTC_VL_READ: | |
417 | /* s35390a_reset set lowvoltage flag and init RTC if needed */ | |
418 | err = s35390a_read_status(s35390a, &sts); | |
419 | if (err < 0) | |
420 | return err; | |
421 | if (copy_to_user((void __user *)arg, &err, sizeof(int))) | |
422 | return -EFAULT; | |
423 | break; | |
424 | case RTC_VL_CLR: | |
425 | /* update flag and clear register */ | |
426 | err = s35390a_init(s35390a); | |
427 | if (err < 0) | |
428 | return err; | |
429 | break; | |
430 | default: | |
431 | return -ENOIOCTLCMD; | |
432 | } | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
c46288b0 BB |
437 | static const struct rtc_class_ops s35390a_rtc_ops = { |
438 | .read_time = s35390a_rtc_read_time, | |
439 | .set_time = s35390a_rtc_set_time, | |
542dd33a ML |
440 | .set_alarm = s35390a_rtc_set_alarm, |
441 | .read_alarm = s35390a_rtc_read_alarm, | |
7a1fe407 | 442 | .ioctl = s35390a_rtc_ioctl, |
c46288b0 BB |
443 | }; |
444 | ||
445 | static struct i2c_driver s35390a_driver; | |
446 | ||
d2653e92 JD |
447 | static int s35390a_probe(struct i2c_client *client, |
448 | const struct i2c_device_id *id) | |
c46288b0 | 449 | { |
16486d0c | 450 | int err, err_read; |
c46288b0 BB |
451 | unsigned int i; |
452 | struct s35390a *s35390a; | |
453 | struct rtc_time tm; | |
3bd32722 | 454 | char buf, status1; |
c46288b0 BB |
455 | |
456 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { | |
457 | err = -ENODEV; | |
458 | goto exit; | |
459 | } | |
460 | ||
b4cd3d6a JH |
461 | s35390a = devm_kzalloc(&client->dev, sizeof(struct s35390a), |
462 | GFP_KERNEL); | |
c46288b0 BB |
463 | if (!s35390a) { |
464 | err = -ENOMEM; | |
465 | goto exit; | |
466 | } | |
467 | ||
468 | s35390a->client[0] = client; | |
469 | i2c_set_clientdata(client, s35390a); | |
470 | ||
471 | /* This chip uses multiple addresses, use dummy devices for them */ | |
472 | for (i = 1; i < 8; ++i) { | |
473 | s35390a->client[i] = i2c_new_dummy(client->adapter, | |
60b129d7 | 474 | client->addr + i); |
c46288b0 BB |
475 | if (!s35390a->client[i]) { |
476 | dev_err(&client->dev, "Address %02x unavailable\n", | |
477 | client->addr + i); | |
478 | err = -EBUSY; | |
479 | goto exit_dummy; | |
480 | } | |
481 | } | |
482 | ||
16486d0c FL |
483 | err_read = s35390a_read_status(s35390a, &status1); |
484 | if (err_read < 0) { | |
485 | err = err_read; | |
c46288b0 BB |
486 | dev_err(&client->dev, "error resetting chip\n"); |
487 | goto exit_dummy; | |
488 | } | |
489 | ||
3bd32722 | 490 | if (status1 & S35390A_FLAG_24H) |
c46288b0 BB |
491 | s35390a->twentyfourhour = 1; |
492 | else | |
493 | s35390a->twentyfourhour = 0; | |
494 | ||
3bd32722 UKK |
495 | if (status1 & S35390A_FLAG_INT2) { |
496 | /* disable alarm (and maybe test mode) */ | |
497 | buf = 0; | |
498 | err = s35390a_set_reg(s35390a, S35390A_CMD_STATUS2, &buf, 1); | |
499 | if (err < 0) { | |
500 | dev_err(&client->dev, "error disabling alarm"); | |
501 | goto exit_dummy; | |
502 | } | |
503 | } else { | |
504 | err = s35390a_disable_test_mode(s35390a); | |
505 | if (err < 0) { | |
506 | dev_err(&client->dev, "error disabling test mode\n"); | |
507 | goto exit_dummy; | |
508 | } | |
509 | } | |
510 | ||
16486d0c | 511 | if (err_read > 0 || s35390a_get_datetime(client, &tm) < 0) |
c46288b0 BB |
512 | dev_warn(&client->dev, "clock needs to be set\n"); |
513 | ||
542dd33a ML |
514 | device_set_wakeup_capable(&client->dev, 1); |
515 | ||
b4cd3d6a JH |
516 | s35390a->rtc = devm_rtc_device_register(&client->dev, |
517 | s35390a_driver.driver.name, | |
518 | &s35390a_rtc_ops, THIS_MODULE); | |
c46288b0 BB |
519 | |
520 | if (IS_ERR(s35390a->rtc)) { | |
521 | err = PTR_ERR(s35390a->rtc); | |
522 | goto exit_dummy; | |
523 | } | |
3bd32722 UKK |
524 | |
525 | if (status1 & S35390A_FLAG_INT2) | |
526 | rtc_update_irq(s35390a->rtc, 1, RTC_AF); | |
527 | ||
c46288b0 BB |
528 | return 0; |
529 | ||
530 | exit_dummy: | |
531 | for (i = 1; i < 8; ++i) | |
532 | if (s35390a->client[i]) | |
533 | i2c_unregister_device(s35390a->client[i]); | |
c46288b0 BB |
534 | |
535 | exit: | |
536 | return err; | |
537 | } | |
538 | ||
539 | static int s35390a_remove(struct i2c_client *client) | |
540 | { | |
541 | unsigned int i; | |
c46288b0 | 542 | struct s35390a *s35390a = i2c_get_clientdata(client); |
b4cd3d6a | 543 | |
c46288b0 BB |
544 | for (i = 1; i < 8; ++i) |
545 | if (s35390a->client[i]) | |
546 | i2c_unregister_device(s35390a->client[i]); | |
547 | ||
c46288b0 BB |
548 | return 0; |
549 | } | |
550 | ||
551 | static struct i2c_driver s35390a_driver = { | |
552 | .driver = { | |
553 | .name = "rtc-s35390a", | |
21f27432 | 554 | .of_match_table = of_match_ptr(s35390a_of_match), |
c46288b0 BB |
555 | }, |
556 | .probe = s35390a_probe, | |
557 | .remove = s35390a_remove, | |
3760f736 | 558 | .id_table = s35390a_id, |
c46288b0 BB |
559 | }; |
560 | ||
0abc9201 | 561 | module_i2c_driver(s35390a_driver); |
c46288b0 BB |
562 | |
563 | MODULE_AUTHOR("Byron Bradley <byron.bbradley@gmail.com>"); | |
564 | MODULE_DESCRIPTION("S35390A RTC driver"); | |
565 | MODULE_LICENSE("GPL"); |