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rtc: xgene: fix possible race condition
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1add6781 1/* drivers/rtc/rtc-s3c.c
e48add8c
AD
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
1add6781
BD
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
9974b6ea 26#include <linux/log2.h>
5a0e3ad6 27#include <linux/slab.h>
39ce4084 28#include <linux/of.h>
dbd9acbe
SK
29#include <linux/uaccess.h>
30#include <linux/io.h>
1add6781 31
1add6781 32#include <asm/irq.h>
b9d7c5d3 33#include "rtc-s3c.h"
1add6781 34
19be09f5
CC
35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
df9e26d0 41 struct clk *rtc_src_clk;
1fb1c35f 42 bool clk_disabled;
19be09f5 43
6b72086d 44 const struct s3c_rtc_data *data;
1add6781 45
19be09f5
CC
46 int irq_alarm;
47 int irq_tick;
1add6781 48
19be09f5
CC
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
1add6781 51
fc1afe60
KK
52 int ticnt_save;
53 int ticnt_en_save;
19be09f5
CC
54 bool wake_en;
55};
56
ae05c950
CC
57struct s3c_rtc_data {
58 int max_user_freq;
df9e26d0 59 bool needs_src_clk;
ae05c950
CC
60
61 void (*irq_handler) (struct s3c_rtc *info, int mask);
62 void (*set_freq) (struct s3c_rtc *info, int freq);
63 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
64 void (*select_tick_clk) (struct s3c_rtc *info);
65 void (*save_tick_cnt) (struct s3c_rtc *info);
66 void (*restore_tick_cnt) (struct s3c_rtc *info);
67 void (*enable) (struct s3c_rtc *info);
68 void (*disable) (struct s3c_rtc *info);
69};
70
498bcf31 71static int s3c_rtc_enable_clk(struct s3c_rtc *info)
88cee8fd 72{
88cee8fd 73 unsigned long irq_flags;
498bcf31 74 int ret = 0;
88cee8fd 75
19be09f5 76 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
498bcf31 77
1fb1c35f 78 if (info->clk_disabled) {
498bcf31
KK
79 ret = clk_enable(info->rtc_clk);
80 if (ret)
81 goto out;
82
83 if (info->data->needs_src_clk) {
84 ret = clk_enable(info->rtc_src_clk);
85 if (ret) {
86 clk_disable(info->rtc_clk);
87 goto out;
88 }
89 }
1fb1c35f
JS
90 info->clk_disabled = false;
91 }
498bcf31
KK
92
93out:
24e14554 94 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
498bcf31
KK
95
96 return ret;
24e14554
CC
97}
98
99static void s3c_rtc_disable_clk(struct s3c_rtc *info)
100{
101 unsigned long irq_flags;
102
103 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
1fb1c35f
JS
104 if (!info->clk_disabled) {
105 if (info->data->needs_src_clk)
106 clk_disable(info->rtc_src_clk);
107 clk_disable(info->rtc_clk);
108 info->clk_disabled = true;
109 }
19be09f5 110 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
88cee8fd
DK
111}
112
1add6781 113/* IRQ Handlers */
ae05c950 114static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 115{
19be09f5 116 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 117
ae05c950
CC
118 if (info->data->irq_handler)
119 info->data->irq_handler(info, S3C2410_INTP_TIC);
88cee8fd 120
1add6781
BD
121 return IRQ_HANDLED;
122}
123
ae05c950 124static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 125{
19be09f5 126 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 127
ae05c950
CC
128 if (info->data->irq_handler)
129 info->data->irq_handler(info, S3C2410_INTP_ALM);
2f3478f6 130
1add6781
BD
131 return IRQ_HANDLED;
132}
133
134/* Update control registers */
2ec38a03 135static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781 136{
19be09f5 137 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781 138 unsigned int tmp;
498bcf31 139 int ret;
1add6781 140
19be09f5 141 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
1add6781 142
498bcf31
KK
143 ret = s3c_rtc_enable_clk(info);
144 if (ret)
145 return ret;
24e14554 146
19be09f5 147 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 148
2ec38a03 149 if (enabled)
1add6781
BD
150 tmp |= S3C2410_RTCALM_ALMEN;
151
19be09f5 152 writeb(tmp, info->base + S3C2410_RTCALM);
2ec38a03 153
24e14554 154 s3c_rtc_disable_clk(info);
88cee8fd 155
498bcf31
KK
156 if (enabled) {
157 ret = s3c_rtc_enable_clk(info);
158 if (ret)
159 return ret;
160 } else {
1fb1c35f 161 s3c_rtc_disable_clk(info);
498bcf31 162 }
1fb1c35f 163
2ec38a03 164 return 0;
1add6781
BD
165}
166
ae05c950 167/* Set RTC frequency */
19be09f5 168static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
1add6781 169{
498bcf31
KK
170 int ret;
171
5d2a5037
JC
172 if (!is_power_of_2(freq))
173 return -EINVAL;
174
498bcf31
KK
175 ret = s3c_rtc_enable_clk(info);
176 if (ret)
177 return ret;
19be09f5 178 spin_lock_irq(&info->pie_lock);
1add6781 179
ae05c950
CC
180 if (info->data->set_freq)
181 info->data->set_freq(info, freq);
25c1a246 182
19be09f5 183 spin_unlock_irq(&info->pie_lock);
70c96dfa 184 s3c_rtc_disable_clk(info);
773be7ee
BD
185
186 return 0;
1add6781
BD
187}
188
189/* Time read/write */
1add6781
BD
190static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
191{
19be09f5 192 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781 193 unsigned int have_retried = 0;
498bcf31 194 int ret;
1add6781 195
498bcf31
KK
196 ret = s3c_rtc_enable_clk(info);
197 if (ret)
198 return ret;
df9e26d0 199
fc1afe60 200retry_get_time:
19be09f5
CC
201 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
202 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
203 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
204 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
205 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
206 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
1add6781 207
48fc7f7e 208 /* the only way to work out whether the system was mid-update
1add6781
BD
209 * when we read it is to check the second counter, and if it
210 * is zero, then we re-try the entire read
211 */
212
213 if (rtc_tm->tm_sec == 0 && !have_retried) {
214 have_retried = 1;
215 goto retry_get_time;
216 }
217
fe20ba70
AB
218 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
219 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
220 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
221 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
222 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
223 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781 224
24e14554
CC
225 s3c_rtc_disable_clk(info);
226
1add6781 227 rtc_tm->tm_year += 100;
4e8896cd 228
d4a48c2a 229 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
fc1afe60
KK
230 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
231 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
4e8896cd 232
1add6781
BD
233 rtc_tm->tm_mon -= 1;
234
5b3ffddd 235 return rtc_valid_tm(rtc_tm);
1add6781
BD
236}
237
238static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
239{
19be09f5 240 struct s3c_rtc *info = dev_get_drvdata(dev);
641741e0 241 int year = tm->tm_year - 100;
498bcf31 242 int ret;
9a654518 243
d4a48c2a 244 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
fc1afe60
KK
245 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
246 tm->tm_hour, tm->tm_min, tm->tm_sec);
641741e0
BD
247
248 /* we get around y2k by simply not supporting it */
1add6781 249
641741e0 250 if (year < 0 || year >= 100) {
9a654518 251 dev_err(dev, "rtc only supports 100 years\n");
1add6781 252 return -EINVAL;
9a654518
BD
253 }
254
498bcf31
KK
255 ret = s3c_rtc_enable_clk(info);
256 if (ret)
257 return ret;
19be09f5
CC
258
259 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
260 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
261 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
262 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
263 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
264 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
265
24e14554 266 s3c_rtc_disable_clk(info);
1add6781
BD
267
268 return 0;
269}
270
271static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
272{
19be09f5 273 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
274 struct rtc_time *alm_tm = &alrm->time;
275 unsigned int alm_en;
498bcf31 276 int ret;
1add6781 277
498bcf31
KK
278 ret = s3c_rtc_enable_clk(info);
279 if (ret)
280 return ret;
df9e26d0 281
19be09f5
CC
282 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
283 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
284 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
285 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
286 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
287 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
1add6781 288
19be09f5 289 alm_en = readb(info->base + S3C2410_RTCALM);
1add6781 290
24e14554
CC
291 s3c_rtc_disable_clk(info);
292
a2db8dfc
DB
293 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
294
d4a48c2a 295 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
fc1afe60
KK
296 alm_en,
297 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
298 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
1add6781 299
1add6781 300 /* decode the alarm enable field */
1add6781 301 if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70 302 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781
BD
303
304 if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70 305 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781
BD
306
307 if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70 308 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781
BD
309
310 if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70 311 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781
BD
312
313 if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70 314 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781 315 alm_tm->tm_mon -= 1;
1add6781
BD
316 }
317
318 if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70 319 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781
BD
320
321 return 0;
322}
323
324static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
325{
19be09f5 326 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD
327 struct rtc_time *tm = &alrm->time;
328 unsigned int alrm_en;
498bcf31 329 int ret;
fb4ac3c1 330 int year = tm->tm_year - 100;
1add6781 331
d4a48c2a 332 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
fc1afe60
KK
333 alrm->enabled,
334 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
335 tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781 336
498bcf31
KK
337 ret = s3c_rtc_enable_clk(info);
338 if (ret)
339 return ret;
24e14554 340
19be09f5
CC
341 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
342 writeb(0x00, info->base + S3C2410_RTCALM);
1add6781
BD
343
344 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
345 alrm_en |= S3C2410_RTCALM_SECEN;
19be09f5 346 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
1add6781
BD
347 }
348
349 if (tm->tm_min < 60 && tm->tm_min >= 0) {
350 alrm_en |= S3C2410_RTCALM_MINEN;
19be09f5 351 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
1add6781
BD
352 }
353
354 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
355 alrm_en |= S3C2410_RTCALM_HOUREN;
19be09f5 356 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
1add6781
BD
357 }
358
fb4ac3c1
KK
359 if (year < 100 && year >= 0) {
360 alrm_en |= S3C2410_RTCALM_YEAREN;
361 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
362 }
363
364 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
365 alrm_en |= S3C2410_RTCALM_MONEN;
366 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
367 }
368
369 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
370 alrm_en |= S3C2410_RTCALM_DAYEN;
371 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
372 }
373
d4a48c2a 374 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
1add6781 375
19be09f5 376 writeb(alrm_en, info->base + S3C2410_RTCALM);
1add6781 377
24e14554 378 s3c_rtc_disable_clk(info);
1add6781 379
24e14554 380 s3c_rtc_setaie(dev, alrm->enabled);
19be09f5 381
1add6781
BD
382 return 0;
383}
384
1add6781
BD
385static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
386{
19be09f5 387 struct s3c_rtc *info = dev_get_drvdata(dev);
498bcf31 388 int ret;
1add6781 389
498bcf31
KK
390 ret = s3c_rtc_enable_clk(info);
391 if (ret)
392 return ret;
9f4123b7 393
ae05c950
CC
394 if (info->data->enable_tick)
395 info->data->enable_tick(info, seq);
396
24e14554 397 s3c_rtc_disable_clk(info);
ae05c950 398
1add6781
BD
399 return 0;
400}
401
ff8371ac 402static const struct rtc_class_ops s3c_rtcops = {
1add6781
BD
403 .read_time = s3c_rtc_gettime,
404 .set_time = s3c_rtc_settime,
405 .read_alarm = s3c_rtc_getalarm,
406 .set_alarm = s3c_rtc_setalarm,
e6eb524e
CY
407 .proc = s3c_rtc_proc,
408 .alarm_irq_enable = s3c_rtc_setaie,
1add6781
BD
409};
410
ae05c950 411static void s3c24xx_rtc_enable(struct s3c_rtc *info)
1add6781 412{
d67288da 413 unsigned int con, tmp;
1add6781 414
d67288da 415 con = readw(info->base + S3C2410_RTCCON);
ae05c950
CC
416 /* re-enable the device, and check it is ok */
417 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
418 dev_info(info->dev, "rtc disabled, re-enabling\n");
1add6781 419
ae05c950 420 tmp = readw(info->base + S3C2410_RTCCON);
fc1afe60 421 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON);
ae05c950 422 }
1add6781 423
ae05c950
CC
424 if (con & S3C2410_RTCCON_CNTSEL) {
425 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
1add6781 426
ae05c950
CC
427 tmp = readw(info->base + S3C2410_RTCCON);
428 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
fc1afe60 429 info->base + S3C2410_RTCCON);
ae05c950 430 }
1add6781 431
ae05c950
CC
432 if (con & S3C2410_RTCCON_CLKRST) {
433 dev_info(info->dev, "removing RTCCON_CLKRST\n");
1add6781 434
ae05c950
CC
435 tmp = readw(info->base + S3C2410_RTCCON);
436 writew(tmp & ~S3C2410_RTCCON_CLKRST,
fc1afe60 437 info->base + S3C2410_RTCCON);
1add6781 438 }
ae05c950
CC
439}
440
441static void s3c24xx_rtc_disable(struct s3c_rtc *info)
442{
443 unsigned int con;
444
ae05c950
CC
445 con = readw(info->base + S3C2410_RTCCON);
446 con &= ~S3C2410_RTCCON_RTCEN;
447 writew(con, info->base + S3C2410_RTCCON);
448
449 con = readb(info->base + S3C2410_TICNT);
450 con &= ~S3C2410_TICNT_ENABLE;
451 writeb(con, info->base + S3C2410_TICNT);
ae05c950
CC
452}
453
454static void s3c6410_rtc_disable(struct s3c_rtc *info)
455{
456 unsigned int con;
457
ae05c950
CC
458 con = readw(info->base + S3C2410_RTCCON);
459 con &= ~S3C64XX_RTCCON_TICEN;
460 con &= ~S3C2410_RTCCON_RTCEN;
461 writew(con, info->base + S3C2410_RTCCON);
1add6781
BD
462}
463
19be09f5 464static int s3c_rtc_remove(struct platform_device *pdev)
1add6781 465{
19be09f5
CC
466 struct s3c_rtc *info = platform_get_drvdata(pdev);
467
468 s3c_rtc_setaie(info->dev, 0);
1add6781 469
7f23a936
JS
470 if (info->data->needs_src_clk)
471 clk_unprepare(info->rtc_src_clk);
19be09f5 472 clk_unprepare(info->rtc_clk);
e48add8c 473
1add6781
BD
474 return 0;
475}
476
d2524caa
HS
477static const struct of_device_id s3c_rtc_dt_match[];
478
6b72086d 479static const struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
d2524caa 480{
ae05c950 481 const struct of_device_id *match;
d67288da 482
ae05c950 483 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
6b72086d 484 return match->data;
d2524caa
HS
485}
486
5a167f45 487static int s3c_rtc_probe(struct platform_device *pdev)
1add6781 488{
19be09f5 489 struct s3c_rtc *info = NULL;
e1df962e 490 struct rtc_time rtc_tm;
1add6781
BD
491 struct resource *res;
492 int ret;
493
19be09f5
CC
494 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
495 if (!info)
496 return -ENOMEM;
1add6781
BD
497
498 /* find the IRQs */
19be09f5
CC
499 info->irq_tick = platform_get_irq(pdev, 1);
500 if (info->irq_tick < 0) {
1add6781 501 dev_err(&pdev->dev, "no irq for rtc tick\n");
19be09f5 502 return info->irq_tick;
1add6781
BD
503 }
504
19be09f5 505 info->dev = &pdev->dev;
ae05c950
CC
506 info->data = s3c_rtc_get_data(pdev);
507 if (!info->data) {
508 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
509 return -EINVAL;
510 }
19be09f5
CC
511 spin_lock_init(&info->pie_lock);
512 spin_lock_init(&info->alarm_clk_lock);
513
514 platform_set_drvdata(pdev, info);
515
516 info->irq_alarm = platform_get_irq(pdev, 0);
517 if (info->irq_alarm < 0) {
1add6781 518 dev_err(&pdev->dev, "no irq for alarm\n");
19be09f5 519 return info->irq_alarm;
1add6781
BD
520 }
521
d4a48c2a 522 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
fc1afe60 523 info->irq_tick, info->irq_alarm);
1add6781
BD
524
525 /* get the memory region */
1add6781 526 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
19be09f5
CC
527 info->base = devm_ioremap_resource(&pdev->dev, res);
528 if (IS_ERR(info->base))
529 return PTR_ERR(info->base);
1add6781 530
19be09f5
CC
531 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
532 if (IS_ERR(info->rtc_clk)) {
ae6e00b4
JMC
533 ret = PTR_ERR(info->rtc_clk);
534 if (ret != -EPROBE_DEFER)
535 dev_err(&pdev->dev, "failed to find rtc clock\n");
536 else
537 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
538 return ret;
e48add8c 539 }
9903f68a
KK
540 ret = clk_prepare_enable(info->rtc_clk);
541 if (ret)
542 return ret;
e48add8c 543
eaf3a659
MS
544 if (info->data->needs_src_clk) {
545 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
546 if (IS_ERR(info->rtc_src_clk)) {
ae6e00b4
JMC
547 ret = PTR_ERR(info->rtc_src_clk);
548 if (ret != -EPROBE_DEFER)
549 dev_err(&pdev->dev,
550 "failed to find rtc source clock\n");
551 else
552 dev_dbg(&pdev->dev,
553 "probe deferred due to missing rtc src clk\n");
8768e7b3 554 goto err_src_clk;
eaf3a659 555 }
9903f68a
KK
556 ret = clk_prepare_enable(info->rtc_src_clk);
557 if (ret)
558 goto err_src_clk;
df9e26d0 559 }
df9e26d0 560
1add6781 561 /* check to see if everything is setup correctly */
ae05c950
CC
562 if (info->data->enable)
563 info->data->enable(info);
1add6781 564
d4a48c2a 565 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
fc1afe60 566 readw(info->base + S3C2410_RTCCON));
1add6781 567
51b7616e
YK
568 device_init_wakeup(&pdev->dev, 1);
569
202fe4c2 570 /* Check RTC Time */
492da68c 571 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
202fe4c2
KK
572 rtc_tm.tm_year = 100;
573 rtc_tm.tm_mon = 0;
574 rtc_tm.tm_mday = 1;
575 rtc_tm.tm_hour = 0;
576 rtc_tm.tm_min = 0;
577 rtc_tm.tm_sec = 0;
578
579 s3c_rtc_settime(&pdev->dev, &rtc_tm);
580
581 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
582 }
583
1add6781 584 /* register RTC and exit */
19be09f5 585 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
fc1afe60 586 THIS_MODULE);
19be09f5 587 if (IS_ERR(info->rtc)) {
1add6781 588 dev_err(&pdev->dev, "cannot attach rtc\n");
19be09f5 589 ret = PTR_ERR(info->rtc);
1add6781
BD
590 goto err_nortc;
591 }
592
19be09f5 593 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
fc1afe60 594 0, "s3c2410-rtc alarm", info);
19be09f5
CC
595 if (ret) {
596 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
597 goto err_nortc;
598 }
eaa6e4dd 599
19be09f5 600 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
fc1afe60 601 0, "s3c2410-rtc tick", info);
19be09f5
CC
602 if (ret) {
603 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
604 goto err_nortc;
605 }
051fe54e 606
ae05c950
CC
607 if (info->data->select_tick_clk)
608 info->data->select_tick_clk(info);
62d17601 609
19be09f5 610 s3c_rtc_setfreq(info, 1);
62d17601 611
1add6781
BD
612 return 0;
613
fc1afe60 614err_nortc:
ae05c950
CC
615 if (info->data->disable)
616 info->data->disable(info);
24e14554
CC
617
618 if (info->data->needs_src_clk)
619 clk_disable_unprepare(info->rtc_src_clk);
8768e7b3 620err_src_clk:
19be09f5 621 clk_disable_unprepare(info->rtc_clk);
1add6781 622
1add6781
BD
623 return ret;
624}
625
32e445aa 626#ifdef CONFIG_PM_SLEEP
1add6781 627
32e445aa 628static int s3c_rtc_suspend(struct device *dev)
1add6781 629{
19be09f5 630 struct s3c_rtc *info = dev_get_drvdata(dev);
498bcf31 631 int ret;
32e445aa 632
498bcf31
KK
633 ret = s3c_rtc_enable_clk(info);
634 if (ret)
635 return ret;
ae05c950 636
1add6781 637 /* save TICNT for anyone using periodic interrupts */
ae05c950
CC
638 if (info->data->save_tick_cnt)
639 info->data->save_tick_cnt(info);
640
641 if (info->data->disable)
642 info->data->disable(info);
f501ed52 643
19be09f5
CC
644 if (device_may_wakeup(dev) && !info->wake_en) {
645 if (enable_irq_wake(info->irq_alarm) == 0)
646 info->wake_en = true;
52cd4e5c 647 else
32e445aa 648 dev_err(dev, "enable_irq_wake failed\n");
52cd4e5c 649 }
ae05c950 650
1add6781
BD
651 return 0;
652}
653
32e445aa 654static int s3c_rtc_resume(struct device *dev)
1add6781 655{
19be09f5 656 struct s3c_rtc *info = dev_get_drvdata(dev);
9f4123b7 657
ae05c950
CC
658 if (info->data->enable)
659 info->data->enable(info);
660
661 if (info->data->restore_tick_cnt)
662 info->data->restore_tick_cnt(info);
f501ed52 663
24e14554
CC
664 s3c_rtc_disable_clk(info);
665
19be09f5
CC
666 if (device_may_wakeup(dev) && info->wake_en) {
667 disable_irq_wake(info->irq_alarm);
668 info->wake_en = false;
52cd4e5c 669 }
ae05c950 670
1add6781
BD
671 return 0;
672}
1add6781 673#endif
32e445aa
JH
674static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
675
ae05c950
CC
676static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
677{
ae05c950 678 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
ae05c950
CC
679}
680
681static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
682{
ae05c950
CC
683 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
684 writeb(mask, info->base + S3C2410_INTP);
ae05c950
CC
685}
686
687static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
688{
689 unsigned int tmp = 0;
690 int val;
691
692 tmp = readb(info->base + S3C2410_TICNT);
693 tmp &= S3C2410_TICNT_ENABLE;
694
695 val = (info->rtc->max_user_freq / freq) - 1;
696 tmp |= val;
697
698 writel(tmp, info->base + S3C2410_TICNT);
699}
700
701static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
702{
703 unsigned int tmp = 0;
704 int val;
705
706 tmp = readb(info->base + S3C2410_TICNT);
707 tmp &= S3C2410_TICNT_ENABLE;
708
709 val = (info->rtc->max_user_freq / freq) - 1;
710
711 tmp |= S3C2443_TICNT_PART(val);
712 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
713
714 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
715
716 writel(tmp, info->base + S3C2410_TICNT);
717}
718
719static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
720{
721 unsigned int tmp = 0;
722 int val;
723
724 tmp = readb(info->base + S3C2410_TICNT);
725 tmp &= S3C2410_TICNT_ENABLE;
726
727 val = (info->rtc->max_user_freq / freq) - 1;
728
729 tmp |= S3C2443_TICNT_PART(val);
730 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
731
732 writel(tmp, info->base + S3C2410_TICNT);
733}
734
735static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
736{
737 int val;
738
739 val = (info->rtc->max_user_freq / freq) - 1;
740 writel(val, info->base + S3C2410_TICNT);
741}
742
743static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
744{
745 unsigned int ticnt;
746
747 ticnt = readb(info->base + S3C2410_TICNT);
748 ticnt &= S3C2410_TICNT_ENABLE;
749
750 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
751}
752
753static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
754{
755 unsigned int con;
756
757 con = readw(info->base + S3C2410_RTCCON);
758 con |= S3C2443_RTCCON_TICSEL;
759 writew(con, info->base + S3C2410_RTCCON);
760}
761
762static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
763{
764 unsigned int ticnt;
765
766 ticnt = readw(info->base + S3C2410_RTCCON);
767 ticnt &= S3C64XX_RTCCON_TICEN;
768
769 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
770}
771
772static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
773{
774 info->ticnt_save = readb(info->base + S3C2410_TICNT);
775}
776
777static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
778{
779 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
780}
781
782static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
783{
784 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
785 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
786 info->ticnt_save = readl(info->base + S3C2410_TICNT);
787}
788
789static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
790{
791 unsigned int con;
792
793 writel(info->ticnt_save, info->base + S3C2410_TICNT);
794 if (info->ticnt_en_save) {
795 con = readw(info->base + S3C2410_RTCCON);
fc1afe60 796 writew(con | info->ticnt_en_save, info->base + S3C2410_RTCCON);
ae05c950
CC
797 }
798}
799
800static struct s3c_rtc_data const s3c2410_rtc_data = {
801 .max_user_freq = 128,
802 .irq_handler = s3c24xx_rtc_irq,
803 .set_freq = s3c2410_rtc_setfreq,
804 .enable_tick = s3c24xx_rtc_enable_tick,
805 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
806 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
807 .enable = s3c24xx_rtc_enable,
808 .disable = s3c24xx_rtc_disable,
809};
810
811static struct s3c_rtc_data const s3c2416_rtc_data = {
812 .max_user_freq = 32768,
813 .irq_handler = s3c24xx_rtc_irq,
814 .set_freq = s3c2416_rtc_setfreq,
815 .enable_tick = s3c24xx_rtc_enable_tick,
816 .select_tick_clk = s3c2416_rtc_select_tick_clk,
817 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
818 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
819 .enable = s3c24xx_rtc_enable,
820 .disable = s3c24xx_rtc_disable,
821};
822
823static struct s3c_rtc_data const s3c2443_rtc_data = {
824 .max_user_freq = 32768,
825 .irq_handler = s3c24xx_rtc_irq,
826 .set_freq = s3c2443_rtc_setfreq,
827 .enable_tick = s3c24xx_rtc_enable_tick,
828 .select_tick_clk = s3c2416_rtc_select_tick_clk,
829 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
830 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
831 .enable = s3c24xx_rtc_enable,
832 .disable = s3c24xx_rtc_disable,
833};
834
835static struct s3c_rtc_data const s3c6410_rtc_data = {
836 .max_user_freq = 32768,
8792f777 837 .needs_src_clk = true,
ae05c950
CC
838 .irq_handler = s3c6410_rtc_irq,
839 .set_freq = s3c6410_rtc_setfreq,
840 .enable_tick = s3c6410_rtc_enable_tick,
841 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
842 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
843 .enable = s3c24xx_rtc_enable,
844 .disable = s3c6410_rtc_disable,
c3cba928
TB
845};
846
39ce4084 847static const struct of_device_id s3c_rtc_dt_match[] = {
d2524caa 848 {
cd1e6f9e 849 .compatible = "samsung,s3c2410-rtc",
21df6fed 850 .data = &s3c2410_rtc_data,
25c1a246 851 }, {
cd1e6f9e 852 .compatible = "samsung,s3c2416-rtc",
21df6fed 853 .data = &s3c2416_rtc_data,
25c1a246 854 }, {
cd1e6f9e 855 .compatible = "samsung,s3c2443-rtc",
21df6fed 856 .data = &s3c2443_rtc_data,
d2524caa 857 }, {
cd1e6f9e 858 .compatible = "samsung,s3c6410-rtc",
21df6fed 859 .data = &s3c6410_rtc_data,
df9e26d0
CC
860 }, {
861 .compatible = "samsung,exynos3250-rtc",
21df6fed 862 .data = &s3c6410_rtc_data,
d2524caa 863 },
ae05c950 864 { /* sentinel */ },
39ce4084
TA
865};
866MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
9f4123b7
MC
867
868static struct platform_driver s3c_rtc_driver = {
1add6781 869 .probe = s3c_rtc_probe,
5a167f45 870 .remove = s3c_rtc_remove,
1add6781 871 .driver = {
9f4123b7 872 .name = "s3c-rtc",
32e445aa 873 .pm = &s3c_rtc_pm_ops,
04a373fd 874 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
1add6781
BD
875 },
876};
0c4eae66 877module_platform_driver(s3c_rtc_driver);
1add6781
BD
878
879MODULE_DESCRIPTION("Samsung S3C RTC Driver");
880MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
881MODULE_LICENSE("GPL");
ad28a07b 882MODULE_ALIAS("platform:s3c2410-rtc");