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[mirror_ubuntu-artful-kernel.git] / drivers / rtc / rtc-s3c.c
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1add6781 1/* drivers/rtc/rtc-s3c.c
e48add8c
AD		 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
1add6781
BD		 5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
9974b6ea 26#include <linux/log2.h>
5a0e3ad6 27#include <linux/slab.h>
39ce4084 28#include <linux/of.h>
dbd9acbe
SK		 29#include <linux/uaccess.h>
30#include <linux/io.h>
1add6781 31
1add6781 32#include <asm/irq.h>
b9d7c5d3 33#include "rtc-s3c.h"
1add6781 34
19be09f5
CC		 35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
df9e26d0 41 struct clk *rtc_src_clk;
1fb1c35f 42 bool clk_disabled;
19be09f5 43
ae05c950 44 struct s3c_rtc_data *data;
1add6781 45
19be09f5
CC		 46 int irq_alarm;
47 int irq_tick;
1add6781 48
19be09f5
CC		 49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
1add6781 51
19be09f5
CC		 52 int ticnt_save, ticnt_en_save;
53 bool wake_en;
54};
55
ae05c950
CC		 56struct s3c_rtc_data {
57 int max_user_freq;
df9e26d0 58 bool needs_src_clk;
ae05c950
CC		 59
60 void (*irq_handler) (struct s3c_rtc *info, int mask);
61 void (*set_freq) (struct s3c_rtc *info, int freq);
62 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
63 void (*select_tick_clk) (struct s3c_rtc *info);
64 void (*save_tick_cnt) (struct s3c_rtc *info);
65 void (*restore_tick_cnt) (struct s3c_rtc *info);
66 void (*enable) (struct s3c_rtc *info);
67 void (*disable) (struct s3c_rtc *info);
68};
69
24e14554 70static void s3c_rtc_enable_clk(struct s3c_rtc *info)
88cee8fd 71{
88cee8fd
DK		 72 unsigned long irq_flags;
73
19be09f5 74 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
1fb1c35f
JS		 75 if (info->clk_disabled) {
76 clk_enable(info->rtc_clk);
77 if (info->data->needs_src_clk)
78 clk_enable(info->rtc_src_clk);
79 info->clk_disabled = false;
80 }
24e14554
CC		 81 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
82}
83
84static void s3c_rtc_disable_clk(struct s3c_rtc *info)
85{
86 unsigned long irq_flags;
87
88 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
1fb1c35f
JS		 89 if (!info->clk_disabled) {
90 if (info->data->needs_src_clk)
91 clk_disable(info->rtc_src_clk);
92 clk_disable(info->rtc_clk);
93 info->clk_disabled = true;
94 }
19be09f5 95 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
88cee8fd
DK		 96}
97
1add6781 98/* IRQ Handlers */
ae05c950 99static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
1add6781 100{
19be09f5 101 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 102
ae05c950
CC		 103 if (info->data->irq_handler)
104 info->data->irq_handler(info, S3C2410_INTP_TIC);
88cee8fd 105
1add6781
BD		 106 return IRQ_HANDLED;
107}
108
ae05c950 109static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
1add6781 110{
19be09f5 111 struct s3c_rtc *info = (struct s3c_rtc *)id;
1add6781 112
ae05c950
CC		 113 if (info->data->irq_handler)
114 info->data->irq_handler(info, S3C2410_INTP_ALM);
2f3478f6 115
1add6781
BD		 116 return IRQ_HANDLED;
117}
118
119/* Update control registers */
2ec38a03 120static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
1add6781 121{
19be09f5 122 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 123 unsigned int tmp;
124
19be09f5 125 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
1add6781 126
24e14554
CC		 127 s3c_rtc_enable_clk(info);
128
19be09f5 129 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
1add6781 130
2ec38a03 131 if (enabled)
1add6781
BD		 132 tmp |= S3C2410_RTCALM_ALMEN;
133
19be09f5 134 writeb(tmp, info->base + S3C2410_RTCALM);
2ec38a03 135
24e14554 136 s3c_rtc_disable_clk(info);
88cee8fd 137
1fb1c35f
JS		 138 if (enabled)
139 s3c_rtc_enable_clk(info);
140 else
141 s3c_rtc_disable_clk(info);
142
2ec38a03 143 return 0;
1add6781
BD		 144}
145
ae05c950 146/* Set RTC frequency */
19be09f5 147static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
1add6781 148{
5d2a5037
JC		 149 if (!is_power_of_2(freq))
150 return -EINVAL;
151
70c96dfa 152 s3c_rtc_enable_clk(info);
19be09f5 153 spin_lock_irq(&info->pie_lock);
1add6781 154
ae05c950
CC		 155 if (info->data->set_freq)
156 info->data->set_freq(info, freq);
25c1a246 157
19be09f5 158 spin_unlock_irq(&info->pie_lock);
70c96dfa 159 s3c_rtc_disable_clk(info);
773be7ee
BD		 160
161 return 0;
1add6781
BD		 162}
163
164/* Time read/write */
1add6781
BD		 165static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
166{
19be09f5 167 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 168 unsigned int have_retried = 0;
169
24e14554 170 s3c_rtc_enable_clk(info);
df9e26d0 171
1add6781 172 retry_get_time:
19be09f5
CC		 173 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
174 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
175 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
176 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
177 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
178 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
1add6781 179
48fc7f7e 180 /* the only way to work out whether the system was mid-update
1add6781
BD		 181 * when we read it is to check the second counter, and if it
182 * is zero, then we re-try the entire read
183 */
184
185 if (rtc_tm->tm_sec == 0 && !have_retried) {
186 have_retried = 1;
187 goto retry_get_time;
188 }
189
fe20ba70
AB		 190 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
191 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
192 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
193 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
194 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
195 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
1add6781 196
24e14554
CC		 197 s3c_rtc_disable_clk(info);
198
1add6781 199 rtc_tm->tm_year += 100;
4e8896cd 200
d4a48c2a 201 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
4e8896cd
MH		 202 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
203 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
204
1add6781
BD		 205 rtc_tm->tm_mon -= 1;
206
5b3ffddd 207 return rtc_valid_tm(rtc_tm);
1add6781
BD		 208}
209
210static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
211{
19be09f5 212 struct s3c_rtc *info = dev_get_drvdata(dev);
641741e0 213 int year = tm->tm_year - 100;
9a654518 214
d4a48c2a 215 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
30ffc40c 216 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
641741e0
BD		 217 tm->tm_hour, tm->tm_min, tm->tm_sec);
218
219 /* we get around y2k by simply not supporting it */
1add6781 220
641741e0 221 if (year < 0 || year >= 100) {
9a654518 222 dev_err(dev, "rtc only supports 100 years\n");
1add6781 223 return -EINVAL;
9a654518
BD		 224 }
225
24e14554 226 s3c_rtc_enable_clk(info);
19be09f5
CC		 227
228 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
229 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
230 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
231 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
232 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
233 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
234
24e14554 235 s3c_rtc_disable_clk(info);
1add6781
BD		 236
237 return 0;
238}
239
240static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
241{
19be09f5 242 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 243 struct rtc_time *alm_tm = &alrm->time;
244 unsigned int alm_en;
245
24e14554 246 s3c_rtc_enable_clk(info);
df9e26d0 247
19be09f5
CC		 248 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
249 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
250 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
251 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
252 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
253 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
1add6781 254
19be09f5 255 alm_en = readb(info->base + S3C2410_RTCALM);
1add6781 256
24e14554
CC		 257 s3c_rtc_disable_clk(info);
258
a2db8dfc
DB		 259 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
260
d4a48c2a 261 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 262 alm_en,
30ffc40c 263 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
1add6781
BD		 264 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
265
1add6781 266 /* decode the alarm enable field */
1add6781 267 if (alm_en & S3C2410_RTCALM_SECEN)
fe20ba70 268 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
1add6781
BD		 269
270 if (alm_en & S3C2410_RTCALM_MINEN)
fe20ba70 271 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
1add6781
BD		 272
273 if (alm_en & S3C2410_RTCALM_HOUREN)
fe20ba70 274 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
1add6781
BD		 275
276 if (alm_en & S3C2410_RTCALM_DAYEN)
fe20ba70 277 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
1add6781
BD		 278
279 if (alm_en & S3C2410_RTCALM_MONEN) {
fe20ba70 280 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
1add6781 281 alm_tm->tm_mon -= 1;
1add6781
BD		 282 }
283
284 if (alm_en & S3C2410_RTCALM_YEAREN)
fe20ba70 285 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
1add6781
BD		 286
287 return 0;
288}
289
290static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
291{
19be09f5 292 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781
BD		 293 struct rtc_time *tm = &alrm->time;
294 unsigned int alrm_en;
fb4ac3c1 295 int year = tm->tm_year - 100;
1add6781 296
d4a48c2a 297 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
1add6781 298 alrm->enabled,
4e8896cd 299 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
30ffc40c 300 tm->tm_hour, tm->tm_min, tm->tm_sec);
1add6781 301
24e14554
CC		 302 s3c_rtc_enable_clk(info);
303
19be09f5
CC		 304 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
305 writeb(0x00, info->base + S3C2410_RTCALM);
1add6781
BD		 306
307 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
308 alrm_en |= S3C2410_RTCALM_SECEN;
19be09f5 309 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
1add6781
BD		 310 }
311
312 if (tm->tm_min < 60 && tm->tm_min >= 0) {
313 alrm_en |= S3C2410_RTCALM_MINEN;
19be09f5 314 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
1add6781
BD		 315 }
316
317 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
318 alrm_en |= S3C2410_RTCALM_HOUREN;
19be09f5 319 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
1add6781
BD		 320 }
321
fb4ac3c1
KK		 322 if (year < 100 && year >= 0) {
323 alrm_en |= S3C2410_RTCALM_YEAREN;
324 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
325 }
326
327 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
328 alrm_en |= S3C2410_RTCALM_MONEN;
329 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
330 }
331
332 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
333 alrm_en |= S3C2410_RTCALM_DAYEN;
334 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
335 }
336
d4a48c2a 337 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
1add6781 338
19be09f5 339 writeb(alrm_en, info->base + S3C2410_RTCALM);
1add6781 340
24e14554 341 s3c_rtc_disable_clk(info);
1add6781 342
24e14554 343 s3c_rtc_setaie(dev, alrm->enabled);
19be09f5 344
1add6781
BD		 345 return 0;
346}
347
1add6781
BD		 348static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
349{
19be09f5 350 struct s3c_rtc *info = dev_get_drvdata(dev);
1add6781 351
24e14554 352 s3c_rtc_enable_clk(info);
9f4123b7 353
ae05c950
CC		 354 if (info->data->enable_tick)
355 info->data->enable_tick(info, seq);
356
24e14554 357 s3c_rtc_disable_clk(info);
ae05c950 358
1add6781
BD		 359 return 0;
360}
361
ff8371ac 362static const struct rtc_class_ops s3c_rtcops = {
1add6781
BD		 363 .read_time = s3c_rtc_gettime,
364 .set_time = s3c_rtc_settime,
365 .read_alarm = s3c_rtc_getalarm,
366 .set_alarm = s3c_rtc_setalarm,
e6eb524e
CY		 367 .proc = s3c_rtc_proc,
368 .alarm_irq_enable = s3c_rtc_setaie,
1add6781
BD		 369};
370
ae05c950 371static void s3c24xx_rtc_enable(struct s3c_rtc *info)
1add6781 372{
d67288da 373 unsigned int con, tmp;
1add6781 374
d67288da 375 con = readw(info->base + S3C2410_RTCCON);
ae05c950
CC		 376 /* re-enable the device, and check it is ok */
377 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
378 dev_info(info->dev, "rtc disabled, re-enabling\n");
1add6781 379
ae05c950
CC		 380 tmp = readw(info->base + S3C2410_RTCCON);
381 writew(tmp | S3C2410_RTCCON_RTCEN,
382 info->base + S3C2410_RTCCON);
383 }
1add6781 384
ae05c950
CC		 385 if (con & S3C2410_RTCCON_CNTSEL) {
386 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
1add6781 387
ae05c950
CC		 388 tmp = readw(info->base + S3C2410_RTCCON);
389 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
390 info->base + S3C2410_RTCCON);
391 }
1add6781 392
ae05c950
CC		 393 if (con & S3C2410_RTCCON_CLKRST) {
394 dev_info(info->dev, "removing RTCCON_CLKRST\n");
1add6781 395
ae05c950
CC		 396 tmp = readw(info->base + S3C2410_RTCCON);
397 writew(tmp & ~S3C2410_RTCCON_CLKRST,
398 info->base + S3C2410_RTCCON);
1add6781 399 }
ae05c950
CC		 400}
401
402static void s3c24xx_rtc_disable(struct s3c_rtc *info)
403{
404 unsigned int con;
405
ae05c950
CC		 406 con = readw(info->base + S3C2410_RTCCON);
407 con &= ~S3C2410_RTCCON_RTCEN;
408 writew(con, info->base + S3C2410_RTCCON);
409
410 con = readb(info->base + S3C2410_TICNT);
411 con &= ~S3C2410_TICNT_ENABLE;
412 writeb(con, info->base + S3C2410_TICNT);
ae05c950
CC		 413}
414
415static void s3c6410_rtc_disable(struct s3c_rtc *info)
416{
417 unsigned int con;
418
ae05c950
CC		 419 con = readw(info->base + S3C2410_RTCCON);
420 con &= ~S3C64XX_RTCCON_TICEN;
421 con &= ~S3C2410_RTCCON_RTCEN;
422 writew(con, info->base + S3C2410_RTCCON);
1add6781
BD		 423}
424
19be09f5 425static int s3c_rtc_remove(struct platform_device *pdev)
1add6781 426{
19be09f5
CC		 427 struct s3c_rtc *info = platform_get_drvdata(pdev);
428
429 s3c_rtc_setaie(info->dev, 0);
1add6781 430
7f23a936
JS		 431 if (info->data->needs_src_clk)
432 clk_unprepare(info->rtc_src_clk);
19be09f5 433 clk_unprepare(info->rtc_clk);
e48add8c 434
1add6781
BD		 435 return 0;
436}
437
d2524caa
HS		 438static const struct of_device_id s3c_rtc_dt_match[];
439
ae05c950 440static struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
d2524caa 441{
ae05c950 442 const struct of_device_id *match;
d67288da 443
ae05c950
CC		 444 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
445 return (struct s3c_rtc_data *)match->data;
d2524caa
HS		 446}
447
5a167f45 448static int s3c_rtc_probe(struct platform_device *pdev)
1add6781 449{
19be09f5 450 struct s3c_rtc *info = NULL;
e1df962e 451 struct rtc_time rtc_tm;
1add6781
BD		 452 struct resource *res;
453 int ret;
454
19be09f5
CC		 455 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
456 if (!info)
457 return -ENOMEM;
1add6781
BD		 458
459 /* find the IRQs */
19be09f5
CC		 460 info->irq_tick = platform_get_irq(pdev, 1);
461 if (info->irq_tick < 0) {
1add6781 462 dev_err(&pdev->dev, "no irq for rtc tick\n");
19be09f5 463 return info->irq_tick;
1add6781
BD		 464 }
465
19be09f5 466 info->dev = &pdev->dev;
ae05c950
CC		 467 info->data = s3c_rtc_get_data(pdev);
468 if (!info->data) {
469 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
470 return -EINVAL;
471 }
19be09f5
CC		 472 spin_lock_init(&info->pie_lock);
473 spin_lock_init(&info->alarm_clk_lock);
474
475 platform_set_drvdata(pdev, info);
476
477 info->irq_alarm = platform_get_irq(pdev, 0);
478 if (info->irq_alarm < 0) {
1add6781 479 dev_err(&pdev->dev, "no irq for alarm\n");
19be09f5 480 return info->irq_alarm;
1add6781
BD		 481 }
482
d4a48c2a 483 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
19be09f5 484 info->irq_tick, info->irq_alarm);
1add6781
BD		 485
486 /* get the memory region */
1add6781 487 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
19be09f5
CC		 488 info->base = devm_ioremap_resource(&pdev->dev, res);
489 if (IS_ERR(info->base))
490 return PTR_ERR(info->base);
1add6781 491
19be09f5
CC		 492 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
493 if (IS_ERR(info->rtc_clk)) {
ae6e00b4
JMC		 494 ret = PTR_ERR(info->rtc_clk);
495 if (ret != -EPROBE_DEFER)
496 dev_err(&pdev->dev, "failed to find rtc clock\n");
497 else
498 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
499 return ret;
e48add8c 500 }
19be09f5 501 clk_prepare_enable(info->rtc_clk);
e48add8c 502
eaf3a659
MS		 503 if (info->data->needs_src_clk) {
504 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
505 if (IS_ERR(info->rtc_src_clk)) {
ae6e00b4
JMC		 506 ret = PTR_ERR(info->rtc_src_clk);
507 if (ret != -EPROBE_DEFER)
508 dev_err(&pdev->dev,
509 "failed to find rtc source clock\n");
510 else
511 dev_dbg(&pdev->dev,
512 "probe deferred due to missing rtc src clk\n");
7f23a936 513 clk_disable_unprepare(info->rtc_clk);
ae6e00b4 514 return ret;
eaf3a659
MS		 515 }
516 clk_prepare_enable(info->rtc_src_clk);
df9e26d0 517 }
df9e26d0 518
1add6781 519 /* check to see if everything is setup correctly */
ae05c950
CC		 520 if (info->data->enable)
521 info->data->enable(info);
1add6781 522
d4a48c2a 523 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
19be09f5 524 readw(info->base + S3C2410_RTCCON));
1add6781 525
51b7616e
YK		 526 device_init_wakeup(&pdev->dev, 1);
527
202fe4c2 528 /* Check RTC Time */
492da68c 529 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
202fe4c2
KK		 530 rtc_tm.tm_year = 100;
531 rtc_tm.tm_mon = 0;
532 rtc_tm.tm_mday = 1;
533 rtc_tm.tm_hour = 0;
534 rtc_tm.tm_min = 0;
535 rtc_tm.tm_sec = 0;
536
537 s3c_rtc_settime(&pdev->dev, &rtc_tm);
538
539 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
540 }
541
1add6781 542 /* register RTC and exit */
19be09f5 543 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
1add6781 544 THIS_MODULE);
19be09f5 545 if (IS_ERR(info->rtc)) {
1add6781 546 dev_err(&pdev->dev, "cannot attach rtc\n");
19be09f5 547 ret = PTR_ERR(info->rtc);
1add6781
BD		 548 goto err_nortc;
549 }
550
19be09f5
CC		 551 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
552 0, "s3c2410-rtc alarm", info);
553 if (ret) {
554 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
555 goto err_nortc;
556 }
eaa6e4dd 557
19be09f5
CC		 558 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
559 0, "s3c2410-rtc tick", info);
560 if (ret) {
561 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
562 goto err_nortc;
563 }
051fe54e 564
ae05c950
CC		 565 if (info->data->select_tick_clk)
566 info->data->select_tick_clk(info);
62d17601 567
19be09f5 568 s3c_rtc_setfreq(info, 1);
62d17601 569
1add6781
BD		 570 return 0;
571
572 err_nortc:
ae05c950
CC		 573 if (info->data->disable)
574 info->data->disable(info);
24e14554
CC		 575
576 if (info->data->needs_src_clk)
577 clk_disable_unprepare(info->rtc_src_clk);
19be09f5 578 clk_disable_unprepare(info->rtc_clk);
1add6781 579
1add6781
BD		 580 return ret;
581}
582
32e445aa 583#ifdef CONFIG_PM_SLEEP
1add6781 584
32e445aa 585static int s3c_rtc_suspend(struct device *dev)
1add6781 586{
19be09f5 587 struct s3c_rtc *info = dev_get_drvdata(dev);
32e445aa 588
24e14554 589 s3c_rtc_enable_clk(info);
ae05c950 590
1add6781 591 /* save TICNT for anyone using periodic interrupts */
ae05c950
CC		 592 if (info->data->save_tick_cnt)
593 info->data->save_tick_cnt(info);
594
595 if (info->data->disable)
596 info->data->disable(info);
f501ed52 597
19be09f5
CC		 598 if (device_may_wakeup(dev) && !info->wake_en) {
599 if (enable_irq_wake(info->irq_alarm) == 0)
600 info->wake_en = true;
52cd4e5c 601 else
32e445aa 602 dev_err(dev, "enable_irq_wake failed\n");
52cd4e5c 603 }
ae05c950 604
1add6781
BD		 605 return 0;
606}
607
32e445aa 608static int s3c_rtc_resume(struct device *dev)
1add6781 609{
19be09f5 610 struct s3c_rtc *info = dev_get_drvdata(dev);
9f4123b7 611
ae05c950
CC		 612 if (info->data->enable)
613 info->data->enable(info);
614
615 if (info->data->restore_tick_cnt)
616 info->data->restore_tick_cnt(info);
f501ed52 617
24e14554
CC		 618 s3c_rtc_disable_clk(info);
619
19be09f5
CC		 620 if (device_may_wakeup(dev) && info->wake_en) {
621 disable_irq_wake(info->irq_alarm);
622 info->wake_en = false;
52cd4e5c 623 }
ae05c950 624
1add6781
BD		 625 return 0;
626}
1add6781 627#endif
32e445aa
JH		 628static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
629
ae05c950
CC		 630static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
631{
ae05c950 632 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
ae05c950
CC		 633}
634
635static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
636{
ae05c950
CC		 637 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
638 writeb(mask, info->base + S3C2410_INTP);
ae05c950
CC		 639}
640
641static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
642{
643 unsigned int tmp = 0;
644 int val;
645
646 tmp = readb(info->base + S3C2410_TICNT);
647 tmp &= S3C2410_TICNT_ENABLE;
648
649 val = (info->rtc->max_user_freq / freq) - 1;
650 tmp |= val;
651
652 writel(tmp, info->base + S3C2410_TICNT);
653}
654
655static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
656{
657 unsigned int tmp = 0;
658 int val;
659
660 tmp = readb(info->base + S3C2410_TICNT);
661 tmp &= S3C2410_TICNT_ENABLE;
662
663 val = (info->rtc->max_user_freq / freq) - 1;
664
665 tmp |= S3C2443_TICNT_PART(val);
666 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
667
668 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
669
670 writel(tmp, info->base + S3C2410_TICNT);
671}
672
673static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
674{
675 unsigned int tmp = 0;
676 int val;
677
678 tmp = readb(info->base + S3C2410_TICNT);
679 tmp &= S3C2410_TICNT_ENABLE;
680
681 val = (info->rtc->max_user_freq / freq) - 1;
682
683 tmp |= S3C2443_TICNT_PART(val);
684 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
685
686 writel(tmp, info->base + S3C2410_TICNT);
687}
688
689static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
690{
691 int val;
692
693 val = (info->rtc->max_user_freq / freq) - 1;
694 writel(val, info->base + S3C2410_TICNT);
695}
696
697static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
698{
699 unsigned int ticnt;
700
701 ticnt = readb(info->base + S3C2410_TICNT);
702 ticnt &= S3C2410_TICNT_ENABLE;
703
704 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
705}
706
707static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
708{
709 unsigned int con;
710
711 con = readw(info->base + S3C2410_RTCCON);
712 con |= S3C2443_RTCCON_TICSEL;
713 writew(con, info->base + S3C2410_RTCCON);
714}
715
716static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
717{
718 unsigned int ticnt;
719
720 ticnt = readw(info->base + S3C2410_RTCCON);
721 ticnt &= S3C64XX_RTCCON_TICEN;
722
723 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
724}
725
726static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
727{
728 info->ticnt_save = readb(info->base + S3C2410_TICNT);
729}
730
731static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
732{
733 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
734}
735
736static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
737{
738 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
739 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
740 info->ticnt_save = readl(info->base + S3C2410_TICNT);
741}
742
743static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
744{
745 unsigned int con;
746
747 writel(info->ticnt_save, info->base + S3C2410_TICNT);
748 if (info->ticnt_en_save) {
749 con = readw(info->base + S3C2410_RTCCON);
750 writew(con | info->ticnt_en_save,
751 info->base + S3C2410_RTCCON);
752 }
753}
754
755static struct s3c_rtc_data const s3c2410_rtc_data = {
756 .max_user_freq = 128,
757 .irq_handler = s3c24xx_rtc_irq,
758 .set_freq = s3c2410_rtc_setfreq,
759 .enable_tick = s3c24xx_rtc_enable_tick,
760 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
761 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
762 .enable = s3c24xx_rtc_enable,
763 .disable = s3c24xx_rtc_disable,
764};
765
766static struct s3c_rtc_data const s3c2416_rtc_data = {
767 .max_user_freq = 32768,
768 .irq_handler = s3c24xx_rtc_irq,
769 .set_freq = s3c2416_rtc_setfreq,
770 .enable_tick = s3c24xx_rtc_enable_tick,
771 .select_tick_clk = s3c2416_rtc_select_tick_clk,
772 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
773 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
774 .enable = s3c24xx_rtc_enable,
775 .disable = s3c24xx_rtc_disable,
776};
777
778static struct s3c_rtc_data const s3c2443_rtc_data = {
779 .max_user_freq = 32768,
780 .irq_handler = s3c24xx_rtc_irq,
781 .set_freq = s3c2443_rtc_setfreq,
782 .enable_tick = s3c24xx_rtc_enable_tick,
783 .select_tick_clk = s3c2416_rtc_select_tick_clk,
784 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
785 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
786 .enable = s3c24xx_rtc_enable,
787 .disable = s3c24xx_rtc_disable,
788};
789
790static struct s3c_rtc_data const s3c6410_rtc_data = {
791 .max_user_freq = 32768,
8792f777 792 .needs_src_clk = true,
ae05c950
CC		 793 .irq_handler = s3c6410_rtc_irq,
794 .set_freq = s3c6410_rtc_setfreq,
795 .enable_tick = s3c6410_rtc_enable_tick,
796 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
797 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
798 .enable = s3c24xx_rtc_enable,
799 .disable = s3c6410_rtc_disable,
c3cba928
TB		 800};
801
39ce4084 802static const struct of_device_id s3c_rtc_dt_match[] = {
d2524caa 803 {
cd1e6f9e 804 .compatible = "samsung,s3c2410-rtc",
ae05c950 805 .data = (void *)&s3c2410_rtc_data,
25c1a246 806 }, {
cd1e6f9e 807 .compatible = "samsung,s3c2416-rtc",
ae05c950 808 .data = (void *)&s3c2416_rtc_data,
25c1a246 809 }, {
cd1e6f9e 810 .compatible = "samsung,s3c2443-rtc",
ae05c950 811 .data = (void *)&s3c2443_rtc_data,
d2524caa 812 }, {
cd1e6f9e 813 .compatible = "samsung,s3c6410-rtc",
ae05c950 814 .data = (void *)&s3c6410_rtc_data,
df9e26d0
CC		 815 }, {
816 .compatible = "samsung,exynos3250-rtc",
a42e6eae 817 .data = (void *)&s3c6410_rtc_data,
d2524caa 818 },
ae05c950 819 { /* sentinel */ },
39ce4084
TA		 820};
821MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
9f4123b7
MC		 822
823static struct platform_driver s3c_rtc_driver = {
1add6781 824 .probe = s3c_rtc_probe,
5a167f45 825 .remove = s3c_rtc_remove,
1add6781 826 .driver = {
9f4123b7 827 .name = "s3c-rtc",
32e445aa 828 .pm = &s3c_rtc_pm_ops,
04a373fd 829 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
1add6781
BD		 830 },
831};
0c4eae66 832module_platform_driver(s3c_rtc_driver);
1add6781
BD		 833
834MODULE_DESCRIPTION("Samsung S3C RTC Driver");
835MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
836MODULE_LICENSE("GPL");
ad28a07b 837MODULE_ALIAS("platform:s3c2410-rtc");
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