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1add6781 BD |
1 | /* drivers/rtc/rtc-s3c.c |
2 | * | |
3 | * Copyright (c) 2004,2006 Simtec Electronics | |
4 | * Ben Dooks, <ben@simtec.co.uk> | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/clk.h> | |
23 | ||
24 | #include <asm/hardware.h> | |
25 | #include <asm/uaccess.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/irq.h> | |
28 | #include <asm/rtc.h> | |
29 | ||
30 | #include <asm/mach/time.h> | |
31 | ||
32 | #include <asm/arch/regs-rtc.h> | |
33 | ||
34 | /* I have yet to find an S3C implementation with more than one | |
35 | * of these rtc blocks in */ | |
36 | ||
37 | static struct resource *s3c_rtc_mem; | |
38 | ||
39 | static void __iomem *s3c_rtc_base; | |
40 | static int s3c_rtc_alarmno = NO_IRQ; | |
41 | static int s3c_rtc_tickno = NO_IRQ; | |
42 | static int s3c_rtc_freq = 1; | |
43 | ||
44 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | |
45 | static unsigned int tick_count; | |
46 | ||
47 | /* IRQ Handlers */ | |
48 | ||
7d12e780 | 49 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
1add6781 BD |
50 | { |
51 | struct rtc_device *rdev = id; | |
52 | ||
53 | rtc_update_irq(&rdev->class_dev, 1, RTC_AF | RTC_IRQF); | |
54 | return IRQ_HANDLED; | |
55 | } | |
56 | ||
7d12e780 | 57 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) |
1add6781 BD |
58 | { |
59 | struct rtc_device *rdev = id; | |
60 | ||
61 | rtc_update_irq(&rdev->class_dev, tick_count++, RTC_PF | RTC_IRQF); | |
62 | return IRQ_HANDLED; | |
63 | } | |
64 | ||
65 | /* Update control registers */ | |
66 | static void s3c_rtc_setaie(int to) | |
67 | { | |
68 | unsigned int tmp; | |
69 | ||
70 | pr_debug("%s: aie=%d\n", __FUNCTION__, to); | |
71 | ||
9a654518 | 72 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
1add6781 BD |
73 | |
74 | if (to) | |
75 | tmp |= S3C2410_RTCALM_ALMEN; | |
76 | ||
9a654518 | 77 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
1add6781 BD |
78 | } |
79 | ||
80 | static void s3c_rtc_setpie(int to) | |
81 | { | |
82 | unsigned int tmp; | |
83 | ||
84 | pr_debug("%s: pie=%d\n", __FUNCTION__, to); | |
85 | ||
86 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 87 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE; |
1add6781 BD |
88 | |
89 | if (to) | |
90 | tmp |= S3C2410_TICNT_ENABLE; | |
91 | ||
9a654518 | 92 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
93 | spin_unlock_irq(&s3c_rtc_pie_lock); |
94 | } | |
95 | ||
96 | static void s3c_rtc_setfreq(int freq) | |
97 | { | |
98 | unsigned int tmp; | |
99 | ||
100 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 101 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE; |
1add6781 BD |
102 | |
103 | s3c_rtc_freq = freq; | |
104 | ||
105 | tmp |= (128 / freq)-1; | |
106 | ||
9a654518 | 107 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
108 | spin_unlock_irq(&s3c_rtc_pie_lock); |
109 | } | |
110 | ||
111 | /* Time read/write */ | |
112 | ||
113 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | |
114 | { | |
115 | unsigned int have_retried = 0; | |
9a654518 | 116 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
117 | |
118 | retry_get_time: | |
9a654518 BD |
119 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); |
120 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
121 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
122 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
123 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
124 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
1add6781 BD |
125 | |
126 | /* the only way to work out wether the system was mid-update | |
127 | * when we read it is to check the second counter, and if it | |
128 | * is zero, then we re-try the entire read | |
129 | */ | |
130 | ||
131 | if (rtc_tm->tm_sec == 0 && !have_retried) { | |
132 | have_retried = 1; | |
133 | goto retry_get_time; | |
134 | } | |
135 | ||
136 | pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | |
137 | rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | |
138 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); | |
139 | ||
140 | BCD_TO_BIN(rtc_tm->tm_sec); | |
141 | BCD_TO_BIN(rtc_tm->tm_min); | |
142 | BCD_TO_BIN(rtc_tm->tm_hour); | |
143 | BCD_TO_BIN(rtc_tm->tm_mday); | |
144 | BCD_TO_BIN(rtc_tm->tm_mon); | |
145 | BCD_TO_BIN(rtc_tm->tm_year); | |
146 | ||
147 | rtc_tm->tm_year += 100; | |
148 | rtc_tm->tm_mon -= 1; | |
149 | ||
150 | return 0; | |
151 | } | |
152 | ||
153 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
154 | { | |
9a654518 | 155 | void __iomem *base = s3c_rtc_base; |
641741e0 | 156 | int year = tm->tm_year - 100; |
9a654518 | 157 | |
641741e0 BD |
158 | pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", |
159 | tm->tm_year, tm->tm_mon, tm->tm_mday, | |
160 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
161 | ||
162 | /* we get around y2k by simply not supporting it */ | |
1add6781 | 163 | |
641741e0 | 164 | if (year < 0 || year >= 100) { |
9a654518 | 165 | dev_err(dev, "rtc only supports 100 years\n"); |
1add6781 | 166 | return -EINVAL; |
9a654518 BD |
167 | } |
168 | ||
9a654518 BD |
169 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC); |
170 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN); | |
171 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR); | |
172 | writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE); | |
173 | writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON); | |
641741e0 | 174 | writeb(BIN2BCD(year), base + S3C2410_RTCYEAR); |
1add6781 BD |
175 | |
176 | return 0; | |
177 | } | |
178 | ||
179 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
180 | { | |
181 | struct rtc_time *alm_tm = &alrm->time; | |
9a654518 | 182 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
183 | unsigned int alm_en; |
184 | ||
9a654518 BD |
185 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); |
186 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | |
187 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | |
188 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | |
189 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | |
190 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | |
1add6781 | 191 | |
9a654518 | 192 | alm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 193 | |
a2db8dfc DB |
194 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
195 | ||
1add6781 BD |
196 | pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", |
197 | alm_en, | |
198 | alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, | |
199 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); | |
200 | ||
201 | ||
202 | /* decode the alarm enable field */ | |
203 | ||
204 | if (alm_en & S3C2410_RTCALM_SECEN) | |
205 | BCD_TO_BIN(alm_tm->tm_sec); | |
206 | else | |
207 | alm_tm->tm_sec = 0xff; | |
208 | ||
209 | if (alm_en & S3C2410_RTCALM_MINEN) | |
210 | BCD_TO_BIN(alm_tm->tm_min); | |
211 | else | |
212 | alm_tm->tm_min = 0xff; | |
213 | ||
214 | if (alm_en & S3C2410_RTCALM_HOUREN) | |
215 | BCD_TO_BIN(alm_tm->tm_hour); | |
216 | else | |
217 | alm_tm->tm_hour = 0xff; | |
218 | ||
219 | if (alm_en & S3C2410_RTCALM_DAYEN) | |
220 | BCD_TO_BIN(alm_tm->tm_mday); | |
221 | else | |
222 | alm_tm->tm_mday = 0xff; | |
223 | ||
224 | if (alm_en & S3C2410_RTCALM_MONEN) { | |
225 | BCD_TO_BIN(alm_tm->tm_mon); | |
226 | alm_tm->tm_mon -= 1; | |
227 | } else { | |
228 | alm_tm->tm_mon = 0xff; | |
229 | } | |
230 | ||
231 | if (alm_en & S3C2410_RTCALM_YEAREN) | |
232 | BCD_TO_BIN(alm_tm->tm_year); | |
233 | else | |
234 | alm_tm->tm_year = 0xffff; | |
235 | ||
236 | return 0; | |
237 | } | |
238 | ||
239 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
240 | { | |
241 | struct rtc_time *tm = &alrm->time; | |
9a654518 | 242 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
243 | unsigned int alrm_en; |
244 | ||
245 | pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | |
246 | alrm->enabled, | |
247 | tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | |
248 | tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | |
249 | ||
250 | ||
9a654518 BD |
251 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
252 | writeb(0x00, base + S3C2410_RTCALM); | |
1add6781 BD |
253 | |
254 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | |
255 | alrm_en |= S3C2410_RTCALM_SECEN; | |
9a654518 | 256 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC); |
1add6781 BD |
257 | } |
258 | ||
259 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | |
260 | alrm_en |= S3C2410_RTCALM_MINEN; | |
9a654518 | 261 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN); |
1add6781 BD |
262 | } |
263 | ||
264 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | |
265 | alrm_en |= S3C2410_RTCALM_HOUREN; | |
9a654518 | 266 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR); |
1add6781 BD |
267 | } |
268 | ||
269 | pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); | |
270 | ||
9a654518 | 271 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 BD |
272 | |
273 | if (0) { | |
9a654518 | 274 | alrm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 275 | alrm_en &= ~S3C2410_RTCALM_ALMEN; |
9a654518 | 276 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 BD |
277 | disable_irq_wake(s3c_rtc_alarmno); |
278 | } | |
279 | ||
280 | if (alrm->enabled) | |
281 | enable_irq_wake(s3c_rtc_alarmno); | |
282 | else | |
283 | disable_irq_wake(s3c_rtc_alarmno); | |
284 | ||
285 | return 0; | |
286 | } | |
287 | ||
288 | static int s3c_rtc_ioctl(struct device *dev, | |
289 | unsigned int cmd, unsigned long arg) | |
290 | { | |
291 | unsigned int ret = -ENOIOCTLCMD; | |
292 | ||
293 | switch (cmd) { | |
294 | case RTC_AIE_OFF: | |
295 | case RTC_AIE_ON: | |
296 | s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0); | |
297 | ret = 0; | |
298 | break; | |
299 | ||
300 | case RTC_PIE_OFF: | |
301 | case RTC_PIE_ON: | |
302 | tick_count = 0; | |
303 | s3c_rtc_setpie((cmd == RTC_PIE_ON) ? 1 : 0); | |
304 | ret = 0; | |
305 | break; | |
306 | ||
307 | case RTC_IRQP_READ: | |
308 | ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg); | |
309 | break; | |
310 | ||
311 | case RTC_IRQP_SET: | |
312 | /* check for power of 2 */ | |
313 | ||
314 | if ((arg & (arg-1)) != 0 || arg < 1) { | |
315 | ret = -EINVAL; | |
316 | goto exit; | |
317 | } | |
318 | ||
319 | pr_debug("s3c2410_rtc: setting frequency %ld\n", arg); | |
320 | ||
321 | s3c_rtc_setfreq(arg); | |
322 | ret = 0; | |
323 | break; | |
324 | ||
325 | case RTC_UIE_ON: | |
326 | case RTC_UIE_OFF: | |
327 | ret = -EINVAL; | |
328 | } | |
329 | ||
330 | exit: | |
331 | return ret; | |
332 | } | |
333 | ||
334 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) | |
335 | { | |
9a654518 | 336 | unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 337 | |
1add6781 BD |
338 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
339 | (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" ); | |
340 | ||
341 | seq_printf(seq, "periodic_freq\t: %d\n", s3c_rtc_freq); | |
342 | ||
343 | return 0; | |
344 | } | |
345 | ||
346 | static int s3c_rtc_open(struct device *dev) | |
347 | { | |
348 | struct platform_device *pdev = to_platform_device(dev); | |
349 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
350 | int ret; | |
351 | ||
352 | ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, | |
38515e90 | 353 | IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); |
1add6781 BD |
354 | |
355 | if (ret) { | |
356 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); | |
357 | return ret; | |
358 | } | |
359 | ||
360 | ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, | |
38515e90 | 361 | IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); |
1add6781 BD |
362 | |
363 | if (ret) { | |
364 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | |
365 | goto tick_err; | |
366 | } | |
367 | ||
368 | return ret; | |
369 | ||
370 | tick_err: | |
371 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
372 | return ret; | |
373 | } | |
374 | ||
375 | static void s3c_rtc_release(struct device *dev) | |
376 | { | |
377 | struct platform_device *pdev = to_platform_device(dev); | |
378 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
379 | ||
380 | /* do not clear AIE here, it may be needed for wake */ | |
381 | ||
382 | s3c_rtc_setpie(0); | |
383 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
384 | free_irq(s3c_rtc_tickno, rtc_dev); | |
385 | } | |
386 | ||
ff8371ac | 387 | static const struct rtc_class_ops s3c_rtcops = { |
1add6781 BD |
388 | .open = s3c_rtc_open, |
389 | .release = s3c_rtc_release, | |
390 | .ioctl = s3c_rtc_ioctl, | |
391 | .read_time = s3c_rtc_gettime, | |
392 | .set_time = s3c_rtc_settime, | |
393 | .read_alarm = s3c_rtc_getalarm, | |
394 | .set_alarm = s3c_rtc_setalarm, | |
395 | .proc = s3c_rtc_proc, | |
396 | }; | |
397 | ||
398 | static void s3c_rtc_enable(struct platform_device *pdev, int en) | |
399 | { | |
9a654518 | 400 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
401 | unsigned int tmp; |
402 | ||
403 | if (s3c_rtc_base == NULL) | |
404 | return; | |
405 | ||
406 | if (!en) { | |
9a654518 BD |
407 | tmp = readb(base + S3C2410_RTCCON); |
408 | writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON); | |
1add6781 | 409 | |
9a654518 BD |
410 | tmp = readb(base + S3C2410_TICNT); |
411 | writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT); | |
1add6781 BD |
412 | } else { |
413 | /* re-enable the device, and check it is ok */ | |
414 | ||
9a654518 | 415 | if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ |
1add6781 BD |
416 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); |
417 | ||
9a654518 BD |
418 | tmp = readb(base + S3C2410_RTCCON); |
419 | writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
1add6781 BD |
420 | } |
421 | ||
9a654518 | 422 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ |
1add6781 BD |
423 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); |
424 | ||
9a654518 BD |
425 | tmp = readb(base + S3C2410_RTCCON); |
426 | writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); | |
1add6781 BD |
427 | } |
428 | ||
9a654518 | 429 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ |
1add6781 BD |
430 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); |
431 | ||
9a654518 BD |
432 | tmp = readb(base + S3C2410_RTCCON); |
433 | writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); | |
1add6781 BD |
434 | } |
435 | } | |
436 | } | |
437 | ||
438 | static int s3c_rtc_remove(struct platform_device *dev) | |
439 | { | |
440 | struct rtc_device *rtc = platform_get_drvdata(dev); | |
441 | ||
442 | platform_set_drvdata(dev, NULL); | |
443 | rtc_device_unregister(rtc); | |
444 | ||
445 | s3c_rtc_setpie(0); | |
446 | s3c_rtc_setaie(0); | |
447 | ||
448 | iounmap(s3c_rtc_base); | |
449 | release_resource(s3c_rtc_mem); | |
450 | kfree(s3c_rtc_mem); | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
455 | static int s3c_rtc_probe(struct platform_device *pdev) | |
456 | { | |
457 | struct rtc_device *rtc; | |
458 | struct resource *res; | |
459 | int ret; | |
460 | ||
461 | pr_debug("%s: probe=%p\n", __FUNCTION__, pdev); | |
462 | ||
463 | /* find the IRQs */ | |
464 | ||
465 | s3c_rtc_tickno = platform_get_irq(pdev, 1); | |
466 | if (s3c_rtc_tickno < 0) { | |
467 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | |
468 | return -ENOENT; | |
469 | } | |
470 | ||
471 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); | |
472 | if (s3c_rtc_alarmno < 0) { | |
473 | dev_err(&pdev->dev, "no irq for alarm\n"); | |
474 | return -ENOENT; | |
475 | } | |
476 | ||
477 | pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", | |
478 | s3c_rtc_tickno, s3c_rtc_alarmno); | |
479 | ||
480 | /* get the memory region */ | |
481 | ||
482 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
483 | if (res == NULL) { | |
484 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | |
485 | return -ENOENT; | |
486 | } | |
487 | ||
488 | s3c_rtc_mem = request_mem_region(res->start, | |
9a654518 BD |
489 | res->end-res->start+1, |
490 | pdev->name); | |
1add6781 BD |
491 | |
492 | if (s3c_rtc_mem == NULL) { | |
493 | dev_err(&pdev->dev, "failed to reserve memory region\n"); | |
494 | ret = -ENOENT; | |
495 | goto err_nores; | |
496 | } | |
497 | ||
498 | s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); | |
499 | if (s3c_rtc_base == NULL) { | |
500 | dev_err(&pdev->dev, "failed ioremap()\n"); | |
501 | ret = -EINVAL; | |
502 | goto err_nomap; | |
503 | } | |
504 | ||
505 | /* check to see if everything is setup correctly */ | |
506 | ||
507 | s3c_rtc_enable(pdev, 1); | |
508 | ||
9a654518 BD |
509 | pr_debug("s3c2410_rtc: RTCCON=%02x\n", |
510 | readb(s3c_rtc_base + S3C2410_RTCCON)); | |
1add6781 BD |
511 | |
512 | s3c_rtc_setfreq(s3c_rtc_freq); | |
513 | ||
514 | /* register RTC and exit */ | |
515 | ||
516 | rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
517 | THIS_MODULE); | |
518 | ||
519 | if (IS_ERR(rtc)) { | |
520 | dev_err(&pdev->dev, "cannot attach rtc\n"); | |
521 | ret = PTR_ERR(rtc); | |
522 | goto err_nortc; | |
523 | } | |
524 | ||
525 | rtc->max_user_freq = 128; | |
526 | ||
527 | platform_set_drvdata(pdev, rtc); | |
528 | return 0; | |
529 | ||
530 | err_nortc: | |
531 | s3c_rtc_enable(pdev, 0); | |
532 | iounmap(s3c_rtc_base); | |
533 | ||
534 | err_nomap: | |
535 | release_resource(s3c_rtc_mem); | |
536 | ||
537 | err_nores: | |
538 | return ret; | |
539 | } | |
540 | ||
541 | #ifdef CONFIG_PM | |
542 | ||
543 | /* RTC Power management control */ | |
544 | ||
545 | static struct timespec s3c_rtc_delta; | |
546 | ||
547 | static int ticnt_save; | |
548 | ||
549 | static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
550 | { | |
551 | struct rtc_time tm; | |
552 | struct timespec time; | |
553 | ||
554 | time.tv_nsec = 0; | |
555 | ||
556 | /* save TICNT for anyone using periodic interrupts */ | |
557 | ||
9a654518 | 558 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
559 | |
560 | /* calculate time delta for suspend */ | |
561 | ||
562 | s3c_rtc_gettime(&pdev->dev, &tm); | |
563 | rtc_tm_to_time(&tm, &time.tv_sec); | |
564 | save_time_delta(&s3c_rtc_delta, &time); | |
565 | s3c_rtc_enable(pdev, 0); | |
566 | ||
567 | return 0; | |
568 | } | |
569 | ||
570 | static int s3c_rtc_resume(struct platform_device *pdev) | |
571 | { | |
572 | struct rtc_time tm; | |
573 | struct timespec time; | |
574 | ||
575 | time.tv_nsec = 0; | |
576 | ||
577 | s3c_rtc_enable(pdev, 1); | |
578 | s3c_rtc_gettime(&pdev->dev, &tm); | |
579 | rtc_tm_to_time(&tm, &time.tv_sec); | |
580 | restore_time_delta(&s3c_rtc_delta, &time); | |
581 | ||
9a654518 | 582 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
583 | return 0; |
584 | } | |
585 | #else | |
586 | #define s3c_rtc_suspend NULL | |
587 | #define s3c_rtc_resume NULL | |
588 | #endif | |
589 | ||
590 | static struct platform_driver s3c2410_rtcdrv = { | |
591 | .probe = s3c_rtc_probe, | |
592 | .remove = s3c_rtc_remove, | |
593 | .suspend = s3c_rtc_suspend, | |
594 | .resume = s3c_rtc_resume, | |
595 | .driver = { | |
596 | .name = "s3c2410-rtc", | |
597 | .owner = THIS_MODULE, | |
598 | }, | |
599 | }; | |
600 | ||
601 | static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; | |
602 | ||
603 | static int __init s3c_rtc_init(void) | |
604 | { | |
605 | printk(banner); | |
606 | return platform_driver_register(&s3c2410_rtcdrv); | |
607 | } | |
608 | ||
609 | static void __exit s3c_rtc_exit(void) | |
610 | { | |
611 | platform_driver_unregister(&s3c2410_rtcdrv); | |
612 | } | |
613 | ||
614 | module_init(s3c_rtc_init); | |
615 | module_exit(s3c_rtc_exit); | |
616 | ||
617 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); | |
618 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
619 | MODULE_LICENSE("GPL"); |