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1add6781 BD |
1 | /* drivers/rtc/rtc-s3c.c |
2 | * | |
3 | * Copyright (c) 2004,2006 Simtec Electronics | |
4 | * Ben Dooks, <ben@simtec.co.uk> | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/clk.h> | |
9974b6ea | 23 | #include <linux/log2.h> |
1add6781 BD |
24 | |
25 | #include <asm/hardware.h> | |
26 | #include <asm/uaccess.h> | |
27 | #include <asm/io.h> | |
28 | #include <asm/irq.h> | |
252e4838 | 29 | #include <asm/plat-s3c/regs-rtc.h> |
1add6781 BD |
30 | |
31 | /* I have yet to find an S3C implementation with more than one | |
32 | * of these rtc blocks in */ | |
33 | ||
34 | static struct resource *s3c_rtc_mem; | |
35 | ||
36 | static void __iomem *s3c_rtc_base; | |
37 | static int s3c_rtc_alarmno = NO_IRQ; | |
38 | static int s3c_rtc_tickno = NO_IRQ; | |
1add6781 BD |
39 | |
40 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | |
1add6781 BD |
41 | |
42 | /* IRQ Handlers */ | |
43 | ||
7d12e780 | 44 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
1add6781 BD |
45 | { |
46 | struct rtc_device *rdev = id; | |
47 | ||
ab6a2d70 | 48 | rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); |
1add6781 BD |
49 | return IRQ_HANDLED; |
50 | } | |
51 | ||
7d12e780 | 52 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) |
1add6781 BD |
53 | { |
54 | struct rtc_device *rdev = id; | |
55 | ||
773be7ee | 56 | rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); |
1add6781 BD |
57 | return IRQ_HANDLED; |
58 | } | |
59 | ||
60 | /* Update control registers */ | |
61 | static void s3c_rtc_setaie(int to) | |
62 | { | |
63 | unsigned int tmp; | |
64 | ||
2a4e2b87 | 65 | pr_debug("%s: aie=%d\n", __func__, to); |
1add6781 | 66 | |
9a654518 | 67 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
1add6781 BD |
68 | |
69 | if (to) | |
70 | tmp |= S3C2410_RTCALM_ALMEN; | |
71 | ||
9a654518 | 72 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
1add6781 BD |
73 | } |
74 | ||
773be7ee | 75 | static int s3c_rtc_setpie(struct device *dev, int enabled) |
1add6781 BD |
76 | { |
77 | unsigned int tmp; | |
78 | ||
773be7ee | 79 | pr_debug("%s: pie=%d\n", __func__, enabled); |
1add6781 BD |
80 | |
81 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 82 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE; |
1add6781 | 83 | |
773be7ee | 84 | if (enabled) |
1add6781 BD |
85 | tmp |= S3C2410_TICNT_ENABLE; |
86 | ||
9a654518 | 87 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 88 | spin_unlock_irq(&s3c_rtc_pie_lock); |
773be7ee BD |
89 | |
90 | return 0; | |
1add6781 BD |
91 | } |
92 | ||
773be7ee | 93 | static int s3c_rtc_setfreq(struct device *dev, int freq) |
1add6781 BD |
94 | { |
95 | unsigned int tmp; | |
96 | ||
97 | spin_lock_irq(&s3c_rtc_pie_lock); | |
1add6781 | 98 | |
773be7ee | 99 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE; |
1add6781 BD |
100 | tmp |= (128 / freq)-1; |
101 | ||
9a654518 | 102 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 103 | spin_unlock_irq(&s3c_rtc_pie_lock); |
773be7ee BD |
104 | |
105 | return 0; | |
1add6781 BD |
106 | } |
107 | ||
108 | /* Time read/write */ | |
109 | ||
110 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | |
111 | { | |
112 | unsigned int have_retried = 0; | |
9a654518 | 113 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
114 | |
115 | retry_get_time: | |
9a654518 BD |
116 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); |
117 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
118 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
119 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
120 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
121 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
1add6781 BD |
122 | |
123 | /* the only way to work out wether the system was mid-update | |
124 | * when we read it is to check the second counter, and if it | |
125 | * is zero, then we re-try the entire read | |
126 | */ | |
127 | ||
128 | if (rtc_tm->tm_sec == 0 && !have_retried) { | |
129 | have_retried = 1; | |
130 | goto retry_get_time; | |
131 | } | |
132 | ||
133 | pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | |
134 | rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | |
135 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); | |
136 | ||
137 | BCD_TO_BIN(rtc_tm->tm_sec); | |
138 | BCD_TO_BIN(rtc_tm->tm_min); | |
139 | BCD_TO_BIN(rtc_tm->tm_hour); | |
140 | BCD_TO_BIN(rtc_tm->tm_mday); | |
141 | BCD_TO_BIN(rtc_tm->tm_mon); | |
142 | BCD_TO_BIN(rtc_tm->tm_year); | |
143 | ||
144 | rtc_tm->tm_year += 100; | |
145 | rtc_tm->tm_mon -= 1; | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
151 | { | |
9a654518 | 152 | void __iomem *base = s3c_rtc_base; |
641741e0 | 153 | int year = tm->tm_year - 100; |
9a654518 | 154 | |
641741e0 BD |
155 | pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", |
156 | tm->tm_year, tm->tm_mon, tm->tm_mday, | |
157 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
158 | ||
159 | /* we get around y2k by simply not supporting it */ | |
1add6781 | 160 | |
641741e0 | 161 | if (year < 0 || year >= 100) { |
9a654518 | 162 | dev_err(dev, "rtc only supports 100 years\n"); |
1add6781 | 163 | return -EINVAL; |
9a654518 BD |
164 | } |
165 | ||
9a654518 BD |
166 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC); |
167 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN); | |
168 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR); | |
169 | writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE); | |
170 | writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON); | |
641741e0 | 171 | writeb(BIN2BCD(year), base + S3C2410_RTCYEAR); |
1add6781 BD |
172 | |
173 | return 0; | |
174 | } | |
175 | ||
176 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
177 | { | |
178 | struct rtc_time *alm_tm = &alrm->time; | |
9a654518 | 179 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
180 | unsigned int alm_en; |
181 | ||
9a654518 BD |
182 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); |
183 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | |
184 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | |
185 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | |
186 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | |
187 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | |
1add6781 | 188 | |
9a654518 | 189 | alm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 190 | |
a2db8dfc DB |
191 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
192 | ||
1add6781 BD |
193 | pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", |
194 | alm_en, | |
195 | alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, | |
196 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); | |
197 | ||
198 | ||
199 | /* decode the alarm enable field */ | |
200 | ||
201 | if (alm_en & S3C2410_RTCALM_SECEN) | |
202 | BCD_TO_BIN(alm_tm->tm_sec); | |
203 | else | |
204 | alm_tm->tm_sec = 0xff; | |
205 | ||
206 | if (alm_en & S3C2410_RTCALM_MINEN) | |
207 | BCD_TO_BIN(alm_tm->tm_min); | |
208 | else | |
209 | alm_tm->tm_min = 0xff; | |
210 | ||
211 | if (alm_en & S3C2410_RTCALM_HOUREN) | |
212 | BCD_TO_BIN(alm_tm->tm_hour); | |
213 | else | |
214 | alm_tm->tm_hour = 0xff; | |
215 | ||
216 | if (alm_en & S3C2410_RTCALM_DAYEN) | |
217 | BCD_TO_BIN(alm_tm->tm_mday); | |
218 | else | |
219 | alm_tm->tm_mday = 0xff; | |
220 | ||
221 | if (alm_en & S3C2410_RTCALM_MONEN) { | |
222 | BCD_TO_BIN(alm_tm->tm_mon); | |
223 | alm_tm->tm_mon -= 1; | |
224 | } else { | |
225 | alm_tm->tm_mon = 0xff; | |
226 | } | |
227 | ||
228 | if (alm_en & S3C2410_RTCALM_YEAREN) | |
229 | BCD_TO_BIN(alm_tm->tm_year); | |
230 | else | |
231 | alm_tm->tm_year = 0xffff; | |
232 | ||
233 | return 0; | |
234 | } | |
235 | ||
236 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
237 | { | |
238 | struct rtc_time *tm = &alrm->time; | |
9a654518 | 239 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
240 | unsigned int alrm_en; |
241 | ||
242 | pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | |
243 | alrm->enabled, | |
244 | tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | |
245 | tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | |
246 | ||
247 | ||
9a654518 BD |
248 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
249 | writeb(0x00, base + S3C2410_RTCALM); | |
1add6781 BD |
250 | |
251 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | |
252 | alrm_en |= S3C2410_RTCALM_SECEN; | |
9a654518 | 253 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC); |
1add6781 BD |
254 | } |
255 | ||
256 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | |
257 | alrm_en |= S3C2410_RTCALM_MINEN; | |
9a654518 | 258 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN); |
1add6781 BD |
259 | } |
260 | ||
261 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | |
262 | alrm_en |= S3C2410_RTCALM_HOUREN; | |
9a654518 | 263 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR); |
1add6781 BD |
264 | } |
265 | ||
266 | pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); | |
267 | ||
9a654518 | 268 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 | 269 | |
773be7ee | 270 | s3c_rtc_setaie(alrm->enabled); |
1add6781 BD |
271 | |
272 | if (alrm->enabled) | |
273 | enable_irq_wake(s3c_rtc_alarmno); | |
274 | else | |
275 | disable_irq_wake(s3c_rtc_alarmno); | |
276 | ||
277 | return 0; | |
278 | } | |
279 | ||
1add6781 BD |
280 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) |
281 | { | |
9a654518 | 282 | unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 283 | |
1add6781 BD |
284 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
285 | (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" ); | |
1add6781 BD |
286 | return 0; |
287 | } | |
288 | ||
289 | static int s3c_rtc_open(struct device *dev) | |
290 | { | |
291 | struct platform_device *pdev = to_platform_device(dev); | |
292 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
293 | int ret; | |
294 | ||
295 | ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, | |
38515e90 | 296 | IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); |
1add6781 BD |
297 | |
298 | if (ret) { | |
299 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); | |
300 | return ret; | |
301 | } | |
302 | ||
303 | ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, | |
38515e90 | 304 | IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); |
1add6781 BD |
305 | |
306 | if (ret) { | |
307 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | |
308 | goto tick_err; | |
309 | } | |
310 | ||
311 | return ret; | |
312 | ||
313 | tick_err: | |
314 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
315 | return ret; | |
316 | } | |
317 | ||
318 | static void s3c_rtc_release(struct device *dev) | |
319 | { | |
320 | struct platform_device *pdev = to_platform_device(dev); | |
321 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
322 | ||
323 | /* do not clear AIE here, it may be needed for wake */ | |
324 | ||
773be7ee | 325 | s3c_rtc_setpie(dev, 0); |
1add6781 BD |
326 | free_irq(s3c_rtc_alarmno, rtc_dev); |
327 | free_irq(s3c_rtc_tickno, rtc_dev); | |
328 | } | |
329 | ||
ff8371ac | 330 | static const struct rtc_class_ops s3c_rtcops = { |
1add6781 BD |
331 | .open = s3c_rtc_open, |
332 | .release = s3c_rtc_release, | |
1add6781 BD |
333 | .read_time = s3c_rtc_gettime, |
334 | .set_time = s3c_rtc_settime, | |
335 | .read_alarm = s3c_rtc_getalarm, | |
336 | .set_alarm = s3c_rtc_setalarm, | |
773be7ee BD |
337 | .irq_set_freq = s3c_rtc_setfreq, |
338 | .irq_set_state = s3c_rtc_setpie, | |
1add6781 BD |
339 | .proc = s3c_rtc_proc, |
340 | }; | |
341 | ||
342 | static void s3c_rtc_enable(struct platform_device *pdev, int en) | |
343 | { | |
9a654518 | 344 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
345 | unsigned int tmp; |
346 | ||
347 | if (s3c_rtc_base == NULL) | |
348 | return; | |
349 | ||
350 | if (!en) { | |
9a654518 BD |
351 | tmp = readb(base + S3C2410_RTCCON); |
352 | writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON); | |
1add6781 | 353 | |
9a654518 BD |
354 | tmp = readb(base + S3C2410_TICNT); |
355 | writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT); | |
1add6781 BD |
356 | } else { |
357 | /* re-enable the device, and check it is ok */ | |
358 | ||
9a654518 | 359 | if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ |
1add6781 BD |
360 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); |
361 | ||
9a654518 BD |
362 | tmp = readb(base + S3C2410_RTCCON); |
363 | writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
1add6781 BD |
364 | } |
365 | ||
9a654518 | 366 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ |
1add6781 BD |
367 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); |
368 | ||
9a654518 BD |
369 | tmp = readb(base + S3C2410_RTCCON); |
370 | writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); | |
1add6781 BD |
371 | } |
372 | ||
9a654518 | 373 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ |
1add6781 BD |
374 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); |
375 | ||
9a654518 BD |
376 | tmp = readb(base + S3C2410_RTCCON); |
377 | writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); | |
1add6781 BD |
378 | } |
379 | } | |
380 | } | |
381 | ||
4cd0c5c4 | 382 | static int __devexit s3c_rtc_remove(struct platform_device *dev) |
1add6781 BD |
383 | { |
384 | struct rtc_device *rtc = platform_get_drvdata(dev); | |
385 | ||
386 | platform_set_drvdata(dev, NULL); | |
387 | rtc_device_unregister(rtc); | |
388 | ||
773be7ee | 389 | s3c_rtc_setpie(&dev->dev, 0); |
1add6781 BD |
390 | s3c_rtc_setaie(0); |
391 | ||
392 | iounmap(s3c_rtc_base); | |
393 | release_resource(s3c_rtc_mem); | |
394 | kfree(s3c_rtc_mem); | |
395 | ||
396 | return 0; | |
397 | } | |
398 | ||
4cd0c5c4 | 399 | static int __devinit s3c_rtc_probe(struct platform_device *pdev) |
1add6781 BD |
400 | { |
401 | struct rtc_device *rtc; | |
402 | struct resource *res; | |
403 | int ret; | |
404 | ||
2a4e2b87 | 405 | pr_debug("%s: probe=%p\n", __func__, pdev); |
1add6781 BD |
406 | |
407 | /* find the IRQs */ | |
408 | ||
409 | s3c_rtc_tickno = platform_get_irq(pdev, 1); | |
410 | if (s3c_rtc_tickno < 0) { | |
411 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | |
412 | return -ENOENT; | |
413 | } | |
414 | ||
415 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); | |
416 | if (s3c_rtc_alarmno < 0) { | |
417 | dev_err(&pdev->dev, "no irq for alarm\n"); | |
418 | return -ENOENT; | |
419 | } | |
420 | ||
421 | pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", | |
422 | s3c_rtc_tickno, s3c_rtc_alarmno); | |
423 | ||
424 | /* get the memory region */ | |
425 | ||
426 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
427 | if (res == NULL) { | |
428 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | |
429 | return -ENOENT; | |
430 | } | |
431 | ||
432 | s3c_rtc_mem = request_mem_region(res->start, | |
9a654518 BD |
433 | res->end-res->start+1, |
434 | pdev->name); | |
1add6781 BD |
435 | |
436 | if (s3c_rtc_mem == NULL) { | |
437 | dev_err(&pdev->dev, "failed to reserve memory region\n"); | |
438 | ret = -ENOENT; | |
439 | goto err_nores; | |
440 | } | |
441 | ||
442 | s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); | |
443 | if (s3c_rtc_base == NULL) { | |
444 | dev_err(&pdev->dev, "failed ioremap()\n"); | |
445 | ret = -EINVAL; | |
446 | goto err_nomap; | |
447 | } | |
448 | ||
449 | /* check to see if everything is setup correctly */ | |
450 | ||
451 | s3c_rtc_enable(pdev, 1); | |
452 | ||
9a654518 BD |
453 | pr_debug("s3c2410_rtc: RTCCON=%02x\n", |
454 | readb(s3c_rtc_base + S3C2410_RTCCON)); | |
1add6781 | 455 | |
773be7ee | 456 | s3c_rtc_setfreq(&pdev->dev, 1); |
1add6781 BD |
457 | |
458 | /* register RTC and exit */ | |
459 | ||
460 | rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
461 | THIS_MODULE); | |
462 | ||
463 | if (IS_ERR(rtc)) { | |
464 | dev_err(&pdev->dev, "cannot attach rtc\n"); | |
465 | ret = PTR_ERR(rtc); | |
466 | goto err_nortc; | |
467 | } | |
468 | ||
469 | rtc->max_user_freq = 128; | |
470 | ||
471 | platform_set_drvdata(pdev, rtc); | |
472 | return 0; | |
473 | ||
474 | err_nortc: | |
475 | s3c_rtc_enable(pdev, 0); | |
476 | iounmap(s3c_rtc_base); | |
477 | ||
478 | err_nomap: | |
479 | release_resource(s3c_rtc_mem); | |
480 | ||
481 | err_nores: | |
482 | return ret; | |
483 | } | |
484 | ||
485 | #ifdef CONFIG_PM | |
486 | ||
487 | /* RTC Power management control */ | |
488 | ||
1add6781 BD |
489 | static int ticnt_save; |
490 | ||
491 | static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
492 | { | |
1add6781 | 493 | /* save TICNT for anyone using periodic interrupts */ |
9a654518 | 494 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 495 | s3c_rtc_enable(pdev, 0); |
1add6781 BD |
496 | return 0; |
497 | } | |
498 | ||
499 | static int s3c_rtc_resume(struct platform_device *pdev) | |
500 | { | |
1add6781 | 501 | s3c_rtc_enable(pdev, 1); |
9a654518 | 502 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
503 | return 0; |
504 | } | |
505 | #else | |
506 | #define s3c_rtc_suspend NULL | |
507 | #define s3c_rtc_resume NULL | |
508 | #endif | |
509 | ||
510 | static struct platform_driver s3c2410_rtcdrv = { | |
511 | .probe = s3c_rtc_probe, | |
4cd0c5c4 | 512 | .remove = __devexit_p(s3c_rtc_remove), |
1add6781 BD |
513 | .suspend = s3c_rtc_suspend, |
514 | .resume = s3c_rtc_resume, | |
515 | .driver = { | |
516 | .name = "s3c2410-rtc", | |
517 | .owner = THIS_MODULE, | |
518 | }, | |
519 | }; | |
520 | ||
521 | static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; | |
522 | ||
523 | static int __init s3c_rtc_init(void) | |
524 | { | |
525 | printk(banner); | |
526 | return platform_driver_register(&s3c2410_rtcdrv); | |
527 | } | |
528 | ||
529 | static void __exit s3c_rtc_exit(void) | |
530 | { | |
531 | platform_driver_unregister(&s3c2410_rtcdrv); | |
532 | } | |
533 | ||
534 | module_init(s3c_rtc_init); | |
535 | module_exit(s3c_rtc_exit); | |
536 | ||
537 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); | |
538 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
539 | MODULE_LICENSE("GPL"); | |
ad28a07b | 540 | MODULE_ALIAS("platform:s3c2410-rtc"); |