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1add6781 BD |
1 | /* drivers/rtc/rtc-s3c.c |
2 | * | |
3 | * Copyright (c) 2004,2006 Simtec Electronics | |
4 | * Ben Dooks, <ben@simtec.co.uk> | |
5 | * http://armlinux.simtec.co.uk/ | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * S3C2410/S3C2440/S3C24XX Internal RTC Driver | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/fs.h> | |
16 | #include <linux/string.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/platform_device.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/rtc.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/clk.h> | |
9974b6ea | 23 | #include <linux/log2.h> |
1add6781 BD |
24 | |
25 | #include <asm/hardware.h> | |
26 | #include <asm/uaccess.h> | |
27 | #include <asm/io.h> | |
28 | #include <asm/irq.h> | |
29 | #include <asm/rtc.h> | |
30 | ||
31 | #include <asm/mach/time.h> | |
32 | ||
252e4838 | 33 | #include <asm/plat-s3c/regs-rtc.h> |
1add6781 BD |
34 | |
35 | /* I have yet to find an S3C implementation with more than one | |
36 | * of these rtc blocks in */ | |
37 | ||
38 | static struct resource *s3c_rtc_mem; | |
39 | ||
40 | static void __iomem *s3c_rtc_base; | |
41 | static int s3c_rtc_alarmno = NO_IRQ; | |
42 | static int s3c_rtc_tickno = NO_IRQ; | |
43 | static int s3c_rtc_freq = 1; | |
44 | ||
45 | static DEFINE_SPINLOCK(s3c_rtc_pie_lock); | |
46 | static unsigned int tick_count; | |
47 | ||
48 | /* IRQ Handlers */ | |
49 | ||
7d12e780 | 50 | static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) |
1add6781 BD |
51 | { |
52 | struct rtc_device *rdev = id; | |
53 | ||
ab6a2d70 | 54 | rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); |
1add6781 BD |
55 | return IRQ_HANDLED; |
56 | } | |
57 | ||
7d12e780 | 58 | static irqreturn_t s3c_rtc_tickirq(int irq, void *id) |
1add6781 BD |
59 | { |
60 | struct rtc_device *rdev = id; | |
61 | ||
ab6a2d70 | 62 | rtc_update_irq(rdev, tick_count++, RTC_PF | RTC_IRQF); |
1add6781 BD |
63 | return IRQ_HANDLED; |
64 | } | |
65 | ||
66 | /* Update control registers */ | |
67 | static void s3c_rtc_setaie(int to) | |
68 | { | |
69 | unsigned int tmp; | |
70 | ||
71 | pr_debug("%s: aie=%d\n", __FUNCTION__, to); | |
72 | ||
9a654518 | 73 | tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; |
1add6781 BD |
74 | |
75 | if (to) | |
76 | tmp |= S3C2410_RTCALM_ALMEN; | |
77 | ||
9a654518 | 78 | writeb(tmp, s3c_rtc_base + S3C2410_RTCALM); |
1add6781 BD |
79 | } |
80 | ||
81 | static void s3c_rtc_setpie(int to) | |
82 | { | |
83 | unsigned int tmp; | |
84 | ||
85 | pr_debug("%s: pie=%d\n", __FUNCTION__, to); | |
86 | ||
87 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 88 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE; |
1add6781 BD |
89 | |
90 | if (to) | |
91 | tmp |= S3C2410_TICNT_ENABLE; | |
92 | ||
9a654518 | 93 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
94 | spin_unlock_irq(&s3c_rtc_pie_lock); |
95 | } | |
96 | ||
97 | static void s3c_rtc_setfreq(int freq) | |
98 | { | |
99 | unsigned int tmp; | |
100 | ||
101 | spin_lock_irq(&s3c_rtc_pie_lock); | |
9a654518 | 102 | tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE; |
1add6781 BD |
103 | |
104 | s3c_rtc_freq = freq; | |
105 | ||
106 | tmp |= (128 / freq)-1; | |
107 | ||
9a654518 | 108 | writeb(tmp, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
109 | spin_unlock_irq(&s3c_rtc_pie_lock); |
110 | } | |
111 | ||
112 | /* Time read/write */ | |
113 | ||
114 | static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | |
115 | { | |
116 | unsigned int have_retried = 0; | |
9a654518 | 117 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
118 | |
119 | retry_get_time: | |
9a654518 BD |
120 | rtc_tm->tm_min = readb(base + S3C2410_RTCMIN); |
121 | rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR); | |
122 | rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE); | |
123 | rtc_tm->tm_mon = readb(base + S3C2410_RTCMON); | |
124 | rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR); | |
125 | rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC); | |
1add6781 BD |
126 | |
127 | /* the only way to work out wether the system was mid-update | |
128 | * when we read it is to check the second counter, and if it | |
129 | * is zero, then we re-try the entire read | |
130 | */ | |
131 | ||
132 | if (rtc_tm->tm_sec == 0 && !have_retried) { | |
133 | have_retried = 1; | |
134 | goto retry_get_time; | |
135 | } | |
136 | ||
137 | pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | |
138 | rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | |
139 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); | |
140 | ||
141 | BCD_TO_BIN(rtc_tm->tm_sec); | |
142 | BCD_TO_BIN(rtc_tm->tm_min); | |
143 | BCD_TO_BIN(rtc_tm->tm_hour); | |
144 | BCD_TO_BIN(rtc_tm->tm_mday); | |
145 | BCD_TO_BIN(rtc_tm->tm_mon); | |
146 | BCD_TO_BIN(rtc_tm->tm_year); | |
147 | ||
148 | rtc_tm->tm_year += 100; | |
149 | rtc_tm->tm_mon -= 1; | |
150 | ||
151 | return 0; | |
152 | } | |
153 | ||
154 | static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) | |
155 | { | |
9a654518 | 156 | void __iomem *base = s3c_rtc_base; |
641741e0 | 157 | int year = tm->tm_year - 100; |
9a654518 | 158 | |
641741e0 BD |
159 | pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", |
160 | tm->tm_year, tm->tm_mon, tm->tm_mday, | |
161 | tm->tm_hour, tm->tm_min, tm->tm_sec); | |
162 | ||
163 | /* we get around y2k by simply not supporting it */ | |
1add6781 | 164 | |
641741e0 | 165 | if (year < 0 || year >= 100) { |
9a654518 | 166 | dev_err(dev, "rtc only supports 100 years\n"); |
1add6781 | 167 | return -EINVAL; |
9a654518 BD |
168 | } |
169 | ||
9a654518 BD |
170 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC); |
171 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN); | |
172 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR); | |
173 | writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE); | |
174 | writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON); | |
641741e0 | 175 | writeb(BIN2BCD(year), base + S3C2410_RTCYEAR); |
1add6781 BD |
176 | |
177 | return 0; | |
178 | } | |
179 | ||
180 | static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
181 | { | |
182 | struct rtc_time *alm_tm = &alrm->time; | |
9a654518 | 183 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
184 | unsigned int alm_en; |
185 | ||
9a654518 BD |
186 | alm_tm->tm_sec = readb(base + S3C2410_ALMSEC); |
187 | alm_tm->tm_min = readb(base + S3C2410_ALMMIN); | |
188 | alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR); | |
189 | alm_tm->tm_mon = readb(base + S3C2410_ALMMON); | |
190 | alm_tm->tm_mday = readb(base + S3C2410_ALMDATE); | |
191 | alm_tm->tm_year = readb(base + S3C2410_ALMYEAR); | |
1add6781 | 192 | |
9a654518 | 193 | alm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 194 | |
a2db8dfc DB |
195 | alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; |
196 | ||
1add6781 BD |
197 | pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", |
198 | alm_en, | |
199 | alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, | |
200 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); | |
201 | ||
202 | ||
203 | /* decode the alarm enable field */ | |
204 | ||
205 | if (alm_en & S3C2410_RTCALM_SECEN) | |
206 | BCD_TO_BIN(alm_tm->tm_sec); | |
207 | else | |
208 | alm_tm->tm_sec = 0xff; | |
209 | ||
210 | if (alm_en & S3C2410_RTCALM_MINEN) | |
211 | BCD_TO_BIN(alm_tm->tm_min); | |
212 | else | |
213 | alm_tm->tm_min = 0xff; | |
214 | ||
215 | if (alm_en & S3C2410_RTCALM_HOUREN) | |
216 | BCD_TO_BIN(alm_tm->tm_hour); | |
217 | else | |
218 | alm_tm->tm_hour = 0xff; | |
219 | ||
220 | if (alm_en & S3C2410_RTCALM_DAYEN) | |
221 | BCD_TO_BIN(alm_tm->tm_mday); | |
222 | else | |
223 | alm_tm->tm_mday = 0xff; | |
224 | ||
225 | if (alm_en & S3C2410_RTCALM_MONEN) { | |
226 | BCD_TO_BIN(alm_tm->tm_mon); | |
227 | alm_tm->tm_mon -= 1; | |
228 | } else { | |
229 | alm_tm->tm_mon = 0xff; | |
230 | } | |
231 | ||
232 | if (alm_en & S3C2410_RTCALM_YEAREN) | |
233 | BCD_TO_BIN(alm_tm->tm_year); | |
234 | else | |
235 | alm_tm->tm_year = 0xffff; | |
236 | ||
237 | return 0; | |
238 | } | |
239 | ||
240 | static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |
241 | { | |
242 | struct rtc_time *tm = &alrm->time; | |
9a654518 | 243 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
244 | unsigned int alrm_en; |
245 | ||
246 | pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | |
247 | alrm->enabled, | |
248 | tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | |
249 | tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | |
250 | ||
251 | ||
9a654518 BD |
252 | alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; |
253 | writeb(0x00, base + S3C2410_RTCALM); | |
1add6781 BD |
254 | |
255 | if (tm->tm_sec < 60 && tm->tm_sec >= 0) { | |
256 | alrm_en |= S3C2410_RTCALM_SECEN; | |
9a654518 | 257 | writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC); |
1add6781 BD |
258 | } |
259 | ||
260 | if (tm->tm_min < 60 && tm->tm_min >= 0) { | |
261 | alrm_en |= S3C2410_RTCALM_MINEN; | |
9a654518 | 262 | writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN); |
1add6781 BD |
263 | } |
264 | ||
265 | if (tm->tm_hour < 24 && tm->tm_hour >= 0) { | |
266 | alrm_en |= S3C2410_RTCALM_HOUREN; | |
9a654518 | 267 | writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR); |
1add6781 BD |
268 | } |
269 | ||
270 | pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en); | |
271 | ||
9a654518 | 272 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 BD |
273 | |
274 | if (0) { | |
9a654518 | 275 | alrm_en = readb(base + S3C2410_RTCALM); |
1add6781 | 276 | alrm_en &= ~S3C2410_RTCALM_ALMEN; |
9a654518 | 277 | writeb(alrm_en, base + S3C2410_RTCALM); |
1add6781 BD |
278 | disable_irq_wake(s3c_rtc_alarmno); |
279 | } | |
280 | ||
281 | if (alrm->enabled) | |
282 | enable_irq_wake(s3c_rtc_alarmno); | |
283 | else | |
284 | disable_irq_wake(s3c_rtc_alarmno); | |
285 | ||
286 | return 0; | |
287 | } | |
288 | ||
289 | static int s3c_rtc_ioctl(struct device *dev, | |
290 | unsigned int cmd, unsigned long arg) | |
291 | { | |
292 | unsigned int ret = -ENOIOCTLCMD; | |
293 | ||
294 | switch (cmd) { | |
295 | case RTC_AIE_OFF: | |
296 | case RTC_AIE_ON: | |
297 | s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0); | |
298 | ret = 0; | |
299 | break; | |
300 | ||
301 | case RTC_PIE_OFF: | |
302 | case RTC_PIE_ON: | |
303 | tick_count = 0; | |
304 | s3c_rtc_setpie((cmd == RTC_PIE_ON) ? 1 : 0); | |
305 | ret = 0; | |
306 | break; | |
307 | ||
308 | case RTC_IRQP_READ: | |
309 | ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg); | |
310 | break; | |
311 | ||
312 | case RTC_IRQP_SET: | |
9974b6ea | 313 | if (!is_power_of_2(arg)) { |
1add6781 BD |
314 | ret = -EINVAL; |
315 | goto exit; | |
316 | } | |
317 | ||
318 | pr_debug("s3c2410_rtc: setting frequency %ld\n", arg); | |
319 | ||
320 | s3c_rtc_setfreq(arg); | |
321 | ret = 0; | |
322 | break; | |
323 | ||
324 | case RTC_UIE_ON: | |
325 | case RTC_UIE_OFF: | |
326 | ret = -EINVAL; | |
327 | } | |
328 | ||
329 | exit: | |
330 | return ret; | |
331 | } | |
332 | ||
333 | static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) | |
334 | { | |
9a654518 | 335 | unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 336 | |
1add6781 BD |
337 | seq_printf(seq, "periodic_IRQ\t: %s\n", |
338 | (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" ); | |
339 | ||
340 | seq_printf(seq, "periodic_freq\t: %d\n", s3c_rtc_freq); | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
345 | static int s3c_rtc_open(struct device *dev) | |
346 | { | |
347 | struct platform_device *pdev = to_platform_device(dev); | |
348 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
349 | int ret; | |
350 | ||
351 | ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq, | |
38515e90 | 352 | IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev); |
1add6781 BD |
353 | |
354 | if (ret) { | |
355 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret); | |
356 | return ret; | |
357 | } | |
358 | ||
359 | ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq, | |
38515e90 | 360 | IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev); |
1add6781 BD |
361 | |
362 | if (ret) { | |
363 | dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret); | |
364 | goto tick_err; | |
365 | } | |
366 | ||
367 | return ret; | |
368 | ||
369 | tick_err: | |
370 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
371 | return ret; | |
372 | } | |
373 | ||
374 | static void s3c_rtc_release(struct device *dev) | |
375 | { | |
376 | struct platform_device *pdev = to_platform_device(dev); | |
377 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | |
378 | ||
379 | /* do not clear AIE here, it may be needed for wake */ | |
380 | ||
381 | s3c_rtc_setpie(0); | |
382 | free_irq(s3c_rtc_alarmno, rtc_dev); | |
383 | free_irq(s3c_rtc_tickno, rtc_dev); | |
384 | } | |
385 | ||
ff8371ac | 386 | static const struct rtc_class_ops s3c_rtcops = { |
1add6781 BD |
387 | .open = s3c_rtc_open, |
388 | .release = s3c_rtc_release, | |
389 | .ioctl = s3c_rtc_ioctl, | |
390 | .read_time = s3c_rtc_gettime, | |
391 | .set_time = s3c_rtc_settime, | |
392 | .read_alarm = s3c_rtc_getalarm, | |
393 | .set_alarm = s3c_rtc_setalarm, | |
394 | .proc = s3c_rtc_proc, | |
395 | }; | |
396 | ||
397 | static void s3c_rtc_enable(struct platform_device *pdev, int en) | |
398 | { | |
9a654518 | 399 | void __iomem *base = s3c_rtc_base; |
1add6781 BD |
400 | unsigned int tmp; |
401 | ||
402 | if (s3c_rtc_base == NULL) | |
403 | return; | |
404 | ||
405 | if (!en) { | |
9a654518 BD |
406 | tmp = readb(base + S3C2410_RTCCON); |
407 | writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON); | |
1add6781 | 408 | |
9a654518 BD |
409 | tmp = readb(base + S3C2410_TICNT); |
410 | writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT); | |
1add6781 BD |
411 | } else { |
412 | /* re-enable the device, and check it is ok */ | |
413 | ||
9a654518 | 414 | if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){ |
1add6781 BD |
415 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); |
416 | ||
9a654518 BD |
417 | tmp = readb(base + S3C2410_RTCCON); |
418 | writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON); | |
1add6781 BD |
419 | } |
420 | ||
9a654518 | 421 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){ |
1add6781 BD |
422 | dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n"); |
423 | ||
9a654518 BD |
424 | tmp = readb(base + S3C2410_RTCCON); |
425 | writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON); | |
1add6781 BD |
426 | } |
427 | ||
9a654518 | 428 | if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){ |
1add6781 BD |
429 | dev_info(&pdev->dev, "removing RTCCON_CLKRST\n"); |
430 | ||
9a654518 BD |
431 | tmp = readb(base + S3C2410_RTCCON); |
432 | writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON); | |
1add6781 BD |
433 | } |
434 | } | |
435 | } | |
436 | ||
437 | static int s3c_rtc_remove(struct platform_device *dev) | |
438 | { | |
439 | struct rtc_device *rtc = platform_get_drvdata(dev); | |
440 | ||
441 | platform_set_drvdata(dev, NULL); | |
442 | rtc_device_unregister(rtc); | |
443 | ||
444 | s3c_rtc_setpie(0); | |
445 | s3c_rtc_setaie(0); | |
446 | ||
447 | iounmap(s3c_rtc_base); | |
448 | release_resource(s3c_rtc_mem); | |
449 | kfree(s3c_rtc_mem); | |
450 | ||
451 | return 0; | |
452 | } | |
453 | ||
454 | static int s3c_rtc_probe(struct platform_device *pdev) | |
455 | { | |
456 | struct rtc_device *rtc; | |
457 | struct resource *res; | |
458 | int ret; | |
459 | ||
460 | pr_debug("%s: probe=%p\n", __FUNCTION__, pdev); | |
461 | ||
462 | /* find the IRQs */ | |
463 | ||
464 | s3c_rtc_tickno = platform_get_irq(pdev, 1); | |
465 | if (s3c_rtc_tickno < 0) { | |
466 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | |
467 | return -ENOENT; | |
468 | } | |
469 | ||
470 | s3c_rtc_alarmno = platform_get_irq(pdev, 0); | |
471 | if (s3c_rtc_alarmno < 0) { | |
472 | dev_err(&pdev->dev, "no irq for alarm\n"); | |
473 | return -ENOENT; | |
474 | } | |
475 | ||
476 | pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n", | |
477 | s3c_rtc_tickno, s3c_rtc_alarmno); | |
478 | ||
479 | /* get the memory region */ | |
480 | ||
481 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
482 | if (res == NULL) { | |
483 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | |
484 | return -ENOENT; | |
485 | } | |
486 | ||
487 | s3c_rtc_mem = request_mem_region(res->start, | |
9a654518 BD |
488 | res->end-res->start+1, |
489 | pdev->name); | |
1add6781 BD |
490 | |
491 | if (s3c_rtc_mem == NULL) { | |
492 | dev_err(&pdev->dev, "failed to reserve memory region\n"); | |
493 | ret = -ENOENT; | |
494 | goto err_nores; | |
495 | } | |
496 | ||
497 | s3c_rtc_base = ioremap(res->start, res->end - res->start + 1); | |
498 | if (s3c_rtc_base == NULL) { | |
499 | dev_err(&pdev->dev, "failed ioremap()\n"); | |
500 | ret = -EINVAL; | |
501 | goto err_nomap; | |
502 | } | |
503 | ||
504 | /* check to see if everything is setup correctly */ | |
505 | ||
506 | s3c_rtc_enable(pdev, 1); | |
507 | ||
9a654518 BD |
508 | pr_debug("s3c2410_rtc: RTCCON=%02x\n", |
509 | readb(s3c_rtc_base + S3C2410_RTCCON)); | |
1add6781 BD |
510 | |
511 | s3c_rtc_setfreq(s3c_rtc_freq); | |
512 | ||
513 | /* register RTC and exit */ | |
514 | ||
515 | rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops, | |
516 | THIS_MODULE); | |
517 | ||
518 | if (IS_ERR(rtc)) { | |
519 | dev_err(&pdev->dev, "cannot attach rtc\n"); | |
520 | ret = PTR_ERR(rtc); | |
521 | goto err_nortc; | |
522 | } | |
523 | ||
524 | rtc->max_user_freq = 128; | |
525 | ||
526 | platform_set_drvdata(pdev, rtc); | |
527 | return 0; | |
528 | ||
529 | err_nortc: | |
530 | s3c_rtc_enable(pdev, 0); | |
531 | iounmap(s3c_rtc_base); | |
532 | ||
533 | err_nomap: | |
534 | release_resource(s3c_rtc_mem); | |
535 | ||
536 | err_nores: | |
537 | return ret; | |
538 | } | |
539 | ||
540 | #ifdef CONFIG_PM | |
541 | ||
542 | /* RTC Power management control */ | |
543 | ||
1add6781 BD |
544 | static int ticnt_save; |
545 | ||
546 | static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state) | |
547 | { | |
1add6781 | 548 | /* save TICNT for anyone using periodic interrupts */ |
9a654518 | 549 | ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT); |
1add6781 | 550 | s3c_rtc_enable(pdev, 0); |
1add6781 BD |
551 | return 0; |
552 | } | |
553 | ||
554 | static int s3c_rtc_resume(struct platform_device *pdev) | |
555 | { | |
1add6781 | 556 | s3c_rtc_enable(pdev, 1); |
9a654518 | 557 | writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT); |
1add6781 BD |
558 | return 0; |
559 | } | |
560 | #else | |
561 | #define s3c_rtc_suspend NULL | |
562 | #define s3c_rtc_resume NULL | |
563 | #endif | |
564 | ||
565 | static struct platform_driver s3c2410_rtcdrv = { | |
566 | .probe = s3c_rtc_probe, | |
567 | .remove = s3c_rtc_remove, | |
568 | .suspend = s3c_rtc_suspend, | |
569 | .resume = s3c_rtc_resume, | |
570 | .driver = { | |
571 | .name = "s3c2410-rtc", | |
572 | .owner = THIS_MODULE, | |
573 | }, | |
574 | }; | |
575 | ||
576 | static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n"; | |
577 | ||
578 | static int __init s3c_rtc_init(void) | |
579 | { | |
580 | printk(banner); | |
581 | return platform_driver_register(&s3c2410_rtcdrv); | |
582 | } | |
583 | ||
584 | static void __exit s3c_rtc_exit(void) | |
585 | { | |
586 | platform_driver_unregister(&s3c2410_rtcdrv); | |
587 | } | |
588 | ||
589 | module_init(s3c_rtc_init); | |
590 | module_exit(s3c_rtc_exit); | |
591 | ||
592 | MODULE_DESCRIPTION("Samsung S3C RTC Driver"); | |
593 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
594 | MODULE_LICENSE("GPL"); |