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5bccae6e SK |
1 | /* |
2 | * Copyright (c) 2013 Samsung Electronics Co., Ltd | |
3 | * http://www.samsung.com | |
4 | * | |
5 | * Copyright (C) 2013 Google, Inc | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
18 | #include <linux/module.h> | |
19 | #include <linux/i2c.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/bcd.h> | |
22 | #include <linux/bitops.h> | |
23 | #include <linux/regmap.h> | |
24 | #include <linux/rtc.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/platform_device.h> | |
27 | #include <linux/mfd/samsung/core.h> | |
28 | #include <linux/mfd/samsung/irq.h> | |
29 | #include <linux/mfd/samsung/rtc.h> | |
30 | ||
d73238d4 KK |
31 | /* |
32 | * Maximum number of retries for checking changes in UDR field | |
602cb5bb | 33 | * of S5M_RTC_UDR_CON register (to limit possible endless loop). |
d73238d4 KK |
34 | * |
35 | * After writing to RTC registers (setting time or alarm) read the UDR field | |
602cb5bb | 36 | * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have |
d73238d4 KK |
37 | * been transferred. |
38 | */ | |
39 | #define UDR_READ_RETRY_CNT 5 | |
40 | ||
5bccae6e SK |
41 | struct s5m_rtc_info { |
42 | struct device *dev; | |
e349c910 | 43 | struct i2c_client *i2c; |
5bccae6e | 44 | struct sec_pmic_dev *s5m87xx; |
5ccb7d71 | 45 | struct regmap *regmap; |
5bccae6e SK |
46 | struct rtc_device *rtc_dev; |
47 | int irq; | |
48 | int device_type; | |
49 | int rtc_24hr_mode; | |
50 | bool wtsr_smpl; | |
51 | }; | |
52 | ||
e349c910 KK |
53 | static const struct regmap_config s5m_rtc_regmap_config = { |
54 | .reg_bits = 8, | |
55 | .val_bits = 8, | |
56 | ||
602cb5bb | 57 | .max_register = S5M_RTC_REG_MAX, |
e349c910 KK |
58 | }; |
59 | ||
60 | static const struct regmap_config s2mps14_rtc_regmap_config = { | |
61 | .reg_bits = 8, | |
62 | .val_bits = 8, | |
63 | ||
64 | .max_register = S2MPS_RTC_REG_MAX, | |
65 | }; | |
66 | ||
5bccae6e SK |
67 | static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm, |
68 | int rtc_24hr_mode) | |
69 | { | |
70 | tm->tm_sec = data[RTC_SEC] & 0x7f; | |
71 | tm->tm_min = data[RTC_MIN] & 0x7f; | |
72 | if (rtc_24hr_mode) { | |
73 | tm->tm_hour = data[RTC_HOUR] & 0x1f; | |
74 | } else { | |
75 | tm->tm_hour = data[RTC_HOUR] & 0x0f; | |
76 | if (data[RTC_HOUR] & HOUR_PM_MASK) | |
77 | tm->tm_hour += 12; | |
78 | } | |
79 | ||
80 | tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f); | |
81 | tm->tm_mday = data[RTC_DATE] & 0x1f; | |
82 | tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; | |
83 | tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100; | |
84 | tm->tm_yday = 0; | |
85 | tm->tm_isdst = 0; | |
86 | } | |
87 | ||
88 | static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data) | |
89 | { | |
90 | data[RTC_SEC] = tm->tm_sec; | |
91 | data[RTC_MIN] = tm->tm_min; | |
92 | ||
93 | if (tm->tm_hour >= 12) | |
94 | data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK; | |
95 | else | |
96 | data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK; | |
97 | ||
98 | data[RTC_WEEKDAY] = 1 << tm->tm_wday; | |
99 | data[RTC_DATE] = tm->tm_mday; | |
100 | data[RTC_MONTH] = tm->tm_mon + 1; | |
101 | data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; | |
102 | ||
103 | if (tm->tm_year < 100) { | |
104 | pr_err("s5m8767 RTC cannot handle the year %d.\n", | |
105 | 1900 + tm->tm_year); | |
106 | return -EINVAL; | |
107 | } else { | |
108 | return 0; | |
109 | } | |
110 | } | |
111 | ||
d73238d4 KK |
112 | /* |
113 | * Read RTC_UDR_CON register and wait till UDR field is cleared. | |
114 | * This indicates that time/alarm update ended. | |
115 | */ | |
116 | static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info) | |
117 | { | |
118 | int ret, retry = UDR_READ_RETRY_CNT; | |
119 | unsigned int data; | |
120 | ||
121 | do { | |
602cb5bb KK |
122 | ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data); |
123 | } while (--retry && (data & S5M_RTC_UDR_MASK) && !ret); | |
d73238d4 KK |
124 | |
125 | if (!retry) | |
126 | dev_err(info->dev, "waiting for UDR update, reached max number of retries\n"); | |
127 | ||
128 | return ret; | |
129 | } | |
130 | ||
5bccae6e SK |
131 | static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) |
132 | { | |
133 | int ret; | |
134 | unsigned int data; | |
135 | ||
602cb5bb | 136 | ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data); |
5bccae6e SK |
137 | if (ret < 0) { |
138 | dev_err(info->dev, "failed to read update reg(%d)\n", ret); | |
139 | return ret; | |
140 | } | |
141 | ||
602cb5bb KK |
142 | data |= S5M_RTC_TIME_EN_MASK; |
143 | data |= S5M_RTC_UDR_MASK; | |
5bccae6e | 144 | |
602cb5bb | 145 | ret = regmap_write(info->regmap, S5M_RTC_UDR_CON, data); |
5bccae6e SK |
146 | if (ret < 0) { |
147 | dev_err(info->dev, "failed to write update reg(%d)\n", ret); | |
148 | return ret; | |
149 | } | |
150 | ||
d73238d4 | 151 | ret = s5m8767_wait_for_udr_update(info); |
5bccae6e SK |
152 | |
153 | return ret; | |
154 | } | |
155 | ||
156 | static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) | |
157 | { | |
158 | int ret; | |
159 | unsigned int data; | |
160 | ||
602cb5bb | 161 | ret = regmap_read(info->regmap, S5M_RTC_UDR_CON, &data); |
5bccae6e SK |
162 | if (ret < 0) { |
163 | dev_err(info->dev, "%s: fail to read update reg(%d)\n", | |
164 | __func__, ret); | |
165 | return ret; | |
166 | } | |
167 | ||
602cb5bb KK |
168 | data &= ~S5M_RTC_TIME_EN_MASK; |
169 | data |= S5M_RTC_UDR_MASK; | |
5bccae6e | 170 | |
602cb5bb | 171 | ret = regmap_write(info->regmap, S5M_RTC_UDR_CON, data); |
5bccae6e SK |
172 | if (ret < 0) { |
173 | dev_err(info->dev, "%s: fail to write update reg(%d)\n", | |
174 | __func__, ret); | |
175 | return ret; | |
176 | } | |
177 | ||
d73238d4 | 178 | ret = s5m8767_wait_for_udr_update(info); |
5bccae6e SK |
179 | |
180 | return ret; | |
181 | } | |
182 | ||
183 | static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm) | |
184 | { | |
185 | tm->tm_sec = bcd2bin(data[RTC_SEC]); | |
186 | tm->tm_min = bcd2bin(data[RTC_MIN]); | |
187 | ||
188 | if (data[RTC_HOUR] & HOUR_12) { | |
189 | tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f); | |
190 | if (data[RTC_HOUR] & HOUR_PM) | |
191 | tm->tm_hour += 12; | |
192 | } else { | |
193 | tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f); | |
194 | } | |
195 | ||
196 | tm->tm_wday = data[RTC_WEEKDAY] & 0x07; | |
197 | tm->tm_mday = bcd2bin(data[RTC_DATE]); | |
198 | tm->tm_mon = bcd2bin(data[RTC_MONTH]); | |
199 | tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100; | |
200 | tm->tm_year -= 1900; | |
201 | } | |
202 | ||
203 | static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data) | |
204 | { | |
205 | data[RTC_SEC] = bin2bcd(tm->tm_sec); | |
206 | data[RTC_MIN] = bin2bcd(tm->tm_min); | |
207 | data[RTC_HOUR] = bin2bcd(tm->tm_hour); | |
208 | data[RTC_WEEKDAY] = tm->tm_wday; | |
209 | data[RTC_DATE] = bin2bcd(tm->tm_mday); | |
210 | data[RTC_MONTH] = bin2bcd(tm->tm_mon); | |
211 | data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100); | |
212 | data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100); | |
213 | } | |
214 | ||
215 | static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) | |
216 | { | |
217 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
218 | u8 data[8]; | |
219 | int ret; | |
220 | ||
602cb5bb | 221 | ret = regmap_bulk_read(info->regmap, S5M_RTC_SEC, data, 8); |
5bccae6e SK |
222 | if (ret < 0) |
223 | return ret; | |
224 | ||
225 | switch (info->device_type) { | |
226 | case S5M8763X: | |
227 | s5m8763_data_to_tm(data, tm); | |
228 | break; | |
229 | ||
230 | case S5M8767X: | |
231 | s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode); | |
232 | break; | |
233 | ||
234 | default: | |
235 | return -EINVAL; | |
236 | } | |
237 | ||
238 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
239 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, | |
240 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); | |
241 | ||
242 | return rtc_valid_tm(tm); | |
243 | } | |
244 | ||
245 | static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm) | |
246 | { | |
247 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
248 | u8 data[8]; | |
249 | int ret = 0; | |
250 | ||
251 | switch (info->device_type) { | |
252 | case S5M8763X: | |
253 | s5m8763_tm_to_data(tm, data); | |
254 | break; | |
255 | case S5M8767X: | |
256 | ret = s5m8767_tm_to_data(tm, data); | |
257 | break; | |
258 | default: | |
259 | return -EINVAL; | |
260 | } | |
261 | ||
262 | if (ret < 0) | |
263 | return ret; | |
264 | ||
265 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
266 | 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, | |
267 | tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); | |
268 | ||
602cb5bb | 269 | ret = regmap_raw_write(info->regmap, S5M_RTC_SEC, data, 8); |
5bccae6e SK |
270 | if (ret < 0) |
271 | return ret; | |
272 | ||
273 | ret = s5m8767_rtc_set_time_reg(info); | |
274 | ||
275 | return ret; | |
276 | } | |
277 | ||
278 | static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
279 | { | |
280 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
281 | u8 data[8]; | |
282 | unsigned int val; | |
283 | int ret, i; | |
284 | ||
602cb5bb | 285 | ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8); |
5bccae6e SK |
286 | if (ret < 0) |
287 | return ret; | |
288 | ||
289 | switch (info->device_type) { | |
290 | case S5M8763X: | |
291 | s5m8763_data_to_tm(data, &alrm->time); | |
602cb5bb | 292 | ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val); |
5bccae6e SK |
293 | if (ret < 0) |
294 | return ret; | |
295 | ||
296 | alrm->enabled = !!val; | |
297 | ||
602cb5bb | 298 | ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val); |
5bccae6e SK |
299 | if (ret < 0) |
300 | return ret; | |
301 | ||
302 | break; | |
303 | ||
304 | case S5M8767X: | |
305 | s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); | |
306 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
307 | 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, | |
308 | alrm->time.tm_mday, alrm->time.tm_hour, | |
309 | alrm->time.tm_min, alrm->time.tm_sec, | |
310 | alrm->time.tm_wday); | |
311 | ||
312 | alrm->enabled = 0; | |
313 | for (i = 0; i < 7; i++) { | |
314 | if (data[i] & ALARM_ENABLE_MASK) { | |
315 | alrm->enabled = 1; | |
316 | break; | |
317 | } | |
318 | } | |
319 | ||
320 | alrm->pending = 0; | |
602cb5bb | 321 | ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val); |
5bccae6e SK |
322 | if (ret < 0) |
323 | return ret; | |
324 | break; | |
325 | ||
326 | default: | |
327 | return -EINVAL; | |
328 | } | |
329 | ||
602cb5bb | 330 | if (val & S5M_ALARM0_STATUS) |
5bccae6e SK |
331 | alrm->pending = 1; |
332 | else | |
333 | alrm->pending = 0; | |
334 | ||
335 | return 0; | |
336 | } | |
337 | ||
338 | static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) | |
339 | { | |
340 | u8 data[8]; | |
341 | int ret, i; | |
342 | struct rtc_time tm; | |
343 | ||
602cb5bb | 344 | ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8); |
5bccae6e SK |
345 | if (ret < 0) |
346 | return ret; | |
347 | ||
348 | s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
349 | dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
350 | 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, | |
351 | tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); | |
352 | ||
353 | switch (info->device_type) { | |
354 | case S5M8763X: | |
602cb5bb | 355 | ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0); |
5bccae6e SK |
356 | break; |
357 | ||
358 | case S5M8767X: | |
359 | for (i = 0; i < 7; i++) | |
360 | data[i] &= ~ALARM_ENABLE_MASK; | |
361 | ||
602cb5bb | 362 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8); |
5bccae6e SK |
363 | if (ret < 0) |
364 | return ret; | |
365 | ||
366 | ret = s5m8767_rtc_set_alarm_reg(info); | |
367 | ||
368 | break; | |
369 | ||
370 | default: | |
371 | return -EINVAL; | |
372 | } | |
373 | ||
374 | return ret; | |
375 | } | |
376 | ||
377 | static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) | |
378 | { | |
379 | int ret; | |
380 | u8 data[8]; | |
381 | u8 alarm0_conf; | |
382 | struct rtc_time tm; | |
383 | ||
602cb5bb | 384 | ret = regmap_bulk_read(info->regmap, S5M_ALARM0_SEC, data, 8); |
5bccae6e SK |
385 | if (ret < 0) |
386 | return ret; | |
387 | ||
388 | s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); | |
389 | dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
390 | 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, | |
391 | tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); | |
392 | ||
393 | switch (info->device_type) { | |
394 | case S5M8763X: | |
395 | alarm0_conf = 0x77; | |
602cb5bb | 396 | ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf); |
5bccae6e SK |
397 | break; |
398 | ||
399 | case S5M8767X: | |
400 | data[RTC_SEC] |= ALARM_ENABLE_MASK; | |
401 | data[RTC_MIN] |= ALARM_ENABLE_MASK; | |
402 | data[RTC_HOUR] |= ALARM_ENABLE_MASK; | |
403 | data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; | |
404 | if (data[RTC_DATE] & 0x1f) | |
405 | data[RTC_DATE] |= ALARM_ENABLE_MASK; | |
406 | if (data[RTC_MONTH] & 0xf) | |
407 | data[RTC_MONTH] |= ALARM_ENABLE_MASK; | |
408 | if (data[RTC_YEAR1] & 0x7f) | |
409 | data[RTC_YEAR1] |= ALARM_ENABLE_MASK; | |
410 | ||
602cb5bb | 411 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8); |
5bccae6e SK |
412 | if (ret < 0) |
413 | return ret; | |
414 | ret = s5m8767_rtc_set_alarm_reg(info); | |
415 | ||
416 | break; | |
417 | ||
418 | default: | |
419 | return -EINVAL; | |
420 | } | |
421 | ||
422 | return ret; | |
423 | } | |
424 | ||
425 | static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |
426 | { | |
427 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
428 | u8 data[8]; | |
429 | int ret; | |
430 | ||
431 | switch (info->device_type) { | |
432 | case S5M8763X: | |
433 | s5m8763_tm_to_data(&alrm->time, data); | |
434 | break; | |
435 | ||
436 | case S5M8767X: | |
437 | s5m8767_tm_to_data(&alrm->time, data); | |
438 | break; | |
439 | ||
440 | default: | |
441 | return -EINVAL; | |
442 | } | |
443 | ||
444 | dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, | |
445 | 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, | |
446 | alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min, | |
447 | alrm->time.tm_sec, alrm->time.tm_wday); | |
448 | ||
449 | ret = s5m_rtc_stop_alarm(info); | |
450 | if (ret < 0) | |
451 | return ret; | |
452 | ||
602cb5bb | 453 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_SEC, data, 8); |
5bccae6e SK |
454 | if (ret < 0) |
455 | return ret; | |
456 | ||
457 | ret = s5m8767_rtc_set_alarm_reg(info); | |
458 | if (ret < 0) | |
459 | return ret; | |
460 | ||
461 | if (alrm->enabled) | |
462 | ret = s5m_rtc_start_alarm(info); | |
463 | ||
464 | return ret; | |
465 | } | |
466 | ||
467 | static int s5m_rtc_alarm_irq_enable(struct device *dev, | |
468 | unsigned int enabled) | |
469 | { | |
470 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
471 | ||
472 | if (enabled) | |
473 | return s5m_rtc_start_alarm(info); | |
474 | else | |
475 | return s5m_rtc_stop_alarm(info); | |
476 | } | |
477 | ||
478 | static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data) | |
479 | { | |
480 | struct s5m_rtc_info *info = data; | |
481 | ||
482 | rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); | |
483 | ||
484 | return IRQ_HANDLED; | |
485 | } | |
486 | ||
487 | static const struct rtc_class_ops s5m_rtc_ops = { | |
488 | .read_time = s5m_rtc_read_time, | |
489 | .set_time = s5m_rtc_set_time, | |
490 | .read_alarm = s5m_rtc_read_alarm, | |
491 | .set_alarm = s5m_rtc_set_alarm, | |
492 | .alarm_irq_enable = s5m_rtc_alarm_irq_enable, | |
493 | }; | |
494 | ||
495 | static void s5m_rtc_enable_wtsr(struct s5m_rtc_info *info, bool enable) | |
496 | { | |
497 | int ret; | |
602cb5bb | 498 | ret = regmap_update_bits(info->regmap, S5M_WTSR_SMPL_CNTL, |
5bccae6e SK |
499 | WTSR_ENABLE_MASK, |
500 | enable ? WTSR_ENABLE_MASK : 0); | |
501 | if (ret < 0) | |
502 | dev_err(info->dev, "%s: fail to update WTSR reg(%d)\n", | |
503 | __func__, ret); | |
504 | } | |
505 | ||
506 | static void s5m_rtc_enable_smpl(struct s5m_rtc_info *info, bool enable) | |
507 | { | |
508 | int ret; | |
602cb5bb | 509 | ret = regmap_update_bits(info->regmap, S5M_WTSR_SMPL_CNTL, |
5bccae6e SK |
510 | SMPL_ENABLE_MASK, |
511 | enable ? SMPL_ENABLE_MASK : 0); | |
512 | if (ret < 0) | |
513 | dev_err(info->dev, "%s: fail to update SMPL reg(%d)\n", | |
514 | __func__, ret); | |
515 | } | |
516 | ||
517 | static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) | |
518 | { | |
519 | u8 data[2]; | |
5bccae6e | 520 | int ret; |
5bccae6e | 521 | |
0c5f5d9a KK |
522 | /* UDR update time. Default of 7.32 ms is too long. */ |
523 | ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON, | |
524 | S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US); | |
525 | if (ret < 0) | |
526 | dev_err(info->dev, "%s: fail to change UDR time: %d\n", | |
527 | __func__, ret); | |
528 | ||
5bccae6e SK |
529 | /* Set RTC control register : Binary mode, 24hour mode */ |
530 | data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
531 | data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); | |
532 | ||
533 | info->rtc_24hr_mode = 1; | |
602cb5bb | 534 | ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2); |
5bccae6e SK |
535 | if (ret < 0) { |
536 | dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", | |
537 | __func__, ret); | |
538 | return ret; | |
539 | } | |
540 | ||
5bccae6e SK |
541 | return ret; |
542 | } | |
543 | ||
544 | static int s5m_rtc_probe(struct platform_device *pdev) | |
545 | { | |
546 | struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent); | |
547 | struct sec_platform_data *pdata = s5m87xx->pdata; | |
548 | struct s5m_rtc_info *info; | |
e349c910 | 549 | const struct regmap_config *regmap_cfg; |
5bccae6e SK |
550 | int ret; |
551 | ||
552 | if (!pdata) { | |
553 | dev_err(pdev->dev.parent, "Platform data not supplied\n"); | |
554 | return -ENODEV; | |
555 | } | |
556 | ||
557 | info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); | |
558 | if (!info) | |
559 | return -ENOMEM; | |
560 | ||
e349c910 KK |
561 | switch (pdata->device_type) { |
562 | case S2MPS14X: | |
563 | regmap_cfg = &s2mps14_rtc_regmap_config; | |
564 | break; | |
565 | case S5M8763X: | |
566 | regmap_cfg = &s5m_rtc_regmap_config; | |
567 | break; | |
568 | case S5M8767X: | |
569 | regmap_cfg = &s5m_rtc_regmap_config; | |
570 | break; | |
571 | default: | |
572 | dev_err(&pdev->dev, "Device type is not supported by RTC driver\n"); | |
573 | return -ENODEV; | |
574 | } | |
575 | ||
576 | info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR); | |
577 | if (!info->i2c) { | |
578 | dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n"); | |
579 | return -ENODEV; | |
580 | } | |
581 | ||
582 | info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg); | |
583 | if (IS_ERR(info->regmap)) { | |
584 | ret = PTR_ERR(info->regmap); | |
585 | dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n", | |
586 | ret); | |
587 | goto err; | |
588 | } | |
589 | ||
5bccae6e SK |
590 | info->dev = &pdev->dev; |
591 | info->s5m87xx = s5m87xx; | |
5bccae6e SK |
592 | info->device_type = s5m87xx->device_type; |
593 | info->wtsr_smpl = s5m87xx->wtsr_smpl; | |
594 | ||
595 | switch (pdata->device_type) { | |
596 | case S5M8763X: | |
7b003be8 KK |
597 | info->irq = regmap_irq_get_virq(s5m87xx->irq_data, |
598 | S5M8763_IRQ_ALARM0); | |
5bccae6e SK |
599 | break; |
600 | ||
601 | case S5M8767X: | |
7b003be8 KK |
602 | info->irq = regmap_irq_get_virq(s5m87xx->irq_data, |
603 | S5M8767_IRQ_RTCA1); | |
5bccae6e SK |
604 | break; |
605 | ||
606 | default: | |
607 | ret = -EINVAL; | |
608 | dev_err(&pdev->dev, "Unsupported device type: %d\n", ret); | |
e349c910 | 609 | goto err; |
5bccae6e SK |
610 | } |
611 | ||
612 | platform_set_drvdata(pdev, info); | |
613 | ||
614 | ret = s5m8767_rtc_init_reg(info); | |
615 | ||
616 | if (info->wtsr_smpl) { | |
617 | s5m_rtc_enable_wtsr(info, true); | |
618 | s5m_rtc_enable_smpl(info, true); | |
619 | } | |
620 | ||
621 | device_init_wakeup(&pdev->dev, 1); | |
622 | ||
623 | info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc", | |
624 | &s5m_rtc_ops, THIS_MODULE); | |
625 | ||
e349c910 KK |
626 | if (IS_ERR(info->rtc_dev)) { |
627 | ret = PTR_ERR(info->rtc_dev); | |
628 | goto err; | |
629 | } | |
5bccae6e SK |
630 | |
631 | ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL, | |
632 | s5m_rtc_alarm_irq, 0, "rtc-alarm0", | |
633 | info); | |
e349c910 | 634 | if (ret < 0) { |
5bccae6e SK |
635 | dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", |
636 | info->irq, ret); | |
e349c910 KK |
637 | goto err; |
638 | } | |
639 | ||
640 | return 0; | |
641 | ||
642 | err: | |
643 | i2c_unregister_device(info->i2c); | |
5bccae6e SK |
644 | |
645 | return ret; | |
646 | } | |
647 | ||
648 | static void s5m_rtc_shutdown(struct platform_device *pdev) | |
649 | { | |
650 | struct s5m_rtc_info *info = platform_get_drvdata(pdev); | |
651 | int i; | |
652 | unsigned int val = 0; | |
653 | if (info->wtsr_smpl) { | |
654 | for (i = 0; i < 3; i++) { | |
655 | s5m_rtc_enable_wtsr(info, false); | |
602cb5bb | 656 | regmap_read(info->regmap, S5M_WTSR_SMPL_CNTL, &val); |
5bccae6e SK |
657 | pr_debug("%s: WTSR_SMPL reg(0x%02x)\n", __func__, val); |
658 | if (val & WTSR_ENABLE_MASK) | |
659 | pr_emerg("%s: fail to disable WTSR\n", | |
660 | __func__); | |
661 | else { | |
662 | pr_info("%s: success to disable WTSR\n", | |
663 | __func__); | |
664 | break; | |
665 | } | |
666 | } | |
667 | } | |
668 | /* Disable SMPL when power off */ | |
669 | s5m_rtc_enable_smpl(info, false); | |
670 | } | |
671 | ||
e349c910 KK |
672 | static int s5m_rtc_remove(struct platform_device *pdev) |
673 | { | |
674 | struct s5m_rtc_info *info = platform_get_drvdata(pdev); | |
675 | ||
676 | /* Perform also all shutdown steps when removing */ | |
677 | s5m_rtc_shutdown(pdev); | |
678 | i2c_unregister_device(info->i2c); | |
679 | ||
680 | return 0; | |
681 | } | |
682 | ||
11ba5a1e | 683 | #ifdef CONFIG_PM_SLEEP |
222ead7f KK |
684 | static int s5m_rtc_resume(struct device *dev) |
685 | { | |
686 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
687 | int ret = 0; | |
688 | ||
689 | if (device_may_wakeup(dev)) | |
690 | ret = disable_irq_wake(info->irq); | |
691 | ||
692 | return ret; | |
693 | } | |
694 | ||
695 | static int s5m_rtc_suspend(struct device *dev) | |
696 | { | |
697 | struct s5m_rtc_info *info = dev_get_drvdata(dev); | |
698 | int ret = 0; | |
699 | ||
700 | if (device_may_wakeup(dev)) | |
701 | ret = enable_irq_wake(info->irq); | |
702 | ||
703 | return ret; | |
704 | } | |
11ba5a1e | 705 | #endif /* CONFIG_PM_SLEEP */ |
222ead7f KK |
706 | |
707 | static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume); | |
708 | ||
5bccae6e SK |
709 | static const struct platform_device_id s5m_rtc_id[] = { |
710 | { "s5m-rtc", 0 }, | |
711 | }; | |
712 | ||
713 | static struct platform_driver s5m_rtc_driver = { | |
714 | .driver = { | |
715 | .name = "s5m-rtc", | |
716 | .owner = THIS_MODULE, | |
222ead7f | 717 | .pm = &s5m_rtc_pm_ops, |
5bccae6e SK |
718 | }, |
719 | .probe = s5m_rtc_probe, | |
e349c910 | 720 | .remove = s5m_rtc_remove, |
5bccae6e SK |
721 | .shutdown = s5m_rtc_shutdown, |
722 | .id_table = s5m_rtc_id, | |
723 | }; | |
724 | ||
725 | module_platform_driver(s5m_rtc_driver); | |
726 | ||
727 | /* Module information */ | |
728 | MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); | |
729 | MODULE_DESCRIPTION("Samsung S5M RTC driver"); | |
730 | MODULE_LICENSE("GPL"); | |
731 | MODULE_ALIAS("platform:s5m-rtc"); |