[mirror_ubuntu-bionic-kernel.git] / drivers / rtc / rtc-sa1100.c

/*
 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
 *
 * Copyright (c) 2000 Nils Faerber
 *
 * Based on rtc.c by Paul Gortmaker
 *
 * Original Driver by Nils Faerber <nils@kernelconcepts.de>
 *
 * Modifications from:
 *   CIH <cih@coventive.com>
 *   Nicolas Pitre <nico@fluxnic.net>
 *   Andrew Christian <andrew.christian@hp.com>
 *
 * Converted to the RTC subsystem and Driver Model
 *   by Richard Purdie <rpurdie@rpsys.net>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */

#include <linux/platform_device.h>
#include <linux/module.h>
#include <linux/rtc.h>
#include <linux/init.h>
#include <linux/fs.h>
#include <linux/interrupt.h>
#include <linux/string.h>
#include <linux/pm.h>
#include <linux/bitops.h>

#include <mach/hardware.h>
#include <asm/irq.h>

#ifdef CONFIG_ARCH_PXA
#include <mach/regs-rtc.h>
#include <mach/regs-ost.h>
#endif

#define RTC_DEF_DIVIDER		(32768 - 1)
#define RTC_DEF_TRIM		0

static const unsigned long RTC_FREQ = 1024;
static struct rtc_time rtc_alarm;
static DEFINE_SPINLOCK(sa1100_rtc_lock);

static inline int rtc_periodic_alarm(struct rtc_time *tm)
{
	return  (tm->tm_year == -1) ||
		((unsigned)tm->tm_mon >= 12) ||
		((unsigned)(tm->tm_mday - 1) >= 31) ||
		((unsigned)tm->tm_hour > 23) ||
		((unsigned)tm->tm_min > 59) ||
		((unsigned)tm->tm_sec > 59);
}

/*
 * Calculate the next alarm time given the requested alarm time mask
 * and the current time.
 */
static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
	struct rtc_time *alrm)
{
	unsigned long next_time;
	unsigned long now_time;

	next->tm_year = now->tm_year;
	next->tm_mon = now->tm_mon;
	next->tm_mday = now->tm_mday;
	next->tm_hour = alrm->tm_hour;
	next->tm_min = alrm->tm_min;
	next->tm_sec = alrm->tm_sec;

	rtc_tm_to_time(now, &now_time);
	rtc_tm_to_time(next, &next_time);

	if (next_time < now_time) {
		/* Advance one day */
		next_time += 60 * 60 * 24;
		rtc_time_to_tm(next_time, next);
	}
}

static int rtc_update_alarm(struct rtc_time *alrm)
{
	struct rtc_time alarm_tm, now_tm;
	unsigned long now, time;
	int ret;

	do {
		now = RCNR;
		rtc_time_to_tm(now, &now_tm);
		rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
		ret = rtc_tm_to_time(&alarm_tm, &time);
		if (ret != 0)
			break;

		RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
		RTAR = time;
	} while (now != RCNR);

	return ret;
}

static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
{
	struct platform_device *pdev = to_platform_device(dev_id);
	struct rtc_device *rtc = platform_get_drvdata(pdev);
	unsigned int rtsr;
	unsigned long events = 0;

	spin_lock(&sa1100_rtc_lock);

	rtsr = RTSR;
	/* clear interrupt sources */
	RTSR = 0;
	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
	 * See also the comments in sa1100_rtc_probe(). */
	if (rtsr & (RTSR_ALE | RTSR_HZE)) {
		/* This is the original code, before there was the if test
		 * above. This code does not clear interrupts that were not
		 * enabled. */
		RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
	} else {
		/* For some reason, it is possible to enter this routine
		 * without interruptions enabled, it has been tested with
		 * several units (Bug in SA11xx chip?).
		 *
		 * This situation leads to an infinite "loop" of interrupt
		 * routine calling and as a result the processor seems to
		 * lock on its first call to open(). */
		RTSR = RTSR_AL | RTSR_HZ;
	}

	/* clear alarm interrupt if it has occurred */
	if (rtsr & RTSR_AL)
		rtsr &= ~RTSR_ALE;
	RTSR = rtsr & (RTSR_ALE | RTSR_HZE);

	/* update irq data & counter */
	if (rtsr & RTSR_AL)
		events |= RTC_AF | RTC_IRQF;
	if (rtsr & RTSR_HZ)
		events |= RTC_UF | RTC_IRQF;

	rtc_update_irq(rtc, 1, events);

	if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
		rtc_update_alarm(&rtc_alarm);

	spin_unlock(&sa1100_rtc_lock);

	return IRQ_HANDLED;
}

static int sa1100_rtc_open(struct device *dev)
{
	int ret;
	struct platform_device *plat_dev = to_platform_device(dev);
	struct rtc_device *rtc = platform_get_drvdata(plat_dev);

	ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
		"rtc 1Hz", dev);
	if (ret) {
		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
		goto fail_ui;
	}
	ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
		"rtc Alrm", dev);
	if (ret) {
		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
		goto fail_ai;
	}
	rtc->max_user_freq = RTC_FREQ;
	rtc_irq_set_freq(rtc, NULL, RTC_FREQ);

	return 0;

 fail_ai:
	free_irq(IRQ_RTC1Hz, dev);
 fail_ui:
	return ret;
}

static void sa1100_rtc_release(struct device *dev)
{
	spin_lock_irq(&sa1100_rtc_lock);
	RTSR = 0;
	OIER &= ~OIER_E1;
	OSSR = OSSR_M1;
	spin_unlock_irq(&sa1100_rtc_lock);

	free_irq(IRQ_RTCAlrm, dev);
	free_irq(IRQ_RTC1Hz, dev);
}

static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	spin_lock_irq(&sa1100_rtc_lock);
	if (enabled)
		RTSR |= RTSR_ALE;
	else
		RTSR &= ~RTSR_ALE;
	spin_unlock_irq(&sa1100_rtc_lock);
	return 0;
}

static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	rtc_time_to_tm(RCNR, tm);
	return 0;
}

static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	unsigned long time;
	int ret;

	ret = rtc_tm_to_time(tm, &time);
	if (ret == 0)
		RCNR = time;
	return ret;
}

static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	u32	rtsr;

	memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
	rtsr = RTSR;
	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
	return 0;
}

static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	int ret;

	spin_lock_irq(&sa1100_rtc_lock);
	ret = rtc_update_alarm(&alrm->time);
	if (ret == 0) {
		if (alrm->enabled)
			RTSR |= RTSR_ALE;
		else
			RTSR &= ~RTSR_ALE;
	}
	spin_unlock_irq(&sa1100_rtc_lock);

	return ret;
}

static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
{
	seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
	seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);

	return 0;
}

static const struct rtc_class_ops sa1100_rtc_ops = {
	.open = sa1100_rtc_open,
	.release = sa1100_rtc_release,
	.read_time = sa1100_rtc_read_time,
	.set_time = sa1100_rtc_set_time,
	.read_alarm = sa1100_rtc_read_alarm,
	.set_alarm = sa1100_rtc_set_alarm,
	.proc = sa1100_rtc_proc,
	.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
};

static int sa1100_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;

	/*
	 * According to the manual we should be able to let RTTR be zero
	 * and then a default diviser for a 32.768KHz clock is used.
	 * Apparently this doesn't work, at least for my SA1110 rev 5.
	 * If the clock divider is uninitialized then reset it to the
	 * default value to get the 1Hz clock.
	 */
	if (RTTR == 0) {
		RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
		dev_warn(&pdev->dev, "warning: "
			"initializing default clock divider/trim value\n");
		/* The current RTC value probably doesn't make sense either */
		RCNR = 0;
	}

	device_init_wakeup(&pdev->dev, 1);

	rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
		THIS_MODULE);

	if (IS_ERR(rtc))
		return PTR_ERR(rtc);

	platform_set_drvdata(pdev, rtc);

	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
	 * See also the comments in sa1100_rtc_interrupt().
	 *
	 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
	 * interrupt pending, even though interrupts were never enabled.
	 * In this case, this bit it must be reset before enabling
	 * interruptions to avoid a nonexistent interrupt to occur.
	 *
	 * In principle, the same problem would apply to bit 0, although it has
	 * never been observed to happen.
	 *
	 * This issue is addressed both here and in sa1100_rtc_interrupt().
	 * If the issue is not addressed here, in the times when the processor
	 * wakes up with the bit set there will be one spurious interrupt.
	 *
	 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
	 * safe side, once the condition that lead to this strange
	 * initialization is unknown and could in principle happen during
	 * normal processing.
	 *
	 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
	 * the corresponding bits in RTSR. */
	RTSR = RTSR_AL | RTSR_HZ;

	return 0;
}

static int sa1100_rtc_remove(struct platform_device *pdev)
{
	struct rtc_device *rtc = platform_get_drvdata(pdev);

	if (rtc)
		rtc_device_unregister(rtc);

	return 0;
}

#ifdef CONFIG_PM
static int sa1100_rtc_suspend(struct device *dev)
{
	if (device_may_wakeup(dev))
		enable_irq_wake(IRQ_RTCAlrm);
	return 0;
}

static int sa1100_rtc_resume(struct device *dev)
{
	if (device_may_wakeup(dev))
		disable_irq_wake(IRQ_RTCAlrm);
	return 0;
}

static const struct dev_pm_ops sa1100_rtc_pm_ops = {
	.suspend	= sa1100_rtc_suspend,
	.resume		= sa1100_rtc_resume,
};
#endif

static struct platform_driver sa1100_rtc_driver = {
	.probe		= sa1100_rtc_probe,
	.remove		= sa1100_rtc_remove,
	.driver		= {
		.name	= "sa1100-rtc",
#ifdef CONFIG_PM
		.pm	= &sa1100_rtc_pm_ops,
#endif
	},
};

static int __init sa1100_rtc_init(void)
{
	return platform_driver_register(&sa1100_rtc_driver);
}

static void __exit sa1100_rtc_exit(void)
{
	platform_driver_unregister(&sa1100_rtc_driver);
}

module_init(sa1100_rtc_init);
module_exit(sa1100_rtc_exit);

MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:sa1100-rtc");
Commit	Line	Data
e842f1c8 RP	1	/*
	2	* Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
	3	*
	4	* Copyright (c) 2000 Nils Faerber
	5	*
	6	* Based on rtc.c by Paul Gortmaker
	7	*
	8	* Original Driver by Nils Faerber <nils@kernelconcepts.de>
	9	*
	10	* Modifications from:
	11	* CIH <cih@coventive.com>
2f82af08	12	* Nicolas Pitre <nico@fluxnic.net>
e842f1c8 RP	13	* Andrew Christian <andrew.christian@hp.com>
	14	*
	15	* Converted to the RTC subsystem and Driver Model
	16	* by Richard Purdie <rpurdie@rpsys.net>
	17	*
	18	* This program is free software; you can redistribute it and/or
	19	* modify it under the terms of the GNU General Public License
	20	* as published by the Free Software Foundation; either version
	21	* 2 of the License, or (at your option) any later version.
	22	*/
	23
	24	#include <linux/platform_device.h>
	25	#include <linux/module.h>
	26	#include <linux/rtc.h>
	27	#include <linux/init.h>
	28	#include <linux/fs.h>
	29	#include <linux/interrupt.h>
	30	#include <linux/string.h>
	31	#include <linux/pm.h>
1977f032	32	#include <linux/bitops.h>
e842f1c8	33
a09e64fb	34	#include <mach/hardware.h>
e842f1c8	35	#include <asm/irq.h>
e842f1c8 RP	36
e842f1c8 RP	37	#ifdef CONFIG_ARCH_PXA
5bf3df3f EM	38	#include <mach/regs-rtc.h>
5bf3df3f EM	39	#include <mach/regs-ost.h>
e842f1c8 RP	40	#endif
e842f1c8 RP	41
a404ad1f	42	#define RTC_DEF_DIVIDER (32768 - 1)
e842f1c8 RP	43	#define RTC_DEF_TRIM 0
e842f1c8 RP	44
d2ccb52d	45	static const unsigned long RTC_FREQ = 1024;
e842f1c8	46	static struct rtc_time rtc_alarm;
34af946a	47	static DEFINE_SPINLOCK(sa1100_rtc_lock);
e842f1c8	48
797276ec RK	49	static inline int rtc_periodic_alarm(struct rtc_time *tm)
	50	{
	51	return (tm->tm_year == -1) \|\|
	52	((unsigned)tm->tm_mon >= 12) \|\|
	53	((unsigned)(tm->tm_mday - 1) >= 31) \|\|
	54	((unsigned)tm->tm_hour > 23) \|\|
	55	((unsigned)tm->tm_min > 59) \|\|
	56	((unsigned)tm->tm_sec > 59);
	57	}
	58
	59	/*
	60	* Calculate the next alarm time given the requested alarm time mask
	61	* and the current time.
	62	*/
a404ad1f MRJ	63	static void rtc_next_alarm_time(struct rtc_time next, struct rtc_time now,
a404ad1f MRJ	64	struct rtc_time *alrm)
797276ec RK	65	{
	66	unsigned long next_time;
	67	unsigned long now_time;
	68
	69	next->tm_year = now->tm_year;
	70	next->tm_mon = now->tm_mon;
	71	next->tm_mday = now->tm_mday;
	72	next->tm_hour = alrm->tm_hour;
	73	next->tm_min = alrm->tm_min;
	74	next->tm_sec = alrm->tm_sec;
	75
	76	rtc_tm_to_time(now, &now_time);
	77	rtc_tm_to_time(next, &next_time);
	78
	79	if (next_time < now_time) {
	80	/* Advance one day */
	81	next_time += 60 * 60 * 24;
	82	rtc_time_to_tm(next_time, next);
	83	}
	84	}
	85
e842f1c8 RP	86	static int rtc_update_alarm(struct rtc_time *alrm)
	87	{
	88	struct rtc_time alarm_tm, now_tm;
	89	unsigned long now, time;
	90	int ret;
	91
	92	do {
	93	now = RCNR;
	94	rtc_time_to_tm(now, &now_tm);
	95	rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
	96	ret = rtc_tm_to_time(&alarm_tm, &time);
	97	if (ret != 0)
	98	break;
	99
	100	RTSR = RTSR & (RTSR_HZE\|RTSR_ALE\|RTSR_AL);
	101	RTAR = time;
	102	} while (now != RCNR);
	103
	104	return ret;
	105	}
	106
7d12e780	107	static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
e842f1c8 RP	108	{
	109	struct platform_device *pdev = to_platform_device(dev_id);
	110	struct rtc_device *rtc = platform_get_drvdata(pdev);
	111	unsigned int rtsr;
	112	unsigned long events = 0;
	113
	114	spin_lock(&sa1100_rtc_lock);
	115
	116	rtsr = RTSR;
	117	/* clear interrupt sources */
	118	RTSR = 0;
7decaa55 MRJ	119	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
	120	* See also the comments in sa1100_rtc_probe(). */
	121	if (rtsr & (RTSR_ALE \| RTSR_HZE)) {
	122	/* This is the original code, before there was the if test
	123	* above. This code does not clear interrupts that were not
	124	* enabled. */
	125	RTSR = (RTSR_AL \| RTSR_HZ) & (rtsr >> 2);
	126	} else {
	127	/* For some reason, it is possible to enter this routine
	128	* without interruptions enabled, it has been tested with
	129	* several units (Bug in SA11xx chip?).
	130	*
	131	* This situation leads to an infinite "loop" of interrupt
	132	* routine calling and as a result the processor seems to
	133	* lock on its first call to open(). */
	134	RTSR = RTSR_AL \| RTSR_HZ;
	135	}
e842f1c8 RP	136
	137	/* clear alarm interrupt if it has occurred */
	138	if (rtsr & RTSR_AL)
	139	rtsr &= ~RTSR_ALE;
	140	RTSR = rtsr & (RTSR_ALE \| RTSR_HZE);
	141
	142	/* update irq data & counter */
	143	if (rtsr & RTSR_AL)
	144	events \|= RTC_AF \| RTC_IRQF;
	145	if (rtsr & RTSR_HZ)
	146	events \|= RTC_UF \| RTC_IRQF;
	147
ab6a2d70	148	rtc_update_irq(rtc, 1, events);
e842f1c8 RP	149
	150	if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
	151	rtc_update_alarm(&rtc_alarm);
	152
	153	spin_unlock(&sa1100_rtc_lock);
	154
	155	return IRQ_HANDLED;
	156	}
	157
e842f1c8 RP	158	static int sa1100_rtc_open(struct device *dev)
	159	{
	160	int ret;
416f0e80 MRJ	161	struct platform_device *plat_dev = to_platform_device(dev);
416f0e80 MRJ	162	struct rtc_device *rtc = platform_get_drvdata(plat_dev);
e842f1c8	163
dace1453	164	ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
a404ad1f	165	"rtc 1Hz", dev);
e842f1c8	166	if (ret) {
2260a25c	167	dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
e842f1c8 RP	168	goto fail_ui;
e842f1c8 RP	169	}
dace1453	170	ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
a404ad1f	171	"rtc Alrm", dev);
e842f1c8	172	if (ret) {
2260a25c	173	dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
e842f1c8 RP	174	goto fail_ai;
e842f1c8 RP	175	}
d2ccb52d	176	rtc->max_user_freq = RTC_FREQ;
416f0e80	177	rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
d2ccb52d	178
e842f1c8 RP	179	return 0;
e842f1c8 RP	180
e842f1c8	181	fail_ai:
f1226701	182	free_irq(IRQ_RTC1Hz, dev);
e842f1c8 RP	183	fail_ui:
	184	return ret;
	185	}
	186
	187	static void sa1100_rtc_release(struct device *dev)
	188	{
	189	spin_lock_irq(&sa1100_rtc_lock);
	190	RTSR = 0;
	191	OIER &= ~OIER_E1;
	192	OSSR = OSSR_M1;
	193	spin_unlock_irq(&sa1100_rtc_lock);
	194
e842f1c8 RP	195	free_irq(IRQ_RTCAlrm, dev);
	196	free_irq(IRQ_RTC1Hz, dev);
	197	}
	198
16380c15 JS	199	static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
	200	{
	201	spin_lock_irq(&sa1100_rtc_lock);
	202	if (enabled)
	203	RTSR \|= RTSR_ALE;
	204	else
	205	RTSR &= ~RTSR_ALE;
	206	spin_unlock_irq(&sa1100_rtc_lock);
	207	return 0;
	208	}
	209
e842f1c8 RP	210	static int sa1100_rtc_read_time(struct device dev, struct rtc_time tm)
	211	{
	212	rtc_time_to_tm(RCNR, tm);
	213	return 0;
	214	}
	215
	216	static int sa1100_rtc_set_time(struct device dev, struct rtc_time tm)
	217	{
	218	unsigned long time;
	219	int ret;
	220
	221	ret = rtc_tm_to_time(tm, &time);
	222	if (ret == 0)
	223	RCNR = time;
	224	return ret;
	225	}
	226
	227	static int sa1100_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	228	{
32b49da4 DB	229	u32 rtsr;
32b49da4 DB	230
e842f1c8	231	memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
32b49da4 DB	232	rtsr = RTSR;
	233	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
	234	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
e842f1c8 RP	235	return 0;
	236	}
	237
	238	static int sa1100_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	239	{
	240	int ret;
	241
	242	spin_lock_irq(&sa1100_rtc_lock);
	243	ret = rtc_update_alarm(&alrm->time);
	244	if (ret == 0) {
e842f1c8	245	if (alrm->enabled)
32b49da4	246	RTSR \|= RTSR_ALE;
e842f1c8	247	else
32b49da4	248	RTSR &= ~RTSR_ALE;
e842f1c8 RP	249	}
	250	spin_unlock_irq(&sa1100_rtc_lock);
	251
	252	return ret;
	253	}
	254
	255	static int sa1100_rtc_proc(struct device dev, struct seq_file seq)
	256	{
4cebe7aa MRJ	257	seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
4cebe7aa MRJ	258	seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
e842f1c8 RP	259
	260	return 0;
	261	}
	262
ff8371ac	263	static const struct rtc_class_ops sa1100_rtc_ops = {
e842f1c8	264	.open = sa1100_rtc_open,
e842f1c8	265	.release = sa1100_rtc_release,
e842f1c8 RP	266	.read_time = sa1100_rtc_read_time,
	267	.set_time = sa1100_rtc_set_time,
	268	.read_alarm = sa1100_rtc_read_alarm,
	269	.set_alarm = sa1100_rtc_set_alarm,
	270	.proc = sa1100_rtc_proc,
16380c15	271	.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
e842f1c8 RP	272	};
	273
	274	static int sa1100_rtc_probe(struct platform_device *pdev)
	275	{
	276	struct rtc_device *rtc;
	277
	278	/*
	279	* According to the manual we should be able to let RTTR be zero
	280	* and then a default diviser for a 32.768KHz clock is used.
	281	* Apparently this doesn't work, at least for my SA1110 rev 5.
	282	* If the clock divider is uninitialized then reset it to the
	283	* default value to get the 1Hz clock.
	284	*/
	285	if (RTTR == 0) {
	286	RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
a404ad1f MRJ	287	dev_warn(&pdev->dev, "warning: "
a404ad1f MRJ	288	"initializing default clock divider/trim value\n");
e842f1c8 RP	289	/* The current RTC value probably doesn't make sense either */
	290	RCNR = 0;
	291	}
	292
e5a2c9cc UL	293	device_init_wakeup(&pdev->dev, 1);
e5a2c9cc UL	294
e842f1c8	295	rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
d2ccb52d	296	THIS_MODULE);
e842f1c8	297
2260a25c	298	if (IS_ERR(rtc))
e842f1c8	299	return PTR_ERR(rtc);
e842f1c8 RP	300
	301	platform_set_drvdata(pdev, rtc);
	302
7decaa55 MRJ	303	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
	304	* See also the comments in sa1100_rtc_interrupt().
	305	*
	306	* Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
	307	* interrupt pending, even though interrupts were never enabled.
	308	* In this case, this bit it must be reset before enabling
	309	* interruptions to avoid a nonexistent interrupt to occur.
	310	*
	311	* In principle, the same problem would apply to bit 0, although it has
	312	* never been observed to happen.
	313	*
	314	* This issue is addressed both here and in sa1100_rtc_interrupt().
	315	* If the issue is not addressed here, in the times when the processor
	316	* wakes up with the bit set there will be one spurious interrupt.
	317	*
	318	* The issue is also dealt with in sa1100_rtc_interrupt() to be on the
	319	* safe side, once the condition that lead to this strange
	320	* initialization is unknown and could in principle happen during
	321	* normal processing.
	322	*
	323	* Notice that clearing bit 1 and 0 is accomplished by writting ONES to
	324	* the corresponding bits in RTSR. */
	325	RTSR = RTSR_AL \| RTSR_HZ;
	326
e842f1c8 RP	327	return 0;
	328	}
	329
	330	static int sa1100_rtc_remove(struct platform_device *pdev)
	331	{
	332	struct rtc_device *rtc = platform_get_drvdata(pdev);
	333
a404ad1f	334	if (rtc)
e842f1c8 RP	335	rtc_device_unregister(rtc);
	336
	337	return 0;
	338	}
	339
6bc54e69	340	#ifdef CONFIG_PM
5d027cd2	341	static int sa1100_rtc_suspend(struct device *dev)
6bc54e69	342	{
5d027cd2	343	if (device_may_wakeup(dev))
f618258a	344	enable_irq_wake(IRQ_RTCAlrm);
6bc54e69 RK	345	return 0;
	346	}
	347
5d027cd2	348	static int sa1100_rtc_resume(struct device *dev)
6bc54e69	349	{
5d027cd2	350	if (device_may_wakeup(dev))
f618258a	351	disable_irq_wake(IRQ_RTCAlrm);
6bc54e69 RK	352	return 0;
6bc54e69 RK	353	}
5d027cd2	354
47145210	355	static const struct dev_pm_ops sa1100_rtc_pm_ops = {
5d027cd2 HZ	356	.suspend = sa1100_rtc_suspend,
	357	.resume = sa1100_rtc_resume,
	358	};
6bc54e69 RK	359	#endif
6bc54e69 RK	360
e842f1c8 RP	361	static struct platform_driver sa1100_rtc_driver = {
	362	.probe = sa1100_rtc_probe,
	363	.remove = sa1100_rtc_remove,
	364	.driver = {
5d027cd2 HZ	365	.name = "sa1100-rtc",
	366	#ifdef CONFIG_PM
	367	.pm = &sa1100_rtc_pm_ops,
	368	#endif
e842f1c8 RP	369	},
	370	};
	371
	372	static int __init sa1100_rtc_init(void)
	373	{
	374	return platform_driver_register(&sa1100_rtc_driver);
	375	}
	376
	377	static void __exit sa1100_rtc_exit(void)
	378	{
	379	platform_driver_unregister(&sa1100_rtc_driver);
	380	}
	381
	382	module_init(sa1100_rtc_init);
	383	module_exit(sa1100_rtc_exit);
	384
	385	MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
	386	MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
	387	MODULE_LICENSE("GPL");
ad28a07b	388	MODULE_ALIAS("platform:sa1100-rtc");