[mirror_ubuntu-bionic-kernel.git] / drivers / rtc / rtc-x1205.c

/*
 * An i2c driver for the Xicor/Intersil X1205 RTC
 * Copyright 2004 Karen Spearel
 * Copyright 2005 Alessandro Zummo
 *
 * please send all reports to:
 * 	Karen Spearel <kas111 at gmail dot com>
 *	Alessandro Zummo <a.zummo@towertech.it>
 *
 * based on a lot of other RTC drivers.
 *
 * Information and datasheet:
 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/i2c.h>
#include <linux/bcd.h>
#include <linux/rtc.h>
#include <linux/delay.h>

#define DRV_VERSION "1.0.8"

/* offsets into CCR area */

#define CCR_SEC			0
#define CCR_MIN			1
#define CCR_HOUR		2
#define CCR_MDAY		3
#define CCR_MONTH		4
#define CCR_YEAR		5
#define CCR_WDAY		6
#define CCR_Y2K			7

#define X1205_REG_SR		0x3F	/* status register */
#define X1205_REG_Y2K		0x37
#define X1205_REG_DW		0x36
#define X1205_REG_YR		0x35
#define X1205_REG_MO		0x34
#define X1205_REG_DT		0x33
#define X1205_REG_HR		0x32
#define X1205_REG_MN		0x31
#define X1205_REG_SC		0x30
#define X1205_REG_DTR		0x13
#define X1205_REG_ATR		0x12
#define X1205_REG_INT		0x11
#define X1205_REG_0		0x10
#define X1205_REG_Y2K1		0x0F
#define X1205_REG_DWA1		0x0E
#define X1205_REG_YRA1		0x0D
#define X1205_REG_MOA1		0x0C
#define X1205_REG_DTA1		0x0B
#define X1205_REG_HRA1		0x0A
#define X1205_REG_MNA1		0x09
#define X1205_REG_SCA1		0x08
#define X1205_REG_Y2K0		0x07
#define X1205_REG_DWA0		0x06
#define X1205_REG_YRA0		0x05
#define X1205_REG_MOA0		0x04
#define X1205_REG_DTA0		0x03
#define X1205_REG_HRA0		0x02
#define X1205_REG_MNA0		0x01
#define X1205_REG_SCA0		0x00

#define X1205_CCR_BASE		0x30	/* Base address of CCR */
#define X1205_ALM0_BASE		0x00	/* Base address of ALARM0 */

#define X1205_SR_RTCF		0x01	/* Clock failure */
#define X1205_SR_WEL		0x02	/* Write Enable Latch */
#define X1205_SR_RWEL		0x04	/* Register Write Enable */

#define X1205_DTR_DTR0		0x01
#define X1205_DTR_DTR1		0x02
#define X1205_DTR_DTR2		0x04

#define X1205_HR_MIL		0x80	/* Set in ccr.hour for 24 hr mode */

static struct i2c_driver x1205_driver;

/*
 * In the routines that deal directly with the x1205 hardware, we use
 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
 * Epoch is initialized as 2000. Time is set to UTC.
 */
static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
				unsigned char reg_base)
{
	unsigned char dt_addr[2] = { 0, reg_base };

	unsigned char buf[8];

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, dt_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 8, buf },	/* read date */
	};

	/* read date registers */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __func__);
		return -EIO;
	}

	dev_dbg(&client->dev,
		"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
		"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
		__func__,
		buf[0], buf[1], buf[2], buf[3],
		buf[4], buf[5], buf[6], buf[7]);

	tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
	tm->tm_min = BCD2BIN(buf[CCR_MIN]);
	tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
	tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
	tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
	tm->tm_year = BCD2BIN(buf[CCR_YEAR])
			+ (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
	tm->tm_wday = buf[CCR_WDAY];

	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
		"mday=%d, mon=%d, year=%d, wday=%d\n",
		__func__,
		tm->tm_sec, tm->tm_min, tm->tm_hour,
		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);

	return 0;
}

static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
{
	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, sr_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 1, sr },	/* read status */
	};

	/* read status register */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __func__);
		return -EIO;
	}

	return 0;
}

static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
				int datetoo, u8 reg_base)
{
	int i, xfer;
	unsigned char buf[8];

	static const unsigned char wel[3] = { 0, X1205_REG_SR,
						X1205_SR_WEL };

	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
						X1205_SR_WEL | X1205_SR_RWEL };

	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };

	dev_dbg(&client->dev,
		"%s: secs=%d, mins=%d, hours=%d\n",
		__func__,
		tm->tm_sec, tm->tm_min, tm->tm_hour);

	buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
	buf[CCR_MIN] = BIN2BCD(tm->tm_min);

	/* set hour and 24hr bit */
	buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) | X1205_HR_MIL;

	/* should we also set the date? */
	if (datetoo) {
		dev_dbg(&client->dev,
			"%s: mday=%d, mon=%d, year=%d, wday=%d\n",
			__func__,
			tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);

		buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);

		/* month, 1 - 12 */
		buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);

		/* year, since the rtc epoch*/
		buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
		buf[CCR_WDAY] = tm->tm_wday & 0x07;
		buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
	}

	/* this sequence is required to unlock the chip */
	if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
		dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
		return -EIO;
	}

	if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
		dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
		return -EIO;
	}

	/* write register's data */
	for (i = 0; i < (datetoo ? 8 : 3); i++) {
		unsigned char rdata[3] = { 0, reg_base + i, buf[i] };

		xfer = i2c_master_send(client, rdata, 3);
		if (xfer != 3) {
			dev_err(&client->dev,
				"%s: xfer=%d addr=%02x, data=%02x\n",
				__func__,
				 xfer, rdata[1], rdata[2]);
			return -EIO;
		}
	};

	/* disable further writes */
	if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
		dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
		return -EIO;
	}

	return 0;
}

static int x1205_fix_osc(struct i2c_client *client)
{
	int err;
	struct rtc_time tm;

	tm.tm_hour = tm.tm_min = tm.tm_sec = 0;

	if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
		dev_err(&client->dev,
			"unable to restart the oscillator\n");

	return err;
}

static int x1205_get_dtrim(struct i2c_client *client, int *trim)
{
	unsigned char dtr;
	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, dtr_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 1, &dtr }, 	/* read dtr */
	};

	/* read dtr register */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __func__);
		return -EIO;
	}

	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);

	*trim = 0;

	if (dtr & X1205_DTR_DTR0)
		*trim += 20;

	if (dtr & X1205_DTR_DTR1)
		*trim += 10;

	if (dtr & X1205_DTR_DTR2)
		*trim = -*trim;

	return 0;
}

static int x1205_get_atrim(struct i2c_client *client, int *trim)
{
	s8 atr;
	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };

	struct i2c_msg msgs[] = {
		{ client->addr, 0, 2, atr_addr },	/* setup read ptr */
		{ client->addr, I2C_M_RD, 1, &atr }, 	/* read atr */
	};

	/* read atr register */
	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
		dev_err(&client->dev, "%s: read error\n", __func__);
		return -EIO;
	}

	dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);

	/* atr is a two's complement value on 6 bits,
	 * perform sign extension. The formula is
	 * Catr = (atr * 0.25pF) + 11.00pF.
	 */
	if (atr & 0x20)
		atr |= 0xC0;

	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);

	*trim = (atr * 250) + 11000;

	dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);

	return 0;
}

struct x1205_limit
{
	unsigned char reg, mask, min, max;
};

static int x1205_validate_client(struct i2c_client *client)
{
	int i, xfer;

	/* Probe array. We will read the register at the specified
	 * address and check if the given bits are zero.
	 */
	static const unsigned char probe_zero_pattern[] = {
		/* register, mask */
		X1205_REG_SR,	0x18,
		X1205_REG_DTR,	0xF8,
		X1205_REG_ATR,	0xC0,
		X1205_REG_INT,	0x18,
		X1205_REG_0,	0xFF,
	};

	static const struct x1205_limit probe_limits_pattern[] = {
		/* register, mask, min, max */
		{ X1205_REG_Y2K,	0xFF,	19,	20	},
		{ X1205_REG_DW,		0xFF,	0,	6	},
		{ X1205_REG_YR,		0xFF,	0,	99	},
		{ X1205_REG_MO,		0xFF,	0,	12	},
		{ X1205_REG_DT,		0xFF,	0,	31	},
		{ X1205_REG_HR,		0x7F,	0,	23	},
		{ X1205_REG_MN,		0xFF,	0,	59	},
		{ X1205_REG_SC,		0xFF,	0,	59	},
		{ X1205_REG_Y2K1,	0xFF,	19,	20	},
		{ X1205_REG_Y2K0,	0xFF,	19,	20	},
	};

	/* check that registers have bits a 0 where expected */
	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
		unsigned char buf;

		unsigned char addr[2] = { 0, probe_zero_pattern[i] };

		struct i2c_msg msgs[2] = {
			{ client->addr, 0, 2, addr },
			{ client->addr, I2C_M_RD, 1, &buf },
		};

		if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
			dev_err(&client->dev,
				"%s: could not read register %x\n",
				__func__, probe_zero_pattern[i]);

			return -EIO;
		}

		if ((buf & probe_zero_pattern[i+1]) != 0) {
			dev_err(&client->dev,
				"%s: register=%02x, zero pattern=%d, value=%x\n",
				__func__, probe_zero_pattern[i], i, buf);

			return -ENODEV;
		}
	}

	/* check limits (only registers with bcd values) */
	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
		unsigned char reg, value;

		unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };

		struct i2c_msg msgs[2] = {
			{ client->addr, 0, 2, addr },
			{ client->addr, I2C_M_RD, 1, &reg },
		};

		if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
			dev_err(&client->dev,
				"%s: could not read register %x\n",
				__func__, probe_limits_pattern[i].reg);

			return -EIO;
		}

		value = BCD2BIN(reg & probe_limits_pattern[i].mask);

		if (value > probe_limits_pattern[i].max ||
			value < probe_limits_pattern[i].min) {
			dev_dbg(&client->dev,
				"%s: register=%x, lim pattern=%d, value=%d\n",
				__func__, probe_limits_pattern[i].reg,
				i, value);

			return -ENODEV;
		}
	}

	return 0;
}

static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	return x1205_get_datetime(to_i2c_client(dev),
		&alrm->time, X1205_ALM0_BASE);
}

static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	return x1205_set_datetime(to_i2c_client(dev),
		&alrm->time, 1, X1205_ALM0_BASE);
}

static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
{
	return x1205_get_datetime(to_i2c_client(dev),
		tm, X1205_CCR_BASE);
}

static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
{
	return x1205_set_datetime(to_i2c_client(dev),
		tm, 1, X1205_CCR_BASE);
}

static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
{
	int err, dtrim, atrim;

	if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
		seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);

	if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
		seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
			atrim / 1000, atrim % 1000);
	return 0;
}

static const struct rtc_class_ops x1205_rtc_ops = {
	.proc		= x1205_rtc_proc,
	.read_time	= x1205_rtc_read_time,
	.set_time	= x1205_rtc_set_time,
	.read_alarm	= x1205_rtc_read_alarm,
	.set_alarm	= x1205_rtc_set_alarm,
};

static ssize_t x1205_sysfs_show_atrim(struct device *dev,
				struct device_attribute *attr, char *buf)
{
	int err, atrim;

	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
	if (err)
		return err;

	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
}
static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);

static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
				struct device_attribute *attr, char *buf)
{
	int err, dtrim;

	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
	if (err)
		return err;

	return sprintf(buf, "%d ppm\n", dtrim);
}
static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);

static int x1205_sysfs_register(struct device *dev)
{
	int err;

	err = device_create_file(dev, &dev_attr_atrim);
	if (err)
		return err;

	err = device_create_file(dev, &dev_attr_dtrim);
	if (err)
		device_remove_file(dev, &dev_attr_atrim);

	return err;
}

static void x1205_sysfs_unregister(struct device *dev)
{
	device_remove_file(dev, &dev_attr_atrim);
	device_remove_file(dev, &dev_attr_dtrim);
}


static int x1205_probe(struct i2c_client *client,
			const struct i2c_device_id *id)
{
	int err = 0;
	unsigned char sr;
	struct rtc_device *rtc;

	dev_dbg(&client->dev, "%s\n", __func__);

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
		return -ENODEV;

	if (x1205_validate_client(client) < 0)
		return -ENODEV;

	dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");

	rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
				&x1205_rtc_ops, THIS_MODULE);

	if (IS_ERR(rtc))
		return PTR_ERR(rtc);

	i2c_set_clientdata(client, rtc);

	/* Check for power failures and eventualy enable the osc */
	if ((err = x1205_get_status(client, &sr)) == 0) {
		if (sr & X1205_SR_RTCF) {
			dev_err(&client->dev,
				"power failure detected, "
				"please set the clock\n");
			udelay(50);
			x1205_fix_osc(client);
		}
	}
	else
		dev_err(&client->dev, "couldn't read status\n");

	err = x1205_sysfs_register(&client->dev);
	if (err)
		goto exit_devreg;

	return 0;

exit_devreg:
	rtc_device_unregister(rtc);

	return err;
}

static int x1205_remove(struct i2c_client *client)
{
	struct rtc_device *rtc = i2c_get_clientdata(client);

	rtc_device_unregister(rtc);
	x1205_sysfs_unregister(&client->dev);
	return 0;
}

static const struct i2c_device_id x1205_id[] = {
	{ "x1205", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, x1205_id);

static struct i2c_driver x1205_driver = {
	.driver		= {
		.name	= "rtc-x1205",
	},
	.probe		= x1205_probe,
	.remove		= x1205_remove,
	.id_table	= x1205_id,
};

static int __init x1205_init(void)
{
	return i2c_add_driver(&x1205_driver);
}

static void __exit x1205_exit(void)
{
	i2c_del_driver(&x1205_driver);
}

MODULE_AUTHOR(
	"Karen Spearel <kas111 at gmail dot com>, "
	"Alessandro Zummo <a.zummo@towertech.it>");
MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);

module_init(x1205_init);
module_exit(x1205_exit);
Commit	Line	Data
1fec7c66 AZ	1	/*
	2	* An i2c driver for the Xicor/Intersil X1205 RTC
	3	* Copyright 2004 Karen Spearel
	4	* Copyright 2005 Alessandro Zummo
	5	*
	6	* please send all reports to:
	7	* Karen Spearel <kas111 at gmail dot com>
	8	* Alessandro Zummo <a.zummo@towertech.it>
	9	*
	10	* based on a lot of other RTC drivers.
	11	*
890e0375 JD	12	* Information and datasheet:
	13	* http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
	14	*
1fec7c66 AZ	15	* This program is free software; you can redistribute it and/or modify
	16	* it under the terms of the GNU General Public License version 2 as
	17	* published by the Free Software Foundation.
	18	*/
	19
	20	#include <linux/i2c.h>
	21	#include <linux/bcd.h>
	22	#include <linux/rtc.h>
	23	#include <linux/delay.h>
	24
4edac2b4	25	#define DRV_VERSION "1.0.8"
1fec7c66 AZ	26
	27	/* offsets into CCR area */
	28
	29	#define CCR_SEC 0
	30	#define CCR_MIN 1
	31	#define CCR_HOUR 2
	32	#define CCR_MDAY 3
	33	#define CCR_MONTH 4
	34	#define CCR_YEAR 5
	35	#define CCR_WDAY 6
	36	#define CCR_Y2K 7
	37
	38	#define X1205_REG_SR 0x3F /* status register */
	39	#define X1205_REG_Y2K 0x37
	40	#define X1205_REG_DW 0x36
	41	#define X1205_REG_YR 0x35
	42	#define X1205_REG_MO 0x34
	43	#define X1205_REG_DT 0x33
	44	#define X1205_REG_HR 0x32
	45	#define X1205_REG_MN 0x31
	46	#define X1205_REG_SC 0x30
	47	#define X1205_REG_DTR 0x13
	48	#define X1205_REG_ATR 0x12
	49	#define X1205_REG_INT 0x11
	50	#define X1205_REG_0 0x10
	51	#define X1205_REG_Y2K1 0x0F
	52	#define X1205_REG_DWA1 0x0E
	53	#define X1205_REG_YRA1 0x0D
	54	#define X1205_REG_MOA1 0x0C
	55	#define X1205_REG_DTA1 0x0B
	56	#define X1205_REG_HRA1 0x0A
	57	#define X1205_REG_MNA1 0x09
	58	#define X1205_REG_SCA1 0x08
	59	#define X1205_REG_Y2K0 0x07
	60	#define X1205_REG_DWA0 0x06
	61	#define X1205_REG_YRA0 0x05
	62	#define X1205_REG_MOA0 0x04
	63	#define X1205_REG_DTA0 0x03
	64	#define X1205_REG_HRA0 0x02
	65	#define X1205_REG_MNA0 0x01
	66	#define X1205_REG_SCA0 0x00
	67
	68	#define X1205_CCR_BASE 0x30 /* Base address of CCR */
	69	#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
	70
	71	#define X1205_SR_RTCF 0x01 /* Clock failure */
	72	#define X1205_SR_WEL 0x02 /* Write Enable Latch */
	73	#define X1205_SR_RWEL 0x04 /* Register Write Enable */
	74
	75	#define X1205_DTR_DTR0 0x01
	76	#define X1205_DTR_DTR1 0x02
	77	#define X1205_DTR_DTR2 0x04
	78
	79	#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
	80
4edac2b4	81	static struct i2c_driver x1205_driver;
1fec7c66 AZ	82
	83	/*
	84	* In the routines that deal directly with the x1205 hardware, we use
	85	* rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
	86	* Epoch is initialized as 2000. Time is set to UTC.
	87	*/
	88	static int x1205_get_datetime(struct i2c_client client, struct rtc_time tm,
	89	unsigned char reg_base)
	90	{
	91	unsigned char dt_addr[2] = { 0, reg_base };
	92
	93	unsigned char buf[8];
	94
	95	struct i2c_msg msgs[] = {
	96	{ client->addr, 0, 2, dt_addr }, /* setup read ptr */
	97	{ client->addr, I2C_M_RD, 8, buf }, /* read date */
	98	};
	99
	100	/* read date registers */
	101	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
2a4e2b87	102	dev_err(&client->dev, "%s: read error\n", __func__);
1fec7c66 AZ	103	return -EIO;
	104	}
	105
	106	dev_dbg(&client->dev,
	107	"%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
	108	"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
2a4e2b87	109	__func__,
1fec7c66 AZ	110	buf[0], buf[1], buf[2], buf[3],
	111	buf[4], buf[5], buf[6], buf[7]);
	112
	113	tm->tm_sec = BCD2BIN(buf[CCR_SEC]);
	114	tm->tm_min = BCD2BIN(buf[CCR_MIN]);
	115	tm->tm_hour = BCD2BIN(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
	116	tm->tm_mday = BCD2BIN(buf[CCR_MDAY]);
	117	tm->tm_mon = BCD2BIN(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
	118	tm->tm_year = BCD2BIN(buf[CCR_YEAR])
	119	+ (BCD2BIN(buf[CCR_Y2K]) * 100) - 1900;
	120	tm->tm_wday = buf[CCR_WDAY];
	121
	122	dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
	123	"mday=%d, mon=%d, year=%d, wday=%d\n",
2a4e2b87	124	__func__,
1fec7c66 AZ	125	tm->tm_sec, tm->tm_min, tm->tm_hour,
	126	tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
	127
	128	return 0;
	129	}
	130
	131	static int x1205_get_status(struct i2c_client client, unsigned char sr)
	132	{
	133	static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
	134
	135	struct i2c_msg msgs[] = {
	136	{ client->addr, 0, 2, sr_addr }, /* setup read ptr */
	137	{ client->addr, I2C_M_RD, 1, sr }, /* read status */
	138	};
	139
	140	/* read status register */
	141	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
2a4e2b87	142	dev_err(&client->dev, "%s: read error\n", __func__);
1fec7c66 AZ	143	return -EIO;
	144	}
	145
	146	return 0;
	147	}
	148
	149	static int x1205_set_datetime(struct i2c_client client, struct rtc_time tm,
	150	int datetoo, u8 reg_base)
	151	{
	152	int i, xfer;
	153	unsigned char buf[8];
	154
	155	static const unsigned char wel[3] = { 0, X1205_REG_SR,
	156	X1205_SR_WEL };
	157
	158	static const unsigned char rwel[3] = { 0, X1205_REG_SR,
	159	X1205_SR_WEL \| X1205_SR_RWEL };
	160
	161	static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
	162
	163	dev_dbg(&client->dev,
	164	"%s: secs=%d, mins=%d, hours=%d\n",
2a4e2b87	165	__func__,
1fec7c66 AZ	166	tm->tm_sec, tm->tm_min, tm->tm_hour);
	167
	168	buf[CCR_SEC] = BIN2BCD(tm->tm_sec);
	169	buf[CCR_MIN] = BIN2BCD(tm->tm_min);
	170
	171	/* set hour and 24hr bit */
	172	buf[CCR_HOUR] = BIN2BCD(tm->tm_hour) \| X1205_HR_MIL;
	173
	174	/* should we also set the date? */
	175	if (datetoo) {
	176	dev_dbg(&client->dev,
	177	"%s: mday=%d, mon=%d, year=%d, wday=%d\n",
2a4e2b87	178	__func__,
1fec7c66 AZ	179	tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
	180
	181	buf[CCR_MDAY] = BIN2BCD(tm->tm_mday);
	182
	183	/* month, 1 - 12 */
	184	buf[CCR_MONTH] = BIN2BCD(tm->tm_mon + 1);
	185
	186	/* year, since the rtc epoch*/
	187	buf[CCR_YEAR] = BIN2BCD(tm->tm_year % 100);
	188	buf[CCR_WDAY] = tm->tm_wday & 0x07;
	189	buf[CCR_Y2K] = BIN2BCD(tm->tm_year / 100);
	190	}
	191
	192	/* this sequence is required to unlock the chip */
	193	if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
2a4e2b87	194	dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
1fec7c66 AZ	195	return -EIO;
	196	}
	197
	198	if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
2a4e2b87	199	dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
1fec7c66 AZ	200	return -EIO;
	201	}
	202
	203	/* write register's data */
	204	for (i = 0; i < (datetoo ? 8 : 3); i++) {
	205	unsigned char rdata[3] = { 0, reg_base + i, buf[i] };
	206
	207	xfer = i2c_master_send(client, rdata, 3);
	208	if (xfer != 3) {
	209	dev_err(&client->dev,
	210	"%s: xfer=%d addr=%02x, data=%02x\n",
2a4e2b87	211	__func__,
1fec7c66 AZ	212	xfer, rdata[1], rdata[2]);
	213	return -EIO;
	214	}
	215	};
	216
	217	/* disable further writes */
	218	if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
2a4e2b87	219	dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
1fec7c66 AZ	220	return -EIO;
	221	}
	222
	223	return 0;
	224	}
	225
	226	static int x1205_fix_osc(struct i2c_client *client)
	227	{
	228	int err;
	229	struct rtc_time tm;
	230
	231	tm.tm_hour = tm.tm_min = tm.tm_sec = 0;
	232
	233	if ((err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE)) < 0)
	234	dev_err(&client->dev,
	235	"unable to restart the oscillator\n");
	236
	237	return err;
	238	}
	239
	240	static int x1205_get_dtrim(struct i2c_client client, int trim)
	241	{
	242	unsigned char dtr;
	243	static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
	244
	245	struct i2c_msg msgs[] = {
	246	{ client->addr, 0, 2, dtr_addr }, /* setup read ptr */
	247	{ client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
	248	};
	249
	250	/* read dtr register */
	251	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
2a4e2b87	252	dev_err(&client->dev, "%s: read error\n", __func__);
1fec7c66 AZ	253	return -EIO;
	254	}
	255
2a4e2b87	256	dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
1fec7c66 AZ	257
	258	*trim = 0;
	259
	260	if (dtr & X1205_DTR_DTR0)
	261	*trim += 20;
	262
	263	if (dtr & X1205_DTR_DTR1)
	264	*trim += 10;
	265
	266	if (dtr & X1205_DTR_DTR2)
	267	trim = -trim;
	268
	269	return 0;
	270	}
	271
	272	static int x1205_get_atrim(struct i2c_client client, int trim)
	273	{
	274	s8 atr;
	275	static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
	276
	277	struct i2c_msg msgs[] = {
	278	{ client->addr, 0, 2, atr_addr }, /* setup read ptr */
	279	{ client->addr, I2C_M_RD, 1, &atr }, /* read atr */
	280	};
	281
	282	/* read atr register */
	283	if ((i2c_transfer(client->adapter, &msgs[0], 2)) != 2) {
2a4e2b87	284	dev_err(&client->dev, "%s: read error\n", __func__);
1fec7c66 AZ	285	return -EIO;
	286	}
	287
2a4e2b87	288	dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
1fec7c66 AZ	289
	290	/* atr is a two's complement value on 6 bits,
	291	* perform sign extension. The formula is
	292	* Catr = (atr * 0.25pF) + 11.00pF.
	293	*/
	294	if (atr & 0x20)
	295	atr \|= 0xC0;
	296
2a4e2b87	297	dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
1fec7c66 AZ	298
	299	trim = (atr 250) + 11000;
	300
2a4e2b87	301	dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
1fec7c66 AZ	302
	303	return 0;
	304	}
	305
	306	struct x1205_limit
	307	{
	308	unsigned char reg, mask, min, max;
	309	};
	310
	311	static int x1205_validate_client(struct i2c_client *client)
	312	{
	313	int i, xfer;
	314
	315	/* Probe array. We will read the register at the specified
	316	* address and check if the given bits are zero.
	317	*/
	318	static const unsigned char probe_zero_pattern[] = {
	319	/* register, mask */
	320	X1205_REG_SR, 0x18,
	321	X1205_REG_DTR, 0xF8,
	322	X1205_REG_ATR, 0xC0,
	323	X1205_REG_INT, 0x18,
	324	X1205_REG_0, 0xFF,
	325	};
	326
	327	static const struct x1205_limit probe_limits_pattern[] = {
	328	/* register, mask, min, max */
	329	{ X1205_REG_Y2K, 0xFF, 19, 20 },
	330	{ X1205_REG_DW, 0xFF, 0, 6 },
	331	{ X1205_REG_YR, 0xFF, 0, 99 },
	332	{ X1205_REG_MO, 0xFF, 0, 12 },
	333	{ X1205_REG_DT, 0xFF, 0, 31 },
	334	{ X1205_REG_HR, 0x7F, 0, 23 },
	335	{ X1205_REG_MN, 0xFF, 0, 59 },
	336	{ X1205_REG_SC, 0xFF, 0, 59 },
	337	{ X1205_REG_Y2K1, 0xFF, 19, 20 },
	338	{ X1205_REG_Y2K0, 0xFF, 19, 20 },
	339	};
	340
	341	/* check that registers have bits a 0 where expected */
	342	for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
	343	unsigned char buf;
	344
	345	unsigned char addr[2] = { 0, probe_zero_pattern[i] };
	346
	347	struct i2c_msg msgs[2] = {
	348	{ client->addr, 0, 2, addr },
	349	{ client->addr, I2C_M_RD, 1, &buf },
	350	};
	351
	352	if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
a14e1893	353	dev_err(&client->dev,
1fec7c66	354	"%s: could not read register %x\n",
2a4e2b87	355	__func__, probe_zero_pattern[i]);
1fec7c66 AZ	356
	357	return -EIO;
	358	}
	359
	360	if ((buf & probe_zero_pattern[i+1]) != 0) {
a14e1893	361	dev_err(&client->dev,
1fec7c66	362	"%s: register=%02x, zero pattern=%d, value=%x\n",
2a4e2b87	363	__func__, probe_zero_pattern[i], i, buf);
1fec7c66 AZ	364
	365	return -ENODEV;
	366	}
	367	}
	368
	369	/* check limits (only registers with bcd values) */
	370	for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
	371	unsigned char reg, value;
	372
	373	unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
	374
	375	struct i2c_msg msgs[2] = {
	376	{ client->addr, 0, 2, addr },
	377	{ client->addr, I2C_M_RD, 1, &reg },
	378	};
	379
	380	if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
a14e1893	381	dev_err(&client->dev,
1fec7c66	382	"%s: could not read register %x\n",
2a4e2b87	383	__func__, probe_limits_pattern[i].reg);
1fec7c66 AZ	384
	385	return -EIO;
	386	}
	387
	388	value = BCD2BIN(reg & probe_limits_pattern[i].mask);
	389
	390	if (value > probe_limits_pattern[i].max \|\|
	391	value < probe_limits_pattern[i].min) {
a14e1893	392	dev_dbg(&client->dev,
1fec7c66	393	"%s: register=%x, lim pattern=%d, value=%d\n",
2a4e2b87	394	__func__, probe_limits_pattern[i].reg,
1fec7c66 AZ	395	i, value);
	396
	397	return -ENODEV;
	398	}
	399	}
	400
	401	return 0;
	402	}
	403
	404	static int x1205_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	405	{
	406	return x1205_get_datetime(to_i2c_client(dev),
	407	&alrm->time, X1205_ALM0_BASE);
	408	}
	409
	410	static int x1205_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	411	{
	412	return x1205_set_datetime(to_i2c_client(dev),
	413	&alrm->time, 1, X1205_ALM0_BASE);
	414	}
	415
	416	static int x1205_rtc_read_time(struct device dev, struct rtc_time tm)
	417	{
	418	return x1205_get_datetime(to_i2c_client(dev),
	419	tm, X1205_CCR_BASE);
	420	}
	421
	422	static int x1205_rtc_set_time(struct device dev, struct rtc_time tm)
	423	{
	424	return x1205_set_datetime(to_i2c_client(dev),
	425	tm, 1, X1205_CCR_BASE);
	426	}
	427
	428	static int x1205_rtc_proc(struct device dev, struct seq_file seq)
	429	{
	430	int err, dtrim, atrim;
	431
1fec7c66 AZ	432	if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
	433	seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
	434
	435	if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
	436	seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
	437	atrim / 1000, atrim % 1000);
	438	return 0;
	439	}
	440
ff8371ac	441	static const struct rtc_class_ops x1205_rtc_ops = {
1fec7c66 AZ	442	.proc = x1205_rtc_proc,
	443	.read_time = x1205_rtc_read_time,
	444	.set_time = x1205_rtc_set_time,
	445	.read_alarm = x1205_rtc_read_alarm,
	446	.set_alarm = x1205_rtc_set_alarm,
	447	};
	448
	449	static ssize_t x1205_sysfs_show_atrim(struct device *dev,
	450	struct device_attribute attr, char buf)
	451	{
015aefbb	452	int err, atrim;
1fec7c66	453
015aefbb AZ	454	err = x1205_get_atrim(to_i2c_client(dev), &atrim);
	455	if (err)
	456	return err;
	457
	458	return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
1fec7c66 AZ	459	}
	460	static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
	461
	462	static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
	463	struct device_attribute attr, char buf)
	464	{
015aefbb	465	int err, dtrim;
1fec7c66	466
015aefbb AZ	467	err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
	468	if (err)
	469	return err;
1fec7c66	470
015aefbb	471	return sprintf(buf, "%d ppm\n", dtrim);
1fec7c66 AZ	472	}
	473	static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
	474
4edac2b4 AZ	475	static int x1205_sysfs_register(struct device *dev)
	476	{
	477	int err;
	478
	479	err = device_create_file(dev, &dev_attr_atrim);
	480	if (err)
	481	return err;
	482
	483	err = device_create_file(dev, &dev_attr_dtrim);
	484	if (err)
	485	device_remove_file(dev, &dev_attr_atrim);
	486
	487	return err;
	488	}
	489
	490	static void x1205_sysfs_unregister(struct device *dev)
1fec7c66	491	{
4edac2b4 AZ	492	device_remove_file(dev, &dev_attr_atrim);
4edac2b4 AZ	493	device_remove_file(dev, &dev_attr_dtrim);
1fec7c66 AZ	494	}
1fec7c66 AZ	495
4edac2b4	496
d2653e92 JD	497	static int x1205_probe(struct i2c_client *client,
d2653e92 JD	498	const struct i2c_device_id *id)
1fec7c66 AZ	499	{
	500	int err = 0;
	501	unsigned char sr;
1fec7c66 AZ	502	struct rtc_device *rtc;
1fec7c66 AZ	503
4edac2b4	504	dev_dbg(&client->dev, "%s\n", __func__);
1fec7c66	505
4edac2b4 AZ	506	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
4edac2b4 AZ	507	return -ENODEV;
1fec7c66	508
4edac2b4 AZ	509	if (x1205_validate_client(client) < 0)
4edac2b4 AZ	510	return -ENODEV;
1fec7c66 AZ	511
	512	dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
	513
	514	rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
	515	&x1205_rtc_ops, THIS_MODULE);
	516
4edac2b4 AZ	517	if (IS_ERR(rtc))
4edac2b4 AZ	518	return PTR_ERR(rtc);
1fec7c66 AZ	519
	520	i2c_set_clientdata(client, rtc);
	521
	522	/* Check for power failures and eventualy enable the osc */
	523	if ((err = x1205_get_status(client, &sr)) == 0) {
	524	if (sr & X1205_SR_RTCF) {
	525	dev_err(&client->dev,
	526	"power failure detected, "
	527	"please set the clock\n");
	528	udelay(50);
	529	x1205_fix_osc(client);
	530	}
	531	}
	532	else
	533	dev_err(&client->dev, "couldn't read status\n");
	534
4edac2b4 AZ	535	err = x1205_sysfs_register(&client->dev);
	536	if (err)
	537	goto exit_devreg;
1fec7c66 AZ	538
	539	return 0;
	540
91046a8a JG	541	exit_devreg:
	542	rtc_device_unregister(rtc);
	543
1fec7c66 AZ	544	return err;
	545	}
	546
4edac2b4	547	static int x1205_remove(struct i2c_client *client)
1fec7c66	548	{
1fec7c66 AZ	549	struct rtc_device *rtc = i2c_get_clientdata(client);
1fec7c66 AZ	550
4edac2b4 AZ	551	rtc_device_unregister(rtc);
4edac2b4 AZ	552	x1205_sysfs_unregister(&client->dev);
1fec7c66 AZ	553	return 0;
	554	}
	555
3760f736 JD	556	static const struct i2c_device_id x1205_id[] = {
	557	{ "x1205", 0 },
	558	{ }
	559	};
	560	MODULE_DEVICE_TABLE(i2c, x1205_id);
	561
4edac2b4 AZ	562	static struct i2c_driver x1205_driver = {
	563	.driver = {
	564	.name = "rtc-x1205",
	565	},
	566	.probe = x1205_probe,
	567	.remove = x1205_remove,
3760f736	568	.id_table = x1205_id,
4edac2b4 AZ	569	};
4edac2b4 AZ	570
1fec7c66 AZ	571	static int __init x1205_init(void)
	572	{
	573	return i2c_add_driver(&x1205_driver);
	574	}
	575
	576	static void __exit x1205_exit(void)
	577	{
	578	i2c_del_driver(&x1205_driver);
	579	}
	580
	581	MODULE_AUTHOR(
	582	"Karen Spearel <kas111 at gmail dot com>, "
	583	"Alessandro Zummo <a.zummo@towertech.it>");
	584	MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
	585	MODULE_LICENSE("GPL");
	586	MODULE_VERSION(DRV_VERSION);
	587
	588	module_init(x1205_init);
	589	module_exit(x1205_exit);