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CommitLineData
1da177e4
LT
1/*
2 * drivers/s390/cio/device_status.c
3 *
4 * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH,
5 * IBM Corporation
4ce3b30c 6 * Author(s): Cornelia Huck (cornelia.huck@de.ibm.com)
1da177e4
LT
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 *
9 * Status accumulation and basic sense functions.
10 */
11
1da177e4
LT
12#include <linux/module.h>
13#include <linux/init.h>
14
15#include <asm/ccwdev.h>
16#include <asm/cio.h>
17
18#include "cio.h"
19#include "cio_debug.h"
20#include "css.h"
21#include "device.h"
22#include "ioasm.h"
cd6b4f27 23#include "io_sch.h"
1da177e4
LT
24
25/*
26 * Check for any kind of channel or interface control check but don't
27 * issue the message for the console device
28 */
4d284cac 29static void
1da177e4
LT
30ccw_device_msg_control_check(struct ccw_device *cdev, struct irb *irb)
31{
32 if (!(irb->scsw.cstat & (SCHN_STAT_CHN_DATA_CHK |
33 SCHN_STAT_CHN_CTRL_CHK |
34 SCHN_STAT_INTF_CTRL_CHK)))
35 return;
1da177e4
LT
36 CIO_MSG_EVENT(0, "Channel-Check or Interface-Control-Check "
37 "received"
fb6958a5 38 " ... device %04x on subchannel 0.%x.%04x, dev_stat "
1da177e4 39 ": %02X sch_stat : %02X\n",
78964268
CH
40 cdev->private->dev_id.devno, cdev->private->schid.ssid,
41 cdev->private->schid.sch_no,
1d3ac7aa 42 irb->scsw.dstat, irb->scsw.cstat);
1da177e4
LT
43
44 if (irb->scsw.cc != 3) {
45 char dbf_text[15];
46
78964268 47 sprintf(dbf_text, "chk%x", cdev->private->schid.sch_no);
1da177e4 48 CIO_TRACE_EVENT(0, dbf_text);
1d3ac7aa 49 CIO_HEX_EVENT(0, irb, sizeof (struct irb));
1da177e4
LT
50 }
51}
52
53/*
54 * Some paths became not operational (pno bit in scsw is set).
55 */
56static void
57ccw_device_path_notoper(struct ccw_device *cdev)
58{
59 struct subchannel *sch;
60
61 sch = to_subchannel(cdev->dev.parent);
a8237fc4 62 stsch (sch->schid, &sch->schib);
1da177e4 63
fb6958a5 64 CIO_MSG_EVENT(0, "%s(0.%x.%04x) - path(s) %02x are "
2a2cf6b1 65 "not operational \n", __func__,
fb6958a5 66 sch->schid.ssid, sch->schid.sch_no,
1da177e4
LT
67 sch->schib.pmcw.pnom);
68
69 sch->lpm &= ~sch->schib.pmcw.pnom;
7e560814 70 cdev->private->flags.doverify = 1;
1da177e4
LT
71}
72
73/*
74 * Copy valid bits from the extended control word to device irb.
75 */
4d284cac 76static void
1da177e4
LT
77ccw_device_accumulate_ecw(struct ccw_device *cdev, struct irb *irb)
78{
79 /*
80 * Copy extended control bit if it is valid... yes there
81 * are condition that have to be met for the extended control
82 * bit to have meaning. Sick.
83 */
84 cdev->private->irb.scsw.ectl = 0;
85 if ((irb->scsw.stctl & SCSW_STCTL_ALERT_STATUS) &&
86 !(irb->scsw.stctl & SCSW_STCTL_INTER_STATUS))
87 cdev->private->irb.scsw.ectl = irb->scsw.ectl;
88 /* Check if extended control word is valid. */
89 if (!cdev->private->irb.scsw.ectl)
90 return;
91 /* Copy concurrent sense / model dependent information. */
92 memcpy (&cdev->private->irb.ecw, irb->ecw, sizeof (irb->ecw));
93}
94
95/*
96 * Check if extended status word is valid.
97 */
4d284cac 98static int
1da177e4
LT
99ccw_device_accumulate_esw_valid(struct irb *irb)
100{
101 if (!irb->scsw.eswf && irb->scsw.stctl == SCSW_STCTL_STATUS_PEND)
102 return 0;
103 if (irb->scsw.stctl ==
104 (SCSW_STCTL_INTER_STATUS|SCSW_STCTL_STATUS_PEND) &&
105 !(irb->scsw.actl & SCSW_ACTL_SUSPENDED))
106 return 0;
107 return 1;
108}
109
110/*
111 * Copy valid bits from the extended status word to device irb.
112 */
4d284cac 113static void
1da177e4
LT
114ccw_device_accumulate_esw(struct ccw_device *cdev, struct irb *irb)
115{
116 struct irb *cdev_irb;
117 struct sublog *cdev_sublog, *sublog;
118
119 if (!ccw_device_accumulate_esw_valid(irb))
120 return;
121
122 cdev_irb = &cdev->private->irb;
123
124 /* Copy last path used mask. */
125 cdev_irb->esw.esw1.lpum = irb->esw.esw1.lpum;
126
127 /* Copy subchannel logout information if esw is of format 0. */
128 if (irb->scsw.eswf) {
129 cdev_sublog = &cdev_irb->esw.esw0.sublog;
130 sublog = &irb->esw.esw0.sublog;
131 /* Copy extended status flags. */
132 cdev_sublog->esf = sublog->esf;
133 /*
134 * Copy fields that have a meaning for channel data check
135 * channel control check and interface control check.
136 */
137 if (irb->scsw.cstat & (SCHN_STAT_CHN_DATA_CHK |
138 SCHN_STAT_CHN_CTRL_CHK |
139 SCHN_STAT_INTF_CTRL_CHK)) {
140 /* Copy ancillary report bit. */
141 cdev_sublog->arep = sublog->arep;
142 /* Copy field-validity-flags. */
143 cdev_sublog->fvf = sublog->fvf;
144 /* Copy storage access code. */
145 cdev_sublog->sacc = sublog->sacc;
146 /* Copy termination code. */
147 cdev_sublog->termc = sublog->termc;
148 /* Copy sequence code. */
149 cdev_sublog->seqc = sublog->seqc;
150 }
151 /* Copy device status check. */
152 cdev_sublog->devsc = sublog->devsc;
153 /* Copy secondary error. */
154 cdev_sublog->serr = sublog->serr;
155 /* Copy i/o-error alert. */
156 cdev_sublog->ioerr = sublog->ioerr;
157 /* Copy channel path timeout bit. */
158 if (irb->scsw.cstat & SCHN_STAT_INTF_CTRL_CHK)
159 cdev_irb->esw.esw0.erw.cpt = irb->esw.esw0.erw.cpt;
160 /* Copy failing storage address validity flag. */
161 cdev_irb->esw.esw0.erw.fsavf = irb->esw.esw0.erw.fsavf;
162 if (cdev_irb->esw.esw0.erw.fsavf) {
163 /* ... and copy the failing storage address. */
164 memcpy(cdev_irb->esw.esw0.faddr, irb->esw.esw0.faddr,
165 sizeof (irb->esw.esw0.faddr));
166 /* ... and copy the failing storage address format. */
167 cdev_irb->esw.esw0.erw.fsaf = irb->esw.esw0.erw.fsaf;
168 }
169 /* Copy secondary ccw address validity bit. */
170 cdev_irb->esw.esw0.erw.scavf = irb->esw.esw0.erw.scavf;
171 if (irb->esw.esw0.erw.scavf)
172 /* ... and copy the secondary ccw address. */
173 cdev_irb->esw.esw0.saddr = irb->esw.esw0.saddr;
174
175 }
176 /* FIXME: DCTI for format 2? */
177
178 /* Copy authorization bit. */
179 cdev_irb->esw.esw0.erw.auth = irb->esw.esw0.erw.auth;
180 /* Copy path verification required flag. */
181 cdev_irb->esw.esw0.erw.pvrf = irb->esw.esw0.erw.pvrf;
7e560814 182 if (irb->esw.esw0.erw.pvrf)
1da177e4
LT
183 cdev->private->flags.doverify = 1;
184 /* Copy concurrent sense bit. */
185 cdev_irb->esw.esw0.erw.cons = irb->esw.esw0.erw.cons;
186 if (irb->esw.esw0.erw.cons)
187 cdev_irb->esw.esw0.erw.scnt = irb->esw.esw0.erw.scnt;
188}
189
190/*
191 * Accumulate status from irb to devstat.
192 */
193void
194ccw_device_accumulate_irb(struct ccw_device *cdev, struct irb *irb)
195{
196 struct irb *cdev_irb;
197
198 /*
199 * Check if the status pending bit is set in stctl.
200 * If not, the remaining bit have no meaning and we must ignore them.
201 * The esw is not meaningful as well...
202 */
203 if (!(irb->scsw.stctl & SCSW_STCTL_STATUS_PEND))
204 return;
205
206 /* Check for channel checks and interface control checks. */
207 ccw_device_msg_control_check(cdev, irb);
208
209 /* Check for path not operational. */
210 if (irb->scsw.pno && irb->scsw.fctl != 0 &&
211 (!(irb->scsw.stctl & SCSW_STCTL_INTER_STATUS) ||
212 (irb->scsw.actl & SCSW_ACTL_SUSPENDED)))
213 ccw_device_path_notoper(cdev);
214
215 /*
216 * Don't accumulate unsolicited interrupts.
217 */
218 if ((irb->scsw.stctl ==
219 (SCSW_STCTL_STATUS_PEND | SCSW_STCTL_ALERT_STATUS)) &&
220 (!irb->scsw.cc))
221 return;
222
223 cdev_irb = &cdev->private->irb;
224
8c3ce5be
CH
225 /*
226 * If the clear function had been performed, all formerly pending
227 * status at the subchannel has been cleared and we must not pass
228 * intermediate accumulated status to the device driver.
229 */
230 if (irb->scsw.fctl & SCSW_FCTL_CLEAR_FUNC)
231 memset(&cdev->private->irb, 0, sizeof(struct irb));
232
1da177e4
LT
233 /* Copy bits which are valid only for the start function. */
234 if (irb->scsw.fctl & SCSW_FCTL_START_FUNC) {
235 /* Copy key. */
236 cdev_irb->scsw.key = irb->scsw.key;
237 /* Copy suspend control bit. */
238 cdev_irb->scsw.sctl = irb->scsw.sctl;
239 /* Accumulate deferred condition code. */
240 cdev_irb->scsw.cc |= irb->scsw.cc;
241 /* Copy ccw format bit. */
242 cdev_irb->scsw.fmt = irb->scsw.fmt;
243 /* Copy prefetch bit. */
244 cdev_irb->scsw.pfch = irb->scsw.pfch;
245 /* Copy initial-status-interruption-control. */
246 cdev_irb->scsw.isic = irb->scsw.isic;
247 /* Copy address limit checking control. */
248 cdev_irb->scsw.alcc = irb->scsw.alcc;
249 /* Copy suppress suspend bit. */
250 cdev_irb->scsw.ssi = irb->scsw.ssi;
251 }
252
253 /* Take care of the extended control bit and extended control word. */
254 ccw_device_accumulate_ecw(cdev, irb);
255
256 /* Accumulate function control. */
257 cdev_irb->scsw.fctl |= irb->scsw.fctl;
258 /* Copy activity control. */
259 cdev_irb->scsw.actl= irb->scsw.actl;
260 /* Accumulate status control. */
261 cdev_irb->scsw.stctl |= irb->scsw.stctl;
262 /*
263 * Copy ccw address if it is valid. This is a bit simplified
264 * but should be close enough for all practical purposes.
265 */
266 if ((irb->scsw.stctl & SCSW_STCTL_PRIM_STATUS) ||
267 ((irb->scsw.stctl ==
268 (SCSW_STCTL_INTER_STATUS|SCSW_STCTL_STATUS_PEND)) &&
269 (irb->scsw.actl & SCSW_ACTL_DEVACT) &&
270 (irb->scsw.actl & SCSW_ACTL_SCHACT)) ||
271 (irb->scsw.actl & SCSW_ACTL_SUSPENDED))
272 cdev_irb->scsw.cpa = irb->scsw.cpa;
273 /* Accumulate device status, but not the device busy flag. */
274 cdev_irb->scsw.dstat &= ~DEV_STAT_BUSY;
25c61a1f
CH
275 /* dstat is not always valid. */
276 if (irb->scsw.stctl &
277 (SCSW_STCTL_PRIM_STATUS | SCSW_STCTL_SEC_STATUS
278 | SCSW_STCTL_INTER_STATUS | SCSW_STCTL_ALERT_STATUS))
279 cdev_irb->scsw.dstat |= irb->scsw.dstat;
1da177e4
LT
280 /* Accumulate subchannel status. */
281 cdev_irb->scsw.cstat |= irb->scsw.cstat;
282 /* Copy residual count if it is valid. */
283 if ((irb->scsw.stctl & SCSW_STCTL_PRIM_STATUS) &&
284 (irb->scsw.cstat & ~(SCHN_STAT_PCI | SCHN_STAT_INCORR_LEN)) == 0)
285 cdev_irb->scsw.count = irb->scsw.count;
286
287 /* Take care of bits in the extended status word. */
288 ccw_device_accumulate_esw(cdev, irb);
289
290 /*
291 * Check whether we must issue a SENSE CCW ourselves if there is no
292 * concurrent sense facility installed for the subchannel.
293 * No sense is required if no delayed sense is pending
294 * and we did not get a unit check without sense information.
295 *
296 * Note: We should check for ioinfo[irq]->flags.consns but VM
297 * violates the ESA/390 architecture and doesn't present an
298 * operand exception for virtual devices without concurrent
299 * sense facility available/supported when enabling the
300 * concurrent sense facility.
301 */
302 if ((cdev_irb->scsw.dstat & DEV_STAT_UNIT_CHECK) &&
303 !(cdev_irb->esw.esw0.erw.cons))
304 cdev->private->flags.dosense = 1;
305}
306
307/*
308 * Do a basic sense.
309 */
310int
311ccw_device_do_sense(struct ccw_device *cdev, struct irb *irb)
312{
313 struct subchannel *sch;
cd6b4f27 314 struct ccw1 *sense_ccw;
fe6173d9 315 int rc;
1da177e4
LT
316
317 sch = to_subchannel(cdev->dev.parent);
318
319 /* A sense is required, can we do it now ? */
320 if ((irb->scsw.actl & (SCSW_ACTL_DEVACT | SCSW_ACTL_SCHACT)) != 0)
321 /*
322 * we received an Unit Check but we have no final
323 * status yet, therefore we must delay the SENSE
324 * processing. We must not report this intermediate
325 * status to the device interrupt handler.
326 */
327 return -EBUSY;
328
329 /*
330 * We have ending status but no sense information. Do a basic sense.
331 */
cd6b4f27
CH
332 sense_ccw = &to_io_private(sch)->sense_ccw;
333 sense_ccw->cmd_code = CCW_CMD_BASIC_SENSE;
334 sense_ccw->cda = (__u32) __pa(cdev->private->irb.ecw);
335 sense_ccw->count = SENSE_MAX_COUNT;
336 sense_ccw->flags = CCW_FLAG_SLI;
1da177e4 337
d23861ff
CH
338 /* Reset internal retry indication. */
339 cdev->private->flags.intretry = 0;
340
fe6173d9
CH
341 rc = cio_start(sch, sense_ccw, 0xff);
342 if (rc == -ENODEV || rc == -EACCES)
343 dev_fsm_event(cdev, DEV_EVENT_VERIFY);
344 return rc;
1da177e4
LT
345}
346
347/*
348 * Add information from basic sense to devstat.
349 */
350void
351ccw_device_accumulate_basic_sense(struct ccw_device *cdev, struct irb *irb)
352{
353 /*
354 * Check if the status pending bit is set in stctl.
355 * If not, the remaining bit have no meaning and we must ignore them.
356 * The esw is not meaningful as well...
357 */
358 if (!(irb->scsw.stctl & SCSW_STCTL_STATUS_PEND))
359 return;
360
361 /* Check for channel checks and interface control checks. */
362 ccw_device_msg_control_check(cdev, irb);
363
364 /* Check for path not operational. */
365 if (irb->scsw.pno && irb->scsw.fctl != 0 &&
366 (!(irb->scsw.stctl & SCSW_STCTL_INTER_STATUS) ||
367 (irb->scsw.actl & SCSW_ACTL_SUSPENDED)))
368 ccw_device_path_notoper(cdev);
369
370 if (!(irb->scsw.dstat & DEV_STAT_UNIT_CHECK) &&
371 (irb->scsw.dstat & DEV_STAT_CHN_END)) {
372 cdev->private->irb.esw.esw0.erw.cons = 1;
373 cdev->private->flags.dosense = 0;
374 }
375 /* Check if path verification is required. */
376 if (ccw_device_accumulate_esw_valid(irb) &&
7e560814 377 irb->esw.esw0.erw.pvrf)
1da177e4
LT
378 cdev->private->flags.doverify = 1;
379}
380
381/*
382 * This function accumulates the status into the private devstat and
383 * starts a basic sense if one is needed.
384 */
385int
386ccw_device_accumulate_and_sense(struct ccw_device *cdev, struct irb *irb)
387{
388 ccw_device_accumulate_irb(cdev, irb);
389 if ((irb->scsw.actl & (SCSW_ACTL_DEVACT | SCSW_ACTL_SCHACT)) != 0)
390 return -EBUSY;
391 /* Check for basic sense. */
392 if (cdev->private->flags.dosense &&
393 !(irb->scsw.dstat & DEV_STAT_UNIT_CHECK)) {
394 cdev->private->irb.esw.esw0.erw.cons = 1;
395 cdev->private->flags.dosense = 0;
396 return 0;
397 }
398 if (cdev->private->flags.dosense) {
399 ccw_device_do_sense(cdev, irb);
400 return -EBUSY;
401 }
402 return 0;
403}
404