]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/s390/cio/qdio_main.c
[S390] qdio: outbound queue full counter
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / cio / qdio_main.c
CommitLineData
779e6e1c
JG
1/*
2 * linux/drivers/s390/cio/qdio_main.c
3 *
4 * Linux for s390 qdio support, buffer handling, qdio API and module support.
5 *
6 * Copyright 2000,2008 IBM Corp.
7 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
8 * Jan Glauber <jang@linux.vnet.ibm.com>
9 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
10 */
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/timer.h>
15#include <linux/delay.h>
5a0e3ad6 16#include <linux/gfp.h>
30d77c3e 17#include <linux/kernel_stat.h>
779e6e1c
JG
18#include <asm/atomic.h>
19#include <asm/debug.h>
20#include <asm/qdio.h>
21
22#include "cio.h"
23#include "css.h"
24#include "device.h"
25#include "qdio.h"
26#include "qdio_debug.h"
779e6e1c
JG
27
28MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
29 "Jan Glauber <jang@linux.vnet.ibm.com>");
30MODULE_DESCRIPTION("QDIO base support");
31MODULE_LICENSE("GPL");
32
33static inline int do_siga_sync(struct subchannel_id schid,
34 unsigned int out_mask, unsigned int in_mask)
35{
36 register unsigned long __fc asm ("0") = 2;
37 register struct subchannel_id __schid asm ("1") = schid;
38 register unsigned long out asm ("2") = out_mask;
39 register unsigned long in asm ("3") = in_mask;
40 int cc;
41
42 asm volatile(
43 " siga 0\n"
44 " ipm %0\n"
45 " srl %0,28\n"
46 : "=d" (cc)
47 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
48 return cc;
49}
50
51static inline int do_siga_input(struct subchannel_id schid, unsigned int mask)
52{
53 register unsigned long __fc asm ("0") = 1;
54 register struct subchannel_id __schid asm ("1") = schid;
55 register unsigned long __mask asm ("2") = mask;
56 int cc;
57
58 asm volatile(
59 " siga 0\n"
60 " ipm %0\n"
61 " srl %0,28\n"
62 : "=d" (cc)
63 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
64 return cc;
65}
66
67/**
68 * do_siga_output - perform SIGA-w/wt function
69 * @schid: subchannel id or in case of QEBSM the subchannel token
70 * @mask: which output queues to process
71 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
72 * @fc: function code to perform
73 *
74 * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
75 * Note: For IQDC unicast queues only the highest priority queue is processed.
76 */
77static inline int do_siga_output(unsigned long schid, unsigned long mask,
7a0b4cbc 78 unsigned int *bb, unsigned int fc)
779e6e1c
JG
79{
80 register unsigned long __fc asm("0") = fc;
81 register unsigned long __schid asm("1") = schid;
82 register unsigned long __mask asm("2") = mask;
83 int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
84
85 asm volatile(
86 " siga 0\n"
87 "0: ipm %0\n"
88 " srl %0,28\n"
89 "1:\n"
90 EX_TABLE(0b, 1b)
91 : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
92 : : "cc", "memory");
93 *bb = ((unsigned int) __fc) >> 31;
94 return cc;
95}
96
97static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
98{
779e6e1c
JG
99 /* all done or next buffer state different */
100 if (ccq == 0 || ccq == 32)
101 return 0;
102 /* not all buffers processed */
103 if (ccq == 96 || ccq == 97)
104 return 1;
105 /* notify devices immediately */
22f99347 106 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
779e6e1c
JG
107 return -EIO;
108}
109
110/**
111 * qdio_do_eqbs - extract buffer states for QEBSM
112 * @q: queue to manipulate
113 * @state: state of the extracted buffers
114 * @start: buffer number to start at
115 * @count: count of buffers to examine
50f769df 116 * @auto_ack: automatically acknowledge buffers
779e6e1c 117 *
73ac36ea 118 * Returns the number of successfully extracted equal buffer states.
779e6e1c
JG
119 * Stops processing if a state is different from the last buffers state.
120 */
121static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
50f769df 122 int start, int count, int auto_ack)
779e6e1c
JG
123{
124 unsigned int ccq = 0;
125 int tmp_count = count, tmp_start = start;
126 int nr = q->nr;
127 int rc;
779e6e1c
JG
128
129 BUG_ON(!q->irq_ptr->sch_token);
6486cda6 130 qperf_inc(q, eqbs);
779e6e1c
JG
131
132 if (!q->is_input_q)
133 nr += q->irq_ptr->nr_input_qs;
134again:
50f769df
JG
135 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
136 auto_ack);
779e6e1c
JG
137 rc = qdio_check_ccq(q, ccq);
138
139 /* At least one buffer was processed, return and extract the remaining
140 * buffers later.
141 */
23589d05 142 if ((ccq == 96) && (count != tmp_count)) {
6486cda6 143 qperf_inc(q, eqbs_partial);
779e6e1c 144 return (count - tmp_count);
23589d05 145 }
22f99347 146
779e6e1c 147 if (rc == 1) {
22f99347 148 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
779e6e1c
JG
149 goto again;
150 }
151
152 if (rc < 0) {
22f99347
JG
153 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
154 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
779e6e1c
JG
155 q->handler(q->irq_ptr->cdev,
156 QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
157 0, -1, -1, q->irq_ptr->int_parm);
158 return 0;
159 }
160 return count - tmp_count;
161}
162
163/**
164 * qdio_do_sqbs - set buffer states for QEBSM
165 * @q: queue to manipulate
166 * @state: new state of the buffers
167 * @start: first buffer number to change
168 * @count: how many buffers to change
169 *
170 * Returns the number of successfully changed buffers.
171 * Does retrying until the specified count of buffer states is set or an
172 * error occurs.
173 */
174static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
175 int count)
176{
177 unsigned int ccq = 0;
178 int tmp_count = count, tmp_start = start;
179 int nr = q->nr;
180 int rc;
779e6e1c 181
50f769df
JG
182 if (!count)
183 return 0;
184
779e6e1c 185 BUG_ON(!q->irq_ptr->sch_token);
6486cda6 186 qperf_inc(q, sqbs);
779e6e1c
JG
187
188 if (!q->is_input_q)
189 nr += q->irq_ptr->nr_input_qs;
190again:
191 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
192 rc = qdio_check_ccq(q, ccq);
193 if (rc == 1) {
22f99347 194 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
6486cda6 195 qperf_inc(q, sqbs_partial);
779e6e1c
JG
196 goto again;
197 }
198 if (rc < 0) {
22f99347
JG
199 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
200 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
779e6e1c
JG
201 q->handler(q->irq_ptr->cdev,
202 QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
203 0, -1, -1, q->irq_ptr->int_parm);
204 return 0;
205 }
206 WARN_ON(tmp_count);
207 return count - tmp_count;
208}
209
210/* returns number of examined buffers and their common state in *state */
211static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
50f769df
JG
212 unsigned char *state, unsigned int count,
213 int auto_ack)
779e6e1c
JG
214{
215 unsigned char __state = 0;
216 int i;
217
218 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
219 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
220
221 if (is_qebsm(q))
50f769df 222 return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
779e6e1c
JG
223
224 for (i = 0; i < count; i++) {
225 if (!__state)
226 __state = q->slsb.val[bufnr];
227 else if (q->slsb.val[bufnr] != __state)
228 break;
229 bufnr = next_buf(bufnr);
230 }
231 *state = __state;
232 return i;
233}
234
60b5df2f
JG
235static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
236 unsigned char *state, int auto_ack)
779e6e1c 237{
50f769df 238 return get_buf_states(q, bufnr, state, 1, auto_ack);
779e6e1c
JG
239}
240
241/* wrap-around safe setting of slsb states, returns number of changed buffers */
242static inline int set_buf_states(struct qdio_q *q, int bufnr,
243 unsigned char state, int count)
244{
245 int i;
246
247 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
248 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
249
250 if (is_qebsm(q))
251 return qdio_do_sqbs(q, state, bufnr, count);
252
253 for (i = 0; i < count; i++) {
254 xchg(&q->slsb.val[bufnr], state);
255 bufnr = next_buf(bufnr);
256 }
257 return count;
258}
259
260static inline int set_buf_state(struct qdio_q *q, int bufnr,
261 unsigned char state)
262{
263 return set_buf_states(q, bufnr, state, 1);
264}
265
266/* set slsb states to initial state */
267void qdio_init_buf_states(struct qdio_irq *irq_ptr)
268{
269 struct qdio_q *q;
270 int i;
271
272 for_each_input_queue(irq_ptr, q, i)
273 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
274 QDIO_MAX_BUFFERS_PER_Q);
275 for_each_output_queue(irq_ptr, q, i)
276 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
277 QDIO_MAX_BUFFERS_PER_Q);
278}
279
60b5df2f 280static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
779e6e1c
JG
281 unsigned int input)
282{
283 int cc;
284
285 if (!need_siga_sync(q))
286 return 0;
287
7a0b4cbc 288 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
6486cda6 289 qperf_inc(q, siga_sync);
779e6e1c
JG
290
291 cc = do_siga_sync(q->irq_ptr->schid, output, input);
22f99347
JG
292 if (cc)
293 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
779e6e1c
JG
294 return cc;
295}
296
60b5df2f 297static inline int qdio_siga_sync_q(struct qdio_q *q)
779e6e1c
JG
298{
299 if (q->is_input_q)
300 return qdio_siga_sync(q, 0, q->mask);
301 else
302 return qdio_siga_sync(q, q->mask, 0);
303}
304
305static inline int qdio_siga_sync_out(struct qdio_q *q)
306{
307 return qdio_siga_sync(q, ~0U, 0);
308}
309
310static inline int qdio_siga_sync_all(struct qdio_q *q)
311{
312 return qdio_siga_sync(q, ~0U, ~0U);
313}
314
7a0b4cbc 315static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
779e6e1c 316{
779e6e1c 317 unsigned long schid;
7a0b4cbc
JG
318 unsigned int fc = 0;
319 u64 start_time = 0;
320 int cc;
779e6e1c 321
7a0b4cbc 322 if (q->u.out.use_enh_siga)
7a0f4755 323 fc = 3;
7a0b4cbc
JG
324
325 if (is_qebsm(q)) {
779e6e1c
JG
326 schid = q->irq_ptr->sch_token;
327 fc |= 0x80;
328 }
7a0b4cbc
JG
329 else
330 schid = *((u32 *)&q->irq_ptr->schid);
779e6e1c 331
779e6e1c 332again:
7a0b4cbc
JG
333 cc = do_siga_output(schid, q->mask, busy_bit, fc);
334
335 /* hipersocket busy condition */
336 if (*busy_bit) {
337 WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
58eb27cd 338
7a0b4cbc 339 if (!start_time) {
3a601bfe 340 start_time = get_clock();
7a0b4cbc
JG
341 goto again;
342 }
3a601bfe 343 if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
779e6e1c
JG
344 goto again;
345 }
779e6e1c
JG
346 return cc;
347}
348
349static inline int qdio_siga_input(struct qdio_q *q)
350{
351 int cc;
352
22f99347 353 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
6486cda6 354 qperf_inc(q, siga_read);
779e6e1c
JG
355
356 cc = do_siga_input(q->irq_ptr->schid, q->mask);
357 if (cc)
22f99347 358 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
779e6e1c
JG
359 return cc;
360}
361
60b5df2f 362static inline void qdio_sync_after_thinint(struct qdio_q *q)
779e6e1c
JG
363{
364 if (pci_out_supported(q)) {
365 if (need_siga_sync_thinint(q))
366 qdio_siga_sync_all(q);
367 else if (need_siga_sync_out_thinint(q))
368 qdio_siga_sync_out(q);
369 } else
370 qdio_siga_sync_q(q);
371}
372
60b5df2f
JG
373int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
374 unsigned char *state)
375{
376 qdio_siga_sync_q(q);
377 return get_buf_states(q, bufnr, state, 1, 0);
378}
379
380static inline void qdio_stop_polling(struct qdio_q *q)
779e6e1c 381{
50f769df 382 if (!q->u.in.polling)
779e6e1c 383 return;
50f769df 384
779e6e1c 385 q->u.in.polling = 0;
6486cda6 386 qperf_inc(q, stop_polling);
779e6e1c
JG
387
388 /* show the card that we are not polling anymore */
50f769df 389 if (is_qebsm(q)) {
e85dea0e 390 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
50f769df
JG
391 q->u.in.ack_count);
392 q->u.in.ack_count = 0;
393 } else
e85dea0e 394 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
779e6e1c
JG
395}
396
d307297f
JG
397static inline void account_sbals(struct qdio_q *q, int count)
398{
399 int pos = 0;
400
401 q->q_stats.nr_sbal_total += count;
402 if (count == QDIO_MAX_BUFFERS_MASK) {
403 q->q_stats.nr_sbals[7]++;
404 return;
405 }
406 while (count >>= 1)
407 pos++;
408 q->q_stats.nr_sbals[pos]++;
409}
410
50f769df 411static void announce_buffer_error(struct qdio_q *q, int count)
779e6e1c 412{
7a0b4cbc 413 q->qdio_error |= QDIO_ERROR_SLSB_STATE;
50f769df
JG
414
415 /* special handling for no target buffer empty */
416 if ((!q->is_input_q &&
417 (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
6486cda6 418 qperf_inc(q, target_full);
1d7e1500 419 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
50f769df
JG
420 q->first_to_check);
421 return;
422 }
423
22f99347
JG
424 DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
425 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
50f769df 426 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
22f99347
JG
427 DBF_ERROR("F14:%2x F15:%2x",
428 q->sbal[q->first_to_check]->element[14].flags & 0xff,
429 q->sbal[q->first_to_check]->element[15].flags & 0xff);
50f769df 430}
779e6e1c 431
50f769df
JG
432static inline void inbound_primed(struct qdio_q *q, int count)
433{
434 int new;
435
1d7e1500 436 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
50f769df
JG
437
438 /* for QEBSM the ACK was already set by EQBS */
439 if (is_qebsm(q)) {
440 if (!q->u.in.polling) {
441 q->u.in.polling = 1;
442 q->u.in.ack_count = count;
e85dea0e 443 q->u.in.ack_start = q->first_to_check;
50f769df
JG
444 return;
445 }
446
447 /* delete the previous ACK's */
e85dea0e 448 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
50f769df
JG
449 q->u.in.ack_count);
450 q->u.in.ack_count = count;
e85dea0e 451 q->u.in.ack_start = q->first_to_check;
50f769df
JG
452 return;
453 }
454
455 /*
456 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
457 * or by the next inbound run.
458 */
459 new = add_buf(q->first_to_check, count - 1);
460 if (q->u.in.polling) {
461 /* reset the previous ACK but first set the new one */
462 set_buf_state(q, new, SLSB_P_INPUT_ACK);
e85dea0e 463 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
3fdf1e18 464 } else {
50f769df 465 q->u.in.polling = 1;
3fdf1e18 466 set_buf_state(q, new, SLSB_P_INPUT_ACK);
50f769df
JG
467 }
468
e85dea0e 469 q->u.in.ack_start = new;
50f769df
JG
470 count--;
471 if (!count)
472 return;
6541f7b6
JG
473 /* need to change ALL buffers to get more interrupts */
474 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
779e6e1c
JG
475}
476
477static int get_inbound_buffer_frontier(struct qdio_q *q)
478{
479 int count, stop;
480 unsigned char state;
481
779e6e1c
JG
482 /*
483 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
484 * would return 0.
485 */
486 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
487 stop = add_buf(q->first_to_check, count);
488
779e6e1c
JG
489 if (q->first_to_check == stop)
490 goto out;
491
36e3e721
JG
492 /*
493 * No siga sync here, as a PCI or we after a thin interrupt
494 * already sync'ed the queues.
495 */
50f769df 496 count = get_buf_states(q, q->first_to_check, &state, count, 1);
779e6e1c
JG
497 if (!count)
498 goto out;
499
500 switch (state) {
501 case SLSB_P_INPUT_PRIMED:
50f769df 502 inbound_primed(q, count);
779e6e1c 503 q->first_to_check = add_buf(q->first_to_check, count);
8bcd9b04 504 if (atomic_sub(count, &q->nr_buf_used) == 0)
6486cda6 505 qperf_inc(q, inbound_queue_full);
d307297f
JG
506 if (q->irq_ptr->perf_stat_enabled)
507 account_sbals(q, count);
36e3e721 508 break;
779e6e1c 509 case SLSB_P_INPUT_ERROR:
50f769df 510 announce_buffer_error(q, count);
779e6e1c
JG
511 /* process the buffer, the upper layer will take care of it */
512 q->first_to_check = add_buf(q->first_to_check, count);
513 atomic_sub(count, &q->nr_buf_used);
d307297f
JG
514 if (q->irq_ptr->perf_stat_enabled)
515 account_sbals_error(q, count);
779e6e1c
JG
516 break;
517 case SLSB_CU_INPUT_EMPTY:
518 case SLSB_P_INPUT_NOT_INIT:
519 case SLSB_P_INPUT_ACK:
d307297f
JG
520 if (q->irq_ptr->perf_stat_enabled)
521 q->q_stats.nr_sbal_nop++;
22f99347 522 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
779e6e1c
JG
523 break;
524 default:
525 BUG();
526 }
527out:
779e6e1c
JG
528 return q->first_to_check;
529}
530
60b5df2f 531static int qdio_inbound_q_moved(struct qdio_q *q)
779e6e1c
JG
532{
533 int bufnr;
534
535 bufnr = get_inbound_buffer_frontier(q);
536
e85dea0e
JG
537 if ((bufnr != q->last_move) || q->qdio_error) {
538 q->last_move = bufnr;
27d71602 539 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
3a601bfe 540 q->u.in.timestamp = get_clock();
779e6e1c
JG
541 return 1;
542 } else
543 return 0;
544}
545
9a2c160a 546static inline int qdio_inbound_q_done(struct qdio_q *q)
779e6e1c 547{
9a1ce28a 548 unsigned char state = 0;
779e6e1c
JG
549
550 if (!atomic_read(&q->nr_buf_used))
551 return 1;
552
779e6e1c 553 qdio_siga_sync_q(q);
50f769df 554 get_buf_state(q, q->first_to_check, &state, 0);
9a2c160a 555
4c52228d 556 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
9a2c160a 557 /* more work coming */
779e6e1c
JG
558 return 0;
559
9a2c160a
JG
560 if (is_thinint_irq(q->irq_ptr))
561 return 1;
562
563 /* don't poll under z/VM */
564 if (MACHINE_IS_VM)
779e6e1c
JG
565 return 1;
566
567 /*
568 * At this point we know, that inbound first_to_check
569 * has (probably) not moved (see qdio_inbound_processing).
570 */
3a601bfe 571 if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
1d7e1500 572 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
22f99347 573 q->first_to_check);
779e6e1c 574 return 1;
9a2c160a 575 } else
60b5df2f 576 return 0;
60b5df2f
JG
577}
578
579static void qdio_kick_handler(struct qdio_q *q)
779e6e1c 580{
9c8a08d7
JG
581 int start = q->first_to_kick;
582 int end = q->first_to_check;
583 int count;
779e6e1c
JG
584
585 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
586 return;
587
9c8a08d7
JG
588 count = sub_buf(end, start);
589
590 if (q->is_input_q) {
6486cda6 591 qperf_inc(q, inbound_handler);
1d7e1500 592 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
bd6e8a16 593 } else {
6486cda6 594 qperf_inc(q, outbound_handler);
1d7e1500
JG
595 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
596 start, count);
bd6e8a16 597 }
9c8a08d7
JG
598
599 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
600 q->irq_ptr->int_parm);
779e6e1c
JG
601
602 /* for the next time */
9c8a08d7 603 q->first_to_kick = end;
779e6e1c
JG
604 q->qdio_error = 0;
605}
606
607static void __qdio_inbound_processing(struct qdio_q *q)
608{
6486cda6 609 qperf_inc(q, tasklet_inbound);
f3eb20fa 610
779e6e1c
JG
611 if (!qdio_inbound_q_moved(q))
612 return;
613
9c8a08d7 614 qdio_kick_handler(q);
779e6e1c 615
6486cda6 616 if (!qdio_inbound_q_done(q)) {
779e6e1c 617 /* means poll time is not yet over */
6486cda6 618 qperf_inc(q, tasklet_inbound_resched);
f3eb20fa
JG
619 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
620 tasklet_schedule(&q->tasklet);
621 return;
622 }
6486cda6 623 }
779e6e1c
JG
624
625 qdio_stop_polling(q);
626 /*
627 * We need to check again to not lose initiative after
628 * resetting the ACK state.
629 */
6486cda6
JG
630 if (!qdio_inbound_q_done(q)) {
631 qperf_inc(q, tasklet_inbound_resched2);
f3eb20fa
JG
632 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
633 tasklet_schedule(&q->tasklet);
6486cda6 634 }
779e6e1c
JG
635}
636
779e6e1c
JG
637void qdio_inbound_processing(unsigned long data)
638{
639 struct qdio_q *q = (struct qdio_q *)data;
640 __qdio_inbound_processing(q);
641}
642
643static int get_outbound_buffer_frontier(struct qdio_q *q)
644{
645 int count, stop;
646 unsigned char state;
647
648 if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) ||
649 (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q)))
650 qdio_siga_sync_q(q);
651
652 /*
653 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
654 * would return 0.
655 */
656 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
657 stop = add_buf(q->first_to_check, count);
658
779e6e1c
JG
659 if (q->first_to_check == stop)
660 return q->first_to_check;
661
50f769df 662 count = get_buf_states(q, q->first_to_check, &state, count, 0);
779e6e1c
JG
663 if (!count)
664 return q->first_to_check;
665
666 switch (state) {
667 case SLSB_P_OUTPUT_EMPTY:
668 /* the adapter got it */
1d7e1500 669 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %02x", q->nr, count);
779e6e1c
JG
670
671 atomic_sub(count, &q->nr_buf_used);
672 q->first_to_check = add_buf(q->first_to_check, count);
d307297f
JG
673 if (q->irq_ptr->perf_stat_enabled)
674 account_sbals(q, count);
36e3e721 675 break;
779e6e1c 676 case SLSB_P_OUTPUT_ERROR:
50f769df 677 announce_buffer_error(q, count);
779e6e1c
JG
678 /* process the buffer, the upper layer will take care of it */
679 q->first_to_check = add_buf(q->first_to_check, count);
680 atomic_sub(count, &q->nr_buf_used);
d307297f
JG
681 if (q->irq_ptr->perf_stat_enabled)
682 account_sbals_error(q, count);
779e6e1c
JG
683 break;
684 case SLSB_CU_OUTPUT_PRIMED:
685 /* the adapter has not fetched the output yet */
d307297f
JG
686 if (q->irq_ptr->perf_stat_enabled)
687 q->q_stats.nr_sbal_nop++;
22f99347 688 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
779e6e1c
JG
689 break;
690 case SLSB_P_OUTPUT_NOT_INIT:
691 case SLSB_P_OUTPUT_HALTED:
692 break;
693 default:
694 BUG();
695 }
696 return q->first_to_check;
697}
698
699/* all buffers processed? */
700static inline int qdio_outbound_q_done(struct qdio_q *q)
701{
702 return atomic_read(&q->nr_buf_used) == 0;
703}
704
705static inline int qdio_outbound_q_moved(struct qdio_q *q)
706{
707 int bufnr;
708
709 bufnr = get_outbound_buffer_frontier(q);
710
e85dea0e
JG
711 if ((bufnr != q->last_move) || q->qdio_error) {
712 q->last_move = bufnr;
22f99347 713 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
779e6e1c
JG
714 return 1;
715 } else
716 return 0;
717}
718
d303b6fd 719static int qdio_kick_outbound_q(struct qdio_q *q)
779e6e1c 720{
7a0b4cbc
JG
721 unsigned int busy_bit;
722 int cc;
779e6e1c
JG
723
724 if (!need_siga_out(q))
d303b6fd 725 return 0;
779e6e1c 726
7a0b4cbc 727 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
6486cda6 728 qperf_inc(q, siga_write);
7a0b4cbc
JG
729
730 cc = qdio_siga_output(q, &busy_bit);
731 switch (cc) {
779e6e1c 732 case 0:
779e6e1c 733 break;
7a0b4cbc
JG
734 case 2:
735 if (busy_bit) {
736 DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
d303b6fd
JG
737 cc |= QDIO_ERROR_SIGA_BUSY;
738 } else
739 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
7a0b4cbc
JG
740 break;
741 case 1:
742 case 3:
743 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
7a0b4cbc 744 break;
779e6e1c 745 }
d303b6fd 746 return cc;
779e6e1c
JG
747}
748
779e6e1c
JG
749static void __qdio_outbound_processing(struct qdio_q *q)
750{
6486cda6 751 qperf_inc(q, tasklet_outbound);
779e6e1c
JG
752 BUG_ON(atomic_read(&q->nr_buf_used) < 0);
753
754 if (qdio_outbound_q_moved(q))
9c8a08d7 755 qdio_kick_handler(q);
779e6e1c 756
c38f9608 757 if (queue_type(q) == QDIO_ZFCP_QFMT)
779e6e1c 758 if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
c38f9608 759 goto sched;
779e6e1c
JG
760
761 /* bail out for HiperSockets unicast queues */
762 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
763 return;
764
4bcb3a37 765 if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
c38f9608
JG
766 (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
767 goto sched;
4bcb3a37 768
779e6e1c
JG
769 if (q->u.out.pci_out_enabled)
770 return;
771
772 /*
773 * Now we know that queue type is either qeth without pci enabled
774 * or HiperSockets multicast. Make sure buffer switch from PRIMED to
775 * EMPTY is noticed and outbound_handler is called after some time.
776 */
777 if (qdio_outbound_q_done(q))
778 del_timer(&q->u.out.timer);
6486cda6
JG
779 else
780 if (!timer_pending(&q->u.out.timer))
779e6e1c 781 mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
c38f9608
JG
782 return;
783
784sched:
785 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
786 return;
787 tasklet_schedule(&q->tasklet);
779e6e1c
JG
788}
789
790/* outbound tasklet */
791void qdio_outbound_processing(unsigned long data)
792{
793 struct qdio_q *q = (struct qdio_q *)data;
794 __qdio_outbound_processing(q);
795}
796
797void qdio_outbound_timer(unsigned long data)
798{
799 struct qdio_q *q = (struct qdio_q *)data;
c38f9608
JG
800
801 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
802 return;
779e6e1c
JG
803 tasklet_schedule(&q->tasklet);
804}
805
60b5df2f 806static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
779e6e1c
JG
807{
808 struct qdio_q *out;
809 int i;
810
811 if (!pci_out_supported(q))
812 return;
813
814 for_each_output_queue(q->irq_ptr, out, i)
815 if (!qdio_outbound_q_done(out))
816 tasklet_schedule(&out->tasklet);
817}
818
60b5df2f
JG
819static void __tiqdio_inbound_processing(struct qdio_q *q)
820{
6486cda6 821 qperf_inc(q, tasklet_inbound);
60b5df2f
JG
822 qdio_sync_after_thinint(q);
823
824 /*
825 * The interrupt could be caused by a PCI request. Check the
826 * PCI capable outbound queues.
827 */
828 qdio_check_outbound_after_thinint(q);
829
830 if (!qdio_inbound_q_moved(q))
831 return;
832
833 qdio_kick_handler(q);
834
9a2c160a 835 if (!qdio_inbound_q_done(q)) {
6486cda6 836 qperf_inc(q, tasklet_inbound_resched);
e2910bcf 837 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
60b5df2f 838 tasklet_schedule(&q->tasklet);
e2910bcf
JG
839 return;
840 }
60b5df2f
JG
841 }
842
843 qdio_stop_polling(q);
844 /*
845 * We need to check again to not lose initiative after
846 * resetting the ACK state.
847 */
9a2c160a 848 if (!qdio_inbound_q_done(q)) {
6486cda6 849 qperf_inc(q, tasklet_inbound_resched2);
60b5df2f
JG
850 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
851 tasklet_schedule(&q->tasklet);
852 }
853}
854
855void tiqdio_inbound_processing(unsigned long data)
856{
857 struct qdio_q *q = (struct qdio_q *)data;
858 __tiqdio_inbound_processing(q);
859}
860
779e6e1c
JG
861static inline void qdio_set_state(struct qdio_irq *irq_ptr,
862 enum qdio_irq_states state)
863{
22f99347 864 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
779e6e1c
JG
865
866 irq_ptr->state = state;
867 mb();
868}
869
22f99347 870static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
779e6e1c 871{
779e6e1c 872 if (irb->esw.esw0.erw.cons) {
22f99347
JG
873 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
874 DBF_ERROR_HEX(irb, 64);
875 DBF_ERROR_HEX(irb->ecw, 64);
779e6e1c
JG
876 }
877}
878
879/* PCI interrupt handler */
880static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
881{
882 int i;
883 struct qdio_q *q;
884
c38f9608
JG
885 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
886 return;
887
d36deae7
JG
888 for_each_input_queue(irq_ptr, q, i) {
889 if (q->u.in.queue_start_poll) {
890 /* skip if polling is enabled or already in work */
891 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
892 &q->u.in.queue_irq_state)) {
893 qperf_inc(q, int_discarded);
894 continue;
895 }
896 q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
897 q->irq_ptr->int_parm);
898 } else
899 tasklet_schedule(&q->tasklet);
900 }
779e6e1c
JG
901
902 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
903 return;
904
905 for_each_output_queue(irq_ptr, q, i) {
906 if (qdio_outbound_q_done(q))
907 continue;
908
909 if (!siga_syncs_out_pci(q))
910 qdio_siga_sync_q(q);
911
912 tasklet_schedule(&q->tasklet);
913 }
914}
915
916static void qdio_handle_activate_check(struct ccw_device *cdev,
917 unsigned long intparm, int cstat, int dstat)
918{
919 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
920 struct qdio_q *q;
779e6e1c 921
22f99347
JG
922 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
923 DBF_ERROR("intp :%lx", intparm);
924 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
779e6e1c
JG
925
926 if (irq_ptr->nr_input_qs) {
927 q = irq_ptr->input_qs[0];
928 } else if (irq_ptr->nr_output_qs) {
929 q = irq_ptr->output_qs[0];
930 } else {
931 dump_stack();
932 goto no_handler;
933 }
934 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
935 0, -1, -1, irq_ptr->int_parm);
936no_handler:
937 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
938}
939
4c575423
JG
940static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
941 int dstat)
779e6e1c
JG
942{
943 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
944
4c575423 945 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
779e6e1c 946
4c575423 947 if (cstat)
779e6e1c 948 goto error;
4c575423 949 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
779e6e1c 950 goto error;
4c575423
JG
951 if (!(dstat & DEV_STAT_DEV_END))
952 goto error;
953 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
954 return;
955
779e6e1c 956error:
22f99347
JG
957 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
958 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
779e6e1c 959 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
779e6e1c
JG
960}
961
962/* qdio interrupt handler */
963void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
964 struct irb *irb)
965{
966 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
967 int cstat, dstat;
779e6e1c 968
779e6e1c 969 if (!intparm || !irq_ptr) {
22f99347 970 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
779e6e1c
JG
971 return;
972 }
973
30d77c3e 974 kstat_cpu(smp_processor_id()).irqs[IOINT_QDI]++;
09a308f3
JG
975 if (irq_ptr->perf_stat_enabled)
976 irq_ptr->perf_stat.qdio_int++;
977
779e6e1c
JG
978 if (IS_ERR(irb)) {
979 switch (PTR_ERR(irb)) {
980 case -EIO:
22f99347 981 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
75cb71f3
JG
982 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
983 wake_up(&cdev->private->wait_q);
779e6e1c
JG
984 return;
985 default:
986 WARN_ON(1);
987 return;
988 }
989 }
22f99347 990 qdio_irq_check_sense(irq_ptr, irb);
779e6e1c
JG
991 cstat = irb->scsw.cmd.cstat;
992 dstat = irb->scsw.cmd.dstat;
993
994 switch (irq_ptr->state) {
995 case QDIO_IRQ_STATE_INACTIVE:
996 qdio_establish_handle_irq(cdev, cstat, dstat);
997 break;
779e6e1c
JG
998 case QDIO_IRQ_STATE_CLEANUP:
999 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1000 break;
779e6e1c
JG
1001 case QDIO_IRQ_STATE_ESTABLISHED:
1002 case QDIO_IRQ_STATE_ACTIVE:
1003 if (cstat & SCHN_STAT_PCI) {
1004 qdio_int_handler_pci(irq_ptr);
779e6e1c
JG
1005 return;
1006 }
4c575423 1007 if (cstat || dstat)
779e6e1c
JG
1008 qdio_handle_activate_check(cdev, intparm, cstat,
1009 dstat);
4c575423 1010 break;
959153d3
JG
1011 case QDIO_IRQ_STATE_STOPPED:
1012 break;
779e6e1c
JG
1013 default:
1014 WARN_ON(1);
1015 }
1016 wake_up(&cdev->private->wait_q);
1017}
1018
1019/**
1020 * qdio_get_ssqd_desc - get qdio subchannel description
1021 * @cdev: ccw device to get description for
bbd50e17 1022 * @data: where to store the ssqd
779e6e1c 1023 *
bbd50e17
JG
1024 * Returns 0 or an error code. The results of the chsc are stored in the
1025 * specified structure.
779e6e1c 1026 */
bbd50e17
JG
1027int qdio_get_ssqd_desc(struct ccw_device *cdev,
1028 struct qdio_ssqd_desc *data)
779e6e1c 1029{
779e6e1c 1030
bbd50e17
JG
1031 if (!cdev || !cdev->private)
1032 return -EINVAL;
1033
22f99347 1034 DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
bbd50e17 1035 return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
779e6e1c
JG
1036}
1037EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1038
779e6e1c
JG
1039static void qdio_shutdown_queues(struct ccw_device *cdev)
1040{
1041 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1042 struct qdio_q *q;
1043 int i;
1044
1045 for_each_input_queue(irq_ptr, q, i)
c38f9608 1046 tasklet_kill(&q->tasklet);
779e6e1c
JG
1047
1048 for_each_output_queue(irq_ptr, q, i) {
779e6e1c 1049 del_timer(&q->u.out.timer);
c38f9608 1050 tasklet_kill(&q->tasklet);
779e6e1c
JG
1051 }
1052}
1053
1054/**
1055 * qdio_shutdown - shut down a qdio subchannel
1056 * @cdev: associated ccw device
1057 * @how: use halt or clear to shutdown
1058 */
1059int qdio_shutdown(struct ccw_device *cdev, int how)
1060{
22f99347 1061 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
779e6e1c
JG
1062 int rc;
1063 unsigned long flags;
779e6e1c 1064
779e6e1c
JG
1065 if (!irq_ptr)
1066 return -ENODEV;
1067
b4547402 1068 BUG_ON(irqs_disabled());
22f99347
JG
1069 DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
1070
779e6e1c
JG
1071 mutex_lock(&irq_ptr->setup_mutex);
1072 /*
1073 * Subchannel was already shot down. We cannot prevent being called
1074 * twice since cio may trigger a shutdown asynchronously.
1075 */
1076 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1077 mutex_unlock(&irq_ptr->setup_mutex);
1078 return 0;
1079 }
1080
c38f9608
JG
1081 /*
1082 * Indicate that the device is going down. Scheduling the queue
1083 * tasklets is forbidden from here on.
1084 */
1085 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1086
779e6e1c
JG
1087 tiqdio_remove_input_queues(irq_ptr);
1088 qdio_shutdown_queues(cdev);
1089 qdio_shutdown_debug_entries(irq_ptr, cdev);
1090
1091 /* cleanup subchannel */
1092 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1093
1094 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1095 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1096 else
1097 /* default behaviour is halt */
1098 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1099 if (rc) {
22f99347
JG
1100 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1101 DBF_ERROR("rc:%4d", rc);
779e6e1c
JG
1102 goto no_cleanup;
1103 }
1104
1105 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1106 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1107 wait_event_interruptible_timeout(cdev->private->wait_q,
1108 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1109 irq_ptr->state == QDIO_IRQ_STATE_ERR,
1110 10 * HZ);
1111 spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
1112
1113no_cleanup:
1114 qdio_shutdown_thinint(irq_ptr);
1115
1116 /* restore interrupt handler */
1117 if ((void *)cdev->handler == (void *)qdio_int_handler)
1118 cdev->handler = irq_ptr->orig_handler;
1119 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
1120
1121 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1122 mutex_unlock(&irq_ptr->setup_mutex);
779e6e1c
JG
1123 if (rc)
1124 return rc;
1125 return 0;
1126}
1127EXPORT_SYMBOL_GPL(qdio_shutdown);
1128
1129/**
1130 * qdio_free - free data structures for a qdio subchannel
1131 * @cdev: associated ccw device
1132 */
1133int qdio_free(struct ccw_device *cdev)
1134{
22f99347 1135 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
58eb27cd 1136
779e6e1c
JG
1137 if (!irq_ptr)
1138 return -ENODEV;
1139
22f99347 1140 DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
779e6e1c 1141 mutex_lock(&irq_ptr->setup_mutex);
22f99347
JG
1142
1143 if (irq_ptr->debug_area != NULL) {
1144 debug_unregister(irq_ptr->debug_area);
1145 irq_ptr->debug_area = NULL;
1146 }
779e6e1c
JG
1147 cdev->private->qdio_data = NULL;
1148 mutex_unlock(&irq_ptr->setup_mutex);
1149
1150 qdio_release_memory(irq_ptr);
1151 return 0;
1152}
1153EXPORT_SYMBOL_GPL(qdio_free);
1154
779e6e1c
JG
1155/**
1156 * qdio_allocate - allocate qdio queues and associated data
1157 * @init_data: initialization data
1158 */
1159int qdio_allocate(struct qdio_initialize *init_data)
1160{
1161 struct qdio_irq *irq_ptr;
779e6e1c 1162
22f99347 1163 DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
779e6e1c
JG
1164
1165 if ((init_data->no_input_qs && !init_data->input_handler) ||
1166 (init_data->no_output_qs && !init_data->output_handler))
1167 return -EINVAL;
1168
1169 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1170 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1171 return -EINVAL;
1172
1173 if ((!init_data->input_sbal_addr_array) ||
1174 (!init_data->output_sbal_addr_array))
1175 return -EINVAL;
1176
779e6e1c
JG
1177 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1178 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1179 if (!irq_ptr)
1180 goto out_err;
779e6e1c
JG
1181
1182 mutex_init(&irq_ptr->setup_mutex);
22f99347 1183 qdio_allocate_dbf(init_data, irq_ptr);
779e6e1c
JG
1184
1185 /*
1186 * Allocate a page for the chsc calls in qdio_establish.
1187 * Must be pre-allocated since a zfcp recovery will call
1188 * qdio_establish. In case of low memory and swap on a zfcp disk
1189 * we may not be able to allocate memory otherwise.
1190 */
1191 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1192 if (!irq_ptr->chsc_page)
1193 goto out_rel;
1194
1195 /* qdr is used in ccw1.cda which is u32 */
3b8e3004 1196 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
779e6e1c
JG
1197 if (!irq_ptr->qdr)
1198 goto out_rel;
1199 WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
1200
779e6e1c
JG
1201 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1202 init_data->no_output_qs))
1203 goto out_rel;
1204
1205 init_data->cdev->private->qdio_data = irq_ptr;
1206 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1207 return 0;
1208out_rel:
1209 qdio_release_memory(irq_ptr);
1210out_err:
1211 return -ENOMEM;
1212}
1213EXPORT_SYMBOL_GPL(qdio_allocate);
1214
1215/**
1216 * qdio_establish - establish queues on a qdio subchannel
1217 * @init_data: initialization data
1218 */
1219int qdio_establish(struct qdio_initialize *init_data)
1220{
779e6e1c
JG
1221 struct qdio_irq *irq_ptr;
1222 struct ccw_device *cdev = init_data->cdev;
1223 unsigned long saveflags;
1224 int rc;
1225
22f99347 1226 DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
58eb27cd 1227
779e6e1c
JG
1228 irq_ptr = cdev->private->qdio_data;
1229 if (!irq_ptr)
1230 return -ENODEV;
1231
1232 if (cdev->private->state != DEV_STATE_ONLINE)
1233 return -EINVAL;
1234
779e6e1c
JG
1235 mutex_lock(&irq_ptr->setup_mutex);
1236 qdio_setup_irq(init_data);
1237
1238 rc = qdio_establish_thinint(irq_ptr);
1239 if (rc) {
1240 mutex_unlock(&irq_ptr->setup_mutex);
1241 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1242 return rc;
1243 }
1244
1245 /* establish q */
1246 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1247 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1248 irq_ptr->ccw.count = irq_ptr->equeue.count;
1249 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1250
1251 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1252 ccw_device_set_options_mask(cdev, 0);
1253
1254 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1255 if (rc) {
22f99347
JG
1256 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1257 DBF_ERROR("rc:%4x", rc);
779e6e1c
JG
1258 }
1259 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1260
1261 if (rc) {
1262 mutex_unlock(&irq_ptr->setup_mutex);
1263 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1264 return rc;
1265 }
1266
1267 wait_event_interruptible_timeout(cdev->private->wait_q,
1268 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1269 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1270
1271 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1272 mutex_unlock(&irq_ptr->setup_mutex);
1273 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1274 return -EIO;
1275 }
1276
1277 qdio_setup_ssqd_info(irq_ptr);
22f99347
JG
1278 DBF_EVENT("qDmmwc:%2x", irq_ptr->ssqd_desc.mmwc);
1279 DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
779e6e1c
JG
1280
1281 /* qebsm is now setup if available, initialize buffer states */
1282 qdio_init_buf_states(irq_ptr);
1283
1284 mutex_unlock(&irq_ptr->setup_mutex);
1285 qdio_print_subchannel_info(irq_ptr, cdev);
1286 qdio_setup_debug_entries(irq_ptr, cdev);
1287 return 0;
1288}
1289EXPORT_SYMBOL_GPL(qdio_establish);
1290
1291/**
1292 * qdio_activate - activate queues on a qdio subchannel
1293 * @cdev: associated cdev
1294 */
1295int qdio_activate(struct ccw_device *cdev)
1296{
1297 struct qdio_irq *irq_ptr;
1298 int rc;
1299 unsigned long saveflags;
779e6e1c 1300
22f99347 1301 DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
58eb27cd 1302
779e6e1c
JG
1303 irq_ptr = cdev->private->qdio_data;
1304 if (!irq_ptr)
1305 return -ENODEV;
1306
1307 if (cdev->private->state != DEV_STATE_ONLINE)
1308 return -EINVAL;
1309
1310 mutex_lock(&irq_ptr->setup_mutex);
1311 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1312 rc = -EBUSY;
1313 goto out;
1314 }
1315
779e6e1c
JG
1316 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1317 irq_ptr->ccw.flags = CCW_FLAG_SLI;
1318 irq_ptr->ccw.count = irq_ptr->aqueue.count;
1319 irq_ptr->ccw.cda = 0;
1320
1321 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
1322 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1323
1324 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1325 0, DOIO_DENY_PREFETCH);
1326 if (rc) {
22f99347
JG
1327 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1328 DBF_ERROR("rc:%4x", rc);
779e6e1c
JG
1329 }
1330 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
1331
1332 if (rc)
1333 goto out;
1334
1335 if (is_thinint_irq(irq_ptr))
1336 tiqdio_add_input_queues(irq_ptr);
1337
1338 /* wait for subchannel to become active */
1339 msleep(5);
1340
1341 switch (irq_ptr->state) {
1342 case QDIO_IRQ_STATE_STOPPED:
1343 case QDIO_IRQ_STATE_ERR:
e4c14e20
JG
1344 rc = -EIO;
1345 break;
779e6e1c
JG
1346 default:
1347 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1348 rc = 0;
1349 }
1350out:
1351 mutex_unlock(&irq_ptr->setup_mutex);
1352 return rc;
1353}
1354EXPORT_SYMBOL_GPL(qdio_activate);
1355
1356static inline int buf_in_between(int bufnr, int start, int count)
1357{
1358 int end = add_buf(start, count);
1359
1360 if (end > start) {
1361 if (bufnr >= start && bufnr < end)
1362 return 1;
1363 else
1364 return 0;
1365 }
1366
1367 /* wrap-around case */
1368 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1369 (bufnr < end))
1370 return 1;
1371 else
1372 return 0;
1373}
1374
1375/**
1376 * handle_inbound - reset processed input buffers
1377 * @q: queue containing the buffers
1378 * @callflags: flags
1379 * @bufnr: first buffer to process
1380 * @count: how many buffers are emptied
1381 */
d303b6fd
JG
1382static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1383 int bufnr, int count)
779e6e1c 1384{
d303b6fd 1385 int used, diff;
779e6e1c 1386
6486cda6
JG
1387 qperf_inc(q, inbound_call);
1388
50f769df
JG
1389 if (!q->u.in.polling)
1390 goto set;
1391
1392 /* protect against stop polling setting an ACK for an emptied slsb */
1393 if (count == QDIO_MAX_BUFFERS_PER_Q) {
1394 /* overwriting everything, just delete polling status */
1395 q->u.in.polling = 0;
1396 q->u.in.ack_count = 0;
1397 goto set;
e85dea0e 1398 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
50f769df 1399 if (is_qebsm(q)) {
e85dea0e 1400 /* partial overwrite, just update ack_start */
50f769df 1401 diff = add_buf(bufnr, count);
e85dea0e 1402 diff = sub_buf(diff, q->u.in.ack_start);
50f769df
JG
1403 q->u.in.ack_count -= diff;
1404 if (q->u.in.ack_count <= 0) {
1405 q->u.in.polling = 0;
1406 q->u.in.ack_count = 0;
50f769df
JG
1407 goto set;
1408 }
e85dea0e 1409 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
50f769df
JG
1410 }
1411 else
1412 /* the only ACK will be deleted, so stop polling */
779e6e1c 1413 q->u.in.polling = 0;
50f769df 1414 }
779e6e1c 1415
50f769df 1416set:
779e6e1c 1417 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
779e6e1c
JG
1418
1419 used = atomic_add_return(count, &q->nr_buf_used) - count;
1420 BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
1421
1422 /* no need to signal as long as the adapter had free buffers */
1423 if (used)
d303b6fd 1424 return 0;
779e6e1c 1425
d303b6fd
JG
1426 if (need_siga_in(q))
1427 return qdio_siga_input(q);
1428 return 0;
779e6e1c
JG
1429}
1430
1431/**
1432 * handle_outbound - process filled outbound buffers
1433 * @q: queue containing the buffers
1434 * @callflags: flags
1435 * @bufnr: first buffer to process
1436 * @count: how many buffers are filled
1437 */
d303b6fd
JG
1438static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1439 int bufnr, int count)
779e6e1c
JG
1440{
1441 unsigned char state;
d303b6fd 1442 int used, rc = 0;
779e6e1c 1443
6486cda6 1444 qperf_inc(q, outbound_call);
779e6e1c
JG
1445
1446 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1447 used = atomic_add_return(count, &q->nr_buf_used);
1448 BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
1449
0195843b
JG
1450 if (used == QDIO_MAX_BUFFERS_PER_Q)
1451 qperf_inc(q, outbound_queue_full);
1452
6486cda6 1453 if (callflags & QDIO_FLAG_PCI_OUT) {
779e6e1c 1454 q->u.out.pci_out_enabled = 1;
6486cda6
JG
1455 qperf_inc(q, pci_request_int);
1456 }
779e6e1c
JG
1457 else
1458 q->u.out.pci_out_enabled = 0;
1459
1460 if (queue_type(q) == QDIO_IQDIO_QFMT) {
1461 if (multicast_outbound(q))
d303b6fd 1462 rc = qdio_kick_outbound_q(q);
779e6e1c 1463 else
7a0f4755
KDW
1464 if ((q->irq_ptr->ssqd_desc.mmwc > 1) &&
1465 (count > 1) &&
1466 (count <= q->irq_ptr->ssqd_desc.mmwc)) {
1467 /* exploit enhanced SIGA */
1468 q->u.out.use_enh_siga = 1;
d303b6fd 1469 rc = qdio_kick_outbound_q(q);
7a0f4755
KDW
1470 } else {
1471 /*
1472 * One siga-w per buffer required for unicast
1473 * HiperSockets.
1474 */
1475 q->u.out.use_enh_siga = 0;
d303b6fd
JG
1476 while (count--) {
1477 rc = qdio_kick_outbound_q(q);
1478 if (rc)
1479 goto out;
1480 }
7a0f4755 1481 }
779e6e1c
JG
1482 goto out;
1483 }
1484
1485 if (need_siga_sync(q)) {
1486 qdio_siga_sync_q(q);
1487 goto out;
1488 }
1489
1490 /* try to fast requeue buffers */
50f769df 1491 get_buf_state(q, prev_buf(bufnr), &state, 0);
779e6e1c 1492 if (state != SLSB_CU_OUTPUT_PRIMED)
d303b6fd 1493 rc = qdio_kick_outbound_q(q);
1d7e1500 1494 else
6486cda6 1495 qperf_inc(q, fast_requeue);
1d7e1500 1496
779e6e1c 1497out:
3d6c76ff
JG
1498 /* in case of SIGA errors we must process the error immediately */
1499 if (used >= q->u.out.scan_threshold || rc)
1500 tasklet_schedule(&q->tasklet);
1501 else
1502 /* free the SBALs in case of no further traffic */
1503 if (!timer_pending(&q->u.out.timer))
1504 mod_timer(&q->u.out.timer, jiffies + HZ);
d303b6fd 1505 return rc;
779e6e1c
JG
1506}
1507
1508/**
1509 * do_QDIO - process input or output buffers
1510 * @cdev: associated ccw_device for the qdio subchannel
1511 * @callflags: input or output and special flags from the program
1512 * @q_nr: queue number
1513 * @bufnr: buffer number
1514 * @count: how many buffers to process
1515 */
1516int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
6618241b 1517 int q_nr, unsigned int bufnr, unsigned int count)
779e6e1c
JG
1518{
1519 struct qdio_irq *irq_ptr;
779e6e1c 1520
6618241b 1521 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
779e6e1c
JG
1522 return -EINVAL;
1523
779e6e1c
JG
1524 irq_ptr = cdev->private->qdio_data;
1525 if (!irq_ptr)
1526 return -ENODEV;
1527
1d7e1500
JG
1528 DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1529 "do%02x b:%02x c:%02x", callflags, bufnr, count);
779e6e1c
JG
1530
1531 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1532 return -EBUSY;
1533
1534 if (callflags & QDIO_FLAG_SYNC_INPUT)
d303b6fd
JG
1535 return handle_inbound(irq_ptr->input_qs[q_nr],
1536 callflags, bufnr, count);
779e6e1c 1537 else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
d303b6fd
JG
1538 return handle_outbound(irq_ptr->output_qs[q_nr],
1539 callflags, bufnr, count);
1540 return -EINVAL;
779e6e1c
JG
1541}
1542EXPORT_SYMBOL_GPL(do_QDIO);
1543
d36deae7
JG
1544/**
1545 * qdio_start_irq - process input buffers
1546 * @cdev: associated ccw_device for the qdio subchannel
1547 * @nr: input queue number
1548 *
1549 * Return codes
1550 * 0 - success
1551 * 1 - irqs not started since new data is available
1552 */
1553int qdio_start_irq(struct ccw_device *cdev, int nr)
1554{
1555 struct qdio_q *q;
1556 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1557
1558 if (!irq_ptr)
1559 return -ENODEV;
1560 q = irq_ptr->input_qs[nr];
1561
1562 WARN_ON(queue_irqs_enabled(q));
1563
4f325184 1564 if (!shared_ind(q->irq_ptr->dsci))
d36deae7
JG
1565 xchg(q->irq_ptr->dsci, 0);
1566
1567 qdio_stop_polling(q);
1568 clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
1569
1570 /*
1571 * We need to check again to not lose initiative after
1572 * resetting the ACK state.
1573 */
4f325184 1574 if (!shared_ind(q->irq_ptr->dsci) && *q->irq_ptr->dsci)
d36deae7
JG
1575 goto rescan;
1576 if (!qdio_inbound_q_done(q))
1577 goto rescan;
1578 return 0;
1579
1580rescan:
1581 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1582 &q->u.in.queue_irq_state))
1583 return 0;
1584 else
1585 return 1;
1586
1587}
1588EXPORT_SYMBOL(qdio_start_irq);
1589
1590/**
1591 * qdio_get_next_buffers - process input buffers
1592 * @cdev: associated ccw_device for the qdio subchannel
1593 * @nr: input queue number
1594 * @bufnr: first filled buffer number
1595 * @error: buffers are in error state
1596 *
1597 * Return codes
1598 * < 0 - error
1599 * = 0 - no new buffers found
1600 * > 0 - number of processed buffers
1601 */
1602int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1603 int *error)
1604{
1605 struct qdio_q *q;
1606 int start, end;
1607 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1608
1609 if (!irq_ptr)
1610 return -ENODEV;
1611 q = irq_ptr->input_qs[nr];
1612 WARN_ON(queue_irqs_enabled(q));
1613
1614 qdio_sync_after_thinint(q);
1615
1616 /*
1617 * The interrupt could be caused by a PCI request. Check the
1618 * PCI capable outbound queues.
1619 */
1620 qdio_check_outbound_after_thinint(q);
1621
1622 if (!qdio_inbound_q_moved(q))
1623 return 0;
1624
1625 /* Note: upper-layer MUST stop processing immediately here ... */
1626 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1627 return -EIO;
1628
1629 start = q->first_to_kick;
1630 end = q->first_to_check;
1631 *bufnr = start;
1632 *error = q->qdio_error;
1633
1634 /* for the next time */
1635 q->first_to_kick = end;
1636 q->qdio_error = 0;
1637 return sub_buf(end, start);
1638}
1639EXPORT_SYMBOL(qdio_get_next_buffers);
1640
1641/**
1642 * qdio_stop_irq - disable interrupt processing for the device
1643 * @cdev: associated ccw_device for the qdio subchannel
1644 * @nr: input queue number
1645 *
1646 * Return codes
1647 * 0 - interrupts were already disabled
1648 * 1 - interrupts successfully disabled
1649 */
1650int qdio_stop_irq(struct ccw_device *cdev, int nr)
1651{
1652 struct qdio_q *q;
1653 struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1654
1655 if (!irq_ptr)
1656 return -ENODEV;
1657 q = irq_ptr->input_qs[nr];
1658
1659 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1660 &q->u.in.queue_irq_state))
1661 return 0;
1662 else
1663 return 1;
1664}
1665EXPORT_SYMBOL(qdio_stop_irq);
1666
779e6e1c
JG
1667static int __init init_QDIO(void)
1668{
1669 int rc;
1670
1671 rc = qdio_setup_init();
1672 if (rc)
1673 return rc;
1674 rc = tiqdio_allocate_memory();
1675 if (rc)
1676 goto out_cache;
1677 rc = qdio_debug_init();
1678 if (rc)
1679 goto out_ti;
779e6e1c
JG
1680 rc = tiqdio_register_thinints();
1681 if (rc)
6486cda6 1682 goto out_debug;
779e6e1c
JG
1683 return 0;
1684
779e6e1c
JG
1685out_debug:
1686 qdio_debug_exit();
1687out_ti:
1688 tiqdio_free_memory();
1689out_cache:
1690 qdio_setup_exit();
1691 return rc;
1692}
1693
1694static void __exit exit_QDIO(void)
1695{
1696 tiqdio_unregister_thinints();
1697 tiqdio_free_memory();
779e6e1c
JG
1698 qdio_debug_exit();
1699 qdio_setup_exit();
1700}
1701
1702module_init(init_QDIO);
1703module_exit(exit_QDIO);