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Commit | Line | Data |
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779e6e1c JG |
1 | /* |
2 | * linux/drivers/s390/cio/qdio_main.c | |
3 | * | |
4 | * Linux for s390 qdio support, buffer handling, qdio API and module support. | |
5 | * | |
6 | * Copyright 2000,2008 IBM Corp. | |
7 | * Author(s): Utz Bacher <utz.bacher@de.ibm.com> | |
8 | * Jan Glauber <jang@linux.vnet.ibm.com> | |
9 | * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com> | |
10 | */ | |
11 | #include <linux/module.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/timer.h> | |
15 | #include <linux/delay.h> | |
5a0e3ad6 | 16 | #include <linux/gfp.h> |
104ea556 | 17 | #include <linux/io.h> |
60063497 | 18 | #include <linux/atomic.h> |
779e6e1c JG |
19 | #include <asm/debug.h> |
20 | #include <asm/qdio.h> | |
21 | ||
22 | #include "cio.h" | |
23 | #include "css.h" | |
24 | #include "device.h" | |
25 | #include "qdio.h" | |
26 | #include "qdio_debug.h" | |
779e6e1c JG |
27 | |
28 | MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ | |
29 | "Jan Glauber <jang@linux.vnet.ibm.com>"); | |
30 | MODULE_DESCRIPTION("QDIO base support"); | |
31 | MODULE_LICENSE("GPL"); | |
32 | ||
958c0ba4 JG |
33 | static inline int do_siga_sync(unsigned long schid, |
34 | unsigned int out_mask, unsigned int in_mask, | |
35 | unsigned int fc) | |
779e6e1c | 36 | { |
958c0ba4 JG |
37 | register unsigned long __fc asm ("0") = fc; |
38 | register unsigned long __schid asm ("1") = schid; | |
779e6e1c JG |
39 | register unsigned long out asm ("2") = out_mask; |
40 | register unsigned long in asm ("3") = in_mask; | |
41 | int cc; | |
42 | ||
43 | asm volatile( | |
44 | " siga 0\n" | |
45 | " ipm %0\n" | |
46 | " srl %0,28\n" | |
47 | : "=d" (cc) | |
48 | : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); | |
49 | return cc; | |
50 | } | |
51 | ||
958c0ba4 JG |
52 | static inline int do_siga_input(unsigned long schid, unsigned int mask, |
53 | unsigned int fc) | |
779e6e1c | 54 | { |
958c0ba4 JG |
55 | register unsigned long __fc asm ("0") = fc; |
56 | register unsigned long __schid asm ("1") = schid; | |
779e6e1c JG |
57 | register unsigned long __mask asm ("2") = mask; |
58 | int cc; | |
59 | ||
60 | asm volatile( | |
61 | " siga 0\n" | |
62 | " ipm %0\n" | |
63 | " srl %0,28\n" | |
64 | : "=d" (cc) | |
65 | : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory"); | |
66 | return cc; | |
67 | } | |
68 | ||
69 | /** | |
70 | * do_siga_output - perform SIGA-w/wt function | |
71 | * @schid: subchannel id or in case of QEBSM the subchannel token | |
72 | * @mask: which output queues to process | |
73 | * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer | |
74 | * @fc: function code to perform | |
75 | * | |
76 | * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION. | |
77 | * Note: For IQDC unicast queues only the highest priority queue is processed. | |
78 | */ | |
79 | static inline int do_siga_output(unsigned long schid, unsigned long mask, | |
104ea556 | 80 | unsigned int *bb, unsigned int fc, |
81 | unsigned long aob) | |
779e6e1c JG |
82 | { |
83 | register unsigned long __fc asm("0") = fc; | |
84 | register unsigned long __schid asm("1") = schid; | |
85 | register unsigned long __mask asm("2") = mask; | |
104ea556 | 86 | register unsigned long __aob asm("3") = aob; |
779e6e1c JG |
87 | int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION; |
88 | ||
89 | asm volatile( | |
90 | " siga 0\n" | |
91 | "0: ipm %0\n" | |
92 | " srl %0,28\n" | |
93 | "1:\n" | |
94 | EX_TABLE(0b, 1b) | |
104ea556 | 95 | : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask), |
96 | "+d" (__aob) | |
779e6e1c JG |
97 | : : "cc", "memory"); |
98 | *bb = ((unsigned int) __fc) >> 31; | |
99 | return cc; | |
100 | } | |
101 | ||
102 | static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq) | |
103 | { | |
779e6e1c JG |
104 | /* all done or next buffer state different */ |
105 | if (ccq == 0 || ccq == 32) | |
106 | return 0; | |
25f269f1 JG |
107 | /* no buffer processed */ |
108 | if (ccq == 97) | |
779e6e1c | 109 | return 1; |
25f269f1 JG |
110 | /* not all buffers processed */ |
111 | if (ccq == 96) | |
112 | return 2; | |
779e6e1c | 113 | /* notify devices immediately */ |
22f99347 | 114 | DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); |
779e6e1c JG |
115 | return -EIO; |
116 | } | |
117 | ||
118 | /** | |
119 | * qdio_do_eqbs - extract buffer states for QEBSM | |
120 | * @q: queue to manipulate | |
121 | * @state: state of the extracted buffers | |
122 | * @start: buffer number to start at | |
123 | * @count: count of buffers to examine | |
50f769df | 124 | * @auto_ack: automatically acknowledge buffers |
779e6e1c | 125 | * |
73ac36ea | 126 | * Returns the number of successfully extracted equal buffer states. |
779e6e1c JG |
127 | * Stops processing if a state is different from the last buffers state. |
128 | */ | |
129 | static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state, | |
50f769df | 130 | int start, int count, int auto_ack) |
779e6e1c | 131 | { |
25f269f1 | 132 | int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0; |
779e6e1c | 133 | unsigned int ccq = 0; |
779e6e1c JG |
134 | |
135 | BUG_ON(!q->irq_ptr->sch_token); | |
6486cda6 | 136 | qperf_inc(q, eqbs); |
779e6e1c JG |
137 | |
138 | if (!q->is_input_q) | |
139 | nr += q->irq_ptr->nr_input_qs; | |
140 | again: | |
50f769df JG |
141 | ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count, |
142 | auto_ack); | |
779e6e1c | 143 | rc = qdio_check_ccq(q, ccq); |
25f269f1 JG |
144 | if (!rc) |
145 | return count - tmp_count; | |
22f99347 | 146 | |
779e6e1c | 147 | if (rc == 1) { |
22f99347 | 148 | DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq); |
779e6e1c JG |
149 | goto again; |
150 | } | |
151 | ||
25f269f1 JG |
152 | if (rc == 2) { |
153 | BUG_ON(tmp_count == count); | |
154 | qperf_inc(q, eqbs_partial); | |
155 | DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x", | |
156 | tmp_count); | |
157 | /* | |
158 | * Retry once, if that fails bail out and process the | |
159 | * extracted buffers before trying again. | |
160 | */ | |
161 | if (!retried++) | |
162 | goto again; | |
163 | else | |
164 | return count - tmp_count; | |
779e6e1c | 165 | } |
25f269f1 JG |
166 | |
167 | DBF_ERROR("%4x EQBS ERROR", SCH_NO(q)); | |
168 | DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); | |
169 | q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION, | |
7b3cc67d | 170 | q->nr, q->first_to_kick, count, q->irq_ptr->int_parm); |
25f269f1 | 171 | return 0; |
779e6e1c JG |
172 | } |
173 | ||
174 | /** | |
175 | * qdio_do_sqbs - set buffer states for QEBSM | |
176 | * @q: queue to manipulate | |
177 | * @state: new state of the buffers | |
178 | * @start: first buffer number to change | |
179 | * @count: how many buffers to change | |
180 | * | |
181 | * Returns the number of successfully changed buffers. | |
182 | * Does retrying until the specified count of buffer states is set or an | |
183 | * error occurs. | |
184 | */ | |
185 | static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start, | |
186 | int count) | |
187 | { | |
188 | unsigned int ccq = 0; | |
189 | int tmp_count = count, tmp_start = start; | |
190 | int nr = q->nr; | |
191 | int rc; | |
779e6e1c | 192 | |
50f769df JG |
193 | if (!count) |
194 | return 0; | |
195 | ||
779e6e1c | 196 | BUG_ON(!q->irq_ptr->sch_token); |
6486cda6 | 197 | qperf_inc(q, sqbs); |
779e6e1c JG |
198 | |
199 | if (!q->is_input_q) | |
200 | nr += q->irq_ptr->nr_input_qs; | |
201 | again: | |
202 | ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count); | |
203 | rc = qdio_check_ccq(q, ccq); | |
25f269f1 JG |
204 | if (!rc) { |
205 | WARN_ON(tmp_count); | |
206 | return count - tmp_count; | |
207 | } | |
208 | ||
209 | if (rc == 1 || rc == 2) { | |
22f99347 | 210 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); |
6486cda6 | 211 | qperf_inc(q, sqbs_partial); |
779e6e1c JG |
212 | goto again; |
213 | } | |
25f269f1 JG |
214 | |
215 | DBF_ERROR("%4x SQBS ERROR", SCH_NO(q)); | |
216 | DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); | |
217 | q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION, | |
7b3cc67d | 218 | q->nr, q->first_to_kick, count, q->irq_ptr->int_parm); |
25f269f1 | 219 | return 0; |
779e6e1c JG |
220 | } |
221 | ||
222 | /* returns number of examined buffers and their common state in *state */ | |
223 | static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr, | |
50f769df | 224 | unsigned char *state, unsigned int count, |
104ea556 | 225 | int auto_ack, int merge_pending) |
779e6e1c JG |
226 | { |
227 | unsigned char __state = 0; | |
228 | int i; | |
229 | ||
230 | BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); | |
231 | BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); | |
232 | ||
233 | if (is_qebsm(q)) | |
50f769df | 234 | return qdio_do_eqbs(q, state, bufnr, count, auto_ack); |
779e6e1c JG |
235 | |
236 | for (i = 0; i < count; i++) { | |
104ea556 | 237 | if (!__state) { |
779e6e1c | 238 | __state = q->slsb.val[bufnr]; |
104ea556 | 239 | if (merge_pending && __state == SLSB_P_OUTPUT_PENDING) |
240 | __state = SLSB_P_OUTPUT_EMPTY; | |
241 | } else if (merge_pending) { | |
242 | if ((q->slsb.val[bufnr] & __state) != __state) | |
243 | break; | |
244 | } else if (q->slsb.val[bufnr] != __state) | |
779e6e1c JG |
245 | break; |
246 | bufnr = next_buf(bufnr); | |
247 | } | |
248 | *state = __state; | |
249 | return i; | |
250 | } | |
251 | ||
60b5df2f JG |
252 | static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr, |
253 | unsigned char *state, int auto_ack) | |
779e6e1c | 254 | { |
104ea556 | 255 | return get_buf_states(q, bufnr, state, 1, auto_ack, 0); |
779e6e1c JG |
256 | } |
257 | ||
258 | /* wrap-around safe setting of slsb states, returns number of changed buffers */ | |
259 | static inline int set_buf_states(struct qdio_q *q, int bufnr, | |
260 | unsigned char state, int count) | |
261 | { | |
262 | int i; | |
263 | ||
264 | BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); | |
265 | BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); | |
266 | ||
267 | if (is_qebsm(q)) | |
268 | return qdio_do_sqbs(q, state, bufnr, count); | |
269 | ||
270 | for (i = 0; i < count; i++) { | |
271 | xchg(&q->slsb.val[bufnr], state); | |
272 | bufnr = next_buf(bufnr); | |
273 | } | |
274 | return count; | |
275 | } | |
276 | ||
277 | static inline int set_buf_state(struct qdio_q *q, int bufnr, | |
278 | unsigned char state) | |
279 | { | |
280 | return set_buf_states(q, bufnr, state, 1); | |
281 | } | |
282 | ||
283 | /* set slsb states to initial state */ | |
c4736d96 | 284 | static void qdio_init_buf_states(struct qdio_irq *irq_ptr) |
779e6e1c JG |
285 | { |
286 | struct qdio_q *q; | |
287 | int i; | |
288 | ||
289 | for_each_input_queue(irq_ptr, q, i) | |
290 | set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT, | |
291 | QDIO_MAX_BUFFERS_PER_Q); | |
292 | for_each_output_queue(irq_ptr, q, i) | |
293 | set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT, | |
294 | QDIO_MAX_BUFFERS_PER_Q); | |
295 | } | |
296 | ||
60b5df2f | 297 | static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output, |
779e6e1c JG |
298 | unsigned int input) |
299 | { | |
958c0ba4 JG |
300 | unsigned long schid = *((u32 *) &q->irq_ptr->schid); |
301 | unsigned int fc = QDIO_SIGA_SYNC; | |
779e6e1c JG |
302 | int cc; |
303 | ||
7a0b4cbc | 304 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); |
6486cda6 | 305 | qperf_inc(q, siga_sync); |
779e6e1c | 306 | |
958c0ba4 JG |
307 | if (is_qebsm(q)) { |
308 | schid = q->irq_ptr->sch_token; | |
309 | fc |= QDIO_SIGA_QEBSM_FLAG; | |
310 | } | |
311 | ||
312 | cc = do_siga_sync(schid, output, input, fc); | |
110da317 | 313 | if (unlikely(cc)) |
22f99347 | 314 | DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc); |
779e6e1c JG |
315 | return cc; |
316 | } | |
317 | ||
60b5df2f | 318 | static inline int qdio_siga_sync_q(struct qdio_q *q) |
779e6e1c JG |
319 | { |
320 | if (q->is_input_q) | |
321 | return qdio_siga_sync(q, 0, q->mask); | |
322 | else | |
323 | return qdio_siga_sync(q, q->mask, 0); | |
324 | } | |
325 | ||
104ea556 | 326 | static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit, |
327 | unsigned long aob) | |
779e6e1c | 328 | { |
958c0ba4 JG |
329 | unsigned long schid = *((u32 *) &q->irq_ptr->schid); |
330 | unsigned int fc = QDIO_SIGA_WRITE; | |
7a0b4cbc | 331 | u64 start_time = 0; |
be8d97a5 | 332 | int retries = 0, cc; |
104ea556 | 333 | unsigned long laob = 0; |
334 | ||
335 | if (q->u.out.use_cq && aob != 0) { | |
336 | fc = QDIO_SIGA_WRITEQ; | |
337 | laob = aob; | |
338 | } | |
779e6e1c | 339 | |
7a0b4cbc | 340 | if (is_qebsm(q)) { |
779e6e1c | 341 | schid = q->irq_ptr->sch_token; |
958c0ba4 | 342 | fc |= QDIO_SIGA_QEBSM_FLAG; |
779e6e1c | 343 | } |
779e6e1c | 344 | again: |
104ea556 | 345 | WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) || |
346 | (aob && fc != QDIO_SIGA_WRITEQ)); | |
347 | cc = do_siga_output(schid, q->mask, busy_bit, fc, laob); | |
7a0b4cbc JG |
348 | |
349 | /* hipersocket busy condition */ | |
110da317 | 350 | if (unlikely(*busy_bit)) { |
7a0b4cbc | 351 | WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2); |
be8d97a5 | 352 | retries++; |
58eb27cd | 353 | |
7a0b4cbc | 354 | if (!start_time) { |
3a601bfe | 355 | start_time = get_clock(); |
7a0b4cbc JG |
356 | goto again; |
357 | } | |
3a601bfe | 358 | if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE) |
779e6e1c JG |
359 | goto again; |
360 | } | |
be8d97a5 JG |
361 | if (retries) { |
362 | DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, | |
363 | "%4x cc2 BB1:%1d", SCH_NO(q), q->nr); | |
364 | DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries); | |
365 | } | |
779e6e1c JG |
366 | return cc; |
367 | } | |
368 | ||
369 | static inline int qdio_siga_input(struct qdio_q *q) | |
370 | { | |
958c0ba4 JG |
371 | unsigned long schid = *((u32 *) &q->irq_ptr->schid); |
372 | unsigned int fc = QDIO_SIGA_READ; | |
779e6e1c JG |
373 | int cc; |
374 | ||
22f99347 | 375 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); |
6486cda6 | 376 | qperf_inc(q, siga_read); |
779e6e1c | 377 | |
958c0ba4 JG |
378 | if (is_qebsm(q)) { |
379 | schid = q->irq_ptr->sch_token; | |
380 | fc |= QDIO_SIGA_QEBSM_FLAG; | |
381 | } | |
382 | ||
383 | cc = do_siga_input(schid, q->mask, fc); | |
110da317 | 384 | if (unlikely(cc)) |
22f99347 | 385 | DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc); |
779e6e1c JG |
386 | return cc; |
387 | } | |
388 | ||
90adac58 JG |
389 | #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0) |
390 | #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U) | |
391 | ||
392 | static inline void qdio_sync_queues(struct qdio_q *q) | |
779e6e1c | 393 | { |
90adac58 JG |
394 | /* PCI capable outbound queues will also be scanned so sync them too */ |
395 | if (pci_out_supported(q)) | |
396 | qdio_siga_sync_all(q); | |
397 | else | |
779e6e1c JG |
398 | qdio_siga_sync_q(q); |
399 | } | |
400 | ||
60b5df2f JG |
401 | int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, |
402 | unsigned char *state) | |
403 | { | |
90adac58 JG |
404 | if (need_siga_sync(q)) |
405 | qdio_siga_sync_q(q); | |
104ea556 | 406 | return get_buf_states(q, bufnr, state, 1, 0, 0); |
60b5df2f JG |
407 | } |
408 | ||
409 | static inline void qdio_stop_polling(struct qdio_q *q) | |
779e6e1c | 410 | { |
50f769df | 411 | if (!q->u.in.polling) |
779e6e1c | 412 | return; |
50f769df | 413 | |
779e6e1c | 414 | q->u.in.polling = 0; |
6486cda6 | 415 | qperf_inc(q, stop_polling); |
779e6e1c JG |
416 | |
417 | /* show the card that we are not polling anymore */ | |
50f769df | 418 | if (is_qebsm(q)) { |
e85dea0e | 419 | set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, |
50f769df JG |
420 | q->u.in.ack_count); |
421 | q->u.in.ack_count = 0; | |
422 | } else | |
e85dea0e | 423 | set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); |
779e6e1c JG |
424 | } |
425 | ||
d307297f JG |
426 | static inline void account_sbals(struct qdio_q *q, int count) |
427 | { | |
428 | int pos = 0; | |
429 | ||
430 | q->q_stats.nr_sbal_total += count; | |
431 | if (count == QDIO_MAX_BUFFERS_MASK) { | |
432 | q->q_stats.nr_sbals[7]++; | |
433 | return; | |
434 | } | |
435 | while (count >>= 1) | |
436 | pos++; | |
437 | q->q_stats.nr_sbals[pos]++; | |
438 | } | |
439 | ||
bffbbd2d | 440 | static void process_buffer_error(struct qdio_q *q, int count) |
779e6e1c | 441 | { |
bffbbd2d JG |
442 | unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT : |
443 | SLSB_P_OUTPUT_NOT_INIT; | |
444 | ||
7a0b4cbc | 445 | q->qdio_error |= QDIO_ERROR_SLSB_STATE; |
50f769df JG |
446 | |
447 | /* special handling for no target buffer empty */ | |
448 | if ((!q->is_input_q && | |
3ec90878 | 449 | (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) { |
6486cda6 | 450 | qperf_inc(q, target_full); |
1d7e1500 | 451 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", |
50f769df | 452 | q->first_to_check); |
2768b2de | 453 | goto set; |
50f769df JG |
454 | } |
455 | ||
22f99347 JG |
456 | DBF_ERROR("%4x BUF ERROR", SCH_NO(q)); |
457 | DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); | |
50f769df | 458 | DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count); |
22f99347 | 459 | DBF_ERROR("F14:%2x F15:%2x", |
3ec90878 JG |
460 | q->sbal[q->first_to_check]->element[14].sflags, |
461 | q->sbal[q->first_to_check]->element[15].sflags); | |
bffbbd2d | 462 | |
2768b2de | 463 | set: |
bffbbd2d JG |
464 | /* |
465 | * Interrupts may be avoided as long as the error is present | |
466 | * so change the buffer state immediately to avoid starvation. | |
467 | */ | |
468 | set_buf_states(q, q->first_to_check, state, count); | |
50f769df | 469 | } |
779e6e1c | 470 | |
50f769df JG |
471 | static inline void inbound_primed(struct qdio_q *q, int count) |
472 | { | |
473 | int new; | |
474 | ||
1d7e1500 | 475 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count); |
50f769df JG |
476 | |
477 | /* for QEBSM the ACK was already set by EQBS */ | |
478 | if (is_qebsm(q)) { | |
479 | if (!q->u.in.polling) { | |
480 | q->u.in.polling = 1; | |
481 | q->u.in.ack_count = count; | |
e85dea0e | 482 | q->u.in.ack_start = q->first_to_check; |
50f769df JG |
483 | return; |
484 | } | |
485 | ||
486 | /* delete the previous ACK's */ | |
e85dea0e | 487 | set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, |
50f769df JG |
488 | q->u.in.ack_count); |
489 | q->u.in.ack_count = count; | |
e85dea0e | 490 | q->u.in.ack_start = q->first_to_check; |
50f769df JG |
491 | return; |
492 | } | |
493 | ||
494 | /* | |
495 | * ACK the newest buffer. The ACK will be removed in qdio_stop_polling | |
496 | * or by the next inbound run. | |
497 | */ | |
498 | new = add_buf(q->first_to_check, count - 1); | |
499 | if (q->u.in.polling) { | |
500 | /* reset the previous ACK but first set the new one */ | |
501 | set_buf_state(q, new, SLSB_P_INPUT_ACK); | |
e85dea0e | 502 | set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); |
3fdf1e18 | 503 | } else { |
50f769df | 504 | q->u.in.polling = 1; |
3fdf1e18 | 505 | set_buf_state(q, new, SLSB_P_INPUT_ACK); |
50f769df JG |
506 | } |
507 | ||
e85dea0e | 508 | q->u.in.ack_start = new; |
50f769df JG |
509 | count--; |
510 | if (!count) | |
511 | return; | |
6541f7b6 JG |
512 | /* need to change ALL buffers to get more interrupts */ |
513 | set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count); | |
779e6e1c JG |
514 | } |
515 | ||
516 | static int get_inbound_buffer_frontier(struct qdio_q *q) | |
517 | { | |
518 | int count, stop; | |
6fa1098a | 519 | unsigned char state = 0; |
779e6e1c | 520 | |
a2b86019 JG |
521 | q->timestamp = get_clock_fast(); |
522 | ||
779e6e1c JG |
523 | /* |
524 | * Don't check 128 buffers, as otherwise qdio_inbound_q_moved | |
525 | * would return 0. | |
526 | */ | |
527 | count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); | |
528 | stop = add_buf(q->first_to_check, count); | |
529 | ||
779e6e1c JG |
530 | if (q->first_to_check == stop) |
531 | goto out; | |
532 | ||
36e3e721 JG |
533 | /* |
534 | * No siga sync here, as a PCI or we after a thin interrupt | |
535 | * already sync'ed the queues. | |
536 | */ | |
104ea556 | 537 | count = get_buf_states(q, q->first_to_check, &state, count, 1, 0); |
779e6e1c JG |
538 | if (!count) |
539 | goto out; | |
540 | ||
541 | switch (state) { | |
542 | case SLSB_P_INPUT_PRIMED: | |
50f769df | 543 | inbound_primed(q, count); |
779e6e1c | 544 | q->first_to_check = add_buf(q->first_to_check, count); |
8bcd9b04 | 545 | if (atomic_sub(count, &q->nr_buf_used) == 0) |
6486cda6 | 546 | qperf_inc(q, inbound_queue_full); |
d307297f JG |
547 | if (q->irq_ptr->perf_stat_enabled) |
548 | account_sbals(q, count); | |
36e3e721 | 549 | break; |
779e6e1c | 550 | case SLSB_P_INPUT_ERROR: |
bffbbd2d | 551 | process_buffer_error(q, count); |
779e6e1c JG |
552 | q->first_to_check = add_buf(q->first_to_check, count); |
553 | atomic_sub(count, &q->nr_buf_used); | |
d307297f JG |
554 | if (q->irq_ptr->perf_stat_enabled) |
555 | account_sbals_error(q, count); | |
779e6e1c JG |
556 | break; |
557 | case SLSB_CU_INPUT_EMPTY: | |
558 | case SLSB_P_INPUT_NOT_INIT: | |
559 | case SLSB_P_INPUT_ACK: | |
d307297f JG |
560 | if (q->irq_ptr->perf_stat_enabled) |
561 | q->q_stats.nr_sbal_nop++; | |
22f99347 | 562 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop"); |
779e6e1c JG |
563 | break; |
564 | default: | |
565 | BUG(); | |
566 | } | |
567 | out: | |
779e6e1c JG |
568 | return q->first_to_check; |
569 | } | |
570 | ||
60b5df2f | 571 | static int qdio_inbound_q_moved(struct qdio_q *q) |
779e6e1c JG |
572 | { |
573 | int bufnr; | |
574 | ||
575 | bufnr = get_inbound_buffer_frontier(q); | |
576 | ||
e85dea0e JG |
577 | if ((bufnr != q->last_move) || q->qdio_error) { |
578 | q->last_move = bufnr; | |
27d71602 | 579 | if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR) |
3a601bfe | 580 | q->u.in.timestamp = get_clock(); |
779e6e1c JG |
581 | return 1; |
582 | } else | |
583 | return 0; | |
584 | } | |
585 | ||
9a2c160a | 586 | static inline int qdio_inbound_q_done(struct qdio_q *q) |
779e6e1c | 587 | { |
9a1ce28a | 588 | unsigned char state = 0; |
779e6e1c JG |
589 | |
590 | if (!atomic_read(&q->nr_buf_used)) | |
591 | return 1; | |
592 | ||
90adac58 JG |
593 | if (need_siga_sync(q)) |
594 | qdio_siga_sync_q(q); | |
50f769df | 595 | get_buf_state(q, q->first_to_check, &state, 0); |
9a2c160a | 596 | |
4c52228d | 597 | if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR) |
9a2c160a | 598 | /* more work coming */ |
779e6e1c JG |
599 | return 0; |
600 | ||
9a2c160a JG |
601 | if (is_thinint_irq(q->irq_ptr)) |
602 | return 1; | |
603 | ||
604 | /* don't poll under z/VM */ | |
605 | if (MACHINE_IS_VM) | |
779e6e1c JG |
606 | return 1; |
607 | ||
608 | /* | |
609 | * At this point we know, that inbound first_to_check | |
610 | * has (probably) not moved (see qdio_inbound_processing). | |
611 | */ | |
3a601bfe | 612 | if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) { |
1d7e1500 | 613 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x", |
22f99347 | 614 | q->first_to_check); |
779e6e1c | 615 | return 1; |
9a2c160a | 616 | } else |
60b5df2f | 617 | return 0; |
60b5df2f JG |
618 | } |
619 | ||
104ea556 | 620 | static inline int contains_aobs(struct qdio_q *q) |
621 | { | |
622 | return !q->is_input_q && q->u.out.use_cq; | |
623 | } | |
624 | ||
625 | static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q, | |
626 | int i, struct qaob *aob) | |
627 | { | |
628 | int tmp; | |
629 | ||
630 | DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i, | |
631 | (unsigned long) virt_to_phys(aob)); | |
632 | DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx", | |
633 | (unsigned long) aob->res0[0]); | |
634 | DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx", | |
635 | (unsigned long) aob->res0[1]); | |
636 | DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx", | |
637 | (unsigned long) aob->res0[2]); | |
638 | DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx", | |
639 | (unsigned long) aob->res0[3]); | |
640 | DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx", | |
641 | (unsigned long) aob->res0[4]); | |
642 | DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx", | |
643 | (unsigned long) aob->res0[5]); | |
644 | DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1); | |
645 | DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2); | |
646 | DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3); | |
647 | DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc); | |
648 | DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags); | |
649 | DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs); | |
650 | DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count); | |
651 | for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) { | |
652 | DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp, | |
653 | (unsigned long) aob->sba[tmp]); | |
654 | DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp, | |
655 | (unsigned long) q->sbal[i]->element[tmp].addr); | |
656 | DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]); | |
657 | DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp, | |
658 | q->sbal[i]->element[tmp].length); | |
659 | } | |
660 | DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0); | |
661 | for (tmp = 0; tmp < 2; ++tmp) { | |
662 | DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp, | |
663 | (unsigned long) aob->res4[tmp]); | |
664 | } | |
665 | DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1); | |
666 | DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2); | |
667 | } | |
668 | ||
669 | static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count) | |
670 | { | |
671 | unsigned char state = 0; | |
672 | int j, b = start; | |
673 | ||
674 | if (!contains_aobs(q)) | |
675 | return; | |
676 | ||
677 | for (j = 0; j < count; ++j) { | |
678 | get_buf_state(q, b, &state, 0); | |
679 | if (state == SLSB_P_OUTPUT_PENDING) { | |
680 | struct qaob *aob = q->u.out.aobs[b]; | |
681 | if (aob == NULL) | |
682 | continue; | |
683 | ||
684 | BUG_ON(q->u.out.sbal_state == NULL); | |
685 | q->u.out.sbal_state[b].flags |= | |
686 | QDIO_OUTBUF_STATE_FLAG_PENDING; | |
687 | q->u.out.aobs[b] = NULL; | |
688 | } else if (state == SLSB_P_OUTPUT_EMPTY) { | |
689 | BUG_ON(q->u.out.sbal_state == NULL); | |
690 | q->u.out.sbal_state[b].aob = NULL; | |
691 | } | |
692 | b = next_buf(b); | |
693 | } | |
694 | } | |
695 | ||
696 | static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q, | |
697 | int bufnr) | |
698 | { | |
699 | unsigned long phys_aob = 0; | |
700 | ||
701 | if (!q->use_cq) | |
702 | goto out; | |
703 | ||
704 | if (!q->aobs[bufnr]) { | |
705 | struct qaob *aob = qdio_allocate_aob(); | |
706 | q->aobs[bufnr] = aob; | |
707 | } | |
708 | if (q->aobs[bufnr]) { | |
709 | BUG_ON(q->sbal_state == NULL); | |
710 | q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE; | |
711 | q->sbal_state[bufnr].aob = q->aobs[bufnr]; | |
712 | q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user; | |
713 | phys_aob = virt_to_phys(q->aobs[bufnr]); | |
714 | BUG_ON(phys_aob & 0xFF); | |
715 | } | |
716 | ||
717 | out: | |
718 | return phys_aob; | |
719 | } | |
720 | ||
60b5df2f | 721 | static void qdio_kick_handler(struct qdio_q *q) |
779e6e1c | 722 | { |
9c8a08d7 JG |
723 | int start = q->first_to_kick; |
724 | int end = q->first_to_check; | |
725 | int count; | |
779e6e1c JG |
726 | |
727 | if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) | |
728 | return; | |
729 | ||
9c8a08d7 JG |
730 | count = sub_buf(end, start); |
731 | ||
732 | if (q->is_input_q) { | |
6486cda6 | 733 | qperf_inc(q, inbound_handler); |
1d7e1500 | 734 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count); |
bd6e8a16 | 735 | } else { |
6486cda6 | 736 | qperf_inc(q, outbound_handler); |
1d7e1500 JG |
737 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", |
738 | start, count); | |
bd6e8a16 | 739 | } |
9c8a08d7 | 740 | |
104ea556 | 741 | qdio_handle_aobs(q, start, count); |
742 | ||
9c8a08d7 JG |
743 | q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count, |
744 | q->irq_ptr->int_parm); | |
779e6e1c JG |
745 | |
746 | /* for the next time */ | |
9c8a08d7 | 747 | q->first_to_kick = end; |
779e6e1c JG |
748 | q->qdio_error = 0; |
749 | } | |
750 | ||
751 | static void __qdio_inbound_processing(struct qdio_q *q) | |
752 | { | |
6486cda6 | 753 | qperf_inc(q, tasklet_inbound); |
f3eb20fa | 754 | |
779e6e1c JG |
755 | if (!qdio_inbound_q_moved(q)) |
756 | return; | |
757 | ||
9c8a08d7 | 758 | qdio_kick_handler(q); |
779e6e1c | 759 | |
6486cda6 | 760 | if (!qdio_inbound_q_done(q)) { |
779e6e1c | 761 | /* means poll time is not yet over */ |
6486cda6 | 762 | qperf_inc(q, tasklet_inbound_resched); |
f3eb20fa JG |
763 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) { |
764 | tasklet_schedule(&q->tasklet); | |
765 | return; | |
766 | } | |
6486cda6 | 767 | } |
779e6e1c JG |
768 | |
769 | qdio_stop_polling(q); | |
770 | /* | |
771 | * We need to check again to not lose initiative after | |
772 | * resetting the ACK state. | |
773 | */ | |
6486cda6 JG |
774 | if (!qdio_inbound_q_done(q)) { |
775 | qperf_inc(q, tasklet_inbound_resched2); | |
f3eb20fa JG |
776 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) |
777 | tasklet_schedule(&q->tasklet); | |
6486cda6 | 778 | } |
779e6e1c JG |
779 | } |
780 | ||
779e6e1c JG |
781 | void qdio_inbound_processing(unsigned long data) |
782 | { | |
783 | struct qdio_q *q = (struct qdio_q *)data; | |
784 | __qdio_inbound_processing(q); | |
785 | } | |
786 | ||
787 | static int get_outbound_buffer_frontier(struct qdio_q *q) | |
788 | { | |
789 | int count, stop; | |
6fa1098a | 790 | unsigned char state = 0; |
779e6e1c | 791 | |
a2b86019 JG |
792 | q->timestamp = get_clock_fast(); |
793 | ||
90adac58 JG |
794 | if (need_siga_sync(q)) |
795 | if (((queue_type(q) != QDIO_IQDIO_QFMT) && | |
796 | !pci_out_supported(q)) || | |
797 | (queue_type(q) == QDIO_IQDIO_QFMT && | |
798 | multicast_outbound(q))) | |
799 | qdio_siga_sync_q(q); | |
779e6e1c JG |
800 | |
801 | /* | |
802 | * Don't check 128 buffers, as otherwise qdio_inbound_q_moved | |
803 | * would return 0. | |
804 | */ | |
805 | count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); | |
806 | stop = add_buf(q->first_to_check, count); | |
779e6e1c | 807 | if (q->first_to_check == stop) |
104ea556 | 808 | goto out; |
779e6e1c | 809 | |
104ea556 | 810 | count = get_buf_states(q, q->first_to_check, &state, count, 0, 1); |
779e6e1c | 811 | if (!count) |
104ea556 | 812 | goto out; |
779e6e1c JG |
813 | |
814 | switch (state) { | |
104ea556 | 815 | case SLSB_P_OUTPUT_PENDING: |
816 | BUG(); | |
779e6e1c JG |
817 | case SLSB_P_OUTPUT_EMPTY: |
818 | /* the adapter got it */ | |
104ea556 | 819 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, |
820 | "out empty:%1d %02x", q->nr, count); | |
779e6e1c JG |
821 | |
822 | atomic_sub(count, &q->nr_buf_used); | |
823 | q->first_to_check = add_buf(q->first_to_check, count); | |
d307297f JG |
824 | if (q->irq_ptr->perf_stat_enabled) |
825 | account_sbals(q, count); | |
104ea556 | 826 | |
36e3e721 | 827 | break; |
779e6e1c | 828 | case SLSB_P_OUTPUT_ERROR: |
bffbbd2d | 829 | process_buffer_error(q, count); |
779e6e1c JG |
830 | q->first_to_check = add_buf(q->first_to_check, count); |
831 | atomic_sub(count, &q->nr_buf_used); | |
d307297f JG |
832 | if (q->irq_ptr->perf_stat_enabled) |
833 | account_sbals_error(q, count); | |
779e6e1c JG |
834 | break; |
835 | case SLSB_CU_OUTPUT_PRIMED: | |
836 | /* the adapter has not fetched the output yet */ | |
d307297f JG |
837 | if (q->irq_ptr->perf_stat_enabled) |
838 | q->q_stats.nr_sbal_nop++; | |
104ea556 | 839 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", |
840 | q->nr); | |
779e6e1c JG |
841 | break; |
842 | case SLSB_P_OUTPUT_NOT_INIT: | |
843 | case SLSB_P_OUTPUT_HALTED: | |
844 | break; | |
845 | default: | |
846 | BUG(); | |
847 | } | |
104ea556 | 848 | |
849 | out: | |
779e6e1c JG |
850 | return q->first_to_check; |
851 | } | |
852 | ||
853 | /* all buffers processed? */ | |
854 | static inline int qdio_outbound_q_done(struct qdio_q *q) | |
855 | { | |
856 | return atomic_read(&q->nr_buf_used) == 0; | |
857 | } | |
858 | ||
859 | static inline int qdio_outbound_q_moved(struct qdio_q *q) | |
860 | { | |
861 | int bufnr; | |
862 | ||
863 | bufnr = get_outbound_buffer_frontier(q); | |
864 | ||
e85dea0e JG |
865 | if ((bufnr != q->last_move) || q->qdio_error) { |
866 | q->last_move = bufnr; | |
22f99347 | 867 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr); |
779e6e1c JG |
868 | return 1; |
869 | } else | |
870 | return 0; | |
871 | } | |
872 | ||
104ea556 | 873 | static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob) |
779e6e1c | 874 | { |
be8d97a5 | 875 | int retries = 0, cc; |
7a0b4cbc | 876 | unsigned int busy_bit; |
779e6e1c JG |
877 | |
878 | if (!need_siga_out(q)) | |
d303b6fd | 879 | return 0; |
779e6e1c | 880 | |
7a0b4cbc | 881 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); |
be8d97a5 | 882 | retry: |
6486cda6 | 883 | qperf_inc(q, siga_write); |
7a0b4cbc | 884 | |
104ea556 | 885 | cc = qdio_siga_output(q, &busy_bit, aob); |
7a0b4cbc | 886 | switch (cc) { |
779e6e1c | 887 | case 0: |
779e6e1c | 888 | break; |
7a0b4cbc JG |
889 | case 2: |
890 | if (busy_bit) { | |
be8d97a5 JG |
891 | while (++retries < QDIO_BUSY_BIT_RETRIES) { |
892 | mdelay(QDIO_BUSY_BIT_RETRY_DELAY); | |
893 | goto retry; | |
894 | } | |
895 | DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr); | |
d303b6fd JG |
896 | cc |= QDIO_ERROR_SIGA_BUSY; |
897 | } else | |
898 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr); | |
7a0b4cbc JG |
899 | break; |
900 | case 1: | |
901 | case 3: | |
902 | DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc); | |
7a0b4cbc | 903 | break; |
779e6e1c | 904 | } |
be8d97a5 JG |
905 | if (retries) { |
906 | DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr); | |
907 | DBF_ERROR("count:%u", retries); | |
908 | } | |
d303b6fd | 909 | return cc; |
779e6e1c JG |
910 | } |
911 | ||
779e6e1c JG |
912 | static void __qdio_outbound_processing(struct qdio_q *q) |
913 | { | |
6486cda6 | 914 | qperf_inc(q, tasklet_outbound); |
779e6e1c JG |
915 | BUG_ON(atomic_read(&q->nr_buf_used) < 0); |
916 | ||
917 | if (qdio_outbound_q_moved(q)) | |
9c8a08d7 | 918 | qdio_kick_handler(q); |
779e6e1c | 919 | |
c38f9608 | 920 | if (queue_type(q) == QDIO_ZFCP_QFMT) |
779e6e1c | 921 | if (!pci_out_supported(q) && !qdio_outbound_q_done(q)) |
c38f9608 | 922 | goto sched; |
779e6e1c | 923 | |
779e6e1c JG |
924 | if (q->u.out.pci_out_enabled) |
925 | return; | |
926 | ||
927 | /* | |
928 | * Now we know that queue type is either qeth without pci enabled | |
25f269f1 JG |
929 | * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY |
930 | * is noticed and outbound_handler is called after some time. | |
779e6e1c JG |
931 | */ |
932 | if (qdio_outbound_q_done(q)) | |
933 | del_timer(&q->u.out.timer); | |
6486cda6 JG |
934 | else |
935 | if (!timer_pending(&q->u.out.timer)) | |
779e6e1c | 936 | mod_timer(&q->u.out.timer, jiffies + 10 * HZ); |
c38f9608 JG |
937 | return; |
938 | ||
939 | sched: | |
940 | if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) | |
941 | return; | |
942 | tasklet_schedule(&q->tasklet); | |
779e6e1c JG |
943 | } |
944 | ||
945 | /* outbound tasklet */ | |
946 | void qdio_outbound_processing(unsigned long data) | |
947 | { | |
948 | struct qdio_q *q = (struct qdio_q *)data; | |
949 | __qdio_outbound_processing(q); | |
950 | } | |
951 | ||
952 | void qdio_outbound_timer(unsigned long data) | |
953 | { | |
954 | struct qdio_q *q = (struct qdio_q *)data; | |
c38f9608 JG |
955 | |
956 | if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) | |
957 | return; | |
779e6e1c JG |
958 | tasklet_schedule(&q->tasklet); |
959 | } | |
960 | ||
60b5df2f | 961 | static inline void qdio_check_outbound_after_thinint(struct qdio_q *q) |
779e6e1c JG |
962 | { |
963 | struct qdio_q *out; | |
964 | int i; | |
965 | ||
966 | if (!pci_out_supported(q)) | |
967 | return; | |
968 | ||
969 | for_each_output_queue(q->irq_ptr, out, i) | |
970 | if (!qdio_outbound_q_done(out)) | |
971 | tasklet_schedule(&out->tasklet); | |
972 | } | |
973 | ||
60b5df2f JG |
974 | static void __tiqdio_inbound_processing(struct qdio_q *q) |
975 | { | |
6486cda6 | 976 | qperf_inc(q, tasklet_inbound); |
90adac58 JG |
977 | if (need_siga_sync(q) && need_siga_sync_after_ai(q)) |
978 | qdio_sync_queues(q); | |
60b5df2f JG |
979 | |
980 | /* | |
981 | * The interrupt could be caused by a PCI request. Check the | |
982 | * PCI capable outbound queues. | |
983 | */ | |
984 | qdio_check_outbound_after_thinint(q); | |
985 | ||
986 | if (!qdio_inbound_q_moved(q)) | |
987 | return; | |
988 | ||
989 | qdio_kick_handler(q); | |
990 | ||
9a2c160a | 991 | if (!qdio_inbound_q_done(q)) { |
6486cda6 | 992 | qperf_inc(q, tasklet_inbound_resched); |
e2910bcf | 993 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) { |
60b5df2f | 994 | tasklet_schedule(&q->tasklet); |
e2910bcf JG |
995 | return; |
996 | } | |
60b5df2f JG |
997 | } |
998 | ||
999 | qdio_stop_polling(q); | |
1000 | /* | |
1001 | * We need to check again to not lose initiative after | |
1002 | * resetting the ACK state. | |
1003 | */ | |
9a2c160a | 1004 | if (!qdio_inbound_q_done(q)) { |
6486cda6 | 1005 | qperf_inc(q, tasklet_inbound_resched2); |
60b5df2f JG |
1006 | if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) |
1007 | tasklet_schedule(&q->tasklet); | |
1008 | } | |
1009 | } | |
1010 | ||
1011 | void tiqdio_inbound_processing(unsigned long data) | |
1012 | { | |
1013 | struct qdio_q *q = (struct qdio_q *)data; | |
1014 | __tiqdio_inbound_processing(q); | |
1015 | } | |
1016 | ||
779e6e1c JG |
1017 | static inline void qdio_set_state(struct qdio_irq *irq_ptr, |
1018 | enum qdio_irq_states state) | |
1019 | { | |
22f99347 | 1020 | DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state); |
779e6e1c JG |
1021 | |
1022 | irq_ptr->state = state; | |
1023 | mb(); | |
1024 | } | |
1025 | ||
22f99347 | 1026 | static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb) |
779e6e1c | 1027 | { |
779e6e1c | 1028 | if (irb->esw.esw0.erw.cons) { |
22f99347 JG |
1029 | DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no); |
1030 | DBF_ERROR_HEX(irb, 64); | |
1031 | DBF_ERROR_HEX(irb->ecw, 64); | |
779e6e1c JG |
1032 | } |
1033 | } | |
1034 | ||
1035 | /* PCI interrupt handler */ | |
1036 | static void qdio_int_handler_pci(struct qdio_irq *irq_ptr) | |
1037 | { | |
1038 | int i; | |
1039 | struct qdio_q *q; | |
1040 | ||
c38f9608 JG |
1041 | if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) |
1042 | return; | |
1043 | ||
d36deae7 JG |
1044 | for_each_input_queue(irq_ptr, q, i) { |
1045 | if (q->u.in.queue_start_poll) { | |
1046 | /* skip if polling is enabled or already in work */ | |
1047 | if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, | |
1048 | &q->u.in.queue_irq_state)) { | |
1049 | qperf_inc(q, int_discarded); | |
1050 | continue; | |
1051 | } | |
1052 | q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr, | |
1053 | q->irq_ptr->int_parm); | |
104ea556 | 1054 | } else { |
d36deae7 | 1055 | tasklet_schedule(&q->tasklet); |
104ea556 | 1056 | } |
d36deae7 | 1057 | } |
779e6e1c | 1058 | |
90adac58 | 1059 | if (!pci_out_supported(q)) |
779e6e1c JG |
1060 | return; |
1061 | ||
1062 | for_each_output_queue(irq_ptr, q, i) { | |
1063 | if (qdio_outbound_q_done(q)) | |
1064 | continue; | |
90adac58 | 1065 | if (need_siga_sync(q) && need_siga_sync_out_after_pci(q)) |
779e6e1c | 1066 | qdio_siga_sync_q(q); |
779e6e1c JG |
1067 | tasklet_schedule(&q->tasklet); |
1068 | } | |
1069 | } | |
1070 | ||
1071 | static void qdio_handle_activate_check(struct ccw_device *cdev, | |
1072 | unsigned long intparm, int cstat, int dstat) | |
1073 | { | |
1074 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1075 | struct qdio_q *q; | |
dfe5bb50 | 1076 | int count; |
779e6e1c | 1077 | |
22f99347 JG |
1078 | DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no); |
1079 | DBF_ERROR("intp :%lx", intparm); | |
1080 | DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); | |
779e6e1c JG |
1081 | |
1082 | if (irq_ptr->nr_input_qs) { | |
1083 | q = irq_ptr->input_qs[0]; | |
1084 | } else if (irq_ptr->nr_output_qs) { | |
1085 | q = irq_ptr->output_qs[0]; | |
1086 | } else { | |
1087 | dump_stack(); | |
1088 | goto no_handler; | |
1089 | } | |
dfe5bb50 SS |
1090 | |
1091 | count = sub_buf(q->first_to_check, q->first_to_kick); | |
779e6e1c | 1092 | q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION, |
dfe5bb50 | 1093 | q->nr, q->first_to_kick, count, irq_ptr->int_parm); |
779e6e1c JG |
1094 | no_handler: |
1095 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); | |
1096 | } | |
1097 | ||
4c575423 JG |
1098 | static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, |
1099 | int dstat) | |
779e6e1c JG |
1100 | { |
1101 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1102 | ||
4c575423 | 1103 | DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq"); |
779e6e1c | 1104 | |
4c575423 | 1105 | if (cstat) |
779e6e1c | 1106 | goto error; |
4c575423 | 1107 | if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END)) |
779e6e1c | 1108 | goto error; |
4c575423 JG |
1109 | if (!(dstat & DEV_STAT_DEV_END)) |
1110 | goto error; | |
1111 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED); | |
1112 | return; | |
1113 | ||
779e6e1c | 1114 | error: |
22f99347 JG |
1115 | DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no); |
1116 | DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); | |
779e6e1c | 1117 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); |
779e6e1c JG |
1118 | } |
1119 | ||
1120 | /* qdio interrupt handler */ | |
1121 | void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, | |
1122 | struct irb *irb) | |
1123 | { | |
1124 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1125 | int cstat, dstat; | |
779e6e1c | 1126 | |
779e6e1c | 1127 | if (!intparm || !irq_ptr) { |
22f99347 | 1128 | DBF_ERROR("qint:%4x", cdev->private->schid.sch_no); |
779e6e1c JG |
1129 | return; |
1130 | } | |
1131 | ||
09a308f3 JG |
1132 | if (irq_ptr->perf_stat_enabled) |
1133 | irq_ptr->perf_stat.qdio_int++; | |
1134 | ||
779e6e1c JG |
1135 | if (IS_ERR(irb)) { |
1136 | switch (PTR_ERR(irb)) { | |
1137 | case -EIO: | |
22f99347 | 1138 | DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no); |
75cb71f3 JG |
1139 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); |
1140 | wake_up(&cdev->private->wait_q); | |
779e6e1c JG |
1141 | return; |
1142 | default: | |
1143 | WARN_ON(1); | |
1144 | return; | |
1145 | } | |
1146 | } | |
22f99347 | 1147 | qdio_irq_check_sense(irq_ptr, irb); |
779e6e1c JG |
1148 | cstat = irb->scsw.cmd.cstat; |
1149 | dstat = irb->scsw.cmd.dstat; | |
1150 | ||
1151 | switch (irq_ptr->state) { | |
1152 | case QDIO_IRQ_STATE_INACTIVE: | |
1153 | qdio_establish_handle_irq(cdev, cstat, dstat); | |
1154 | break; | |
779e6e1c JG |
1155 | case QDIO_IRQ_STATE_CLEANUP: |
1156 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); | |
1157 | break; | |
779e6e1c JG |
1158 | case QDIO_IRQ_STATE_ESTABLISHED: |
1159 | case QDIO_IRQ_STATE_ACTIVE: | |
1160 | if (cstat & SCHN_STAT_PCI) { | |
1161 | qdio_int_handler_pci(irq_ptr); | |
779e6e1c JG |
1162 | return; |
1163 | } | |
4c575423 | 1164 | if (cstat || dstat) |
779e6e1c JG |
1165 | qdio_handle_activate_check(cdev, intparm, cstat, |
1166 | dstat); | |
4c575423 | 1167 | break; |
959153d3 JG |
1168 | case QDIO_IRQ_STATE_STOPPED: |
1169 | break; | |
779e6e1c JG |
1170 | default: |
1171 | WARN_ON(1); | |
1172 | } | |
1173 | wake_up(&cdev->private->wait_q); | |
1174 | } | |
1175 | ||
1176 | /** | |
1177 | * qdio_get_ssqd_desc - get qdio subchannel description | |
1178 | * @cdev: ccw device to get description for | |
bbd50e17 | 1179 | * @data: where to store the ssqd |
779e6e1c | 1180 | * |
bbd50e17 JG |
1181 | * Returns 0 or an error code. The results of the chsc are stored in the |
1182 | * specified structure. | |
779e6e1c | 1183 | */ |
bbd50e17 JG |
1184 | int qdio_get_ssqd_desc(struct ccw_device *cdev, |
1185 | struct qdio_ssqd_desc *data) | |
779e6e1c | 1186 | { |
779e6e1c | 1187 | |
bbd50e17 JG |
1188 | if (!cdev || !cdev->private) |
1189 | return -EINVAL; | |
1190 | ||
22f99347 | 1191 | DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no); |
bbd50e17 | 1192 | return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data); |
779e6e1c JG |
1193 | } |
1194 | EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); | |
1195 | ||
779e6e1c JG |
1196 | static void qdio_shutdown_queues(struct ccw_device *cdev) |
1197 | { | |
1198 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1199 | struct qdio_q *q; | |
1200 | int i; | |
1201 | ||
1202 | for_each_input_queue(irq_ptr, q, i) | |
c38f9608 | 1203 | tasklet_kill(&q->tasklet); |
779e6e1c JG |
1204 | |
1205 | for_each_output_queue(irq_ptr, q, i) { | |
779e6e1c | 1206 | del_timer(&q->u.out.timer); |
c38f9608 | 1207 | tasklet_kill(&q->tasklet); |
779e6e1c JG |
1208 | } |
1209 | } | |
1210 | ||
1211 | /** | |
1212 | * qdio_shutdown - shut down a qdio subchannel | |
1213 | * @cdev: associated ccw device | |
1214 | * @how: use halt or clear to shutdown | |
1215 | */ | |
1216 | int qdio_shutdown(struct ccw_device *cdev, int how) | |
1217 | { | |
22f99347 | 1218 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; |
779e6e1c JG |
1219 | int rc; |
1220 | unsigned long flags; | |
779e6e1c | 1221 | |
779e6e1c JG |
1222 | if (!irq_ptr) |
1223 | return -ENODEV; | |
1224 | ||
b4547402 | 1225 | BUG_ON(irqs_disabled()); |
22f99347 JG |
1226 | DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no); |
1227 | ||
779e6e1c JG |
1228 | mutex_lock(&irq_ptr->setup_mutex); |
1229 | /* | |
1230 | * Subchannel was already shot down. We cannot prevent being called | |
1231 | * twice since cio may trigger a shutdown asynchronously. | |
1232 | */ | |
1233 | if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { | |
1234 | mutex_unlock(&irq_ptr->setup_mutex); | |
1235 | return 0; | |
1236 | } | |
1237 | ||
c38f9608 JG |
1238 | /* |
1239 | * Indicate that the device is going down. Scheduling the queue | |
1240 | * tasklets is forbidden from here on. | |
1241 | */ | |
1242 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); | |
1243 | ||
779e6e1c JG |
1244 | tiqdio_remove_input_queues(irq_ptr); |
1245 | qdio_shutdown_queues(cdev); | |
1246 | qdio_shutdown_debug_entries(irq_ptr, cdev); | |
1247 | ||
1248 | /* cleanup subchannel */ | |
1249 | spin_lock_irqsave(get_ccwdev_lock(cdev), flags); | |
1250 | ||
1251 | if (how & QDIO_FLAG_CLEANUP_USING_CLEAR) | |
1252 | rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP); | |
1253 | else | |
1254 | /* default behaviour is halt */ | |
1255 | rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP); | |
1256 | if (rc) { | |
22f99347 JG |
1257 | DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no); |
1258 | DBF_ERROR("rc:%4d", rc); | |
779e6e1c JG |
1259 | goto no_cleanup; |
1260 | } | |
1261 | ||
1262 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP); | |
1263 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); | |
1264 | wait_event_interruptible_timeout(cdev->private->wait_q, | |
1265 | irq_ptr->state == QDIO_IRQ_STATE_INACTIVE || | |
1266 | irq_ptr->state == QDIO_IRQ_STATE_ERR, | |
1267 | 10 * HZ); | |
1268 | spin_lock_irqsave(get_ccwdev_lock(cdev), flags); | |
1269 | ||
1270 | no_cleanup: | |
1271 | qdio_shutdown_thinint(irq_ptr); | |
1272 | ||
1273 | /* restore interrupt handler */ | |
1274 | if ((void *)cdev->handler == (void *)qdio_int_handler) | |
1275 | cdev->handler = irq_ptr->orig_handler; | |
1276 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); | |
1277 | ||
1278 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); | |
1279 | mutex_unlock(&irq_ptr->setup_mutex); | |
779e6e1c JG |
1280 | if (rc) |
1281 | return rc; | |
1282 | return 0; | |
1283 | } | |
1284 | EXPORT_SYMBOL_GPL(qdio_shutdown); | |
1285 | ||
1286 | /** | |
1287 | * qdio_free - free data structures for a qdio subchannel | |
1288 | * @cdev: associated ccw device | |
1289 | */ | |
1290 | int qdio_free(struct ccw_device *cdev) | |
1291 | { | |
22f99347 | 1292 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; |
58eb27cd | 1293 | |
779e6e1c JG |
1294 | if (!irq_ptr) |
1295 | return -ENODEV; | |
1296 | ||
22f99347 | 1297 | DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no); |
779e6e1c | 1298 | mutex_lock(&irq_ptr->setup_mutex); |
22f99347 JG |
1299 | |
1300 | if (irq_ptr->debug_area != NULL) { | |
1301 | debug_unregister(irq_ptr->debug_area); | |
1302 | irq_ptr->debug_area = NULL; | |
1303 | } | |
779e6e1c JG |
1304 | cdev->private->qdio_data = NULL; |
1305 | mutex_unlock(&irq_ptr->setup_mutex); | |
1306 | ||
1307 | qdio_release_memory(irq_ptr); | |
1308 | return 0; | |
1309 | } | |
1310 | EXPORT_SYMBOL_GPL(qdio_free); | |
1311 | ||
779e6e1c JG |
1312 | /** |
1313 | * qdio_allocate - allocate qdio queues and associated data | |
1314 | * @init_data: initialization data | |
1315 | */ | |
1316 | int qdio_allocate(struct qdio_initialize *init_data) | |
1317 | { | |
1318 | struct qdio_irq *irq_ptr; | |
779e6e1c | 1319 | |
22f99347 | 1320 | DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no); |
779e6e1c JG |
1321 | |
1322 | if ((init_data->no_input_qs && !init_data->input_handler) || | |
1323 | (init_data->no_output_qs && !init_data->output_handler)) | |
1324 | return -EINVAL; | |
1325 | ||
1326 | if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) || | |
1327 | (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ)) | |
1328 | return -EINVAL; | |
1329 | ||
1330 | if ((!init_data->input_sbal_addr_array) || | |
1331 | (!init_data->output_sbal_addr_array)) | |
1332 | return -EINVAL; | |
1333 | ||
779e6e1c JG |
1334 | /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */ |
1335 | irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA); | |
1336 | if (!irq_ptr) | |
1337 | goto out_err; | |
779e6e1c JG |
1338 | |
1339 | mutex_init(&irq_ptr->setup_mutex); | |
22f99347 | 1340 | qdio_allocate_dbf(init_data, irq_ptr); |
779e6e1c JG |
1341 | |
1342 | /* | |
1343 | * Allocate a page for the chsc calls in qdio_establish. | |
1344 | * Must be pre-allocated since a zfcp recovery will call | |
1345 | * qdio_establish. In case of low memory and swap on a zfcp disk | |
1346 | * we may not be able to allocate memory otherwise. | |
1347 | */ | |
1348 | irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL); | |
1349 | if (!irq_ptr->chsc_page) | |
1350 | goto out_rel; | |
1351 | ||
1352 | /* qdr is used in ccw1.cda which is u32 */ | |
3b8e3004 | 1353 | irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA); |
779e6e1c JG |
1354 | if (!irq_ptr->qdr) |
1355 | goto out_rel; | |
1356 | WARN_ON((unsigned long)irq_ptr->qdr & 0xfff); | |
1357 | ||
779e6e1c JG |
1358 | if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs, |
1359 | init_data->no_output_qs)) | |
1360 | goto out_rel; | |
1361 | ||
1362 | init_data->cdev->private->qdio_data = irq_ptr; | |
1363 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); | |
1364 | return 0; | |
1365 | out_rel: | |
1366 | qdio_release_memory(irq_ptr); | |
1367 | out_err: | |
1368 | return -ENOMEM; | |
1369 | } | |
1370 | EXPORT_SYMBOL_GPL(qdio_allocate); | |
1371 | ||
104ea556 | 1372 | static void qdio_detect_hsicq(struct qdio_irq *irq_ptr) |
1373 | { | |
1374 | struct qdio_q *q = irq_ptr->input_qs[0]; | |
1375 | int i, use_cq = 0; | |
1376 | ||
1377 | if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT) | |
1378 | use_cq = 1; | |
1379 | ||
1380 | for_each_output_queue(irq_ptr, q, i) { | |
1381 | if (use_cq) { | |
1382 | if (qdio_enable_async_operation(&q->u.out) < 0) { | |
1383 | use_cq = 0; | |
1384 | continue; | |
1385 | } | |
1386 | } else | |
1387 | qdio_disable_async_operation(&q->u.out); | |
1388 | } | |
1389 | DBF_EVENT("use_cq:%d", use_cq); | |
1390 | } | |
1391 | ||
779e6e1c JG |
1392 | /** |
1393 | * qdio_establish - establish queues on a qdio subchannel | |
1394 | * @init_data: initialization data | |
1395 | */ | |
1396 | int qdio_establish(struct qdio_initialize *init_data) | |
1397 | { | |
779e6e1c JG |
1398 | struct qdio_irq *irq_ptr; |
1399 | struct ccw_device *cdev = init_data->cdev; | |
1400 | unsigned long saveflags; | |
1401 | int rc; | |
1402 | ||
22f99347 | 1403 | DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no); |
58eb27cd | 1404 | |
779e6e1c JG |
1405 | irq_ptr = cdev->private->qdio_data; |
1406 | if (!irq_ptr) | |
1407 | return -ENODEV; | |
1408 | ||
1409 | if (cdev->private->state != DEV_STATE_ONLINE) | |
1410 | return -EINVAL; | |
1411 | ||
779e6e1c JG |
1412 | mutex_lock(&irq_ptr->setup_mutex); |
1413 | qdio_setup_irq(init_data); | |
1414 | ||
1415 | rc = qdio_establish_thinint(irq_ptr); | |
1416 | if (rc) { | |
1417 | mutex_unlock(&irq_ptr->setup_mutex); | |
1418 | qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1419 | return rc; | |
1420 | } | |
1421 | ||
1422 | /* establish q */ | |
1423 | irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd; | |
1424 | irq_ptr->ccw.flags = CCW_FLAG_SLI; | |
1425 | irq_ptr->ccw.count = irq_ptr->equeue.count; | |
1426 | irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr); | |
1427 | ||
1428 | spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); | |
1429 | ccw_device_set_options_mask(cdev, 0); | |
1430 | ||
1431 | rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0); | |
1432 | if (rc) { | |
22f99347 JG |
1433 | DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no); |
1434 | DBF_ERROR("rc:%4x", rc); | |
779e6e1c JG |
1435 | } |
1436 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); | |
1437 | ||
1438 | if (rc) { | |
1439 | mutex_unlock(&irq_ptr->setup_mutex); | |
1440 | qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1441 | return rc; | |
1442 | } | |
1443 | ||
1444 | wait_event_interruptible_timeout(cdev->private->wait_q, | |
1445 | irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED || | |
1446 | irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ); | |
1447 | ||
1448 | if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) { | |
1449 | mutex_unlock(&irq_ptr->setup_mutex); | |
1450 | qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); | |
1451 | return -EIO; | |
1452 | } | |
1453 | ||
1454 | qdio_setup_ssqd_info(irq_ptr); | |
22f99347 | 1455 | DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac); |
779e6e1c | 1456 | |
104ea556 | 1457 | qdio_detect_hsicq(irq_ptr); |
1458 | ||
779e6e1c JG |
1459 | /* qebsm is now setup if available, initialize buffer states */ |
1460 | qdio_init_buf_states(irq_ptr); | |
1461 | ||
1462 | mutex_unlock(&irq_ptr->setup_mutex); | |
1463 | qdio_print_subchannel_info(irq_ptr, cdev); | |
1464 | qdio_setup_debug_entries(irq_ptr, cdev); | |
1465 | return 0; | |
1466 | } | |
1467 | EXPORT_SYMBOL_GPL(qdio_establish); | |
1468 | ||
1469 | /** | |
1470 | * qdio_activate - activate queues on a qdio subchannel | |
1471 | * @cdev: associated cdev | |
1472 | */ | |
1473 | int qdio_activate(struct ccw_device *cdev) | |
1474 | { | |
1475 | struct qdio_irq *irq_ptr; | |
1476 | int rc; | |
1477 | unsigned long saveflags; | |
779e6e1c | 1478 | |
22f99347 | 1479 | DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no); |
58eb27cd | 1480 | |
779e6e1c JG |
1481 | irq_ptr = cdev->private->qdio_data; |
1482 | if (!irq_ptr) | |
1483 | return -ENODEV; | |
1484 | ||
1485 | if (cdev->private->state != DEV_STATE_ONLINE) | |
1486 | return -EINVAL; | |
1487 | ||
1488 | mutex_lock(&irq_ptr->setup_mutex); | |
1489 | if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { | |
1490 | rc = -EBUSY; | |
1491 | goto out; | |
1492 | } | |
1493 | ||
779e6e1c JG |
1494 | irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd; |
1495 | irq_ptr->ccw.flags = CCW_FLAG_SLI; | |
1496 | irq_ptr->ccw.count = irq_ptr->aqueue.count; | |
1497 | irq_ptr->ccw.cda = 0; | |
1498 | ||
1499 | spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); | |
1500 | ccw_device_set_options(cdev, CCWDEV_REPORT_ALL); | |
1501 | ||
1502 | rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE, | |
1503 | 0, DOIO_DENY_PREFETCH); | |
1504 | if (rc) { | |
22f99347 JG |
1505 | DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no); |
1506 | DBF_ERROR("rc:%4x", rc); | |
779e6e1c JG |
1507 | } |
1508 | spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); | |
1509 | ||
1510 | if (rc) | |
1511 | goto out; | |
1512 | ||
1513 | if (is_thinint_irq(irq_ptr)) | |
1514 | tiqdio_add_input_queues(irq_ptr); | |
1515 | ||
1516 | /* wait for subchannel to become active */ | |
1517 | msleep(5); | |
1518 | ||
1519 | switch (irq_ptr->state) { | |
1520 | case QDIO_IRQ_STATE_STOPPED: | |
1521 | case QDIO_IRQ_STATE_ERR: | |
e4c14e20 JG |
1522 | rc = -EIO; |
1523 | break; | |
779e6e1c JG |
1524 | default: |
1525 | qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE); | |
1526 | rc = 0; | |
1527 | } | |
1528 | out: | |
1529 | mutex_unlock(&irq_ptr->setup_mutex); | |
1530 | return rc; | |
1531 | } | |
1532 | EXPORT_SYMBOL_GPL(qdio_activate); | |
1533 | ||
1534 | static inline int buf_in_between(int bufnr, int start, int count) | |
1535 | { | |
1536 | int end = add_buf(start, count); | |
1537 | ||
1538 | if (end > start) { | |
1539 | if (bufnr >= start && bufnr < end) | |
1540 | return 1; | |
1541 | else | |
1542 | return 0; | |
1543 | } | |
1544 | ||
1545 | /* wrap-around case */ | |
1546 | if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) || | |
1547 | (bufnr < end)) | |
1548 | return 1; | |
1549 | else | |
1550 | return 0; | |
1551 | } | |
1552 | ||
1553 | /** | |
1554 | * handle_inbound - reset processed input buffers | |
1555 | * @q: queue containing the buffers | |
1556 | * @callflags: flags | |
1557 | * @bufnr: first buffer to process | |
1558 | * @count: how many buffers are emptied | |
1559 | */ | |
d303b6fd JG |
1560 | static int handle_inbound(struct qdio_q *q, unsigned int callflags, |
1561 | int bufnr, int count) | |
779e6e1c | 1562 | { |
d303b6fd | 1563 | int used, diff; |
779e6e1c | 1564 | |
6486cda6 JG |
1565 | qperf_inc(q, inbound_call); |
1566 | ||
50f769df JG |
1567 | if (!q->u.in.polling) |
1568 | goto set; | |
1569 | ||
1570 | /* protect against stop polling setting an ACK for an emptied slsb */ | |
1571 | if (count == QDIO_MAX_BUFFERS_PER_Q) { | |
1572 | /* overwriting everything, just delete polling status */ | |
1573 | q->u.in.polling = 0; | |
1574 | q->u.in.ack_count = 0; | |
1575 | goto set; | |
e85dea0e | 1576 | } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) { |
50f769df | 1577 | if (is_qebsm(q)) { |
e85dea0e | 1578 | /* partial overwrite, just update ack_start */ |
50f769df | 1579 | diff = add_buf(bufnr, count); |
e85dea0e | 1580 | diff = sub_buf(diff, q->u.in.ack_start); |
50f769df JG |
1581 | q->u.in.ack_count -= diff; |
1582 | if (q->u.in.ack_count <= 0) { | |
1583 | q->u.in.polling = 0; | |
1584 | q->u.in.ack_count = 0; | |
50f769df JG |
1585 | goto set; |
1586 | } | |
e85dea0e | 1587 | q->u.in.ack_start = add_buf(q->u.in.ack_start, diff); |
50f769df JG |
1588 | } |
1589 | else | |
1590 | /* the only ACK will be deleted, so stop polling */ | |
779e6e1c | 1591 | q->u.in.polling = 0; |
50f769df | 1592 | } |
779e6e1c | 1593 | |
50f769df | 1594 | set: |
779e6e1c | 1595 | count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count); |
779e6e1c JG |
1596 | |
1597 | used = atomic_add_return(count, &q->nr_buf_used) - count; | |
1598 | BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q); | |
1599 | ||
d303b6fd JG |
1600 | if (need_siga_in(q)) |
1601 | return qdio_siga_input(q); | |
9cb7284f | 1602 | |
d303b6fd | 1603 | return 0; |
779e6e1c JG |
1604 | } |
1605 | ||
1606 | /** | |
1607 | * handle_outbound - process filled outbound buffers | |
1608 | * @q: queue containing the buffers | |
1609 | * @callflags: flags | |
1610 | * @bufnr: first buffer to process | |
1611 | * @count: how many buffers are filled | |
1612 | */ | |
d303b6fd JG |
1613 | static int handle_outbound(struct qdio_q *q, unsigned int callflags, |
1614 | int bufnr, int count) | |
779e6e1c | 1615 | { |
c26001d4 | 1616 | unsigned char state = 0; |
d303b6fd | 1617 | int used, rc = 0; |
779e6e1c | 1618 | |
6486cda6 | 1619 | qperf_inc(q, outbound_call); |
779e6e1c JG |
1620 | |
1621 | count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); | |
1622 | used = atomic_add_return(count, &q->nr_buf_used); | |
1623 | BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q); | |
1624 | ||
0195843b JG |
1625 | if (used == QDIO_MAX_BUFFERS_PER_Q) |
1626 | qperf_inc(q, outbound_queue_full); | |
1627 | ||
6486cda6 | 1628 | if (callflags & QDIO_FLAG_PCI_OUT) { |
779e6e1c | 1629 | q->u.out.pci_out_enabled = 1; |
6486cda6 | 1630 | qperf_inc(q, pci_request_int); |
110da317 | 1631 | } else |
779e6e1c JG |
1632 | q->u.out.pci_out_enabled = 0; |
1633 | ||
1634 | if (queue_type(q) == QDIO_IQDIO_QFMT) { | |
104ea556 | 1635 | unsigned long phys_aob = 0; |
1636 | ||
1637 | /* One SIGA-W per buffer required for unicast HSI */ | |
110da317 JG |
1638 | WARN_ON_ONCE(count > 1 && !multicast_outbound(q)); |
1639 | ||
104ea556 | 1640 | phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr); |
1641 | ||
1642 | rc = qdio_kick_outbound_q(q, phys_aob); | |
90adac58 | 1643 | } else if (need_siga_sync(q)) { |
110da317 JG |
1644 | rc = qdio_siga_sync_q(q); |
1645 | } else { | |
1646 | /* try to fast requeue buffers */ | |
1647 | get_buf_state(q, prev_buf(bufnr), &state, 0); | |
1648 | if (state != SLSB_CU_OUTPUT_PRIMED) | |
104ea556 | 1649 | rc = qdio_kick_outbound_q(q, 0); |
779e6e1c | 1650 | else |
110da317 | 1651 | qperf_inc(q, fast_requeue); |
779e6e1c JG |
1652 | } |
1653 | ||
3d6c76ff JG |
1654 | /* in case of SIGA errors we must process the error immediately */ |
1655 | if (used >= q->u.out.scan_threshold || rc) | |
1656 | tasklet_schedule(&q->tasklet); | |
1657 | else | |
1658 | /* free the SBALs in case of no further traffic */ | |
1659 | if (!timer_pending(&q->u.out.timer)) | |
1660 | mod_timer(&q->u.out.timer, jiffies + HZ); | |
d303b6fd | 1661 | return rc; |
779e6e1c JG |
1662 | } |
1663 | ||
1664 | /** | |
1665 | * do_QDIO - process input or output buffers | |
1666 | * @cdev: associated ccw_device for the qdio subchannel | |
1667 | * @callflags: input or output and special flags from the program | |
1668 | * @q_nr: queue number | |
1669 | * @bufnr: buffer number | |
1670 | * @count: how many buffers to process | |
1671 | */ | |
1672 | int do_QDIO(struct ccw_device *cdev, unsigned int callflags, | |
6618241b | 1673 | int q_nr, unsigned int bufnr, unsigned int count) |
779e6e1c JG |
1674 | { |
1675 | struct qdio_irq *irq_ptr; | |
779e6e1c | 1676 | |
104ea556 | 1677 | |
6618241b | 1678 | if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q) |
779e6e1c JG |
1679 | return -EINVAL; |
1680 | ||
779e6e1c JG |
1681 | irq_ptr = cdev->private->qdio_data; |
1682 | if (!irq_ptr) | |
1683 | return -ENODEV; | |
1684 | ||
1d7e1500 JG |
1685 | DBF_DEV_EVENT(DBF_INFO, irq_ptr, |
1686 | "do%02x b:%02x c:%02x", callflags, bufnr, count); | |
779e6e1c JG |
1687 | |
1688 | if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE) | |
1689 | return -EBUSY; | |
9a26513e JG |
1690 | if (!count) |
1691 | return 0; | |
779e6e1c | 1692 | if (callflags & QDIO_FLAG_SYNC_INPUT) |
d303b6fd JG |
1693 | return handle_inbound(irq_ptr->input_qs[q_nr], |
1694 | callflags, bufnr, count); | |
779e6e1c | 1695 | else if (callflags & QDIO_FLAG_SYNC_OUTPUT) |
d303b6fd JG |
1696 | return handle_outbound(irq_ptr->output_qs[q_nr], |
1697 | callflags, bufnr, count); | |
1698 | return -EINVAL; | |
779e6e1c JG |
1699 | } |
1700 | EXPORT_SYMBOL_GPL(do_QDIO); | |
1701 | ||
d36deae7 JG |
1702 | /** |
1703 | * qdio_start_irq - process input buffers | |
1704 | * @cdev: associated ccw_device for the qdio subchannel | |
1705 | * @nr: input queue number | |
1706 | * | |
1707 | * Return codes | |
1708 | * 0 - success | |
1709 | * 1 - irqs not started since new data is available | |
1710 | */ | |
1711 | int qdio_start_irq(struct ccw_device *cdev, int nr) | |
1712 | { | |
1713 | struct qdio_q *q; | |
1714 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1715 | ||
1716 | if (!irq_ptr) | |
1717 | return -ENODEV; | |
1718 | q = irq_ptr->input_qs[nr]; | |
1719 | ||
1720 | WARN_ON(queue_irqs_enabled(q)); | |
1721 | ||
5f4026f8 | 1722 | clear_nonshared_ind(irq_ptr); |
d36deae7 JG |
1723 | qdio_stop_polling(q); |
1724 | clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state); | |
1725 | ||
1726 | /* | |
1727 | * We need to check again to not lose initiative after | |
1728 | * resetting the ACK state. | |
1729 | */ | |
5f4026f8 | 1730 | if (test_nonshared_ind(irq_ptr)) |
d36deae7 JG |
1731 | goto rescan; |
1732 | if (!qdio_inbound_q_done(q)) | |
1733 | goto rescan; | |
1734 | return 0; | |
1735 | ||
1736 | rescan: | |
1737 | if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, | |
1738 | &q->u.in.queue_irq_state)) | |
1739 | return 0; | |
1740 | else | |
1741 | return 1; | |
1742 | ||
1743 | } | |
1744 | EXPORT_SYMBOL(qdio_start_irq); | |
1745 | ||
1746 | /** | |
1747 | * qdio_get_next_buffers - process input buffers | |
1748 | * @cdev: associated ccw_device for the qdio subchannel | |
1749 | * @nr: input queue number | |
1750 | * @bufnr: first filled buffer number | |
1751 | * @error: buffers are in error state | |
1752 | * | |
1753 | * Return codes | |
1754 | * < 0 - error | |
1755 | * = 0 - no new buffers found | |
1756 | * > 0 - number of processed buffers | |
1757 | */ | |
1758 | int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr, | |
1759 | int *error) | |
1760 | { | |
1761 | struct qdio_q *q; | |
1762 | int start, end; | |
1763 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1764 | ||
1765 | if (!irq_ptr) | |
1766 | return -ENODEV; | |
1767 | q = irq_ptr->input_qs[nr]; | |
1768 | WARN_ON(queue_irqs_enabled(q)); | |
1769 | ||
d36deae7 | 1770 | /* |
90adac58 JG |
1771 | * Cannot rely on automatic sync after interrupt since queues may |
1772 | * also be examined without interrupt. | |
d36deae7 | 1773 | */ |
90adac58 JG |
1774 | if (need_siga_sync(q)) |
1775 | qdio_sync_queues(q); | |
1776 | ||
1777 | /* check the PCI capable outbound queues. */ | |
d36deae7 JG |
1778 | qdio_check_outbound_after_thinint(q); |
1779 | ||
1780 | if (!qdio_inbound_q_moved(q)) | |
1781 | return 0; | |
1782 | ||
1783 | /* Note: upper-layer MUST stop processing immediately here ... */ | |
1784 | if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) | |
1785 | return -EIO; | |
1786 | ||
1787 | start = q->first_to_kick; | |
1788 | end = q->first_to_check; | |
1789 | *bufnr = start; | |
1790 | *error = q->qdio_error; | |
1791 | ||
1792 | /* for the next time */ | |
1793 | q->first_to_kick = end; | |
1794 | q->qdio_error = 0; | |
1795 | return sub_buf(end, start); | |
1796 | } | |
1797 | EXPORT_SYMBOL(qdio_get_next_buffers); | |
1798 | ||
1799 | /** | |
1800 | * qdio_stop_irq - disable interrupt processing for the device | |
1801 | * @cdev: associated ccw_device for the qdio subchannel | |
1802 | * @nr: input queue number | |
1803 | * | |
1804 | * Return codes | |
1805 | * 0 - interrupts were already disabled | |
1806 | * 1 - interrupts successfully disabled | |
1807 | */ | |
1808 | int qdio_stop_irq(struct ccw_device *cdev, int nr) | |
1809 | { | |
1810 | struct qdio_q *q; | |
1811 | struct qdio_irq *irq_ptr = cdev->private->qdio_data; | |
1812 | ||
1813 | if (!irq_ptr) | |
1814 | return -ENODEV; | |
1815 | q = irq_ptr->input_qs[nr]; | |
1816 | ||
1817 | if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, | |
1818 | &q->u.in.queue_irq_state)) | |
1819 | return 0; | |
1820 | else | |
1821 | return 1; | |
1822 | } | |
1823 | EXPORT_SYMBOL(qdio_stop_irq); | |
1824 | ||
779e6e1c JG |
1825 | static int __init init_QDIO(void) |
1826 | { | |
1827 | int rc; | |
1828 | ||
aa5c8df3 | 1829 | rc = qdio_debug_init(); |
779e6e1c JG |
1830 | if (rc) |
1831 | return rc; | |
aa5c8df3 SO |
1832 | rc = qdio_setup_init(); |
1833 | if (rc) | |
1834 | goto out_debug; | |
779e6e1c JG |
1835 | rc = tiqdio_allocate_memory(); |
1836 | if (rc) | |
1837 | goto out_cache; | |
779e6e1c JG |
1838 | rc = tiqdio_register_thinints(); |
1839 | if (rc) | |
aa5c8df3 | 1840 | goto out_ti; |
779e6e1c JG |
1841 | return 0; |
1842 | ||
779e6e1c JG |
1843 | out_ti: |
1844 | tiqdio_free_memory(); | |
1845 | out_cache: | |
1846 | qdio_setup_exit(); | |
aa5c8df3 SO |
1847 | out_debug: |
1848 | qdio_debug_exit(); | |
779e6e1c JG |
1849 | return rc; |
1850 | } | |
1851 | ||
1852 | static void __exit exit_QDIO(void) | |
1853 | { | |
1854 | tiqdio_unregister_thinints(); | |
1855 | tiqdio_free_memory(); | |
779e6e1c | 1856 | qdio_setup_exit(); |
aa5c8df3 | 1857 | qdio_debug_exit(); |
779e6e1c JG |
1858 | } |
1859 | ||
1860 | module_init(init_QDIO); | |
1861 | module_exit(exit_QDIO); |