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[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core.h
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4a71df50 1/*
4a71df50
FB		 2 * Copyright IBM Corp. 2007
3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
9#ifndef __QETH_CORE_H__
10#define __QETH_CORE_H__
11
12#include <linux/if.h>
13#include <linux/if_arp.h>
4a71df50
FB		 14#include <linux/etherdevice.h>
15#include <linux/if_vlan.h>
16#include <linux/ctype.h>
17#include <linux/in6.h>
18#include <linux/bitops.h>
19#include <linux/seq_file.h>
20#include <linux/ethtool.h>
fe5c8028 21#include <linux/hashtable.h>
41aeed58 22#include <linux/ip.h>
4a71df50
FB		 23
24#include <net/ipv6.h>
25#include <net/if_inet6.h>
26#include <net/addrconf.h>
27
28#include <asm/debug.h>
29#include <asm/qdio.h>
30#include <asm/ccwdev.h>
31#include <asm/ccwgroup.h>
6bcac508 32#include <asm/sysinfo.h>
4a71df50
FB		 33
34#include "qeth_core_mpc.h"
35
36/**
37 * Debug Facility stuff
38 */
d11ba0c4
PT		 39enum qeth_dbf_names {
40 QETH_DBF_SETUP,
d11ba0c4 41 QETH_DBF_MSG,
d11ba0c4
PT		 42 QETH_DBF_CTRL,
43 QETH_DBF_INFOS /* must be last element */
44};
45
46struct qeth_dbf_info {
47 char name[DEBUG_MAX_NAME_LEN];
48 int pages;
49 int areas;
50 int len;
51 int level;
52 struct debug_view *view;
53 debug_info_t *id;
54};
55
56#define QETH_DBF_CTRL_LEN 256
4a71df50
FB		 57
58#define QETH_DBF_TEXT(name, level, text) \
d11ba0c4 59 debug_text_event(qeth_dbf[QETH_DBF_##name].id, level, text)
4a71df50
FB		 60
61#define QETH_DBF_HEX(name, level, addr, len) \
d11ba0c4
PT		 62 debug_event(qeth_dbf[QETH_DBF_##name].id, level, (void *)(addr), len)
63
64#define QETH_DBF_MESSAGE(level, text...) \
65 debug_sprintf_event(qeth_dbf[QETH_DBF_MSG].id, level, text)
66
67#define QETH_DBF_TEXT_(name, level, text...) \
8e96c51c 68 qeth_dbf_longtext(qeth_dbf[QETH_DBF_##name].id, level, text)
4a71df50 69
af039068
CO		 70#define QETH_CARD_TEXT(card, level, text) \
71 debug_text_event(card->debug, level, text)
72
73#define QETH_CARD_HEX(card, level, addr, len) \
74 debug_event(card->debug, level, (void *)(addr), len)
75
76#define QETH_CARD_MESSAGE(card, text...) \
77 debug_sprintf_event(card->debug, level, text)
78
79#define QETH_CARD_TEXT_(card, level, text...) \
80 qeth_dbf_longtext(card->debug, level, text)
81
4a71df50
FB		 82#define SENSE_COMMAND_REJECT_BYTE 0
83#define SENSE_COMMAND_REJECT_FLAG 0x80
84#define SENSE_RESETTING_EVENT_BYTE 1
85#define SENSE_RESETTING_EVENT_FLAG 0x80
86
87/*
88 * Common IO related definitions
89 */
90#define CARD_RDEV(card) card->read.ccwdev
91#define CARD_WDEV(card) card->write.ccwdev
92#define CARD_DDEV(card) card->data.ccwdev
2a0217d5
KS		 93#define CARD_BUS_ID(card) dev_name(&card->gdev->dev)
94#define CARD_RDEV_ID(card) dev_name(&card->read.ccwdev->dev)
95#define CARD_WDEV_ID(card) dev_name(&card->write.ccwdev->dev)
96#define CARD_DDEV_ID(card) dev_name(&card->data.ccwdev->dev)
97#define CHANNEL_ID(channel) dev_name(&channel->ccwdev->dev)
4a71df50
FB		 98
99/**
100 * card stuff
101 */
102struct qeth_perf_stats {
103 unsigned int bufs_rec;
104 unsigned int bufs_sent;
105
106 unsigned int skbs_sent_pack;
107 unsigned int bufs_sent_pack;
108
109 unsigned int sc_dp_p;
110 unsigned int sc_p_dp;
0da9581d
EL		 111 /* qdio_cq_handler: number of times called, time spent in */
112 __u64 cq_start_time;
113 unsigned int cq_cnt;
114 unsigned int cq_time;
4a71df50
FB		 115 /* qdio_input_handler: number of times called, time spent in */
116 __u64 inbound_start_time;
117 unsigned int inbound_cnt;
118 unsigned int inbound_time;
119 /* qeth_send_packet: number of times called, time spent in */
120 __u64 outbound_start_time;
121 unsigned int outbound_cnt;
122 unsigned int outbound_time;
123 /* qdio_output_handler: number of times called, time spent in */
124 __u64 outbound_handler_start_time;
125 unsigned int outbound_handler_cnt;
126 unsigned int outbound_handler_time;
127 /* number of calls to and time spent in do_QDIO for inbound queue */
128 __u64 inbound_do_qdio_start_time;
129 unsigned int inbound_do_qdio_cnt;
130 unsigned int inbound_do_qdio_time;
131 /* number of calls to and time spent in do_QDIO for outbound queues */
132 __u64 outbound_do_qdio_start_time;
133 unsigned int outbound_do_qdio_cnt;
134 unsigned int outbound_do_qdio_time;
4a71df50
FB		 135 unsigned int large_send_bytes;
136 unsigned int large_send_cnt;
137 unsigned int sg_skbs_sent;
138 unsigned int sg_frags_sent;
139 /* initial values when measuring starts */
140 unsigned long initial_rx_packets;
141 unsigned long initial_tx_packets;
142 /* inbound scatter gather data */
143 unsigned int sg_skbs_rx;
144 unsigned int sg_frags_rx;
145 unsigned int sg_alloc_page_rx;
f61a0d05 146 unsigned int tx_csum;
c3b4a740 147 unsigned int tx_lin;
6059c905 148 unsigned int tx_linfail;
4a71df50
FB		 149};
150
151/* Routing stuff */
152struct qeth_routing_info {
153 enum qeth_routing_types type;
154};
155
156/* IPA stuff */
157struct qeth_ipa_info {
158 __u32 supported_funcs;
159 __u32 enabled_funcs;
160};
161
b4d72c08
EC		 162/* SETBRIDGEPORT stuff */
163enum qeth_sbp_roles {
164 QETH_SBP_ROLE_NONE = 0,
165 QETH_SBP_ROLE_PRIMARY = 1,
166 QETH_SBP_ROLE_SECONDARY = 2,
167};
168
169enum qeth_sbp_states {
170 QETH_SBP_STATE_INACTIVE = 0,
171 QETH_SBP_STATE_STANDBY = 1,
172 QETH_SBP_STATE_ACTIVE = 2,
173};
174
9f48b9db
EC		 175#define QETH_SBP_HOST_NOTIFICATION 1
176
b4d72c08
EC		 177struct qeth_sbp_info {
178 __u32 supported_funcs;
179 enum qeth_sbp_roles role;
9f48b9db 180 __u32 hostnotification:1;
0db587b0
EC		 181 __u32 reflect_promisc:1;
182 __u32 reflect_promisc_primary:1;
b4d72c08
EC		 183};
184
4a71df50
FB		 185static inline int qeth_is_ipa_supported(struct qeth_ipa_info *ipa,
186 enum qeth_ipa_funcs func)
187{
188 return (ipa->supported_funcs & func);
189}
190
191static inline int qeth_is_ipa_enabled(struct qeth_ipa_info *ipa,
192 enum qeth_ipa_funcs func)
193{
194 return (ipa->supported_funcs & ipa->enabled_funcs & func);
195}
196
197#define qeth_adp_supported(c, f) \
198 qeth_is_ipa_supported(&c->options.adp, f)
199#define qeth_adp_enabled(c, f) \
200 qeth_is_ipa_enabled(&c->options.adp, f)
201#define qeth_is_supported(c, f) \
202 qeth_is_ipa_supported(&c->options.ipa4, f)
203#define qeth_is_enabled(c, f) \
204 qeth_is_ipa_enabled(&c->options.ipa4, f)
205#define qeth_is_supported6(c, f) \
206 qeth_is_ipa_supported(&c->options.ipa6, f)
207#define qeth_is_enabled6(c, f) \
208 qeth_is_ipa_enabled(&c->options.ipa6, f)
209#define qeth_is_ipafunc_supported(c, prot, f) \
210 ((prot == QETH_PROT_IPV6) ? \
211 qeth_is_supported6(c, f) : qeth_is_supported(c, f))
212#define qeth_is_ipafunc_enabled(c, prot, f) \
213 ((prot == QETH_PROT_IPV6) ? \
214 qeth_is_enabled6(c, f) : qeth_is_enabled(c, f))
215
5113fec0 216#define QETH_IDX_FUNC_LEVEL_OSD 0x0101
6298263a 217#define QETH_IDX_FUNC_LEVEL_IQD 0x4108
4a71df50
FB		 218
219#define QETH_MODELLIST_ARRAY \
5113fec0
UB		 220 {{0x1731, 0x01, 0x1732, QETH_CARD_TYPE_OSD, QETH_MAX_QUEUES, 0}, \
221 {0x1731, 0x05, 0x1732, QETH_CARD_TYPE_IQD, QETH_MAX_QUEUES, 0x103}, \
222 {0x1731, 0x06, 0x1732, QETH_CARD_TYPE_OSN, QETH_MAX_QUEUES, 0}, \
223 {0x1731, 0x02, 0x1732, QETH_CARD_TYPE_OSM, QETH_MAX_QUEUES, 0}, \
224 {0x1731, 0x02, 0x1732, QETH_CARD_TYPE_OSX, QETH_MAX_QUEUES, 0}, \
225 {0, 0, 0, 0, 0, 0} }
226#define QETH_CU_TYPE_IND 0
227#define QETH_CU_MODEL_IND 1
228#define QETH_DEV_TYPE_IND 2
229#define QETH_DEV_MODEL_IND 3
230#define QETH_QUEUE_NO_IND 4
231#define QETH_MULTICAST_IND 5
4a71df50
FB		 232
233#define QETH_REAL_CARD 1
234#define QETH_VLAN_CARD 2
235#define QETH_BUFSIZE 4096
236
237/**
238 * some more defs
239 */
240#define QETH_TX_TIMEOUT 100 * HZ
241#define QETH_RCD_TIMEOUT 60 * HZ
b3332930 242#define QETH_RECLAIM_WORK_TIME HZ
4a71df50
FB		 243#define QETH_HEADER_SIZE 32
244#define QETH_MAX_PORTNO 15
245
246/*IPv6 address autoconfiguration stuff*/
247#define UNIQUE_ID_IF_CREATE_ADDR_FAILED 0xfffe
248#define UNIQUE_ID_NOT_BY_CARD 0x10000
249
250/*****************************************************************************/
251/* QDIO queue and buffer handling */
252/*****************************************************************************/
253#define QETH_MAX_QUEUES 4
254#define QETH_IN_BUF_SIZE_DEFAULT 65536
dcf4ae2d
FB		 255#define QETH_IN_BUF_COUNT_DEFAULT 64
256#define QETH_IN_BUF_COUNT_HSDEFAULT 128
4a71df50
FB		 257#define QETH_IN_BUF_COUNT_MIN 8
258#define QETH_IN_BUF_COUNT_MAX 128
259#define QETH_MAX_BUFFER_ELEMENTS(card) ((card)->qdio.in_buf_size >> 12)
260#define QETH_IN_BUF_REQUEUE_THRESHOLD(card) \
0284a0fd 261 ((card)->qdio.in_buf_pool.buf_count / 2)
4a71df50
FB		 262
263/* buffers we have to be behind before we get a PCI */
264#define QETH_PCI_THRESHOLD_A(card) ((card)->qdio.in_buf_pool.buf_count+1)
265/*enqueued free buffers left before we get a PCI*/
266#define QETH_PCI_THRESHOLD_B(card) 0
267/*not used unless the microcode gets patched*/
268#define QETH_PCI_TIMER_VALUE(card) 3
269
4a71df50
FB		 270/* priority queing */
271#define QETH_PRIOQ_DEFAULT QETH_NO_PRIO_QUEUEING
272#define QETH_DEFAULT_QUEUE 2
273#define QETH_NO_PRIO_QUEUEING 0
274#define QETH_PRIO_Q_ING_PREC 1
275#define QETH_PRIO_Q_ING_TOS 2
d66cb37e
SR		 276#define QETH_PRIO_Q_ING_SKB 3
277#define QETH_PRIO_Q_ING_VLAN 4
4a71df50
FB		 278
279/* Packing */
280#define QETH_LOW_WATERMARK_PACK 2
281#define QETH_HIGH_WATERMARK_PACK 5
282#define QETH_WATERMARK_PACK_FUZZ 1
283
4a71df50
FB		 284/* large receive scatter gather copy break */
285#define QETH_RX_SG_CB (PAGE_SIZE >> 1)
b3332930 286#define QETH_RX_PULL_LEN 256
4a71df50
FB		 287
288struct qeth_hdr_layer3 {
289 __u8 id;
290 __u8 flags;
291 __u16 inbound_checksum; /*TSO:__u16 seqno */
292 __u32 token; /*TSO: __u32 reserved */
293 __u16 length;
294 __u8 vlan_prio;
295 __u8 ext_flags;
296 __u16 vlan_id;
297 __u16 frame_offset;
298 __u8 dest_addr[16];
299} __attribute__ ((packed));
300
301struct qeth_hdr_layer2 {
302 __u8 id;
303 __u8 flags[3];
304 __u8 port_no;
305 __u8 hdr_length;
306 __u16 pkt_length;
307 __u16 seq_no;
308 __u16 vlan_id;
309 __u32 reserved;
310 __u8 reserved2[16];
311} __attribute__ ((packed));
312
313struct qeth_hdr_osn {
314 __u8 id;
315 __u8 reserved;
316 __u16 seq_no;
317 __u16 reserved2;
318 __u16 control_flags;
319 __u16 pdu_length;
320 __u8 reserved3[18];
321 __u32 ccid;
322} __attribute__ ((packed));
323
324struct qeth_hdr {
325 union {
326 struct qeth_hdr_layer2 l2;
327 struct qeth_hdr_layer3 l3;
328 struct qeth_hdr_osn osn;
329 } hdr;
330} __attribute__ ((packed));
331
332/*TCP Segmentation Offload header*/
333struct qeth_hdr_ext_tso {
334 __u16 hdr_tot_len;
335 __u8 imb_hdr_no;
336 __u8 reserved;
337 __u8 hdr_type;
338 __u8 hdr_version;
339 __u16 hdr_len;
340 __u32 payload_len;
341 __u16 mss;
342 __u16 dg_hdr_len;
343 __u8 padding[16];
344} __attribute__ ((packed));
345
346struct qeth_hdr_tso {
347 struct qeth_hdr hdr; /*hdr->hdr.l3.xxx*/
348 struct qeth_hdr_ext_tso ext;
349} __attribute__ ((packed));
350
351
352/* flags for qeth_hdr.flags */
353#define QETH_HDR_PASSTHRU 0x10
354#define QETH_HDR_IPV6 0x80
355#define QETH_HDR_CAST_MASK 0x07
356enum qeth_cast_flags {
357 QETH_CAST_UNICAST = 0x06,
358 QETH_CAST_MULTICAST = 0x04,
359 QETH_CAST_BROADCAST = 0x05,
360 QETH_CAST_ANYCAST = 0x07,
361 QETH_CAST_NOCAST = 0x00,
362};
363
364enum qeth_layer2_frame_flags {
365 QETH_LAYER2_FLAG_MULTICAST = 0x01,
366 QETH_LAYER2_FLAG_BROADCAST = 0x02,
367 QETH_LAYER2_FLAG_UNICAST = 0x04,
368 QETH_LAYER2_FLAG_VLAN = 0x10,
369};
370
371enum qeth_header_ids {
372 QETH_HEADER_TYPE_LAYER3 = 0x01,
373 QETH_HEADER_TYPE_LAYER2 = 0x02,
374 QETH_HEADER_TYPE_TSO = 0x03,
375 QETH_HEADER_TYPE_OSN = 0x04,
376};
377/* flags for qeth_hdr.ext_flags */
378#define QETH_HDR_EXT_VLAN_FRAME 0x01
379#define QETH_HDR_EXT_TOKEN_ID 0x02
380#define QETH_HDR_EXT_INCLUDE_VLAN_TAG 0x04
381#define QETH_HDR_EXT_SRC_MAC_ADDR 0x08
382#define QETH_HDR_EXT_CSUM_HDR_REQ 0x10
383#define QETH_HDR_EXT_CSUM_TRANSP_REQ 0x20
f6b85b6c 384#define QETH_HDR_EXT_UDP 0x40 /*bit off for TCP*/
4a71df50 385
4a71df50
FB		 386enum qeth_qdio_buffer_states {
387 /*
388 * inbound: read out by driver; owned by hardware in order to be filled
389 * outbound: owned by driver in order to be filled
390 */
391 QETH_QDIO_BUF_EMPTY,
392 /*
393 * inbound: filled by hardware; owned by driver in order to be read out
394 * outbound: filled by driver; owned by hardware in order to be sent
395 */
396 QETH_QDIO_BUF_PRIMED,
b3332930
FB		 397 /*
398 * inbound: not applicable
399 * outbound: identified to be pending in TPQ
400 */
401 QETH_QDIO_BUF_PENDING,
402 /*
403 * inbound: not applicable
404 * outbound: found in completion queue
405 */
406 QETH_QDIO_BUF_IN_CQ,
0da9581d
EL		 407 /*
408 * inbound: not applicable
409 * outbound: handled via transfer pending / completion queue
410 */
411 QETH_QDIO_BUF_HANDLED_DELAYED,
4a71df50
FB		 412};
413
414enum qeth_qdio_info_states {
415 QETH_QDIO_UNINITIALIZED,
416 QETH_QDIO_ALLOCATED,
417 QETH_QDIO_ESTABLISHED,
418 QETH_QDIO_CLEANING
419};
420
421struct qeth_buffer_pool_entry {
422 struct list_head list;
423 struct list_head init_list;
424 void *elements[QDIO_MAX_ELEMENTS_PER_BUFFER];
425};
426
427struct qeth_qdio_buffer_pool {
428 struct list_head entry_list;
429 int buf_count;
430};
431
432struct qeth_qdio_buffer {
433 struct qdio_buffer *buffer;
434 /* the buffer pool entry currently associated to this buffer */
435 struct qeth_buffer_pool_entry *pool_entry;
b3332930 436 struct sk_buff *rx_skb;
4a71df50
FB		 437};
438
439struct qeth_qdio_q {
6d284bde 440 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
4a71df50
FB		 441 struct qeth_qdio_buffer bufs[QDIO_MAX_BUFFERS_PER_Q];
442 int next_buf_to_init;
6d284bde 443};
4a71df50 444
4a71df50
FB		 445struct qeth_qdio_out_buffer {
446 struct qdio_buffer *buffer;
447 atomic_t state;
448 int next_element_to_fill;
449 struct sk_buff_head skb_list;
683d718a 450 int is_header[16];
0da9581d
EL		 451
452 struct qaob *aob;
453 struct qeth_qdio_out_q *q;
454 struct qeth_qdio_out_buffer *next_pending;
4a71df50
FB		 455};
456
457struct qeth_card;
458
459enum qeth_out_q_states {
460 QETH_OUT_Q_UNLOCKED,
461 QETH_OUT_Q_LOCKED,
462 QETH_OUT_Q_LOCKED_FLUSH,
463};
464
465struct qeth_qdio_out_q {
d445a4e2 466 struct qdio_buffer *qdio_bufs[QDIO_MAX_BUFFERS_PER_Q];
0da9581d
EL		 467 struct qeth_qdio_out_buffer *bufs[QDIO_MAX_BUFFERS_PER_Q];
468 struct qdio_outbuf_state *bufstates; /* convenience pointer */
4a71df50
FB		 469 int queue_no;
470 struct qeth_card *card;
471 atomic_t state;
472 int do_pack;
473 /*
474 * index of buffer to be filled by driver; state EMPTY or PACKING
475 */
476 int next_buf_to_fill;
477 /*
478 * number of buffers that are currently filled (PRIMED)
479 * -> these buffers are hardware-owned
480 */
481 atomic_t used_buffers;
482 /* indicates whether PCI flag must be set (or if one is outstanding) */
483 atomic_t set_pci_flags_count;
d445a4e2 484};
4a71df50
FB		 485
486struct qeth_qdio_info {
487 atomic_t state;
488 /* input */
0da9581d 489 int no_in_queues;
4a71df50 490 struct qeth_qdio_q *in_q;
0da9581d 491 struct qeth_qdio_q *c_q;
4a71df50
FB		 492 struct qeth_qdio_buffer_pool in_buf_pool;
493 struct qeth_qdio_buffer_pool init_pool;
494 int in_buf_size;
495
496 /* output */
497 int no_out_queues;
498 struct qeth_qdio_out_q **out_qs;
0da9581d 499 struct qdio_outbuf_state *out_bufstates;
4a71df50
FB		 500
501 /* priority queueing */
502 int do_prio_queueing;
503 int default_out_queue;
504};
505
506enum qeth_send_errors {
507 QETH_SEND_ERROR_NONE,
508 QETH_SEND_ERROR_LINK_FAILURE,
509 QETH_SEND_ERROR_RETRY,
510 QETH_SEND_ERROR_KICK_IT,
511};
512
513#define QETH_ETH_MAC_V4 0x0100 /* like v4 */
514#define QETH_ETH_MAC_V6 0x3333 /* like v6 */
515/* tr mc mac is longer, but that will be enough to detect mc frames */
516#define QETH_TR_MAC_NC 0xc000 /* non-canonical */
517#define QETH_TR_MAC_C 0x0300 /* canonical */
518
519#define DEFAULT_ADD_HHLEN 0
520#define MAX_ADD_HHLEN 1024
521
522/**
523 * buffer stuff for read channel
524 */
525#define QETH_CMD_BUFFER_NO 8
526
527/**
528 * channel state machine
529 */
530enum qeth_channel_states {
531 CH_STATE_UP,
532 CH_STATE_DOWN,
533 CH_STATE_ACTIVATING,
534 CH_STATE_HALTED,
535 CH_STATE_STOPPED,
536 CH_STATE_RCD,
537 CH_STATE_RCD_DONE,
538};
539/**
540 * card state machine
541 */
542enum qeth_card_states {
543 CARD_STATE_DOWN,
544 CARD_STATE_HARDSETUP,
545 CARD_STATE_SOFTSETUP,
546 CARD_STATE_UP,
547 CARD_STATE_RECOVER,
548};
549
550/**
551 * Protocol versions
552 */
553enum qeth_prot_versions {
554 QETH_PROT_IPV4 = 0x0004,
555 QETH_PROT_IPV6 = 0x0006,
556};
557
558enum qeth_ip_types {
559 QETH_IP_TYPE_NORMAL,
560 QETH_IP_TYPE_VIPA,
561 QETH_IP_TYPE_RXIP,
4a71df50
FB		 562};
563
564enum qeth_cmd_buffer_state {
565 BUF_STATE_FREE,
566 BUF_STATE_LOCKED,
567 BUF_STATE_PROCESSED,
568};
569
0da9581d
EL		 570enum qeth_cq {
571 QETH_CQ_DISABLED = 0,
572 QETH_CQ_ENABLED = 1,
573 QETH_CQ_NOTAVAILABLE = 2,
574};
575
4a71df50
FB		 576struct qeth_ipato {
577 int enabled;
578 int invert4;
579 int invert6;
580 struct list_head entries;
581};
582
583struct qeth_channel;
584
585struct qeth_cmd_buffer {
586 enum qeth_cmd_buffer_state state;
587 struct qeth_channel *channel;
588 unsigned char *data;
589 int rc;
590 void (*callback) (struct qeth_channel *, struct qeth_cmd_buffer *);
591};
592
593/**
594 * definition of a qeth channel, used for read and write
595 */
596struct qeth_channel {
597 enum qeth_channel_states state;
598 struct ccw1 ccw;
599 spinlock_t iob_lock;
600 wait_queue_head_t wait_q;
4a71df50
FB		 601 struct ccw_device *ccwdev;
602/*command buffer for control data*/
603 struct qeth_cmd_buffer iob[QETH_CMD_BUFFER_NO];
604 atomic_t irq_pending;
605 int io_buf_no;
606 int buf_no;
607};
608
609/**
610 * OSA card related definitions
611 */
612struct qeth_token {
613 __u32 issuer_rm_w;
614 __u32 issuer_rm_r;
615 __u32 cm_filter_w;
616 __u32 cm_filter_r;
617 __u32 cm_connection_w;
618 __u32 cm_connection_r;
619 __u32 ulp_filter_w;
620 __u32 ulp_filter_r;
621 __u32 ulp_connection_w;
622 __u32 ulp_connection_r;
623};
624
625struct qeth_seqno {
626 __u32 trans_hdr;
627 __u32 pdu_hdr;
628 __u32 pdu_hdr_ack;
629 __u16 ipa;
630 __u32 pkt_seqno;
631};
632
633struct qeth_reply {
634 struct list_head list;
635 wait_queue_head_t wait_q;
636 int (*callback)(struct qeth_card *, struct qeth_reply *,
637 unsigned long);
638 u32 seqno;
639 unsigned long offset;
640 atomic_t received;
641 int rc;
642 void *param;
643 struct qeth_card *card;
644 atomic_t refcnt;
645};
646
647
648struct qeth_card_blkt {
649 int time_total;
650 int inter_packet;
651 int inter_packet_jumbo;
652};
653
654#define QETH_BROADCAST_WITH_ECHO 0x01
655#define QETH_BROADCAST_WITHOUT_ECHO 0x02
656#define QETH_LAYER2_MAC_READ 0x01
657#define QETH_LAYER2_MAC_REGISTERED 0x02
658struct qeth_card_info {
659 unsigned short unit_addr2;
660 unsigned short cula;
661 unsigned short chpid;
662 __u16 func_level;
663 char mcl_level[QETH_MCL_LENGTH + 1];
664 int guestlan;
665 int mac_bits;
4a71df50 666 int portno;
4a71df50
FB		 667 enum qeth_card_types type;
668 enum qeth_link_types link_type;
669 int is_multicast_different;
670 int initial_mtu;
671 int max_mtu;
672 int broadcast_capable;
673 int unique_id;
674 struct qeth_card_blkt blkt;
4a71df50 675 enum qeth_ipa_promisc_modes promisc_mode;
1da74b1c
FB		 676 __u32 diagass_support;
677 __u32 hwtrap;
4a71df50
FB		 678};
679
680struct qeth_card_options {
681 struct qeth_routing_info route4;
682 struct qeth_ipa_info ipa4;
683 struct qeth_ipa_info adp; /*Adapter parameters*/
684 struct qeth_routing_info route6;
685 struct qeth_ipa_info ipa6;
b4d72c08 686 struct qeth_sbp_info sbp; /* SETBRIDGEPORT options */
4a71df50
FB		 687 int fake_broadcast;
688 int add_hhlen;
4a71df50 689 int layer2;
4a71df50
FB		 690 int performance_stats;
691 int rx_sg_cb;
d64ecc22 692 enum qeth_ipa_isolation_modes isolation;
0f54761d 693 enum qeth_ipa_isolation_modes prev_isolation;
76b11f8e 694 int sniffer;
0da9581d 695 enum qeth_cq cq;
b3332930 696 char hsuid[9];
4a71df50
FB		 697};
698
699/*
700 * thread bits for qeth_card thread masks
701 */
702enum qeth_threads {
703 QETH_RECOVER_THREAD = 1,
704};
705
706struct qeth_osn_info {
707 int (*assist_cb)(struct net_device *dev, void *data);
708 int (*data_cb)(struct sk_buff *skb);
709};
710
711enum qeth_discipline_id {
712 QETH_DISCIPLINE_LAYER3 = 0,
713 QETH_DISCIPLINE_LAYER2 = 1,
714};
715
716struct qeth_discipline {
a1c3ed4c 717 void (*start_poll)(struct ccw_device *, int, unsigned long);
4a71df50
FB		 718 qdio_handler_t *input_handler;
719 qdio_handler_t *output_handler;
720 int (*recover)(void *ptr);
c041f2d4
SO		 721 int (*setup) (struct ccwgroup_device *);
722 void (*remove) (struct ccwgroup_device *);
723 int (*set_online) (struct ccwgroup_device *);
724 int (*set_offline) (struct ccwgroup_device *);
725 void (*shutdown)(struct ccwgroup_device *);
726 int (*prepare) (struct ccwgroup_device *);
727 void (*complete) (struct ccwgroup_device *);
728 int (*freeze)(struct ccwgroup_device *);
729 int (*thaw) (struct ccwgroup_device *);
730 int (*restore)(struct ccwgroup_device *);
c044dc21
EC		 731 int (*control_event_handler)(struct qeth_card *card,
732 struct qeth_ipa_cmd *cmd);
4a71df50
FB		 733};
734
735struct qeth_vlan_vid {
736 struct list_head list;
737 unsigned short vid;
738};
739
5f78e29c
LD		 740enum qeth_addr_disposition {
741 QETH_DISP_ADDR_DELETE = 0,
742 QETH_DISP_ADDR_DO_NOTHING = 1,
743 QETH_DISP_ADDR_ADD = 2,
4a71df50
FB		 744};
745
a1c3ed4c
FB		 746struct qeth_rx {
747 int b_count;
748 int b_index;
749 struct qdio_buffer_element *b_element;
750 int e_offset;
751 int qdio_err;
752};
753
02d5cb5b
EC		 754struct carrier_info {
755 __u8 card_type;
756 __u16 port_mode;
757 __u32 port_speed;
758};
759
45cbb2e4
SR		 760struct qeth_switch_info {
761 __u32 capabilities;
762 __u32 settings;
763};
764
6541aa52 765#define QETH_NAPI_WEIGHT NAPI_POLL_WEIGHT
a1c3ed4c 766
4a71df50
FB		 767struct qeth_card {
768 struct list_head list;
769 enum qeth_card_states state;
770 int lan_online;
771 spinlock_t lock;
772 struct ccwgroup_device *gdev;
773 struct qeth_channel read;
774 struct qeth_channel write;
775 struct qeth_channel data;
776
777 struct net_device *dev;
778 struct net_device_stats stats;
779
780 struct qeth_card_info info;
781 struct qeth_token token;
782 struct qeth_seqno seqno;
783 struct qeth_card_options options;
784
785 wait_queue_head_t wait_q;
786 spinlock_t vlanlock;
787 spinlock_t mclock;
7ff0bcf6 788 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
4a71df50 789 struct list_head vid_list;
fe5c8028 790 DECLARE_HASHTABLE(mac_htable, 4);
5f78e29c
LD		 791 DECLARE_HASHTABLE(ip_htable, 4);
792 DECLARE_HASHTABLE(ip_mc_htable, 4);
4a71df50
FB		 793 struct work_struct kernel_thread_starter;
794 spinlock_t thread_mask_lock;
795 unsigned long thread_start_mask;
796 unsigned long thread_allowed_mask;
797 unsigned long thread_running_mask;
65d8013c 798 struct task_struct *recovery_task;
4a71df50 799 spinlock_t ip_lock;
4a71df50
FB		 800 struct qeth_ipato ipato;
801 struct list_head cmd_waiter_list;
802 /* QDIO buffer handling */
803 struct qeth_qdio_info qdio;
804 struct qeth_perf_stats perf_stats;
908abbb5 805 int read_or_write_problem;
4a71df50 806 struct qeth_osn_info osn_info;
c041f2d4 807 struct qeth_discipline *discipline;
4a71df50 808 atomic_t force_alloc_skb;
6bcac508 809 struct service_level qeth_service_level;
76b11f8e 810 struct qdio_ssqd_desc ssqd;
af039068 811 debug_info_t *debug;
c4949f07 812 struct mutex conf_mutex;
9dc48ccc 813 struct mutex discipline_mutex;
a1c3ed4c
FB		 814 struct napi_struct napi;
815 struct qeth_rx rx;
b3332930
FB		 816 struct delayed_work buffer_reclaim_work;
817 int reclaim_index;
0f54761d 818 struct work_struct close_dev_work;
4a71df50
FB		 819};
820
821struct qeth_card_list_struct {
822 struct list_head list;
823 rwlock_t rwlock;
824};
825
1da74b1c
FB		 826struct qeth_trap_id {
827 __u16 lparnr;
828 char vmname[8];
829 __u8 chpid;
830 __u8 ssid;
831 __u16 devno;
832} __packed;
833
4a71df50
FB		 834/*some helper functions*/
835#define QETH_CARD_IFNAME(card) (((card)->dev)? (card)->dev->name : "")
836
2863c613
EC		 837/**
838 * qeth_get_elements_for_range() - find number of SBALEs to cover range.
839 * @start: Start of the address range.
840 * @end: Address after the end of the range.
841 *
842 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
843 * the specified address range.
844 */
845static inline int qeth_get_elements_for_range(addr_t start, addr_t end)
846{
847 return PFN_UP(end - 1) - PFN_DOWN(start);
848}
849
4a71df50
FB		 850static inline int qeth_get_micros(void)
851{
1aae0560 852 return (int) (get_tod_clock() >> 12);
4a71df50
FB		 853}
854
4a71df50
FB		 855static inline int qeth_get_ip_version(struct sk_buff *skb)
856{
a9baf10a
SR		 857 __be16 *p = &((struct ethhdr *)skb->data)->h_proto;
858
859 if (*p == ETH_P_8021Q)
860 p += 2;
861 switch (*p) {
4a71df50
FB		 862 case ETH_P_IPV6:
863 return 6;
864 case ETH_P_IP:
865 return 4;
866 default:
867 return 0;
868 }
869}
870
41aeed58
EC		 871static inline int qeth_get_ip_protocol(struct sk_buff *skb)
872{
873 return ip_hdr(skb)->protocol;
874}
875
f90b744e
FB		 876static inline void qeth_put_buffer_pool_entry(struct qeth_card *card,
877 struct qeth_buffer_pool_entry *entry)
878{
879 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
880}
881
1da74b1c
FB		 882static inline int qeth_is_diagass_supported(struct qeth_card *card,
883 enum qeth_diags_cmds cmd)
884{
885 return card->info.diagass_support & (__u32)cmd;
886}
887
c041f2d4
SO		 888extern struct qeth_discipline qeth_l2_discipline;
889extern struct qeth_discipline qeth_l3_discipline;
b7169c51
SO		 890extern const struct attribute_group *qeth_generic_attr_groups[];
891extern const struct attribute_group *qeth_osn_attr_groups[];
b4d72c08 892extern struct workqueue_struct *qeth_wq;
b7169c51 893
511c2445 894int qeth_card_hw_is_reachable(struct qeth_card *);
4a71df50
FB		 895const char *qeth_get_cardname_short(struct qeth_card *);
896int qeth_realloc_buffer_pool(struct qeth_card *, int);
897int qeth_core_load_discipline(struct qeth_card *, enum qeth_discipline_id);
898void qeth_core_free_discipline(struct qeth_card *);
4a71df50
FB		 899
900/* exports for qeth discipline device drivers */
901extern struct qeth_card_list_struct qeth_core_card_list;
683d718a 902extern struct kmem_cache *qeth_core_header_cache;
d11ba0c4 903extern struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS];
4a71df50 904
65d8013c
SR		 905void qeth_set_recovery_task(struct qeth_card *);
906void qeth_clear_recovery_task(struct qeth_card *);
4a71df50
FB		 907void qeth_set_allowed_threads(struct qeth_card *, unsigned long , int);
908int qeth_threads_running(struct qeth_card *, unsigned long);
909int qeth_wait_for_threads(struct qeth_card *, unsigned long);
910int qeth_do_run_thread(struct qeth_card *, unsigned long);
911void qeth_clear_thread_start_bit(struct qeth_card *, unsigned long);
912void qeth_clear_thread_running_bit(struct qeth_card *, unsigned long);
913int qeth_core_hardsetup_card(struct qeth_card *);
914void qeth_print_status_message(struct qeth_card *);
915int qeth_init_qdio_queues(struct qeth_card *);
4a71df50
FB		 916int qeth_send_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *,
917 int (*reply_cb)
918 (struct qeth_card *, struct qeth_reply *, unsigned long),
919 void *);
920struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *,
921 enum qeth_ipa_cmds, enum qeth_prot_versions);
922int qeth_query_setadapterparms(struct qeth_card *);
76b11f8e
UB		 923int qeth_check_qdio_errors(struct qeth_card *, struct qdio_buffer *,
924 unsigned int, const char *);
4a71df50
FB		 925void qeth_queue_input_buffer(struct qeth_card *, int);
926struct sk_buff *qeth_core_get_next_skb(struct qeth_card *,
b3332930 927 struct qeth_qdio_buffer *, struct qdio_buffer_element **, int *,
4a71df50
FB		 928 struct qeth_hdr **);
929void qeth_schedule_recovery(struct qeth_card *);
a1c3ed4c
FB		 930void qeth_qdio_start_poll(struct ccw_device *, int, unsigned long);
931void qeth_qdio_input_handler(struct ccw_device *,
932 unsigned int, unsigned int, int,
933 int, unsigned long);
4a71df50 934void qeth_qdio_output_handler(struct ccw_device *, unsigned int,
779e6e1c 935 int, int, int, unsigned long);
4a71df50
FB		 936void qeth_clear_ipacmd_list(struct qeth_card *);
937int qeth_qdio_clear_card(struct qeth_card *, int);
938void qeth_clear_working_pool_list(struct qeth_card *);
939void qeth_clear_cmd_buffers(struct qeth_channel *);
940void qeth_clear_qdio_buffers(struct qeth_card *);
941void qeth_setadp_promisc_mode(struct qeth_card *);
942struct net_device_stats *qeth_get_stats(struct net_device *);
943int qeth_change_mtu(struct net_device *, int);
944int qeth_setadpparms_change_macaddr(struct qeth_card *);
945void qeth_tx_timeout(struct net_device *);
946void qeth_prepare_control_data(struct qeth_card *, int,
947 struct qeth_cmd_buffer *);
948void qeth_release_buffer(struct qeth_channel *, struct qeth_cmd_buffer *);
949void qeth_prepare_ipa_cmd(struct qeth_card *, struct qeth_cmd_buffer *, char);
950struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *);
951int qeth_mdio_read(struct net_device *, int, int);
952int qeth_snmp_command(struct qeth_card *, char __user *);
c3ab96f3 953int qeth_query_oat_command(struct qeth_card *, char __user *);
45cbb2e4
SR		 954int qeth_query_switch_attributes(struct qeth_card *card,
955 struct qeth_switch_info *sw_info);
4a71df50
FB		 956int qeth_send_control_data(struct qeth_card *, int, struct qeth_cmd_buffer *,
957 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, unsigned long),
958 void *reply_param);
b4d72c08
EC		 959int qeth_bridgeport_query_ports(struct qeth_card *card,
960 enum qeth_sbp_roles *role, enum qeth_sbp_states *state);
961int qeth_bridgeport_setrole(struct qeth_card *card, enum qeth_sbp_roles role);
9f48b9db 962int qeth_bridgeport_an_set(struct qeth_card *card, int enable);
4a71df50 963int qeth_get_priority_queue(struct qeth_card *, struct sk_buff *, int, int);
7d969d2e
JW		 964int qeth_get_elements_no(struct qeth_card *card, struct sk_buff *skb,
965 int extra_elems, int data_offset);
271648b4 966int qeth_get_elements_for_frags(struct sk_buff *);
4a71df50 967int qeth_do_send_packet_fast(struct qeth_card *, struct qeth_qdio_out_q *,
64ef8957 968 struct sk_buff *, struct qeth_hdr *, int, int, int);
4a71df50 969int qeth_do_send_packet(struct qeth_card *, struct qeth_qdio_out_q *,
64ef8957 970 struct sk_buff *, struct qeth_hdr *, int);
df8b4ec8 971int qeth_core_get_sset_count(struct net_device *, int);
4a71df50
FB		 972void qeth_core_get_ethtool_stats(struct net_device *,
973 struct ethtool_stats *, u64 *);
974void qeth_core_get_strings(struct net_device *, u32, u8 *);
975void qeth_core_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
8e96c51c 976void qeth_dbf_longtext(debug_info_t *id, int level, char *text, ...);
3f9975aa 977int qeth_core_ethtool_get_settings(struct net_device *, struct ethtool_cmd *);
0f54761d 978int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback);
d4ae1f5e 979int qeth_hdr_chk_and_bounce(struct sk_buff *, struct qeth_hdr **, int);
0da9581d 980int qeth_configure_cq(struct qeth_card *, enum qeth_cq);
1da74b1c
FB		 981int qeth_hw_trap(struct qeth_card *, enum qeth_diags_trap_action);
982int qeth_query_ipassists(struct qeth_card *, enum qeth_prot_versions prot);
395672e0 983void qeth_trace_features(struct qeth_card *);
0f54761d 984void qeth_close_dev(struct qeth_card *);
4d7def2a
TR		 985int qeth_send_simple_setassparms(struct qeth_card *, enum qeth_ipa_funcs,
986 __u16, long);
987int qeth_send_setassparms(struct qeth_card *, struct qeth_cmd_buffer *, __u16,
988 long,
989 int (*reply_cb)(struct qeth_card *,
990 struct qeth_reply *, unsigned long),
991 void *);
8f43fb00 992int qeth_setassparms_cb(struct qeth_card *, struct qeth_reply *, unsigned long);
b475e316
TR		 993struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *,
994 enum qeth_ipa_funcs,
995 __u16, __u16,
996 enum qeth_prot_versions);
8f43fb00 997int qeth_set_features(struct net_device *, netdev_features_t);
e830baa9 998int qeth_recover_features(struct net_device *);
8f43fb00 999netdev_features_t qeth_fix_features(struct net_device *, netdev_features_t);
4a71df50
FB		 1000
1001/* exports for OSN */
1002int qeth_osn_assist(struct net_device *, void *, int);
1003int qeth_osn_register(unsigned char *read_dev_no, struct net_device **,
1004 int (*assist_cb)(struct net_device *, void *),
1005 int (*data_cb)(struct sk_buff *));
1006void qeth_osn_deregister(struct net_device *);
1007
1008#endif /* __QETH_CORE_H__ */
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