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qeth: exploit asynchronous delivery of storage blocks
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
bbcfcdc8 4 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
4a71df50 24
ab4227cb
MS		 25#include <asm/ebcdic.h>
26#include <asm/io.h>
1da74b1c 27#include <asm/sysinfo.h>
4a71df50
FB		 28
29#include "qeth_core.h"
4a71df50 30
d11ba0c4
PT		 31struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40};
41EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 42
43struct qeth_card_list_struct qeth_core_card_list;
44EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 45struct kmem_cache *qeth_core_header_cache;
46EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 47static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 48
49static struct device *qeth_core_root_dev;
5113fec0 50static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 51static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 52
53static void qeth_send_control_data_cb(struct qeth_channel *,
54 struct qeth_cmd_buffer *);
55static int qeth_issue_next_read(struct qeth_card *);
56static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
57static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
58static void qeth_free_buffer_pool(struct qeth_card *);
59static int qeth_qdio_establish(struct qeth_card *);
0da9581d
EL		 60static void qeth_free_qdio_buffers(struct qeth_card *);
61static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
62 struct qeth_qdio_out_buffer *buf,
63 enum qeth_qdio_buffer_states newbufstate);
4a71df50
FB		 64
65
4a71df50
FB		 66static inline const char *qeth_get_cardname(struct qeth_card *card)
67{
68 if (card->info.guestlan) {
69 switch (card->info.type) {
5113fec0 70 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 71 return " Guest LAN QDIO";
72 case QETH_CARD_TYPE_IQD:
73 return " Guest LAN Hiper";
5113fec0
UB		 74 case QETH_CARD_TYPE_OSM:
75 return " Guest LAN QDIO - OSM";
76 case QETH_CARD_TYPE_OSX:
77 return " Guest LAN QDIO - OSX";
4a71df50
FB		 78 default:
79 return " unknown";
80 }
81 } else {
82 switch (card->info.type) {
5113fec0 83 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 84 return " OSD Express";
85 case QETH_CARD_TYPE_IQD:
86 return " HiperSockets";
87 case QETH_CARD_TYPE_OSN:
88 return " OSN QDIO";
5113fec0
UB		 89 case QETH_CARD_TYPE_OSM:
90 return " OSM QDIO";
91 case QETH_CARD_TYPE_OSX:
92 return " OSX QDIO";
4a71df50
FB		 93 default:
94 return " unknown";
95 }
96 }
97 return " n/a";
98}
99
100/* max length to be returned: 14 */
101const char *qeth_get_cardname_short(struct qeth_card *card)
102{
103 if (card->info.guestlan) {
104 switch (card->info.type) {
5113fec0 105 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 106 return "GuestLAN QDIO";
107 case QETH_CARD_TYPE_IQD:
108 return "GuestLAN Hiper";
5113fec0
UB		 109 case QETH_CARD_TYPE_OSM:
110 return "GuestLAN OSM";
111 case QETH_CARD_TYPE_OSX:
112 return "GuestLAN OSX";
4a71df50
FB		 113 default:
114 return "unknown";
115 }
116 } else {
117 switch (card->info.type) {
5113fec0 118 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 119 switch (card->info.link_type) {
120 case QETH_LINK_TYPE_FAST_ETH:
121 return "OSD_100";
122 case QETH_LINK_TYPE_HSTR:
123 return "HSTR";
124 case QETH_LINK_TYPE_GBIT_ETH:
125 return "OSD_1000";
126 case QETH_LINK_TYPE_10GBIT_ETH:
127 return "OSD_10GIG";
128 case QETH_LINK_TYPE_LANE_ETH100:
129 return "OSD_FE_LANE";
130 case QETH_LINK_TYPE_LANE_TR:
131 return "OSD_TR_LANE";
132 case QETH_LINK_TYPE_LANE_ETH1000:
133 return "OSD_GbE_LANE";
134 case QETH_LINK_TYPE_LANE:
135 return "OSD_ATM_LANE";
136 default:
137 return "OSD_Express";
138 }
139 case QETH_CARD_TYPE_IQD:
140 return "HiperSockets";
141 case QETH_CARD_TYPE_OSN:
142 return "OSN";
5113fec0
UB		 143 case QETH_CARD_TYPE_OSM:
144 return "OSM_1000";
145 case QETH_CARD_TYPE_OSX:
146 return "OSX_10GIG";
4a71df50
FB		 147 default:
148 return "unknown";
149 }
150 }
151 return "n/a";
152}
153
154void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
155 int clear_start_mask)
156{
157 unsigned long flags;
158
159 spin_lock_irqsave(&card->thread_mask_lock, flags);
160 card->thread_allowed_mask = threads;
161 if (clear_start_mask)
162 card->thread_start_mask &= threads;
163 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
164 wake_up(&card->wait_q);
165}
166EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
167
168int qeth_threads_running(struct qeth_card *card, unsigned long threads)
169{
170 unsigned long flags;
171 int rc = 0;
172
173 spin_lock_irqsave(&card->thread_mask_lock, flags);
174 rc = (card->thread_running_mask & threads);
175 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
176 return rc;
177}
178EXPORT_SYMBOL_GPL(qeth_threads_running);
179
180int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
181{
182 return wait_event_interruptible(card->wait_q,
183 qeth_threads_running(card, threads) == 0);
184}
185EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
186
187void qeth_clear_working_pool_list(struct qeth_card *card)
188{
189 struct qeth_buffer_pool_entry *pool_entry, *tmp;
190
847a50fd 191 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 192 list_for_each_entry_safe(pool_entry, tmp,
193 &card->qdio.in_buf_pool.entry_list, list){
194 list_del(&pool_entry->list);
195 }
196}
197EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
198
199static int qeth_alloc_buffer_pool(struct qeth_card *card)
200{
201 struct qeth_buffer_pool_entry *pool_entry;
202 void *ptr;
203 int i, j;
204
847a50fd 205 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50
FB		 206 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
207 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
208 if (!pool_entry) {
209 qeth_free_buffer_pool(card);
210 return -ENOMEM;
211 }
212 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 213 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 214 if (!ptr) {
215 while (j > 0)
216 free_page((unsigned long)
217 pool_entry->elements[--j]);
218 kfree(pool_entry);
219 qeth_free_buffer_pool(card);
220 return -ENOMEM;
221 }
222 pool_entry->elements[j] = ptr;
223 }
224 list_add(&pool_entry->init_list,
225 &card->qdio.init_pool.entry_list);
226 }
227 return 0;
228}
229
230int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
231{
847a50fd 232 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 233
234 if ((card->state != CARD_STATE_DOWN) &&
235 (card->state != CARD_STATE_RECOVER))
236 return -EPERM;
237
238 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
239 qeth_clear_working_pool_list(card);
240 qeth_free_buffer_pool(card);
241 card->qdio.in_buf_pool.buf_count = bufcnt;
242 card->qdio.init_pool.buf_count = bufcnt;
243 return qeth_alloc_buffer_pool(card);
244}
76b11f8e 245EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 246
0da9581d
EL		 247static inline int qeth_cq_init(struct qeth_card *card)
248{
249 int rc;
250
251 if (card->options.cq == QETH_CQ_ENABLED) {
252 QETH_DBF_TEXT(SETUP, 2, "cqinit");
253 memset(card->qdio.c_q->qdio_bufs, 0,
254 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
255 card->qdio.c_q->next_buf_to_init = 127;
256 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
257 card->qdio.no_in_queues - 1, 0,
258 127);
259 if (rc) {
260 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
261 goto out;
262 }
263 }
264 rc = 0;
265out:
266 return rc;
267}
268
269static inline int qeth_alloc_cq(struct qeth_card *card)
270{
271 int rc;
272
273 if (card->options.cq == QETH_CQ_ENABLED) {
274 int i;
275 struct qdio_outbuf_state *outbuf_states;
276
277 QETH_DBF_TEXT(SETUP, 2, "cqon");
278 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
279 GFP_KERNEL);
280 if (!card->qdio.c_q) {
281 rc = -1;
282 goto kmsg_out;
283 }
284 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
285
286 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
287 card->qdio.c_q->bufs[i].buffer =
288 &card->qdio.c_q->qdio_bufs[i];
289 }
290
291 card->qdio.no_in_queues = 2;
292
293 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
294 kzalloc(card->qdio.no_out_queues *
295 QDIO_MAX_BUFFERS_PER_Q *
296 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
297 outbuf_states = card->qdio.out_bufstates;
298 if (outbuf_states == NULL) {
299 rc = -1;
300 goto free_cq_out;
301 }
302 for (i = 0; i < card->qdio.no_out_queues; ++i) {
303 card->qdio.out_qs[i]->bufstates = outbuf_states;
304 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
305 }
306 } else {
307 QETH_DBF_TEXT(SETUP, 2, "nocq");
308 card->qdio.c_q = NULL;
309 card->qdio.no_in_queues = 1;
310 }
311 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
312 rc = 0;
313out:
314 return rc;
315free_cq_out:
316 kfree(card->qdio.c_q);
317 card->qdio.c_q = NULL;
318kmsg_out:
319 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
320 goto out;
321}
322
323static inline void qeth_free_cq(struct qeth_card *card)
324{
325 if (card->qdio.c_q) {
326 --card->qdio.no_in_queues;
327 kfree(card->qdio.c_q);
328 card->qdio.c_q = NULL;
329 }
330 kfree(card->qdio.out_bufstates);
331 card->qdio.out_bufstates = NULL;
332}
333
334static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
335 int bidx, int forced_cleanup)
336{
337 if (q->bufs[bidx]->next_pending != NULL) {
338 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
339 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
340
341 while (c) {
342 if (forced_cleanup ||
343 atomic_read(&c->state) ==
344 QETH_QDIO_BUF_HANDLED_DELAYED) {
345 struct qeth_qdio_out_buffer *f = c;
346 QETH_CARD_TEXT(f->q->card, 5, "fp");
347 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
348 c = f->next_pending;
349 BUG_ON(head->next_pending != f);
350 head->next_pending = c;
351 kmem_cache_free(qeth_qdio_outbuf_cache, f);
352 } else {
353 head = c;
354 c = c->next_pending;
355 }
356
357 }
358 }
359}
360
361
362static inline void qeth_qdio_handle_aob(struct qeth_card *card,
363 unsigned long phys_aob_addr) {
364 struct qaob *aob;
365 struct qeth_qdio_out_buffer *buffer;
366
367 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
368 QETH_CARD_TEXT(card, 5, "haob");
369 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
370 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
371 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
372
373 BUG_ON(buffer == NULL);
374
375 buffer->aob = NULL;
376 qeth_clear_output_buffer(buffer->q, buffer,
377 QETH_QDIO_BUF_HANDLED_DELAYED);
378 /* from here on: do not touch buffer anymore */
379 qdio_release_aob(aob);
380}
381
382static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
383{
384 return card->options.cq == QETH_CQ_ENABLED &&
385 card->qdio.c_q != NULL &&
386 queue != 0 &&
387 queue == card->qdio.no_in_queues - 1;
388}
389
390
4a71df50
FB		 391static int qeth_issue_next_read(struct qeth_card *card)
392{
393 int rc;
394 struct qeth_cmd_buffer *iob;
395
847a50fd 396 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 397 if (card->read.state != CH_STATE_UP)
398 return -EIO;
399 iob = qeth_get_buffer(&card->read);
400 if (!iob) {
74eacdb9
FB		 401 dev_warn(&card->gdev->dev, "The qeth device driver "
402 "failed to recover an error on the device\n");
403 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
404 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 405 return -ENOMEM;
406 }
407 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 408 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 409 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
410 (addr_t) iob, 0, 0);
411 if (rc) {
74eacdb9
FB		 412 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
413 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 414 atomic_set(&card->read.irq_pending, 0);
908abbb5 415 card->read_or_write_problem = 1;
4a71df50
FB		 416 qeth_schedule_recovery(card);
417 wake_up(&card->wait_q);
418 }
419 return rc;
420}
421
422static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
423{
424 struct qeth_reply *reply;
425
426 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
427 if (reply) {
428 atomic_set(&reply->refcnt, 1);
429 atomic_set(&reply->received, 0);
430 reply->card = card;
431 };
432 return reply;
433}
434
435static void qeth_get_reply(struct qeth_reply *reply)
436{
437 WARN_ON(atomic_read(&reply->refcnt) <= 0);
438 atomic_inc(&reply->refcnt);
439}
440
441static void qeth_put_reply(struct qeth_reply *reply)
442{
443 WARN_ON(atomic_read(&reply->refcnt) <= 0);
444 if (atomic_dec_and_test(&reply->refcnt))
445 kfree(reply);
446}
447
d11ba0c4 448static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 449 struct qeth_card *card)
450{
4a71df50 451 char *ipa_name;
d11ba0c4 452 int com = cmd->hdr.command;
4a71df50 453 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 454 if (rc)
70919e23
UB		 455 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
456 "x%X \"%s\"\n",
457 ipa_name, com, dev_name(&card->gdev->dev),
458 QETH_CARD_IFNAME(card), rc,
459 qeth_get_ipa_msg(rc));
d11ba0c4 460 else
70919e23
UB		 461 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
462 ipa_name, com, dev_name(&card->gdev->dev),
463 QETH_CARD_IFNAME(card));
4a71df50
FB		 464}
465
466static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
467 struct qeth_cmd_buffer *iob)
468{
469 struct qeth_ipa_cmd *cmd = NULL;
470
847a50fd 471 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 472 if (IS_IPA(iob->data)) {
473 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
474 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 475 if (cmd->hdr.command != IPA_CMD_SETCCID &&
476 cmd->hdr.command != IPA_CMD_DELCCID &&
477 cmd->hdr.command != IPA_CMD_MODCCID &&
478 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 479 qeth_issue_ipa_msg(cmd,
480 cmd->hdr.return_code, card);
4a71df50
FB		 481 return cmd;
482 } else {
483 switch (cmd->hdr.command) {
484 case IPA_CMD_STOPLAN:
74eacdb9
FB		 485 dev_warn(&card->gdev->dev,
486 "The link for interface %s on CHPID"
487 " 0x%X failed\n",
4a71df50
FB		 488 QETH_CARD_IFNAME(card),
489 card->info.chpid);
490 card->lan_online = 0;
491 if (card->dev && netif_carrier_ok(card->dev))
492 netif_carrier_off(card->dev);
493 return NULL;
494 case IPA_CMD_STARTLAN:
74eacdb9
FB		 495 dev_info(&card->gdev->dev,
496 "The link for %s on CHPID 0x%X has"
497 " been restored\n",
4a71df50
FB		 498 QETH_CARD_IFNAME(card),
499 card->info.chpid);
500 netif_carrier_on(card->dev);
922dc062 501 card->lan_online = 1;
1da74b1c
FB		 502 if (card->info.hwtrap)
503 card->info.hwtrap = 2;
4a71df50
FB		 504 qeth_schedule_recovery(card);
505 return NULL;
506 case IPA_CMD_MODCCID:
507 return cmd;
508 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 509 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 510 break;
511 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 512 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 513 break;
514 default:
c4cef07c 515 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 516 "but not a reply!\n");
517 break;
518 }
519 }
520 }
521 return cmd;
522}
523
524void qeth_clear_ipacmd_list(struct qeth_card *card)
525{
526 struct qeth_reply *reply, *r;
527 unsigned long flags;
528
847a50fd 529 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 530
531 spin_lock_irqsave(&card->lock, flags);
532 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
533 qeth_get_reply(reply);
534 reply->rc = -EIO;
535 atomic_inc(&reply->received);
536 list_del_init(&reply->list);
537 wake_up(&reply->wait_q);
538 qeth_put_reply(reply);
539 }
540 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 541 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 542}
543EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
544
5113fec0
UB		 545static int qeth_check_idx_response(struct qeth_card *card,
546 unsigned char *buffer)
4a71df50
FB		 547{
548 if (!buffer)
549 return 0;
550
d11ba0c4 551 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 552 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 553 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 554 "with cause code 0x%02x%s\n",
555 buffer[4],
556 ((buffer[4] == 0x22) ?
557 " -- try another portname" : ""));
847a50fd
CO		 558 QETH_CARD_TEXT(card, 2, "ckidxres");
559 QETH_CARD_TEXT(card, 2, " idxterm");
560 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 561 if (buffer[4] == 0xf6) {
562 dev_err(&card->gdev->dev,
563 "The qeth device is not configured "
564 "for the OSI layer required by z/VM\n");
565 return -EPERM;
566 }
4a71df50
FB		 567 return -EIO;
568 }
569 return 0;
570}
571
572static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
573 __u32 len)
574{
575 struct qeth_card *card;
576
4a71df50 577 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 578 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 579 if (channel == &card->read)
580 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
581 else
582 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
583 channel->ccw.count = len;
584 channel->ccw.cda = (__u32) __pa(iob);
585}
586
587static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
588{
589 __u8 index;
590
847a50fd 591 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 592 index = channel->io_buf_no;
593 do {
594 if (channel->iob[index].state == BUF_STATE_FREE) {
595 channel->iob[index].state = BUF_STATE_LOCKED;
596 channel->io_buf_no = (channel->io_buf_no + 1) %
597 QETH_CMD_BUFFER_NO;
598 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
599 return channel->iob + index;
600 }
601 index = (index + 1) % QETH_CMD_BUFFER_NO;
602 } while (index != channel->io_buf_no);
603
604 return NULL;
605}
606
607void qeth_release_buffer(struct qeth_channel *channel,
608 struct qeth_cmd_buffer *iob)
609{
610 unsigned long flags;
611
847a50fd 612 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 613 spin_lock_irqsave(&channel->iob_lock, flags);
614 memset(iob->data, 0, QETH_BUFSIZE);
615 iob->state = BUF_STATE_FREE;
616 iob->callback = qeth_send_control_data_cb;
617 iob->rc = 0;
618 spin_unlock_irqrestore(&channel->iob_lock, flags);
619}
620EXPORT_SYMBOL_GPL(qeth_release_buffer);
621
622static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
623{
624 struct qeth_cmd_buffer *buffer = NULL;
625 unsigned long flags;
626
627 spin_lock_irqsave(&channel->iob_lock, flags);
628 buffer = __qeth_get_buffer(channel);
629 spin_unlock_irqrestore(&channel->iob_lock, flags);
630 return buffer;
631}
632
633struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
634{
635 struct qeth_cmd_buffer *buffer;
636 wait_event(channel->wait_q,
637 ((buffer = qeth_get_buffer(channel)) != NULL));
638 return buffer;
639}
640EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
641
642void qeth_clear_cmd_buffers(struct qeth_channel *channel)
643{
644 int cnt;
645
646 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
647 qeth_release_buffer(channel, &channel->iob[cnt]);
648 channel->buf_no = 0;
649 channel->io_buf_no = 0;
650}
651EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
652
653static void qeth_send_control_data_cb(struct qeth_channel *channel,
654 struct qeth_cmd_buffer *iob)
655{
656 struct qeth_card *card;
657 struct qeth_reply *reply, *r;
658 struct qeth_ipa_cmd *cmd;
659 unsigned long flags;
660 int keep_reply;
5113fec0 661 int rc = 0;
4a71df50 662
4a71df50 663 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 664 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 665 rc = qeth_check_idx_response(card, iob->data);
666 switch (rc) {
667 case 0:
668 break;
669 case -EIO:
4a71df50 670 qeth_clear_ipacmd_list(card);
5113fec0 671 qeth_schedule_recovery(card);
01fc3e86 672 /* fall through */
5113fec0 673 default:
4a71df50
FB		 674 goto out;
675 }
676
677 cmd = qeth_check_ipa_data(card, iob);
678 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
679 goto out;
680 /*in case of OSN : check if cmd is set */
681 if (card->info.type == QETH_CARD_TYPE_OSN &&
682 cmd &&
683 cmd->hdr.command != IPA_CMD_STARTLAN &&
684 card->osn_info.assist_cb != NULL) {
685 card->osn_info.assist_cb(card->dev, cmd);
686 goto out;
687 }
688
689 spin_lock_irqsave(&card->lock, flags);
690 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
691 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
692 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
693 qeth_get_reply(reply);
694 list_del_init(&reply->list);
695 spin_unlock_irqrestore(&card->lock, flags);
696 keep_reply = 0;
697 if (reply->callback != NULL) {
698 if (cmd) {
699 reply->offset = (__u16)((char *)cmd -
700 (char *)iob->data);
701 keep_reply = reply->callback(card,
702 reply,
703 (unsigned long)cmd);
704 } else
705 keep_reply = reply->callback(card,
706 reply,
707 (unsigned long)iob);
708 }
709 if (cmd)
710 reply->rc = (u16) cmd->hdr.return_code;
711 else if (iob->rc)
712 reply->rc = iob->rc;
713 if (keep_reply) {
714 spin_lock_irqsave(&card->lock, flags);
715 list_add_tail(&reply->list,
716 &card->cmd_waiter_list);
717 spin_unlock_irqrestore(&card->lock, flags);
718 } else {
719 atomic_inc(&reply->received);
720 wake_up(&reply->wait_q);
721 }
722 qeth_put_reply(reply);
723 goto out;
724 }
725 }
726 spin_unlock_irqrestore(&card->lock, flags);
727out:
728 memcpy(&card->seqno.pdu_hdr_ack,
729 QETH_PDU_HEADER_SEQ_NO(iob->data),
730 QETH_SEQ_NO_LENGTH);
731 qeth_release_buffer(channel, iob);
732}
733
734static int qeth_setup_channel(struct qeth_channel *channel)
735{
736 int cnt;
737
d11ba0c4 738 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 739 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 740 channel->iob[cnt].data =
4a71df50
FB		 741 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
742 if (channel->iob[cnt].data == NULL)
743 break;
744 channel->iob[cnt].state = BUF_STATE_FREE;
745 channel->iob[cnt].channel = channel;
746 channel->iob[cnt].callback = qeth_send_control_data_cb;
747 channel->iob[cnt].rc = 0;
748 }
749 if (cnt < QETH_CMD_BUFFER_NO) {
750 while (cnt-- > 0)
751 kfree(channel->iob[cnt].data);
752 return -ENOMEM;
753 }
754 channel->buf_no = 0;
755 channel->io_buf_no = 0;
756 atomic_set(&channel->irq_pending, 0);
757 spin_lock_init(&channel->iob_lock);
758
759 init_waitqueue_head(&channel->wait_q);
760 return 0;
761}
762
763static int qeth_set_thread_start_bit(struct qeth_card *card,
764 unsigned long thread)
765{
766 unsigned long flags;
767
768 spin_lock_irqsave(&card->thread_mask_lock, flags);
769 if (!(card->thread_allowed_mask & thread) ||
770 (card->thread_start_mask & thread)) {
771 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
772 return -EPERM;
773 }
774 card->thread_start_mask |= thread;
775 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
776 return 0;
777}
778
779void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
780{
781 unsigned long flags;
782
783 spin_lock_irqsave(&card->thread_mask_lock, flags);
784 card->thread_start_mask &= ~thread;
785 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
786 wake_up(&card->wait_q);
787}
788EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
789
790void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
791{
792 unsigned long flags;
793
794 spin_lock_irqsave(&card->thread_mask_lock, flags);
795 card->thread_running_mask &= ~thread;
796 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
797 wake_up(&card->wait_q);
798}
799EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
800
801static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
802{
803 unsigned long flags;
804 int rc = 0;
805
806 spin_lock_irqsave(&card->thread_mask_lock, flags);
807 if (card->thread_start_mask & thread) {
808 if ((card->thread_allowed_mask & thread) &&
809 !(card->thread_running_mask & thread)) {
810 rc = 1;
811 card->thread_start_mask &= ~thread;
812 card->thread_running_mask |= thread;
813 } else
814 rc = -EPERM;
815 }
816 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
817 return rc;
818}
819
820int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
821{
822 int rc = 0;
823
824 wait_event(card->wait_q,
825 (rc = __qeth_do_run_thread(card, thread)) >= 0);
826 return rc;
827}
828EXPORT_SYMBOL_GPL(qeth_do_run_thread);
829
830void qeth_schedule_recovery(struct qeth_card *card)
831{
847a50fd 832 QETH_CARD_TEXT(card, 2, "startrec");
0da9581d 833 WARN_ON(1);
4a71df50
FB		 834 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
835 schedule_work(&card->kernel_thread_starter);
836}
837EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
838
839static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
840{
841 int dstat, cstat;
842 char *sense;
847a50fd 843 struct qeth_card *card;
4a71df50
FB		 844
845 sense = (char *) irb->ecw;
23d805b6
PO		 846 cstat = irb->scsw.cmd.cstat;
847 dstat = irb->scsw.cmd.dstat;
847a50fd 848 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 849
850 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
851 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
852 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 853 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 854 dev_warn(&cdev->dev, "The qeth device driver "
855 "failed to recover an error on the device\n");
5113fec0 856 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 857 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 858 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
859 16, 1, irb, 64, 1);
860 return 1;
861 }
862
863 if (dstat & DEV_STAT_UNIT_CHECK) {
864 if (sense[SENSE_RESETTING_EVENT_BYTE] &
865 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 866 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 867 return 1;
868 }
869 if (sense[SENSE_COMMAND_REJECT_BYTE] &
870 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 871 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 872 return 1;
4a71df50
FB		 873 }
874 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 875 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 876 return 1;
877 }
878 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 879 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 880 return 0;
881 }
847a50fd 882 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 883 return 1;
884 }
885 return 0;
886}
887
888static long __qeth_check_irb_error(struct ccw_device *cdev,
889 unsigned long intparm, struct irb *irb)
890{
847a50fd
CO		 891 struct qeth_card *card;
892
893 card = CARD_FROM_CDEV(cdev);
894
4a71df50
FB		 895 if (!IS_ERR(irb))
896 return 0;
897
898 switch (PTR_ERR(irb)) {
899 case -EIO:
74eacdb9
FB		 900 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
901 dev_name(&cdev->dev));
847a50fd
CO		 902 QETH_CARD_TEXT(card, 2, "ckirberr");
903 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 904 break;
905 case -ETIMEDOUT:
74eacdb9
FB		 906 dev_warn(&cdev->dev, "A hardware operation timed out"
907 " on the device\n");
847a50fd
CO		 908 QETH_CARD_TEXT(card, 2, "ckirberr");
909 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 910 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 911 if (card && (card->data.ccwdev == cdev)) {
912 card->data.state = CH_STATE_DOWN;
913 wake_up(&card->wait_q);
914 }
915 }
916 break;
917 default:
74eacdb9
FB		 918 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
919 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 920 QETH_CARD_TEXT(card, 2, "ckirberr");
921 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 922 }
923 return PTR_ERR(irb);
924}
925
926static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
927 struct irb *irb)
928{
929 int rc;
930 int cstat, dstat;
931 struct qeth_cmd_buffer *buffer;
932 struct qeth_channel *channel;
933 struct qeth_card *card;
934 struct qeth_cmd_buffer *iob;
935 __u8 index;
936
4a71df50
FB		 937 if (__qeth_check_irb_error(cdev, intparm, irb))
938 return;
23d805b6
PO		 939 cstat = irb->scsw.cmd.cstat;
940 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 941
942 card = CARD_FROM_CDEV(cdev);
943 if (!card)
944 return;
945
847a50fd
CO		 946 QETH_CARD_TEXT(card, 5, "irq");
947
4a71df50
FB		 948 if (card->read.ccwdev == cdev) {
949 channel = &card->read;
847a50fd 950 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 951 } else if (card->write.ccwdev == cdev) {
952 channel = &card->write;
847a50fd 953 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 954 } else {
955 channel = &card->data;
847a50fd 956 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 957 }
958 atomic_set(&channel->irq_pending, 0);
959
23d805b6 960 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 961 channel->state = CH_STATE_STOPPED;
962
23d805b6 963 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 964 channel->state = CH_STATE_HALTED;
965
966 /*let's wake up immediately on data channel*/
967 if ((channel == &card->data) && (intparm != 0) &&
968 (intparm != QETH_RCD_PARM))
969 goto out;
970
971 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 972 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 973 /* we don't have to handle this further */
974 intparm = 0;
975 }
976 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 977 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 978 /* we don't have to handle this further */
979 intparm = 0;
980 }
981 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
982 (dstat & DEV_STAT_UNIT_CHECK) ||
983 (cstat)) {
984 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 985 dev_warn(&channel->ccwdev->dev,
986 "The qeth device driver failed to recover "
987 "an error on the device\n");
988 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
989 "0x%X dstat 0x%X\n",
990 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 991 print_hex_dump(KERN_WARNING, "qeth: irb ",
992 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
993 print_hex_dump(KERN_WARNING, "qeth: sense data ",
994 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
995 }
996 if (intparm == QETH_RCD_PARM) {
997 channel->state = CH_STATE_DOWN;
998 goto out;
999 }
1000 rc = qeth_get_problem(cdev, irb);
1001 if (rc) {
28a7e4c9 1002 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1003 qeth_schedule_recovery(card);
1004 goto out;
1005 }
1006 }
1007
1008 if (intparm == QETH_RCD_PARM) {
1009 channel->state = CH_STATE_RCD_DONE;
1010 goto out;
1011 }
1012 if (intparm) {
1013 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1014 buffer->state = BUF_STATE_PROCESSED;
1015 }
1016 if (channel == &card->data)
1017 return;
1018 if (channel == &card->read &&
1019 channel->state == CH_STATE_UP)
1020 qeth_issue_next_read(card);
1021
1022 iob = channel->iob;
1023 index = channel->buf_no;
1024 while (iob[index].state == BUF_STATE_PROCESSED) {
1025 if (iob[index].callback != NULL)
1026 iob[index].callback(channel, iob + index);
1027
1028 index = (index + 1) % QETH_CMD_BUFFER_NO;
1029 }
1030 channel->buf_no = index;
1031out:
1032 wake_up(&card->wait_q);
1033 return;
1034}
1035
b67d801f 1036static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
0da9581d
EL		 1037 struct qeth_qdio_out_buffer *buf,
1038 enum qeth_qdio_buffer_states newbufstate)
4a71df50
FB		 1039{
1040 int i;
1041 struct sk_buff *skb;
1042
1043 /* is PCI flag set on buffer? */
3ec90878 1044 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
4a71df50
FB		 1045 atomic_dec(&queue->set_pci_flags_count);
1046
b67d801f
UB		 1047 skb = skb_dequeue(&buf->skb_list);
1048 while (skb) {
1049 atomic_dec(&skb->users);
1050 dev_kfree_skb_any(skb);
4a71df50
FB		 1051 skb = skb_dequeue(&buf->skb_list);
1052 }
4a71df50 1053 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1054 if (buf->buffer->element[i].addr && buf->is_header[i])
1055 kmem_cache_free(qeth_core_header_cache,
1056 buf->buffer->element[i].addr);
1057 buf->is_header[i] = 0;
4a71df50
FB		 1058 buf->buffer->element[i].length = 0;
1059 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1060 buf->buffer->element[i].eflags = 0;
1061 buf->buffer->element[i].sflags = 0;
4a71df50 1062 }
3ec90878
JG		 1063 buf->buffer->element[15].eflags = 0;
1064 buf->buffer->element[15].sflags = 0;
4a71df50 1065 buf->next_element_to_fill = 0;
0da9581d
EL		 1066 atomic_set(&buf->state, newbufstate);
1067}
1068
1069static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1070{
1071 int j;
1072
1073 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1074 if (!q->bufs[j])
1075 continue;
1076 qeth_cleanup_handled_pending(q, j, free);
1077 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1078 if (free) {
1079 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1080 q->bufs[j] = NULL;
1081 }
1082 }
4a71df50
FB		 1083}
1084
1085void qeth_clear_qdio_buffers(struct qeth_card *card)
1086{
0da9581d 1087 int i;
4a71df50 1088
847a50fd 1089 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1090 /* clear outbound buffers to free skbs */
0da9581d 1091 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1092 if (card->qdio.out_qs[i]) {
0da9581d 1093 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1094 }
0da9581d 1095 }
4a71df50
FB		 1096}
1097EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1098
1099static void qeth_free_buffer_pool(struct qeth_card *card)
1100{
1101 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1102 int i = 0;
4a71df50
FB		 1103 list_for_each_entry_safe(pool_entry, tmp,
1104 &card->qdio.init_pool.entry_list, init_list){
1105 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1106 free_page((unsigned long)pool_entry->elements[i]);
1107 list_del(&pool_entry->init_list);
1108 kfree(pool_entry);
1109 }
1110}
1111
1112static void qeth_free_qdio_buffers(struct qeth_card *card)
1113{
0da9581d 1114 int i;
4a71df50 1115
4a71df50
FB		 1116 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1117 QETH_QDIO_UNINITIALIZED)
1118 return;
0da9581d
EL		 1119
1120 qeth_free_cq(card);
1121
4a71df50
FB		 1122 kfree(card->qdio.in_q);
1123 card->qdio.in_q = NULL;
1124 /* inbound buffer pool */
1125 qeth_free_buffer_pool(card);
1126 /* free outbound qdio_qs */
1127 if (card->qdio.out_qs) {
1128 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1129 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1130 kfree(card->qdio.out_qs[i]);
1131 }
1132 kfree(card->qdio.out_qs);
1133 card->qdio.out_qs = NULL;
1134 }
1135}
1136
1137static void qeth_clean_channel(struct qeth_channel *channel)
1138{
1139 int cnt;
1140
d11ba0c4 1141 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1142 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1143 kfree(channel->iob[cnt].data);
1144}
1145
5113fec0 1146static void qeth_get_channel_path_desc(struct qeth_card *card)
4a71df50 1147{
4a71df50
FB		 1148 struct ccw_device *ccwdev;
1149 struct channelPath_dsc {
1150 u8 flags;
1151 u8 lsn;
1152 u8 desc;
1153 u8 chpid;
1154 u8 swla;
1155 u8 zeroes;
1156 u8 chla;
1157 u8 chpp;
1158 } *chp_dsc;
1159
5113fec0 1160 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1161
1162 ccwdev = card->data.ccwdev;
1163 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1164 if (chp_dsc != NULL) {
99558ea9
UB		 1165 if (card->info.type != QETH_CARD_TYPE_IQD) {
1166 /* CHPP field bit 6 == 1 -> single queue */
1167 if ((chp_dsc->chpp & 0x02) == 0x02) {
1168 if ((atomic_read(&card->qdio.state) !=
1169 QETH_QDIO_UNINITIALIZED) &&
1170 (card->qdio.no_out_queues == 4))
1171 /* change from 4 to 1 outbound queues */
1172 qeth_free_qdio_buffers(card);
1173 card->qdio.no_out_queues = 1;
1174 if (card->qdio.default_out_queue != 0)
1175 dev_info(&card->gdev->dev,
d0ff1f52 1176 "Priority Queueing not supported\n");
99558ea9
UB		 1177 card->qdio.default_out_queue = 0;
1178 } else {
1179 if ((atomic_read(&card->qdio.state) !=
1180 QETH_QDIO_UNINITIALIZED) &&
1181 (card->qdio.no_out_queues == 1)) {
1182 /* change from 1 to 4 outbound queues */
1183 qeth_free_qdio_buffers(card);
1184 card->qdio.default_out_queue = 2;
1185 }
1186 card->qdio.no_out_queues = 4;
d0ff1f52 1187 }
d0ff1f52 1188 }
5113fec0 1189 card->info.func_level = 0x4100 + chp_dsc->desc;
4a71df50
FB		 1190 kfree(chp_dsc);
1191 }
5113fec0
UB		 1192 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1193 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1194 return;
4a71df50
FB		 1195}
1196
1197static void qeth_init_qdio_info(struct qeth_card *card)
1198{
d11ba0c4 1199 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1200 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1201 /* inbound */
1202 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1203 if (card->info.type == QETH_CARD_TYPE_IQD)
1204 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1205 else
1206 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1207 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1208 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1209 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1210}
1211
1212static void qeth_set_intial_options(struct qeth_card *card)
1213{
1214 card->options.route4.type = NO_ROUTER;
1215 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1216 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1217 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1218 card->options.fake_broadcast = 0;
1219 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1220 card->options.performance_stats = 0;
1221 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1222 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1223 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1224}
1225
1226static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1227{
1228 unsigned long flags;
1229 int rc = 0;
1230
1231 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1232 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1233 (u8) card->thread_start_mask,
1234 (u8) card->thread_allowed_mask,
1235 (u8) card->thread_running_mask);
1236 rc = (card->thread_start_mask & thread);
1237 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1238 return rc;
1239}
1240
1241static void qeth_start_kernel_thread(struct work_struct *work)
1242{
1243 struct qeth_card *card = container_of(work, struct qeth_card,
1244 kernel_thread_starter);
847a50fd 1245 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1246
1247 if (card->read.state != CH_STATE_UP &&
1248 card->write.state != CH_STATE_UP)
1249 return;
1250 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1251 kthread_run(card->discipline.recover, (void *) card,
1252 "qeth_recover");
1253}
1254
1255static int qeth_setup_card(struct qeth_card *card)
1256{
1257
d11ba0c4
PT		 1258 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1259 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1260
1261 card->read.state = CH_STATE_DOWN;
1262 card->write.state = CH_STATE_DOWN;
1263 card->data.state = CH_STATE_DOWN;
1264 card->state = CARD_STATE_DOWN;
1265 card->lan_online = 0;
908abbb5 1266 card->read_or_write_problem = 0;
4a71df50
FB		 1267 card->dev = NULL;
1268 spin_lock_init(&card->vlanlock);
1269 spin_lock_init(&card->mclock);
4a71df50
FB		 1270 spin_lock_init(&card->lock);
1271 spin_lock_init(&card->ip_lock);
1272 spin_lock_init(&card->thread_mask_lock);
c4949f07 1273 mutex_init(&card->conf_mutex);
9dc48ccc 1274 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1275 card->thread_start_mask = 0;
1276 card->thread_allowed_mask = 0;
1277 card->thread_running_mask = 0;
1278 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1279 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1280 INIT_LIST_HEAD(card->ip_tbd_list);
1281 INIT_LIST_HEAD(&card->cmd_waiter_list);
1282 init_waitqueue_head(&card->wait_q);
25985edc 1283 /* initial options */
4a71df50
FB		 1284 qeth_set_intial_options(card);
1285 /* IP address takeover */
1286 INIT_LIST_HEAD(&card->ipato.entries);
1287 card->ipato.enabled = 0;
1288 card->ipato.invert4 = 0;
1289 card->ipato.invert6 = 0;
1290 /* init QDIO stuff */
1291 qeth_init_qdio_info(card);
1292 return 0;
1293}
1294
6bcac508
MS		 1295static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1296{
1297 struct qeth_card *card = container_of(slr, struct qeth_card,
1298 qeth_service_level);
0d788c7d
KDW		 1299 if (card->info.mcl_level[0])
1300 seq_printf(m, "qeth: %s firmware level %s\n",
1301 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1302}
1303
4a71df50
FB		 1304static struct qeth_card *qeth_alloc_card(void)
1305{
1306 struct qeth_card *card;
1307
d11ba0c4 1308 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1309 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1310 if (!card)
76b11f8e 1311 goto out;
d11ba0c4 1312 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1313 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1314 if (!card->ip_tbd_list) {
1315 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1316 goto out_card;
4a71df50 1317 }
76b11f8e
UB		 1318 if (qeth_setup_channel(&card->read))
1319 goto out_ip;
1320 if (qeth_setup_channel(&card->write))
1321 goto out_channel;
4a71df50 1322 card->options.layer2 = -1;
6bcac508
MS		 1323 card->qeth_service_level.seq_print = qeth_core_sl_print;
1324 register_service_level(&card->qeth_service_level);
4a71df50 1325 return card;
76b11f8e
UB		 1326
1327out_channel:
1328 qeth_clean_channel(&card->read);
1329out_ip:
1330 kfree(card->ip_tbd_list);
1331out_card:
1332 kfree(card);
1333out:
1334 return NULL;
4a71df50
FB		 1335}
1336
1337static int qeth_determine_card_type(struct qeth_card *card)
1338{
1339 int i = 0;
1340
d11ba0c4 1341 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1342
1343 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1344 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1345 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1346 if ((CARD_RDEV(card)->id.dev_type ==
1347 known_devices[i][QETH_DEV_TYPE_IND]) &&
1348 (CARD_RDEV(card)->id.dev_model ==
1349 known_devices[i][QETH_DEV_MODEL_IND])) {
1350 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1351 card->qdio.no_out_queues =
1352 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1353 card->qdio.no_in_queues = 1;
5113fec0
UB		 1354 card->info.is_multicast_different =
1355 known_devices[i][QETH_MULTICAST_IND];
1356 qeth_get_channel_path_desc(card);
4a71df50
FB		 1357 return 0;
1358 }
1359 i++;
1360 }
1361 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1362 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1363 "unknown type\n");
4a71df50
FB		 1364 return -ENOENT;
1365}
1366
1367static int qeth_clear_channel(struct qeth_channel *channel)
1368{
1369 unsigned long flags;
1370 struct qeth_card *card;
1371 int rc;
1372
4a71df50 1373 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1374 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1375 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1376 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1377 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1378
1379 if (rc)
1380 return rc;
1381 rc = wait_event_interruptible_timeout(card->wait_q,
1382 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1383 if (rc == -ERESTARTSYS)
1384 return rc;
1385 if (channel->state != CH_STATE_STOPPED)
1386 return -ETIME;
1387 channel->state = CH_STATE_DOWN;
1388 return 0;
1389}
1390
1391static int qeth_halt_channel(struct qeth_channel *channel)
1392{
1393 unsigned long flags;
1394 struct qeth_card *card;
1395 int rc;
1396
4a71df50 1397 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1398 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1399 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1400 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1401 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1402
1403 if (rc)
1404 return rc;
1405 rc = wait_event_interruptible_timeout(card->wait_q,
1406 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1407 if (rc == -ERESTARTSYS)
1408 return rc;
1409 if (channel->state != CH_STATE_HALTED)
1410 return -ETIME;
1411 return 0;
1412}
1413
1414static int qeth_halt_channels(struct qeth_card *card)
1415{
1416 int rc1 = 0, rc2 = 0, rc3 = 0;
1417
847a50fd 1418 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1419 rc1 = qeth_halt_channel(&card->read);
1420 rc2 = qeth_halt_channel(&card->write);
1421 rc3 = qeth_halt_channel(&card->data);
1422 if (rc1)
1423 return rc1;
1424 if (rc2)
1425 return rc2;
1426 return rc3;
1427}
1428
1429static int qeth_clear_channels(struct qeth_card *card)
1430{
1431 int rc1 = 0, rc2 = 0, rc3 = 0;
1432
847a50fd 1433 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1434 rc1 = qeth_clear_channel(&card->read);
1435 rc2 = qeth_clear_channel(&card->write);
1436 rc3 = qeth_clear_channel(&card->data);
1437 if (rc1)
1438 return rc1;
1439 if (rc2)
1440 return rc2;
1441 return rc3;
1442}
1443
1444static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1445{
1446 int rc = 0;
1447
847a50fd 1448 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1449
1450 if (halt)
1451 rc = qeth_halt_channels(card);
1452 if (rc)
1453 return rc;
1454 return qeth_clear_channels(card);
1455}
1456
1457int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1458{
1459 int rc = 0;
1460
847a50fd 1461 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1462 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1463 QETH_QDIO_CLEANING)) {
1464 case QETH_QDIO_ESTABLISHED:
1465 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1466 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1467 QDIO_FLAG_CLEANUP_USING_HALT);
1468 else
cc961d40 1469 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1470 QDIO_FLAG_CLEANUP_USING_CLEAR);
1471 if (rc)
847a50fd 1472 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1473 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1474 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1475 break;
1476 case QETH_QDIO_CLEANING:
1477 return rc;
1478 default:
1479 break;
1480 }
1481 rc = qeth_clear_halt_card(card, use_halt);
1482 if (rc)
847a50fd 1483 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1484 card->state = CARD_STATE_DOWN;
1485 return rc;
1486}
1487EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1488
1489static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1490 int *length)
1491{
1492 struct ciw *ciw;
1493 char *rcd_buf;
1494 int ret;
1495 struct qeth_channel *channel = &card->data;
1496 unsigned long flags;
1497
1498 /*
1499 * scan for RCD command in extended SenseID data
1500 */
1501 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1502 if (!ciw || ciw->cmd == 0)
1503 return -EOPNOTSUPP;
1504 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1505 if (!rcd_buf)
1506 return -ENOMEM;
1507
1508 channel->ccw.cmd_code = ciw->cmd;
1509 channel->ccw.cda = (__u32) __pa(rcd_buf);
1510 channel->ccw.count = ciw->count;
1511 channel->ccw.flags = CCW_FLAG_SLI;
1512 channel->state = CH_STATE_RCD;
1513 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1514 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1515 QETH_RCD_PARM, LPM_ANYPATH, 0,
1516 QETH_RCD_TIMEOUT);
1517 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1518 if (!ret)
1519 wait_event(card->wait_q,
1520 (channel->state == CH_STATE_RCD_DONE ||
1521 channel->state == CH_STATE_DOWN));
1522 if (channel->state == CH_STATE_DOWN)
1523 ret = -EIO;
1524 else
1525 channel->state = CH_STATE_DOWN;
1526 if (ret) {
1527 kfree(rcd_buf);
1528 *buffer = NULL;
1529 *length = 0;
1530 } else {
1531 *length = ciw->count;
1532 *buffer = rcd_buf;
1533 }
1534 return ret;
1535}
1536
a60389ab 1537static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1538{
a60389ab 1539 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1540 card->info.chpid = prcd[30];
1541 card->info.unit_addr2 = prcd[31];
1542 card->info.cula = prcd[63];
1543 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1544 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1545}
1546
1547static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1548{
1549 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1550
1551 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1552 card->info.blkt.time_total = 250;
1553 card->info.blkt.inter_packet = 5;
1554 card->info.blkt.inter_packet_jumbo = 15;
1555 } else {
1556 card->info.blkt.time_total = 0;
1557 card->info.blkt.inter_packet = 0;
1558 card->info.blkt.inter_packet_jumbo = 0;
1559 }
4a71df50
FB		 1560}
1561
1562static void qeth_init_tokens(struct qeth_card *card)
1563{
1564 card->token.issuer_rm_w = 0x00010103UL;
1565 card->token.cm_filter_w = 0x00010108UL;
1566 card->token.cm_connection_w = 0x0001010aUL;
1567 card->token.ulp_filter_w = 0x0001010bUL;
1568 card->token.ulp_connection_w = 0x0001010dUL;
1569}
1570
1571static void qeth_init_func_level(struct qeth_card *card)
1572{
5113fec0
UB		 1573 switch (card->info.type) {
1574 case QETH_CARD_TYPE_IQD:
6298263a 1575 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1576 break;
1577 case QETH_CARD_TYPE_OSD:
0132951e 1578 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1579 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1580 break;
1581 default:
1582 break;
4a71df50
FB		 1583 }
1584}
1585
4a71df50
FB		 1586static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1587 void (*idx_reply_cb)(struct qeth_channel *,
1588 struct qeth_cmd_buffer *))
1589{
1590 struct qeth_cmd_buffer *iob;
1591 unsigned long flags;
1592 int rc;
1593 struct qeth_card *card;
1594
d11ba0c4 1595 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1596 card = CARD_FROM_CDEV(channel->ccwdev);
1597 iob = qeth_get_buffer(channel);
1598 iob->callback = idx_reply_cb;
1599 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1600 channel->ccw.count = QETH_BUFSIZE;
1601 channel->ccw.cda = (__u32) __pa(iob->data);
1602
1603 wait_event(card->wait_q,
1604 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1605 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1606 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1607 rc = ccw_device_start(channel->ccwdev,
1608 &channel->ccw, (addr_t) iob, 0, 0);
1609 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1610
1611 if (rc) {
14cc21b6 1612 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1613 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1614 atomic_set(&channel->irq_pending, 0);
1615 wake_up(&card->wait_q);
1616 return rc;
1617 }
1618 rc = wait_event_interruptible_timeout(card->wait_q,
1619 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1620 if (rc == -ERESTARTSYS)
1621 return rc;
1622 if (channel->state != CH_STATE_UP) {
1623 rc = -ETIME;
d11ba0c4 1624 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1625 qeth_clear_cmd_buffers(channel);
1626 } else
1627 rc = 0;
1628 return rc;
1629}
1630
1631static int qeth_idx_activate_channel(struct qeth_channel *channel,
1632 void (*idx_reply_cb)(struct qeth_channel *,
1633 struct qeth_cmd_buffer *))
1634{
1635 struct qeth_card *card;
1636 struct qeth_cmd_buffer *iob;
1637 unsigned long flags;
1638 __u16 temp;
1639 __u8 tmp;
1640 int rc;
f06f6f32 1641 struct ccw_dev_id temp_devid;
4a71df50
FB		 1642
1643 card = CARD_FROM_CDEV(channel->ccwdev);
1644
d11ba0c4 1645 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1646
1647 iob = qeth_get_buffer(channel);
1648 iob->callback = idx_reply_cb;
1649 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1650 channel->ccw.count = IDX_ACTIVATE_SIZE;
1651 channel->ccw.cda = (__u32) __pa(iob->data);
1652 if (channel == &card->write) {
1653 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1654 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1655 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1656 card->seqno.trans_hdr++;
1657 } else {
1658 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1659 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1660 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1661 }
1662 tmp = ((__u8)card->info.portno) | 0x80;
1663 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1664 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1665 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1666 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1667 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1668 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1669 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1670 temp = (card->info.cula << 8) + card->info.unit_addr2;
1671 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1672
1673 wait_event(card->wait_q,
1674 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1675 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1676 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1677 rc = ccw_device_start(channel->ccwdev,
1678 &channel->ccw, (addr_t) iob, 0, 0);
1679 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1680
1681 if (rc) {
14cc21b6
FB		 1682 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1683 rc);
d11ba0c4 1684 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1685 atomic_set(&channel->irq_pending, 0);
1686 wake_up(&card->wait_q);
1687 return rc;
1688 }
1689 rc = wait_event_interruptible_timeout(card->wait_q,
1690 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1691 if (rc == -ERESTARTSYS)
1692 return rc;
1693 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1694 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1695 " failed to recover an error on the device\n");
1696 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1697 dev_name(&channel->ccwdev->dev));
d11ba0c4 1698 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1699 qeth_clear_cmd_buffers(channel);
1700 return -ETIME;
1701 }
1702 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1703}
1704
1705static int qeth_peer_func_level(int level)
1706{
1707 if ((level & 0xff) == 8)
1708 return (level & 0xff) + 0x400;
1709 if (((level >> 8) & 3) == 1)
1710 return (level & 0xff) + 0x200;
1711 return level;
1712}
1713
1714static void qeth_idx_write_cb(struct qeth_channel *channel,
1715 struct qeth_cmd_buffer *iob)
1716{
1717 struct qeth_card *card;
1718 __u16 temp;
1719
d11ba0c4 1720 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1721
1722 if (channel->state == CH_STATE_DOWN) {
1723 channel->state = CH_STATE_ACTIVATING;
1724 goto out;
1725 }
1726 card = CARD_FROM_CDEV(channel->ccwdev);
1727
1728 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1729 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1730 dev_err(&card->write.ccwdev->dev,
1731 "The adapter is used exclusively by another "
1732 "host\n");
4a71df50 1733 else
74eacdb9
FB		 1734 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1735 " negative reply\n",
1736 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1737 goto out;
1738 }
1739 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1740 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1741 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1742 "function level mismatch (sent: 0x%x, received: "
1743 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1744 card->info.func_level, temp);
4a71df50
FB		 1745 goto out;
1746 }
1747 channel->state = CH_STATE_UP;
1748out:
1749 qeth_release_buffer(channel, iob);
1750}
1751
1752static void qeth_idx_read_cb(struct qeth_channel *channel,
1753 struct qeth_cmd_buffer *iob)
1754{
1755 struct qeth_card *card;
1756 __u16 temp;
1757
d11ba0c4 1758 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1759 if (channel->state == CH_STATE_DOWN) {
1760 channel->state = CH_STATE_ACTIVATING;
1761 goto out;
1762 }
1763
1764 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1765 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1766 goto out;
1767
1768 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1769 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1770 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1771 dev_err(&card->write.ccwdev->dev,
1772 "The adapter is used exclusively by another "
1773 "host\n");
5113fec0
UB		 1774 break;
1775 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1776 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1777 dev_err(&card->read.ccwdev->dev,
1778 "Setting the device online failed because of "
01fc3e86 1779 "insufficient authorization\n");
5113fec0
UB		 1780 break;
1781 default:
74eacdb9
FB		 1782 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1783 " negative reply\n",
1784 dev_name(&card->read.ccwdev->dev));
5113fec0 1785 }
01fc3e86
UB		 1786 QETH_CARD_TEXT_(card, 2, "idxread%c",
1787 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1788 goto out;
1789 }
1790
1791/**
5113fec0
UB		 1792 * * temporary fix for microcode bug
1793 * * to revert it,replace OR by AND
1794 * */
4a71df50 1795 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1796 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1797 card->info.portname_required = 1;
1798
1799 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1800 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1801 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1802 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1803 dev_name(&card->read.ccwdev->dev),
1804 card->info.func_level, temp);
4a71df50
FB		 1805 goto out;
1806 }
1807 memcpy(&card->token.issuer_rm_r,
1808 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1809 QETH_MPC_TOKEN_LENGTH);
1810 memcpy(&card->info.mcl_level[0],
1811 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1812 channel->state = CH_STATE_UP;
1813out:
1814 qeth_release_buffer(channel, iob);
1815}
1816
1817void qeth_prepare_control_data(struct qeth_card *card, int len,
1818 struct qeth_cmd_buffer *iob)
1819{
1820 qeth_setup_ccw(&card->write, iob->data, len);
1821 iob->callback = qeth_release_buffer;
1822
1823 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1824 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1825 card->seqno.trans_hdr++;
1826 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1827 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1828 card->seqno.pdu_hdr++;
1829 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1830 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1831 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1832}
1833EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1834
1835int qeth_send_control_data(struct qeth_card *card, int len,
1836 struct qeth_cmd_buffer *iob,
1837 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1838 unsigned long),
1839 void *reply_param)
1840{
1841 int rc;
1842 unsigned long flags;
1843 struct qeth_reply *reply = NULL;
7834cd5a 1844 unsigned long timeout, event_timeout;
5b54e16f 1845 struct qeth_ipa_cmd *cmd;
4a71df50 1846
847a50fd 1847 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1848
908abbb5
UB		 1849 if (card->read_or_write_problem) {
1850 qeth_release_buffer(iob->channel, iob);
1851 return -EIO;
1852 }
4a71df50
FB		 1853 reply = qeth_alloc_reply(card);
1854 if (!reply) {
4a71df50
FB		 1855 return -ENOMEM;
1856 }
1857 reply->callback = reply_cb;
1858 reply->param = reply_param;
1859 if (card->state == CARD_STATE_DOWN)
1860 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1861 else
1862 reply->seqno = card->seqno.ipa++;
1863 init_waitqueue_head(&reply->wait_q);
1864 spin_lock_irqsave(&card->lock, flags);
1865 list_add_tail(&reply->list, &card->cmd_waiter_list);
1866 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1867 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1868
1869 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1870 qeth_prepare_control_data(card, len, iob);
1871
1872 if (IS_IPA(iob->data))
7834cd5a 1873 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 1874 else
7834cd5a
HC		 1875 event_timeout = QETH_TIMEOUT;
1876 timeout = jiffies + event_timeout;
4a71df50 1877
847a50fd 1878 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 1879 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1880 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1881 (addr_t) iob, 0, 0);
1882 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1883 if (rc) {
74eacdb9
FB		 1884 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1885 "ccw_device_start rc = %i\n",
1886 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 1887 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 1888 spin_lock_irqsave(&card->lock, flags);
1889 list_del_init(&reply->list);
1890 qeth_put_reply(reply);
1891 spin_unlock_irqrestore(&card->lock, flags);
1892 qeth_release_buffer(iob->channel, iob);
1893 atomic_set(&card->write.irq_pending, 0);
1894 wake_up(&card->wait_q);
1895 return rc;
1896 }
5b54e16f
FB		 1897
1898 /* we have only one long running ipassist, since we can ensure
1899 process context of this command we can sleep */
1900 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1901 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1902 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1903 if (!wait_event_timeout(reply->wait_q,
7834cd5a 1904 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 1905 goto time_err;
1906 } else {
1907 while (!atomic_read(&reply->received)) {
1908 if (time_after(jiffies, timeout))
1909 goto time_err;
1910 cpu_relax();
1911 };
1912 }
1913
70919e23
UB		 1914 if (reply->rc == -EIO)
1915 goto error;
5b54e16f
FB		 1916 rc = reply->rc;
1917 qeth_put_reply(reply);
1918 return rc;
1919
1920time_err:
70919e23 1921 reply->rc = -ETIME;
5b54e16f
FB		 1922 spin_lock_irqsave(&reply->card->lock, flags);
1923 list_del_init(&reply->list);
1924 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 1925 atomic_inc(&reply->received);
70919e23 1926error:
908abbb5
UB		 1927 atomic_set(&card->write.irq_pending, 0);
1928 qeth_release_buffer(iob->channel, iob);
1929 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 1930 rc = reply->rc;
1931 qeth_put_reply(reply);
1932 return rc;
1933}
1934EXPORT_SYMBOL_GPL(qeth_send_control_data);
1935
1936static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1937 unsigned long data)
1938{
1939 struct qeth_cmd_buffer *iob;
1940
d11ba0c4 1941 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1942
1943 iob = (struct qeth_cmd_buffer *) data;
1944 memcpy(&card->token.cm_filter_r,
1945 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1946 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1947 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1948 return 0;
1949}
1950
1951static int qeth_cm_enable(struct qeth_card *card)
1952{
1953 int rc;
1954 struct qeth_cmd_buffer *iob;
1955
d11ba0c4 1956 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1957
1958 iob = qeth_wait_for_buffer(&card->write);
1959 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1960 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1961 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1962 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1963 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1964
1965 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1966 qeth_cm_enable_cb, NULL);
1967 return rc;
1968}
1969
1970static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1971 unsigned long data)
1972{
1973
1974 struct qeth_cmd_buffer *iob;
1975
d11ba0c4 1976 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1977
1978 iob = (struct qeth_cmd_buffer *) data;
1979 memcpy(&card->token.cm_connection_r,
1980 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1981 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1982 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1983 return 0;
1984}
1985
1986static int qeth_cm_setup(struct qeth_card *card)
1987{
1988 int rc;
1989 struct qeth_cmd_buffer *iob;
1990
d11ba0c4 1991 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1992
1993 iob = qeth_wait_for_buffer(&card->write);
1994 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1995 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1996 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1997 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1998 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1999 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2000 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2001 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2002 qeth_cm_setup_cb, NULL);
2003 return rc;
2004
2005}
2006
2007static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2008{
2009 switch (card->info.type) {
2010 case QETH_CARD_TYPE_UNKNOWN:
2011 return 1500;
2012 case QETH_CARD_TYPE_IQD:
2013 return card->info.max_mtu;
5113fec0 2014 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2015 switch (card->info.link_type) {
2016 case QETH_LINK_TYPE_HSTR:
2017 case QETH_LINK_TYPE_LANE_TR:
2018 return 2000;
2019 default:
2020 return 1492;
2021 }
5113fec0
UB		 2022 case QETH_CARD_TYPE_OSM:
2023 case QETH_CARD_TYPE_OSX:
2024 return 1492;
4a71df50
FB		 2025 default:
2026 return 1500;
2027 }
2028}
2029
4a71df50
FB		 2030static inline int qeth_get_mtu_outof_framesize(int framesize)
2031{
2032 switch (framesize) {
2033 case 0x4000:
2034 return 8192;
2035 case 0x6000:
2036 return 16384;
2037 case 0xa000:
2038 return 32768;
2039 case 0xffff:
2040 return 57344;
2041 default:
2042 return 0;
2043 }
2044}
2045
2046static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2047{
2048 switch (card->info.type) {
5113fec0
UB		 2049 case QETH_CARD_TYPE_OSD:
2050 case QETH_CARD_TYPE_OSM:
2051 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2052 case QETH_CARD_TYPE_IQD:
2053 return ((mtu >= 576) &&
9853b97b 2054 (mtu <= card->info.max_mtu));
4a71df50
FB		 2055 case QETH_CARD_TYPE_OSN:
2056 case QETH_CARD_TYPE_UNKNOWN:
2057 default:
2058 return 1;
2059 }
2060}
2061
2062static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2063 unsigned long data)
2064{
2065
2066 __u16 mtu, framesize;
2067 __u16 len;
2068 __u8 link_type;
2069 struct qeth_cmd_buffer *iob;
2070
d11ba0c4 2071 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2072
2073 iob = (struct qeth_cmd_buffer *) data;
2074 memcpy(&card->token.ulp_filter_r,
2075 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2076 QETH_MPC_TOKEN_LENGTH);
9853b97b 2077 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2078 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2079 mtu = qeth_get_mtu_outof_framesize(framesize);
2080 if (!mtu) {
2081 iob->rc = -EINVAL;
d11ba0c4 2082 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2083 return 0;
2084 }
8b2e18f6
UB		 2085 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2086 /* frame size has changed */
2087 if (card->dev &&
2088 ((card->dev->mtu == card->info.initial_mtu) ||
2089 (card->dev->mtu > mtu)))
2090 card->dev->mtu = mtu;
2091 qeth_free_qdio_buffers(card);
2092 }
4a71df50 2093 card->info.initial_mtu = mtu;
8b2e18f6 2094 card->info.max_mtu = mtu;
4a71df50
FB		 2095 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2096 } else {
2097 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 2098 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2099 iob->data);
4a71df50
FB		 2100 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2101 }
2102
2103 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2104 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2105 memcpy(&link_type,
2106 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2107 card->info.link_type = link_type;
2108 } else
2109 card->info.link_type = 0;
01fc3e86 2110 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2111 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2112 return 0;
2113}
2114
2115static int qeth_ulp_enable(struct qeth_card *card)
2116{
2117 int rc;
2118 char prot_type;
2119 struct qeth_cmd_buffer *iob;
2120
2121 /*FIXME: trace view callbacks*/
d11ba0c4 2122 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2123
2124 iob = qeth_wait_for_buffer(&card->write);
2125 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2126
2127 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2128 (__u8) card->info.portno;
2129 if (card->options.layer2)
2130 if (card->info.type == QETH_CARD_TYPE_OSN)
2131 prot_type = QETH_PROT_OSN2;
2132 else
2133 prot_type = QETH_PROT_LAYER2;
2134 else
2135 prot_type = QETH_PROT_TCPIP;
2136
2137 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2138 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2139 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2140 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2141 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2142 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2143 card->info.portname, 9);
2144 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2145 qeth_ulp_enable_cb, NULL);
2146 return rc;
2147
2148}
2149
2150static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2151 unsigned long data)
2152{
2153 struct qeth_cmd_buffer *iob;
65a1f898 2154 int rc = 0;
4a71df50 2155
d11ba0c4 2156 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2157
2158 iob = (struct qeth_cmd_buffer *) data;
2159 memcpy(&card->token.ulp_connection_r,
2160 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2161 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2162 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2163 3)) {
2164 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2165 dev_err(&card->gdev->dev, "A connection could not be "
2166 "established because of an OLM limit\n");
bbb822a8 2167 iob->rc = -EMLINK;
65a1f898 2168 }
d11ba0c4 2169 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
65a1f898 2170 return rc;
4a71df50
FB		 2171}
2172
2173static int qeth_ulp_setup(struct qeth_card *card)
2174{
2175 int rc;
2176 __u16 temp;
2177 struct qeth_cmd_buffer *iob;
2178 struct ccw_dev_id dev_id;
2179
d11ba0c4 2180 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2181
2182 iob = qeth_wait_for_buffer(&card->write);
2183 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2184
2185 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2186 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2187 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2188 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2189 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2190 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2191
2192 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2193 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2194 temp = (card->info.cula << 8) + card->info.unit_addr2;
2195 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2196 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2197 qeth_ulp_setup_cb, NULL);
2198 return rc;
2199}
2200
0da9581d
EL		 2201static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2202{
2203 int rc;
2204 struct qeth_qdio_out_buffer *newbuf;
2205
2206 rc = 0;
2207 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2208 if (!newbuf) {
2209 rc = -ENOMEM;
2210 goto out;
2211 }
2212 newbuf->buffer = &q->qdio_bufs[bidx];
2213 skb_queue_head_init(&newbuf->skb_list);
2214 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2215 newbuf->q = q;
2216 newbuf->aob = NULL;
2217 newbuf->next_pending = q->bufs[bidx];
2218 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2219 q->bufs[bidx] = newbuf;
2220 if (q->bufstates) {
2221 q->bufstates[bidx].user = newbuf;
2222 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2223 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2224 QETH_CARD_TEXT_(q->card, 2, "%lx",
2225 (long) newbuf->next_pending);
2226 }
2227out:
2228 return rc;
2229}
2230
2231
4a71df50
FB		 2232static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2233{
2234 int i, j;
2235
d11ba0c4 2236 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2237
2238 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2239 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2240 return 0;
2241
2242 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
0da9581d 2243 GFP_KERNEL);
4a71df50
FB		 2244 if (!card->qdio.in_q)
2245 goto out_nomem;
d11ba0c4
PT		 2246 QETH_DBF_TEXT(SETUP, 2, "inq");
2247 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2248 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2249 /* give inbound qeth_qdio_buffers their qdio_buffers */
2250 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2251 card->qdio.in_q->bufs[i].buffer =
2252 &card->qdio.in_q->qdio_bufs[i];
2253 /* inbound buffer pool */
2254 if (qeth_alloc_buffer_pool(card))
2255 goto out_freeinq;
0da9581d 2256
4a71df50
FB		 2257 /* outbound */
2258 card->qdio.out_qs =
2259 kmalloc(card->qdio.no_out_queues *
2260 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2261 if (!card->qdio.out_qs)
2262 goto out_freepool;
2263 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2264 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2265 GFP_KERNEL);
4a71df50
FB		 2266 if (!card->qdio.out_qs[i])
2267 goto out_freeoutq;
d11ba0c4
PT		 2268 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2269 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2270 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2271 card->qdio.out_qs[i]->queue_no = i;
2272 /* give outbound qeth_qdio_buffers their qdio_buffers */
2273 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
0da9581d
EL		 2274 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2275 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2276 goto out_freeoutqbufs;
4a71df50
FB		 2277 }
2278 }
0da9581d
EL		 2279
2280 /* completion */
2281 if (qeth_alloc_cq(card))
2282 goto out_freeoutq;
2283
4a71df50
FB		 2284 return 0;
2285
0da9581d
EL		 2286out_freeoutqbufs:
2287 while (j > 0) {
2288 --j;
2289 kmem_cache_free(qeth_qdio_outbuf_cache,
2290 card->qdio.out_qs[i]->bufs[j]);
2291 card->qdio.out_qs[i]->bufs[j] = NULL;
2292 }
4a71df50 2293out_freeoutq:
0da9581d 2294 while (i > 0) {
4a71df50 2295 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2296 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2297 }
4a71df50
FB		 2298 kfree(card->qdio.out_qs);
2299 card->qdio.out_qs = NULL;
2300out_freepool:
2301 qeth_free_buffer_pool(card);
2302out_freeinq:
2303 kfree(card->qdio.in_q);
2304 card->qdio.in_q = NULL;
2305out_nomem:
2306 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2307 return -ENOMEM;
2308}
2309
2310static void qeth_create_qib_param_field(struct qeth_card *card,
2311 char *param_field)
2312{
2313
2314 param_field[0] = _ascebc['P'];
2315 param_field[1] = _ascebc['C'];
2316 param_field[2] = _ascebc['I'];
2317 param_field[3] = _ascebc['T'];
2318 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2319 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2320 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2321}
2322
2323static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2324 char *param_field)
2325{
2326 param_field[16] = _ascebc['B'];
2327 param_field[17] = _ascebc['L'];
2328 param_field[18] = _ascebc['K'];
2329 param_field[19] = _ascebc['T'];
2330 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2331 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2332 *((unsigned int *) (&param_field[28])) =
2333 card->info.blkt.inter_packet_jumbo;
2334}
2335
2336static int qeth_qdio_activate(struct qeth_card *card)
2337{
d11ba0c4 2338 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2339 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2340}
2341
2342static int qeth_dm_act(struct qeth_card *card)
2343{
2344 int rc;
2345 struct qeth_cmd_buffer *iob;
2346
d11ba0c4 2347 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2348
2349 iob = qeth_wait_for_buffer(&card->write);
2350 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2351
2352 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2353 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2354 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2355 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2356 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2357 return rc;
2358}
2359
2360static int qeth_mpc_initialize(struct qeth_card *card)
2361{
2362 int rc;
2363
d11ba0c4 2364 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2365
2366 rc = qeth_issue_next_read(card);
2367 if (rc) {
d11ba0c4 2368 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2369 return rc;
2370 }
2371 rc = qeth_cm_enable(card);
2372 if (rc) {
d11ba0c4 2373 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2374 goto out_qdio;
2375 }
2376 rc = qeth_cm_setup(card);
2377 if (rc) {
d11ba0c4 2378 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2379 goto out_qdio;
2380 }
2381 rc = qeth_ulp_enable(card);
2382 if (rc) {
d11ba0c4 2383 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2384 goto out_qdio;
2385 }
2386 rc = qeth_ulp_setup(card);
2387 if (rc) {
d11ba0c4 2388 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2389 goto out_qdio;
2390 }
2391 rc = qeth_alloc_qdio_buffers(card);
2392 if (rc) {
d11ba0c4 2393 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2394 goto out_qdio;
2395 }
2396 rc = qeth_qdio_establish(card);
2397 if (rc) {
d11ba0c4 2398 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2399 qeth_free_qdio_buffers(card);
2400 goto out_qdio;
2401 }
2402 rc = qeth_qdio_activate(card);
2403 if (rc) {
d11ba0c4 2404 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2405 goto out_qdio;
2406 }
2407 rc = qeth_dm_act(card);
2408 if (rc) {
d11ba0c4 2409 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2410 goto out_qdio;
2411 }
2412
2413 return 0;
2414out_qdio:
2415 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2416 return rc;
2417}
2418
2419static void qeth_print_status_with_portname(struct qeth_card *card)
2420{
2421 char dbf_text[15];
2422 int i;
2423
2424 sprintf(dbf_text, "%s", card->info.portname + 1);
2425 for (i = 0; i < 8; i++)
2426 dbf_text[i] =
2427 (char) _ebcasc[(__u8) dbf_text[i]];
2428 dbf_text[8] = 0;
74eacdb9 2429 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2430 "with link type %s (portname: %s)\n",
4a71df50
FB		 2431 qeth_get_cardname(card),
2432 (card->info.mcl_level[0]) ? " (level: " : "",
2433 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2434 (card->info.mcl_level[0]) ? ")" : "",
2435 qeth_get_cardname_short(card),
2436 dbf_text);
2437
2438}
2439
2440static void qeth_print_status_no_portname(struct qeth_card *card)
2441{
2442 if (card->info.portname[0])
74eacdb9 2443 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2444 "card%s%s%s\nwith link type %s "
2445 "(no portname needed by interface).\n",
4a71df50
FB		 2446 qeth_get_cardname(card),
2447 (card->info.mcl_level[0]) ? " (level: " : "",
2448 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2449 (card->info.mcl_level[0]) ? ")" : "",
2450 qeth_get_cardname_short(card));
2451 else
74eacdb9 2452 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2453 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2454 qeth_get_cardname(card),
2455 (card->info.mcl_level[0]) ? " (level: " : "",
2456 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2457 (card->info.mcl_level[0]) ? ")" : "",
2458 qeth_get_cardname_short(card));
2459}
2460
2461void qeth_print_status_message(struct qeth_card *card)
2462{
2463 switch (card->info.type) {
5113fec0
UB		 2464 case QETH_CARD_TYPE_OSD:
2465 case QETH_CARD_TYPE_OSM:
2466 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2467 /* VM will use a non-zero first character
2468 * to indicate a HiperSockets like reporting
2469 * of the level OSA sets the first character to zero
2470 * */
2471 if (!card->info.mcl_level[0]) {
2472 sprintf(card->info.mcl_level, "%02x%02x",
2473 card->info.mcl_level[2],
2474 card->info.mcl_level[3]);
2475
2476 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2477 break;
2478 }
2479 /* fallthrough */
2480 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2481 if ((card->info.guestlan) ||
2482 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2483 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2484 card->info.mcl_level[0]];
2485 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2486 card->info.mcl_level[1]];
2487 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2488 card->info.mcl_level[2]];
2489 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2490 card->info.mcl_level[3]];
2491 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2492 }
2493 break;
2494 default:
2495 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2496 }
2497 if (card->info.portname_required)
2498 qeth_print_status_with_portname(card);
2499 else
2500 qeth_print_status_no_portname(card);
2501}
2502EXPORT_SYMBOL_GPL(qeth_print_status_message);
2503
4a71df50
FB		 2504static void qeth_initialize_working_pool_list(struct qeth_card *card)
2505{
2506 struct qeth_buffer_pool_entry *entry;
2507
847a50fd 2508 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2509
2510 list_for_each_entry(entry,
2511 &card->qdio.init_pool.entry_list, init_list) {
2512 qeth_put_buffer_pool_entry(card, entry);
2513 }
2514}
2515
2516static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2517 struct qeth_card *card)
2518{
2519 struct list_head *plh;
2520 struct qeth_buffer_pool_entry *entry;
2521 int i, free;
2522 struct page *page;
2523
2524 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2525 return NULL;
2526
2527 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2528 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2529 free = 1;
2530 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2531 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2532 free = 0;
2533 break;
2534 }
2535 }
2536 if (free) {
2537 list_del_init(&entry->list);
2538 return entry;
2539 }
2540 }
2541
2542 /* no free buffer in pool so take first one and swap pages */
2543 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2544 struct qeth_buffer_pool_entry, list);
2545 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2546 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2547 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2548 if (!page) {
2549 return NULL;
2550 } else {
2551 free_page((unsigned long)entry->elements[i]);
2552 entry->elements[i] = page_address(page);
2553 if (card->options.performance_stats)
2554 card->perf_stats.sg_alloc_page_rx++;
2555 }
2556 }
2557 }
2558 list_del_init(&entry->list);
2559 return entry;
2560}
2561
2562static int qeth_init_input_buffer(struct qeth_card *card,
2563 struct qeth_qdio_buffer *buf)
2564{
2565 struct qeth_buffer_pool_entry *pool_entry;
2566 int i;
2567
2568 pool_entry = qeth_find_free_buffer_pool_entry(card);
2569 if (!pool_entry)
2570 return 1;
2571
2572 /*
2573 * since the buffer is accessed only from the input_tasklet
2574 * there shouldn't be a need to synchronize; also, since we use
2575 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2576 * buffers
2577 */
4a71df50
FB		 2578
2579 buf->pool_entry = pool_entry;
2580 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2581 buf->buffer->element[i].length = PAGE_SIZE;
2582 buf->buffer->element[i].addr = pool_entry->elements[i];
2583 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2584 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2585 else
3ec90878
JG		 2586 buf->buffer->element[i].eflags = 0;
2587 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2588 }
2589 return 0;
2590}
2591
2592int qeth_init_qdio_queues(struct qeth_card *card)
2593{
2594 int i, j;
2595 int rc;
2596
d11ba0c4 2597 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2598
2599 /* inbound queue */
2600 memset(card->qdio.in_q->qdio_bufs, 0,
2601 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2602 qeth_initialize_working_pool_list(card);
2603 /*give only as many buffers to hardware as we have buffer pool entries*/
2604 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2605 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2606 card->qdio.in_q->next_buf_to_init =
2607 card->qdio.in_buf_pool.buf_count - 1;
2608 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2609 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2610 if (rc) {
d11ba0c4 2611 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2612 return rc;
2613 }
0da9581d
EL		 2614
2615 /* completion */
2616 rc = qeth_cq_init(card);
2617 if (rc) {
2618 return rc;
2619 }
2620
4a71df50
FB		 2621 /* outbound queue */
2622 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2623 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2624 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2625 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2626 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2627 card->qdio.out_qs[i]->bufs[j],
2628 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2629 }
2630 card->qdio.out_qs[i]->card = card;
2631 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2632 card->qdio.out_qs[i]->do_pack = 0;
2633 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2634 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2635 atomic_set(&card->qdio.out_qs[i]->state,
2636 QETH_OUT_Q_UNLOCKED);
2637 }
2638 return 0;
2639}
2640EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2641
2642static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2643{
2644 switch (link_type) {
2645 case QETH_LINK_TYPE_HSTR:
2646 return 2;
2647 default:
2648 return 1;
2649 }
2650}
2651
2652static void qeth_fill_ipacmd_header(struct qeth_card *card,
2653 struct qeth_ipa_cmd *cmd, __u8 command,
2654 enum qeth_prot_versions prot)
2655{
2656 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2657 cmd->hdr.command = command;
2658 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2659 cmd->hdr.seqno = card->seqno.ipa;
2660 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2661 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2662 if (card->options.layer2)
2663 cmd->hdr.prim_version_no = 2;
2664 else
2665 cmd->hdr.prim_version_no = 1;
2666 cmd->hdr.param_count = 1;
2667 cmd->hdr.prot_version = prot;
2668 cmd->hdr.ipa_supported = 0;
2669 cmd->hdr.ipa_enabled = 0;
2670}
2671
2672struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2673 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2674{
2675 struct qeth_cmd_buffer *iob;
2676 struct qeth_ipa_cmd *cmd;
2677
2678 iob = qeth_wait_for_buffer(&card->write);
2679 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2680 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2681
2682 return iob;
2683}
2684EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2685
2686void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2687 char prot_type)
2688{
2689 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2690 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2691 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2692 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2693}
2694EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2695
2696int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2697 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2698 unsigned long),
2699 void *reply_param)
2700{
2701 int rc;
2702 char prot_type;
4a71df50 2703
847a50fd 2704 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2705
2706 if (card->options.layer2)
2707 if (card->info.type == QETH_CARD_TYPE_OSN)
2708 prot_type = QETH_PROT_OSN2;
2709 else
2710 prot_type = QETH_PROT_LAYER2;
2711 else
2712 prot_type = QETH_PROT_TCPIP;
2713 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2714 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2715 iob, reply_cb, reply_param);
908abbb5
UB		 2716 if (rc == -ETIME) {
2717 qeth_clear_ipacmd_list(card);
2718 qeth_schedule_recovery(card);
2719 }
4a71df50
FB		 2720 return rc;
2721}
2722EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2723
4a71df50
FB		 2724int qeth_send_startlan(struct qeth_card *card)
2725{
2726 int rc;
70919e23 2727 struct qeth_cmd_buffer *iob;
4a71df50 2728
d11ba0c4 2729 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2730
70919e23
UB		 2731 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2732 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2733 return rc;
2734}
2735EXPORT_SYMBOL_GPL(qeth_send_startlan);
2736
4a71df50
FB		 2737int qeth_default_setadapterparms_cb(struct qeth_card *card,
2738 struct qeth_reply *reply, unsigned long data)
2739{
2740 struct qeth_ipa_cmd *cmd;
2741
847a50fd 2742 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2743
2744 cmd = (struct qeth_ipa_cmd *) data;
2745 if (cmd->hdr.return_code == 0)
2746 cmd->hdr.return_code =
2747 cmd->data.setadapterparms.hdr.return_code;
2748 return 0;
2749}
2750EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2751
2752static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2753 struct qeth_reply *reply, unsigned long data)
2754{
2755 struct qeth_ipa_cmd *cmd;
2756
847a50fd 2757 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2758
2759 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2760 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2761 card->info.link_type =
2762 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2763 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2764 }
4a71df50
FB		 2765 card->options.adp.supported_funcs =
2766 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2767 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2768}
2769
2770struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2771 __u32 command, __u32 cmdlen)
2772{
2773 struct qeth_cmd_buffer *iob;
2774 struct qeth_ipa_cmd *cmd;
2775
2776 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2777 QETH_PROT_IPV4);
2778 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2779 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2780 cmd->data.setadapterparms.hdr.command_code = command;
2781 cmd->data.setadapterparms.hdr.used_total = 1;
2782 cmd->data.setadapterparms.hdr.seq_no = 1;
2783
2784 return iob;
2785}
2786EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2787
2788int qeth_query_setadapterparms(struct qeth_card *card)
2789{
2790 int rc;
2791 struct qeth_cmd_buffer *iob;
2792
847a50fd 2793 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2794 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2795 sizeof(struct qeth_ipacmd_setadpparms));
2796 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2797 return rc;
2798}
2799EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2800
1da74b1c
FB		 2801static int qeth_query_ipassists_cb(struct qeth_card *card,
2802 struct qeth_reply *reply, unsigned long data)
2803{
2804 struct qeth_ipa_cmd *cmd;
2805
2806 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2807
2808 cmd = (struct qeth_ipa_cmd *) data;
2809 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2810 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2811 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2812 } else {
2813 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2814 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2815 }
2816 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2817 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported);
2818 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled);
2819 return 0;
2820}
2821
2822int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2823{
2824 int rc;
2825 struct qeth_cmd_buffer *iob;
2826
2827 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2828 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2829 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2830 return rc;
2831}
2832EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2833
2834static int qeth_query_setdiagass_cb(struct qeth_card *card,
2835 struct qeth_reply *reply, unsigned long data)
2836{
2837 struct qeth_ipa_cmd *cmd;
2838 __u16 rc;
2839
2840 cmd = (struct qeth_ipa_cmd *)data;
2841 rc = cmd->hdr.return_code;
2842 if (rc)
2843 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2844 else
2845 card->info.diagass_support = cmd->data.diagass.ext;
2846 return 0;
2847}
2848
2849static int qeth_query_setdiagass(struct qeth_card *card)
2850{
2851 struct qeth_cmd_buffer *iob;
2852 struct qeth_ipa_cmd *cmd;
2853
2854 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2855 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2856 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2857 cmd->data.diagass.subcmd_len = 16;
2858 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2859 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2860}
2861
2862static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2863{
2864 unsigned long info = get_zeroed_page(GFP_KERNEL);
2865 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2866 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2867 struct ccw_dev_id ccwid;
2868 int level, rc;
2869
2870 tid->chpid = card->info.chpid;
2871 ccw_device_get_id(CARD_RDEV(card), &ccwid);
2872 tid->ssid = ccwid.ssid;
2873 tid->devno = ccwid.devno;
2874 if (!info)
2875 return;
2876
2877 rc = stsi(NULL, 0, 0, 0);
2878 if (rc == -ENOSYS)
2879 level = rc;
2880 else
2881 level = (((unsigned int) rc) >> 28);
2882
2883 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
2884 tid->lparnr = info222->lpar_number;
2885
2886 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
2887 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
2888 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
2889 }
2890 free_page(info);
2891 return;
2892}
2893
2894static int qeth_hw_trap_cb(struct qeth_card *card,
2895 struct qeth_reply *reply, unsigned long data)
2896{
2897 struct qeth_ipa_cmd *cmd;
2898 __u16 rc;
2899
2900 cmd = (struct qeth_ipa_cmd *)data;
2901 rc = cmd->hdr.return_code;
2902 if (rc)
2903 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
2904 return 0;
2905}
2906
2907int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
2908{
2909 struct qeth_cmd_buffer *iob;
2910 struct qeth_ipa_cmd *cmd;
2911
2912 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
2913 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2914 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2915 cmd->data.diagass.subcmd_len = 80;
2916 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
2917 cmd->data.diagass.type = 1;
2918 cmd->data.diagass.action = action;
2919 switch (action) {
2920 case QETH_DIAGS_TRAP_ARM:
2921 cmd->data.diagass.options = 0x0003;
2922 cmd->data.diagass.ext = 0x00010000 +
2923 sizeof(struct qeth_trap_id);
2924 qeth_get_trap_id(card,
2925 (struct qeth_trap_id *)cmd->data.diagass.cdata);
2926 break;
2927 case QETH_DIAGS_TRAP_DISARM:
2928 cmd->data.diagass.options = 0x0001;
2929 break;
2930 case QETH_DIAGS_TRAP_CAPTURE:
2931 break;
2932 }
2933 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
2934}
2935EXPORT_SYMBOL_GPL(qeth_hw_trap);
2936
76b11f8e
UB		 2937int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
2938 unsigned int qdio_error, const char *dbftext)
4a71df50 2939{
779e6e1c 2940 if (qdio_error) {
847a50fd 2941 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 2942 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 2943 buf->element[15].sflags);
38593d01 2944 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 2945 buf->element[14].sflags);
38593d01 2946 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 2947 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 2948 card->stats.rx_dropped++;
2949 return 0;
2950 } else
2951 return 1;
4a71df50
FB		 2952 }
2953 return 0;
2954}
2955EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2956
2957void qeth_queue_input_buffer(struct qeth_card *card, int index)
2958{
2959 struct qeth_qdio_q *queue = card->qdio.in_q;
2960 int count;
2961 int i;
2962 int rc;
2963 int newcount = 0;
2964
4a71df50
FB		 2965 count = (index < queue->next_buf_to_init)?
2966 card->qdio.in_buf_pool.buf_count -
2967 (queue->next_buf_to_init - index) :
2968 card->qdio.in_buf_pool.buf_count -
2969 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2970 /* only requeue at a certain threshold to avoid SIGAs */
2971 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2972 for (i = queue->next_buf_to_init;
2973 i < queue->next_buf_to_init + count; ++i) {
2974 if (qeth_init_input_buffer(card,
2975 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2976 break;
2977 } else {
2978 newcount++;
2979 }
2980 }
2981
2982 if (newcount < count) {
2983 /* we are in memory shortage so we switch back to
2984 traditional skb allocation and drop packages */
4a71df50
FB		 2985 atomic_set(&card->force_alloc_skb, 3);
2986 count = newcount;
2987 } else {
4a71df50
FB		 2988 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2989 }
2990
2991 /*
2992 * according to old code it should be avoided to requeue all
2993 * 128 buffers in order to benefit from PCI avoidance.
2994 * this function keeps at least one buffer (the buffer at
2995 * 'index') un-requeued -> this buffer is the first buffer that
2996 * will be requeued the next time
2997 */
2998 if (card->options.performance_stats) {
2999 card->perf_stats.inbound_do_qdio_cnt++;
3000 card->perf_stats.inbound_do_qdio_start_time =
3001 qeth_get_micros();
3002 }
779e6e1c
JG		 3003 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3004 queue->next_buf_to_init, count);
4a71df50
FB		 3005 if (card->options.performance_stats)
3006 card->perf_stats.inbound_do_qdio_time +=
3007 qeth_get_micros() -
3008 card->perf_stats.inbound_do_qdio_start_time;
3009 if (rc) {
847a50fd 3010 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3011 }
3012 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3013 QDIO_MAX_BUFFERS_PER_Q;
3014 }
3015}
3016EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3017
3018static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3019 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3020{
3ec90878 3021 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3022
847a50fd 3023 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3024 if (card->info.type == QETH_CARD_TYPE_IQD) {
3025 if (sbalf15 == 0) {
3026 qdio_err = 0;
3027 } else {
3028 qdio_err = 1;
3029 }
3030 }
76b11f8e 3031 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3032
3033 if (!qdio_err)
4a71df50 3034 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3035
3036 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3037 return QETH_SEND_ERROR_RETRY;
3038
847a50fd
CO		 3039 QETH_CARD_TEXT(card, 1, "lnkfail");
3040 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3041 (u16)qdio_err, (u8)sbalf15);
3042 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3043}
3044
3045/*
3046 * Switched to packing state if the number of used buffers on a queue
3047 * reaches a certain limit.
3048 */
3049static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3050{
3051 if (!queue->do_pack) {
3052 if (atomic_read(&queue->used_buffers)
3053 >= QETH_HIGH_WATERMARK_PACK){
3054 /* switch non-PACKING -> PACKING */
847a50fd 3055 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3056 if (queue->card->options.performance_stats)
3057 queue->card->perf_stats.sc_dp_p++;
3058 queue->do_pack = 1;
3059 }
3060 }
3061}
3062
3063/*
3064 * Switches from packing to non-packing mode. If there is a packing
3065 * buffer on the queue this buffer will be prepared to be flushed.
3066 * In that case 1 is returned to inform the caller. If no buffer
3067 * has to be flushed, zero is returned.
3068 */
3069static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3070{
3071 struct qeth_qdio_out_buffer *buffer;
3072 int flush_count = 0;
3073
3074 if (queue->do_pack) {
3075 if (atomic_read(&queue->used_buffers)
3076 <= QETH_LOW_WATERMARK_PACK) {
3077 /* switch PACKING -> non-PACKING */
847a50fd 3078 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3079 if (queue->card->options.performance_stats)
3080 queue->card->perf_stats.sc_p_dp++;
3081 queue->do_pack = 0;
3082 /* flush packing buffers */
0da9581d 3083 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3084 if ((atomic_read(&buffer->state) ==
3085 QETH_QDIO_BUF_EMPTY) &&
3086 (buffer->next_element_to_fill > 0)) {
3087 atomic_set(&buffer->state,
0da9581d 3088 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3089 flush_count++;
3090 queue->next_buf_to_fill =
3091 (queue->next_buf_to_fill + 1) %
3092 QDIO_MAX_BUFFERS_PER_Q;
3093 }
3094 }
3095 }
3096 return flush_count;
3097}
3098
0da9581d 3099
4a71df50
FB		 3100/*
3101 * Called to flush a packing buffer if no more pci flags are on the queue.
3102 * Checks if there is a packing buffer and prepares it to be flushed.
3103 * In that case returns 1, otherwise zero.
3104 */
3105static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3106{
3107 struct qeth_qdio_out_buffer *buffer;
3108
0da9581d 3109 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3110 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3111 (buffer->next_element_to_fill > 0)) {
3112 /* it's a packing buffer */
3113 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3114 queue->next_buf_to_fill =
3115 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3116 return 1;
3117 }
3118 return 0;
3119}
3120
779e6e1c
JG		 3121static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3122 int count)
4a71df50
FB		 3123{
3124 struct qeth_qdio_out_buffer *buf;
3125 int rc;
3126 int i;
3127 unsigned int qdio_flags;
3128
4a71df50 3129 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3130 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3131 buf = queue->bufs[bidx];
3ec90878
JG		 3132 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3133 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3134
0da9581d
EL		 3135 if (queue->bufstates)
3136 queue->bufstates[bidx].user = buf;
3137
4a71df50
FB		 3138 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3139 continue;
3140
3141 if (!queue->do_pack) {
3142 if ((atomic_read(&queue->used_buffers) >=
3143 (QETH_HIGH_WATERMARK_PACK -
3144 QETH_WATERMARK_PACK_FUZZ)) &&
3145 !atomic_read(&queue->set_pci_flags_count)) {
3146 /* it's likely that we'll go to packing
3147 * mode soon */
3148 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3149 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3150 }
3151 } else {
3152 if (!atomic_read(&queue->set_pci_flags_count)) {
3153 /*
3154 * there's no outstanding PCI any more, so we
3155 * have to request a PCI to be sure the the PCI
3156 * will wake at some time in the future then we
3157 * can flush packed buffers that might still be
3158 * hanging around, which can happen if no
3159 * further send was requested by the stack
3160 */
3161 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3162 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3163 }
3164 }
3165 }
3166
3167 queue->card->dev->trans_start = jiffies;
3168 if (queue->card->options.performance_stats) {
3169 queue->card->perf_stats.outbound_do_qdio_cnt++;
3170 queue->card->perf_stats.outbound_do_qdio_start_time =
3171 qeth_get_micros();
3172 }
3173 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3174 if (atomic_read(&queue->set_pci_flags_count))
3175 qdio_flags |= QDIO_FLAG_PCI_OUT;
3176 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3177 queue->queue_no, index, count);
4a71df50
FB		 3178 if (queue->card->options.performance_stats)
3179 queue->card->perf_stats.outbound_do_qdio_time +=
3180 qeth_get_micros() -
3181 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3182 atomic_add(count, &queue->used_buffers);
4a71df50 3183 if (rc) {
d303b6fd
JG		 3184 queue->card->stats.tx_errors += count;
3185 /* ignore temporary SIGA errors without busy condition */
3186 if (rc == QDIO_ERROR_SIGA_TARGET)
3187 return;
847a50fd 3188 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3189 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3190 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3191 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3192 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3193
4a71df50
FB		 3194 /* this must not happen under normal circumstances. if it
3195 * happens something is really wrong -> recover */
3196 qeth_schedule_recovery(queue->card);
3197 return;
3198 }
4a71df50
FB		 3199 if (queue->card->options.performance_stats)
3200 queue->card->perf_stats.bufs_sent += count;
3201}
3202
3203static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3204{
3205 int index;
3206 int flush_cnt = 0;
3207 int q_was_packing = 0;
3208
3209 /*
3210 * check if weed have to switch to non-packing mode or if
3211 * we have to get a pci flag out on the queue
3212 */
3213 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3214 !atomic_read(&queue->set_pci_flags_count)) {
3215 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3216 QETH_OUT_Q_UNLOCKED) {
3217 /*
3218 * If we get in here, there was no action in
3219 * do_send_packet. So, we check if there is a
3220 * packing buffer to be flushed here.
3221 */
3222 netif_stop_queue(queue->card->dev);
3223 index = queue->next_buf_to_fill;
3224 q_was_packing = queue->do_pack;
3225 /* queue->do_pack may change */
3226 barrier();
3227 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3228 if (!flush_cnt &&
3229 !atomic_read(&queue->set_pci_flags_count))
3230 flush_cnt +=
3231 qeth_flush_buffers_on_no_pci(queue);
3232 if (queue->card->options.performance_stats &&
3233 q_was_packing)
3234 queue->card->perf_stats.bufs_sent_pack +=
3235 flush_cnt;
3236 if (flush_cnt)
779e6e1c 3237 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3238 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3239 }
3240 }
3241}
3242
a1c3ed4c
FB		 3243void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3244 unsigned long card_ptr)
3245{
3246 struct qeth_card *card = (struct qeth_card *)card_ptr;
3247
0cffef48 3248 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3249 napi_schedule(&card->napi);
3250}
3251EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3252
0da9581d
EL		 3253int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3254{
3255 int rc;
3256
3257 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3258 rc = -1;
3259 goto out;
3260 } else {
3261 if (card->options.cq == cq) {
3262 rc = 0;
3263 goto out;
3264 }
3265
3266 if (card->state != CARD_STATE_DOWN &&
3267 card->state != CARD_STATE_RECOVER) {
3268 rc = -1;
3269 goto out;
3270 }
3271
3272 qeth_free_qdio_buffers(card);
3273 card->options.cq = cq;
3274 rc = 0;
3275 }
3276out:
3277 return rc;
3278
3279}
3280EXPORT_SYMBOL_GPL(qeth_configure_cq);
3281
3282
3283static void qeth_qdio_cq_handler(struct qeth_card *card,
3284 unsigned int qdio_err,
3285 unsigned int queue, int first_element, int count) {
3286 struct qeth_qdio_q *cq = card->qdio.c_q;
3287 int i;
3288 int rc;
3289
3290 if (!qeth_is_cq(card, queue))
3291 goto out;
3292
3293 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3294 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3295 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3296
3297 if (qdio_err) {
3298 netif_stop_queue(card->dev);
3299 qeth_schedule_recovery(card);
3300 goto out;
3301 }
3302
3303 if (card->options.performance_stats) {
3304 card->perf_stats.cq_cnt++;
3305 card->perf_stats.cq_start_time = qeth_get_micros();
3306 }
3307
3308 for (i = first_element; i < first_element + count; ++i) {
3309 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3310 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3311 int e;
3312
3313 e = 0;
3314 while (buffer->element[e].addr) {
3315 unsigned long phys_aob_addr;
3316
3317 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3318 qeth_qdio_handle_aob(card, phys_aob_addr);
3319 buffer->element[e].addr = NULL;
3320 buffer->element[e].eflags = 0;
3321 buffer->element[e].sflags = 0;
3322 buffer->element[e].length = 0;
3323
3324 ++e;
3325 }
3326
3327 buffer->element[15].eflags = 0;
3328 buffer->element[15].sflags = 0;
3329 }
3330 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3331 card->qdio.c_q->next_buf_to_init,
3332 count);
3333 if (rc) {
3334 dev_warn(&card->gdev->dev,
3335 "QDIO reported an error, rc=%i\n", rc);
3336 QETH_CARD_TEXT(card, 2, "qcqherr");
3337 }
3338 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3339 + count) % QDIO_MAX_BUFFERS_PER_Q;
3340
3341 netif_wake_queue(card->dev);
3342
3343 if (card->options.performance_stats) {
3344 int delta_t = qeth_get_micros();
3345 delta_t -= card->perf_stats.cq_start_time;
3346 card->perf_stats.cq_time += delta_t;
3347 }
3348out:
3349 return;
3350}
3351
a1c3ed4c 3352void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3353 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3354 unsigned long card_ptr)
3355{
3356 struct qeth_card *card = (struct qeth_card *)card_ptr;
3357
0da9581d
EL		 3358 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3359 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3360
3361 if (qeth_is_cq(card, queue))
3362 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3363 else if (qdio_err)
a1c3ed4c 3364 qeth_schedule_recovery(card);
0da9581d
EL		 3365
3366
a1c3ed4c
FB		 3367}
3368EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3369
779e6e1c
JG		 3370void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3371 unsigned int qdio_error, int __queue, int first_element,
3372 int count, unsigned long card_ptr)
4a71df50
FB		 3373{
3374 struct qeth_card *card = (struct qeth_card *) card_ptr;
3375 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3376 struct qeth_qdio_out_buffer *buffer;
3377 int i;
3378
847a50fd 3379 QETH_CARD_TEXT(card, 6, "qdouhdl");
779e6e1c 3380 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
847a50fd 3381 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3382 netif_stop_queue(card->dev);
3383 qeth_schedule_recovery(card);
3384 return;
4a71df50
FB		 3385 }
3386 if (card->options.performance_stats) {
3387 card->perf_stats.outbound_handler_cnt++;
3388 card->perf_stats.outbound_handler_start_time =
3389 qeth_get_micros();
3390 }
3391 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3392 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3393 buffer = queue->bufs[bidx];
b67d801f 3394 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3395
3396 if (queue->bufstates &&
3397 (queue->bufstates[bidx].flags &
3398 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3399 buffer->aob = queue->bufstates[bidx].aob;
3400 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3401 QETH_CARD_TEXT_(queue->card, 5, "aob");
3402 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3403 virt_to_phys(buffer->aob));
3404 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
3405 if (qeth_init_qdio_out_buf(queue, bidx))
3406 qeth_schedule_recovery(card);
3407 } else {
3408 qeth_clear_output_buffer(queue, buffer,
3409 QETH_QDIO_BUF_EMPTY);
3410 }
3411 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3412 }
3413 atomic_sub(count, &queue->used_buffers);
3414 /* check if we need to do something on this outbound queue */
3415 if (card->info.type != QETH_CARD_TYPE_IQD)
3416 qeth_check_outbound_queue(queue);
3417
3418 netif_wake_queue(queue->card->dev);
3419 if (card->options.performance_stats)
3420 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3421 card->perf_stats.outbound_handler_start_time;
3422}
3423EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3424
4a71df50
FB		 3425int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3426 int ipv, int cast_type)
3427{
5113fec0
UB		 3428 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3429 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3430 return card->qdio.default_out_queue;
3431 switch (card->qdio.no_out_queues) {
3432 case 4:
3433 if (cast_type && card->info.is_multicast_different)
3434 return card->info.is_multicast_different &
3435 (card->qdio.no_out_queues - 1);
3436 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3437 const u8 tos = ip_hdr(skb)->tos;
3438
3439 if (card->qdio.do_prio_queueing ==
3440 QETH_PRIO_Q_ING_TOS) {
3441 if (tos & IP_TOS_NOTIMPORTANT)
3442 return 3;
3443 if (tos & IP_TOS_HIGHRELIABILITY)
3444 return 2;
3445 if (tos & IP_TOS_HIGHTHROUGHPUT)
3446 return 1;
3447 if (tos & IP_TOS_LOWDELAY)
3448 return 0;
3449 }
3450 if (card->qdio.do_prio_queueing ==
3451 QETH_PRIO_Q_ING_PREC)
3452 return 3 - (tos >> 6);
3453 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3454 /* TODO: IPv6!!! */
3455 }
3456 return card->qdio.default_out_queue;
3457 case 1: /* fallthrough for single-out-queue 1920-device */
3458 default:
3459 return card->qdio.default_out_queue;
3460 }
3461}
3462EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3463
4a71df50
FB		 3464int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3465 struct sk_buff *skb, int elems)
3466{
51aa165c
FB		 3467 int dlen = skb->len - skb->data_len;
3468 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3469 PFN_DOWN((unsigned long)skb->data);
4a71df50 3470
51aa165c 3471 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 3472 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3473 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3474 "(Number=%d / Length=%d). Discarded.\n",
3475 (elements_needed+elems), skb->len);
3476 return 0;
3477 }
3478 return elements_needed;
3479}
3480EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3481
51aa165c
FB		 3482int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3483{
3484 int hroom, inpage, rest;
3485
3486 if (((unsigned long)skb->data & PAGE_MASK) !=
3487 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3488 hroom = skb_headroom(skb);
3489 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3490 rest = len - inpage;
3491 if (rest > hroom)
3492 return 1;
3493 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3494 skb->data -= rest;
3495 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3496 }
3497 return 0;
3498}
3499EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3500
f90b744e 3501static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3502 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3503 int offset)
4a71df50 3504{
51aa165c 3505 int length = skb->len - skb->data_len;
4a71df50
FB		 3506 int length_here;
3507 int element;
3508 char *data;
51aa165c
FB		 3509 int first_lap, cnt;
3510 struct skb_frag_struct *frag;
4a71df50
FB		 3511
3512 element = *next_element_to_fill;
3513 data = skb->data;
3514 first_lap = (is_tso == 0 ? 1 : 0);
3515
683d718a
FB		 3516 if (offset >= 0) {
3517 data = skb->data + offset;
e1f03ae8 3518 length -= offset;
683d718a
FB		 3519 first_lap = 0;
3520 }
3521
4a71df50
FB		 3522 while (length > 0) {
3523 /* length_here is the remaining amount of data in this page */
3524 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3525 if (length < length_here)
3526 length_here = length;
3527
3528 buffer->element[element].addr = data;
3529 buffer->element[element].length = length_here;
3530 length -= length_here;
3531 if (!length) {
3532 if (first_lap)
51aa165c 3533 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3534 buffer->element[element].eflags =
3535 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3536 else
3ec90878 3537 buffer->element[element].eflags = 0;
4a71df50 3538 else
3ec90878
JG		 3539 buffer->element[element].eflags =
3540 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3541 } else {
3542 if (first_lap)
3ec90878
JG		 3543 buffer->element[element].eflags =
3544 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3545 else
3ec90878
JG		 3546 buffer->element[element].eflags =
3547 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3548 }
3549 data += length_here;
3550 element++;
3551 first_lap = 0;
3552 }
51aa165c
FB		 3553
3554 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3555 frag = &skb_shinfo(skb)->frags[cnt];
3556 buffer->element[element].addr = (char *)page_to_phys(frag->page)
3557 + frag->page_offset;
3558 buffer->element[element].length = frag->size;
3ec90878 3559 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
51aa165c
FB		 3560 element++;
3561 }
3562
3ec90878
JG		 3563 if (buffer->element[element - 1].eflags)
3564 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3565 *next_element_to_fill = element;
3566}
3567
f90b744e 3568static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3569 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3570 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3571{
3572 struct qdio_buffer *buffer;
4a71df50
FB		 3573 int flush_cnt = 0, hdr_len, large_send = 0;
3574
4a71df50
FB		 3575 buffer = buf->buffer;
3576 atomic_inc(&skb->users);
3577 skb_queue_tail(&buf->skb_list, skb);
3578
4a71df50 3579 /*check first on TSO ....*/
683d718a 3580 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3581 int element = buf->next_element_to_fill;
3582
683d718a
FB		 3583 hdr_len = sizeof(struct qeth_hdr_tso) +
3584 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3585 /*fill first buffer entry only with header information */
3586 buffer->element[element].addr = skb->data;
3587 buffer->element[element].length = hdr_len;
3ec90878 3588 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3589 buf->next_element_to_fill++;
3590 skb->data += hdr_len;
3591 skb->len -= hdr_len;
3592 large_send = 1;
3593 }
683d718a
FB		 3594
3595 if (offset >= 0) {
3596 int element = buf->next_element_to_fill;
3597 buffer->element[element].addr = hdr;
3598 buffer->element[element].length = sizeof(struct qeth_hdr) +
3599 hd_len;
3ec90878 3600 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3601 buf->is_header[element] = 1;
3602 buf->next_element_to_fill++;
3603 }
3604
51aa165c
FB		 3605 __qeth_fill_buffer(skb, buffer, large_send,
3606 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3607
3608 if (!queue->do_pack) {
847a50fd 3609 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3610 /* set state to PRIMED -> will be flushed */
3611 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3612 flush_cnt = 1;
3613 } else {
847a50fd 3614 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3615 if (queue->card->options.performance_stats)
3616 queue->card->perf_stats.skbs_sent_pack++;
3617 if (buf->next_element_to_fill >=
3618 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3619 /*
3620 * packed buffer if full -> set state PRIMED
3621 * -> will be flushed
3622 */
3623 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3624 flush_cnt = 1;
3625 }
3626 }
3627 return flush_cnt;
3628}
3629
3630int qeth_do_send_packet_fast(struct qeth_card *card,
3631 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3632 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3633 int offset, int hd_len)
4a71df50
FB		 3634{
3635 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3636 int index;
3637
4a71df50
FB		 3638 /* spin until we get the queue ... */
3639 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3640 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3641 /* ... now we've got the queue */
3642 index = queue->next_buf_to_fill;
0da9581d 3643 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3644 /*
3645 * check if buffer is empty to make sure that we do not 'overtake'
3646 * ourselves and try to fill a buffer that is already primed
3647 */
3648 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3649 goto out;
64ef8957 3650 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3651 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3652 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3653 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3654 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3655 return 0;
3656out:
3657 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3658 return -EBUSY;
3659}
3660EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3661
3662int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3663 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3664 int elements_needed)
4a71df50
FB		 3665{
3666 struct qeth_qdio_out_buffer *buffer;
3667 int start_index;
3668 int flush_count = 0;
3669 int do_pack = 0;
3670 int tmp;
3671 int rc = 0;
3672
4a71df50
FB		 3673 /* spin until we get the queue ... */
3674 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3675 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3676 start_index = queue->next_buf_to_fill;
0da9581d 3677 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3678 /*
3679 * check if buffer is empty to make sure that we do not 'overtake'
3680 * ourselves and try to fill a buffer that is already primed
3681 */
3682 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3683 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3684 return -EBUSY;
3685 }
3686 /* check if we need to switch packing state of this queue */
3687 qeth_switch_to_packing_if_needed(queue);
3688 if (queue->do_pack) {
3689 do_pack = 1;
64ef8957
FB		 3690 /* does packet fit in current buffer? */
3691 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3692 buffer->next_element_to_fill) < elements_needed) {
3693 /* ... no -> set state PRIMED */
3694 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3695 flush_count++;
3696 queue->next_buf_to_fill =
3697 (queue->next_buf_to_fill + 1) %
3698 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3699 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3700 /* we did a step forward, so check buffer state
3701 * again */
3702 if (atomic_read(&buffer->state) !=
3703 QETH_QDIO_BUF_EMPTY) {
3704 qeth_flush_buffers(queue, start_index,
779e6e1c 3705 flush_count);
64ef8957 3706 atomic_set(&queue->state,
4a71df50 3707 QETH_OUT_Q_UNLOCKED);
64ef8957 3708 return -EBUSY;
4a71df50
FB		 3709 }
3710 }
3711 }
64ef8957 3712 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3713 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3714 QDIO_MAX_BUFFERS_PER_Q;
3715 flush_count += tmp;
4a71df50 3716 if (flush_count)
779e6e1c 3717 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3718 else if (!atomic_read(&queue->set_pci_flags_count))
3719 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3720 /*
3721 * queue->state will go from LOCKED -> UNLOCKED or from
3722 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3723 * (switch packing state or flush buffer to get another pci flag out).
3724 * In that case we will enter this loop
3725 */
3726 while (atomic_dec_return(&queue->state)) {
3727 flush_count = 0;
3728 start_index = queue->next_buf_to_fill;
3729 /* check if we can go back to non-packing state */
3730 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3731 /*
3732 * check if we need to flush a packing buffer to get a pci
3733 * flag out on the queue
3734 */
3735 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3736 flush_count += qeth_flush_buffers_on_no_pci(queue);
3737 if (flush_count)
779e6e1c 3738 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3739 }
3740 /* at this point the queue is UNLOCKED again */
3741 if (queue->card->options.performance_stats && do_pack)
3742 queue->card->perf_stats.bufs_sent_pack += flush_count;
3743
3744 return rc;
3745}
3746EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3747
3748static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3749 struct qeth_reply *reply, unsigned long data)
3750{
3751 struct qeth_ipa_cmd *cmd;
3752 struct qeth_ipacmd_setadpparms *setparms;
3753
847a50fd 3754 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3755
3756 cmd = (struct qeth_ipa_cmd *) data;
3757 setparms = &(cmd->data.setadapterparms);
3758
3759 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3760 if (cmd->hdr.return_code) {
847a50fd 3761 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3762 setparms->data.mode = SET_PROMISC_MODE_OFF;
3763 }
3764 card->info.promisc_mode = setparms->data.mode;
3765 return 0;
3766}
3767
3768void qeth_setadp_promisc_mode(struct qeth_card *card)
3769{
3770 enum qeth_ipa_promisc_modes mode;
3771 struct net_device *dev = card->dev;
3772 struct qeth_cmd_buffer *iob;
3773 struct qeth_ipa_cmd *cmd;
3774
847a50fd 3775 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3776
3777 if (((dev->flags & IFF_PROMISC) &&
3778 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3779 (!(dev->flags & IFF_PROMISC) &&
3780 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3781 return;
3782 mode = SET_PROMISC_MODE_OFF;
3783 if (dev->flags & IFF_PROMISC)
3784 mode = SET_PROMISC_MODE_ON;
847a50fd 3785 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3786
3787 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3788 sizeof(struct qeth_ipacmd_setadpparms));
3789 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3790 cmd->data.setadapterparms.data.mode = mode;
3791 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3792}
3793EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3794
3795int qeth_change_mtu(struct net_device *dev, int new_mtu)
3796{
3797 struct qeth_card *card;
3798 char dbf_text[15];
3799
509e2562 3800 card = dev->ml_priv;
4a71df50 3801
847a50fd 3802 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3803 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3804 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3805
3806 if (new_mtu < 64)
3807 return -EINVAL;
3808 if (new_mtu > 65535)
3809 return -EINVAL;
3810 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3811 (!qeth_mtu_is_valid(card, new_mtu)))
3812 return -EINVAL;
3813 dev->mtu = new_mtu;
3814 return 0;
3815}
3816EXPORT_SYMBOL_GPL(qeth_change_mtu);
3817
3818struct net_device_stats *qeth_get_stats(struct net_device *dev)
3819{
3820 struct qeth_card *card;
3821
509e2562 3822 card = dev->ml_priv;
4a71df50 3823
847a50fd 3824 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 3825
3826 return &card->stats;
3827}
3828EXPORT_SYMBOL_GPL(qeth_get_stats);
3829
3830static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3831 struct qeth_reply *reply, unsigned long data)
3832{
3833 struct qeth_ipa_cmd *cmd;
3834
847a50fd 3835 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 3836
3837 cmd = (struct qeth_ipa_cmd *) data;
3838 if (!card->options.layer2 ||
3839 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3840 memcpy(card->dev->dev_addr,
3841 &cmd->data.setadapterparms.data.change_addr.addr,
3842 OSA_ADDR_LEN);
3843 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3844 }
3845 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3846 return 0;
3847}
3848
3849int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3850{
3851 int rc;
3852 struct qeth_cmd_buffer *iob;
3853 struct qeth_ipa_cmd *cmd;
3854
847a50fd 3855 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 3856
3857 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3858 sizeof(struct qeth_ipacmd_setadpparms));
3859 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3860 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3861 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3862 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3863 card->dev->dev_addr, OSA_ADDR_LEN);
3864 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3865 NULL);
3866 return rc;
3867}
3868EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3869
d64ecc22
EL		 3870static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
3871 struct qeth_reply *reply, unsigned long data)
3872{
3873 struct qeth_ipa_cmd *cmd;
3874 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 3875
847a50fd 3876 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 3877
3878 cmd = (struct qeth_ipa_cmd *) data;
3879 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3880 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
3881 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3882 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
3883 cmd->data.setadapterparms.hdr.return_code);
3884 switch (cmd->data.setadapterparms.hdr.return_code) {
3885 case SET_ACCESS_CTRL_RC_SUCCESS:
3886 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
3887 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
3888 {
3889 card->options.isolation = access_ctrl_req->subcmd_code;
3890 if (card->options.isolation == ISOLATION_MODE_NONE) {
3891 dev_info(&card->gdev->dev,
3892 "QDIO data connection isolation is deactivated\n");
3893 } else {
3894 dev_info(&card->gdev->dev,
3895 "QDIO data connection isolation is activated\n");
3896 }
3897 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
3898 card->gdev->dev.kobj.name,
3899 access_ctrl_req->subcmd_code,
3900 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 3901 break;
3902 }
3903 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
3904 {
3905 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
3906 card->gdev->dev.kobj.name,
3907 access_ctrl_req->subcmd_code,
3908 cmd->data.setadapterparms.hdr.return_code);
3909 dev_err(&card->gdev->dev, "Adapter does not "
3910 "support QDIO data connection isolation\n");
3911
3912 /* ensure isolation mode is "none" */
3913 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3914 break;
3915 }
3916 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
3917 {
3918 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3919 card->gdev->dev.kobj.name,
3920 access_ctrl_req->subcmd_code,
3921 cmd->data.setadapterparms.hdr.return_code);
3922 dev_err(&card->gdev->dev,
3923 "Adapter is dedicated. "
3924 "QDIO data connection isolation not supported\n");
3925
3926 /* ensure isolation mode is "none" */
3927 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3928 break;
3929 }
3930 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
3931 {
3932 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
3933 card->gdev->dev.kobj.name,
3934 access_ctrl_req->subcmd_code,
3935 cmd->data.setadapterparms.hdr.return_code);
3936 dev_err(&card->gdev->dev,
3937 "TSO does not permit QDIO data connection isolation\n");
3938
3939 /* ensure isolation mode is "none" */
3940 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3941 break;
3942 }
3943 default:
3944 {
3945 /* this should never happen */
3946 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
3947 "==UNKNOWN\n",
3948 card->gdev->dev.kobj.name,
3949 access_ctrl_req->subcmd_code,
3950 cmd->data.setadapterparms.hdr.return_code);
3951
3952 /* ensure isolation mode is "none" */
3953 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 3954 break;
3955 }
3956 }
3957 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 3958 return 0;
d64ecc22
EL		 3959}
3960
3961static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
3962 enum qeth_ipa_isolation_modes isolation)
3963{
3964 int rc;
3965 struct qeth_cmd_buffer *iob;
3966 struct qeth_ipa_cmd *cmd;
3967 struct qeth_set_access_ctrl *access_ctrl_req;
3968
847a50fd 3969 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 3970
3971 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
3972 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
3973
3974 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
3975 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
3976 sizeof(struct qeth_set_access_ctrl));
3977 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3978 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
3979 access_ctrl_req->subcmd_code = isolation;
3980
3981 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
3982 NULL);
3983 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
3984 return rc;
3985}
3986
3987int qeth_set_access_ctrl_online(struct qeth_card *card)
3988{
3989 int rc = 0;
3990
847a50fd 3991 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 3992
5113fec0
UB		 3993 if ((card->info.type == QETH_CARD_TYPE_OSD ||
3994 card->info.type == QETH_CARD_TYPE_OSX) &&
3995 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 3996 rc = qeth_setadpparms_set_access_ctrl(card,
3997 card->options.isolation);
3998 if (rc) {
3999 QETH_DBF_MESSAGE(3,
5113fec0 4000 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4001 card->gdev->dev.kobj.name,
4002 rc);
4003 }
4004 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4005 card->options.isolation = ISOLATION_MODE_NONE;
4006
4007 dev_err(&card->gdev->dev, "Adapter does not "
4008 "support QDIO data connection isolation\n");
4009 rc = -EOPNOTSUPP;
4010 }
4011 return rc;
4012}
4013EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4014
4a71df50
FB		 4015void qeth_tx_timeout(struct net_device *dev)
4016{
4017 struct qeth_card *card;
4018
509e2562 4019 card = dev->ml_priv;
847a50fd 4020 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4021 card->stats.tx_errors++;
4022 qeth_schedule_recovery(card);
4023}
4024EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4025
4026int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4027{
509e2562 4028 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4029 int rc = 0;
4030
4031 switch (regnum) {
4032 case MII_BMCR: /* Basic mode control register */
4033 rc = BMCR_FULLDPLX;
4034 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4035 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4036 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4037 rc |= BMCR_SPEED100;
4038 break;
4039 case MII_BMSR: /* Basic mode status register */
4040 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4041 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4042 BMSR_100BASE4;
4043 break;
4044 case MII_PHYSID1: /* PHYS ID 1 */
4045 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4046 dev->dev_addr[2];
4047 rc = (rc >> 5) & 0xFFFF;
4048 break;
4049 case MII_PHYSID2: /* PHYS ID 2 */
4050 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4051 break;
4052 case MII_ADVERTISE: /* Advertisement control reg */
4053 rc = ADVERTISE_ALL;
4054 break;
4055 case MII_LPA: /* Link partner ability reg */
4056 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4057 LPA_100BASE4 | LPA_LPACK;
4058 break;
4059 case MII_EXPANSION: /* Expansion register */
4060 break;
4061 case MII_DCOUNTER: /* disconnect counter */
4062 break;
4063 case MII_FCSCOUNTER: /* false carrier counter */
4064 break;
4065 case MII_NWAYTEST: /* N-way auto-neg test register */
4066 break;
4067 case MII_RERRCOUNTER: /* rx error counter */
4068 rc = card->stats.rx_errors;
4069 break;
4070 case MII_SREVISION: /* silicon revision */
4071 break;
4072 case MII_RESV1: /* reserved 1 */
4073 break;
4074 case MII_LBRERROR: /* loopback, rx, bypass error */
4075 break;
4076 case MII_PHYADDR: /* physical address */
4077 break;
4078 case MII_RESV2: /* reserved 2 */
4079 break;
4080 case MII_TPISTATUS: /* TPI status for 10mbps */
4081 break;
4082 case MII_NCONFIG: /* network interface config */
4083 break;
4084 default:
4085 break;
4086 }
4087 return rc;
4088}
4089EXPORT_SYMBOL_GPL(qeth_mdio_read);
4090
4091static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4092 struct qeth_cmd_buffer *iob, int len,
4093 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4094 unsigned long),
4095 void *reply_param)
4096{
4097 u16 s1, s2;
4098
847a50fd 4099 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4100
4101 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4102 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4103 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4104 /* adjust PDU length fields in IPA_PDU_HEADER */
4105 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4106 s2 = (u32) len;
4107 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4108 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4109 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4110 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4111 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4112 reply_cb, reply_param);
4113}
4114
4115static int qeth_snmp_command_cb(struct qeth_card *card,
4116 struct qeth_reply *reply, unsigned long sdata)
4117{
4118 struct qeth_ipa_cmd *cmd;
4119 struct qeth_arp_query_info *qinfo;
4120 struct qeth_snmp_cmd *snmp;
4121 unsigned char *data;
4122 __u16 data_len;
4123
847a50fd 4124 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4125
4126 cmd = (struct qeth_ipa_cmd *) sdata;
4127 data = (unsigned char *)((char *)cmd - reply->offset);
4128 qinfo = (struct qeth_arp_query_info *) reply->param;
4129 snmp = &cmd->data.setadapterparms.data.snmp;
4130
4131 if (cmd->hdr.return_code) {
847a50fd 4132 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4133 return 0;
4134 }
4135 if (cmd->data.setadapterparms.hdr.return_code) {
4136 cmd->hdr.return_code =
4137 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4138 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4139 return 0;
4140 }
4141 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4142 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4143 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4144 else
4145 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4146
4147 /* check if there is enough room in userspace */
4148 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4149 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 4150 cmd->hdr.return_code = -ENOMEM;
4151 return 0;
4152 }
847a50fd 4153 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4154 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4155 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4156 cmd->data.setadapterparms.hdr.seq_no);
4157 /*copy entries to user buffer*/
4158 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4159 memcpy(qinfo->udata + qinfo->udata_offset,
4160 (char *)snmp,
4161 data_len + offsetof(struct qeth_snmp_cmd, data));
4162 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4163 } else {
4164 memcpy(qinfo->udata + qinfo->udata_offset,
4165 (char *)&snmp->request, data_len);
4166 }
4167 qinfo->udata_offset += data_len;
4168 /* check if all replies received ... */
847a50fd 4169 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4170 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4171 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4172 cmd->data.setadapterparms.hdr.seq_no);
4173 if (cmd->data.setadapterparms.hdr.seq_no <
4174 cmd->data.setadapterparms.hdr.used_total)
4175 return 1;
4176 return 0;
4177}
4178
4179int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4180{
4181 struct qeth_cmd_buffer *iob;
4182 struct qeth_ipa_cmd *cmd;
4183 struct qeth_snmp_ureq *ureq;
4184 int req_len;
4185 struct qeth_arp_query_info qinfo = {0, };
4186 int rc = 0;
4187
847a50fd 4188 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4189
4190 if (card->info.guestlan)
4191 return -EOPNOTSUPP;
4192
4193 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4194 (!card->options.layer2)) {
4a71df50
FB		 4195 return -EOPNOTSUPP;
4196 }
4197 /* skip 4 bytes (data_len struct member) to get req_len */
4198 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4199 return -EFAULT;
4986f3f0
JL		 4200 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4201 if (IS_ERR(ureq)) {
847a50fd 4202 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4203 return PTR_ERR(ureq);
4a71df50
FB		 4204 }
4205 qinfo.udata_len = ureq->hdr.data_len;
4206 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4207 if (!qinfo.udata) {
4208 kfree(ureq);
4209 return -ENOMEM;
4210 }
4211 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4212
4213 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4214 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4215 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4216 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4217 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4218 qeth_snmp_command_cb, (void *)&qinfo);
4219 if (rc)
14cc21b6 4220 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4221 QETH_CARD_IFNAME(card), rc);
4222 else {
4223 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4224 rc = -EFAULT;
4225 }
4226
4227 kfree(ureq);
4228 kfree(qinfo.udata);
4229 return rc;
4230}
4231EXPORT_SYMBOL_GPL(qeth_snmp_command);
4232
4233static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4234{
4235 switch (card->info.type) {
4236 case QETH_CARD_TYPE_IQD:
4237 return 2;
4238 default:
4239 return 0;
4240 }
4241}
4242
d0ff1f52
UB		 4243static void qeth_determine_capabilities(struct qeth_card *card)
4244{
4245 int rc;
4246 int length;
4247 char *prcd;
4248 struct ccw_device *ddev;
4249 int ddev_offline = 0;
4250
4251 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4252 ddev = CARD_DDEV(card);
4253 if (!ddev->online) {
4254 ddev_offline = 1;
4255 rc = ccw_device_set_online(ddev);
4256 if (rc) {
4257 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4258 goto out;
4259 }
4260 }
4261
4262 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4263 if (rc) {
4264 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4265 dev_name(&card->gdev->dev), rc);
4266 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4267 goto out_offline;
4268 }
4269 qeth_configure_unitaddr(card, prcd);
4270 qeth_configure_blkt_default(card, prcd);
4271 kfree(prcd);
4272
4273 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4274 if (rc)
4275 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4276
0da9581d
EL		 4277 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4278 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4279 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4280 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4281 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4282 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4283 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4284 dev_info(&card->gdev->dev,
4285 "Completion Queueing supported\n");
4286 } else {
4287 card->options.cq = QETH_CQ_NOTAVAILABLE;
4288 }
4289
4290
d0ff1f52
UB		 4291out_offline:
4292 if (ddev_offline == 1)
4293 ccw_device_set_offline(ddev);
4294out:
4295 return;
4296}
4297
0da9581d
EL		 4298static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4299 struct qdio_buffer **in_sbal_ptrs,
4300 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4301 int i;
4302
4303 if (card->options.cq == QETH_CQ_ENABLED) {
4304 int offset = QDIO_MAX_BUFFERS_PER_Q *
4305 (card->qdio.no_in_queues - 1);
4306 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4307 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4308 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4309 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4310 }
4311
4312 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4313 }
4314}
4315
4a71df50
FB		 4316static int qeth_qdio_establish(struct qeth_card *card)
4317{
4318 struct qdio_initialize init_data;
4319 char *qib_param_field;
4320 struct qdio_buffer **in_sbal_ptrs;
104ea556 4321 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4322 struct qdio_buffer **out_sbal_ptrs;
4323 int i, j, k;
4324 int rc = 0;
4325
d11ba0c4 4326 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4327
4328 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4329 GFP_KERNEL);
104ea556 4330 if (!qib_param_field) {
4331 rc = -ENOMEM;
4332 goto out_free_nothing;
4333 }
4a71df50
FB		 4334
4335 qeth_create_qib_param_field(card, qib_param_field);
4336 qeth_create_qib_param_field_blkt(card, qib_param_field);
4337
0da9581d
EL		 4338 in_sbal_ptrs = kmalloc(card->qdio.no_in_queues *
4339 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4340 GFP_KERNEL);
4341 if (!in_sbal_ptrs) {
104ea556 4342 rc = -ENOMEM;
4343 goto out_free_qib_param;
4a71df50 4344 }
0da9581d 4345 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4346 in_sbal_ptrs[i] = (struct qdio_buffer *)
4347 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4348 }
4a71df50 4349
0da9581d
EL		 4350 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4351 GFP_KERNEL);
104ea556 4352 if (!queue_start_poll) {
4353 rc = -ENOMEM;
4354 goto out_free_in_sbals;
4355 }
0da9581d
EL		 4356 for (i = 0; i < card->qdio.no_in_queues; ++i)
4357 queue_start_poll[i] = card->discipline.start_poll;
4358
4359 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4360
4a71df50
FB		 4361 out_sbal_ptrs =
4362 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4363 sizeof(void *), GFP_KERNEL);
4364 if (!out_sbal_ptrs) {
104ea556 4365 rc = -ENOMEM;
4366 goto out_free_queue_start_poll;
4a71df50
FB		 4367 }
4368 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4369 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4370 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4371 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4372 }
4373
4374 memset(&init_data, 0, sizeof(struct qdio_initialize));
4375 init_data.cdev = CARD_DDEV(card);
4376 init_data.q_format = qeth_get_qdio_q_format(card);
4377 init_data.qib_param_field_format = 0;
4378 init_data.qib_param_field = qib_param_field;
0da9581d 4379 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50
FB		 4380 init_data.no_output_qs = card->qdio.no_out_queues;
4381 init_data.input_handler = card->discipline.input_handler;
4382 init_data.output_handler = card->discipline.output_handler;
104ea556 4383 init_data.queue_start_poll = queue_start_poll;
4a71df50 4384 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4385 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4386 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4387 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff
JG		 4388 init_data.scan_threshold =
4389 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 4390
4391 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4392 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4393 rc = qdio_allocate(&init_data);
4394 if (rc) {
4395 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4396 goto out;
4397 }
4398 rc = qdio_establish(&init_data);
4399 if (rc) {
4a71df50 4400 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4401 qdio_free(CARD_DDEV(card));
4402 }
4a71df50 4403 }
0da9581d
EL		 4404
4405 switch (card->options.cq) {
4406 case QETH_CQ_ENABLED:
4407 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4408 break;
4409 case QETH_CQ_DISABLED:
4410 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4411 break;
4412 default:
4413 break;
4414 }
cc961d40 4415out:
4a71df50 4416 kfree(out_sbal_ptrs);
104ea556 4417out_free_queue_start_poll:
4418 kfree(queue_start_poll);
4419out_free_in_sbals:
4a71df50 4420 kfree(in_sbal_ptrs);
104ea556 4421out_free_qib_param:
4a71df50 4422 kfree(qib_param_field);
104ea556 4423out_free_nothing:
4a71df50
FB		 4424 return rc;
4425}
4426
4427static void qeth_core_free_card(struct qeth_card *card)
4428{
4429
d11ba0c4
PT		 4430 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4431 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4432 qeth_clean_channel(&card->read);
4433 qeth_clean_channel(&card->write);
4434 if (card->dev)
4435 free_netdev(card->dev);
4436 kfree(card->ip_tbd_list);
4437 qeth_free_qdio_buffers(card);
6bcac508 4438 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4439 kfree(card);
4440}
4441
4442static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4443 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4444 .driver_info = QETH_CARD_TYPE_OSD},
4445 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4446 .driver_info = QETH_CARD_TYPE_IQD},
4447 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4448 .driver_info = QETH_CARD_TYPE_OSN},
4449 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4450 .driver_info = QETH_CARD_TYPE_OSM},
4451 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4452 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4453 {},
4454};
4455MODULE_DEVICE_TABLE(ccw, qeth_ids);
4456
4457static struct ccw_driver qeth_ccw_driver = {
3bda058b 4458 .driver = {
3e70b3b8 4459 .owner = THIS_MODULE,
3bda058b
SO		 4460 .name = "qeth",
4461 },
4a71df50
FB		 4462 .ids = qeth_ids,
4463 .probe = ccwgroup_probe_ccwdev,
4464 .remove = ccwgroup_remove_ccwdev,
4465};
4466
4467static int qeth_core_driver_group(const char *buf, struct device *root_dev,
4468 unsigned long driver_id)
4469{
022b660a
UB		 4470 return ccwgroup_create_from_string(root_dev, driver_id,
4471 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 4472}
4473
4474int qeth_core_hardsetup_card(struct qeth_card *card)
4475{
aa909224 4476 int retries = 0;
4a71df50
FB		 4477 int rc;
4478
d11ba0c4 4479 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4480 atomic_set(&card->force_alloc_skb, 0);
d0ff1f52 4481 qeth_get_channel_path_desc(card);
4a71df50 4482retry:
aa909224 4483 if (retries)
74eacdb9
FB		 4484 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4485 dev_name(&card->gdev->dev));
aa909224
UB		 4486 ccw_device_set_offline(CARD_DDEV(card));
4487 ccw_device_set_offline(CARD_WDEV(card));
4488 ccw_device_set_offline(CARD_RDEV(card));
4489 rc = ccw_device_set_online(CARD_RDEV(card));
4490 if (rc)
4491 goto retriable;
4492 rc = ccw_device_set_online(CARD_WDEV(card));
4493 if (rc)
4494 goto retriable;
4495 rc = ccw_device_set_online(CARD_DDEV(card));
4496 if (rc)
4497 goto retriable;
4a71df50 4498 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4499retriable:
4a71df50 4500 if (rc == -ERESTARTSYS) {
d11ba0c4 4501 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4502 return rc;
4503 } else if (rc) {
d11ba0c4 4504 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 4505 if (++retries > 3)
4a71df50
FB		 4506 goto out;
4507 else
4508 goto retry;
4509 }
d0ff1f52 4510 qeth_determine_capabilities(card);
4a71df50
FB		 4511 qeth_init_tokens(card);
4512 qeth_init_func_level(card);
4513 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4514 if (rc == -ERESTARTSYS) {
d11ba0c4 4515 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4516 return rc;
4517 } else if (rc) {
d11ba0c4 4518 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4519 if (--retries < 0)
4520 goto out;
4521 else
4522 goto retry;
4523 }
4524 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4525 if (rc == -ERESTARTSYS) {
d11ba0c4 4526 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4527 return rc;
4528 } else if (rc) {
d11ba0c4 4529 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4530 if (--retries < 0)
4531 goto out;
4532 else
4533 goto retry;
4534 }
908abbb5 4535 card->read_or_write_problem = 0;
4a71df50
FB		 4536 rc = qeth_mpc_initialize(card);
4537 if (rc) {
d11ba0c4 4538 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4539 goto out;
4540 }
1da74b1c
FB		 4541
4542 card->options.ipa4.supported_funcs = 0;
4543 card->options.adp.supported_funcs = 0;
4544 card->info.diagass_support = 0;
4545 qeth_query_ipassists(card, QETH_PROT_IPV4);
4546 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4547 qeth_query_setadapterparms(card);
4548 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4549 qeth_query_setdiagass(card);
4a71df50
FB		 4550 return 0;
4551out:
74eacdb9
FB		 4552 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4553 "an error on the device\n");
4554 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4555 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4556 return rc;
4557}
4558EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4559
4560static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
4561 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4562{
4563 struct page *page = virt_to_page(element->addr);
4564 if (*pskb == NULL) {
4565 /* the upper protocol layers assume that there is data in the
4566 * skb itself. Copy a small amount (64 bytes) to make them
4567 * happy. */
4568 *pskb = dev_alloc_skb(64 + ETH_HLEN);
4569 if (!(*pskb))
4570 return -ENOMEM;
4571 skb_reserve(*pskb, ETH_HLEN);
4572 if (data_len <= 64) {
4573 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4574 data_len);
4575 } else {
4576 get_page(page);
4577 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
4578 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
4579 data_len - 64);
4580 (*pskb)->data_len += data_len - 64;
4581 (*pskb)->len += data_len - 64;
4582 (*pskb)->truesize += data_len - 64;
4583 (*pfrag)++;
4584 }
4585 } else {
4586 get_page(page);
4587 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4588 (*pskb)->data_len += data_len;
4589 (*pskb)->len += data_len;
4590 (*pskb)->truesize += data_len;
4591 (*pfrag)++;
4592 }
0da9581d
EL		 4593
4594
4a71df50
FB		 4595 return 0;
4596}
4597
4598struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
4599 struct qdio_buffer *buffer,
4600 struct qdio_buffer_element **__element, int *__offset,
4601 struct qeth_hdr **hdr)
4602{
4603 struct qdio_buffer_element *element = *__element;
4604 int offset = *__offset;
4605 struct sk_buff *skb = NULL;
76b11f8e 4606 int skb_len = 0;
4a71df50
FB		 4607 void *data_ptr;
4608 int data_len;
4609 int headroom = 0;
4610 int use_rx_sg = 0;
4611 int frag = 0;
4612
4a71df50
FB		 4613 /* qeth_hdr must not cross element boundaries */
4614 if (element->length < offset + sizeof(struct qeth_hdr)) {
4615 if (qeth_is_last_sbale(element))
4616 return NULL;
4617 element++;
4618 offset = 0;
4619 if (element->length < sizeof(struct qeth_hdr))
4620 return NULL;
4621 }
4622 *hdr = element->addr + offset;
4623
4624 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4625 switch ((*hdr)->hdr.l2.id) {
4626 case QETH_HEADER_TYPE_LAYER2:
4627 skb_len = (*hdr)->hdr.l2.pkt_length;
4628 break;
4629 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4630 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 4631 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4632 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4633 headroom = TR_HLEN;
4634 else
4635 headroom = ETH_HLEN;
76b11f8e
UB		 4636 break;
4637 case QETH_HEADER_TYPE_OSN:
4638 skb_len = (*hdr)->hdr.osn.pdu_length;
4639 headroom = sizeof(struct qeth_hdr);
4640 break;
4641 default:
4642 break;
4a71df50
FB		 4643 }
4644
4645 if (!skb_len)
4646 return NULL;
4647
4648 if ((skb_len >= card->options.rx_sg_cb) &&
4649 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4650 (!atomic_read(&card->force_alloc_skb))) {
4651 use_rx_sg = 1;
4652 } else {
4653 skb = dev_alloc_skb(skb_len + headroom);
4654 if (!skb)
4655 goto no_mem;
4656 if (headroom)
4657 skb_reserve(skb, headroom);
4658 }
4659
4660 data_ptr = element->addr + offset;
4661 while (skb_len) {
4662 data_len = min(skb_len, (int)(element->length - offset));
4663 if (data_len) {
4664 if (use_rx_sg) {
4665 if (qeth_create_skb_frag(element, &skb, offset,
4666 &frag, data_len))
4667 goto no_mem;
4668 } else {
4669 memcpy(skb_put(skb, data_len), data_ptr,
4670 data_len);
4671 }
4672 }
4673 skb_len -= data_len;
4674 if (skb_len) {
4675 if (qeth_is_last_sbale(element)) {
847a50fd 4676 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4677 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4678 dev_kfree_skb_any(skb);
4679 card->stats.rx_errors++;
4680 return NULL;
4681 }
4682 element++;
4683 offset = 0;
4684 data_ptr = element->addr;
4685 } else {
4686 offset += data_len;
4687 }
4688 }
4689 *__element = element;
4690 *__offset = offset;
4691 if (use_rx_sg && card->options.performance_stats) {
4692 card->perf_stats.sg_skbs_rx++;
4693 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4694 }
4695 return skb;
4696no_mem:
4697 if (net_ratelimit()) {
847a50fd 4698 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4699 }
4700 card->stats.rx_dropped++;
4701 return NULL;
4702}
4703EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4704
4705static void qeth_unregister_dbf_views(void)
4706{
d11ba0c4
PT		 4707 int x;
4708 for (x = 0; x < QETH_DBF_INFOS; x++) {
4709 debug_unregister(qeth_dbf[x].id);
4710 qeth_dbf[x].id = NULL;
4711 }
4a71df50
FB		 4712}
4713
8e96c51c 4714void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 4715{
4716 char dbf_txt_buf[32];
345aa66e 4717 va_list args;
cd023216 4718
8e96c51c 4719 if (level > id->level)
cd023216 4720 return;
345aa66e
PT		 4721 va_start(args, fmt);
4722 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4723 va_end(args);
8e96c51c 4724 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 4725}
4726EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4727
4a71df50
FB		 4728static int qeth_register_dbf_views(void)
4729{
d11ba0c4
PT		 4730 int ret;
4731 int x;
4732
4733 for (x = 0; x < QETH_DBF_INFOS; x++) {
4734 /* register the areas */
4735 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4736 qeth_dbf[x].pages,
4737 qeth_dbf[x].areas,
4738 qeth_dbf[x].len);
4739 if (qeth_dbf[x].id == NULL) {
4740 qeth_unregister_dbf_views();
4741 return -ENOMEM;
4742 }
4a71df50 4743
d11ba0c4
PT		 4744 /* register a view */
4745 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4746 if (ret) {
4747 qeth_unregister_dbf_views();
4748 return ret;
4749 }
4a71df50 4750
d11ba0c4
PT		 4751 /* set a passing level */
4752 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4753 }
4a71df50
FB		 4754
4755 return 0;
4756}
4757
4758int qeth_core_load_discipline(struct qeth_card *card,
4759 enum qeth_discipline_id discipline)
4760{
4761 int rc = 0;
4762 switch (discipline) {
4763 case QETH_DISCIPLINE_LAYER3:
4764 card->discipline.ccwgdriver = try_then_request_module(
4765 symbol_get(qeth_l3_ccwgroup_driver),
4766 "qeth_l3");
4767 break;
4768 case QETH_DISCIPLINE_LAYER2:
4769 card->discipline.ccwgdriver = try_then_request_module(
4770 symbol_get(qeth_l2_ccwgroup_driver),
4771 "qeth_l2");
4772 break;
4773 }
4774 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4775 dev_err(&card->gdev->dev, "There is no kernel module to "
4776 "support discipline %d\n", discipline);
4a71df50
FB		 4777 rc = -EINVAL;
4778 }
4779 return rc;
4780}
4781
4782void qeth_core_free_discipline(struct qeth_card *card)
4783{
4784 if (card->options.layer2)
4785 symbol_put(qeth_l2_ccwgroup_driver);
4786 else
4787 symbol_put(qeth_l3_ccwgroup_driver);
4788 card->discipline.ccwgdriver = NULL;
4789}
4790
4791static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4792{
4793 struct qeth_card *card;
4794 struct device *dev;
4795 int rc;
4796 unsigned long flags;
af039068 4797 char dbf_name[20];
4a71df50 4798
d11ba0c4 4799 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4800
4801 dev = &gdev->dev;
4802 if (!get_device(dev))
4803 return -ENODEV;
4804
2a0217d5 4805 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4806
4807 card = qeth_alloc_card();
4808 if (!card) {
d11ba0c4 4809 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4810 rc = -ENOMEM;
4811 goto err_dev;
4812 }
af039068
CO		 4813
4814 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4815 dev_name(&gdev->dev));
4816 card->debug = debug_register(dbf_name, 2, 1, 8);
4817 if (!card->debug) {
4818 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4819 rc = -ENOMEM;
4820 goto err_card;
4821 }
4822 debug_register_view(card->debug, &debug_hex_ascii_view);
4823
4a71df50
FB		 4824 card->read.ccwdev = gdev->cdev[0];
4825 card->write.ccwdev = gdev->cdev[1];
4826 card->data.ccwdev = gdev->cdev[2];
4827 dev_set_drvdata(&gdev->dev, card);
4828 card->gdev = gdev;
4829 gdev->cdev[0]->handler = qeth_irq;
4830 gdev->cdev[1]->handler = qeth_irq;
4831 gdev->cdev[2]->handler = qeth_irq;
4832
4833 rc = qeth_determine_card_type(card);
4834 if (rc) {
d11ba0c4 4835 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 4836 goto err_dbf;
4a71df50
FB		 4837 }
4838 rc = qeth_setup_card(card);
4839 if (rc) {
d11ba0c4 4840 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 4841 goto err_dbf;
4a71df50
FB		 4842 }
4843
5113fec0 4844 if (card->info.type == QETH_CARD_TYPE_OSN)
4a71df50 4845 rc = qeth_core_create_osn_attributes(dev);
5113fec0
UB		 4846 else
4847 rc = qeth_core_create_device_attributes(dev);
4848 if (rc)
af039068 4849 goto err_dbf;
5113fec0
UB		 4850 switch (card->info.type) {
4851 case QETH_CARD_TYPE_OSN:
4852 case QETH_CARD_TYPE_OSM:
4a71df50 4853 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0
UB		 4854 if (rc)
4855 goto err_attr;
4a71df50 4856 rc = card->discipline.ccwgdriver->probe(card->gdev);
4a71df50 4857 if (rc)
5113fec0
UB		 4858 goto err_disc;
4859 case QETH_CARD_TYPE_OSD:
4860 case QETH_CARD_TYPE_OSX:
4861 default:
4862 break;
4a71df50
FB		 4863 }
4864
4865 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4866 list_add_tail(&card->list, &qeth_core_card_list.list);
4867 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 4868
4869 qeth_determine_capabilities(card);
4a71df50
FB		 4870 return 0;
4871
5113fec0
UB		 4872err_disc:
4873 qeth_core_free_discipline(card);
4874err_attr:
4875 if (card->info.type == QETH_CARD_TYPE_OSN)
4876 qeth_core_remove_osn_attributes(dev);
4877 else
4878 qeth_core_remove_device_attributes(dev);
af039068
CO		 4879err_dbf:
4880 debug_unregister(card->debug);
4a71df50
FB		 4881err_card:
4882 qeth_core_free_card(card);
4883err_dev:
4884 put_device(dev);
4885 return rc;
4886}
4887
4888static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4889{
4890 unsigned long flags;
4891 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4892
28a7e4c9 4893 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 4894
4895 if (card->info.type == QETH_CARD_TYPE_OSN) {
4896 qeth_core_remove_osn_attributes(&gdev->dev);
4897 } else {
4898 qeth_core_remove_device_attributes(&gdev->dev);
4899 }
9dc48ccc
UB		 4900
4901 if (card->discipline.ccwgdriver) {
4902 card->discipline.ccwgdriver->remove(gdev);
4903 qeth_core_free_discipline(card);
4904 }
4905
af039068 4906 debug_unregister(card->debug);
4a71df50
FB		 4907 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4908 list_del(&card->list);
4909 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4910 qeth_core_free_card(card);
4911 dev_set_drvdata(&gdev->dev, NULL);
4912 put_device(&gdev->dev);
4913 return;
4914}
4915
4916static int qeth_core_set_online(struct ccwgroup_device *gdev)
4917{
4918 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4919 int rc = 0;
4920 int def_discipline;
4921
4922 if (!card->discipline.ccwgdriver) {
4923 if (card->info.type == QETH_CARD_TYPE_IQD)
4924 def_discipline = QETH_DISCIPLINE_LAYER3;
4925 else
4926 def_discipline = QETH_DISCIPLINE_LAYER2;
4927 rc = qeth_core_load_discipline(card, def_discipline);
4928 if (rc)
4929 goto err;
4930 rc = card->discipline.ccwgdriver->probe(card->gdev);
4931 if (rc)
4932 goto err;
4933 }
4934 rc = card->discipline.ccwgdriver->set_online(gdev);
4935err:
4936 return rc;
4937}
4938
4939static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4940{
4941 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4942 return card->discipline.ccwgdriver->set_offline(gdev);
4943}
4944
4945static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4946{
4947 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4948 if (card->discipline.ccwgdriver &&
4949 card->discipline.ccwgdriver->shutdown)
4950 card->discipline.ccwgdriver->shutdown(gdev);
4951}
4952
bbcfcdc8
FB		 4953static int qeth_core_prepare(struct ccwgroup_device *gdev)
4954{
4955 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4956 if (card->discipline.ccwgdriver &&
4957 card->discipline.ccwgdriver->prepare)
4958 return card->discipline.ccwgdriver->prepare(gdev);
4959 return 0;
4960}
4961
4962static void qeth_core_complete(struct ccwgroup_device *gdev)
4963{
4964 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4965 if (card->discipline.ccwgdriver &&
4966 card->discipline.ccwgdriver->complete)
4967 card->discipline.ccwgdriver->complete(gdev);
4968}
4969
4970static int qeth_core_freeze(struct ccwgroup_device *gdev)
4971{
4972 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4973 if (card->discipline.ccwgdriver &&
4974 card->discipline.ccwgdriver->freeze)
4975 return card->discipline.ccwgdriver->freeze(gdev);
4976 return 0;
4977}
4978
4979static int qeth_core_thaw(struct ccwgroup_device *gdev)
4980{
4981 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4982 if (card->discipline.ccwgdriver &&
4983 card->discipline.ccwgdriver->thaw)
4984 return card->discipline.ccwgdriver->thaw(gdev);
4985 return 0;
4986}
4987
4988static int qeth_core_restore(struct ccwgroup_device *gdev)
4989{
4990 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4991 if (card->discipline.ccwgdriver &&
4992 card->discipline.ccwgdriver->restore)
4993 return card->discipline.ccwgdriver->restore(gdev);
4994 return 0;
4995}
4996
4a71df50 4997static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 4998 .driver = {
4999 .owner = THIS_MODULE,
5000 .name = "qeth",
5001 },
4a71df50
FB		 5002 .driver_id = 0xD8C5E3C8,
5003 .probe = qeth_core_probe_device,
5004 .remove = qeth_core_remove_device,
5005 .set_online = qeth_core_set_online,
5006 .set_offline = qeth_core_set_offline,
5007 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5008 .prepare = qeth_core_prepare,
5009 .complete = qeth_core_complete,
5010 .freeze = qeth_core_freeze,
5011 .thaw = qeth_core_thaw,
5012 .restore = qeth_core_restore,
4a71df50
FB		 5013};
5014
5015static ssize_t
5016qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
5017 size_t count)
5018{
5019 int err;
5020 err = qeth_core_driver_group(buf, qeth_core_root_dev,
5021 qeth_core_ccwgroup_driver.driver_id);
5022 if (err)
5023 return err;
5024 else
5025 return count;
5026}
5027
5028static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5029
5030static struct {
5031 const char str[ETH_GSTRING_LEN];
5032} qeth_ethtool_stats_keys[] = {
5033/* 0 */{"rx skbs"},
5034 {"rx buffers"},
5035 {"tx skbs"},
5036 {"tx buffers"},
5037 {"tx skbs no packing"},
5038 {"tx buffers no packing"},
5039 {"tx skbs packing"},
5040 {"tx buffers packing"},
5041 {"tx sg skbs"},
5042 {"tx sg frags"},
5043/* 10 */{"rx sg skbs"},
5044 {"rx sg frags"},
5045 {"rx sg page allocs"},
5046 {"tx large kbytes"},
5047 {"tx large count"},
5048 {"tx pk state ch n->p"},
5049 {"tx pk state ch p->n"},
5050 {"tx pk watermark low"},
5051 {"tx pk watermark high"},
5052 {"queue 0 buffer usage"},
5053/* 20 */{"queue 1 buffer usage"},
5054 {"queue 2 buffer usage"},
5055 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5056 {"rx poll time"},
5057 {"rx poll count"},
4a71df50
FB		 5058 {"rx do_QDIO time"},
5059 {"rx do_QDIO count"},
5060 {"tx handler time"},
5061 {"tx handler count"},
5062 {"tx time"},
5063/* 30 */{"tx count"},
5064 {"tx do_QDIO time"},
5065 {"tx do_QDIO count"},
f61a0d05 5066 {"tx csum"},
c3b4a740 5067 {"tx lin"},
0da9581d
EL		 5068 {"cq handler count"},
5069 {"cq handler time"}
4a71df50
FB		 5070};
5071
df8b4ec8 5072int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5073{
df8b4ec8
BH		 5074 switch (stringset) {
5075 case ETH_SS_STATS:
5076 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5077 default:
5078 return -EINVAL;
5079 }
4a71df50 5080}
df8b4ec8 5081EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5082
5083void qeth_core_get_ethtool_stats(struct net_device *dev,
5084 struct ethtool_stats *stats, u64 *data)
5085{
509e2562 5086 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5087 data[0] = card->stats.rx_packets -
5088 card->perf_stats.initial_rx_packets;
5089 data[1] = card->perf_stats.bufs_rec;
5090 data[2] = card->stats.tx_packets -
5091 card->perf_stats.initial_tx_packets;
5092 data[3] = card->perf_stats.bufs_sent;
5093 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5094 - card->perf_stats.skbs_sent_pack;
5095 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5096 data[6] = card->perf_stats.skbs_sent_pack;
5097 data[7] = card->perf_stats.bufs_sent_pack;
5098 data[8] = card->perf_stats.sg_skbs_sent;
5099 data[9] = card->perf_stats.sg_frags_sent;
5100 data[10] = card->perf_stats.sg_skbs_rx;
5101 data[11] = card->perf_stats.sg_frags_rx;
5102 data[12] = card->perf_stats.sg_alloc_page_rx;
5103 data[13] = (card->perf_stats.large_send_bytes >> 10);
5104 data[14] = card->perf_stats.large_send_cnt;
5105 data[15] = card->perf_stats.sc_dp_p;
5106 data[16] = card->perf_stats.sc_p_dp;
5107 data[17] = QETH_LOW_WATERMARK_PACK;
5108 data[18] = QETH_HIGH_WATERMARK_PACK;
5109 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5110 data[20] = (card->qdio.no_out_queues > 1) ?
5111 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5112 data[21] = (card->qdio.no_out_queues > 2) ?
5113 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5114 data[22] = (card->qdio.no_out_queues > 3) ?
5115 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5116 data[23] = card->perf_stats.inbound_time;
5117 data[24] = card->perf_stats.inbound_cnt;
5118 data[25] = card->perf_stats.inbound_do_qdio_time;
5119 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5120 data[27] = card->perf_stats.outbound_handler_time;
5121 data[28] = card->perf_stats.outbound_handler_cnt;
5122 data[29] = card->perf_stats.outbound_time;
5123 data[30] = card->perf_stats.outbound_cnt;
5124 data[31] = card->perf_stats.outbound_do_qdio_time;
5125 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5126 data[33] = card->perf_stats.tx_csum;
c3b4a740 5127 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5128 data[35] = card->perf_stats.cq_cnt;
5129 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5130}
5131EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5132
5133void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5134{
5135 switch (stringset) {
5136 case ETH_SS_STATS:
5137 memcpy(data, &qeth_ethtool_stats_keys,
5138 sizeof(qeth_ethtool_stats_keys));
5139 break;
5140 default:
5141 WARN_ON(1);
5142 break;
5143 }
5144}
5145EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5146
5147void qeth_core_get_drvinfo(struct net_device *dev,
5148 struct ethtool_drvinfo *info)
5149{
509e2562 5150 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5151 if (card->options.layer2)
5152 strcpy(info->driver, "qeth_l2");
5153 else
5154 strcpy(info->driver, "qeth_l3");
5155
5156 strcpy(info->version, "1.0");
5157 strcpy(info->fw_version, card->info.mcl_level);
5158 sprintf(info->bus_info, "%s/%s/%s",
5159 CARD_RDEV_ID(card),
5160 CARD_WDEV_ID(card),
5161 CARD_DDEV_ID(card));
5162}
5163EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5164
3f9975aa
FB		 5165int qeth_core_ethtool_get_settings(struct net_device *netdev,
5166 struct ethtool_cmd *ecmd)
5167{
509e2562 5168 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 5169 enum qeth_link_types link_type;
5170
5171 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5172 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5173 else
5174 link_type = card->info.link_type;
5175
5176 ecmd->transceiver = XCVR_INTERNAL;
5177 ecmd->supported = SUPPORTED_Autoneg;
5178 ecmd->advertising = ADVERTISED_Autoneg;
5179 ecmd->duplex = DUPLEX_FULL;
5180 ecmd->autoneg = AUTONEG_ENABLE;
5181
5182 switch (link_type) {
5183 case QETH_LINK_TYPE_FAST_ETH:
5184 case QETH_LINK_TYPE_LANE_ETH100:
5185 ecmd->supported |= SUPPORTED_10baseT_Half |
5186 SUPPORTED_10baseT_Full |
5187 SUPPORTED_100baseT_Half |
5188 SUPPORTED_100baseT_Full |
5189 SUPPORTED_TP;
5190 ecmd->advertising |= ADVERTISED_10baseT_Half |
5191 ADVERTISED_10baseT_Full |
5192 ADVERTISED_100baseT_Half |
5193 ADVERTISED_100baseT_Full |
5194 ADVERTISED_TP;
5195 ecmd->speed = SPEED_100;
5196 ecmd->port = PORT_TP;
5197 break;
5198
5199 case QETH_LINK_TYPE_GBIT_ETH:
5200 case QETH_LINK_TYPE_LANE_ETH1000:
5201 ecmd->supported |= SUPPORTED_10baseT_Half |
5202 SUPPORTED_10baseT_Full |
5203 SUPPORTED_100baseT_Half |
5204 SUPPORTED_100baseT_Full |
5205 SUPPORTED_1000baseT_Half |
5206 SUPPORTED_1000baseT_Full |
5207 SUPPORTED_FIBRE;
5208 ecmd->advertising |= ADVERTISED_10baseT_Half |
5209 ADVERTISED_10baseT_Full |
5210 ADVERTISED_100baseT_Half |
5211 ADVERTISED_100baseT_Full |
5212 ADVERTISED_1000baseT_Half |
5213 ADVERTISED_1000baseT_Full |
5214 ADVERTISED_FIBRE;
5215 ecmd->speed = SPEED_1000;
5216 ecmd->port = PORT_FIBRE;
5217 break;
5218
5219 case QETH_LINK_TYPE_10GBIT_ETH:
5220 ecmd->supported |= SUPPORTED_10baseT_Half |
5221 SUPPORTED_10baseT_Full |
5222 SUPPORTED_100baseT_Half |
5223 SUPPORTED_100baseT_Full |
5224 SUPPORTED_1000baseT_Half |
5225 SUPPORTED_1000baseT_Full |
5226 SUPPORTED_10000baseT_Full |
5227 SUPPORTED_FIBRE;
5228 ecmd->advertising |= ADVERTISED_10baseT_Half |
5229 ADVERTISED_10baseT_Full |
5230 ADVERTISED_100baseT_Half |
5231 ADVERTISED_100baseT_Full |
5232 ADVERTISED_1000baseT_Half |
5233 ADVERTISED_1000baseT_Full |
5234 ADVERTISED_10000baseT_Full |
5235 ADVERTISED_FIBRE;
5236 ecmd->speed = SPEED_10000;
5237 ecmd->port = PORT_FIBRE;
5238 break;
5239
5240 default:
5241 ecmd->supported |= SUPPORTED_10baseT_Half |
5242 SUPPORTED_10baseT_Full |
5243 SUPPORTED_TP;
5244 ecmd->advertising |= ADVERTISED_10baseT_Half |
5245 ADVERTISED_10baseT_Full |
5246 ADVERTISED_TP;
5247 ecmd->speed = SPEED_10;
5248 ecmd->port = PORT_TP;
5249 }
5250
5251 return 0;
5252}
5253EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5254
4a71df50
FB		 5255static int __init qeth_core_init(void)
5256{
5257 int rc;
5258
74eacdb9 5259 pr_info("loading core functions\n");
4a71df50
FB		 5260 INIT_LIST_HEAD(&qeth_core_card_list.list);
5261 rwlock_init(&qeth_core_card_list.rwlock);
5262
5263 rc = qeth_register_dbf_views();
5264 if (rc)
5265 goto out_err;
5266 rc = ccw_driver_register(&qeth_ccw_driver);
5267 if (rc)
5268 goto ccw_err;
5269 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5270 if (rc)
5271 goto ccwgroup_err;
5272 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
5273 &driver_attr_group);
5274 if (rc)
5275 goto driver_err;
035da16f 5276 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 5277 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5278 if (rc)
5279 goto register_err;
4a71df50 5280
683d718a
FB		 5281 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5282 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5283 if (!qeth_core_header_cache) {
5284 rc = -ENOMEM;
5285 goto slab_err;
5286 }
5287
0da9581d
EL		 5288 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5289 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5290 if (!qeth_qdio_outbuf_cache) {
5291 rc = -ENOMEM;
5292 goto cqslab_err;
5293 }
5294
683d718a 5295 return 0;
0da9581d
EL		 5296cqslab_err:
5297 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5298slab_err:
035da16f 5299 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5300register_err:
5301 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5302 &driver_attr_group);
5303driver_err:
5304 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5305ccwgroup_err:
5306 ccw_driver_unregister(&qeth_ccw_driver);
5307ccw_err:
74eacdb9 5308 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 5309 qeth_unregister_dbf_views();
5310out_err:
74eacdb9 5311 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5312 return rc;
5313}
5314
5315static void __exit qeth_core_exit(void)
5316{
035da16f 5317 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5318 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5319 &driver_attr_group);
5320 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5321 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5322 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5323 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 5324 qeth_unregister_dbf_views();
74eacdb9 5325 pr_info("core functions removed\n");
4a71df50
FB		 5326}
5327
5328module_init(qeth_core_init);
5329module_exit(qeth_core_exit);
5330MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5331MODULE_DESCRIPTION("qeth core functions");
5332MODULE_LICENSE("GPL");
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