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qeth: remove non-recover-thread checkings
[mirror_ubuntu-kernels.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/string.h>
14#include <linux/errno.h>
15#include <linux/kernel.h>
16#include <linux/ip.h>
17#include <linux/ipv6.h>
18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
21
ab4227cb
MS		 22#include <asm/ebcdic.h>
23#include <asm/io.h>
4a71df50
FB		 24#include <asm/s390_rdev.h>
25
26#include "qeth_core.h"
27#include "qeth_core_offl.h"
28
d11ba0c4
PT		 29struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
31 /* N P A M L V H */
32 [QETH_DBF_SETUP] = {"qeth_setup",
33 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
34 [QETH_DBF_QERR] = {"qeth_qerr",
35 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_TRACE] = {"qeth_trace",
37 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg",
39 8, 1, 128, 3, &debug_sprintf_view, NULL},
40 [QETH_DBF_SENSE] = {"qeth_sense",
41 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
42 [QETH_DBF_MISC] = {"qeth_misc",
43 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_CTRL] = {"qeth_control",
45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
46};
47EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 48
49struct qeth_card_list_struct qeth_core_card_list;
50EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 51struct kmem_cache *qeth_core_header_cache;
52EXPORT_SYMBOL_GPL(qeth_core_header_cache);
4a71df50
FB		 53
54static struct device *qeth_core_root_dev;
55static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
56static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 57
58static void qeth_send_control_data_cb(struct qeth_channel *,
59 struct qeth_cmd_buffer *);
60static int qeth_issue_next_read(struct qeth_card *);
61static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
62static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
63static void qeth_free_buffer_pool(struct qeth_card *);
64static int qeth_qdio_establish(struct qeth_card *);
65
66
67static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
68 struct qdio_buffer *buffer, int is_tso,
69 int *next_element_to_fill)
70{
71 struct skb_frag_struct *frag;
72 int fragno;
73 unsigned long addr;
74 int element, cnt, dlen;
75
76 fragno = skb_shinfo(skb)->nr_frags;
77 element = *next_element_to_fill;
78 dlen = 0;
79
80 if (is_tso)
81 buffer->element[element].flags =
82 SBAL_FLAGS_MIDDLE_FRAG;
83 else
84 buffer->element[element].flags =
85 SBAL_FLAGS_FIRST_FRAG;
86 dlen = skb->len - skb->data_len;
87 if (dlen) {
88 buffer->element[element].addr = skb->data;
89 buffer->element[element].length = dlen;
90 element++;
91 }
92 for (cnt = 0; cnt < fragno; cnt++) {
93 frag = &skb_shinfo(skb)->frags[cnt];
94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
95 frag->page_offset;
96 buffer->element[element].addr = (char *)addr;
97 buffer->element[element].length = frag->size;
98 if (cnt < (fragno - 1))
99 buffer->element[element].flags =
100 SBAL_FLAGS_MIDDLE_FRAG;
101 else
102 buffer->element[element].flags =
103 SBAL_FLAGS_LAST_FRAG;
104 element++;
105 }
106 *next_element_to_fill = element;
107}
108
109static inline const char *qeth_get_cardname(struct qeth_card *card)
110{
111 if (card->info.guestlan) {
112 switch (card->info.type) {
113 case QETH_CARD_TYPE_OSAE:
114 return " Guest LAN QDIO";
115 case QETH_CARD_TYPE_IQD:
116 return " Guest LAN Hiper";
117 default:
118 return " unknown";
119 }
120 } else {
121 switch (card->info.type) {
122 case QETH_CARD_TYPE_OSAE:
123 return " OSD Express";
124 case QETH_CARD_TYPE_IQD:
125 return " HiperSockets";
126 case QETH_CARD_TYPE_OSN:
127 return " OSN QDIO";
128 default:
129 return " unknown";
130 }
131 }
132 return " n/a";
133}
134
135/* max length to be returned: 14 */
136const char *qeth_get_cardname_short(struct qeth_card *card)
137{
138 if (card->info.guestlan) {
139 switch (card->info.type) {
140 case QETH_CARD_TYPE_OSAE:
141 return "GuestLAN QDIO";
142 case QETH_CARD_TYPE_IQD:
143 return "GuestLAN Hiper";
144 default:
145 return "unknown";
146 }
147 } else {
148 switch (card->info.type) {
149 case QETH_CARD_TYPE_OSAE:
150 switch (card->info.link_type) {
151 case QETH_LINK_TYPE_FAST_ETH:
152 return "OSD_100";
153 case QETH_LINK_TYPE_HSTR:
154 return "HSTR";
155 case QETH_LINK_TYPE_GBIT_ETH:
156 return "OSD_1000";
157 case QETH_LINK_TYPE_10GBIT_ETH:
158 return "OSD_10GIG";
159 case QETH_LINK_TYPE_LANE_ETH100:
160 return "OSD_FE_LANE";
161 case QETH_LINK_TYPE_LANE_TR:
162 return "OSD_TR_LANE";
163 case QETH_LINK_TYPE_LANE_ETH1000:
164 return "OSD_GbE_LANE";
165 case QETH_LINK_TYPE_LANE:
166 return "OSD_ATM_LANE";
167 default:
168 return "OSD_Express";
169 }
170 case QETH_CARD_TYPE_IQD:
171 return "HiperSockets";
172 case QETH_CARD_TYPE_OSN:
173 return "OSN";
174 default:
175 return "unknown";
176 }
177 }
178 return "n/a";
179}
180
181void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
182 int clear_start_mask)
183{
184 unsigned long flags;
185
186 spin_lock_irqsave(&card->thread_mask_lock, flags);
187 card->thread_allowed_mask = threads;
188 if (clear_start_mask)
189 card->thread_start_mask &= threads;
190 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
191 wake_up(&card->wait_q);
192}
193EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
194
195int qeth_threads_running(struct qeth_card *card, unsigned long threads)
196{
197 unsigned long flags;
198 int rc = 0;
199
200 spin_lock_irqsave(&card->thread_mask_lock, flags);
201 rc = (card->thread_running_mask & threads);
202 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
203 return rc;
204}
205EXPORT_SYMBOL_GPL(qeth_threads_running);
206
207int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
208{
209 return wait_event_interruptible(card->wait_q,
210 qeth_threads_running(card, threads) == 0);
211}
212EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
213
214void qeth_clear_working_pool_list(struct qeth_card *card)
215{
216 struct qeth_buffer_pool_entry *pool_entry, *tmp;
217
d11ba0c4 218 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
4a71df50
FB		 219 list_for_each_entry_safe(pool_entry, tmp,
220 &card->qdio.in_buf_pool.entry_list, list){
221 list_del(&pool_entry->list);
222 }
223}
224EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
225
226static int qeth_alloc_buffer_pool(struct qeth_card *card)
227{
228 struct qeth_buffer_pool_entry *pool_entry;
229 void *ptr;
230 int i, j;
231
d11ba0c4 232 QETH_DBF_TEXT(TRACE, 5, "alocpool");
4a71df50
FB		 233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
235 if (!pool_entry) {
236 qeth_free_buffer_pool(card);
237 return -ENOMEM;
238 }
239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 240 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 241 if (!ptr) {
242 while (j > 0)
243 free_page((unsigned long)
244 pool_entry->elements[--j]);
245 kfree(pool_entry);
246 qeth_free_buffer_pool(card);
247 return -ENOMEM;
248 }
249 pool_entry->elements[j] = ptr;
250 }
251 list_add(&pool_entry->init_list,
252 &card->qdio.init_pool.entry_list);
253 }
254 return 0;
255}
256
257int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
258{
d11ba0c4 259 QETH_DBF_TEXT(TRACE, 2, "realcbp");
4a71df50
FB		 260
261 if ((card->state != CARD_STATE_DOWN) &&
262 (card->state != CARD_STATE_RECOVER))
263 return -EPERM;
264
265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
266 qeth_clear_working_pool_list(card);
267 qeth_free_buffer_pool(card);
268 card->qdio.in_buf_pool.buf_count = bufcnt;
269 card->qdio.init_pool.buf_count = bufcnt;
270 return qeth_alloc_buffer_pool(card);
271}
272
273int qeth_set_large_send(struct qeth_card *card,
274 enum qeth_large_send_types type)
275{
276 int rc = 0;
277
278 if (card->dev == NULL) {
279 card->options.large_send = type;
280 return 0;
281 }
282 if (card->state == CARD_STATE_UP)
283 netif_tx_disable(card->dev);
284 card->options.large_send = type;
285 switch (card->options.large_send) {
286 case QETH_LARGE_SEND_EDDP:
287 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
288 NETIF_F_HW_CSUM;
289 break;
290 case QETH_LARGE_SEND_TSO:
291 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
292 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
293 NETIF_F_HW_CSUM;
294 } else {
4a71df50
FB		 295 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
296 NETIF_F_HW_CSUM);
297 card->options.large_send = QETH_LARGE_SEND_NO;
298 rc = -EOPNOTSUPP;
299 }
300 break;
301 default: /* includes QETH_LARGE_SEND_NO */
302 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
303 NETIF_F_HW_CSUM);
304 break;
305 }
306 if (card->state == CARD_STATE_UP)
307 netif_wake_queue(card->dev);
308 return rc;
309}
310EXPORT_SYMBOL_GPL(qeth_set_large_send);
311
312static int qeth_issue_next_read(struct qeth_card *card)
313{
314 int rc;
315 struct qeth_cmd_buffer *iob;
316
d11ba0c4 317 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
4a71df50
FB		 318 if (card->read.state != CH_STATE_UP)
319 return -EIO;
320 iob = qeth_get_buffer(&card->read);
321 if (!iob) {
322 PRINT_WARN("issue_next_read failed: no iob available!\n");
323 return -ENOMEM;
324 }
325 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
d11ba0c4 326 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 327 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
328 (addr_t) iob, 0, 0);
329 if (rc) {
330 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
331 atomic_set(&card->read.irq_pending, 0);
332 qeth_schedule_recovery(card);
333 wake_up(&card->wait_q);
334 }
335 return rc;
336}
337
338static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
339{
340 struct qeth_reply *reply;
341
342 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
343 if (reply) {
344 atomic_set(&reply->refcnt, 1);
345 atomic_set(&reply->received, 0);
346 reply->card = card;
347 };
348 return reply;
349}
350
351static void qeth_get_reply(struct qeth_reply *reply)
352{
353 WARN_ON(atomic_read(&reply->refcnt) <= 0);
354 atomic_inc(&reply->refcnt);
355}
356
357static void qeth_put_reply(struct qeth_reply *reply)
358{
359 WARN_ON(atomic_read(&reply->refcnt) <= 0);
360 if (atomic_dec_and_test(&reply->refcnt))
361 kfree(reply);
362}
363
d11ba0c4 364static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 365 struct qeth_card *card)
366{
4a71df50 367 char *ipa_name;
d11ba0c4 368 int com = cmd->hdr.command;
4a71df50 369 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 370 if (rc)
371 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
372 ipa_name, com, QETH_CARD_IFNAME(card),
373 rc, qeth_get_ipa_msg(rc));
374 else
375 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
376 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 377}
378
379static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
380 struct qeth_cmd_buffer *iob)
381{
382 struct qeth_ipa_cmd *cmd = NULL;
383
d11ba0c4 384 QETH_DBF_TEXT(TRACE, 5, "chkipad");
4a71df50
FB		 385 if (IS_IPA(iob->data)) {
386 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
387 if (IS_IPA_REPLY(cmd)) {
d11ba0c4
PT		 388 if (cmd->hdr.command < IPA_CMD_SETCCID ||
389 cmd->hdr.command > IPA_CMD_MODCCID)
390 qeth_issue_ipa_msg(cmd,
391 cmd->hdr.return_code, card);
4a71df50
FB		 392 return cmd;
393 } else {
394 switch (cmd->hdr.command) {
395 case IPA_CMD_STOPLAN:
396 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
397 "there is a network problem or "
398 "someone pulled the cable or "
399 "disabled the port.\n",
400 QETH_CARD_IFNAME(card),
401 card->info.chpid);
402 card->lan_online = 0;
403 if (card->dev && netif_carrier_ok(card->dev))
404 netif_carrier_off(card->dev);
405 return NULL;
406 case IPA_CMD_STARTLAN:
407 PRINT_INFO("Link reestablished on %s "
408 "(CHPID 0x%X). Scheduling "
409 "IP address reset.\n",
410 QETH_CARD_IFNAME(card),
411 card->info.chpid);
412 netif_carrier_on(card->dev);
922dc062 413 card->lan_online = 1;
4a71df50
FB		 414 qeth_schedule_recovery(card);
415 return NULL;
416 case IPA_CMD_MODCCID:
417 return cmd;
418 case IPA_CMD_REGISTER_LOCAL_ADDR:
d11ba0c4 419 QETH_DBF_TEXT(TRACE, 3, "irla");
4a71df50
FB		 420 break;
421 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
d11ba0c4 422 QETH_DBF_TEXT(TRACE, 3, "urla");
4a71df50
FB		 423 break;
424 default:
c4cef07c 425 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 426 "but not a reply!\n");
427 break;
428 }
429 }
430 }
431 return cmd;
432}
433
434void qeth_clear_ipacmd_list(struct qeth_card *card)
435{
436 struct qeth_reply *reply, *r;
437 unsigned long flags;
438
d11ba0c4 439 QETH_DBF_TEXT(TRACE, 4, "clipalst");
4a71df50
FB		 440
441 spin_lock_irqsave(&card->lock, flags);
442 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
443 qeth_get_reply(reply);
444 reply->rc = -EIO;
445 atomic_inc(&reply->received);
446 list_del_init(&reply->list);
447 wake_up(&reply->wait_q);
448 qeth_put_reply(reply);
449 }
450 spin_unlock_irqrestore(&card->lock, flags);
451}
452EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
453
454static int qeth_check_idx_response(unsigned char *buffer)
455{
456 if (!buffer)
457 return 0;
458
d11ba0c4 459 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50
FB		 460 if ((buffer[2] & 0xc0) == 0xc0) {
461 PRINT_WARN("received an IDX TERMINATE "
462 "with cause code 0x%02x%s\n",
463 buffer[4],
464 ((buffer[4] == 0x22) ?
465 " -- try another portname" : ""));
d11ba0c4
PT		 466 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
467 QETH_DBF_TEXT(TRACE, 2, " idxterm");
468 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 469 return -EIO;
470 }
471 return 0;
472}
473
474static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
475 __u32 len)
476{
477 struct qeth_card *card;
478
d11ba0c4 479 QETH_DBF_TEXT(TRACE, 4, "setupccw");
4a71df50
FB		 480 card = CARD_FROM_CDEV(channel->ccwdev);
481 if (channel == &card->read)
482 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
483 else
484 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
485 channel->ccw.count = len;
486 channel->ccw.cda = (__u32) __pa(iob);
487}
488
489static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
490{
491 __u8 index;
492
d11ba0c4 493 QETH_DBF_TEXT(TRACE, 6, "getbuff");
4a71df50
FB		 494 index = channel->io_buf_no;
495 do {
496 if (channel->iob[index].state == BUF_STATE_FREE) {
497 channel->iob[index].state = BUF_STATE_LOCKED;
498 channel->io_buf_no = (channel->io_buf_no + 1) %
499 QETH_CMD_BUFFER_NO;
500 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
501 return channel->iob + index;
502 }
503 index = (index + 1) % QETH_CMD_BUFFER_NO;
504 } while (index != channel->io_buf_no);
505
506 return NULL;
507}
508
509void qeth_release_buffer(struct qeth_channel *channel,
510 struct qeth_cmd_buffer *iob)
511{
512 unsigned long flags;
513
d11ba0c4 514 QETH_DBF_TEXT(TRACE, 6, "relbuff");
4a71df50
FB		 515 spin_lock_irqsave(&channel->iob_lock, flags);
516 memset(iob->data, 0, QETH_BUFSIZE);
517 iob->state = BUF_STATE_FREE;
518 iob->callback = qeth_send_control_data_cb;
519 iob->rc = 0;
520 spin_unlock_irqrestore(&channel->iob_lock, flags);
521}
522EXPORT_SYMBOL_GPL(qeth_release_buffer);
523
524static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
525{
526 struct qeth_cmd_buffer *buffer = NULL;
527 unsigned long flags;
528
529 spin_lock_irqsave(&channel->iob_lock, flags);
530 buffer = __qeth_get_buffer(channel);
531 spin_unlock_irqrestore(&channel->iob_lock, flags);
532 return buffer;
533}
534
535struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
536{
537 struct qeth_cmd_buffer *buffer;
538 wait_event(channel->wait_q,
539 ((buffer = qeth_get_buffer(channel)) != NULL));
540 return buffer;
541}
542EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
543
544void qeth_clear_cmd_buffers(struct qeth_channel *channel)
545{
546 int cnt;
547
548 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
549 qeth_release_buffer(channel, &channel->iob[cnt]);
550 channel->buf_no = 0;
551 channel->io_buf_no = 0;
552}
553EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
554
555static void qeth_send_control_data_cb(struct qeth_channel *channel,
556 struct qeth_cmd_buffer *iob)
557{
558 struct qeth_card *card;
559 struct qeth_reply *reply, *r;
560 struct qeth_ipa_cmd *cmd;
561 unsigned long flags;
562 int keep_reply;
563
d11ba0c4 564 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
4a71df50
FB		 565
566 card = CARD_FROM_CDEV(channel->ccwdev);
567 if (qeth_check_idx_response(iob->data)) {
568 qeth_clear_ipacmd_list(card);
569 qeth_schedule_recovery(card);
570 goto out;
571 }
572
573 cmd = qeth_check_ipa_data(card, iob);
574 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
575 goto out;
576 /*in case of OSN : check if cmd is set */
577 if (card->info.type == QETH_CARD_TYPE_OSN &&
578 cmd &&
579 cmd->hdr.command != IPA_CMD_STARTLAN &&
580 card->osn_info.assist_cb != NULL) {
581 card->osn_info.assist_cb(card->dev, cmd);
582 goto out;
583 }
584
585 spin_lock_irqsave(&card->lock, flags);
586 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
587 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
588 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
589 qeth_get_reply(reply);
590 list_del_init(&reply->list);
591 spin_unlock_irqrestore(&card->lock, flags);
592 keep_reply = 0;
593 if (reply->callback != NULL) {
594 if (cmd) {
595 reply->offset = (__u16)((char *)cmd -
596 (char *)iob->data);
597 keep_reply = reply->callback(card,
598 reply,
599 (unsigned long)cmd);
600 } else
601 keep_reply = reply->callback(card,
602 reply,
603 (unsigned long)iob);
604 }
605 if (cmd)
606 reply->rc = (u16) cmd->hdr.return_code;
607 else if (iob->rc)
608 reply->rc = iob->rc;
609 if (keep_reply) {
610 spin_lock_irqsave(&card->lock, flags);
611 list_add_tail(&reply->list,
612 &card->cmd_waiter_list);
613 spin_unlock_irqrestore(&card->lock, flags);
614 } else {
615 atomic_inc(&reply->received);
616 wake_up(&reply->wait_q);
617 }
618 qeth_put_reply(reply);
619 goto out;
620 }
621 }
622 spin_unlock_irqrestore(&card->lock, flags);
623out:
624 memcpy(&card->seqno.pdu_hdr_ack,
625 QETH_PDU_HEADER_SEQ_NO(iob->data),
626 QETH_SEQ_NO_LENGTH);
627 qeth_release_buffer(channel, iob);
628}
629
630static int qeth_setup_channel(struct qeth_channel *channel)
631{
632 int cnt;
633
d11ba0c4 634 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50
FB		 635 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
636 channel->iob[cnt].data = (char *)
637 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
638 if (channel->iob[cnt].data == NULL)
639 break;
640 channel->iob[cnt].state = BUF_STATE_FREE;
641 channel->iob[cnt].channel = channel;
642 channel->iob[cnt].callback = qeth_send_control_data_cb;
643 channel->iob[cnt].rc = 0;
644 }
645 if (cnt < QETH_CMD_BUFFER_NO) {
646 while (cnt-- > 0)
647 kfree(channel->iob[cnt].data);
648 return -ENOMEM;
649 }
650 channel->buf_no = 0;
651 channel->io_buf_no = 0;
652 atomic_set(&channel->irq_pending, 0);
653 spin_lock_init(&channel->iob_lock);
654
655 init_waitqueue_head(&channel->wait_q);
656 return 0;
657}
658
659static int qeth_set_thread_start_bit(struct qeth_card *card,
660 unsigned long thread)
661{
662 unsigned long flags;
663
664 spin_lock_irqsave(&card->thread_mask_lock, flags);
665 if (!(card->thread_allowed_mask & thread) ||
666 (card->thread_start_mask & thread)) {
667 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
668 return -EPERM;
669 }
670 card->thread_start_mask |= thread;
671 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
672 return 0;
673}
674
675void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
676{
677 unsigned long flags;
678
679 spin_lock_irqsave(&card->thread_mask_lock, flags);
680 card->thread_start_mask &= ~thread;
681 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
682 wake_up(&card->wait_q);
683}
684EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
685
686void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
687{
688 unsigned long flags;
689
690 spin_lock_irqsave(&card->thread_mask_lock, flags);
691 card->thread_running_mask &= ~thread;
692 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
693 wake_up(&card->wait_q);
694}
695EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
696
697static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
698{
699 unsigned long flags;
700 int rc = 0;
701
702 spin_lock_irqsave(&card->thread_mask_lock, flags);
703 if (card->thread_start_mask & thread) {
704 if ((card->thread_allowed_mask & thread) &&
705 !(card->thread_running_mask & thread)) {
706 rc = 1;
707 card->thread_start_mask &= ~thread;
708 card->thread_running_mask |= thread;
709 } else
710 rc = -EPERM;
711 }
712 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
713 return rc;
714}
715
716int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
717{
718 int rc = 0;
719
720 wait_event(card->wait_q,
721 (rc = __qeth_do_run_thread(card, thread)) >= 0);
722 return rc;
723}
724EXPORT_SYMBOL_GPL(qeth_do_run_thread);
725
726void qeth_schedule_recovery(struct qeth_card *card)
727{
d11ba0c4 728 QETH_DBF_TEXT(TRACE, 2, "startrec");
4a71df50
FB		 729 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
730 schedule_work(&card->kernel_thread_starter);
731}
732EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
733
734static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
735{
736 int dstat, cstat;
737 char *sense;
738
739 sense = (char *) irb->ecw;
23d805b6
PO		 740 cstat = irb->scsw.cmd.cstat;
741 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 742
743 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
744 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
745 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
d11ba0c4 746 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
4a71df50 747 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
2a0217d5 748 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 749 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
750 16, 1, irb, 64, 1);
751 return 1;
752 }
753
754 if (dstat & DEV_STAT_UNIT_CHECK) {
755 if (sense[SENSE_RESETTING_EVENT_BYTE] &
756 SENSE_RESETTING_EVENT_FLAG) {
d11ba0c4 757 QETH_DBF_TEXT(TRACE, 2, "REVIND");
4a71df50
FB		 758 return 1;
759 }
760 if (sense[SENSE_COMMAND_REJECT_BYTE] &
761 SENSE_COMMAND_REJECT_FLAG) {
d11ba0c4 762 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
28a7e4c9 763 return 1;
4a71df50
FB		 764 }
765 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
d11ba0c4 766 QETH_DBF_TEXT(TRACE, 2, "AFFE");
4a71df50
FB		 767 return 1;
768 }
769 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
d11ba0c4 770 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
4a71df50
FB		 771 return 0;
772 }
d11ba0c4 773 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
4a71df50
FB		 774 return 1;
775 }
776 return 0;
777}
778
779static long __qeth_check_irb_error(struct ccw_device *cdev,
780 unsigned long intparm, struct irb *irb)
781{
782 if (!IS_ERR(irb))
783 return 0;
784
785 switch (PTR_ERR(irb)) {
786 case -EIO:
2a0217d5 787 PRINT_WARN("i/o-error on device %s\n", dev_name(&cdev->dev));
d11ba0c4
PT		 788 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
789 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 790 break;
791 case -ETIMEDOUT:
2a0217d5 792 PRINT_WARN("timeout on device %s\n", dev_name(&cdev->dev));
d11ba0c4
PT		 793 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
794 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
4a71df50
FB		 795 if (intparm == QETH_RCD_PARM) {
796 struct qeth_card *card = CARD_FROM_CDEV(cdev);
797
798 if (card && (card->data.ccwdev == cdev)) {
799 card->data.state = CH_STATE_DOWN;
800 wake_up(&card->wait_q);
801 }
802 }
803 break;
804 default:
805 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
2a0217d5 806 dev_name(&cdev->dev));
d11ba0c4
PT		 807 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
808 QETH_DBF_TEXT(TRACE, 2, " rc???");
4a71df50
FB		 809 }
810 return PTR_ERR(irb);
811}
812
813static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
814 struct irb *irb)
815{
816 int rc;
817 int cstat, dstat;
818 struct qeth_cmd_buffer *buffer;
819 struct qeth_channel *channel;
820 struct qeth_card *card;
821 struct qeth_cmd_buffer *iob;
822 __u8 index;
823
d11ba0c4 824 QETH_DBF_TEXT(TRACE, 5, "irq");
4a71df50
FB		 825
826 if (__qeth_check_irb_error(cdev, intparm, irb))
827 return;
23d805b6
PO		 828 cstat = irb->scsw.cmd.cstat;
829 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 830
831 card = CARD_FROM_CDEV(cdev);
832 if (!card)
833 return;
834
835 if (card->read.ccwdev == cdev) {
836 channel = &card->read;
d11ba0c4 837 QETH_DBF_TEXT(TRACE, 5, "read");
4a71df50
FB		 838 } else if (card->write.ccwdev == cdev) {
839 channel = &card->write;
d11ba0c4 840 QETH_DBF_TEXT(TRACE, 5, "write");
4a71df50
FB		 841 } else {
842 channel = &card->data;
d11ba0c4 843 QETH_DBF_TEXT(TRACE, 5, "data");
4a71df50
FB		 844 }
845 atomic_set(&channel->irq_pending, 0);
846
23d805b6 847 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 848 channel->state = CH_STATE_STOPPED;
849
23d805b6 850 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 851 channel->state = CH_STATE_HALTED;
852
853 /*let's wake up immediately on data channel*/
854 if ((channel == &card->data) && (intparm != 0) &&
855 (intparm != QETH_RCD_PARM))
856 goto out;
857
858 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
d11ba0c4 859 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
4a71df50
FB		 860 /* we don't have to handle this further */
861 intparm = 0;
862 }
863 if (intparm == QETH_HALT_CHANNEL_PARM) {
d11ba0c4 864 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
4a71df50
FB		 865 /* we don't have to handle this further */
866 intparm = 0;
867 }
868 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
869 (dstat & DEV_STAT_UNIT_CHECK) ||
870 (cstat)) {
871 if (irb->esw.esw0.erw.cons) {
872 /* TODO: we should make this s390dbf */
873 PRINT_WARN("sense data available on channel %s.\n",
874 CHANNEL_ID(channel));
875 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
876 print_hex_dump(KERN_WARNING, "qeth: irb ",
877 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
878 print_hex_dump(KERN_WARNING, "qeth: sense data ",
879 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
880 }
881 if (intparm == QETH_RCD_PARM) {
882 channel->state = CH_STATE_DOWN;
883 goto out;
884 }
885 rc = qeth_get_problem(cdev, irb);
886 if (rc) {
28a7e4c9 887 qeth_clear_ipacmd_list(card);
4a71df50
FB		 888 qeth_schedule_recovery(card);
889 goto out;
890 }
891 }
892
893 if (intparm == QETH_RCD_PARM) {
894 channel->state = CH_STATE_RCD_DONE;
895 goto out;
896 }
897 if (intparm) {
898 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
899 buffer->state = BUF_STATE_PROCESSED;
900 }
901 if (channel == &card->data)
902 return;
903 if (channel == &card->read &&
904 channel->state == CH_STATE_UP)
905 qeth_issue_next_read(card);
906
907 iob = channel->iob;
908 index = channel->buf_no;
909 while (iob[index].state == BUF_STATE_PROCESSED) {
910 if (iob[index].callback != NULL)
911 iob[index].callback(channel, iob + index);
912
913 index = (index + 1) % QETH_CMD_BUFFER_NO;
914 }
915 channel->buf_no = index;
916out:
917 wake_up(&card->wait_q);
918 return;
919}
920
921static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
922 struct qeth_qdio_out_buffer *buf)
923{
924 int i;
925 struct sk_buff *skb;
926
927 /* is PCI flag set on buffer? */
928 if (buf->buffer->element[0].flags & 0x40)
929 atomic_dec(&queue->set_pci_flags_count);
930
931 skb = skb_dequeue(&buf->skb_list);
932 while (skb) {
933 atomic_dec(&skb->users);
934 dev_kfree_skb_any(skb);
935 skb = skb_dequeue(&buf->skb_list);
936 }
937 qeth_eddp_buf_release_contexts(buf);
938 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 939 if (buf->buffer->element[i].addr && buf->is_header[i])
940 kmem_cache_free(qeth_core_header_cache,
941 buf->buffer->element[i].addr);
942 buf->is_header[i] = 0;
4a71df50
FB		 943 buf->buffer->element[i].length = 0;
944 buf->buffer->element[i].addr = NULL;
945 buf->buffer->element[i].flags = 0;
946 }
947 buf->next_element_to_fill = 0;
948 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
949}
950
951void qeth_clear_qdio_buffers(struct qeth_card *card)
952{
953 int i, j;
954
d11ba0c4 955 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
4a71df50
FB		 956 /* clear outbound buffers to free skbs */
957 for (i = 0; i < card->qdio.no_out_queues; ++i)
958 if (card->qdio.out_qs[i]) {
959 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
960 qeth_clear_output_buffer(card->qdio.out_qs[i],
961 &card->qdio.out_qs[i]->bufs[j]);
962 }
963}
964EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
965
966static void qeth_free_buffer_pool(struct qeth_card *card)
967{
968 struct qeth_buffer_pool_entry *pool_entry, *tmp;
969 int i = 0;
d11ba0c4 970 QETH_DBF_TEXT(TRACE, 5, "freepool");
4a71df50
FB		 971 list_for_each_entry_safe(pool_entry, tmp,
972 &card->qdio.init_pool.entry_list, init_list){
973 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
974 free_page((unsigned long)pool_entry->elements[i]);
975 list_del(&pool_entry->init_list);
976 kfree(pool_entry);
977 }
978}
979
980static void qeth_free_qdio_buffers(struct qeth_card *card)
981{
982 int i, j;
983
d11ba0c4 984 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
4a71df50
FB		 985 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
986 QETH_QDIO_UNINITIALIZED)
987 return;
988 kfree(card->qdio.in_q);
989 card->qdio.in_q = NULL;
990 /* inbound buffer pool */
991 qeth_free_buffer_pool(card);
992 /* free outbound qdio_qs */
993 if (card->qdio.out_qs) {
994 for (i = 0; i < card->qdio.no_out_queues; ++i) {
995 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
996 qeth_clear_output_buffer(card->qdio.out_qs[i],
997 &card->qdio.out_qs[i]->bufs[j]);
998 kfree(card->qdio.out_qs[i]);
999 }
1000 kfree(card->qdio.out_qs);
1001 card->qdio.out_qs = NULL;
1002 }
1003}
1004
1005static void qeth_clean_channel(struct qeth_channel *channel)
1006{
1007 int cnt;
1008
d11ba0c4 1009 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1010 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1011 kfree(channel->iob[cnt].data);
1012}
1013
1014static int qeth_is_1920_device(struct qeth_card *card)
1015{
1016 int single_queue = 0;
1017 struct ccw_device *ccwdev;
1018 struct channelPath_dsc {
1019 u8 flags;
1020 u8 lsn;
1021 u8 desc;
1022 u8 chpid;
1023 u8 swla;
1024 u8 zeroes;
1025 u8 chla;
1026 u8 chpp;
1027 } *chp_dsc;
1028
d11ba0c4 1029 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
4a71df50
FB		 1030
1031 ccwdev = card->data.ccwdev;
1032 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1033 if (chp_dsc != NULL) {
1034 /* CHPP field bit 6 == 1 -> single queue */
1035 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1036 kfree(chp_dsc);
1037 }
d11ba0c4 1038 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
4a71df50
FB		 1039 return single_queue;
1040}
1041
1042static void qeth_init_qdio_info(struct qeth_card *card)
1043{
d11ba0c4 1044 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1045 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1046 /* inbound */
1047 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1048 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1049 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1050 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1051 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1052}
1053
1054static void qeth_set_intial_options(struct qeth_card *card)
1055{
1056 card->options.route4.type = NO_ROUTER;
1057 card->options.route6.type = NO_ROUTER;
1058 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1059 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1060 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1061 card->options.fake_broadcast = 0;
1062 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1063 card->options.fake_ll = 0;
1064 card->options.performance_stats = 0;
1065 card->options.rx_sg_cb = QETH_RX_SG_CB;
1066}
1067
1068static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1069{
1070 unsigned long flags;
1071 int rc = 0;
1072
1073 spin_lock_irqsave(&card->thread_mask_lock, flags);
d11ba0c4 1074 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
4a71df50
FB		 1075 (u8) card->thread_start_mask,
1076 (u8) card->thread_allowed_mask,
1077 (u8) card->thread_running_mask);
1078 rc = (card->thread_start_mask & thread);
1079 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1080 return rc;
1081}
1082
1083static void qeth_start_kernel_thread(struct work_struct *work)
1084{
1085 struct qeth_card *card = container_of(work, struct qeth_card,
1086 kernel_thread_starter);
d11ba0c4 1087 QETH_DBF_TEXT(TRACE , 2, "strthrd");
4a71df50
FB		 1088
1089 if (card->read.state != CH_STATE_UP &&
1090 card->write.state != CH_STATE_UP)
1091 return;
1092 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1093 kthread_run(card->discipline.recover, (void *) card,
1094 "qeth_recover");
1095}
1096
1097static int qeth_setup_card(struct qeth_card *card)
1098{
1099
d11ba0c4
PT		 1100 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1101 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1102
1103 card->read.state = CH_STATE_DOWN;
1104 card->write.state = CH_STATE_DOWN;
1105 card->data.state = CH_STATE_DOWN;
1106 card->state = CARD_STATE_DOWN;
1107 card->lan_online = 0;
1108 card->use_hard_stop = 0;
1109 card->dev = NULL;
1110 spin_lock_init(&card->vlanlock);
1111 spin_lock_init(&card->mclock);
1112 card->vlangrp = NULL;
1113 spin_lock_init(&card->lock);
1114 spin_lock_init(&card->ip_lock);
1115 spin_lock_init(&card->thread_mask_lock);
1116 card->thread_start_mask = 0;
1117 card->thread_allowed_mask = 0;
1118 card->thread_running_mask = 0;
1119 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1120 INIT_LIST_HEAD(&card->ip_list);
1121 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1122 if (!card->ip_tbd_list) {
d11ba0c4 1123 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
4a71df50
FB		 1124 return -ENOMEM;
1125 }
1126 INIT_LIST_HEAD(card->ip_tbd_list);
1127 INIT_LIST_HEAD(&card->cmd_waiter_list);
1128 init_waitqueue_head(&card->wait_q);
1129 /* intial options */
1130 qeth_set_intial_options(card);
1131 /* IP address takeover */
1132 INIT_LIST_HEAD(&card->ipato.entries);
1133 card->ipato.enabled = 0;
1134 card->ipato.invert4 = 0;
1135 card->ipato.invert6 = 0;
1136 /* init QDIO stuff */
1137 qeth_init_qdio_info(card);
1138 return 0;
1139}
1140
1141static struct qeth_card *qeth_alloc_card(void)
1142{
1143 struct qeth_card *card;
1144
d11ba0c4 1145 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1146 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1147 if (!card)
1148 return NULL;
d11ba0c4 1149 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1150 if (qeth_setup_channel(&card->read)) {
1151 kfree(card);
1152 return NULL;
1153 }
1154 if (qeth_setup_channel(&card->write)) {
1155 qeth_clean_channel(&card->read);
1156 kfree(card);
1157 return NULL;
1158 }
1159 card->options.layer2 = -1;
1160 return card;
1161}
1162
1163static int qeth_determine_card_type(struct qeth_card *card)
1164{
1165 int i = 0;
1166
d11ba0c4 1167 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1168
1169 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1170 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1171 while (known_devices[i][4]) {
1172 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1173 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1174 card->info.type = known_devices[i][4];
1175 card->qdio.no_out_queues = known_devices[i][8];
1176 card->info.is_multicast_different = known_devices[i][9];
1177 if (qeth_is_1920_device(card)) {
1178 PRINT_INFO("Priority Queueing not able "
1179 "due to hardware limitations!\n");
1180 card->qdio.no_out_queues = 1;
1181 card->qdio.default_out_queue = 0;
1182 }
1183 return 0;
1184 }
1185 i++;
1186 }
1187 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1188 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1189 return -ENOENT;
1190}
1191
1192static int qeth_clear_channel(struct qeth_channel *channel)
1193{
1194 unsigned long flags;
1195 struct qeth_card *card;
1196 int rc;
1197
d11ba0c4 1198 QETH_DBF_TEXT(TRACE, 3, "clearch");
4a71df50
FB		 1199 card = CARD_FROM_CDEV(channel->ccwdev);
1200 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1201 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1202 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1203
1204 if (rc)
1205 return rc;
1206 rc = wait_event_interruptible_timeout(card->wait_q,
1207 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1208 if (rc == -ERESTARTSYS)
1209 return rc;
1210 if (channel->state != CH_STATE_STOPPED)
1211 return -ETIME;
1212 channel->state = CH_STATE_DOWN;
1213 return 0;
1214}
1215
1216static int qeth_halt_channel(struct qeth_channel *channel)
1217{
1218 unsigned long flags;
1219 struct qeth_card *card;
1220 int rc;
1221
d11ba0c4 1222 QETH_DBF_TEXT(TRACE, 3, "haltch");
4a71df50
FB		 1223 card = CARD_FROM_CDEV(channel->ccwdev);
1224 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1225 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1226 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1227
1228 if (rc)
1229 return rc;
1230 rc = wait_event_interruptible_timeout(card->wait_q,
1231 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1232 if (rc == -ERESTARTSYS)
1233 return rc;
1234 if (channel->state != CH_STATE_HALTED)
1235 return -ETIME;
1236 return 0;
1237}
1238
1239static int qeth_halt_channels(struct qeth_card *card)
1240{
1241 int rc1 = 0, rc2 = 0, rc3 = 0;
1242
d11ba0c4 1243 QETH_DBF_TEXT(TRACE, 3, "haltchs");
4a71df50
FB		 1244 rc1 = qeth_halt_channel(&card->read);
1245 rc2 = qeth_halt_channel(&card->write);
1246 rc3 = qeth_halt_channel(&card->data);
1247 if (rc1)
1248 return rc1;
1249 if (rc2)
1250 return rc2;
1251 return rc3;
1252}
1253
1254static int qeth_clear_channels(struct qeth_card *card)
1255{
1256 int rc1 = 0, rc2 = 0, rc3 = 0;
1257
d11ba0c4 1258 QETH_DBF_TEXT(TRACE, 3, "clearchs");
4a71df50
FB		 1259 rc1 = qeth_clear_channel(&card->read);
1260 rc2 = qeth_clear_channel(&card->write);
1261 rc3 = qeth_clear_channel(&card->data);
1262 if (rc1)
1263 return rc1;
1264 if (rc2)
1265 return rc2;
1266 return rc3;
1267}
1268
1269static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1270{
1271 int rc = 0;
1272
d11ba0c4
PT		 1273 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1274 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
4a71df50
FB		 1275
1276 if (halt)
1277 rc = qeth_halt_channels(card);
1278 if (rc)
1279 return rc;
1280 return qeth_clear_channels(card);
1281}
1282
1283int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1284{
1285 int rc = 0;
1286
d11ba0c4 1287 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
4a71df50
FB		 1288 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1289 QETH_QDIO_CLEANING)) {
1290 case QETH_QDIO_ESTABLISHED:
1291 if (card->info.type == QETH_CARD_TYPE_IQD)
1292 rc = qdio_cleanup(CARD_DDEV(card),
1293 QDIO_FLAG_CLEANUP_USING_HALT);
1294 else
1295 rc = qdio_cleanup(CARD_DDEV(card),
1296 QDIO_FLAG_CLEANUP_USING_CLEAR);
1297 if (rc)
d11ba0c4 1298 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
4a71df50
FB		 1299 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1300 break;
1301 case QETH_QDIO_CLEANING:
1302 return rc;
1303 default:
1304 break;
1305 }
1306 rc = qeth_clear_halt_card(card, use_halt);
1307 if (rc)
d11ba0c4 1308 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
4a71df50
FB		 1309 card->state = CARD_STATE_DOWN;
1310 return rc;
1311}
1312EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1313
1314static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1315 int *length)
1316{
1317 struct ciw *ciw;
1318 char *rcd_buf;
1319 int ret;
1320 struct qeth_channel *channel = &card->data;
1321 unsigned long flags;
1322
1323 /*
1324 * scan for RCD command in extended SenseID data
1325 */
1326 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1327 if (!ciw || ciw->cmd == 0)
1328 return -EOPNOTSUPP;
1329 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1330 if (!rcd_buf)
1331 return -ENOMEM;
1332
1333 channel->ccw.cmd_code = ciw->cmd;
1334 channel->ccw.cda = (__u32) __pa(rcd_buf);
1335 channel->ccw.count = ciw->count;
1336 channel->ccw.flags = CCW_FLAG_SLI;
1337 channel->state = CH_STATE_RCD;
1338 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1339 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1340 QETH_RCD_PARM, LPM_ANYPATH, 0,
1341 QETH_RCD_TIMEOUT);
1342 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1343 if (!ret)
1344 wait_event(card->wait_q,
1345 (channel->state == CH_STATE_RCD_DONE ||
1346 channel->state == CH_STATE_DOWN));
1347 if (channel->state == CH_STATE_DOWN)
1348 ret = -EIO;
1349 else
1350 channel->state = CH_STATE_DOWN;
1351 if (ret) {
1352 kfree(rcd_buf);
1353 *buffer = NULL;
1354 *length = 0;
1355 } else {
1356 *length = ciw->count;
1357 *buffer = rcd_buf;
1358 }
1359 return ret;
1360}
1361
1362static int qeth_get_unitaddr(struct qeth_card *card)
1363{
1364 int length;
1365 char *prcd;
1366 int rc;
1367
d11ba0c4 1368 QETH_DBF_TEXT(SETUP, 2, "getunit");
4a71df50
FB		 1369 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1370 if (rc) {
1371 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1372 CARD_DDEV_ID(card), rc);
1373 return rc;
1374 }
1375 card->info.chpid = prcd[30];
1376 card->info.unit_addr2 = prcd[31];
1377 card->info.cula = prcd[63];
1378 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1379 (prcd[0x11] == _ascebc['M']));
1380 kfree(prcd);
1381 return 0;
1382}
1383
1384static void qeth_init_tokens(struct qeth_card *card)
1385{
1386 card->token.issuer_rm_w = 0x00010103UL;
1387 card->token.cm_filter_w = 0x00010108UL;
1388 card->token.cm_connection_w = 0x0001010aUL;
1389 card->token.ulp_filter_w = 0x0001010bUL;
1390 card->token.ulp_connection_w = 0x0001010dUL;
1391}
1392
1393static void qeth_init_func_level(struct qeth_card *card)
1394{
1395 if (card->ipato.enabled) {
1396 if (card->info.type == QETH_CARD_TYPE_IQD)
1397 card->info.func_level =
1398 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1399 else
1400 card->info.func_level =
1401 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1402 } else {
1403 if (card->info.type == QETH_CARD_TYPE_IQD)
1404 /*FIXME:why do we have same values for dis and ena for
1405 osae??? */
1406 card->info.func_level =
1407 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1408 else
1409 card->info.func_level =
1410 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1411 }
1412}
1413
4a71df50
FB		 1414static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1415 void (*idx_reply_cb)(struct qeth_channel *,
1416 struct qeth_cmd_buffer *))
1417{
1418 struct qeth_cmd_buffer *iob;
1419 unsigned long flags;
1420 int rc;
1421 struct qeth_card *card;
1422
d11ba0c4 1423 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1424 card = CARD_FROM_CDEV(channel->ccwdev);
1425 iob = qeth_get_buffer(channel);
1426 iob->callback = idx_reply_cb;
1427 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1428 channel->ccw.count = QETH_BUFSIZE;
1429 channel->ccw.cda = (__u32) __pa(iob->data);
1430
1431 wait_event(card->wait_q,
1432 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1433 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1434 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1435 rc = ccw_device_start(channel->ccwdev,
1436 &channel->ccw, (addr_t) iob, 0, 0);
1437 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1438
1439 if (rc) {
14cc21b6 1440 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1441 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1442 atomic_set(&channel->irq_pending, 0);
1443 wake_up(&card->wait_q);
1444 return rc;
1445 }
1446 rc = wait_event_interruptible_timeout(card->wait_q,
1447 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1448 if (rc == -ERESTARTSYS)
1449 return rc;
1450 if (channel->state != CH_STATE_UP) {
1451 rc = -ETIME;
d11ba0c4 1452 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1453 qeth_clear_cmd_buffers(channel);
1454 } else
1455 rc = 0;
1456 return rc;
1457}
1458
1459static int qeth_idx_activate_channel(struct qeth_channel *channel,
1460 void (*idx_reply_cb)(struct qeth_channel *,
1461 struct qeth_cmd_buffer *))
1462{
1463 struct qeth_card *card;
1464 struct qeth_cmd_buffer *iob;
1465 unsigned long flags;
1466 __u16 temp;
1467 __u8 tmp;
1468 int rc;
f06f6f32 1469 struct ccw_dev_id temp_devid;
4a71df50
FB		 1470
1471 card = CARD_FROM_CDEV(channel->ccwdev);
1472
d11ba0c4 1473 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1474
1475 iob = qeth_get_buffer(channel);
1476 iob->callback = idx_reply_cb;
1477 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1478 channel->ccw.count = IDX_ACTIVATE_SIZE;
1479 channel->ccw.cda = (__u32) __pa(iob->data);
1480 if (channel == &card->write) {
1481 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1482 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1483 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1484 card->seqno.trans_hdr++;
1485 } else {
1486 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1487 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1488 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1489 }
1490 tmp = ((__u8)card->info.portno) | 0x80;
1491 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1492 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1493 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1494 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1495 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1496 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1497 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1498 temp = (card->info.cula << 8) + card->info.unit_addr2;
1499 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1500
1501 wait_event(card->wait_q,
1502 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1503 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1504 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1505 rc = ccw_device_start(channel->ccwdev,
1506 &channel->ccw, (addr_t) iob, 0, 0);
1507 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1508
1509 if (rc) {
14cc21b6
FB		 1510 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1511 rc);
d11ba0c4 1512 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1513 atomic_set(&channel->irq_pending, 0);
1514 wake_up(&card->wait_q);
1515 return rc;
1516 }
1517 rc = wait_event_interruptible_timeout(card->wait_q,
1518 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1519 if (rc == -ERESTARTSYS)
1520 return rc;
1521 if (channel->state != CH_STATE_ACTIVATING) {
1522 PRINT_WARN("IDX activate timed out!\n");
d11ba0c4 1523 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1524 qeth_clear_cmd_buffers(channel);
1525 return -ETIME;
1526 }
1527 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1528}
1529
1530static int qeth_peer_func_level(int level)
1531{
1532 if ((level & 0xff) == 8)
1533 return (level & 0xff) + 0x400;
1534 if (((level >> 8) & 3) == 1)
1535 return (level & 0xff) + 0x200;
1536 return level;
1537}
1538
1539static void qeth_idx_write_cb(struct qeth_channel *channel,
1540 struct qeth_cmd_buffer *iob)
1541{
1542 struct qeth_card *card;
1543 __u16 temp;
1544
d11ba0c4 1545 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1546
1547 if (channel->state == CH_STATE_DOWN) {
1548 channel->state = CH_STATE_ACTIVATING;
1549 goto out;
1550 }
1551 card = CARD_FROM_CDEV(channel->ccwdev);
1552
1553 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1554 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1555 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1556 "adapter exclusively used by another host\n",
1557 CARD_WDEV_ID(card));
1558 else
1559 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1560 "negative reply\n", CARD_WDEV_ID(card));
1561 goto out;
1562 }
1563 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1564 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1565 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1566 "function level mismatch "
1567 "(sent: 0x%x, received: 0x%x)\n",
1568 CARD_WDEV_ID(card), card->info.func_level, temp);
1569 goto out;
1570 }
1571 channel->state = CH_STATE_UP;
1572out:
1573 qeth_release_buffer(channel, iob);
1574}
1575
1576static void qeth_idx_read_cb(struct qeth_channel *channel,
1577 struct qeth_cmd_buffer *iob)
1578{
1579 struct qeth_card *card;
1580 __u16 temp;
1581
d11ba0c4 1582 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1583 if (channel->state == CH_STATE_DOWN) {
1584 channel->state = CH_STATE_ACTIVATING;
1585 goto out;
1586 }
1587
1588 card = CARD_FROM_CDEV(channel->ccwdev);
1589 if (qeth_check_idx_response(iob->data))
1590 goto out;
1591
1592 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1593 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1594 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1595 "adapter exclusively used by another host\n",
1596 CARD_RDEV_ID(card));
1597 else
1598 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1599 "negative reply\n", CARD_RDEV_ID(card));
1600 goto out;
1601 }
1602
1603/**
1604 * temporary fix for microcode bug
1605 * to revert it,replace OR by AND
1606 */
1607 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1608 (card->info.type == QETH_CARD_TYPE_OSAE))
1609 card->info.portname_required = 1;
1610
1611 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1612 if (temp != qeth_peer_func_level(card->info.func_level)) {
1613 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1614 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1615 CARD_RDEV_ID(card), card->info.func_level, temp);
1616 goto out;
1617 }
1618 memcpy(&card->token.issuer_rm_r,
1619 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1620 QETH_MPC_TOKEN_LENGTH);
1621 memcpy(&card->info.mcl_level[0],
1622 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1623 channel->state = CH_STATE_UP;
1624out:
1625 qeth_release_buffer(channel, iob);
1626}
1627
1628void qeth_prepare_control_data(struct qeth_card *card, int len,
1629 struct qeth_cmd_buffer *iob)
1630{
1631 qeth_setup_ccw(&card->write, iob->data, len);
1632 iob->callback = qeth_release_buffer;
1633
1634 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1635 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1636 card->seqno.trans_hdr++;
1637 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1638 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1639 card->seqno.pdu_hdr++;
1640 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1641 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1642 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1643}
1644EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1645
1646int qeth_send_control_data(struct qeth_card *card, int len,
1647 struct qeth_cmd_buffer *iob,
1648 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1649 unsigned long),
1650 void *reply_param)
1651{
1652 int rc;
1653 unsigned long flags;
1654 struct qeth_reply *reply = NULL;
1655 unsigned long timeout;
1656
d11ba0c4 1657 QETH_DBF_TEXT(TRACE, 2, "sendctl");
4a71df50
FB		 1658
1659 reply = qeth_alloc_reply(card);
1660 if (!reply) {
4a71df50
FB		 1661 return -ENOMEM;
1662 }
1663 reply->callback = reply_cb;
1664 reply->param = reply_param;
1665 if (card->state == CARD_STATE_DOWN)
1666 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1667 else
1668 reply->seqno = card->seqno.ipa++;
1669 init_waitqueue_head(&reply->wait_q);
1670 spin_lock_irqsave(&card->lock, flags);
1671 list_add_tail(&reply->list, &card->cmd_waiter_list);
1672 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1673 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1674
1675 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1676 qeth_prepare_control_data(card, len, iob);
1677
1678 if (IS_IPA(iob->data))
1679 timeout = jiffies + QETH_IPA_TIMEOUT;
1680 else
1681 timeout = jiffies + QETH_TIMEOUT;
1682
d11ba0c4 1683 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 1684 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1685 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1686 (addr_t) iob, 0, 0);
1687 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1688 if (rc) {
1689 PRINT_WARN("qeth_send_control_data: "
1690 "ccw_device_start rc = %i\n", rc);
d11ba0c4 1691 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
4a71df50
FB		 1692 spin_lock_irqsave(&card->lock, flags);
1693 list_del_init(&reply->list);
1694 qeth_put_reply(reply);
1695 spin_unlock_irqrestore(&card->lock, flags);
1696 qeth_release_buffer(iob->channel, iob);
1697 atomic_set(&card->write.irq_pending, 0);
1698 wake_up(&card->wait_q);
1699 return rc;
1700 }
1701 while (!atomic_read(&reply->received)) {
1702 if (time_after(jiffies, timeout)) {
1703 spin_lock_irqsave(&reply->card->lock, flags);
1704 list_del_init(&reply->list);
1705 spin_unlock_irqrestore(&reply->card->lock, flags);
1706 reply->rc = -ETIME;
1707 atomic_inc(&reply->received);
1708 wake_up(&reply->wait_q);
1709 }
1710 cpu_relax();
1711 };
1712 rc = reply->rc;
1713 qeth_put_reply(reply);
1714 return rc;
1715}
1716EXPORT_SYMBOL_GPL(qeth_send_control_data);
1717
1718static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1719 unsigned long data)
1720{
1721 struct qeth_cmd_buffer *iob;
1722
d11ba0c4 1723 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1724
1725 iob = (struct qeth_cmd_buffer *) data;
1726 memcpy(&card->token.cm_filter_r,
1727 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1728 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1729 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1730 return 0;
1731}
1732
1733static int qeth_cm_enable(struct qeth_card *card)
1734{
1735 int rc;
1736 struct qeth_cmd_buffer *iob;
1737
d11ba0c4 1738 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1739
1740 iob = qeth_wait_for_buffer(&card->write);
1741 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1742 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1743 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1744 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1745 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1746
1747 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1748 qeth_cm_enable_cb, NULL);
1749 return rc;
1750}
1751
1752static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1753 unsigned long data)
1754{
1755
1756 struct qeth_cmd_buffer *iob;
1757
d11ba0c4 1758 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1759
1760 iob = (struct qeth_cmd_buffer *) data;
1761 memcpy(&card->token.cm_connection_r,
1762 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1763 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1764 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1765 return 0;
1766}
1767
1768static int qeth_cm_setup(struct qeth_card *card)
1769{
1770 int rc;
1771 struct qeth_cmd_buffer *iob;
1772
d11ba0c4 1773 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1774
1775 iob = qeth_wait_for_buffer(&card->write);
1776 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1777 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1778 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1779 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1780 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1781 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1782 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1783 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1784 qeth_cm_setup_cb, NULL);
1785 return rc;
1786
1787}
1788
1789static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1790{
1791 switch (card->info.type) {
1792 case QETH_CARD_TYPE_UNKNOWN:
1793 return 1500;
1794 case QETH_CARD_TYPE_IQD:
1795 return card->info.max_mtu;
1796 case QETH_CARD_TYPE_OSAE:
1797 switch (card->info.link_type) {
1798 case QETH_LINK_TYPE_HSTR:
1799 case QETH_LINK_TYPE_LANE_TR:
1800 return 2000;
1801 default:
1802 return 1492;
1803 }
1804 default:
1805 return 1500;
1806 }
1807}
1808
1809static inline int qeth_get_max_mtu_for_card(int cardtype)
1810{
1811 switch (cardtype) {
1812
1813 case QETH_CARD_TYPE_UNKNOWN:
1814 case QETH_CARD_TYPE_OSAE:
1815 case QETH_CARD_TYPE_OSN:
1816 return 61440;
1817 case QETH_CARD_TYPE_IQD:
1818 return 57344;
1819 default:
1820 return 1500;
1821 }
1822}
1823
1824static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1825{
1826 switch (cardtype) {
1827 case QETH_CARD_TYPE_IQD:
1828 return 1;
1829 default:
1830 return 0;
1831 }
1832}
1833
1834static inline int qeth_get_mtu_outof_framesize(int framesize)
1835{
1836 switch (framesize) {
1837 case 0x4000:
1838 return 8192;
1839 case 0x6000:
1840 return 16384;
1841 case 0xa000:
1842 return 32768;
1843 case 0xffff:
1844 return 57344;
1845 default:
1846 return 0;
1847 }
1848}
1849
1850static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1851{
1852 switch (card->info.type) {
1853 case QETH_CARD_TYPE_OSAE:
1854 return ((mtu >= 576) && (mtu <= 61440));
1855 case QETH_CARD_TYPE_IQD:
1856 return ((mtu >= 576) &&
1857 (mtu <= card->info.max_mtu + 4096 - 32));
1858 case QETH_CARD_TYPE_OSN:
1859 case QETH_CARD_TYPE_UNKNOWN:
1860 default:
1861 return 1;
1862 }
1863}
1864
1865static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1866 unsigned long data)
1867{
1868
1869 __u16 mtu, framesize;
1870 __u16 len;
1871 __u8 link_type;
1872 struct qeth_cmd_buffer *iob;
1873
d11ba0c4 1874 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1875
1876 iob = (struct qeth_cmd_buffer *) data;
1877 memcpy(&card->token.ulp_filter_r,
1878 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1879 QETH_MPC_TOKEN_LENGTH);
1880 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1881 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1882 mtu = qeth_get_mtu_outof_framesize(framesize);
1883 if (!mtu) {
1884 iob->rc = -EINVAL;
d11ba0c4 1885 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1886 return 0;
1887 }
1888 card->info.max_mtu = mtu;
1889 card->info.initial_mtu = mtu;
1890 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1891 } else {
1892 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1893 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1894 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1895 }
1896
1897 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1898 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1899 memcpy(&link_type,
1900 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1901 card->info.link_type = link_type;
1902 } else
1903 card->info.link_type = 0;
d11ba0c4 1904 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1905 return 0;
1906}
1907
1908static int qeth_ulp_enable(struct qeth_card *card)
1909{
1910 int rc;
1911 char prot_type;
1912 struct qeth_cmd_buffer *iob;
1913
1914 /*FIXME: trace view callbacks*/
d11ba0c4 1915 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1916
1917 iob = qeth_wait_for_buffer(&card->write);
1918 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1919
1920 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1921 (__u8) card->info.portno;
1922 if (card->options.layer2)
1923 if (card->info.type == QETH_CARD_TYPE_OSN)
1924 prot_type = QETH_PROT_OSN2;
1925 else
1926 prot_type = QETH_PROT_LAYER2;
1927 else
1928 prot_type = QETH_PROT_TCPIP;
1929
1930 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1931 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1932 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1933 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1934 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1935 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1936 card->info.portname, 9);
1937 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1938 qeth_ulp_enable_cb, NULL);
1939 return rc;
1940
1941}
1942
1943static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1944 unsigned long data)
1945{
1946 struct qeth_cmd_buffer *iob;
1947
d11ba0c4 1948 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 1949
1950 iob = (struct qeth_cmd_buffer *) data;
1951 memcpy(&card->token.ulp_connection_r,
1952 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1953 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1954 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1955 return 0;
1956}
1957
1958static int qeth_ulp_setup(struct qeth_card *card)
1959{
1960 int rc;
1961 __u16 temp;
1962 struct qeth_cmd_buffer *iob;
1963 struct ccw_dev_id dev_id;
1964
d11ba0c4 1965 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 1966
1967 iob = qeth_wait_for_buffer(&card->write);
1968 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
1969
1970 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
1971 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1972 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
1973 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
1974 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
1975 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
1976
1977 ccw_device_get_id(CARD_DDEV(card), &dev_id);
1978 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
1979 temp = (card->info.cula << 8) + card->info.unit_addr2;
1980 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
1981 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
1982 qeth_ulp_setup_cb, NULL);
1983 return rc;
1984}
1985
1986static int qeth_alloc_qdio_buffers(struct qeth_card *card)
1987{
1988 int i, j;
1989
d11ba0c4 1990 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 1991
1992 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
1993 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
1994 return 0;
1995
1996 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 1997 GFP_KERNEL);
4a71df50
FB		 1998 if (!card->qdio.in_q)
1999 goto out_nomem;
d11ba0c4
PT		 2000 QETH_DBF_TEXT(SETUP, 2, "inq");
2001 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2002 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2003 /* give inbound qeth_qdio_buffers their qdio_buffers */
2004 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2005 card->qdio.in_q->bufs[i].buffer =
2006 &card->qdio.in_q->qdio_bufs[i];
2007 /* inbound buffer pool */
2008 if (qeth_alloc_buffer_pool(card))
2009 goto out_freeinq;
2010 /* outbound */
2011 card->qdio.out_qs =
2012 kmalloc(card->qdio.no_out_queues *
2013 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2014 if (!card->qdio.out_qs)
2015 goto out_freepool;
2016 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2017 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2018 GFP_KERNEL);
4a71df50
FB		 2019 if (!card->qdio.out_qs[i])
2020 goto out_freeoutq;
d11ba0c4
PT		 2021 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2022 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2023 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2024 card->qdio.out_qs[i]->queue_no = i;
2025 /* give outbound qeth_qdio_buffers their qdio_buffers */
2026 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2027 card->qdio.out_qs[i]->bufs[j].buffer =
2028 &card->qdio.out_qs[i]->qdio_bufs[j];
2029 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2030 skb_list);
2031 lockdep_set_class(
2032 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2033 &qdio_out_skb_queue_key);
2034 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2035 }
2036 }
2037 return 0;
2038
2039out_freeoutq:
2040 while (i > 0)
2041 kfree(card->qdio.out_qs[--i]);
2042 kfree(card->qdio.out_qs);
2043 card->qdio.out_qs = NULL;
2044out_freepool:
2045 qeth_free_buffer_pool(card);
2046out_freeinq:
2047 kfree(card->qdio.in_q);
2048 card->qdio.in_q = NULL;
2049out_nomem:
2050 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2051 return -ENOMEM;
2052}
2053
2054static void qeth_create_qib_param_field(struct qeth_card *card,
2055 char *param_field)
2056{
2057
2058 param_field[0] = _ascebc['P'];
2059 param_field[1] = _ascebc['C'];
2060 param_field[2] = _ascebc['I'];
2061 param_field[3] = _ascebc['T'];
2062 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2063 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2064 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2065}
2066
2067static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2068 char *param_field)
2069{
2070 param_field[16] = _ascebc['B'];
2071 param_field[17] = _ascebc['L'];
2072 param_field[18] = _ascebc['K'];
2073 param_field[19] = _ascebc['T'];
2074 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2075 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2076 *((unsigned int *) (&param_field[28])) =
2077 card->info.blkt.inter_packet_jumbo;
2078}
2079
2080static int qeth_qdio_activate(struct qeth_card *card)
2081{
d11ba0c4 2082 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2083 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2084}
2085
2086static int qeth_dm_act(struct qeth_card *card)
2087{
2088 int rc;
2089 struct qeth_cmd_buffer *iob;
2090
d11ba0c4 2091 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2092
2093 iob = qeth_wait_for_buffer(&card->write);
2094 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2095
2096 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2097 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2098 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2099 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2100 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2101 return rc;
2102}
2103
2104static int qeth_mpc_initialize(struct qeth_card *card)
2105{
2106 int rc;
2107
d11ba0c4 2108 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2109
2110 rc = qeth_issue_next_read(card);
2111 if (rc) {
d11ba0c4 2112 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2113 return rc;
2114 }
2115 rc = qeth_cm_enable(card);
2116 if (rc) {
d11ba0c4 2117 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2118 goto out_qdio;
2119 }
2120 rc = qeth_cm_setup(card);
2121 if (rc) {
d11ba0c4 2122 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2123 goto out_qdio;
2124 }
2125 rc = qeth_ulp_enable(card);
2126 if (rc) {
d11ba0c4 2127 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2128 goto out_qdio;
2129 }
2130 rc = qeth_ulp_setup(card);
2131 if (rc) {
d11ba0c4 2132 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2133 goto out_qdio;
2134 }
2135 rc = qeth_alloc_qdio_buffers(card);
2136 if (rc) {
d11ba0c4 2137 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2138 goto out_qdio;
2139 }
2140 rc = qeth_qdio_establish(card);
2141 if (rc) {
d11ba0c4 2142 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2143 qeth_free_qdio_buffers(card);
2144 goto out_qdio;
2145 }
2146 rc = qeth_qdio_activate(card);
2147 if (rc) {
d11ba0c4 2148 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2149 goto out_qdio;
2150 }
2151 rc = qeth_dm_act(card);
2152 if (rc) {
d11ba0c4 2153 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2154 goto out_qdio;
2155 }
2156
2157 return 0;
2158out_qdio:
2159 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2160 return rc;
2161}
2162
2163static void qeth_print_status_with_portname(struct qeth_card *card)
2164{
2165 char dbf_text[15];
2166 int i;
2167
2168 sprintf(dbf_text, "%s", card->info.portname + 1);
2169 for (i = 0; i < 8; i++)
2170 dbf_text[i] =
2171 (char) _ebcasc[(__u8) dbf_text[i]];
2172 dbf_text[8] = 0;
2173 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n"
2174 "with link type %s (portname: %s)\n",
2175 CARD_RDEV_ID(card),
2176 CARD_WDEV_ID(card),
2177 CARD_DDEV_ID(card),
2178 qeth_get_cardname(card),
2179 (card->info.mcl_level[0]) ? " (level: " : "",
2180 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2181 (card->info.mcl_level[0]) ? ")" : "",
2182 qeth_get_cardname_short(card),
2183 dbf_text);
2184
2185}
2186
2187static void qeth_print_status_no_portname(struct qeth_card *card)
2188{
2189 if (card->info.portname[0])
2190 PRINT_INFO("Device %s/%s/%s is a%s "
2191 "card%s%s%s\nwith link type %s "
2192 "(no portname needed by interface).\n",
2193 CARD_RDEV_ID(card),
2194 CARD_WDEV_ID(card),
2195 CARD_DDEV_ID(card),
2196 qeth_get_cardname(card),
2197 (card->info.mcl_level[0]) ? " (level: " : "",
2198 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2199 (card->info.mcl_level[0]) ? ")" : "",
2200 qeth_get_cardname_short(card));
2201 else
2202 PRINT_INFO("Device %s/%s/%s is a%s "
2203 "card%s%s%s\nwith link type %s.\n",
2204 CARD_RDEV_ID(card),
2205 CARD_WDEV_ID(card),
2206 CARD_DDEV_ID(card),
2207 qeth_get_cardname(card),
2208 (card->info.mcl_level[0]) ? " (level: " : "",
2209 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2210 (card->info.mcl_level[0]) ? ")" : "",
2211 qeth_get_cardname_short(card));
2212}
2213
2214void qeth_print_status_message(struct qeth_card *card)
2215{
2216 switch (card->info.type) {
2217 case QETH_CARD_TYPE_OSAE:
2218 /* VM will use a non-zero first character
2219 * to indicate a HiperSockets like reporting
2220 * of the level OSA sets the first character to zero
2221 * */
2222 if (!card->info.mcl_level[0]) {
2223 sprintf(card->info.mcl_level, "%02x%02x",
2224 card->info.mcl_level[2],
2225 card->info.mcl_level[3]);
2226
2227 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2228 break;
2229 }
2230 /* fallthrough */
2231 case QETH_CARD_TYPE_IQD:
2232 if (card->info.guestlan) {
2233 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2234 card->info.mcl_level[0]];
2235 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2236 card->info.mcl_level[1]];
2237 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2238 card->info.mcl_level[2]];
2239 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2240 card->info.mcl_level[3]];
2241 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2242 }
2243 break;
2244 default:
2245 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2246 }
2247 if (card->info.portname_required)
2248 qeth_print_status_with_portname(card);
2249 else
2250 qeth_print_status_no_portname(card);
2251}
2252EXPORT_SYMBOL_GPL(qeth_print_status_message);
2253
4a71df50
FB		 2254static void qeth_initialize_working_pool_list(struct qeth_card *card)
2255{
2256 struct qeth_buffer_pool_entry *entry;
2257
d11ba0c4 2258 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
4a71df50
FB		 2259
2260 list_for_each_entry(entry,
2261 &card->qdio.init_pool.entry_list, init_list) {
2262 qeth_put_buffer_pool_entry(card, entry);
2263 }
2264}
2265
2266static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2267 struct qeth_card *card)
2268{
2269 struct list_head *plh;
2270 struct qeth_buffer_pool_entry *entry;
2271 int i, free;
2272 struct page *page;
2273
2274 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2275 return NULL;
2276
2277 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2278 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2279 free = 1;
2280 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2281 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2282 free = 0;
2283 break;
2284 }
2285 }
2286 if (free) {
2287 list_del_init(&entry->list);
2288 return entry;
2289 }
2290 }
2291
2292 /* no free buffer in pool so take first one and swap pages */
2293 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2294 struct qeth_buffer_pool_entry, list);
2295 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2296 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2297 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2298 if (!page) {
2299 return NULL;
2300 } else {
2301 free_page((unsigned long)entry->elements[i]);
2302 entry->elements[i] = page_address(page);
2303 if (card->options.performance_stats)
2304 card->perf_stats.sg_alloc_page_rx++;
2305 }
2306 }
2307 }
2308 list_del_init(&entry->list);
2309 return entry;
2310}
2311
2312static int qeth_init_input_buffer(struct qeth_card *card,
2313 struct qeth_qdio_buffer *buf)
2314{
2315 struct qeth_buffer_pool_entry *pool_entry;
2316 int i;
2317
2318 pool_entry = qeth_find_free_buffer_pool_entry(card);
2319 if (!pool_entry)
2320 return 1;
2321
2322 /*
2323 * since the buffer is accessed only from the input_tasklet
2324 * there shouldn't be a need to synchronize; also, since we use
2325 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2326 * buffers
2327 */
2328 BUG_ON(!pool_entry);
2329
2330 buf->pool_entry = pool_entry;
2331 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2332 buf->buffer->element[i].length = PAGE_SIZE;
2333 buf->buffer->element[i].addr = pool_entry->elements[i];
2334 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2335 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2336 else
2337 buf->buffer->element[i].flags = 0;
2338 }
2339 return 0;
2340}
2341
2342int qeth_init_qdio_queues(struct qeth_card *card)
2343{
2344 int i, j;
2345 int rc;
2346
d11ba0c4 2347 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2348
2349 /* inbound queue */
2350 memset(card->qdio.in_q->qdio_bufs, 0,
2351 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2352 qeth_initialize_working_pool_list(card);
2353 /*give only as many buffers to hardware as we have buffer pool entries*/
2354 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2355 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2356 card->qdio.in_q->next_buf_to_init =
2357 card->qdio.in_buf_pool.buf_count - 1;
2358 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2359 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2360 if (rc) {
d11ba0c4 2361 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2362 return rc;
2363 }
4a71df50
FB		 2364 /* outbound queue */
2365 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2366 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2367 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2368 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2369 qeth_clear_output_buffer(card->qdio.out_qs[i],
2370 &card->qdio.out_qs[i]->bufs[j]);
2371 }
2372 card->qdio.out_qs[i]->card = card;
2373 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2374 card->qdio.out_qs[i]->do_pack = 0;
2375 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2376 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2377 atomic_set(&card->qdio.out_qs[i]->state,
2378 QETH_OUT_Q_UNLOCKED);
2379 }
2380 return 0;
2381}
2382EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2383
2384static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2385{
2386 switch (link_type) {
2387 case QETH_LINK_TYPE_HSTR:
2388 return 2;
2389 default:
2390 return 1;
2391 }
2392}
2393
2394static void qeth_fill_ipacmd_header(struct qeth_card *card,
2395 struct qeth_ipa_cmd *cmd, __u8 command,
2396 enum qeth_prot_versions prot)
2397{
2398 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2399 cmd->hdr.command = command;
2400 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2401 cmd->hdr.seqno = card->seqno.ipa;
2402 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2403 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2404 if (card->options.layer2)
2405 cmd->hdr.prim_version_no = 2;
2406 else
2407 cmd->hdr.prim_version_no = 1;
2408 cmd->hdr.param_count = 1;
2409 cmd->hdr.prot_version = prot;
2410 cmd->hdr.ipa_supported = 0;
2411 cmd->hdr.ipa_enabled = 0;
2412}
2413
2414struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2415 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2416{
2417 struct qeth_cmd_buffer *iob;
2418 struct qeth_ipa_cmd *cmd;
2419
2420 iob = qeth_wait_for_buffer(&card->write);
2421 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2422 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2423
2424 return iob;
2425}
2426EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2427
2428void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2429 char prot_type)
2430{
2431 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2432 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2433 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2434 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2435}
2436EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2437
2438int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2439 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2440 unsigned long),
2441 void *reply_param)
2442{
2443 int rc;
2444 char prot_type;
4a71df50 2445
d11ba0c4 2446 QETH_DBF_TEXT(TRACE, 4, "sendipa");
4a71df50
FB		 2447
2448 if (card->options.layer2)
2449 if (card->info.type == QETH_CARD_TYPE_OSN)
2450 prot_type = QETH_PROT_OSN2;
2451 else
2452 prot_type = QETH_PROT_LAYER2;
2453 else
2454 prot_type = QETH_PROT_TCPIP;
2455 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2456 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2457 iob, reply_cb, reply_param);
4a71df50
FB		 2458 return rc;
2459}
2460EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2461
2462static int qeth_send_startstoplan(struct qeth_card *card,
2463 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2464{
2465 int rc;
2466 struct qeth_cmd_buffer *iob;
2467
2468 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2469 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2470
2471 return rc;
2472}
2473
2474int qeth_send_startlan(struct qeth_card *card)
2475{
2476 int rc;
2477
d11ba0c4 2478 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2479
2480 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2481 return rc;
2482}
2483EXPORT_SYMBOL_GPL(qeth_send_startlan);
2484
2485int qeth_send_stoplan(struct qeth_card *card)
2486{
2487 int rc = 0;
2488
2489 /*
2490 * TODO: according to the IPA format document page 14,
2491 * TCP/IP (we!) never issue a STOPLAN
2492 * is this right ?!?
2493 */
d11ba0c4 2494 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2495
2496 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2497 return rc;
2498}
2499EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2500
2501int qeth_default_setadapterparms_cb(struct qeth_card *card,
2502 struct qeth_reply *reply, unsigned long data)
2503{
2504 struct qeth_ipa_cmd *cmd;
2505
d11ba0c4 2506 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
4a71df50
FB		 2507
2508 cmd = (struct qeth_ipa_cmd *) data;
2509 if (cmd->hdr.return_code == 0)
2510 cmd->hdr.return_code =
2511 cmd->data.setadapterparms.hdr.return_code;
2512 return 0;
2513}
2514EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2515
2516static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2517 struct qeth_reply *reply, unsigned long data)
2518{
2519 struct qeth_ipa_cmd *cmd;
2520
d11ba0c4 2521 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
4a71df50
FB		 2522
2523 cmd = (struct qeth_ipa_cmd *) data;
2524 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2525 card->info.link_type =
2526 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2527 card->options.adp.supported_funcs =
2528 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2529 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2530}
2531
2532struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2533 __u32 command, __u32 cmdlen)
2534{
2535 struct qeth_cmd_buffer *iob;
2536 struct qeth_ipa_cmd *cmd;
2537
2538 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2539 QETH_PROT_IPV4);
2540 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2541 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2542 cmd->data.setadapterparms.hdr.command_code = command;
2543 cmd->data.setadapterparms.hdr.used_total = 1;
2544 cmd->data.setadapterparms.hdr.seq_no = 1;
2545
2546 return iob;
2547}
2548EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2549
2550int qeth_query_setadapterparms(struct qeth_card *card)
2551{
2552 int rc;
2553 struct qeth_cmd_buffer *iob;
2554
d11ba0c4 2555 QETH_DBF_TEXT(TRACE, 3, "queryadp");
4a71df50
FB		 2556 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2557 sizeof(struct qeth_ipacmd_setadpparms));
2558 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2559 return rc;
2560}
2561EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2562
2563int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
779e6e1c 2564 const char *dbftext)
4a71df50 2565{
779e6e1c 2566 if (qdio_error) {
d11ba0c4
PT		 2567 QETH_DBF_TEXT(TRACE, 2, dbftext);
2568 QETH_DBF_TEXT(QERR, 2, dbftext);
2569 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
4a71df50 2570 buf->element[15].flags & 0xff);
d11ba0c4 2571 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
4a71df50 2572 buf->element[14].flags & 0xff);
d11ba0c4 2573 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
4a71df50
FB		 2574 return 1;
2575 }
2576 return 0;
2577}
2578EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2579
2580void qeth_queue_input_buffer(struct qeth_card *card, int index)
2581{
2582 struct qeth_qdio_q *queue = card->qdio.in_q;
2583 int count;
2584 int i;
2585 int rc;
2586 int newcount = 0;
2587
4a71df50
FB		 2588 count = (index < queue->next_buf_to_init)?
2589 card->qdio.in_buf_pool.buf_count -
2590 (queue->next_buf_to_init - index) :
2591 card->qdio.in_buf_pool.buf_count -
2592 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2593 /* only requeue at a certain threshold to avoid SIGAs */
2594 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2595 for (i = queue->next_buf_to_init;
2596 i < queue->next_buf_to_init + count; ++i) {
2597 if (qeth_init_input_buffer(card,
2598 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2599 break;
2600 } else {
2601 newcount++;
2602 }
2603 }
2604
2605 if (newcount < count) {
2606 /* we are in memory shortage so we switch back to
2607 traditional skb allocation and drop packages */
4a71df50
FB		 2608 atomic_set(&card->force_alloc_skb, 3);
2609 count = newcount;
2610 } else {
4a71df50
FB		 2611 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2612 }
2613
2614 /*
2615 * according to old code it should be avoided to requeue all
2616 * 128 buffers in order to benefit from PCI avoidance.
2617 * this function keeps at least one buffer (the buffer at
2618 * 'index') un-requeued -> this buffer is the first buffer that
2619 * will be requeued the next time
2620 */
2621 if (card->options.performance_stats) {
2622 card->perf_stats.inbound_do_qdio_cnt++;
2623 card->perf_stats.inbound_do_qdio_start_time =
2624 qeth_get_micros();
2625 }
779e6e1c
JG		 2626 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2627 queue->next_buf_to_init, count);
4a71df50
FB		 2628 if (card->options.performance_stats)
2629 card->perf_stats.inbound_do_qdio_time +=
2630 qeth_get_micros() -
2631 card->perf_stats.inbound_do_qdio_start_time;
2632 if (rc) {
2633 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2634 "return %i (device %s).\n",
2635 rc, CARD_DDEV_ID(card));
d11ba0c4
PT		 2636 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2637 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2638 }
2639 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2640 QDIO_MAX_BUFFERS_PER_Q;
2641 }
2642}
2643EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2644
2645static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 2646 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50
FB		 2647{
2648 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
779e6e1c 2649 int cc = qdio_err & 3;
4a71df50 2650
d11ba0c4 2651 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
779e6e1c 2652 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
4a71df50
FB		 2653 switch (cc) {
2654 case 0:
2655 if (qdio_err) {
d11ba0c4
PT		 2656 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2657 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2658 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
4a71df50
FB		 2659 (u16)qdio_err, (u8)sbalf15);
2660 return QETH_SEND_ERROR_LINK_FAILURE;
2661 }
2662 return QETH_SEND_ERROR_NONE;
2663 case 2:
779e6e1c 2664 if (qdio_err & QDIO_ERROR_SIGA_BUSY) {
d11ba0c4
PT		 2665 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2666 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2667 return QETH_SEND_ERROR_KICK_IT;
2668 }
2669 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2670 return QETH_SEND_ERROR_RETRY;
2671 return QETH_SEND_ERROR_LINK_FAILURE;
2672 /* look at qdio_error and sbalf 15 */
2673 case 1:
d11ba0c4
PT		 2674 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2675 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2676 return QETH_SEND_ERROR_LINK_FAILURE;
2677 case 3:
2678 default:
d11ba0c4
PT		 2679 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2680 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2681 return QETH_SEND_ERROR_KICK_IT;
2682 }
2683}
2684
2685/*
2686 * Switched to packing state if the number of used buffers on a queue
2687 * reaches a certain limit.
2688 */
2689static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2690{
2691 if (!queue->do_pack) {
2692 if (atomic_read(&queue->used_buffers)
2693 >= QETH_HIGH_WATERMARK_PACK){
2694 /* switch non-PACKING -> PACKING */
d11ba0c4 2695 QETH_DBF_TEXT(TRACE, 6, "np->pack");
4a71df50
FB		 2696 if (queue->card->options.performance_stats)
2697 queue->card->perf_stats.sc_dp_p++;
2698 queue->do_pack = 1;
2699 }
2700 }
2701}
2702
2703/*
2704 * Switches from packing to non-packing mode. If there is a packing
2705 * buffer on the queue this buffer will be prepared to be flushed.
2706 * In that case 1 is returned to inform the caller. If no buffer
2707 * has to be flushed, zero is returned.
2708 */
2709static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2710{
2711 struct qeth_qdio_out_buffer *buffer;
2712 int flush_count = 0;
2713
2714 if (queue->do_pack) {
2715 if (atomic_read(&queue->used_buffers)
2716 <= QETH_LOW_WATERMARK_PACK) {
2717 /* switch PACKING -> non-PACKING */
d11ba0c4 2718 QETH_DBF_TEXT(TRACE, 6, "pack->np");
4a71df50
FB		 2719 if (queue->card->options.performance_stats)
2720 queue->card->perf_stats.sc_p_dp++;
2721 queue->do_pack = 0;
2722 /* flush packing buffers */
2723 buffer = &queue->bufs[queue->next_buf_to_fill];
2724 if ((atomic_read(&buffer->state) ==
2725 QETH_QDIO_BUF_EMPTY) &&
2726 (buffer->next_element_to_fill > 0)) {
2727 atomic_set(&buffer->state,
2728 QETH_QDIO_BUF_PRIMED);
2729 flush_count++;
2730 queue->next_buf_to_fill =
2731 (queue->next_buf_to_fill + 1) %
2732 QDIO_MAX_BUFFERS_PER_Q;
2733 }
2734 }
2735 }
2736 return flush_count;
2737}
2738
2739/*
2740 * Called to flush a packing buffer if no more pci flags are on the queue.
2741 * Checks if there is a packing buffer and prepares it to be flushed.
2742 * In that case returns 1, otherwise zero.
2743 */
2744static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2745{
2746 struct qeth_qdio_out_buffer *buffer;
2747
2748 buffer = &queue->bufs[queue->next_buf_to_fill];
2749 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2750 (buffer->next_element_to_fill > 0)) {
2751 /* it's a packing buffer */
2752 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2753 queue->next_buf_to_fill =
2754 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2755 return 1;
2756 }
2757 return 0;
2758}
2759
779e6e1c
JG		 2760static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2761 int count)
4a71df50
FB		 2762{
2763 struct qeth_qdio_out_buffer *buf;
2764 int rc;
2765 int i;
2766 unsigned int qdio_flags;
2767
4a71df50
FB		 2768 for (i = index; i < index + count; ++i) {
2769 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2770 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2771 SBAL_FLAGS_LAST_ENTRY;
2772
2773 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2774 continue;
2775
2776 if (!queue->do_pack) {
2777 if ((atomic_read(&queue->used_buffers) >=
2778 (QETH_HIGH_WATERMARK_PACK -
2779 QETH_WATERMARK_PACK_FUZZ)) &&
2780 !atomic_read(&queue->set_pci_flags_count)) {
2781 /* it's likely that we'll go to packing
2782 * mode soon */
2783 atomic_inc(&queue->set_pci_flags_count);
2784 buf->buffer->element[0].flags |= 0x40;
2785 }
2786 } else {
2787 if (!atomic_read(&queue->set_pci_flags_count)) {
2788 /*
2789 * there's no outstanding PCI any more, so we
2790 * have to request a PCI to be sure the the PCI
2791 * will wake at some time in the future then we
2792 * can flush packed buffers that might still be
2793 * hanging around, which can happen if no
2794 * further send was requested by the stack
2795 */
2796 atomic_inc(&queue->set_pci_flags_count);
2797 buf->buffer->element[0].flags |= 0x40;
2798 }
2799 }
2800 }
2801
2802 queue->card->dev->trans_start = jiffies;
2803 if (queue->card->options.performance_stats) {
2804 queue->card->perf_stats.outbound_do_qdio_cnt++;
2805 queue->card->perf_stats.outbound_do_qdio_start_time =
2806 qeth_get_micros();
2807 }
2808 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 2809 if (atomic_read(&queue->set_pci_flags_count))
2810 qdio_flags |= QDIO_FLAG_PCI_OUT;
2811 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 2812 queue->queue_no, index, count);
4a71df50
FB		 2813 if (queue->card->options.performance_stats)
2814 queue->card->perf_stats.outbound_do_qdio_time +=
2815 qeth_get_micros() -
2816 queue->card->perf_stats.outbound_do_qdio_start_time;
2817 if (rc) {
d11ba0c4
PT		 2818 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2819 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2820 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
4a71df50
FB		 2821 queue->card->stats.tx_errors += count;
2822 /* this must not happen under normal circumstances. if it
2823 * happens something is really wrong -> recover */
2824 qeth_schedule_recovery(queue->card);
2825 return;
2826 }
2827 atomic_add(count, &queue->used_buffers);
2828 if (queue->card->options.performance_stats)
2829 queue->card->perf_stats.bufs_sent += count;
2830}
2831
2832static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2833{
2834 int index;
2835 int flush_cnt = 0;
2836 int q_was_packing = 0;
2837
2838 /*
2839 * check if weed have to switch to non-packing mode or if
2840 * we have to get a pci flag out on the queue
2841 */
2842 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2843 !atomic_read(&queue->set_pci_flags_count)) {
2844 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2845 QETH_OUT_Q_UNLOCKED) {
2846 /*
2847 * If we get in here, there was no action in
2848 * do_send_packet. So, we check if there is a
2849 * packing buffer to be flushed here.
2850 */
2851 netif_stop_queue(queue->card->dev);
2852 index = queue->next_buf_to_fill;
2853 q_was_packing = queue->do_pack;
2854 /* queue->do_pack may change */
2855 barrier();
2856 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2857 if (!flush_cnt &&
2858 !atomic_read(&queue->set_pci_flags_count))
2859 flush_cnt +=
2860 qeth_flush_buffers_on_no_pci(queue);
2861 if (queue->card->options.performance_stats &&
2862 q_was_packing)
2863 queue->card->perf_stats.bufs_sent_pack +=
2864 flush_cnt;
2865 if (flush_cnt)
779e6e1c 2866 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 2867 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2868 }
2869 }
2870}
2871
779e6e1c
JG		 2872void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2873 unsigned int qdio_error, int __queue, int first_element,
2874 int count, unsigned long card_ptr)
4a71df50
FB		 2875{
2876 struct qeth_card *card = (struct qeth_card *) card_ptr;
2877 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2878 struct qeth_qdio_out_buffer *buffer;
2879 int i;
2880
d11ba0c4 2881 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
779e6e1c
JG		 2882 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2883 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2884 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2885 netif_stop_queue(card->dev);
2886 qeth_schedule_recovery(card);
2887 return;
4a71df50
FB		 2888 }
2889 if (card->options.performance_stats) {
2890 card->perf_stats.outbound_handler_cnt++;
2891 card->perf_stats.outbound_handler_start_time =
2892 qeth_get_micros();
2893 }
2894 for (i = first_element; i < (first_element + count); ++i) {
2895 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2896 /*we only handle the KICK_IT error by doing a recovery */
779e6e1c 2897 if (qeth_handle_send_error(card, buffer, qdio_error)
4a71df50
FB		 2898 == QETH_SEND_ERROR_KICK_IT){
2899 netif_stop_queue(card->dev);
2900 qeth_schedule_recovery(card);
2901 return;
2902 }
2903 qeth_clear_output_buffer(queue, buffer);
2904 }
2905 atomic_sub(count, &queue->used_buffers);
2906 /* check if we need to do something on this outbound queue */
2907 if (card->info.type != QETH_CARD_TYPE_IQD)
2908 qeth_check_outbound_queue(queue);
2909
2910 netif_wake_queue(queue->card->dev);
2911 if (card->options.performance_stats)
2912 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2913 card->perf_stats.outbound_handler_start_time;
2914}
2915EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2916
2917int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2918{
2919 int cast_type = RTN_UNSPEC;
2920
2921 if (card->info.type == QETH_CARD_TYPE_OSN)
2922 return cast_type;
2923
2924 if (skb->dst && skb->dst->neighbour) {
2925 cast_type = skb->dst->neighbour->type;
2926 if ((cast_type == RTN_BROADCAST) ||
2927 (cast_type == RTN_MULTICAST) ||
2928 (cast_type == RTN_ANYCAST))
2929 return cast_type;
2930 else
2931 return RTN_UNSPEC;
2932 }
2933 /* try something else */
2934 if (skb->protocol == ETH_P_IPV6)
2935 return (skb_network_header(skb)[24] == 0xff) ?
2936 RTN_MULTICAST : 0;
2937 else if (skb->protocol == ETH_P_IP)
2938 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2939 RTN_MULTICAST : 0;
2940 /* ... */
2941 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2942 return RTN_BROADCAST;
2943 else {
2944 u16 hdr_mac;
2945
2946 hdr_mac = *((u16 *)skb->data);
2947 /* tr multicast? */
2948 switch (card->info.link_type) {
2949 case QETH_LINK_TYPE_HSTR:
2950 case QETH_LINK_TYPE_LANE_TR:
2951 if ((hdr_mac == QETH_TR_MAC_NC) ||
2952 (hdr_mac == QETH_TR_MAC_C))
2953 return RTN_MULTICAST;
2954 break;
2955 /* eth or so multicast? */
2956 default:
2957 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2958 (hdr_mac == QETH_ETH_MAC_V6))
2959 return RTN_MULTICAST;
2960 }
2961 }
2962 return cast_type;
2963}
2964EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2965
2966int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2967 int ipv, int cast_type)
2968{
2969 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2970 return card->qdio.default_out_queue;
2971 switch (card->qdio.no_out_queues) {
2972 case 4:
2973 if (cast_type && card->info.is_multicast_different)
2974 return card->info.is_multicast_different &
2975 (card->qdio.no_out_queues - 1);
2976 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2977 const u8 tos = ip_hdr(skb)->tos;
2978
2979 if (card->qdio.do_prio_queueing ==
2980 QETH_PRIO_Q_ING_TOS) {
2981 if (tos & IP_TOS_NOTIMPORTANT)
2982 return 3;
2983 if (tos & IP_TOS_HIGHRELIABILITY)
2984 return 2;
2985 if (tos & IP_TOS_HIGHTHROUGHPUT)
2986 return 1;
2987 if (tos & IP_TOS_LOWDELAY)
2988 return 0;
2989 }
2990 if (card->qdio.do_prio_queueing ==
2991 QETH_PRIO_Q_ING_PREC)
2992 return 3 - (tos >> 6);
2993 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
2994 /* TODO: IPv6!!! */
2995 }
2996 return card->qdio.default_out_queue;
2997 case 1: /* fallthrough for single-out-queue 1920-device */
2998 default:
2999 return card->qdio.default_out_queue;
3000 }
3001}
3002EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3003
4a71df50
FB		 3004int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3005 struct sk_buff *skb, int elems)
3006{
3007 int elements_needed = 0;
3008
3009 if (skb_shinfo(skb)->nr_frags > 0)
3010 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3011 if (elements_needed == 0)
683d718a
FB		 3012 elements_needed = 1 + (((((unsigned long) skb->data) %
3013 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
4a71df50 3014 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3015 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3016 "(Number=%d / Length=%d). Discarded.\n",
3017 (elements_needed+elems), skb->len);
3018 return 0;
3019 }
3020 return elements_needed;
3021}
3022EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3023
f90b744e 3024static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3025 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3026 int offset)
4a71df50 3027{
bd8774c8 3028 int length = skb->len - offset;
4a71df50
FB		 3029 int length_here;
3030 int element;
3031 char *data;
3032 int first_lap ;
3033
3034 element = *next_element_to_fill;
3035 data = skb->data;
3036 first_lap = (is_tso == 0 ? 1 : 0);
3037
683d718a
FB		 3038 if (offset >= 0) {
3039 data = skb->data + offset;
3040 first_lap = 0;
3041 }
3042
4a71df50
FB		 3043 while (length > 0) {
3044 /* length_here is the remaining amount of data in this page */
3045 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3046 if (length < length_here)
3047 length_here = length;
3048
3049 buffer->element[element].addr = data;
3050 buffer->element[element].length = length_here;
3051 length -= length_here;
3052 if (!length) {
3053 if (first_lap)
3054 buffer->element[element].flags = 0;
3055 else
3056 buffer->element[element].flags =
3057 SBAL_FLAGS_LAST_FRAG;
3058 } else {
3059 if (first_lap)
3060 buffer->element[element].flags =
3061 SBAL_FLAGS_FIRST_FRAG;
3062 else
3063 buffer->element[element].flags =
3064 SBAL_FLAGS_MIDDLE_FRAG;
3065 }
3066 data += length_here;
3067 element++;
3068 first_lap = 0;
3069 }
3070 *next_element_to_fill = element;
3071}
3072
f90b744e 3073static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3074 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3075 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3076{
3077 struct qdio_buffer *buffer;
4a71df50
FB		 3078 int flush_cnt = 0, hdr_len, large_send = 0;
3079
4a71df50
FB		 3080 buffer = buf->buffer;
3081 atomic_inc(&skb->users);
3082 skb_queue_tail(&buf->skb_list, skb);
3083
4a71df50 3084 /*check first on TSO ....*/
683d718a 3085 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3086 int element = buf->next_element_to_fill;
3087
683d718a
FB		 3088 hdr_len = sizeof(struct qeth_hdr_tso) +
3089 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3090 /*fill first buffer entry only with header information */
3091 buffer->element[element].addr = skb->data;
3092 buffer->element[element].length = hdr_len;
3093 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3094 buf->next_element_to_fill++;
3095 skb->data += hdr_len;
3096 skb->len -= hdr_len;
3097 large_send = 1;
3098 }
683d718a
FB		 3099
3100 if (offset >= 0) {
3101 int element = buf->next_element_to_fill;
3102 buffer->element[element].addr = hdr;
3103 buffer->element[element].length = sizeof(struct qeth_hdr) +
3104 hd_len;
3105 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3106 buf->is_header[element] = 1;
3107 buf->next_element_to_fill++;
3108 }
3109
4a71df50
FB		 3110 if (skb_shinfo(skb)->nr_frags == 0)
3111 __qeth_fill_buffer(skb, buffer, large_send,
683d718a 3112 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3113 else
3114 __qeth_fill_buffer_frag(skb, buffer, large_send,
3115 (int *)&buf->next_element_to_fill);
3116
3117 if (!queue->do_pack) {
d11ba0c4 3118 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
4a71df50
FB		 3119 /* set state to PRIMED -> will be flushed */
3120 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3121 flush_cnt = 1;
3122 } else {
d11ba0c4 3123 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
4a71df50
FB		 3124 if (queue->card->options.performance_stats)
3125 queue->card->perf_stats.skbs_sent_pack++;
3126 if (buf->next_element_to_fill >=
3127 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3128 /*
3129 * packed buffer if full -> set state PRIMED
3130 * -> will be flushed
3131 */
3132 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3133 flush_cnt = 1;
3134 }
3135 }
3136 return flush_cnt;
3137}
3138
3139int qeth_do_send_packet_fast(struct qeth_card *card,
3140 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3141 struct qeth_hdr *hdr, int elements_needed,
683d718a 3142 struct qeth_eddp_context *ctx, int offset, int hd_len)
4a71df50
FB		 3143{
3144 struct qeth_qdio_out_buffer *buffer;
3145 int buffers_needed = 0;
3146 int flush_cnt = 0;
3147 int index;
3148
4a71df50
FB		 3149 /* spin until we get the queue ... */
3150 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3151 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3152 /* ... now we've got the queue */
3153 index = queue->next_buf_to_fill;
3154 buffer = &queue->bufs[queue->next_buf_to_fill];
3155 /*
3156 * check if buffer is empty to make sure that we do not 'overtake'
3157 * ourselves and try to fill a buffer that is already primed
3158 */
3159 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3160 goto out;
3161 if (ctx == NULL)
3162 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3163 QDIO_MAX_BUFFERS_PER_Q;
3164 else {
3165 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3166 ctx);
3167 if (buffers_needed < 0)
3168 goto out;
3169 queue->next_buf_to_fill =
3170 (queue->next_buf_to_fill + buffers_needed) %
3171 QDIO_MAX_BUFFERS_PER_Q;
3172 }
3173 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3174 if (ctx == NULL) {
683d718a 3175 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
779e6e1c 3176 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3177 } else {
3178 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3179 WARN_ON(buffers_needed != flush_cnt);
779e6e1c 3180 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3181 }
3182 return 0;
3183out:
3184 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3185 return -EBUSY;
3186}
3187EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3188
3189int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3190 struct sk_buff *skb, struct qeth_hdr *hdr,
3191 int elements_needed, struct qeth_eddp_context *ctx)
3192{
3193 struct qeth_qdio_out_buffer *buffer;
3194 int start_index;
3195 int flush_count = 0;
3196 int do_pack = 0;
3197 int tmp;
3198 int rc = 0;
3199
4a71df50
FB		 3200 /* spin until we get the queue ... */
3201 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3202 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3203 start_index = queue->next_buf_to_fill;
3204 buffer = &queue->bufs[queue->next_buf_to_fill];
3205 /*
3206 * check if buffer is empty to make sure that we do not 'overtake'
3207 * ourselves and try to fill a buffer that is already primed
3208 */
3209 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3210 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3211 return -EBUSY;
3212 }
3213 /* check if we need to switch packing state of this queue */
3214 qeth_switch_to_packing_if_needed(queue);
3215 if (queue->do_pack) {
3216 do_pack = 1;
3217 if (ctx == NULL) {
3218 /* does packet fit in current buffer? */
3219 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3220 buffer->next_element_to_fill) < elements_needed) {
3221 /* ... no -> set state PRIMED */
3222 atomic_set(&buffer->state,
3223 QETH_QDIO_BUF_PRIMED);
3224 flush_count++;
3225 queue->next_buf_to_fill =
3226 (queue->next_buf_to_fill + 1) %
3227 QDIO_MAX_BUFFERS_PER_Q;
3228 buffer = &queue->bufs[queue->next_buf_to_fill];
3229 /* we did a step forward, so check buffer state
3230 * again */
3231 if (atomic_read(&buffer->state) !=
3232 QETH_QDIO_BUF_EMPTY){
779e6e1c
JG		 3233 qeth_flush_buffers(queue, start_index,
3234 flush_count);
4a71df50
FB		 3235 atomic_set(&queue->state,
3236 QETH_OUT_Q_UNLOCKED);
3237 return -EBUSY;
3238 }
3239 }
3240 } else {
3241 /* check if we have enough elements (including following
3242 * free buffers) to handle eddp context */
3243 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3244 < 0) {
4a71df50
FB		 3245 rc = -EBUSY;
3246 goto out;
3247 }
3248 }
3249 }
3250 if (ctx == NULL)
683d718a 3251 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3252 else {
3253 tmp = qeth_eddp_fill_buffer(queue, ctx,
3254 queue->next_buf_to_fill);
3255 if (tmp < 0) {
4a71df50
FB		 3256 rc = -EBUSY;
3257 goto out;
3258 }
3259 }
3260 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3261 QDIO_MAX_BUFFERS_PER_Q;
3262 flush_count += tmp;
3263out:
3264 if (flush_count)
779e6e1c 3265 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3266 else if (!atomic_read(&queue->set_pci_flags_count))
3267 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3268 /*
3269 * queue->state will go from LOCKED -> UNLOCKED or from
3270 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3271 * (switch packing state or flush buffer to get another pci flag out).
3272 * In that case we will enter this loop
3273 */
3274 while (atomic_dec_return(&queue->state)) {
3275 flush_count = 0;
3276 start_index = queue->next_buf_to_fill;
3277 /* check if we can go back to non-packing state */
3278 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3279 /*
3280 * check if we need to flush a packing buffer to get a pci
3281 * flag out on the queue
3282 */
3283 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3284 flush_count += qeth_flush_buffers_on_no_pci(queue);
3285 if (flush_count)
779e6e1c 3286 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3287 }
3288 /* at this point the queue is UNLOCKED again */
3289 if (queue->card->options.performance_stats && do_pack)
3290 queue->card->perf_stats.bufs_sent_pack += flush_count;
3291
3292 return rc;
3293}
3294EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3295
3296static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3297 struct qeth_reply *reply, unsigned long data)
3298{
3299 struct qeth_ipa_cmd *cmd;
3300 struct qeth_ipacmd_setadpparms *setparms;
3301
d11ba0c4 3302 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
4a71df50
FB		 3303
3304 cmd = (struct qeth_ipa_cmd *) data;
3305 setparms = &(cmd->data.setadapterparms);
3306
3307 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3308 if (cmd->hdr.return_code) {
d11ba0c4 3309 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3310 setparms->data.mode = SET_PROMISC_MODE_OFF;
3311 }
3312 card->info.promisc_mode = setparms->data.mode;
3313 return 0;
3314}
3315
3316void qeth_setadp_promisc_mode(struct qeth_card *card)
3317{
3318 enum qeth_ipa_promisc_modes mode;
3319 struct net_device *dev = card->dev;
3320 struct qeth_cmd_buffer *iob;
3321 struct qeth_ipa_cmd *cmd;
3322
d11ba0c4 3323 QETH_DBF_TEXT(TRACE, 4, "setprom");
4a71df50
FB		 3324
3325 if (((dev->flags & IFF_PROMISC) &&
3326 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3327 (!(dev->flags & IFF_PROMISC) &&
3328 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3329 return;
3330 mode = SET_PROMISC_MODE_OFF;
3331 if (dev->flags & IFF_PROMISC)
3332 mode = SET_PROMISC_MODE_ON;
d11ba0c4 3333 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
4a71df50
FB		 3334
3335 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3336 sizeof(struct qeth_ipacmd_setadpparms));
3337 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3338 cmd->data.setadapterparms.data.mode = mode;
3339 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3340}
3341EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3342
3343int qeth_change_mtu(struct net_device *dev, int new_mtu)
3344{
3345 struct qeth_card *card;
3346 char dbf_text[15];
3347
509e2562 3348 card = dev->ml_priv;
4a71df50 3349
d11ba0c4 3350 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
4a71df50 3351 sprintf(dbf_text, "%8x", new_mtu);
d11ba0c4 3352 QETH_DBF_TEXT(TRACE, 4, dbf_text);
4a71df50
FB		 3353
3354 if (new_mtu < 64)
3355 return -EINVAL;
3356 if (new_mtu > 65535)
3357 return -EINVAL;
3358 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3359 (!qeth_mtu_is_valid(card, new_mtu)))
3360 return -EINVAL;
3361 dev->mtu = new_mtu;
3362 return 0;
3363}
3364EXPORT_SYMBOL_GPL(qeth_change_mtu);
3365
3366struct net_device_stats *qeth_get_stats(struct net_device *dev)
3367{
3368 struct qeth_card *card;
3369
509e2562 3370 card = dev->ml_priv;
4a71df50 3371
d11ba0c4 3372 QETH_DBF_TEXT(TRACE, 5, "getstat");
4a71df50
FB		 3373
3374 return &card->stats;
3375}
3376EXPORT_SYMBOL_GPL(qeth_get_stats);
3377
3378static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3379 struct qeth_reply *reply, unsigned long data)
3380{
3381 struct qeth_ipa_cmd *cmd;
3382
d11ba0c4 3383 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
4a71df50
FB		 3384
3385 cmd = (struct qeth_ipa_cmd *) data;
3386 if (!card->options.layer2 ||
3387 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3388 memcpy(card->dev->dev_addr,
3389 &cmd->data.setadapterparms.data.change_addr.addr,
3390 OSA_ADDR_LEN);
3391 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3392 }
3393 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3394 return 0;
3395}
3396
3397int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3398{
3399 int rc;
3400 struct qeth_cmd_buffer *iob;
3401 struct qeth_ipa_cmd *cmd;
3402
d11ba0c4 3403 QETH_DBF_TEXT(TRACE, 4, "chgmac");
4a71df50
FB		 3404
3405 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3406 sizeof(struct qeth_ipacmd_setadpparms));
3407 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3408 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3409 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3410 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3411 card->dev->dev_addr, OSA_ADDR_LEN);
3412 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3413 NULL);
3414 return rc;
3415}
3416EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3417
3418void qeth_tx_timeout(struct net_device *dev)
3419{
3420 struct qeth_card *card;
3421
509e2562 3422 card = dev->ml_priv;
4a71df50
FB		 3423 card->stats.tx_errors++;
3424 qeth_schedule_recovery(card);
3425}
3426EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3427
3428int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3429{
509e2562 3430 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 3431 int rc = 0;
3432
3433 switch (regnum) {
3434 case MII_BMCR: /* Basic mode control register */
3435 rc = BMCR_FULLDPLX;
3436 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3437 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3438 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3439 rc |= BMCR_SPEED100;
3440 break;
3441 case MII_BMSR: /* Basic mode status register */
3442 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3443 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3444 BMSR_100BASE4;
3445 break;
3446 case MII_PHYSID1: /* PHYS ID 1 */
3447 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3448 dev->dev_addr[2];
3449 rc = (rc >> 5) & 0xFFFF;
3450 break;
3451 case MII_PHYSID2: /* PHYS ID 2 */
3452 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3453 break;
3454 case MII_ADVERTISE: /* Advertisement control reg */
3455 rc = ADVERTISE_ALL;
3456 break;
3457 case MII_LPA: /* Link partner ability reg */
3458 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3459 LPA_100BASE4 | LPA_LPACK;
3460 break;
3461 case MII_EXPANSION: /* Expansion register */
3462 break;
3463 case MII_DCOUNTER: /* disconnect counter */
3464 break;
3465 case MII_FCSCOUNTER: /* false carrier counter */
3466 break;
3467 case MII_NWAYTEST: /* N-way auto-neg test register */
3468 break;
3469 case MII_RERRCOUNTER: /* rx error counter */
3470 rc = card->stats.rx_errors;
3471 break;
3472 case MII_SREVISION: /* silicon revision */
3473 break;
3474 case MII_RESV1: /* reserved 1 */
3475 break;
3476 case MII_LBRERROR: /* loopback, rx, bypass error */
3477 break;
3478 case MII_PHYADDR: /* physical address */
3479 break;
3480 case MII_RESV2: /* reserved 2 */
3481 break;
3482 case MII_TPISTATUS: /* TPI status for 10mbps */
3483 break;
3484 case MII_NCONFIG: /* network interface config */
3485 break;
3486 default:
3487 break;
3488 }
3489 return rc;
3490}
3491EXPORT_SYMBOL_GPL(qeth_mdio_read);
3492
3493static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3494 struct qeth_cmd_buffer *iob, int len,
3495 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3496 unsigned long),
3497 void *reply_param)
3498{
3499 u16 s1, s2;
3500
d11ba0c4 3501 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
4a71df50
FB		 3502
3503 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3504 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3505 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3506 /* adjust PDU length fields in IPA_PDU_HEADER */
3507 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3508 s2 = (u32) len;
3509 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3510 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3511 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3512 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3513 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3514 reply_cb, reply_param);
3515}
3516
3517static int qeth_snmp_command_cb(struct qeth_card *card,
3518 struct qeth_reply *reply, unsigned long sdata)
3519{
3520 struct qeth_ipa_cmd *cmd;
3521 struct qeth_arp_query_info *qinfo;
3522 struct qeth_snmp_cmd *snmp;
3523 unsigned char *data;
3524 __u16 data_len;
3525
d11ba0c4 3526 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
4a71df50
FB		 3527
3528 cmd = (struct qeth_ipa_cmd *) sdata;
3529 data = (unsigned char *)((char *)cmd - reply->offset);
3530 qinfo = (struct qeth_arp_query_info *) reply->param;
3531 snmp = &cmd->data.setadapterparms.data.snmp;
3532
3533 if (cmd->hdr.return_code) {
d11ba0c4 3534 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3535 return 0;
3536 }
3537 if (cmd->data.setadapterparms.hdr.return_code) {
3538 cmd->hdr.return_code =
3539 cmd->data.setadapterparms.hdr.return_code;
d11ba0c4 3540 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3541 return 0;
3542 }
3543 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3544 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3545 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3546 else
3547 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3548
3549 /* check if there is enough room in userspace */
3550 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
d11ba0c4 3551 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3552 cmd->hdr.return_code = -ENOMEM;
3553 return 0;
3554 }
d11ba0c4 3555 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
4a71df50 3556 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3557 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
4a71df50
FB		 3558 cmd->data.setadapterparms.hdr.seq_no);
3559 /*copy entries to user buffer*/
3560 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3561 memcpy(qinfo->udata + qinfo->udata_offset,
3562 (char *)snmp,
3563 data_len + offsetof(struct qeth_snmp_cmd, data));
3564 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3565 } else {
3566 memcpy(qinfo->udata + qinfo->udata_offset,
3567 (char *)&snmp->request, data_len);
3568 }
3569 qinfo->udata_offset += data_len;
3570 /* check if all replies received ... */
d11ba0c4 3571 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
4a71df50 3572 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3573 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
4a71df50
FB		 3574 cmd->data.setadapterparms.hdr.seq_no);
3575 if (cmd->data.setadapterparms.hdr.seq_no <
3576 cmd->data.setadapterparms.hdr.used_total)
3577 return 1;
3578 return 0;
3579}
3580
3581int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3582{
3583 struct qeth_cmd_buffer *iob;
3584 struct qeth_ipa_cmd *cmd;
3585 struct qeth_snmp_ureq *ureq;
3586 int req_len;
3587 struct qeth_arp_query_info qinfo = {0, };
3588 int rc = 0;
3589
d11ba0c4 3590 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
4a71df50
FB		 3591
3592 if (card->info.guestlan)
3593 return -EOPNOTSUPP;
3594
3595 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3596 (!card->options.layer2)) {
4a71df50
FB		 3597 return -EOPNOTSUPP;
3598 }
3599 /* skip 4 bytes (data_len struct member) to get req_len */
3600 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3601 return -EFAULT;
3602 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3603 if (!ureq) {
d11ba0c4 3604 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
4a71df50
FB		 3605 return -ENOMEM;
3606 }
3607 if (copy_from_user(ureq, udata,
3608 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3609 kfree(ureq);
3610 return -EFAULT;
3611 }
3612 qinfo.udata_len = ureq->hdr.data_len;
3613 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3614 if (!qinfo.udata) {
3615 kfree(ureq);
3616 return -ENOMEM;
3617 }
3618 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3619
3620 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3621 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3622 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3623 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3624 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3625 qeth_snmp_command_cb, (void *)&qinfo);
3626 if (rc)
14cc21b6 3627 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 3628 QETH_CARD_IFNAME(card), rc);
3629 else {
3630 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3631 rc = -EFAULT;
3632 }
3633
3634 kfree(ureq);
3635 kfree(qinfo.udata);
3636 return rc;
3637}
3638EXPORT_SYMBOL_GPL(qeth_snmp_command);
3639
3640static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3641{
3642 switch (card->info.type) {
3643 case QETH_CARD_TYPE_IQD:
3644 return 2;
3645 default:
3646 return 0;
3647 }
3648}
3649
3650static int qeth_qdio_establish(struct qeth_card *card)
3651{
3652 struct qdio_initialize init_data;
3653 char *qib_param_field;
3654 struct qdio_buffer **in_sbal_ptrs;
3655 struct qdio_buffer **out_sbal_ptrs;
3656 int i, j, k;
3657 int rc = 0;
3658
d11ba0c4 3659 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3660
3661 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3662 GFP_KERNEL);
3663 if (!qib_param_field)
3664 return -ENOMEM;
3665
3666 qeth_create_qib_param_field(card, qib_param_field);
3667 qeth_create_qib_param_field_blkt(card, qib_param_field);
3668
3669 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3670 GFP_KERNEL);
3671 if (!in_sbal_ptrs) {
3672 kfree(qib_param_field);
3673 return -ENOMEM;
3674 }
3675 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3676 in_sbal_ptrs[i] = (struct qdio_buffer *)
3677 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3678
3679 out_sbal_ptrs =
3680 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3681 sizeof(void *), GFP_KERNEL);
3682 if (!out_sbal_ptrs) {
3683 kfree(in_sbal_ptrs);
3684 kfree(qib_param_field);
3685 return -ENOMEM;
3686 }
3687 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3688 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3689 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3690 card->qdio.out_qs[i]->bufs[j].buffer);
3691 }
3692
3693 memset(&init_data, 0, sizeof(struct qdio_initialize));
3694 init_data.cdev = CARD_DDEV(card);
3695 init_data.q_format = qeth_get_qdio_q_format(card);
3696 init_data.qib_param_field_format = 0;
3697 init_data.qib_param_field = qib_param_field;
4a71df50
FB		 3698 init_data.no_input_qs = 1;
3699 init_data.no_output_qs = card->qdio.no_out_queues;
3700 init_data.input_handler = card->discipline.input_handler;
3701 init_data.output_handler = card->discipline.output_handler;
3702 init_data.int_parm = (unsigned long) card;
3703 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3704 QDIO_OUTBOUND_0COPY_SBALS |
3705 QDIO_USE_OUTBOUND_PCIS;
3706 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3707 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3708
3709 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3710 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3711 rc = qdio_initialize(&init_data);
3712 if (rc)
3713 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3714 }
3715 kfree(out_sbal_ptrs);
3716 kfree(in_sbal_ptrs);
3717 kfree(qib_param_field);
3718 return rc;
3719}
3720
3721static void qeth_core_free_card(struct qeth_card *card)
3722{
3723
d11ba0c4
PT		 3724 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3725 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3726 qeth_clean_channel(&card->read);
3727 qeth_clean_channel(&card->write);
3728 if (card->dev)
3729 free_netdev(card->dev);
3730 kfree(card->ip_tbd_list);
3731 qeth_free_qdio_buffers(card);
3732 kfree(card);
3733}
3734
3735static struct ccw_device_id qeth_ids[] = {
3736 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3737 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3738 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3739 {},
3740};
3741MODULE_DEVICE_TABLE(ccw, qeth_ids);
3742
3743static struct ccw_driver qeth_ccw_driver = {
3744 .name = "qeth",
3745 .ids = qeth_ids,
3746 .probe = ccwgroup_probe_ccwdev,
3747 .remove = ccwgroup_remove_ccwdev,
3748};
3749
3750static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3751 unsigned long driver_id)
3752{
022b660a
UB		 3753 return ccwgroup_create_from_string(root_dev, driver_id,
3754 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 3755}
3756
3757int qeth_core_hardsetup_card(struct qeth_card *card)
3758{
779e6e1c 3759 struct qdio_ssqd_desc *qdio_ssqd;
4a71df50 3760 int retries = 3;
779e6e1c 3761 int mpno = 0;
4a71df50
FB		 3762 int rc;
3763
d11ba0c4 3764 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3765 atomic_set(&card->force_alloc_skb, 0);
3766retry:
3767 if (retries < 3) {
3768 PRINT_WARN("Retrying to do IDX activates.\n");
3769 ccw_device_set_offline(CARD_DDEV(card));
3770 ccw_device_set_offline(CARD_WDEV(card));
3771 ccw_device_set_offline(CARD_RDEV(card));
3772 ccw_device_set_online(CARD_RDEV(card));
3773 ccw_device_set_online(CARD_WDEV(card));
3774 ccw_device_set_online(CARD_DDEV(card));
3775 }
3776 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3777 if (rc == -ERESTARTSYS) {
d11ba0c4 3778 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3779 return rc;
3780 } else if (rc) {
d11ba0c4 3781 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 3782 if (--retries < 0)
3783 goto out;
3784 else
3785 goto retry;
3786 }
3787
3788 rc = qeth_get_unitaddr(card);
3789 if (rc) {
d11ba0c4 3790 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 3791 return rc;
3792 }
779e6e1c
JG		 3793
3794 qdio_ssqd = qdio_get_ssqd_desc(CARD_DDEV(card));
3795 if (qdio_ssqd)
3796 mpno = qdio_ssqd->pcnt;
a74b08c7
UB		 3797 if (mpno)
3798 mpno = min(mpno - 1, QETH_MAX_PORTNO);
4a71df50 3799 if (card->info.portno > mpno) {
14cc21b6
FB		 3800 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3801 "\n.", CARD_BUS_ID(card), card->info.portno);
4a71df50
FB		 3802 rc = -ENODEV;
3803 goto out;
3804 }
3805 qeth_init_tokens(card);
3806 qeth_init_func_level(card);
3807 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3808 if (rc == -ERESTARTSYS) {
d11ba0c4 3809 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3810 return rc;
3811 } else if (rc) {
d11ba0c4 3812 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3813 if (--retries < 0)
3814 goto out;
3815 else
3816 goto retry;
3817 }
3818 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3819 if (rc == -ERESTARTSYS) {
d11ba0c4 3820 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3821 return rc;
3822 } else if (rc) {
d11ba0c4 3823 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3824 if (--retries < 0)
3825 goto out;
3826 else
3827 goto retry;
3828 }
3829 rc = qeth_mpc_initialize(card);
3830 if (rc) {
d11ba0c4 3831 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3832 goto out;
3833 }
3834 return 0;
3835out:
3836 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
3837 return rc;
3838}
3839EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3840
3841static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3842 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3843{
3844 struct page *page = virt_to_page(element->addr);
3845 if (*pskb == NULL) {
3846 /* the upper protocol layers assume that there is data in the
3847 * skb itself. Copy a small amount (64 bytes) to make them
3848 * happy. */
3849 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3850 if (!(*pskb))
3851 return -ENOMEM;
3852 skb_reserve(*pskb, ETH_HLEN);
3853 if (data_len <= 64) {
3854 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3855 data_len);
3856 } else {
3857 get_page(page);
3858 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3859 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3860 data_len - 64);
3861 (*pskb)->data_len += data_len - 64;
3862 (*pskb)->len += data_len - 64;
3863 (*pskb)->truesize += data_len - 64;
3864 (*pfrag)++;
3865 }
3866 } else {
3867 get_page(page);
3868 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3869 (*pskb)->data_len += data_len;
3870 (*pskb)->len += data_len;
3871 (*pskb)->truesize += data_len;
3872 (*pfrag)++;
3873 }
3874 return 0;
3875}
3876
3877struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3878 struct qdio_buffer *buffer,
3879 struct qdio_buffer_element **__element, int *__offset,
3880 struct qeth_hdr **hdr)
3881{
3882 struct qdio_buffer_element *element = *__element;
3883 int offset = *__offset;
3884 struct sk_buff *skb = NULL;
3885 int skb_len;
3886 void *data_ptr;
3887 int data_len;
3888 int headroom = 0;
3889 int use_rx_sg = 0;
3890 int frag = 0;
3891
4a71df50
FB		 3892 /* qeth_hdr must not cross element boundaries */
3893 if (element->length < offset + sizeof(struct qeth_hdr)) {
3894 if (qeth_is_last_sbale(element))
3895 return NULL;
3896 element++;
3897 offset = 0;
3898 if (element->length < sizeof(struct qeth_hdr))
3899 return NULL;
3900 }
3901 *hdr = element->addr + offset;
3902
3903 offset += sizeof(struct qeth_hdr);
3904 if (card->options.layer2) {
3905 if (card->info.type == QETH_CARD_TYPE_OSN) {
3906 skb_len = (*hdr)->hdr.osn.pdu_length;
3907 headroom = sizeof(struct qeth_hdr);
3908 } else {
3909 skb_len = (*hdr)->hdr.l2.pkt_length;
3910 }
3911 } else {
3912 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 3913 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3914 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3915 headroom = TR_HLEN;
3916 else
3917 headroom = ETH_HLEN;
4a71df50
FB		 3918 }
3919
3920 if (!skb_len)
3921 return NULL;
3922
3923 if ((skb_len >= card->options.rx_sg_cb) &&
3924 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3925 (!atomic_read(&card->force_alloc_skb))) {
3926 use_rx_sg = 1;
3927 } else {
3928 skb = dev_alloc_skb(skb_len + headroom);
3929 if (!skb)
3930 goto no_mem;
3931 if (headroom)
3932 skb_reserve(skb, headroom);
3933 }
3934
3935 data_ptr = element->addr + offset;
3936 while (skb_len) {
3937 data_len = min(skb_len, (int)(element->length - offset));
3938 if (data_len) {
3939 if (use_rx_sg) {
3940 if (qeth_create_skb_frag(element, &skb, offset,
3941 &frag, data_len))
3942 goto no_mem;
3943 } else {
3944 memcpy(skb_put(skb, data_len), data_ptr,
3945 data_len);
3946 }
3947 }
3948 skb_len -= data_len;
3949 if (skb_len) {
3950 if (qeth_is_last_sbale(element)) {
d11ba0c4
PT		 3951 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3952 QETH_DBF_TEXT_(TRACE, 4, "%s",
4a71df50 3953 CARD_BUS_ID(card));
d11ba0c4
PT		 3954 QETH_DBF_TEXT(QERR, 2, "unexeob");
3955 QETH_DBF_TEXT_(QERR, 2, "%s",
4a71df50 3956 CARD_BUS_ID(card));
d11ba0c4 3957 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4a71df50
FB		 3958 dev_kfree_skb_any(skb);
3959 card->stats.rx_errors++;
3960 return NULL;
3961 }
3962 element++;
3963 offset = 0;
3964 data_ptr = element->addr;
3965 } else {
3966 offset += data_len;
3967 }
3968 }
3969 *__element = element;
3970 *__offset = offset;
3971 if (use_rx_sg && card->options.performance_stats) {
3972 card->perf_stats.sg_skbs_rx++;
3973 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
3974 }
3975 return skb;
3976no_mem:
3977 if (net_ratelimit()) {
d11ba0c4
PT		 3978 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
3979 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 3980 }
3981 card->stats.rx_dropped++;
3982 return NULL;
3983}
3984EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
3985
3986static void qeth_unregister_dbf_views(void)
3987{
d11ba0c4
PT		 3988 int x;
3989 for (x = 0; x < QETH_DBF_INFOS; x++) {
3990 debug_unregister(qeth_dbf[x].id);
3991 qeth_dbf[x].id = NULL;
3992 }
4a71df50
FB		 3993}
3994
345aa66e 3995void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
cd023216
PT		 3996{
3997 char dbf_txt_buf[32];
345aa66e 3998 va_list args;
cd023216
PT		 3999
4000 if (level > (qeth_dbf[dbf_nix].id)->level)
4001 return;
345aa66e
PT		 4002 va_start(args, fmt);
4003 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4004 va_end(args);
cd023216 4005 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
cd023216
PT		 4006}
4007EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4008
4a71df50
FB		 4009static int qeth_register_dbf_views(void)
4010{
d11ba0c4
PT		 4011 int ret;
4012 int x;
4013
4014 for (x = 0; x < QETH_DBF_INFOS; x++) {
4015 /* register the areas */
4016 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4017 qeth_dbf[x].pages,
4018 qeth_dbf[x].areas,
4019 qeth_dbf[x].len);
4020 if (qeth_dbf[x].id == NULL) {
4021 qeth_unregister_dbf_views();
4022 return -ENOMEM;
4023 }
4a71df50 4024
d11ba0c4
PT		 4025 /* register a view */
4026 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4027 if (ret) {
4028 qeth_unregister_dbf_views();
4029 return ret;
4030 }
4a71df50 4031
d11ba0c4
PT		 4032 /* set a passing level */
4033 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4034 }
4a71df50
FB		 4035
4036 return 0;
4037}
4038
4039int qeth_core_load_discipline(struct qeth_card *card,
4040 enum qeth_discipline_id discipline)
4041{
4042 int rc = 0;
4043 switch (discipline) {
4044 case QETH_DISCIPLINE_LAYER3:
4045 card->discipline.ccwgdriver = try_then_request_module(
4046 symbol_get(qeth_l3_ccwgroup_driver),
4047 "qeth_l3");
4048 break;
4049 case QETH_DISCIPLINE_LAYER2:
4050 card->discipline.ccwgdriver = try_then_request_module(
4051 symbol_get(qeth_l2_ccwgroup_driver),
4052 "qeth_l2");
4053 break;
4054 }
4055 if (!card->discipline.ccwgdriver) {
4056 PRINT_ERR("Support for discipline %d not present\n",
4057 discipline);
4058 rc = -EINVAL;
4059 }
4060 return rc;
4061}
4062
4063void qeth_core_free_discipline(struct qeth_card *card)
4064{
4065 if (card->options.layer2)
4066 symbol_put(qeth_l2_ccwgroup_driver);
4067 else
4068 symbol_put(qeth_l3_ccwgroup_driver);
4069 card->discipline.ccwgdriver = NULL;
4070}
4071
4072static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4073{
4074 struct qeth_card *card;
4075 struct device *dev;
4076 int rc;
4077 unsigned long flags;
4078
d11ba0c4 4079 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4080
4081 dev = &gdev->dev;
4082 if (!get_device(dev))
4083 return -ENODEV;
4084
2a0217d5 4085 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4086
4087 card = qeth_alloc_card();
4088 if (!card) {
d11ba0c4 4089 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4090 rc = -ENOMEM;
4091 goto err_dev;
4092 }
4093 card->read.ccwdev = gdev->cdev[0];
4094 card->write.ccwdev = gdev->cdev[1];
4095 card->data.ccwdev = gdev->cdev[2];
4096 dev_set_drvdata(&gdev->dev, card);
4097 card->gdev = gdev;
4098 gdev->cdev[0]->handler = qeth_irq;
4099 gdev->cdev[1]->handler = qeth_irq;
4100 gdev->cdev[2]->handler = qeth_irq;
4101
4102 rc = qeth_determine_card_type(card);
4103 if (rc) {
d11ba0c4 4104 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4105 goto err_card;
4106 }
4107 rc = qeth_setup_card(card);
4108 if (rc) {
d11ba0c4 4109 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 4110 goto err_card;
4111 }
4112
4113 if (card->info.type == QETH_CARD_TYPE_OSN) {
4114 rc = qeth_core_create_osn_attributes(dev);
4115 if (rc)
4116 goto err_card;
4117 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4118 if (rc) {
4119 qeth_core_remove_osn_attributes(dev);
4120 goto err_card;
4121 }
4122 rc = card->discipline.ccwgdriver->probe(card->gdev);
4123 if (rc) {
4124 qeth_core_free_discipline(card);
4125 qeth_core_remove_osn_attributes(dev);
4126 goto err_card;
4127 }
4128 } else {
4129 rc = qeth_core_create_device_attributes(dev);
4130 if (rc)
4131 goto err_card;
4132 }
4133
4134 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4135 list_add_tail(&card->list, &qeth_core_card_list.list);
4136 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4137 return 0;
4138
4139err_card:
4140 qeth_core_free_card(card);
4141err_dev:
4142 put_device(dev);
4143 return rc;
4144}
4145
4146static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4147{
4148 unsigned long flags;
4149 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4150
28a7e4c9 4151 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 4152 if (card->discipline.ccwgdriver) {
4153 card->discipline.ccwgdriver->remove(gdev);
4154 qeth_core_free_discipline(card);
4155 }
4156
4157 if (card->info.type == QETH_CARD_TYPE_OSN) {
4158 qeth_core_remove_osn_attributes(&gdev->dev);
4159 } else {
4160 qeth_core_remove_device_attributes(&gdev->dev);
4161 }
4162 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4163 list_del(&card->list);
4164 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4165 qeth_core_free_card(card);
4166 dev_set_drvdata(&gdev->dev, NULL);
4167 put_device(&gdev->dev);
4168 return;
4169}
4170
4171static int qeth_core_set_online(struct ccwgroup_device *gdev)
4172{
4173 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4174 int rc = 0;
4175 int def_discipline;
4176
4177 if (!card->discipline.ccwgdriver) {
4178 if (card->info.type == QETH_CARD_TYPE_IQD)
4179 def_discipline = QETH_DISCIPLINE_LAYER3;
4180 else
4181 def_discipline = QETH_DISCIPLINE_LAYER2;
4182 rc = qeth_core_load_discipline(card, def_discipline);
4183 if (rc)
4184 goto err;
4185 rc = card->discipline.ccwgdriver->probe(card->gdev);
4186 if (rc)
4187 goto err;
4188 }
4189 rc = card->discipline.ccwgdriver->set_online(gdev);
4190err:
4191 return rc;
4192}
4193
4194static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4195{
4196 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4197 return card->discipline.ccwgdriver->set_offline(gdev);
4198}
4199
4200static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4201{
4202 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4203 if (card->discipline.ccwgdriver &&
4204 card->discipline.ccwgdriver->shutdown)
4205 card->discipline.ccwgdriver->shutdown(gdev);
4206}
4207
4208static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4209 .owner = THIS_MODULE,
4210 .name = "qeth",
4211 .driver_id = 0xD8C5E3C8,
4212 .probe = qeth_core_probe_device,
4213 .remove = qeth_core_remove_device,
4214 .set_online = qeth_core_set_online,
4215 .set_offline = qeth_core_set_offline,
4216 .shutdown = qeth_core_shutdown,
4217};
4218
4219static ssize_t
4220qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4221 size_t count)
4222{
4223 int err;
4224 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4225 qeth_core_ccwgroup_driver.driver_id);
4226 if (err)
4227 return err;
4228 else
4229 return count;
4230}
4231
4232static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4233
4234static struct {
4235 const char str[ETH_GSTRING_LEN];
4236} qeth_ethtool_stats_keys[] = {
4237/* 0 */{"rx skbs"},
4238 {"rx buffers"},
4239 {"tx skbs"},
4240 {"tx buffers"},
4241 {"tx skbs no packing"},
4242 {"tx buffers no packing"},
4243 {"tx skbs packing"},
4244 {"tx buffers packing"},
4245 {"tx sg skbs"},
4246 {"tx sg frags"},
4247/* 10 */{"rx sg skbs"},
4248 {"rx sg frags"},
4249 {"rx sg page allocs"},
4250 {"tx large kbytes"},
4251 {"tx large count"},
4252 {"tx pk state ch n->p"},
4253 {"tx pk state ch p->n"},
4254 {"tx pk watermark low"},
4255 {"tx pk watermark high"},
4256 {"queue 0 buffer usage"},
4257/* 20 */{"queue 1 buffer usage"},
4258 {"queue 2 buffer usage"},
4259 {"queue 3 buffer usage"},
4260 {"rx handler time"},
4261 {"rx handler count"},
4262 {"rx do_QDIO time"},
4263 {"rx do_QDIO count"},
4264 {"tx handler time"},
4265 {"tx handler count"},
4266 {"tx time"},
4267/* 30 */{"tx count"},
4268 {"tx do_QDIO time"},
4269 {"tx do_QDIO count"},
4270};
4271
4272int qeth_core_get_stats_count(struct net_device *dev)
4273{
4274 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4275}
4276EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4277
4278void qeth_core_get_ethtool_stats(struct net_device *dev,
4279 struct ethtool_stats *stats, u64 *data)
4280{
509e2562 4281 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4282 data[0] = card->stats.rx_packets -
4283 card->perf_stats.initial_rx_packets;
4284 data[1] = card->perf_stats.bufs_rec;
4285 data[2] = card->stats.tx_packets -
4286 card->perf_stats.initial_tx_packets;
4287 data[3] = card->perf_stats.bufs_sent;
4288 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4289 - card->perf_stats.skbs_sent_pack;
4290 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4291 data[6] = card->perf_stats.skbs_sent_pack;
4292 data[7] = card->perf_stats.bufs_sent_pack;
4293 data[8] = card->perf_stats.sg_skbs_sent;
4294 data[9] = card->perf_stats.sg_frags_sent;
4295 data[10] = card->perf_stats.sg_skbs_rx;
4296 data[11] = card->perf_stats.sg_frags_rx;
4297 data[12] = card->perf_stats.sg_alloc_page_rx;
4298 data[13] = (card->perf_stats.large_send_bytes >> 10);
4299 data[14] = card->perf_stats.large_send_cnt;
4300 data[15] = card->perf_stats.sc_dp_p;
4301 data[16] = card->perf_stats.sc_p_dp;
4302 data[17] = QETH_LOW_WATERMARK_PACK;
4303 data[18] = QETH_HIGH_WATERMARK_PACK;
4304 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4305 data[20] = (card->qdio.no_out_queues > 1) ?
4306 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4307 data[21] = (card->qdio.no_out_queues > 2) ?
4308 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4309 data[22] = (card->qdio.no_out_queues > 3) ?
4310 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4311 data[23] = card->perf_stats.inbound_time;
4312 data[24] = card->perf_stats.inbound_cnt;
4313 data[25] = card->perf_stats.inbound_do_qdio_time;
4314 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4315 data[27] = card->perf_stats.outbound_handler_time;
4316 data[28] = card->perf_stats.outbound_handler_cnt;
4317 data[29] = card->perf_stats.outbound_time;
4318 data[30] = card->perf_stats.outbound_cnt;
4319 data[31] = card->perf_stats.outbound_do_qdio_time;
4320 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4321}
4322EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4323
4324void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4325{
4326 switch (stringset) {
4327 case ETH_SS_STATS:
4328 memcpy(data, &qeth_ethtool_stats_keys,
4329 sizeof(qeth_ethtool_stats_keys));
4330 break;
4331 default:
4332 WARN_ON(1);
4333 break;
4334 }
4335}
4336EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4337
4338void qeth_core_get_drvinfo(struct net_device *dev,
4339 struct ethtool_drvinfo *info)
4340{
509e2562 4341 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4342 if (card->options.layer2)
4343 strcpy(info->driver, "qeth_l2");
4344 else
4345 strcpy(info->driver, "qeth_l3");
4346
4347 strcpy(info->version, "1.0");
4348 strcpy(info->fw_version, card->info.mcl_level);
4349 sprintf(info->bus_info, "%s/%s/%s",
4350 CARD_RDEV_ID(card),
4351 CARD_WDEV_ID(card),
4352 CARD_DDEV_ID(card));
4353}
4354EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4355
3f9975aa
FB		 4356int qeth_core_ethtool_get_settings(struct net_device *netdev,
4357 struct ethtool_cmd *ecmd)
4358{
509e2562 4359 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 4360 enum qeth_link_types link_type;
4361
4362 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4363 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4364 else
4365 link_type = card->info.link_type;
4366
4367 ecmd->transceiver = XCVR_INTERNAL;
4368 ecmd->supported = SUPPORTED_Autoneg;
4369 ecmd->advertising = ADVERTISED_Autoneg;
4370 ecmd->duplex = DUPLEX_FULL;
4371 ecmd->autoneg = AUTONEG_ENABLE;
4372
4373 switch (link_type) {
4374 case QETH_LINK_TYPE_FAST_ETH:
4375 case QETH_LINK_TYPE_LANE_ETH100:
4376 ecmd->supported |= SUPPORTED_10baseT_Half |
4377 SUPPORTED_10baseT_Full |
4378 SUPPORTED_100baseT_Half |
4379 SUPPORTED_100baseT_Full |
4380 SUPPORTED_TP;
4381 ecmd->advertising |= ADVERTISED_10baseT_Half |
4382 ADVERTISED_10baseT_Full |
4383 ADVERTISED_100baseT_Half |
4384 ADVERTISED_100baseT_Full |
4385 ADVERTISED_TP;
4386 ecmd->speed = SPEED_100;
4387 ecmd->port = PORT_TP;
4388 break;
4389
4390 case QETH_LINK_TYPE_GBIT_ETH:
4391 case QETH_LINK_TYPE_LANE_ETH1000:
4392 ecmd->supported |= SUPPORTED_10baseT_Half |
4393 SUPPORTED_10baseT_Full |
4394 SUPPORTED_100baseT_Half |
4395 SUPPORTED_100baseT_Full |
4396 SUPPORTED_1000baseT_Half |
4397 SUPPORTED_1000baseT_Full |
4398 SUPPORTED_FIBRE;
4399 ecmd->advertising |= ADVERTISED_10baseT_Half |
4400 ADVERTISED_10baseT_Full |
4401 ADVERTISED_100baseT_Half |
4402 ADVERTISED_100baseT_Full |
4403 ADVERTISED_1000baseT_Half |
4404 ADVERTISED_1000baseT_Full |
4405 ADVERTISED_FIBRE;
4406 ecmd->speed = SPEED_1000;
4407 ecmd->port = PORT_FIBRE;
4408 break;
4409
4410 case QETH_LINK_TYPE_10GBIT_ETH:
4411 ecmd->supported |= SUPPORTED_10baseT_Half |
4412 SUPPORTED_10baseT_Full |
4413 SUPPORTED_100baseT_Half |
4414 SUPPORTED_100baseT_Full |
4415 SUPPORTED_1000baseT_Half |
4416 SUPPORTED_1000baseT_Full |
4417 SUPPORTED_10000baseT_Full |
4418 SUPPORTED_FIBRE;
4419 ecmd->advertising |= ADVERTISED_10baseT_Half |
4420 ADVERTISED_10baseT_Full |
4421 ADVERTISED_100baseT_Half |
4422 ADVERTISED_100baseT_Full |
4423 ADVERTISED_1000baseT_Half |
4424 ADVERTISED_1000baseT_Full |
4425 ADVERTISED_10000baseT_Full |
4426 ADVERTISED_FIBRE;
4427 ecmd->speed = SPEED_10000;
4428 ecmd->port = PORT_FIBRE;
4429 break;
4430
4431 default:
4432 ecmd->supported |= SUPPORTED_10baseT_Half |
4433 SUPPORTED_10baseT_Full |
4434 SUPPORTED_TP;
4435 ecmd->advertising |= ADVERTISED_10baseT_Half |
4436 ADVERTISED_10baseT_Full |
4437 ADVERTISED_TP;
4438 ecmd->speed = SPEED_10;
4439 ecmd->port = PORT_TP;
4440 }
4441
4442 return 0;
4443}
4444EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4445
4a71df50
FB		 4446static int __init qeth_core_init(void)
4447{
4448 int rc;
4449
4450 PRINT_INFO("loading core functions\n");
4451 INIT_LIST_HEAD(&qeth_core_card_list.list);
4452 rwlock_init(&qeth_core_card_list.rwlock);
4453
4454 rc = qeth_register_dbf_views();
4455 if (rc)
4456 goto out_err;
4457 rc = ccw_driver_register(&qeth_ccw_driver);
4458 if (rc)
4459 goto ccw_err;
4460 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4461 if (rc)
4462 goto ccwgroup_err;
4463 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4464 &driver_attr_group);
4465 if (rc)
4466 goto driver_err;
4467 qeth_core_root_dev = s390_root_dev_register("qeth");
4468 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4469 if (rc)
4470 goto register_err;
4a71df50 4471
683d718a
FB		 4472 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4473 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4474 if (!qeth_core_header_cache) {
4475 rc = -ENOMEM;
4476 goto slab_err;
4477 }
4478
4479 return 0;
4480slab_err:
4481 s390_root_dev_unregister(qeth_core_root_dev);
4a71df50
FB		 4482register_err:
4483 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4484 &driver_attr_group);
4485driver_err:
4486 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4487ccwgroup_err:
4488 ccw_driver_unregister(&qeth_ccw_driver);
4489ccw_err:
4490 qeth_unregister_dbf_views();
4491out_err:
4492 PRINT_ERR("Initialization failed with code %d\n", rc);
4493 return rc;
4494}
4495
4496static void __exit qeth_core_exit(void)
4497{
4498 s390_root_dev_unregister(qeth_core_root_dev);
4499 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4500 &driver_attr_group);
4501 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4502 ccw_driver_unregister(&qeth_ccw_driver);
683d718a 4503 kmem_cache_destroy(qeth_core_header_cache);
4a71df50
FB		 4504 qeth_unregister_dbf_views();
4505 PRINT_INFO("core functions removed\n");
4506}
4507
4508module_init(qeth_core_init);
4509module_exit(qeth_core_exit);
4510MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4511MODULE_DESCRIPTION("qeth core functions");
4512MODULE_LICENSE("GPL");
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