]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/s390/net/qeth_core_main.c
projects / mirror_ubuntu-bionic-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
qeth: refactor calculation of SBALE count
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb 25#include <asm/ebcdic.h>
2bf29df7 26#include <asm/chpid.h>
ab4227cb 27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
c3ab96f3 29#include <asm/compat.h>
4a71df50
FB		 30
31#include "qeth_core.h"
4a71df50 32
d11ba0c4
PT		 33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 /* N P A M L V H */
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
39 &debug_sprintf_view, NULL},
d11ba0c4
PT		 40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 49static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 50
51static struct device *qeth_core_root_dev;
5113fec0 52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 53static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 54static struct mutex qeth_mod_mutex;
4a71df50
FB		 55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58static int qeth_issue_next_read(struct qeth_card *);
59static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61static void qeth_free_buffer_pool(struct qeth_card *);
62static int qeth_qdio_establish(struct qeth_card *);
0da9581d 63static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 64static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
65 struct qeth_qdio_out_buffer *buf,
66 enum iucv_tx_notify notification);
67static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 68static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
69 struct qeth_qdio_out_buffer *buf,
70 enum qeth_qdio_buffer_states newbufstate);
72861ae7 71static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 72
b4d72c08 73struct workqueue_struct *qeth_wq;
c044dc21 74EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 75
511c2445
EC		 76int qeth_card_hw_is_reachable(struct qeth_card *card)
77{
78 return (card->state == CARD_STATE_SOFTSETUP) ||
79 (card->state == CARD_STATE_UP);
80}
81EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
82
0f54761d
SR		 83static void qeth_close_dev_handler(struct work_struct *work)
84{
85 struct qeth_card *card;
86
87 card = container_of(work, struct qeth_card, close_dev_work);
88 QETH_CARD_TEXT(card, 2, "cldevhdl");
89 rtnl_lock();
90 dev_close(card->dev);
91 rtnl_unlock();
92 ccwgroup_set_offline(card->gdev);
93}
94
95void qeth_close_dev(struct qeth_card *card)
96{
97 QETH_CARD_TEXT(card, 2, "cldevsubm");
98 queue_work(qeth_wq, &card->close_dev_work);
99}
100EXPORT_SYMBOL_GPL(qeth_close_dev);
101
4a71df50
FB		 102static inline const char *qeth_get_cardname(struct qeth_card *card)
103{
104 if (card->info.guestlan) {
105 switch (card->info.type) {
5113fec0 106 case QETH_CARD_TYPE_OSD:
7096b187 107 return " Virtual NIC QDIO";
4a71df50 108 case QETH_CARD_TYPE_IQD:
7096b187 109 return " Virtual NIC Hiper";
5113fec0 110 case QETH_CARD_TYPE_OSM:
7096b187 111 return " Virtual NIC QDIO - OSM";
5113fec0 112 case QETH_CARD_TYPE_OSX:
7096b187 113 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 114 default:
115 return " unknown";
116 }
117 } else {
118 switch (card->info.type) {
5113fec0 119 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 120 return " OSD Express";
121 case QETH_CARD_TYPE_IQD:
122 return " HiperSockets";
123 case QETH_CARD_TYPE_OSN:
124 return " OSN QDIO";
5113fec0
UB		 125 case QETH_CARD_TYPE_OSM:
126 return " OSM QDIO";
127 case QETH_CARD_TYPE_OSX:
128 return " OSX QDIO";
4a71df50
FB		 129 default:
130 return " unknown";
131 }
132 }
133 return " n/a";
134}
135
136/* max length to be returned: 14 */
137const char *qeth_get_cardname_short(struct qeth_card *card)
138{
139 if (card->info.guestlan) {
140 switch (card->info.type) {
5113fec0 141 case QETH_CARD_TYPE_OSD:
7096b187 142 return "Virt.NIC QDIO";
4a71df50 143 case QETH_CARD_TYPE_IQD:
7096b187 144 return "Virt.NIC Hiper";
5113fec0 145 case QETH_CARD_TYPE_OSM:
7096b187 146 return "Virt.NIC OSM";
5113fec0 147 case QETH_CARD_TYPE_OSX:
7096b187 148 return "Virt.NIC OSX";
4a71df50
FB		 149 default:
150 return "unknown";
151 }
152 } else {
153 switch (card->info.type) {
5113fec0 154 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 155 switch (card->info.link_type) {
156 case QETH_LINK_TYPE_FAST_ETH:
157 return "OSD_100";
158 case QETH_LINK_TYPE_HSTR:
159 return "HSTR";
160 case QETH_LINK_TYPE_GBIT_ETH:
161 return "OSD_1000";
162 case QETH_LINK_TYPE_10GBIT_ETH:
163 return "OSD_10GIG";
164 case QETH_LINK_TYPE_LANE_ETH100:
165 return "OSD_FE_LANE";
166 case QETH_LINK_TYPE_LANE_TR:
167 return "OSD_TR_LANE";
168 case QETH_LINK_TYPE_LANE_ETH1000:
169 return "OSD_GbE_LANE";
170 case QETH_LINK_TYPE_LANE:
171 return "OSD_ATM_LANE";
172 default:
173 return "OSD_Express";
174 }
175 case QETH_CARD_TYPE_IQD:
176 return "HiperSockets";
177 case QETH_CARD_TYPE_OSN:
178 return "OSN";
5113fec0
UB		 179 case QETH_CARD_TYPE_OSM:
180 return "OSM_1000";
181 case QETH_CARD_TYPE_OSX:
182 return "OSX_10GIG";
4a71df50
FB		 183 default:
184 return "unknown";
185 }
186 }
187 return "n/a";
188}
189
65d8013c
SR		 190void qeth_set_recovery_task(struct qeth_card *card)
191{
192 card->recovery_task = current;
193}
194EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
195
196void qeth_clear_recovery_task(struct qeth_card *card)
197{
198 card->recovery_task = NULL;
199}
200EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
201
202static bool qeth_is_recovery_task(const struct qeth_card *card)
203{
204 return card->recovery_task == current;
205}
206
4a71df50
FB		 207void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
208 int clear_start_mask)
209{
210 unsigned long flags;
211
212 spin_lock_irqsave(&card->thread_mask_lock, flags);
213 card->thread_allowed_mask = threads;
214 if (clear_start_mask)
215 card->thread_start_mask &= threads;
216 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
217 wake_up(&card->wait_q);
218}
219EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
220
221int qeth_threads_running(struct qeth_card *card, unsigned long threads)
222{
223 unsigned long flags;
224 int rc = 0;
225
226 spin_lock_irqsave(&card->thread_mask_lock, flags);
227 rc = (card->thread_running_mask & threads);
228 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
229 return rc;
230}
231EXPORT_SYMBOL_GPL(qeth_threads_running);
232
233int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
234{
65d8013c
SR		 235 if (qeth_is_recovery_task(card))
236 return 0;
4a71df50
FB		 237 return wait_event_interruptible(card->wait_q,
238 qeth_threads_running(card, threads) == 0);
239}
240EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
241
242void qeth_clear_working_pool_list(struct qeth_card *card)
243{
244 struct qeth_buffer_pool_entry *pool_entry, *tmp;
245
847a50fd 246 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 247 list_for_each_entry_safe(pool_entry, tmp,
248 &card->qdio.in_buf_pool.entry_list, list){
249 list_del(&pool_entry->list);
250 }
251}
252EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
253
254static int qeth_alloc_buffer_pool(struct qeth_card *card)
255{
256 struct qeth_buffer_pool_entry *pool_entry;
257 void *ptr;
258 int i, j;
259
847a50fd 260 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 261 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 262 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 263 if (!pool_entry) {
264 qeth_free_buffer_pool(card);
265 return -ENOMEM;
266 }
267 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 268 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 269 if (!ptr) {
270 while (j > 0)
271 free_page((unsigned long)
272 pool_entry->elements[--j]);
273 kfree(pool_entry);
274 qeth_free_buffer_pool(card);
275 return -ENOMEM;
276 }
277 pool_entry->elements[j] = ptr;
278 }
279 list_add(&pool_entry->init_list,
280 &card->qdio.init_pool.entry_list);
281 }
282 return 0;
283}
284
285int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
286{
847a50fd 287 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 288
289 if ((card->state != CARD_STATE_DOWN) &&
290 (card->state != CARD_STATE_RECOVER))
291 return -EPERM;
292
293 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
294 qeth_clear_working_pool_list(card);
295 qeth_free_buffer_pool(card);
296 card->qdio.in_buf_pool.buf_count = bufcnt;
297 card->qdio.init_pool.buf_count = bufcnt;
298 return qeth_alloc_buffer_pool(card);
299}
76b11f8e 300EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 301
4601ba6c
SO		 302static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
303{
6d284bde
SO		 304 if (!q)
305 return;
306
307 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 308 kfree(q);
309}
310
311static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
312{
313 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
314 int i;
315
316 if (!q)
317 return NULL;
318
6d284bde
SO		 319 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
320 kfree(q);
321 return NULL;
322 }
323
4601ba6c 324 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 325 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 326
327 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
328 return q;
329}
330
0da9581d
EL		 331static inline int qeth_cq_init(struct qeth_card *card)
332{
333 int rc;
334
335 if (card->options.cq == QETH_CQ_ENABLED) {
336 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 337 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
338 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 339 card->qdio.c_q->next_buf_to_init = 127;
340 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
341 card->qdio.no_in_queues - 1, 0,
342 127);
343 if (rc) {
344 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
345 goto out;
346 }
347 }
348 rc = 0;
349out:
350 return rc;
351}
352
353static inline int qeth_alloc_cq(struct qeth_card *card)
354{
355 int rc;
356
357 if (card->options.cq == QETH_CQ_ENABLED) {
358 int i;
359 struct qdio_outbuf_state *outbuf_states;
360
361 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 362 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 363 if (!card->qdio.c_q) {
364 rc = -1;
365 goto kmsg_out;
366 }
0da9581d 367 card->qdio.no_in_queues = 2;
4a912f98 368 card->qdio.out_bufstates =
0da9581d
EL		 369 kzalloc(card->qdio.no_out_queues *
370 QDIO_MAX_BUFFERS_PER_Q *
371 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
372 outbuf_states = card->qdio.out_bufstates;
373 if (outbuf_states == NULL) {
374 rc = -1;
375 goto free_cq_out;
376 }
377 for (i = 0; i < card->qdio.no_out_queues; ++i) {
378 card->qdio.out_qs[i]->bufstates = outbuf_states;
379 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
380 }
381 } else {
382 QETH_DBF_TEXT(SETUP, 2, "nocq");
383 card->qdio.c_q = NULL;
384 card->qdio.no_in_queues = 1;
385 }
386 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
387 rc = 0;
388out:
389 return rc;
390free_cq_out:
4601ba6c 391 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 392 card->qdio.c_q = NULL;
393kmsg_out:
394 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
395 goto out;
396}
397
398static inline void qeth_free_cq(struct qeth_card *card)
399{
400 if (card->qdio.c_q) {
401 --card->qdio.no_in_queues;
4601ba6c 402 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 403 card->qdio.c_q = NULL;
404 }
405 kfree(card->qdio.out_bufstates);
406 card->qdio.out_bufstates = NULL;
407}
408
b3332930
FB		 409static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
410 int delayed) {
411 enum iucv_tx_notify n;
412
413 switch (sbalf15) {
414 case 0:
415 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
416 break;
417 case 4:
418 case 16:
419 case 17:
420 case 18:
421 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
422 TX_NOTIFY_UNREACHABLE;
423 break;
424 default:
425 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
426 TX_NOTIFY_GENERALERROR;
427 break;
428 }
429
430 return n;
431}
432
0da9581d
EL		 433static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
434 int bidx, int forced_cleanup)
435{
72861ae7
EL		 436 if (q->card->options.cq != QETH_CQ_ENABLED)
437 return;
438
0da9581d
EL		 439 if (q->bufs[bidx]->next_pending != NULL) {
440 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
441 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
442
443 while (c) {
444 if (forced_cleanup ||
445 atomic_read(&c->state) ==
446 QETH_QDIO_BUF_HANDLED_DELAYED) {
447 struct qeth_qdio_out_buffer *f = c;
448 QETH_CARD_TEXT(f->q->card, 5, "fp");
449 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 450 /* release here to avoid interleaving between
451 outbound tasklet and inbound tasklet
452 regarding notifications and lifecycle */
453 qeth_release_skbs(c);
454
0da9581d 455 c = f->next_pending;
18af5c17 456 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 457 head->next_pending = c;
458 kmem_cache_free(qeth_qdio_outbuf_cache, f);
459 } else {
460 head = c;
461 c = c->next_pending;
462 }
463
464 }
465 }
72861ae7
EL		 466 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
467 QETH_QDIO_BUF_HANDLED_DELAYED)) {
468 /* for recovery situations */
469 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
470 qeth_init_qdio_out_buf(q, bidx);
471 QETH_CARD_TEXT(q->card, 2, "clprecov");
472 }
0da9581d
EL		 473}
474
475
476static inline void qeth_qdio_handle_aob(struct qeth_card *card,
477 unsigned long phys_aob_addr) {
478 struct qaob *aob;
479 struct qeth_qdio_out_buffer *buffer;
b3332930 480 enum iucv_tx_notify notification;
0da9581d
EL		 481
482 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
483 QETH_CARD_TEXT(card, 5, "haob");
484 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
485 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
486 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
487
b3332930
FB		 488 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
489 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
490 notification = TX_NOTIFY_OK;
491 } else {
18af5c17
SR		 492 WARN_ON_ONCE(atomic_read(&buffer->state) !=
493 QETH_QDIO_BUF_PENDING);
b3332930
FB		 494 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
495 notification = TX_NOTIFY_DELAYED_OK;
496 }
497
498 if (aob->aorc != 0) {
499 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
500 notification = qeth_compute_cq_notification(aob->aorc, 1);
501 }
502 qeth_notify_skbs(buffer->q, buffer, notification);
503
0da9581d
EL		 504 buffer->aob = NULL;
505 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 506 QETH_QDIO_BUF_HANDLED_DELAYED);
507
0da9581d
EL		 508 /* from here on: do not touch buffer anymore */
509 qdio_release_aob(aob);
510}
511
512static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
513{
514 return card->options.cq == QETH_CQ_ENABLED &&
515 card->qdio.c_q != NULL &&
516 queue != 0 &&
517 queue == card->qdio.no_in_queues - 1;
518}
519
520
4a71df50
FB		 521static int qeth_issue_next_read(struct qeth_card *card)
522{
523 int rc;
524 struct qeth_cmd_buffer *iob;
525
847a50fd 526 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 527 if (card->read.state != CH_STATE_UP)
528 return -EIO;
529 iob = qeth_get_buffer(&card->read);
530 if (!iob) {
74eacdb9
FB		 531 dev_warn(&card->gdev->dev, "The qeth device driver "
532 "failed to recover an error on the device\n");
533 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
534 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 535 return -ENOMEM;
536 }
537 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 538 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 539 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
540 (addr_t) iob, 0, 0);
541 if (rc) {
74eacdb9
FB		 542 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
543 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 544 atomic_set(&card->read.irq_pending, 0);
908abbb5 545 card->read_or_write_problem = 1;
4a71df50
FB		 546 qeth_schedule_recovery(card);
547 wake_up(&card->wait_q);
548 }
549 return rc;
550}
551
552static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
553{
554 struct qeth_reply *reply;
555
556 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
557 if (reply) {
558 atomic_set(&reply->refcnt, 1);
559 atomic_set(&reply->received, 0);
560 reply->card = card;
6531084c 561 }
4a71df50
FB		 562 return reply;
563}
564
565static void qeth_get_reply(struct qeth_reply *reply)
566{
567 WARN_ON(atomic_read(&reply->refcnt) <= 0);
568 atomic_inc(&reply->refcnt);
569}
570
571static void qeth_put_reply(struct qeth_reply *reply)
572{
573 WARN_ON(atomic_read(&reply->refcnt) <= 0);
574 if (atomic_dec_and_test(&reply->refcnt))
575 kfree(reply);
576}
577
d11ba0c4 578static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 579 struct qeth_card *card)
580{
4a71df50 581 char *ipa_name;
d11ba0c4 582 int com = cmd->hdr.command;
4a71df50 583 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 584 if (rc)
70919e23
UB		 585 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
586 "x%X \"%s\"\n",
587 ipa_name, com, dev_name(&card->gdev->dev),
588 QETH_CARD_IFNAME(card), rc,
589 qeth_get_ipa_msg(rc));
d11ba0c4 590 else
70919e23
UB		 591 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
592 ipa_name, com, dev_name(&card->gdev->dev),
593 QETH_CARD_IFNAME(card));
4a71df50
FB		 594}
595
596static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
597 struct qeth_cmd_buffer *iob)
598{
599 struct qeth_ipa_cmd *cmd = NULL;
600
847a50fd 601 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 602 if (IS_IPA(iob->data)) {
603 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
604 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 605 if (cmd->hdr.command != IPA_CMD_SETCCID &&
606 cmd->hdr.command != IPA_CMD_DELCCID &&
607 cmd->hdr.command != IPA_CMD_MODCCID &&
608 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 609 qeth_issue_ipa_msg(cmd,
610 cmd->hdr.return_code, card);
4a71df50
FB		 611 return cmd;
612 } else {
613 switch (cmd->hdr.command) {
614 case IPA_CMD_STOPLAN:
0f54761d
SR		 615 if (cmd->hdr.return_code ==
616 IPA_RC_VEPA_TO_VEB_TRANSITION) {
617 dev_err(&card->gdev->dev,
618 "Interface %s is down because the "
619 "adjacent port is no longer in "
620 "reflective relay mode\n",
621 QETH_CARD_IFNAME(card));
622 qeth_close_dev(card);
623 } else {
624 dev_warn(&card->gdev->dev,
74eacdb9
FB		 625 "The link for interface %s on CHPID"
626 " 0x%X failed\n",
4a71df50
FB		 627 QETH_CARD_IFNAME(card),
628 card->info.chpid);
0f54761d
SR		 629 qeth_issue_ipa_msg(cmd,
630 cmd->hdr.return_code, card);
631 }
4a71df50
FB		 632 card->lan_online = 0;
633 if (card->dev && netif_carrier_ok(card->dev))
634 netif_carrier_off(card->dev);
635 return NULL;
636 case IPA_CMD_STARTLAN:
74eacdb9
FB		 637 dev_info(&card->gdev->dev,
638 "The link for %s on CHPID 0x%X has"
639 " been restored\n",
4a71df50
FB		 640 QETH_CARD_IFNAME(card),
641 card->info.chpid);
642 netif_carrier_on(card->dev);
922dc062 643 card->lan_online = 1;
1da74b1c
FB		 644 if (card->info.hwtrap)
645 card->info.hwtrap = 2;
4a71df50
FB		 646 qeth_schedule_recovery(card);
647 return NULL;
9c23f4da
EC		 648 case IPA_CMD_SETBRIDGEPORT_IQD:
649 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 650 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 651 if (card->discipline->control_event_handler
652 (card, cmd))
653 return cmd;
654 else
655 return NULL;
4a71df50
FB		 656 case IPA_CMD_MODCCID:
657 return cmd;
658 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 659 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 660 break;
661 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 662 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 663 break;
664 default:
c4cef07c 665 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 666 "but not a reply!\n");
667 break;
668 }
669 }
670 }
671 return cmd;
672}
673
674void qeth_clear_ipacmd_list(struct qeth_card *card)
675{
676 struct qeth_reply *reply, *r;
677 unsigned long flags;
678
847a50fd 679 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 680
681 spin_lock_irqsave(&card->lock, flags);
682 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
683 qeth_get_reply(reply);
684 reply->rc = -EIO;
685 atomic_inc(&reply->received);
686 list_del_init(&reply->list);
687 wake_up(&reply->wait_q);
688 qeth_put_reply(reply);
689 }
690 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 691 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 692}
693EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
694
5113fec0
UB		 695static int qeth_check_idx_response(struct qeth_card *card,
696 unsigned char *buffer)
4a71df50
FB		 697{
698 if (!buffer)
699 return 0;
700
d11ba0c4 701 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 702 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 703 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 704 "with cause code 0x%02x%s\n",
705 buffer[4],
706 ((buffer[4] == 0x22) ?
707 " -- try another portname" : ""));
847a50fd
CO		 708 QETH_CARD_TEXT(card, 2, "ckidxres");
709 QETH_CARD_TEXT(card, 2, " idxterm");
710 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 711 if (buffer[4] == 0xf6) {
712 dev_err(&card->gdev->dev,
713 "The qeth device is not configured "
714 "for the OSI layer required by z/VM\n");
715 return -EPERM;
716 }
4a71df50
FB		 717 return -EIO;
718 }
719 return 0;
720}
721
bca51650
TR		 722static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
723{
724 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
725 dev_get_drvdata(&cdev->dev))->dev);
726 return card;
727}
728
4a71df50
FB		 729static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
730 __u32 len)
731{
732 struct qeth_card *card;
733
4a71df50 734 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 735 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 736 if (channel == &card->read)
737 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
738 else
739 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
740 channel->ccw.count = len;
741 channel->ccw.cda = (__u32) __pa(iob);
742}
743
744static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
745{
746 __u8 index;
747
847a50fd 748 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 749 index = channel->io_buf_no;
750 do {
751 if (channel->iob[index].state == BUF_STATE_FREE) {
752 channel->iob[index].state = BUF_STATE_LOCKED;
753 channel->io_buf_no = (channel->io_buf_no + 1) %
754 QETH_CMD_BUFFER_NO;
755 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
756 return channel->iob + index;
757 }
758 index = (index + 1) % QETH_CMD_BUFFER_NO;
759 } while (index != channel->io_buf_no);
760
761 return NULL;
762}
763
764void qeth_release_buffer(struct qeth_channel *channel,
765 struct qeth_cmd_buffer *iob)
766{
767 unsigned long flags;
768
847a50fd 769 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 770 spin_lock_irqsave(&channel->iob_lock, flags);
771 memset(iob->data, 0, QETH_BUFSIZE);
772 iob->state = BUF_STATE_FREE;
773 iob->callback = qeth_send_control_data_cb;
774 iob->rc = 0;
775 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 776 wake_up(&channel->wait_q);
4a71df50
FB		 777}
778EXPORT_SYMBOL_GPL(qeth_release_buffer);
779
780static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
781{
782 struct qeth_cmd_buffer *buffer = NULL;
783 unsigned long flags;
784
785 spin_lock_irqsave(&channel->iob_lock, flags);
786 buffer = __qeth_get_buffer(channel);
787 spin_unlock_irqrestore(&channel->iob_lock, flags);
788 return buffer;
789}
790
791struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
792{
793 struct qeth_cmd_buffer *buffer;
794 wait_event(channel->wait_q,
795 ((buffer = qeth_get_buffer(channel)) != NULL));
796 return buffer;
797}
798EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
799
800void qeth_clear_cmd_buffers(struct qeth_channel *channel)
801{
802 int cnt;
803
804 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
805 qeth_release_buffer(channel, &channel->iob[cnt]);
806 channel->buf_no = 0;
807 channel->io_buf_no = 0;
808}
809EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
810
811static void qeth_send_control_data_cb(struct qeth_channel *channel,
812 struct qeth_cmd_buffer *iob)
813{
814 struct qeth_card *card;
815 struct qeth_reply *reply, *r;
816 struct qeth_ipa_cmd *cmd;
817 unsigned long flags;
818 int keep_reply;
5113fec0 819 int rc = 0;
4a71df50 820
4a71df50 821 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 822 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 823 rc = qeth_check_idx_response(card, iob->data);
824 switch (rc) {
825 case 0:
826 break;
827 case -EIO:
4a71df50 828 qeth_clear_ipacmd_list(card);
5113fec0 829 qeth_schedule_recovery(card);
01fc3e86 830 /* fall through */
5113fec0 831 default:
4a71df50
FB		 832 goto out;
833 }
834
835 cmd = qeth_check_ipa_data(card, iob);
836 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
837 goto out;
838 /*in case of OSN : check if cmd is set */
839 if (card->info.type == QETH_CARD_TYPE_OSN &&
840 cmd &&
841 cmd->hdr.command != IPA_CMD_STARTLAN &&
842 card->osn_info.assist_cb != NULL) {
843 card->osn_info.assist_cb(card->dev, cmd);
844 goto out;
845 }
846
847 spin_lock_irqsave(&card->lock, flags);
848 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
849 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
850 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
851 qeth_get_reply(reply);
852 list_del_init(&reply->list);
853 spin_unlock_irqrestore(&card->lock, flags);
854 keep_reply = 0;
855 if (reply->callback != NULL) {
856 if (cmd) {
857 reply->offset = (__u16)((char *)cmd -
858 (char *)iob->data);
859 keep_reply = reply->callback(card,
860 reply,
861 (unsigned long)cmd);
862 } else
863 keep_reply = reply->callback(card,
864 reply,
865 (unsigned long)iob);
866 }
867 if (cmd)
868 reply->rc = (u16) cmd->hdr.return_code;
869 else if (iob->rc)
870 reply->rc = iob->rc;
871 if (keep_reply) {
872 spin_lock_irqsave(&card->lock, flags);
873 list_add_tail(&reply->list,
874 &card->cmd_waiter_list);
875 spin_unlock_irqrestore(&card->lock, flags);
876 } else {
877 atomic_inc(&reply->received);
878 wake_up(&reply->wait_q);
879 }
880 qeth_put_reply(reply);
881 goto out;
882 }
883 }
884 spin_unlock_irqrestore(&card->lock, flags);
885out:
886 memcpy(&card->seqno.pdu_hdr_ack,
887 QETH_PDU_HEADER_SEQ_NO(iob->data),
888 QETH_SEQ_NO_LENGTH);
889 qeth_release_buffer(channel, iob);
890}
891
892static int qeth_setup_channel(struct qeth_channel *channel)
893{
894 int cnt;
895
d11ba0c4 896 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 897 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 898 channel->iob[cnt].data =
b3332930 899 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 900 if (channel->iob[cnt].data == NULL)
901 break;
902 channel->iob[cnt].state = BUF_STATE_FREE;
903 channel->iob[cnt].channel = channel;
904 channel->iob[cnt].callback = qeth_send_control_data_cb;
905 channel->iob[cnt].rc = 0;
906 }
907 if (cnt < QETH_CMD_BUFFER_NO) {
908 while (cnt-- > 0)
909 kfree(channel->iob[cnt].data);
910 return -ENOMEM;
911 }
912 channel->buf_no = 0;
913 channel->io_buf_no = 0;
914 atomic_set(&channel->irq_pending, 0);
915 spin_lock_init(&channel->iob_lock);
916
917 init_waitqueue_head(&channel->wait_q);
918 return 0;
919}
920
921static int qeth_set_thread_start_bit(struct qeth_card *card,
922 unsigned long thread)
923{
924 unsigned long flags;
925
926 spin_lock_irqsave(&card->thread_mask_lock, flags);
927 if (!(card->thread_allowed_mask & thread) ||
928 (card->thread_start_mask & thread)) {
929 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
930 return -EPERM;
931 }
932 card->thread_start_mask |= thread;
933 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
934 return 0;
935}
936
937void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
938{
939 unsigned long flags;
940
941 spin_lock_irqsave(&card->thread_mask_lock, flags);
942 card->thread_start_mask &= ~thread;
943 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
944 wake_up(&card->wait_q);
945}
946EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
947
948void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
949{
950 unsigned long flags;
951
952 spin_lock_irqsave(&card->thread_mask_lock, flags);
953 card->thread_running_mask &= ~thread;
954 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
955 wake_up(&card->wait_q);
956}
957EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
958
959static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
960{
961 unsigned long flags;
962 int rc = 0;
963
964 spin_lock_irqsave(&card->thread_mask_lock, flags);
965 if (card->thread_start_mask & thread) {
966 if ((card->thread_allowed_mask & thread) &&
967 !(card->thread_running_mask & thread)) {
968 rc = 1;
969 card->thread_start_mask &= ~thread;
970 card->thread_running_mask |= thread;
971 } else
972 rc = -EPERM;
973 }
974 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
975 return rc;
976}
977
978int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
979{
980 int rc = 0;
981
982 wait_event(card->wait_q,
983 (rc = __qeth_do_run_thread(card, thread)) >= 0);
984 return rc;
985}
986EXPORT_SYMBOL_GPL(qeth_do_run_thread);
987
988void qeth_schedule_recovery(struct qeth_card *card)
989{
847a50fd 990 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 991 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
992 schedule_work(&card->kernel_thread_starter);
993}
994EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
995
996static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
997{
998 int dstat, cstat;
999 char *sense;
847a50fd 1000 struct qeth_card *card;
4a71df50
FB		 1001
1002 sense = (char *) irb->ecw;
23d805b6
PO		 1003 cstat = irb->scsw.cmd.cstat;
1004 dstat = irb->scsw.cmd.dstat;
847a50fd 1005 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1006
1007 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1008 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1009 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1010 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1011 dev_warn(&cdev->dev, "The qeth device driver "
1012 "failed to recover an error on the device\n");
5113fec0 1013 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1014 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1015 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1016 16, 1, irb, 64, 1);
1017 return 1;
1018 }
1019
1020 if (dstat & DEV_STAT_UNIT_CHECK) {
1021 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1022 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1023 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1024 return 1;
1025 }
1026 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1027 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1028 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1029 return 1;
4a71df50
FB		 1030 }
1031 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1032 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1033 return 1;
1034 }
1035 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1036 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1037 return 0;
1038 }
847a50fd 1039 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1040 return 1;
1041 }
1042 return 0;
1043}
1044
1045static long __qeth_check_irb_error(struct ccw_device *cdev,
1046 unsigned long intparm, struct irb *irb)
1047{
847a50fd
CO		 1048 struct qeth_card *card;
1049
1050 card = CARD_FROM_CDEV(cdev);
1051
e95051ff 1052 if (!card || !IS_ERR(irb))
4a71df50
FB		 1053 return 0;
1054
1055 switch (PTR_ERR(irb)) {
1056 case -EIO:
74eacdb9
FB		 1057 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1058 dev_name(&cdev->dev));
847a50fd
CO		 1059 QETH_CARD_TEXT(card, 2, "ckirberr");
1060 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1061 break;
1062 case -ETIMEDOUT:
74eacdb9
FB		 1063 dev_warn(&cdev->dev, "A hardware operation timed out"
1064 " on the device\n");
847a50fd
CO		 1065 QETH_CARD_TEXT(card, 2, "ckirberr");
1066 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1067 if (intparm == QETH_RCD_PARM) {
e95051ff 1068 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1069 card->data.state = CH_STATE_DOWN;
1070 wake_up(&card->wait_q);
1071 }
1072 }
1073 break;
1074 default:
74eacdb9
FB		 1075 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1076 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1077 QETH_CARD_TEXT(card, 2, "ckirberr");
1078 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1079 }
1080 return PTR_ERR(irb);
1081}
1082
1083static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1084 struct irb *irb)
1085{
1086 int rc;
1087 int cstat, dstat;
1088 struct qeth_cmd_buffer *buffer;
1089 struct qeth_channel *channel;
1090 struct qeth_card *card;
1091 struct qeth_cmd_buffer *iob;
1092 __u8 index;
1093
4a71df50
FB		 1094 if (__qeth_check_irb_error(cdev, intparm, irb))
1095 return;
23d805b6
PO		 1096 cstat = irb->scsw.cmd.cstat;
1097 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1098
1099 card = CARD_FROM_CDEV(cdev);
1100 if (!card)
1101 return;
1102
847a50fd
CO		 1103 QETH_CARD_TEXT(card, 5, "irq");
1104
4a71df50
FB		 1105 if (card->read.ccwdev == cdev) {
1106 channel = &card->read;
847a50fd 1107 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1108 } else if (card->write.ccwdev == cdev) {
1109 channel = &card->write;
847a50fd 1110 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1111 } else {
1112 channel = &card->data;
847a50fd 1113 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1114 }
1115 atomic_set(&channel->irq_pending, 0);
1116
23d805b6 1117 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1118 channel->state = CH_STATE_STOPPED;
1119
23d805b6 1120 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1121 channel->state = CH_STATE_HALTED;
1122
1123 /*let's wake up immediately on data channel*/
1124 if ((channel == &card->data) && (intparm != 0) &&
1125 (intparm != QETH_RCD_PARM))
1126 goto out;
1127
1128 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1129 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1130 /* we don't have to handle this further */
1131 intparm = 0;
1132 }
1133 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1134 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1135 /* we don't have to handle this further */
1136 intparm = 0;
1137 }
1138 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1139 (dstat & DEV_STAT_UNIT_CHECK) ||
1140 (cstat)) {
1141 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1142 dev_warn(&channel->ccwdev->dev,
1143 "The qeth device driver failed to recover "
1144 "an error on the device\n");
1145 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1146 "0x%X dstat 0x%X\n",
1147 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1148 print_hex_dump(KERN_WARNING, "qeth: irb ",
1149 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1150 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1151 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1152 }
1153 if (intparm == QETH_RCD_PARM) {
1154 channel->state = CH_STATE_DOWN;
1155 goto out;
1156 }
1157 rc = qeth_get_problem(cdev, irb);
1158 if (rc) {
28a7e4c9 1159 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1160 qeth_schedule_recovery(card);
1161 goto out;
1162 }
1163 }
1164
1165 if (intparm == QETH_RCD_PARM) {
1166 channel->state = CH_STATE_RCD_DONE;
1167 goto out;
1168 }
1169 if (intparm) {
1170 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1171 buffer->state = BUF_STATE_PROCESSED;
1172 }
1173 if (channel == &card->data)
1174 return;
1175 if (channel == &card->read &&
1176 channel->state == CH_STATE_UP)
1177 qeth_issue_next_read(card);
1178
1179 iob = channel->iob;
1180 index = channel->buf_no;
1181 while (iob[index].state == BUF_STATE_PROCESSED) {
1182 if (iob[index].callback != NULL)
1183 iob[index].callback(channel, iob + index);
1184
1185 index = (index + 1) % QETH_CMD_BUFFER_NO;
1186 }
1187 channel->buf_no = index;
1188out:
1189 wake_up(&card->wait_q);
1190 return;
1191}
1192
b3332930 1193static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1194 struct qeth_qdio_out_buffer *buf,
b3332930 1195 enum iucv_tx_notify notification)
4a71df50 1196{
4a71df50
FB		 1197 struct sk_buff *skb;
1198
b3332930
FB		 1199 if (skb_queue_empty(&buf->skb_list))
1200 goto out;
1201 skb = skb_peek(&buf->skb_list);
1202 while (skb) {
1203 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1204 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1205 if (skb->protocol == ETH_P_AF_IUCV) {
1206 if (skb->sk) {
1207 struct iucv_sock *iucv = iucv_sk(skb->sk);
1208 iucv->sk_txnotify(skb, notification);
1209 }
1210 }
1211 if (skb_queue_is_last(&buf->skb_list, skb))
1212 skb = NULL;
1213 else
1214 skb = skb_queue_next(&buf->skb_list, skb);
1215 }
1216out:
1217 return;
1218}
1219
1220static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1221{
1222 struct sk_buff *skb;
72861ae7
EL		 1223 struct iucv_sock *iucv;
1224 int notify_general_error = 0;
1225
1226 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1227 notify_general_error = 1;
1228
1229 /* release may never happen from within CQ tasklet scope */
18af5c17 1230 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1231
b67d801f
UB		 1232 skb = skb_dequeue(&buf->skb_list);
1233 while (skb) {
b3332930
FB		 1234 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1235 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1236 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1237 if (skb->sk) {
1238 iucv = iucv_sk(skb->sk);
1239 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1240 }
1241 }
b67d801f
UB		 1242 atomic_dec(&skb->users);
1243 dev_kfree_skb_any(skb);
4a71df50
FB		 1244 skb = skb_dequeue(&buf->skb_list);
1245 }
b3332930
FB		 1246}
1247
1248static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1249 struct qeth_qdio_out_buffer *buf,
1250 enum qeth_qdio_buffer_states newbufstate)
1251{
1252 int i;
1253
1254 /* is PCI flag set on buffer? */
1255 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1256 atomic_dec(&queue->set_pci_flags_count);
1257
1258 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1259 qeth_release_skbs(buf);
1260 }
4a71df50 1261 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1262 if (buf->buffer->element[i].addr && buf->is_header[i])
1263 kmem_cache_free(qeth_core_header_cache,
1264 buf->buffer->element[i].addr);
1265 buf->is_header[i] = 0;
4a71df50
FB		 1266 buf->buffer->element[i].length = 0;
1267 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1268 buf->buffer->element[i].eflags = 0;
1269 buf->buffer->element[i].sflags = 0;
4a71df50 1270 }
3ec90878
JG		 1271 buf->buffer->element[15].eflags = 0;
1272 buf->buffer->element[15].sflags = 0;
4a71df50 1273 buf->next_element_to_fill = 0;
0da9581d
EL		 1274 atomic_set(&buf->state, newbufstate);
1275}
1276
1277static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1278{
1279 int j;
1280
1281 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1282 if (!q->bufs[j])
1283 continue;
72861ae7 1284 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1285 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1286 if (free) {
1287 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1288 q->bufs[j] = NULL;
1289 }
1290 }
4a71df50
FB		 1291}
1292
1293void qeth_clear_qdio_buffers(struct qeth_card *card)
1294{
0da9581d 1295 int i;
4a71df50 1296
847a50fd 1297 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1298 /* clear outbound buffers to free skbs */
0da9581d 1299 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1300 if (card->qdio.out_qs[i]) {
0da9581d 1301 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1302 }
0da9581d 1303 }
4a71df50
FB		 1304}
1305EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1306
1307static void qeth_free_buffer_pool(struct qeth_card *card)
1308{
1309 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1310 int i = 0;
4a71df50
FB		 1311 list_for_each_entry_safe(pool_entry, tmp,
1312 &card->qdio.init_pool.entry_list, init_list){
1313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1314 free_page((unsigned long)pool_entry->elements[i]);
1315 list_del(&pool_entry->init_list);
1316 kfree(pool_entry);
1317 }
1318}
1319
4a71df50
FB		 1320static void qeth_clean_channel(struct qeth_channel *channel)
1321{
1322 int cnt;
1323
d11ba0c4 1324 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1325 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1326 kfree(channel->iob[cnt].data);
1327}
1328
725b9c04
SO		 1329static void qeth_set_single_write_queues(struct qeth_card *card)
1330{
1331 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1332 (card->qdio.no_out_queues == 4))
1333 qeth_free_qdio_buffers(card);
1334
1335 card->qdio.no_out_queues = 1;
1336 if (card->qdio.default_out_queue != 0)
1337 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1338
1339 card->qdio.default_out_queue = 0;
1340}
1341
1342static void qeth_set_multiple_write_queues(struct qeth_card *card)
1343{
1344 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1345 (card->qdio.no_out_queues == 1)) {
1346 qeth_free_qdio_buffers(card);
1347 card->qdio.default_out_queue = 2;
1348 }
1349 card->qdio.no_out_queues = 4;
1350}
1351
1352static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1353{
4a71df50 1354 struct ccw_device *ccwdev;
2bf29df7 1355 struct channel_path_desc *chp_dsc;
4a71df50 1356
5113fec0 1357 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1358
1359 ccwdev = card->data.ccwdev;
725b9c04
SO		 1360 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1361 if (!chp_dsc)
1362 goto out;
1363
1364 card->info.func_level = 0x4100 + chp_dsc->desc;
1365 if (card->info.type == QETH_CARD_TYPE_IQD)
1366 goto out;
1367
1368 /* CHPP field bit 6 == 1 -> single queue */
1369 if ((chp_dsc->chpp & 0x02) == 0x02)
1370 qeth_set_single_write_queues(card);
1371 else
1372 qeth_set_multiple_write_queues(card);
1373out:
1374 kfree(chp_dsc);
5113fec0
UB		 1375 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1376 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1377}
1378
1379static void qeth_init_qdio_info(struct qeth_card *card)
1380{
d11ba0c4 1381 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1382 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1383 /* inbound */
1384 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1385 if (card->info.type == QETH_CARD_TYPE_IQD)
1386 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1387 else
1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1389 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1390 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1391 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1392}
1393
1394static void qeth_set_intial_options(struct qeth_card *card)
1395{
1396 card->options.route4.type = NO_ROUTER;
1397 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1398 card->options.fake_broadcast = 0;
1399 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1400 card->options.performance_stats = 0;
1401 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1402 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1403 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1404}
1405
1406static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1407{
1408 unsigned long flags;
1409 int rc = 0;
1410
1411 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1412 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1413 (u8) card->thread_start_mask,
1414 (u8) card->thread_allowed_mask,
1415 (u8) card->thread_running_mask);
1416 rc = (card->thread_start_mask & thread);
1417 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1418 return rc;
1419}
1420
1421static void qeth_start_kernel_thread(struct work_struct *work)
1422{
3f36b890 1423 struct task_struct *ts;
4a71df50
FB		 1424 struct qeth_card *card = container_of(work, struct qeth_card,
1425 kernel_thread_starter);
847a50fd 1426 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1427
1428 if (card->read.state != CH_STATE_UP &&
1429 card->write.state != CH_STATE_UP)
1430 return;
3f36b890 1431 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1432 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1433 "qeth_recover");
3f36b890
FB		 1434 if (IS_ERR(ts)) {
1435 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1436 qeth_clear_thread_running_bit(card,
1437 QETH_RECOVER_THREAD);
1438 }
1439 }
4a71df50
FB		 1440}
1441
bca51650 1442static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1443static int qeth_setup_card(struct qeth_card *card)
1444{
1445
d11ba0c4
PT		 1446 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1447 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1448
1449 card->read.state = CH_STATE_DOWN;
1450 card->write.state = CH_STATE_DOWN;
1451 card->data.state = CH_STATE_DOWN;
1452 card->state = CARD_STATE_DOWN;
1453 card->lan_online = 0;
908abbb5 1454 card->read_or_write_problem = 0;
4a71df50
FB		 1455 card->dev = NULL;
1456 spin_lock_init(&card->vlanlock);
1457 spin_lock_init(&card->mclock);
4a71df50
FB		 1458 spin_lock_init(&card->lock);
1459 spin_lock_init(&card->ip_lock);
1460 spin_lock_init(&card->thread_mask_lock);
c4949f07 1461 mutex_init(&card->conf_mutex);
9dc48ccc 1462 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1463 card->thread_start_mask = 0;
1464 card->thread_allowed_mask = 0;
1465 card->thread_running_mask = 0;
1466 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1467 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1468 INIT_LIST_HEAD(card->ip_tbd_list);
1469 INIT_LIST_HEAD(&card->cmd_waiter_list);
1470 init_waitqueue_head(&card->wait_q);
25985edc 1471 /* initial options */
4a71df50
FB		 1472 qeth_set_intial_options(card);
1473 /* IP address takeover */
1474 INIT_LIST_HEAD(&card->ipato.entries);
1475 card->ipato.enabled = 0;
1476 card->ipato.invert4 = 0;
1477 card->ipato.invert6 = 0;
1478 /* init QDIO stuff */
1479 qeth_init_qdio_info(card);
b3332930 1480 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1481 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1482 return 0;
1483}
1484
6bcac508
MS		 1485static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1486{
1487 struct qeth_card *card = container_of(slr, struct qeth_card,
1488 qeth_service_level);
0d788c7d
KDW		 1489 if (card->info.mcl_level[0])
1490 seq_printf(m, "qeth: %s firmware level %s\n",
1491 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1492}
1493
4a71df50
FB		 1494static struct qeth_card *qeth_alloc_card(void)
1495{
1496 struct qeth_card *card;
1497
d11ba0c4 1498 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1499 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1500 if (!card)
76b11f8e 1501 goto out;
d11ba0c4 1502 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1503 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1504 if (!card->ip_tbd_list) {
1505 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1506 goto out_card;
4a71df50 1507 }
76b11f8e
UB		 1508 if (qeth_setup_channel(&card->read))
1509 goto out_ip;
1510 if (qeth_setup_channel(&card->write))
1511 goto out_channel;
4a71df50 1512 card->options.layer2 = -1;
6bcac508
MS		 1513 card->qeth_service_level.seq_print = qeth_core_sl_print;
1514 register_service_level(&card->qeth_service_level);
4a71df50 1515 return card;
76b11f8e
UB		 1516
1517out_channel:
1518 qeth_clean_channel(&card->read);
1519out_ip:
1520 kfree(card->ip_tbd_list);
1521out_card:
1522 kfree(card);
1523out:
1524 return NULL;
4a71df50
FB		 1525}
1526
1527static int qeth_determine_card_type(struct qeth_card *card)
1528{
1529 int i = 0;
1530
d11ba0c4 1531 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1532
1533 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1534 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1535 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1536 if ((CARD_RDEV(card)->id.dev_type ==
1537 known_devices[i][QETH_DEV_TYPE_IND]) &&
1538 (CARD_RDEV(card)->id.dev_model ==
1539 known_devices[i][QETH_DEV_MODEL_IND])) {
1540 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1541 card->qdio.no_out_queues =
1542 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1543 card->qdio.no_in_queues = 1;
5113fec0
UB		 1544 card->info.is_multicast_different =
1545 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1546 qeth_update_from_chp_desc(card);
4a71df50
FB		 1547 return 0;
1548 }
1549 i++;
1550 }
1551 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1552 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1553 "unknown type\n");
4a71df50
FB		 1554 return -ENOENT;
1555}
1556
1557static int qeth_clear_channel(struct qeth_channel *channel)
1558{
1559 unsigned long flags;
1560 struct qeth_card *card;
1561 int rc;
1562
4a71df50 1563 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1564 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1565 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1566 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1567 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1568
1569 if (rc)
1570 return rc;
1571 rc = wait_event_interruptible_timeout(card->wait_q,
1572 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1573 if (rc == -ERESTARTSYS)
1574 return rc;
1575 if (channel->state != CH_STATE_STOPPED)
1576 return -ETIME;
1577 channel->state = CH_STATE_DOWN;
1578 return 0;
1579}
1580
1581static int qeth_halt_channel(struct qeth_channel *channel)
1582{
1583 unsigned long flags;
1584 struct qeth_card *card;
1585 int rc;
1586
4a71df50 1587 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1588 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1589 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1590 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1591 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1592
1593 if (rc)
1594 return rc;
1595 rc = wait_event_interruptible_timeout(card->wait_q,
1596 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1597 if (rc == -ERESTARTSYS)
1598 return rc;
1599 if (channel->state != CH_STATE_HALTED)
1600 return -ETIME;
1601 return 0;
1602}
1603
1604static int qeth_halt_channels(struct qeth_card *card)
1605{
1606 int rc1 = 0, rc2 = 0, rc3 = 0;
1607
847a50fd 1608 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1609 rc1 = qeth_halt_channel(&card->read);
1610 rc2 = qeth_halt_channel(&card->write);
1611 rc3 = qeth_halt_channel(&card->data);
1612 if (rc1)
1613 return rc1;
1614 if (rc2)
1615 return rc2;
1616 return rc3;
1617}
1618
1619static int qeth_clear_channels(struct qeth_card *card)
1620{
1621 int rc1 = 0, rc2 = 0, rc3 = 0;
1622
847a50fd 1623 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1624 rc1 = qeth_clear_channel(&card->read);
1625 rc2 = qeth_clear_channel(&card->write);
1626 rc3 = qeth_clear_channel(&card->data);
1627 if (rc1)
1628 return rc1;
1629 if (rc2)
1630 return rc2;
1631 return rc3;
1632}
1633
1634static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1635{
1636 int rc = 0;
1637
847a50fd 1638 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1639
1640 if (halt)
1641 rc = qeth_halt_channels(card);
1642 if (rc)
1643 return rc;
1644 return qeth_clear_channels(card);
1645}
1646
1647int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1648{
1649 int rc = 0;
1650
847a50fd 1651 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1652 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1653 QETH_QDIO_CLEANING)) {
1654 case QETH_QDIO_ESTABLISHED:
1655 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1656 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1657 QDIO_FLAG_CLEANUP_USING_HALT);
1658 else
cc961d40 1659 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1660 QDIO_FLAG_CLEANUP_USING_CLEAR);
1661 if (rc)
847a50fd 1662 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1663 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1664 break;
1665 case QETH_QDIO_CLEANING:
1666 return rc;
1667 default:
1668 break;
1669 }
1670 rc = qeth_clear_halt_card(card, use_halt);
1671 if (rc)
847a50fd 1672 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1673 card->state = CARD_STATE_DOWN;
1674 return rc;
1675}
1676EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1677
1678static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1679 int *length)
1680{
1681 struct ciw *ciw;
1682 char *rcd_buf;
1683 int ret;
1684 struct qeth_channel *channel = &card->data;
1685 unsigned long flags;
1686
1687 /*
1688 * scan for RCD command in extended SenseID data
1689 */
1690 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1691 if (!ciw || ciw->cmd == 0)
1692 return -EOPNOTSUPP;
1693 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1694 if (!rcd_buf)
1695 return -ENOMEM;
1696
1697 channel->ccw.cmd_code = ciw->cmd;
1698 channel->ccw.cda = (__u32) __pa(rcd_buf);
1699 channel->ccw.count = ciw->count;
1700 channel->ccw.flags = CCW_FLAG_SLI;
1701 channel->state = CH_STATE_RCD;
1702 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1703 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1704 QETH_RCD_PARM, LPM_ANYPATH, 0,
1705 QETH_RCD_TIMEOUT);
1706 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1707 if (!ret)
1708 wait_event(card->wait_q,
1709 (channel->state == CH_STATE_RCD_DONE ||
1710 channel->state == CH_STATE_DOWN));
1711 if (channel->state == CH_STATE_DOWN)
1712 ret = -EIO;
1713 else
1714 channel->state = CH_STATE_DOWN;
1715 if (ret) {
1716 kfree(rcd_buf);
1717 *buffer = NULL;
1718 *length = 0;
1719 } else {
1720 *length = ciw->count;
1721 *buffer = rcd_buf;
1722 }
1723 return ret;
1724}
1725
a60389ab 1726static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1727{
a60389ab 1728 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1729 card->info.chpid = prcd[30];
1730 card->info.unit_addr2 = prcd[31];
1731 card->info.cula = prcd[63];
1732 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1733 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1734}
1735
1736static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1737{
1738 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1739
e6e056ba 1740 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1741 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1742 card->info.blkt.time_total = 0;
1743 card->info.blkt.inter_packet = 0;
1744 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1745 } else {
1746 card->info.blkt.time_total = 250;
1747 card->info.blkt.inter_packet = 5;
1748 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1749 }
4a71df50
FB		 1750}
1751
1752static void qeth_init_tokens(struct qeth_card *card)
1753{
1754 card->token.issuer_rm_w = 0x00010103UL;
1755 card->token.cm_filter_w = 0x00010108UL;
1756 card->token.cm_connection_w = 0x0001010aUL;
1757 card->token.ulp_filter_w = 0x0001010bUL;
1758 card->token.ulp_connection_w = 0x0001010dUL;
1759}
1760
1761static void qeth_init_func_level(struct qeth_card *card)
1762{
5113fec0
UB		 1763 switch (card->info.type) {
1764 case QETH_CARD_TYPE_IQD:
6298263a 1765 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1766 break;
1767 case QETH_CARD_TYPE_OSD:
0132951e 1768 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1769 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1770 break;
1771 default:
1772 break;
4a71df50
FB		 1773 }
1774}
1775
4a71df50
FB		 1776static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1777 void (*idx_reply_cb)(struct qeth_channel *,
1778 struct qeth_cmd_buffer *))
1779{
1780 struct qeth_cmd_buffer *iob;
1781 unsigned long flags;
1782 int rc;
1783 struct qeth_card *card;
1784
d11ba0c4 1785 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1786 card = CARD_FROM_CDEV(channel->ccwdev);
1787 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1788 if (!iob)
1789 return -ENOMEM;
4a71df50
FB		 1790 iob->callback = idx_reply_cb;
1791 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1792 channel->ccw.count = QETH_BUFSIZE;
1793 channel->ccw.cda = (__u32) __pa(iob->data);
1794
1795 wait_event(card->wait_q,
1796 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1797 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1798 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1799 rc = ccw_device_start(channel->ccwdev,
1800 &channel->ccw, (addr_t) iob, 0, 0);
1801 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1802
1803 if (rc) {
14cc21b6 1804 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1805 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1806 atomic_set(&channel->irq_pending, 0);
1807 wake_up(&card->wait_q);
1808 return rc;
1809 }
1810 rc = wait_event_interruptible_timeout(card->wait_q,
1811 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1812 if (rc == -ERESTARTSYS)
1813 return rc;
1814 if (channel->state != CH_STATE_UP) {
1815 rc = -ETIME;
d11ba0c4 1816 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1817 qeth_clear_cmd_buffers(channel);
1818 } else
1819 rc = 0;
1820 return rc;
1821}
1822
1823static int qeth_idx_activate_channel(struct qeth_channel *channel,
1824 void (*idx_reply_cb)(struct qeth_channel *,
1825 struct qeth_cmd_buffer *))
1826{
1827 struct qeth_card *card;
1828 struct qeth_cmd_buffer *iob;
1829 unsigned long flags;
1830 __u16 temp;
1831 __u8 tmp;
1832 int rc;
f06f6f32 1833 struct ccw_dev_id temp_devid;
4a71df50
FB		 1834
1835 card = CARD_FROM_CDEV(channel->ccwdev);
1836
d11ba0c4 1837 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1838
1839 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1840 if (!iob)
1841 return -ENOMEM;
4a71df50
FB		 1842 iob->callback = idx_reply_cb;
1843 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1844 channel->ccw.count = IDX_ACTIVATE_SIZE;
1845 channel->ccw.cda = (__u32) __pa(iob->data);
1846 if (channel == &card->write) {
1847 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1848 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1849 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1850 card->seqno.trans_hdr++;
1851 } else {
1852 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1853 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1854 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1855 }
1856 tmp = ((__u8)card->info.portno) | 0x80;
1857 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1858 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1859 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1860 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1861 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1862 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1863 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1864 temp = (card->info.cula << 8) + card->info.unit_addr2;
1865 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1866
1867 wait_event(card->wait_q,
1868 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1869 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1870 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1871 rc = ccw_device_start(channel->ccwdev,
1872 &channel->ccw, (addr_t) iob, 0, 0);
1873 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1874
1875 if (rc) {
14cc21b6
FB		 1876 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1877 rc);
d11ba0c4 1878 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1879 atomic_set(&channel->irq_pending, 0);
1880 wake_up(&card->wait_q);
1881 return rc;
1882 }
1883 rc = wait_event_interruptible_timeout(card->wait_q,
1884 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1885 if (rc == -ERESTARTSYS)
1886 return rc;
1887 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1888 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1889 " failed to recover an error on the device\n");
1890 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1891 dev_name(&channel->ccwdev->dev));
d11ba0c4 1892 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1893 qeth_clear_cmd_buffers(channel);
1894 return -ETIME;
1895 }
1896 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1897}
1898
1899static int qeth_peer_func_level(int level)
1900{
1901 if ((level & 0xff) == 8)
1902 return (level & 0xff) + 0x400;
1903 if (((level >> 8) & 3) == 1)
1904 return (level & 0xff) + 0x200;
1905 return level;
1906}
1907
1908static void qeth_idx_write_cb(struct qeth_channel *channel,
1909 struct qeth_cmd_buffer *iob)
1910{
1911 struct qeth_card *card;
1912 __u16 temp;
1913
d11ba0c4 1914 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1915
1916 if (channel->state == CH_STATE_DOWN) {
1917 channel->state = CH_STATE_ACTIVATING;
1918 goto out;
1919 }
1920 card = CARD_FROM_CDEV(channel->ccwdev);
1921
1922 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1923 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1924 dev_err(&card->write.ccwdev->dev,
1925 "The adapter is used exclusively by another "
1926 "host\n");
4a71df50 1927 else
74eacdb9
FB		 1928 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1929 " negative reply\n",
1930 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1931 goto out;
1932 }
1933 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1934 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1935 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1936 "function level mismatch (sent: 0x%x, received: "
1937 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1938 card->info.func_level, temp);
4a71df50
FB		 1939 goto out;
1940 }
1941 channel->state = CH_STATE_UP;
1942out:
1943 qeth_release_buffer(channel, iob);
1944}
1945
1946static void qeth_idx_read_cb(struct qeth_channel *channel,
1947 struct qeth_cmd_buffer *iob)
1948{
1949 struct qeth_card *card;
1950 __u16 temp;
1951
d11ba0c4 1952 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1953 if (channel->state == CH_STATE_DOWN) {
1954 channel->state = CH_STATE_ACTIVATING;
1955 goto out;
1956 }
1957
1958 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1959 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1960 goto out;
1961
1962 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1963 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1964 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1965 dev_err(&card->write.ccwdev->dev,
1966 "The adapter is used exclusively by another "
1967 "host\n");
5113fec0
UB		 1968 break;
1969 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1970 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1971 dev_err(&card->read.ccwdev->dev,
1972 "Setting the device online failed because of "
01fc3e86 1973 "insufficient authorization\n");
5113fec0
UB		 1974 break;
1975 default:
74eacdb9
FB		 1976 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1977 " negative reply\n",
1978 dev_name(&card->read.ccwdev->dev));
5113fec0 1979 }
01fc3e86
UB		 1980 QETH_CARD_TEXT_(card, 2, "idxread%c",
1981 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1982 goto out;
1983 }
1984
4a71df50
FB		 1985 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1986 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1987 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1988 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1989 dev_name(&card->read.ccwdev->dev),
1990 card->info.func_level, temp);
4a71df50
FB		 1991 goto out;
1992 }
1993 memcpy(&card->token.issuer_rm_r,
1994 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1995 QETH_MPC_TOKEN_LENGTH);
1996 memcpy(&card->info.mcl_level[0],
1997 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1998 channel->state = CH_STATE_UP;
1999out:
2000 qeth_release_buffer(channel, iob);
2001}
2002
2003void qeth_prepare_control_data(struct qeth_card *card, int len,
2004 struct qeth_cmd_buffer *iob)
2005{
2006 qeth_setup_ccw(&card->write, iob->data, len);
2007 iob->callback = qeth_release_buffer;
2008
2009 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2010 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2011 card->seqno.trans_hdr++;
2012 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2013 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2014 card->seqno.pdu_hdr++;
2015 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2016 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2017 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2018}
2019EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2020
efbbc1d5
EC		 2021/**
2022 * qeth_send_control_data() - send control command to the card
2023 * @card: qeth_card structure pointer
2024 * @len: size of the command buffer
2025 * @iob: qeth_cmd_buffer pointer
2026 * @reply_cb: callback function pointer
2027 * @cb_card: pointer to the qeth_card structure
2028 * @cb_reply: pointer to the qeth_reply structure
2029 * @cb_cmd: pointer to the original iob for non-IPA
2030 * commands, or to the qeth_ipa_cmd structure
2031 * for the IPA commands.
2032 * @reply_param: private pointer passed to the callback
2033 *
2034 * Returns the value of the `return_code' field of the response
2035 * block returned from the hardware, or other error indication.
2036 * Value of zero indicates successful execution of the command.
2037 *
2038 * Callback function gets called one or more times, with cb_cmd
2039 * pointing to the response returned by the hardware. Callback
2040 * function must return non-zero if more reply blocks are expected,
2041 * and zero if the last or only reply block is received. Callback
2042 * function can get the value of the reply_param pointer from the
2043 * field 'param' of the structure qeth_reply.
2044 */
2045
4a71df50
FB		 2046int qeth_send_control_data(struct qeth_card *card, int len,
2047 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2048 int (*reply_cb)(struct qeth_card *cb_card,
2049 struct qeth_reply *cb_reply,
2050 unsigned long cb_cmd),
4a71df50
FB		 2051 void *reply_param)
2052{
2053 int rc;
2054 unsigned long flags;
2055 struct qeth_reply *reply = NULL;
7834cd5a 2056 unsigned long timeout, event_timeout;
5b54e16f 2057 struct qeth_ipa_cmd *cmd;
4a71df50 2058
847a50fd 2059 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2060
908abbb5
UB		 2061 if (card->read_or_write_problem) {
2062 qeth_release_buffer(iob->channel, iob);
2063 return -EIO;
2064 }
4a71df50
FB		 2065 reply = qeth_alloc_reply(card);
2066 if (!reply) {
4a71df50
FB		 2067 return -ENOMEM;
2068 }
2069 reply->callback = reply_cb;
2070 reply->param = reply_param;
2071 if (card->state == CARD_STATE_DOWN)
2072 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2073 else
2074 reply->seqno = card->seqno.ipa++;
2075 init_waitqueue_head(&reply->wait_q);
2076 spin_lock_irqsave(&card->lock, flags);
2077 list_add_tail(&reply->list, &card->cmd_waiter_list);
2078 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2079 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2080
2081 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2082 qeth_prepare_control_data(card, len, iob);
2083
2084 if (IS_IPA(iob->data))
7834cd5a 2085 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2086 else
7834cd5a
HC		 2087 event_timeout = QETH_TIMEOUT;
2088 timeout = jiffies + event_timeout;
4a71df50 2089
847a50fd 2090 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2091 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2092 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2093 (addr_t) iob, 0, 0);
2094 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2095 if (rc) {
74eacdb9
FB		 2096 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2097 "ccw_device_start rc = %i\n",
2098 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2099 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2100 spin_lock_irqsave(&card->lock, flags);
2101 list_del_init(&reply->list);
2102 qeth_put_reply(reply);
2103 spin_unlock_irqrestore(&card->lock, flags);
2104 qeth_release_buffer(iob->channel, iob);
2105 atomic_set(&card->write.irq_pending, 0);
2106 wake_up(&card->wait_q);
2107 return rc;
2108 }
5b54e16f
FB		 2109
2110 /* we have only one long running ipassist, since we can ensure
2111 process context of this command we can sleep */
2112 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2113 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2114 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2115 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2116 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2117 goto time_err;
2118 } else {
2119 while (!atomic_read(&reply->received)) {
2120 if (time_after(jiffies, timeout))
2121 goto time_err;
2122 cpu_relax();
6531084c 2123 }
5b54e16f
FB		 2124 }
2125
70919e23
UB		 2126 if (reply->rc == -EIO)
2127 goto error;
5b54e16f
FB		 2128 rc = reply->rc;
2129 qeth_put_reply(reply);
2130 return rc;
2131
2132time_err:
70919e23 2133 reply->rc = -ETIME;
5b54e16f
FB		 2134 spin_lock_irqsave(&reply->card->lock, flags);
2135 list_del_init(&reply->list);
2136 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2137 atomic_inc(&reply->received);
70919e23 2138error:
908abbb5
UB		 2139 atomic_set(&card->write.irq_pending, 0);
2140 qeth_release_buffer(iob->channel, iob);
2141 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2142 rc = reply->rc;
2143 qeth_put_reply(reply);
2144 return rc;
2145}
2146EXPORT_SYMBOL_GPL(qeth_send_control_data);
2147
2148static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2149 unsigned long data)
2150{
2151 struct qeth_cmd_buffer *iob;
2152
d11ba0c4 2153 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2154
2155 iob = (struct qeth_cmd_buffer *) data;
2156 memcpy(&card->token.cm_filter_r,
2157 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2158 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2159 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2160 return 0;
2161}
2162
2163static int qeth_cm_enable(struct qeth_card *card)
2164{
2165 int rc;
2166 struct qeth_cmd_buffer *iob;
2167
d11ba0c4 2168 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2169
2170 iob = qeth_wait_for_buffer(&card->write);
2171 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2172 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2173 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2174 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2175 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2176
2177 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2178 qeth_cm_enable_cb, NULL);
2179 return rc;
2180}
2181
2182static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2183 unsigned long data)
2184{
2185
2186 struct qeth_cmd_buffer *iob;
2187
d11ba0c4 2188 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2189
2190 iob = (struct qeth_cmd_buffer *) data;
2191 memcpy(&card->token.cm_connection_r,
2192 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2193 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2194 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2195 return 0;
2196}
2197
2198static int qeth_cm_setup(struct qeth_card *card)
2199{
2200 int rc;
2201 struct qeth_cmd_buffer *iob;
2202
d11ba0c4 2203 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2204
2205 iob = qeth_wait_for_buffer(&card->write);
2206 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2207 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2208 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2209 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2210 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2211 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2212 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2213 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2214 qeth_cm_setup_cb, NULL);
2215 return rc;
2216
2217}
2218
2219static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2220{
2221 switch (card->info.type) {
2222 case QETH_CARD_TYPE_UNKNOWN:
2223 return 1500;
2224 case QETH_CARD_TYPE_IQD:
2225 return card->info.max_mtu;
5113fec0 2226 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2227 switch (card->info.link_type) {
2228 case QETH_LINK_TYPE_HSTR:
2229 case QETH_LINK_TYPE_LANE_TR:
2230 return 2000;
2231 default:
fe44014a 2232 return card->options.layer2 ? 1500 : 1492;
4a71df50 2233 }
5113fec0
UB		 2234 case QETH_CARD_TYPE_OSM:
2235 case QETH_CARD_TYPE_OSX:
fe44014a 2236 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2237 default:
2238 return 1500;
2239 }
2240}
2241
4a71df50
FB		 2242static inline int qeth_get_mtu_outof_framesize(int framesize)
2243{
2244 switch (framesize) {
2245 case 0x4000:
2246 return 8192;
2247 case 0x6000:
2248 return 16384;
2249 case 0xa000:
2250 return 32768;
2251 case 0xffff:
2252 return 57344;
2253 default:
2254 return 0;
2255 }
2256}
2257
2258static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2259{
2260 switch (card->info.type) {
5113fec0
UB		 2261 case QETH_CARD_TYPE_OSD:
2262 case QETH_CARD_TYPE_OSM:
2263 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2264 case QETH_CARD_TYPE_IQD:
2265 return ((mtu >= 576) &&
9853b97b 2266 (mtu <= card->info.max_mtu));
4a71df50
FB		 2267 case QETH_CARD_TYPE_OSN:
2268 case QETH_CARD_TYPE_UNKNOWN:
2269 default:
2270 return 1;
2271 }
2272}
2273
2274static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2275 unsigned long data)
2276{
2277
2278 __u16 mtu, framesize;
2279 __u16 len;
2280 __u8 link_type;
2281 struct qeth_cmd_buffer *iob;
2282
d11ba0c4 2283 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2284
2285 iob = (struct qeth_cmd_buffer *) data;
2286 memcpy(&card->token.ulp_filter_r,
2287 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2288 QETH_MPC_TOKEN_LENGTH);
9853b97b 2289 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2290 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2291 mtu = qeth_get_mtu_outof_framesize(framesize);
2292 if (!mtu) {
2293 iob->rc = -EINVAL;
d11ba0c4 2294 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2295 return 0;
2296 }
8b2e18f6
UB		 2297 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2298 /* frame size has changed */
2299 if (card->dev &&
2300 ((card->dev->mtu == card->info.initial_mtu) ||
2301 (card->dev->mtu > mtu)))
2302 card->dev->mtu = mtu;
2303 qeth_free_qdio_buffers(card);
2304 }
4a71df50 2305 card->info.initial_mtu = mtu;
8b2e18f6 2306 card->info.max_mtu = mtu;
4a71df50
FB		 2307 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2308 } else {
9853b97b
FB		 2309 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2310 iob->data);
fe44014a
SR		 2311 card->info.initial_mtu = min(card->info.max_mtu,
2312 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2313 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2314 }
2315
2316 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2317 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2318 memcpy(&link_type,
2319 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2320 card->info.link_type = link_type;
2321 } else
2322 card->info.link_type = 0;
01fc3e86 2323 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2324 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2325 return 0;
2326}
2327
2328static int qeth_ulp_enable(struct qeth_card *card)
2329{
2330 int rc;
2331 char prot_type;
2332 struct qeth_cmd_buffer *iob;
2333
2334 /*FIXME: trace view callbacks*/
d11ba0c4 2335 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2336
2337 iob = qeth_wait_for_buffer(&card->write);
2338 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2339
2340 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2341 (__u8) card->info.portno;
2342 if (card->options.layer2)
2343 if (card->info.type == QETH_CARD_TYPE_OSN)
2344 prot_type = QETH_PROT_OSN2;
2345 else
2346 prot_type = QETH_PROT_LAYER2;
2347 else
2348 prot_type = QETH_PROT_TCPIP;
2349
2350 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2351 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2352 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2353 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2354 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2355 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2356 qeth_ulp_enable_cb, NULL);
2357 return rc;
2358
2359}
2360
2361static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2362 unsigned long data)
2363{
2364 struct qeth_cmd_buffer *iob;
2365
d11ba0c4 2366 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2367
2368 iob = (struct qeth_cmd_buffer *) data;
2369 memcpy(&card->token.ulp_connection_r,
2370 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2371 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2372 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2373 3)) {
2374 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2375 dev_err(&card->gdev->dev, "A connection could not be "
2376 "established because of an OLM limit\n");
bbb822a8 2377 iob->rc = -EMLINK;
65a1f898 2378 }
d11ba0c4 2379 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2380 return 0;
4a71df50
FB		 2381}
2382
2383static int qeth_ulp_setup(struct qeth_card *card)
2384{
2385 int rc;
2386 __u16 temp;
2387 struct qeth_cmd_buffer *iob;
2388 struct ccw_dev_id dev_id;
2389
d11ba0c4 2390 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2391
2392 iob = qeth_wait_for_buffer(&card->write);
2393 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2394
2395 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2396 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2397 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2398 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2399 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2400 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2401
2402 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2403 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2404 temp = (card->info.cula << 8) + card->info.unit_addr2;
2405 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2406 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2407 qeth_ulp_setup_cb, NULL);
2408 return rc;
2409}
2410
0da9581d
EL		 2411static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2412{
2413 int rc;
2414 struct qeth_qdio_out_buffer *newbuf;
2415
2416 rc = 0;
2417 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2418 if (!newbuf) {
2419 rc = -ENOMEM;
2420 goto out;
2421 }
d445a4e2 2422 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2423 skb_queue_head_init(&newbuf->skb_list);
2424 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2425 newbuf->q = q;
2426 newbuf->aob = NULL;
2427 newbuf->next_pending = q->bufs[bidx];
2428 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2429 q->bufs[bidx] = newbuf;
2430 if (q->bufstates) {
2431 q->bufstates[bidx].user = newbuf;
2432 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2433 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2434 QETH_CARD_TEXT_(q->card, 2, "%lx",
2435 (long) newbuf->next_pending);
2436 }
2437out:
2438 return rc;
2439}
2440
d445a4e2
SO		 2441static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2442{
2443 if (!q)
2444 return;
2445
2446 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2447 kfree(q);
2448}
2449
2450static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2451{
2452 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2453
2454 if (!q)
2455 return NULL;
2456
2457 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2458 kfree(q);
2459 return NULL;
2460 }
2461 return q;
2462}
0da9581d 2463
4a71df50
FB		 2464static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2465{
2466 int i, j;
2467
d11ba0c4 2468 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2469
2470 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2471 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2472 return 0;
2473
4601ba6c
SO		 2474 QETH_DBF_TEXT(SETUP, 2, "inq");
2475 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2476 if (!card->qdio.in_q)
2477 goto out_nomem;
4601ba6c 2478
4a71df50
FB		 2479 /* inbound buffer pool */
2480 if (qeth_alloc_buffer_pool(card))
2481 goto out_freeinq;
0da9581d 2482
4a71df50
FB		 2483 /* outbound */
2484 card->qdio.out_qs =
b3332930 2485 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2486 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2487 if (!card->qdio.out_qs)
2488 goto out_freepool;
2489 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2490 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2491 if (!card->qdio.out_qs[i])
2492 goto out_freeoutq;
d11ba0c4
PT		 2493 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2494 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2495 card->qdio.out_qs[i]->queue_no = i;
2496 /* give outbound qeth_qdio_buffers their qdio_buffers */
2497 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2498 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2499 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2500 goto out_freeoutqbufs;
4a71df50
FB		 2501 }
2502 }
0da9581d
EL		 2503
2504 /* completion */
2505 if (qeth_alloc_cq(card))
2506 goto out_freeoutq;
2507
4a71df50
FB		 2508 return 0;
2509
0da9581d
EL		 2510out_freeoutqbufs:
2511 while (j > 0) {
2512 --j;
2513 kmem_cache_free(qeth_qdio_outbuf_cache,
2514 card->qdio.out_qs[i]->bufs[j]);
2515 card->qdio.out_qs[i]->bufs[j] = NULL;
2516 }
4a71df50 2517out_freeoutq:
0da9581d 2518 while (i > 0) {
d445a4e2 2519 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2520 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2521 }
4a71df50
FB		 2522 kfree(card->qdio.out_qs);
2523 card->qdio.out_qs = NULL;
2524out_freepool:
2525 qeth_free_buffer_pool(card);
2526out_freeinq:
4601ba6c 2527 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2528 card->qdio.in_q = NULL;
2529out_nomem:
2530 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2531 return -ENOMEM;
2532}
2533
d445a4e2
SO		 2534static void qeth_free_qdio_buffers(struct qeth_card *card)
2535{
2536 int i, j;
2537
2538 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2539 QETH_QDIO_UNINITIALIZED)
2540 return;
2541
2542 qeth_free_cq(card);
2543 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2544 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2545 if (card->qdio.in_q->bufs[j].rx_skb)
2546 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2547 }
2548 qeth_free_qdio_queue(card->qdio.in_q);
2549 card->qdio.in_q = NULL;
2550 /* inbound buffer pool */
2551 qeth_free_buffer_pool(card);
2552 /* free outbound qdio_qs */
2553 if (card->qdio.out_qs) {
2554 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2555 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2556 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2557 }
2558 kfree(card->qdio.out_qs);
2559 card->qdio.out_qs = NULL;
2560 }
2561}
2562
4a71df50
FB		 2563static void qeth_create_qib_param_field(struct qeth_card *card,
2564 char *param_field)
2565{
2566
2567 param_field[0] = _ascebc['P'];
2568 param_field[1] = _ascebc['C'];
2569 param_field[2] = _ascebc['I'];
2570 param_field[3] = _ascebc['T'];
2571 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2572 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2573 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2574}
2575
2576static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2577 char *param_field)
2578{
2579 param_field[16] = _ascebc['B'];
2580 param_field[17] = _ascebc['L'];
2581 param_field[18] = _ascebc['K'];
2582 param_field[19] = _ascebc['T'];
2583 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2584 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2585 *((unsigned int *) (&param_field[28])) =
2586 card->info.blkt.inter_packet_jumbo;
2587}
2588
2589static int qeth_qdio_activate(struct qeth_card *card)
2590{
d11ba0c4 2591 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2592 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2593}
2594
2595static int qeth_dm_act(struct qeth_card *card)
2596{
2597 int rc;
2598 struct qeth_cmd_buffer *iob;
2599
d11ba0c4 2600 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2601
2602 iob = qeth_wait_for_buffer(&card->write);
2603 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2604
2605 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2606 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2607 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2608 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2609 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2610 return rc;
2611}
2612
2613static int qeth_mpc_initialize(struct qeth_card *card)
2614{
2615 int rc;
2616
d11ba0c4 2617 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2618
2619 rc = qeth_issue_next_read(card);
2620 if (rc) {
d11ba0c4 2621 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2622 return rc;
2623 }
2624 rc = qeth_cm_enable(card);
2625 if (rc) {
d11ba0c4 2626 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2627 goto out_qdio;
2628 }
2629 rc = qeth_cm_setup(card);
2630 if (rc) {
d11ba0c4 2631 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2632 goto out_qdio;
2633 }
2634 rc = qeth_ulp_enable(card);
2635 if (rc) {
d11ba0c4 2636 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2637 goto out_qdio;
2638 }
2639 rc = qeth_ulp_setup(card);
2640 if (rc) {
d11ba0c4 2641 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2642 goto out_qdio;
2643 }
2644 rc = qeth_alloc_qdio_buffers(card);
2645 if (rc) {
d11ba0c4 2646 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2647 goto out_qdio;
2648 }
2649 rc = qeth_qdio_establish(card);
2650 if (rc) {
d11ba0c4 2651 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2652 qeth_free_qdio_buffers(card);
2653 goto out_qdio;
2654 }
2655 rc = qeth_qdio_activate(card);
2656 if (rc) {
d11ba0c4 2657 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2658 goto out_qdio;
2659 }
2660 rc = qeth_dm_act(card);
2661 if (rc) {
d11ba0c4 2662 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2663 goto out_qdio;
2664 }
2665
2666 return 0;
2667out_qdio:
2668 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2669 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2670 return rc;
2671}
2672
4a71df50
FB		 2673void qeth_print_status_message(struct qeth_card *card)
2674{
2675 switch (card->info.type) {
5113fec0
UB		 2676 case QETH_CARD_TYPE_OSD:
2677 case QETH_CARD_TYPE_OSM:
2678 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2679 /* VM will use a non-zero first character
2680 * to indicate a HiperSockets like reporting
2681 * of the level OSA sets the first character to zero
2682 * */
2683 if (!card->info.mcl_level[0]) {
2684 sprintf(card->info.mcl_level, "%02x%02x",
2685 card->info.mcl_level[2],
2686 card->info.mcl_level[3]);
4a71df50
FB		 2687 break;
2688 }
2689 /* fallthrough */
2690 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2691 if ((card->info.guestlan) ||
2692 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2693 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2694 card->info.mcl_level[0]];
2695 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2696 card->info.mcl_level[1]];
2697 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2698 card->info.mcl_level[2]];
2699 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2700 card->info.mcl_level[3]];
2701 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2702 }
2703 break;
2704 default:
2705 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2706 }
239ff408
UB		 2707 dev_info(&card->gdev->dev,
2708 "Device is a%s card%s%s%s\nwith link type %s.\n",
2709 qeth_get_cardname(card),
2710 (card->info.mcl_level[0]) ? " (level: " : "",
2711 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2712 (card->info.mcl_level[0]) ? ")" : "",
2713 qeth_get_cardname_short(card));
4a71df50
FB		 2714}
2715EXPORT_SYMBOL_GPL(qeth_print_status_message);
2716
4a71df50
FB		 2717static void qeth_initialize_working_pool_list(struct qeth_card *card)
2718{
2719 struct qeth_buffer_pool_entry *entry;
2720
847a50fd 2721 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2722
2723 list_for_each_entry(entry,
2724 &card->qdio.init_pool.entry_list, init_list) {
2725 qeth_put_buffer_pool_entry(card, entry);
2726 }
2727}
2728
2729static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2730 struct qeth_card *card)
2731{
2732 struct list_head *plh;
2733 struct qeth_buffer_pool_entry *entry;
2734 int i, free;
2735 struct page *page;
2736
2737 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2738 return NULL;
2739
2740 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2741 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2742 free = 1;
2743 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2744 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2745 free = 0;
2746 break;
2747 }
2748 }
2749 if (free) {
2750 list_del_init(&entry->list);
2751 return entry;
2752 }
2753 }
2754
2755 /* no free buffer in pool so take first one and swap pages */
2756 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2757 struct qeth_buffer_pool_entry, list);
2758 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2759 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2760 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2761 if (!page) {
2762 return NULL;
2763 } else {
2764 free_page((unsigned long)entry->elements[i]);
2765 entry->elements[i] = page_address(page);
2766 if (card->options.performance_stats)
2767 card->perf_stats.sg_alloc_page_rx++;
2768 }
2769 }
2770 }
2771 list_del_init(&entry->list);
2772 return entry;
2773}
2774
2775static int qeth_init_input_buffer(struct qeth_card *card,
2776 struct qeth_qdio_buffer *buf)
2777{
2778 struct qeth_buffer_pool_entry *pool_entry;
2779 int i;
2780
b3332930
FB		 2781 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2782 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2783 if (!buf->rx_skb)
2784 return 1;
2785 }
2786
4a71df50
FB		 2787 pool_entry = qeth_find_free_buffer_pool_entry(card);
2788 if (!pool_entry)
2789 return 1;
2790
2791 /*
2792 * since the buffer is accessed only from the input_tasklet
2793 * there shouldn't be a need to synchronize; also, since we use
2794 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2795 * buffers
2796 */
4a71df50
FB		 2797
2798 buf->pool_entry = pool_entry;
2799 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2800 buf->buffer->element[i].length = PAGE_SIZE;
2801 buf->buffer->element[i].addr = pool_entry->elements[i];
2802 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2803 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2804 else
3ec90878
JG		 2805 buf->buffer->element[i].eflags = 0;
2806 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2807 }
2808 return 0;
2809}
2810
2811int qeth_init_qdio_queues(struct qeth_card *card)
2812{
2813 int i, j;
2814 int rc;
2815
d11ba0c4 2816 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2817
2818 /* inbound queue */
6d284bde
SO		 2819 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2820 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2821 qeth_initialize_working_pool_list(card);
2822 /*give only as many buffers to hardware as we have buffer pool entries*/
2823 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2824 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2825 card->qdio.in_q->next_buf_to_init =
2826 card->qdio.in_buf_pool.buf_count - 1;
2827 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2828 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2829 if (rc) {
d11ba0c4 2830 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2831 return rc;
2832 }
0da9581d
EL		 2833
2834 /* completion */
2835 rc = qeth_cq_init(card);
2836 if (rc) {
2837 return rc;
2838 }
2839
4a71df50
FB		 2840 /* outbound queue */
2841 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2842 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2843 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2844 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2845 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2846 card->qdio.out_qs[i]->bufs[j],
2847 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2848 }
2849 card->qdio.out_qs[i]->card = card;
2850 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2851 card->qdio.out_qs[i]->do_pack = 0;
2852 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2853 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2854 atomic_set(&card->qdio.out_qs[i]->state,
2855 QETH_OUT_Q_UNLOCKED);
2856 }
2857 return 0;
2858}
2859EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2860
2861static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2862{
2863 switch (link_type) {
2864 case QETH_LINK_TYPE_HSTR:
2865 return 2;
2866 default:
2867 return 1;
2868 }
2869}
2870
2871static void qeth_fill_ipacmd_header(struct qeth_card *card,
2872 struct qeth_ipa_cmd *cmd, __u8 command,
2873 enum qeth_prot_versions prot)
2874{
2875 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2876 cmd->hdr.command = command;
2877 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2878 cmd->hdr.seqno = card->seqno.ipa;
2879 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2880 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2881 if (card->options.layer2)
2882 cmd->hdr.prim_version_no = 2;
2883 else
2884 cmd->hdr.prim_version_no = 1;
2885 cmd->hdr.param_count = 1;
2886 cmd->hdr.prot_version = prot;
2887 cmd->hdr.ipa_supported = 0;
2888 cmd->hdr.ipa_enabled = 0;
2889}
2890
2891struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2892 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2893{
2894 struct qeth_cmd_buffer *iob;
2895 struct qeth_ipa_cmd *cmd;
2896
1aec42bc
TR		 2897 iob = qeth_get_buffer(&card->write);
2898 if (iob) {
2899 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2900 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2901 } else {
2902 dev_warn(&card->gdev->dev,
2903 "The qeth driver ran out of channel command buffers\n");
2904 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2905 dev_name(&card->gdev->dev));
2906 }
4a71df50
FB		 2907
2908 return iob;
2909}
2910EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2911
2912void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2913 char prot_type)
2914{
2915 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2916 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2917 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2918 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2919}
2920EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2921
efbbc1d5
EC		 2922/**
2923 * qeth_send_ipa_cmd() - send an IPA command
2924 *
2925 * See qeth_send_control_data() for explanation of the arguments.
2926 */
2927
4a71df50
FB		 2928int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2929 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2930 unsigned long),
2931 void *reply_param)
2932{
2933 int rc;
2934 char prot_type;
4a71df50 2935
847a50fd 2936 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2937
2938 if (card->options.layer2)
2939 if (card->info.type == QETH_CARD_TYPE_OSN)
2940 prot_type = QETH_PROT_OSN2;
2941 else
2942 prot_type = QETH_PROT_LAYER2;
2943 else
2944 prot_type = QETH_PROT_TCPIP;
2945 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2946 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2947 iob, reply_cb, reply_param);
908abbb5
UB		 2948 if (rc == -ETIME) {
2949 qeth_clear_ipacmd_list(card);
2950 qeth_schedule_recovery(card);
2951 }
4a71df50
FB		 2952 return rc;
2953}
2954EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2955
4a71df50
FB		 2956int qeth_send_startlan(struct qeth_card *card)
2957{
2958 int rc;
70919e23 2959 struct qeth_cmd_buffer *iob;
4a71df50 2960
d11ba0c4 2961 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2962
70919e23 2963 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2964 if (!iob)
2965 return -ENOMEM;
70919e23 2966 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2967 return rc;
2968}
2969EXPORT_SYMBOL_GPL(qeth_send_startlan);
2970
eb3fb0ba 2971static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2972 struct qeth_reply *reply, unsigned long data)
2973{
2974 struct qeth_ipa_cmd *cmd;
2975
847a50fd 2976 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2977
2978 cmd = (struct qeth_ipa_cmd *) data;
2979 if (cmd->hdr.return_code == 0)
2980 cmd->hdr.return_code =
2981 cmd->data.setadapterparms.hdr.return_code;
2982 return 0;
2983}
4a71df50
FB		 2984
2985static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2986 struct qeth_reply *reply, unsigned long data)
2987{
2988 struct qeth_ipa_cmd *cmd;
2989
847a50fd 2990 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2991
2992 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2993 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2994 card->info.link_type =
2995 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2996 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2997 }
4a71df50
FB		 2998 card->options.adp.supported_funcs =
2999 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
3000 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3001}
3002
eb3fb0ba 3003static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 3004 __u32 command, __u32 cmdlen)
3005{
3006 struct qeth_cmd_buffer *iob;
3007 struct qeth_ipa_cmd *cmd;
3008
3009 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3010 QETH_PROT_IPV4);
1aec42bc
TR		 3011 if (iob) {
3012 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3013 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3014 cmd->data.setadapterparms.hdr.command_code = command;
3015 cmd->data.setadapterparms.hdr.used_total = 1;
3016 cmd->data.setadapterparms.hdr.seq_no = 1;
3017 }
4a71df50
FB		 3018
3019 return iob;
3020}
4a71df50
FB		 3021
3022int qeth_query_setadapterparms(struct qeth_card *card)
3023{
3024 int rc;
3025 struct qeth_cmd_buffer *iob;
3026
847a50fd 3027 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3028 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3029 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3030 if (!iob)
3031 return -ENOMEM;
4a71df50
FB		 3032 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3033 return rc;
3034}
3035EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3036
1da74b1c
FB		 3037static int qeth_query_ipassists_cb(struct qeth_card *card,
3038 struct qeth_reply *reply, unsigned long data)
3039{
3040 struct qeth_ipa_cmd *cmd;
3041
3042 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3043
3044 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3045
3046 switch (cmd->hdr.return_code) {
3047 case IPA_RC_NOTSUPP:
3048 case IPA_RC_L2_UNSUPPORTED_CMD:
3049 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3050 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3051 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3052 return -0;
3053 default:
3054 if (cmd->hdr.return_code) {
3055 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3056 "rc=%d\n",
3057 dev_name(&card->gdev->dev),
3058 cmd->hdr.return_code);
3059 return 0;
3060 }
3061 }
3062
1da74b1c
FB		 3063 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3064 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3065 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3066 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3067 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3068 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3069 } else
3070 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3071 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3072 return 0;
3073}
3074
3075int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3076{
3077 int rc;
3078 struct qeth_cmd_buffer *iob;
3079
3080 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3081 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3082 if (!iob)
3083 return -ENOMEM;
1da74b1c
FB		 3084 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3085 return rc;
3086}
3087EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3088
45cbb2e4
SR		 3089static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3090 struct qeth_reply *reply, unsigned long data)
3091{
3092 struct qeth_ipa_cmd *cmd;
3093 struct qeth_switch_info *sw_info;
3094 struct qeth_query_switch_attributes *attrs;
3095
3096 QETH_CARD_TEXT(card, 2, "qswiatcb");
3097 cmd = (struct qeth_ipa_cmd *) data;
3098 sw_info = (struct qeth_switch_info *)reply->param;
3099 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3100 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3101 sw_info->capabilities = attrs->capabilities;
3102 sw_info->settings = attrs->settings;
3103 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3104 sw_info->settings);
3105 }
3106 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3107
3108 return 0;
3109}
3110
3111int qeth_query_switch_attributes(struct qeth_card *card,
3112 struct qeth_switch_info *sw_info)
3113{
3114 struct qeth_cmd_buffer *iob;
3115
3116 QETH_CARD_TEXT(card, 2, "qswiattr");
3117 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3118 return -EOPNOTSUPP;
3119 if (!netif_carrier_ok(card->dev))
3120 return -ENOMEDIUM;
3121 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3122 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3123 if (!iob)
3124 return -ENOMEM;
45cbb2e4
SR		 3125 return qeth_send_ipa_cmd(card, iob,
3126 qeth_query_switch_attributes_cb, sw_info);
3127}
3128EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3129
1da74b1c
FB		 3130static int qeth_query_setdiagass_cb(struct qeth_card *card,
3131 struct qeth_reply *reply, unsigned long data)
3132{
3133 struct qeth_ipa_cmd *cmd;
3134 __u16 rc;
3135
3136 cmd = (struct qeth_ipa_cmd *)data;
3137 rc = cmd->hdr.return_code;
3138 if (rc)
3139 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3140 else
3141 card->info.diagass_support = cmd->data.diagass.ext;
3142 return 0;
3143}
3144
3145static int qeth_query_setdiagass(struct qeth_card *card)
3146{
3147 struct qeth_cmd_buffer *iob;
3148 struct qeth_ipa_cmd *cmd;
3149
3150 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3151 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3152 if (!iob)
3153 return -ENOMEM;
1da74b1c
FB		 3154 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3155 cmd->data.diagass.subcmd_len = 16;
3156 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3157 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3158}
3159
3160static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3161{
3162 unsigned long info = get_zeroed_page(GFP_KERNEL);
3163 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3164 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3165 struct ccw_dev_id ccwid;
caf757c6 3166 int level;
1da74b1c
FB		 3167
3168 tid->chpid = card->info.chpid;
3169 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3170 tid->ssid = ccwid.ssid;
3171 tid->devno = ccwid.devno;
3172 if (!info)
3173 return;
caf757c6
HC		 3174 level = stsi(NULL, 0, 0, 0);
3175 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3176 tid->lparnr = info222->lpar_number;
caf757c6 3177 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3178 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3179 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3180 }
3181 free_page(info);
3182 return;
3183}
3184
3185static int qeth_hw_trap_cb(struct qeth_card *card,
3186 struct qeth_reply *reply, unsigned long data)
3187{
3188 struct qeth_ipa_cmd *cmd;
3189 __u16 rc;
3190
3191 cmd = (struct qeth_ipa_cmd *)data;
3192 rc = cmd->hdr.return_code;
3193 if (rc)
3194 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3195 return 0;
3196}
3197
3198int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3199{
3200 struct qeth_cmd_buffer *iob;
3201 struct qeth_ipa_cmd *cmd;
3202
3203 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3204 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3205 if (!iob)
3206 return -ENOMEM;
1da74b1c
FB		 3207 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3208 cmd->data.diagass.subcmd_len = 80;
3209 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3210 cmd->data.diagass.type = 1;
3211 cmd->data.diagass.action = action;
3212 switch (action) {
3213 case QETH_DIAGS_TRAP_ARM:
3214 cmd->data.diagass.options = 0x0003;
3215 cmd->data.diagass.ext = 0x00010000 +
3216 sizeof(struct qeth_trap_id);
3217 qeth_get_trap_id(card,
3218 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3219 break;
3220 case QETH_DIAGS_TRAP_DISARM:
3221 cmd->data.diagass.options = 0x0001;
3222 break;
3223 case QETH_DIAGS_TRAP_CAPTURE:
3224 break;
3225 }
3226 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3227}
3228EXPORT_SYMBOL_GPL(qeth_hw_trap);
3229
76b11f8e
UB		 3230int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3231 unsigned int qdio_error, const char *dbftext)
4a71df50 3232{
779e6e1c 3233 if (qdio_error) {
847a50fd 3234 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3235 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3236 buf->element[15].sflags);
38593d01 3237 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3238 buf->element[14].sflags);
38593d01 3239 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3240 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3241 card->stats.rx_dropped++;
3242 return 0;
3243 } else
3244 return 1;
4a71df50
FB		 3245 }
3246 return 0;
3247}
3248EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3249
bca51650 3250static void qeth_buffer_reclaim_work(struct work_struct *work)
b3332930
FB		 3251{
3252 struct qeth_card *card = container_of(work, struct qeth_card,
3253 buffer_reclaim_work.work);
3254
3255 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3256 qeth_queue_input_buffer(card, card->reclaim_index);
3257}
3258
4a71df50
FB		 3259void qeth_queue_input_buffer(struct qeth_card *card, int index)
3260{
3261 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3262 struct list_head *lh;
4a71df50
FB		 3263 int count;
3264 int i;
3265 int rc;
3266 int newcount = 0;
3267
4a71df50
FB		 3268 count = (index < queue->next_buf_to_init)?
3269 card->qdio.in_buf_pool.buf_count -
3270 (queue->next_buf_to_init - index) :
3271 card->qdio.in_buf_pool.buf_count -
3272 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3273 /* only requeue at a certain threshold to avoid SIGAs */
3274 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3275 for (i = queue->next_buf_to_init;
3276 i < queue->next_buf_to_init + count; ++i) {
3277 if (qeth_init_input_buffer(card,
3278 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3279 break;
3280 } else {
3281 newcount++;
3282 }
3283 }
3284
3285 if (newcount < count) {
3286 /* we are in memory shortage so we switch back to
3287 traditional skb allocation and drop packages */
4a71df50
FB		 3288 atomic_set(&card->force_alloc_skb, 3);
3289 count = newcount;
3290 } else {
4a71df50
FB		 3291 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3292 }
3293
b3332930
FB		 3294 if (!count) {
3295 i = 0;
3296 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3297 i++;
3298 if (i == card->qdio.in_buf_pool.buf_count) {
3299 QETH_CARD_TEXT(card, 2, "qsarbw");
3300 card->reclaim_index = index;
3301 schedule_delayed_work(
3302 &card->buffer_reclaim_work,
3303 QETH_RECLAIM_WORK_TIME);
3304 }
3305 return;
3306 }
3307
4a71df50
FB		 3308 /*
3309 * according to old code it should be avoided to requeue all
3310 * 128 buffers in order to benefit from PCI avoidance.
3311 * this function keeps at least one buffer (the buffer at
3312 * 'index') un-requeued -> this buffer is the first buffer that
3313 * will be requeued the next time
3314 */
3315 if (card->options.performance_stats) {
3316 card->perf_stats.inbound_do_qdio_cnt++;
3317 card->perf_stats.inbound_do_qdio_start_time =
3318 qeth_get_micros();
3319 }
779e6e1c
JG		 3320 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3321 queue->next_buf_to_init, count);
4a71df50
FB		 3322 if (card->options.performance_stats)
3323 card->perf_stats.inbound_do_qdio_time +=
3324 qeth_get_micros() -
3325 card->perf_stats.inbound_do_qdio_start_time;
3326 if (rc) {
847a50fd 3327 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3328 }
3329 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3330 QDIO_MAX_BUFFERS_PER_Q;
3331 }
3332}
3333EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3334
3335static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3336 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3337{
3ec90878 3338 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3339
847a50fd 3340 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3341 if (card->info.type == QETH_CARD_TYPE_IQD) {
3342 if (sbalf15 == 0) {
3343 qdio_err = 0;
3344 } else {
3345 qdio_err = 1;
3346 }
3347 }
76b11f8e 3348 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3349
3350 if (!qdio_err)
4a71df50 3351 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3352
3353 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3354 return QETH_SEND_ERROR_RETRY;
3355
847a50fd
CO		 3356 QETH_CARD_TEXT(card, 1, "lnkfail");
3357 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3358 (u16)qdio_err, (u8)sbalf15);
3359 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3360}
3361
3362/*
3363 * Switched to packing state if the number of used buffers on a queue
3364 * reaches a certain limit.
3365 */
3366static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3367{
3368 if (!queue->do_pack) {
3369 if (atomic_read(&queue->used_buffers)
3370 >= QETH_HIGH_WATERMARK_PACK){
3371 /* switch non-PACKING -> PACKING */
847a50fd 3372 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3373 if (queue->card->options.performance_stats)
3374 queue->card->perf_stats.sc_dp_p++;
3375 queue->do_pack = 1;
3376 }
3377 }
3378}
3379
3380/*
3381 * Switches from packing to non-packing mode. If there is a packing
3382 * buffer on the queue this buffer will be prepared to be flushed.
3383 * In that case 1 is returned to inform the caller. If no buffer
3384 * has to be flushed, zero is returned.
3385 */
3386static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3387{
3388 struct qeth_qdio_out_buffer *buffer;
3389 int flush_count = 0;
3390
3391 if (queue->do_pack) {
3392 if (atomic_read(&queue->used_buffers)
3393 <= QETH_LOW_WATERMARK_PACK) {
3394 /* switch PACKING -> non-PACKING */
847a50fd 3395 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3396 if (queue->card->options.performance_stats)
3397 queue->card->perf_stats.sc_p_dp++;
3398 queue->do_pack = 0;
3399 /* flush packing buffers */
0da9581d 3400 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3401 if ((atomic_read(&buffer->state) ==
3402 QETH_QDIO_BUF_EMPTY) &&
3403 (buffer->next_element_to_fill > 0)) {
3404 atomic_set(&buffer->state,
0da9581d 3405 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3406 flush_count++;
3407 queue->next_buf_to_fill =
3408 (queue->next_buf_to_fill + 1) %
3409 QDIO_MAX_BUFFERS_PER_Q;
3410 }
3411 }
3412 }
3413 return flush_count;
3414}
3415
0da9581d 3416
4a71df50
FB		 3417/*
3418 * Called to flush a packing buffer if no more pci flags are on the queue.
3419 * Checks if there is a packing buffer and prepares it to be flushed.
3420 * In that case returns 1, otherwise zero.
3421 */
3422static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3423{
3424 struct qeth_qdio_out_buffer *buffer;
3425
0da9581d 3426 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3427 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3428 (buffer->next_element_to_fill > 0)) {
3429 /* it's a packing buffer */
3430 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3431 queue->next_buf_to_fill =
3432 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3433 return 1;
3434 }
3435 return 0;
3436}
3437
779e6e1c
JG		 3438static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3439 int count)
4a71df50
FB		 3440{
3441 struct qeth_qdio_out_buffer *buf;
3442 int rc;
3443 int i;
3444 unsigned int qdio_flags;
3445
4a71df50 3446 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3447 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3448 buf = queue->bufs[bidx];
3ec90878
JG		 3449 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3450 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3451
0da9581d
EL		 3452 if (queue->bufstates)
3453 queue->bufstates[bidx].user = buf;
3454
4a71df50
FB		 3455 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3456 continue;
3457
3458 if (!queue->do_pack) {
3459 if ((atomic_read(&queue->used_buffers) >=
3460 (QETH_HIGH_WATERMARK_PACK -
3461 QETH_WATERMARK_PACK_FUZZ)) &&
3462 !atomic_read(&queue->set_pci_flags_count)) {
3463 /* it's likely that we'll go to packing
3464 * mode soon */
3465 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3466 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3467 }
3468 } else {
3469 if (!atomic_read(&queue->set_pci_flags_count)) {
3470 /*
3471 * there's no outstanding PCI any more, so we
3472 * have to request a PCI to be sure the the PCI
3473 * will wake at some time in the future then we
3474 * can flush packed buffers that might still be
3475 * hanging around, which can happen if no
3476 * further send was requested by the stack
3477 */
3478 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3479 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3480 }
3481 }
3482 }
3483
3e66bab3 3484 netif_trans_update(queue->card->dev);
4a71df50
FB		 3485 if (queue->card->options.performance_stats) {
3486 queue->card->perf_stats.outbound_do_qdio_cnt++;
3487 queue->card->perf_stats.outbound_do_qdio_start_time =
3488 qeth_get_micros();
3489 }
3490 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3491 if (atomic_read(&queue->set_pci_flags_count))
3492 qdio_flags |= QDIO_FLAG_PCI_OUT;
3493 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3494 queue->queue_no, index, count);
4a71df50
FB		 3495 if (queue->card->options.performance_stats)
3496 queue->card->perf_stats.outbound_do_qdio_time +=
3497 qeth_get_micros() -
3498 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3499 atomic_add(count, &queue->used_buffers);
4a71df50 3500 if (rc) {
d303b6fd
JG		 3501 queue->card->stats.tx_errors += count;
3502 /* ignore temporary SIGA errors without busy condition */
1549d13f 3503 if (rc == -ENOBUFS)
d303b6fd 3504 return;
847a50fd 3505 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3506 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3507 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3508 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3509 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3510
4a71df50
FB		 3511 /* this must not happen under normal circumstances. if it
3512 * happens something is really wrong -> recover */
3513 qeth_schedule_recovery(queue->card);
3514 return;
3515 }
4a71df50
FB		 3516 if (queue->card->options.performance_stats)
3517 queue->card->perf_stats.bufs_sent += count;
3518}
3519
3520static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3521{
3522 int index;
3523 int flush_cnt = 0;
3524 int q_was_packing = 0;
3525
3526 /*
3527 * check if weed have to switch to non-packing mode or if
3528 * we have to get a pci flag out on the queue
3529 */
3530 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3531 !atomic_read(&queue->set_pci_flags_count)) {
3532 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3533 QETH_OUT_Q_UNLOCKED) {
3534 /*
3535 * If we get in here, there was no action in
3536 * do_send_packet. So, we check if there is a
3537 * packing buffer to be flushed here.
3538 */
3539 netif_stop_queue(queue->card->dev);
3540 index = queue->next_buf_to_fill;
3541 q_was_packing = queue->do_pack;
3542 /* queue->do_pack may change */
3543 barrier();
3544 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3545 if (!flush_cnt &&
3546 !atomic_read(&queue->set_pci_flags_count))
3547 flush_cnt +=
3548 qeth_flush_buffers_on_no_pci(queue);
3549 if (queue->card->options.performance_stats &&
3550 q_was_packing)
3551 queue->card->perf_stats.bufs_sent_pack +=
3552 flush_cnt;
3553 if (flush_cnt)
779e6e1c 3554 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3555 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3556 }
3557 }
3558}
3559
a1c3ed4c
FB		 3560void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3561 unsigned long card_ptr)
3562{
3563 struct qeth_card *card = (struct qeth_card *)card_ptr;
3564
0cffef48 3565 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3566 napi_schedule(&card->napi);
3567}
3568EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3569
0da9581d
EL		 3570int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3571{
3572 int rc;
3573
3574 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3575 rc = -1;
3576 goto out;
3577 } else {
3578 if (card->options.cq == cq) {
3579 rc = 0;
3580 goto out;
3581 }
3582
3583 if (card->state != CARD_STATE_DOWN &&
3584 card->state != CARD_STATE_RECOVER) {
3585 rc = -1;
3586 goto out;
3587 }
3588
3589 qeth_free_qdio_buffers(card);
3590 card->options.cq = cq;
3591 rc = 0;
3592 }
3593out:
3594 return rc;
3595
3596}
3597EXPORT_SYMBOL_GPL(qeth_configure_cq);
3598
3599
3600static void qeth_qdio_cq_handler(struct qeth_card *card,
3601 unsigned int qdio_err,
3602 unsigned int queue, int first_element, int count) {
3603 struct qeth_qdio_q *cq = card->qdio.c_q;
3604 int i;
3605 int rc;
3606
3607 if (!qeth_is_cq(card, queue))
3608 goto out;
3609
3610 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3611 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3612 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3613
3614 if (qdio_err) {
3615 netif_stop_queue(card->dev);
3616 qeth_schedule_recovery(card);
3617 goto out;
3618 }
3619
3620 if (card->options.performance_stats) {
3621 card->perf_stats.cq_cnt++;
3622 card->perf_stats.cq_start_time = qeth_get_micros();
3623 }
3624
3625 for (i = first_element; i < first_element + count; ++i) {
3626 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3627 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3628 int e;
3629
3630 e = 0;
3631 while (buffer->element[e].addr) {
3632 unsigned long phys_aob_addr;
3633
3634 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3635 qeth_qdio_handle_aob(card, phys_aob_addr);
3636 buffer->element[e].addr = NULL;
3637 buffer->element[e].eflags = 0;
3638 buffer->element[e].sflags = 0;
3639 buffer->element[e].length = 0;
3640
3641 ++e;
3642 }
3643
3644 buffer->element[15].eflags = 0;
3645 buffer->element[15].sflags = 0;
3646 }
3647 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3648 card->qdio.c_q->next_buf_to_init,
3649 count);
3650 if (rc) {
3651 dev_warn(&card->gdev->dev,
3652 "QDIO reported an error, rc=%i\n", rc);
3653 QETH_CARD_TEXT(card, 2, "qcqherr");
3654 }
3655 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3656 + count) % QDIO_MAX_BUFFERS_PER_Q;
3657
3658 netif_wake_queue(card->dev);
3659
3660 if (card->options.performance_stats) {
3661 int delta_t = qeth_get_micros();
3662 delta_t -= card->perf_stats.cq_start_time;
3663 card->perf_stats.cq_time += delta_t;
3664 }
3665out:
3666 return;
3667}
3668
a1c3ed4c 3669void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3670 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3671 unsigned long card_ptr)
3672{
3673 struct qeth_card *card = (struct qeth_card *)card_ptr;
3674
0da9581d
EL		 3675 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3676 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3677
3678 if (qeth_is_cq(card, queue))
3679 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3680 else if (qdio_err)
a1c3ed4c 3681 qeth_schedule_recovery(card);
0da9581d
EL		 3682
3683
a1c3ed4c
FB		 3684}
3685EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3686
779e6e1c
JG		 3687void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3688 unsigned int qdio_error, int __queue, int first_element,
3689 int count, unsigned long card_ptr)
4a71df50
FB		 3690{
3691 struct qeth_card *card = (struct qeth_card *) card_ptr;
3692 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3693 struct qeth_qdio_out_buffer *buffer;
3694 int i;
3695
847a50fd 3696 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3697 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3698 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3699 netif_stop_queue(card->dev);
3700 qeth_schedule_recovery(card);
3701 return;
4a71df50
FB		 3702 }
3703 if (card->options.performance_stats) {
3704 card->perf_stats.outbound_handler_cnt++;
3705 card->perf_stats.outbound_handler_start_time =
3706 qeth_get_micros();
3707 }
3708 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3709 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3710 buffer = queue->bufs[bidx];
b67d801f 3711 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3712
3713 if (queue->bufstates &&
3714 (queue->bufstates[bidx].flags &
3715 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3716 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3717
3718 if (atomic_cmpxchg(&buffer->state,
3719 QETH_QDIO_BUF_PRIMED,
3720 QETH_QDIO_BUF_PENDING) ==
3721 QETH_QDIO_BUF_PRIMED) {
3722 qeth_notify_skbs(queue, buffer,
3723 TX_NOTIFY_PENDING);
3724 }
0da9581d
EL		 3725 buffer->aob = queue->bufstates[bidx].aob;
3726 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3727 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3728 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3729 virt_to_phys(buffer->aob));
b3332930
FB		 3730 if (qeth_init_qdio_out_buf(queue, bidx)) {
3731 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3732 qeth_schedule_recovery(card);
b3332930 3733 }
0da9581d 3734 } else {
b3332930
FB		 3735 if (card->options.cq == QETH_CQ_ENABLED) {
3736 enum iucv_tx_notify n;
3737
3738 n = qeth_compute_cq_notification(
3739 buffer->buffer->element[15].sflags, 0);
3740 qeth_notify_skbs(queue, buffer, n);
3741 }
3742
0da9581d
EL		 3743 qeth_clear_output_buffer(queue, buffer,
3744 QETH_QDIO_BUF_EMPTY);
3745 }
3746 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3747 }
3748 atomic_sub(count, &queue->used_buffers);
3749 /* check if we need to do something on this outbound queue */
3750 if (card->info.type != QETH_CARD_TYPE_IQD)
3751 qeth_check_outbound_queue(queue);
3752
3753 netif_wake_queue(queue->card->dev);
3754 if (card->options.performance_stats)
3755 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3756 card->perf_stats.outbound_handler_start_time;
3757}
3758EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3759
290b8348
SR		 3760/**
3761 * Note: Function assumes that we have 4 outbound queues.
3762 */
4a71df50
FB		 3763int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3764 int ipv, int cast_type)
3765{
d66cb37e 3766 __be16 *tci;
290b8348
SR		 3767 u8 tos;
3768
290b8348
SR		 3769 if (cast_type && card->info.is_multicast_different)
3770 return card->info.is_multicast_different &
3771 (card->qdio.no_out_queues - 1);
3772
3773 switch (card->qdio.do_prio_queueing) {
3774 case QETH_PRIO_Q_ING_TOS:
3775 case QETH_PRIO_Q_ING_PREC:
3776 switch (ipv) {
3777 case 4:
3778 tos = ipv4_get_dsfield(ip_hdr(skb));
3779 break;
3780 case 6:
3781 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3782 break;
3783 default:
3784 return card->qdio.default_out_queue;
4a71df50 3785 }
290b8348
SR		 3786 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
3787 return ~tos >> 6 & 3;
3788 if (tos & IPTOS_MINCOST)
3789 return 3;
3790 if (tos & IPTOS_RELIABILITY)
3791 return 2;
3792 if (tos & IPTOS_THROUGHPUT)
3793 return 1;
3794 if (tos & IPTOS_LOWDELAY)
3795 return 0;
d66cb37e
SR		 3796 break;
3797 case QETH_PRIO_Q_ING_SKB:
3798 if (skb->priority > 5)
3799 return 0;
3800 return ~skb->priority >> 1 & 3;
3801 case QETH_PRIO_Q_ING_VLAN:
3802 tci = &((struct ethhdr *)skb->data)->h_proto;
3803 if (*tci == ETH_P_8021Q)
3804 return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
3805 break;
4a71df50 3806 default:
290b8348 3807 break;
4a71df50 3808 }
290b8348 3809 return card->qdio.default_out_queue;
4a71df50
FB		 3810}
3811EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3812
2863c613
EC		 3813/**
3814 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3815 * @skb: SKB address
3816 *
3817 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3818 * fragmented part of the SKB. Returns zero for linear SKB.
3819 */
271648b4
FB		 3820int qeth_get_elements_for_frags(struct sk_buff *skb)
3821{
2863c613 3822 int cnt, elements = 0;
271648b4
FB		 3823
3824 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3825 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3826
3827 elements += qeth_get_elements_for_range(
3828 (addr_t)skb_frag_address(frag),
3829 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3830 }
3831 return elements;
3832}
3833EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3834
2863c613
EC		 3835/**
3836 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3837 * @card: qeth card structure, to check max. elems.
3838 * @skb: SKB address
3839 * @extra_elems: extra elems needed, to check against max.
3840 *
3841 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3842 * skb data, including linear part and fragments. Checks if the result plus
3843 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3844 * Note: extra_elems is not included in the returned result.
3845 */
065cc782 3846int qeth_get_elements_no(struct qeth_card *card,
2863c613 3847 struct sk_buff *skb, int extra_elems)
4a71df50 3848{
2863c613
EC		 3849 int elements = qeth_get_elements_for_range(
3850 (addr_t)skb->data,
3851 (addr_t)skb->data + skb_headlen(skb)) +
3852 qeth_get_elements_for_frags(skb);
4a71df50 3853
2863c613 3854 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3855 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3856 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3857 elements + extra_elems, skb->len);
4a71df50
FB		 3858 return 0;
3859 }
2863c613 3860 return elements;
4a71df50
FB		 3861}
3862EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3863
d4ae1f5e 3864int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3865{
3866 int hroom, inpage, rest;
3867
3868 if (((unsigned long)skb->data & PAGE_MASK) !=
3869 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3870 hroom = skb_headroom(skb);
3871 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3872 rest = len - inpage;
3873 if (rest > hroom)
3874 return 1;
2863c613 3875 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3876 skb->data -= rest;
d4ae1f5e
SR		 3877 skb->tail -= rest;
3878 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3879 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3880 }
3881 return 0;
3882}
3883EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3884
f90b744e 3885static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3886 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3887 int offset)
4a71df50 3888{
2863c613 3889 int length = skb_headlen(skb);
4a71df50
FB		 3890 int length_here;
3891 int element;
3892 char *data;
51aa165c
FB		 3893 int first_lap, cnt;
3894 struct skb_frag_struct *frag;
4a71df50
FB		 3895
3896 element = *next_element_to_fill;
3897 data = skb->data;
3898 first_lap = (is_tso == 0 ? 1 : 0);
3899
683d718a
FB		 3900 if (offset >= 0) {
3901 data = skb->data + offset;
e1f03ae8 3902 length -= offset;
683d718a
FB		 3903 first_lap = 0;
3904 }
3905
4a71df50
FB		 3906 while (length > 0) {
3907 /* length_here is the remaining amount of data in this page */
3908 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3909 if (length < length_here)
3910 length_here = length;
3911
3912 buffer->element[element].addr = data;
3913 buffer->element[element].length = length_here;
3914 length -= length_here;
3915 if (!length) {
3916 if (first_lap)
51aa165c 3917 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3918 buffer->element[element].eflags =
3919 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3920 else
3ec90878 3921 buffer->element[element].eflags = 0;
4a71df50 3922 else
3ec90878
JG		 3923 buffer->element[element].eflags =
3924 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3925 } else {
3926 if (first_lap)
3ec90878
JG		 3927 buffer->element[element].eflags =
3928 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3929 else
3ec90878
JG		 3930 buffer->element[element].eflags =
3931 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3932 }
3933 data += length_here;
3934 element++;
3935 first_lap = 0;
3936 }
51aa165c
FB		 3937
3938 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3939 frag = &skb_shinfo(skb)->frags[cnt];
271648b4
FB		 3940 data = (char *)page_to_phys(skb_frag_page(frag)) +
3941 frag->page_offset;
3942 length = frag->size;
3943 while (length > 0) {
3944 length_here = PAGE_SIZE -
3945 ((unsigned long) data % PAGE_SIZE);
3946 if (length < length_here)
3947 length_here = length;
3948
3949 buffer->element[element].addr = data;
3950 buffer->element[element].length = length_here;
3951 buffer->element[element].eflags =
3952 SBAL_EFLAGS_MIDDLE_FRAG;
3953 length -= length_here;
3954 data += length_here;
3955 element++;
3956 }
51aa165c
FB		 3957 }
3958
3ec90878
JG		 3959 if (buffer->element[element - 1].eflags)
3960 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3961 *next_element_to_fill = element;
3962}
3963
f90b744e 3964static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3965 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3966 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3967{
3968 struct qdio_buffer *buffer;
4a71df50
FB		 3969 int flush_cnt = 0, hdr_len, large_send = 0;
3970
4a71df50
FB		 3971 buffer = buf->buffer;
3972 atomic_inc(&skb->users);
3973 skb_queue_tail(&buf->skb_list, skb);
3974
4a71df50 3975 /*check first on TSO ....*/
683d718a 3976 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3977 int element = buf->next_element_to_fill;
3978
683d718a
FB		 3979 hdr_len = sizeof(struct qeth_hdr_tso) +
3980 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3981 /*fill first buffer entry only with header information */
3982 buffer->element[element].addr = skb->data;
3983 buffer->element[element].length = hdr_len;
3ec90878 3984 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3985 buf->next_element_to_fill++;
3986 skb->data += hdr_len;
3987 skb->len -= hdr_len;
3988 large_send = 1;
3989 }
683d718a
FB		 3990
3991 if (offset >= 0) {
3992 int element = buf->next_element_to_fill;
3993 buffer->element[element].addr = hdr;
3994 buffer->element[element].length = sizeof(struct qeth_hdr) +
3995 hd_len;
3ec90878 3996 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3997 buf->is_header[element] = 1;
3998 buf->next_element_to_fill++;
3999 }
4000
51aa165c
FB		 4001 __qeth_fill_buffer(skb, buffer, large_send,
4002 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 4003
4004 if (!queue->do_pack) {
847a50fd 4005 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 4006 /* set state to PRIMED -> will be flushed */
4007 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4008 flush_cnt = 1;
4009 } else {
847a50fd 4010 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4011 if (queue->card->options.performance_stats)
4012 queue->card->perf_stats.skbs_sent_pack++;
4013 if (buf->next_element_to_fill >=
4014 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4015 /*
4016 * packed buffer if full -> set state PRIMED
4017 * -> will be flushed
4018 */
4019 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4020 flush_cnt = 1;
4021 }
4022 }
4023 return flush_cnt;
4024}
4025
4026int qeth_do_send_packet_fast(struct qeth_card *card,
4027 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
4028 struct qeth_hdr *hdr, int elements_needed,
64ef8957 4029 int offset, int hd_len)
4a71df50
FB		 4030{
4031 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 4032 int index;
4033
4a71df50
FB		 4034 /* spin until we get the queue ... */
4035 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4036 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4037 /* ... now we've got the queue */
4038 index = queue->next_buf_to_fill;
0da9581d 4039 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4040 /*
4041 * check if buffer is empty to make sure that we do not 'overtake'
4042 * ourselves and try to fill a buffer that is already primed
4043 */
4044 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4045 goto out;
64ef8957 4046 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 4047 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 4048 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 4049 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4050 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 4051 return 0;
4052out:
4053 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4054 return -EBUSY;
4055}
4056EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4057
4058int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4059 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 4060 int elements_needed)
4a71df50
FB		 4061{
4062 struct qeth_qdio_out_buffer *buffer;
4063 int start_index;
4064 int flush_count = 0;
4065 int do_pack = 0;
4066 int tmp;
4067 int rc = 0;
4068
4a71df50
FB		 4069 /* spin until we get the queue ... */
4070 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4071 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4072 start_index = queue->next_buf_to_fill;
0da9581d 4073 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4074 /*
4075 * check if buffer is empty to make sure that we do not 'overtake'
4076 * ourselves and try to fill a buffer that is already primed
4077 */
4078 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4079 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4080 return -EBUSY;
4081 }
4082 /* check if we need to switch packing state of this queue */
4083 qeth_switch_to_packing_if_needed(queue);
4084 if (queue->do_pack) {
4085 do_pack = 1;
64ef8957
FB		 4086 /* does packet fit in current buffer? */
4087 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4088 buffer->next_element_to_fill) < elements_needed) {
4089 /* ... no -> set state PRIMED */
4090 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4091 flush_count++;
4092 queue->next_buf_to_fill =
4093 (queue->next_buf_to_fill + 1) %
4094 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4095 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4096 /* we did a step forward, so check buffer state
4097 * again */
4098 if (atomic_read(&buffer->state) !=
4099 QETH_QDIO_BUF_EMPTY) {
4100 qeth_flush_buffers(queue, start_index,
779e6e1c 4101 flush_count);
64ef8957 4102 atomic_set(&queue->state,
4a71df50 4103 QETH_OUT_Q_UNLOCKED);
64ef8957 4104 return -EBUSY;
4a71df50
FB		 4105 }
4106 }
4107 }
64ef8957 4108 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 4109 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4110 QDIO_MAX_BUFFERS_PER_Q;
4111 flush_count += tmp;
4a71df50 4112 if (flush_count)
779e6e1c 4113 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4114 else if (!atomic_read(&queue->set_pci_flags_count))
4115 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4116 /*
4117 * queue->state will go from LOCKED -> UNLOCKED or from
4118 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4119 * (switch packing state or flush buffer to get another pci flag out).
4120 * In that case we will enter this loop
4121 */
4122 while (atomic_dec_return(&queue->state)) {
4123 flush_count = 0;
4124 start_index = queue->next_buf_to_fill;
4125 /* check if we can go back to non-packing state */
4126 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4127 /*
4128 * check if we need to flush a packing buffer to get a pci
4129 * flag out on the queue
4130 */
4131 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4132 flush_count += qeth_flush_buffers_on_no_pci(queue);
4133 if (flush_count)
779e6e1c 4134 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4135 }
4136 /* at this point the queue is UNLOCKED again */
4137 if (queue->card->options.performance_stats && do_pack)
4138 queue->card->perf_stats.bufs_sent_pack += flush_count;
4139
4140 return rc;
4141}
4142EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4143
4144static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4145 struct qeth_reply *reply, unsigned long data)
4146{
4147 struct qeth_ipa_cmd *cmd;
4148 struct qeth_ipacmd_setadpparms *setparms;
4149
847a50fd 4150 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4151
4152 cmd = (struct qeth_ipa_cmd *) data;
4153 setparms = &(cmd->data.setadapterparms);
4154
4155 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4156 if (cmd->hdr.return_code) {
8a593148 4157 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4158 setparms->data.mode = SET_PROMISC_MODE_OFF;
4159 }
4160 card->info.promisc_mode = setparms->data.mode;
4161 return 0;
4162}
4163
4164void qeth_setadp_promisc_mode(struct qeth_card *card)
4165{
4166 enum qeth_ipa_promisc_modes mode;
4167 struct net_device *dev = card->dev;
4168 struct qeth_cmd_buffer *iob;
4169 struct qeth_ipa_cmd *cmd;
4170
847a50fd 4171 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4172
4173 if (((dev->flags & IFF_PROMISC) &&
4174 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4175 (!(dev->flags & IFF_PROMISC) &&
4176 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4177 return;
4178 mode = SET_PROMISC_MODE_OFF;
4179 if (dev->flags & IFF_PROMISC)
4180 mode = SET_PROMISC_MODE_ON;
847a50fd 4181 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4182
4183 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4184 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4185 if (!iob)
4186 return;
4a71df50
FB		 4187 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4188 cmd->data.setadapterparms.data.mode = mode;
4189 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4190}
4191EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4192
4193int qeth_change_mtu(struct net_device *dev, int new_mtu)
4194{
4195 struct qeth_card *card;
4196 char dbf_text[15];
4197
509e2562 4198 card = dev->ml_priv;
4a71df50 4199
847a50fd 4200 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4201 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4202 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 4203
4204 if (new_mtu < 64)
4205 return -EINVAL;
4206 if (new_mtu > 65535)
4207 return -EINVAL;
4208 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4209 (!qeth_mtu_is_valid(card, new_mtu)))
4210 return -EINVAL;
4211 dev->mtu = new_mtu;
4212 return 0;
4213}
4214EXPORT_SYMBOL_GPL(qeth_change_mtu);
4215
4216struct net_device_stats *qeth_get_stats(struct net_device *dev)
4217{
4218 struct qeth_card *card;
4219
509e2562 4220 card = dev->ml_priv;
4a71df50 4221
847a50fd 4222 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4223
4224 return &card->stats;
4225}
4226EXPORT_SYMBOL_GPL(qeth_get_stats);
4227
4228static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4229 struct qeth_reply *reply, unsigned long data)
4230{
4231 struct qeth_ipa_cmd *cmd;
4232
847a50fd 4233 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4234
4235 cmd = (struct qeth_ipa_cmd *) data;
4236 if (!card->options.layer2 ||
4237 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4238 memcpy(card->dev->dev_addr,
4239 &cmd->data.setadapterparms.data.change_addr.addr,
4240 OSA_ADDR_LEN);
4241 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4242 }
4243 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4244 return 0;
4245}
4246
4247int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4248{
4249 int rc;
4250 struct qeth_cmd_buffer *iob;
4251 struct qeth_ipa_cmd *cmd;
4252
847a50fd 4253 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4254
4255 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4256 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4257 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4258 if (!iob)
4259 return -ENOMEM;
4a71df50
FB		 4260 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4261 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4262 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4263 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4264 card->dev->dev_addr, OSA_ADDR_LEN);
4265 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4266 NULL);
4267 return rc;
4268}
4269EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4270
d64ecc22
EL		 4271static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4272 struct qeth_reply *reply, unsigned long data)
4273{
4274 struct qeth_ipa_cmd *cmd;
4275 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4276 int fallback = *(int *)reply->param;
d64ecc22 4277
847a50fd 4278 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4279
4280 cmd = (struct qeth_ipa_cmd *) data;
4281 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4282 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4283 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4284 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4285 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4286 if (cmd->data.setadapterparms.hdr.return_code !=
4287 SET_ACCESS_CTRL_RC_SUCCESS)
4288 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4289 card->gdev->dev.kobj.name,
4290 access_ctrl_req->subcmd_code,
4291 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4292 switch (cmd->data.setadapterparms.hdr.return_code) {
4293 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4294 if (card->options.isolation == ISOLATION_MODE_NONE) {
4295 dev_info(&card->gdev->dev,
4296 "QDIO data connection isolation is deactivated\n");
4297 } else {
4298 dev_info(&card->gdev->dev,
4299 "QDIO data connection isolation is activated\n");
4300 }
d64ecc22 4301 break;
0f54761d
SR		 4302 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4303 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4304 "deactivated\n", dev_name(&card->gdev->dev));
4305 if (fallback)
4306 card->options.isolation = card->options.prev_isolation;
4307 break;
4308 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4309 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4310 " activated\n", dev_name(&card->gdev->dev));
4311 if (fallback)
4312 card->options.isolation = card->options.prev_isolation;
4313 break;
d64ecc22 4314 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4315 dev_err(&card->gdev->dev, "Adapter does not "
4316 "support QDIO data connection isolation\n");
d64ecc22 4317 break;
d64ecc22 4318 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4319 dev_err(&card->gdev->dev,
4320 "Adapter is dedicated. "
4321 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4322 if (fallback)
4323 card->options.isolation = card->options.prev_isolation;
d64ecc22 4324 break;
d64ecc22 4325 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4326 dev_err(&card->gdev->dev,
4327 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4328 if (fallback)
4329 card->options.isolation = card->options.prev_isolation;
4330 break;
4331 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4332 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4333 "support reflective relay mode\n");
4334 if (fallback)
4335 card->options.isolation = card->options.prev_isolation;
4336 break;
4337 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4338 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4339 "enabled at the adjacent switch port");
4340 if (fallback)
4341 card->options.isolation = card->options.prev_isolation;
4342 break;
4343 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4344 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4345 "at the adjacent switch failed\n");
d64ecc22 4346 break;
d64ecc22 4347 default:
d64ecc22 4348 /* this should never happen */
0f54761d
SR		 4349 if (fallback)
4350 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4351 break;
4352 }
d64ecc22 4353 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4354 return 0;
d64ecc22
EL		 4355}
4356
4357static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4358 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4359{
4360 int rc;
4361 struct qeth_cmd_buffer *iob;
4362 struct qeth_ipa_cmd *cmd;
4363 struct qeth_set_access_ctrl *access_ctrl_req;
4364
847a50fd 4365 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4366
4367 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4368 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4369
4370 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4371 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4372 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4373 if (!iob)
4374 return -ENOMEM;
d64ecc22
EL		 4375 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4376 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4377 access_ctrl_req->subcmd_code = isolation;
4378
4379 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4380 &fallback);
d64ecc22
EL		 4381 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4382 return rc;
4383}
4384
0f54761d 4385int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4386{
4387 int rc = 0;
4388
847a50fd 4389 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4390
5113fec0
UB		 4391 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4392 card->info.type == QETH_CARD_TYPE_OSX) &&
4393 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4394 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4395 card->options.isolation, fallback);
d64ecc22
EL		 4396 if (rc) {
4397 QETH_DBF_MESSAGE(3,
5113fec0 4398 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4399 card->gdev->dev.kobj.name,
4400 rc);
0f54761d 4401 rc = -EOPNOTSUPP;
d64ecc22
EL		 4402 }
4403 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4404 card->options.isolation = ISOLATION_MODE_NONE;
4405
4406 dev_err(&card->gdev->dev, "Adapter does not "
4407 "support QDIO data connection isolation\n");
4408 rc = -EOPNOTSUPP;
4409 }
4410 return rc;
4411}
4412EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4413
4a71df50
FB		 4414void qeth_tx_timeout(struct net_device *dev)
4415{
4416 struct qeth_card *card;
4417
509e2562 4418 card = dev->ml_priv;
847a50fd 4419 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4420 card->stats.tx_errors++;
4421 qeth_schedule_recovery(card);
4422}
4423EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4424
4425int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4426{
509e2562 4427 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4428 int rc = 0;
4429
4430 switch (regnum) {
4431 case MII_BMCR: /* Basic mode control register */
4432 rc = BMCR_FULLDPLX;
4433 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4434 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4435 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4436 rc |= BMCR_SPEED100;
4437 break;
4438 case MII_BMSR: /* Basic mode status register */
4439 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4440 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4441 BMSR_100BASE4;
4442 break;
4443 case MII_PHYSID1: /* PHYS ID 1 */
4444 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4445 dev->dev_addr[2];
4446 rc = (rc >> 5) & 0xFFFF;
4447 break;
4448 case MII_PHYSID2: /* PHYS ID 2 */
4449 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4450 break;
4451 case MII_ADVERTISE: /* Advertisement control reg */
4452 rc = ADVERTISE_ALL;
4453 break;
4454 case MII_LPA: /* Link partner ability reg */
4455 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4456 LPA_100BASE4 | LPA_LPACK;
4457 break;
4458 case MII_EXPANSION: /* Expansion register */
4459 break;
4460 case MII_DCOUNTER: /* disconnect counter */
4461 break;
4462 case MII_FCSCOUNTER: /* false carrier counter */
4463 break;
4464 case MII_NWAYTEST: /* N-way auto-neg test register */
4465 break;
4466 case MII_RERRCOUNTER: /* rx error counter */
4467 rc = card->stats.rx_errors;
4468 break;
4469 case MII_SREVISION: /* silicon revision */
4470 break;
4471 case MII_RESV1: /* reserved 1 */
4472 break;
4473 case MII_LBRERROR: /* loopback, rx, bypass error */
4474 break;
4475 case MII_PHYADDR: /* physical address */
4476 break;
4477 case MII_RESV2: /* reserved 2 */
4478 break;
4479 case MII_TPISTATUS: /* TPI status for 10mbps */
4480 break;
4481 case MII_NCONFIG: /* network interface config */
4482 break;
4483 default:
4484 break;
4485 }
4486 return rc;
4487}
4488EXPORT_SYMBOL_GPL(qeth_mdio_read);
4489
4490static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4491 struct qeth_cmd_buffer *iob, int len,
4492 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4493 unsigned long),
4494 void *reply_param)
4495{
4496 u16 s1, s2;
4497
847a50fd 4498 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4499
4500 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4501 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4502 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4503 /* adjust PDU length fields in IPA_PDU_HEADER */
4504 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4505 s2 = (u32) len;
4506 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4507 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4508 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4509 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4510 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4511 reply_cb, reply_param);
4512}
4513
4514static int qeth_snmp_command_cb(struct qeth_card *card,
4515 struct qeth_reply *reply, unsigned long sdata)
4516{
4517 struct qeth_ipa_cmd *cmd;
4518 struct qeth_arp_query_info *qinfo;
4519 struct qeth_snmp_cmd *snmp;
4520 unsigned char *data;
4521 __u16 data_len;
4522
847a50fd 4523 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4524
4525 cmd = (struct qeth_ipa_cmd *) sdata;
4526 data = (unsigned char *)((char *)cmd - reply->offset);
4527 qinfo = (struct qeth_arp_query_info *) reply->param;
4528 snmp = &cmd->data.setadapterparms.data.snmp;
4529
4530 if (cmd->hdr.return_code) {
8a593148 4531 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4532 return 0;
4533 }
4534 if (cmd->data.setadapterparms.hdr.return_code) {
4535 cmd->hdr.return_code =
4536 cmd->data.setadapterparms.hdr.return_code;
8a593148 4537 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4538 return 0;
4539 }
4540 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4541 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4542 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4543 else
4544 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4545
4546 /* check if there is enough room in userspace */
4547 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4548 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4549 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4550 return 0;
4551 }
847a50fd 4552 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4553 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4554 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4555 cmd->data.setadapterparms.hdr.seq_no);
4556 /*copy entries to user buffer*/
4557 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4558 memcpy(qinfo->udata + qinfo->udata_offset,
4559 (char *)snmp,
4560 data_len + offsetof(struct qeth_snmp_cmd, data));
4561 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4562 } else {
4563 memcpy(qinfo->udata + qinfo->udata_offset,
4564 (char *)&snmp->request, data_len);
4565 }
4566 qinfo->udata_offset += data_len;
4567 /* check if all replies received ... */
847a50fd 4568 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4569 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4570 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4571 cmd->data.setadapterparms.hdr.seq_no);
4572 if (cmd->data.setadapterparms.hdr.seq_no <
4573 cmd->data.setadapterparms.hdr.used_total)
4574 return 1;
4575 return 0;
4576}
4577
4578int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4579{
4580 struct qeth_cmd_buffer *iob;
4581 struct qeth_ipa_cmd *cmd;
4582 struct qeth_snmp_ureq *ureq;
6fb392b1 4583 unsigned int req_len;
4a71df50
FB		 4584 struct qeth_arp_query_info qinfo = {0, };
4585 int rc = 0;
4586
847a50fd 4587 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4588
4589 if (card->info.guestlan)
4590 return -EOPNOTSUPP;
4591
4592 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4593 (!card->options.layer2)) {
4a71df50
FB		 4594 return -EOPNOTSUPP;
4595 }
4596 /* skip 4 bytes (data_len struct member) to get req_len */
4597 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4598 return -EFAULT;
6fb392b1
UB		 4599 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4600 sizeof(struct qeth_ipacmd_hdr) -
4601 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4602 return -EINVAL;
4986f3f0
JL		 4603 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4604 if (IS_ERR(ureq)) {
847a50fd 4605 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4606 return PTR_ERR(ureq);
4a71df50
FB		 4607 }
4608 qinfo.udata_len = ureq->hdr.data_len;
4609 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4610 if (!qinfo.udata) {
4611 kfree(ureq);
4612 return -ENOMEM;
4613 }
4614 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4615
4616 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4617 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4618 if (!iob) {
4619 rc = -ENOMEM;
4620 goto out;
4621 }
4a71df50
FB		 4622 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4623 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4624 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4625 qeth_snmp_command_cb, (void *)&qinfo);
4626 if (rc)
14cc21b6 4627 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4628 QETH_CARD_IFNAME(card), rc);
4629 else {
4630 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4631 rc = -EFAULT;
4632 }
1aec42bc 4633out:
4a71df50
FB		 4634 kfree(ureq);
4635 kfree(qinfo.udata);
4636 return rc;
4637}
4638EXPORT_SYMBOL_GPL(qeth_snmp_command);
4639
c3ab96f3
FB		 4640static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4641 struct qeth_reply *reply, unsigned long data)
4642{
4643 struct qeth_ipa_cmd *cmd;
4644 struct qeth_qoat_priv *priv;
4645 char *resdata;
4646 int resdatalen;
4647
4648 QETH_CARD_TEXT(card, 3, "qoatcb");
4649
4650 cmd = (struct qeth_ipa_cmd *)data;
4651 priv = (struct qeth_qoat_priv *)reply->param;
4652 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4653 resdata = (char *)data + 28;
4654
4655 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4656 cmd->hdr.return_code = IPA_RC_FFFF;
4657 return 0;
4658 }
4659
4660 memcpy((priv->buffer + priv->response_len), resdata,
4661 resdatalen);
4662 priv->response_len += resdatalen;
4663
4664 if (cmd->data.setadapterparms.hdr.seq_no <
4665 cmd->data.setadapterparms.hdr.used_total)
4666 return 1;
4667 return 0;
4668}
4669
4670int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4671{
4672 int rc = 0;
4673 struct qeth_cmd_buffer *iob;
4674 struct qeth_ipa_cmd *cmd;
4675 struct qeth_query_oat *oat_req;
4676 struct qeth_query_oat_data oat_data;
4677 struct qeth_qoat_priv priv;
4678 void __user *tmp;
4679
4680 QETH_CARD_TEXT(card, 3, "qoatcmd");
4681
4682 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4683 rc = -EOPNOTSUPP;
4684 goto out;
4685 }
4686
4687 if (copy_from_user(&oat_data, udata,
4688 sizeof(struct qeth_query_oat_data))) {
4689 rc = -EFAULT;
4690 goto out;
4691 }
4692
4693 priv.buffer_len = oat_data.buffer_len;
4694 priv.response_len = 0;
4695 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4696 if (!priv.buffer) {
4697 rc = -ENOMEM;
4698 goto out;
4699 }
4700
4701 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4702 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4703 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4704 if (!iob) {
4705 rc = -ENOMEM;
4706 goto out_free;
4707 }
c3ab96f3
FB		 4708 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4709 oat_req = &cmd->data.setadapterparms.data.query_oat;
4710 oat_req->subcmd_code = oat_data.command;
4711
4712 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4713 &priv);
4714 if (!rc) {
4715 if (is_compat_task())
4716 tmp = compat_ptr(oat_data.ptr);
4717 else
4718 tmp = (void __user *)(unsigned long)oat_data.ptr;
4719
4720 if (copy_to_user(tmp, priv.buffer,
4721 priv.response_len)) {
4722 rc = -EFAULT;
4723 goto out_free;
4724 }
4725
4726 oat_data.response_len = priv.response_len;
4727
4728 if (copy_to_user(udata, &oat_data,
4729 sizeof(struct qeth_query_oat_data)))
4730 rc = -EFAULT;
4731 } else
4732 if (rc == IPA_RC_FFFF)
4733 rc = -EFAULT;
4734
4735out_free:
4736 kfree(priv.buffer);
4737out:
4738 return rc;
4739}
4740EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4741
e71e4072
HC		 4742static int qeth_query_card_info_cb(struct qeth_card *card,
4743 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4744{
4745 struct qeth_ipa_cmd *cmd;
4746 struct qeth_query_card_info *card_info;
4747 struct carrier_info *carrier_info;
4748
4749 QETH_CARD_TEXT(card, 2, "qcrdincb");
4750 carrier_info = (struct carrier_info *)reply->param;
4751 cmd = (struct qeth_ipa_cmd *)data;
4752 card_info = &cmd->data.setadapterparms.data.card_info;
4753 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4754 carrier_info->card_type = card_info->card_type;
4755 carrier_info->port_mode = card_info->port_mode;
4756 carrier_info->port_speed = card_info->port_speed;
4757 }
4758
4759 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4760 return 0;
4761}
4762
bca51650 4763static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4764 struct carrier_info *carrier_info)
4765{
4766 struct qeth_cmd_buffer *iob;
4767
4768 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4769 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4770 return -EOPNOTSUPP;
4771 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4772 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4773 if (!iob)
4774 return -ENOMEM;
02d5cb5b
EC		 4775 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4776 (void *)carrier_info);
4777}
02d5cb5b 4778
4a71df50
FB		 4779static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4780{
4781 switch (card->info.type) {
4782 case QETH_CARD_TYPE_IQD:
4783 return 2;
4784 default:
4785 return 0;
4786 }
4787}
4788
d0ff1f52
UB		 4789static void qeth_determine_capabilities(struct qeth_card *card)
4790{
4791 int rc;
4792 int length;
4793 char *prcd;
4794 struct ccw_device *ddev;
4795 int ddev_offline = 0;
4796
4797 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4798 ddev = CARD_DDEV(card);
4799 if (!ddev->online) {
4800 ddev_offline = 1;
4801 rc = ccw_device_set_online(ddev);
4802 if (rc) {
4803 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4804 goto out;
4805 }
4806 }
4807
4808 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4809 if (rc) {
4810 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4811 dev_name(&card->gdev->dev), rc);
4812 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4813 goto out_offline;
4814 }
4815 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4816 if (ddev_offline)
4817 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4818 kfree(prcd);
4819
4820 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4821 if (rc)
4822 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4823
0da9581d
EL		 4824 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4825 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4826 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4827 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4828 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4829 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4830 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4831 dev_info(&card->gdev->dev,
4832 "Completion Queueing supported\n");
4833 } else {
4834 card->options.cq = QETH_CQ_NOTAVAILABLE;
4835 }
4836
4837
d0ff1f52
UB		 4838out_offline:
4839 if (ddev_offline == 1)
4840 ccw_device_set_offline(ddev);
4841out:
4842 return;
4843}
4844
0da9581d
EL		 4845static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4846 struct qdio_buffer **in_sbal_ptrs,
4847 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4848 int i;
4849
4850 if (card->options.cq == QETH_CQ_ENABLED) {
4851 int offset = QDIO_MAX_BUFFERS_PER_Q *
4852 (card->qdio.no_in_queues - 1);
4853 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4854 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4855 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4856 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4857 }
4858
4859 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4860 }
4861}
4862
4a71df50
FB		 4863static int qeth_qdio_establish(struct qeth_card *card)
4864{
4865 struct qdio_initialize init_data;
4866 char *qib_param_field;
4867 struct qdio_buffer **in_sbal_ptrs;
104ea556 4868 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4869 struct qdio_buffer **out_sbal_ptrs;
4870 int i, j, k;
4871 int rc = 0;
4872
d11ba0c4 4873 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4874
4875 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4876 GFP_KERNEL);
104ea556 4877 if (!qib_param_field) {
4878 rc = -ENOMEM;
4879 goto out_free_nothing;
4880 }
4a71df50
FB		 4881
4882 qeth_create_qib_param_field(card, qib_param_field);
4883 qeth_create_qib_param_field_blkt(card, qib_param_field);
4884
b3332930 4885 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4886 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4887 GFP_KERNEL);
4888 if (!in_sbal_ptrs) {
104ea556 4889 rc = -ENOMEM;
4890 goto out_free_qib_param;
4a71df50 4891 }
0da9581d 4892 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4893 in_sbal_ptrs[i] = (struct qdio_buffer *)
4894 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4895 }
4a71df50 4896
0da9581d
EL		 4897 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4898 GFP_KERNEL);
104ea556 4899 if (!queue_start_poll) {
4900 rc = -ENOMEM;
4901 goto out_free_in_sbals;
4902 }
0da9581d 4903 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4904 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4905
4906 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4907
4a71df50 4908 out_sbal_ptrs =
b3332930 4909 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4910 sizeof(void *), GFP_KERNEL);
4911 if (!out_sbal_ptrs) {
104ea556 4912 rc = -ENOMEM;
4913 goto out_free_queue_start_poll;
4a71df50
FB		 4914 }
4915 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4916 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4917 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4918 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4919 }
4920
4921 memset(&init_data, 0, sizeof(struct qdio_initialize));
4922 init_data.cdev = CARD_DDEV(card);
4923 init_data.q_format = qeth_get_qdio_q_format(card);
4924 init_data.qib_param_field_format = 0;
4925 init_data.qib_param_field = qib_param_field;
0da9581d 4926 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4927 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4928 init_data.input_handler = card->discipline->input_handler;
4929 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4930 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4931 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4932 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4933 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4934 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4935 init_data.scan_threshold =
0fa81cd4 4936 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4937
4938 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4939 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4940 rc = qdio_allocate(&init_data);
4941 if (rc) {
4942 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4943 goto out;
4944 }
4945 rc = qdio_establish(&init_data);
4946 if (rc) {
4a71df50 4947 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4948 qdio_free(CARD_DDEV(card));
4949 }
4a71df50 4950 }
0da9581d
EL		 4951
4952 switch (card->options.cq) {
4953 case QETH_CQ_ENABLED:
4954 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4955 break;
4956 case QETH_CQ_DISABLED:
4957 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4958 break;
4959 default:
4960 break;
4961 }
cc961d40 4962out:
4a71df50 4963 kfree(out_sbal_ptrs);
104ea556 4964out_free_queue_start_poll:
4965 kfree(queue_start_poll);
4966out_free_in_sbals:
4a71df50 4967 kfree(in_sbal_ptrs);
104ea556 4968out_free_qib_param:
4a71df50 4969 kfree(qib_param_field);
104ea556 4970out_free_nothing:
4a71df50
FB		 4971 return rc;
4972}
4973
4974static void qeth_core_free_card(struct qeth_card *card)
4975{
4976
d11ba0c4
PT		 4977 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4978 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4979 qeth_clean_channel(&card->read);
4980 qeth_clean_channel(&card->write);
4981 if (card->dev)
4982 free_netdev(card->dev);
4983 kfree(card->ip_tbd_list);
4984 qeth_free_qdio_buffers(card);
6bcac508 4985 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4986 kfree(card);
4987}
4988
395672e0
SR		 4989void qeth_trace_features(struct qeth_card *card)
4990{
4991 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 4992 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
4993 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
4994 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
4995 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
4996 sizeof(card->info.diagass_support));
395672e0
SR		 4997}
4998EXPORT_SYMBOL_GPL(qeth_trace_features);
4999
4a71df50 5000static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5001 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5002 .driver_info = QETH_CARD_TYPE_OSD},
5003 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5004 .driver_info = QETH_CARD_TYPE_IQD},
5005 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5006 .driver_info = QETH_CARD_TYPE_OSN},
5007 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5008 .driver_info = QETH_CARD_TYPE_OSM},
5009 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5010 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5011 {},
5012};
5013MODULE_DEVICE_TABLE(ccw, qeth_ids);
5014
5015static struct ccw_driver qeth_ccw_driver = {
3bda058b 5016 .driver = {
3e70b3b8 5017 .owner = THIS_MODULE,
3bda058b
SO		 5018 .name = "qeth",
5019 },
4a71df50
FB		 5020 .ids = qeth_ids,
5021 .probe = ccwgroup_probe_ccwdev,
5022 .remove = ccwgroup_remove_ccwdev,
5023};
5024
4a71df50
FB		 5025int qeth_core_hardsetup_card(struct qeth_card *card)
5026{
6ebb7f8d 5027 int retries = 3;
4a71df50
FB		 5028 int rc;
5029
d11ba0c4 5030 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5031 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5032 qeth_update_from_chp_desc(card);
4a71df50 5033retry:
6ebb7f8d 5034 if (retries < 3)
74eacdb9
FB		 5035 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5036 dev_name(&card->gdev->dev));
22ae2790 5037 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5038 ccw_device_set_offline(CARD_DDEV(card));
5039 ccw_device_set_offline(CARD_WDEV(card));
5040 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5041 qdio_free(CARD_DDEV(card));
aa909224
UB		 5042 rc = ccw_device_set_online(CARD_RDEV(card));
5043 if (rc)
5044 goto retriable;
5045 rc = ccw_device_set_online(CARD_WDEV(card));
5046 if (rc)
5047 goto retriable;
5048 rc = ccw_device_set_online(CARD_DDEV(card));
5049 if (rc)
5050 goto retriable;
aa909224 5051retriable:
4a71df50 5052 if (rc == -ERESTARTSYS) {
d11ba0c4 5053 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5054 return rc;
5055 } else if (rc) {
d11ba0c4 5056 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5057 if (--retries < 0)
4a71df50
FB		 5058 goto out;
5059 else
5060 goto retry;
5061 }
d0ff1f52 5062 qeth_determine_capabilities(card);
4a71df50
FB		 5063 qeth_init_tokens(card);
5064 qeth_init_func_level(card);
5065 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5066 if (rc == -ERESTARTSYS) {
d11ba0c4 5067 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5068 return rc;
5069 } else if (rc) {
d11ba0c4 5070 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5071 if (--retries < 0)
5072 goto out;
5073 else
5074 goto retry;
5075 }
5076 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5077 if (rc == -ERESTARTSYS) {
d11ba0c4 5078 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5079 return rc;
5080 } else if (rc) {
d11ba0c4 5081 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5082 if (--retries < 0)
5083 goto out;
5084 else
5085 goto retry;
5086 }
908abbb5 5087 card->read_or_write_problem = 0;
4a71df50
FB		 5088 rc = qeth_mpc_initialize(card);
5089 if (rc) {
d11ba0c4 5090 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5091 goto out;
5092 }
1da74b1c
FB		 5093
5094 card->options.ipa4.supported_funcs = 0;
4d7def2a 5095 card->options.ipa6.supported_funcs = 0;
1da74b1c 5096 card->options.adp.supported_funcs = 0;
b4d72c08 5097 card->options.sbp.supported_funcs = 0;
1da74b1c 5098 card->info.diagass_support = 0;
1aec42bc
TR		 5099 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5100 if (rc == -ENOMEM)
5101 goto out;
5102 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5103 rc = qeth_query_setadapterparms(card);
5104 if (rc < 0) {
5105 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5106 goto out;
5107 }
5108 }
5109 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5110 rc = qeth_query_setdiagass(card);
5111 if (rc < 0) {
5112 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
5113 goto out;
5114 }
5115 }
4a71df50
FB		 5116 return 0;
5117out:
74eacdb9
FB		 5118 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5119 "an error on the device\n");
5120 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5121 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5122 return rc;
5123}
5124EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5125
b3332930
FB		 5126static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
5127 struct qdio_buffer_element *element,
4a71df50
FB		 5128 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
5129{
5130 struct page *page = virt_to_page(element->addr);
5131 if (*pskb == NULL) {
b3332930
FB		 5132 if (qethbuffer->rx_skb) {
5133 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
5134 *pskb = qethbuffer->rx_skb;
5135 qethbuffer->rx_skb = NULL;
5136 } else {
5137 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5138 if (!(*pskb))
5139 return -ENOMEM;
5140 }
5141
4a71df50 5142 skb_reserve(*pskb, ETH_HLEN);
b3332930 5143 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 5144 memcpy(skb_put(*pskb, data_len), element->addr + offset,
5145 data_len);
5146 } else {
5147 get_page(page);
b3332930
FB		 5148 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
5149 element->addr + offset, QETH_RX_PULL_LEN);
5150 skb_fill_page_desc(*pskb, *pfrag, page,
5151 offset + QETH_RX_PULL_LEN,
5152 data_len - QETH_RX_PULL_LEN);
5153 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5154 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5155 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5156 (*pfrag)++;
5157 }
5158 } else {
5159 get_page(page);
5160 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5161 (*pskb)->data_len += data_len;
5162 (*pskb)->len += data_len;
5163 (*pskb)->truesize += data_len;
5164 (*pfrag)++;
5165 }
0da9581d
EL		 5166
5167
4a71df50
FB		 5168 return 0;
5169}
5170
bca51650
TR		 5171static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5172{
5173 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5174}
5175
4a71df50 5176struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5177 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5178 struct qdio_buffer_element **__element, int *__offset,
5179 struct qeth_hdr **hdr)
5180{
5181 struct qdio_buffer_element *element = *__element;
b3332930 5182 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5183 int offset = *__offset;
5184 struct sk_buff *skb = NULL;
76b11f8e 5185 int skb_len = 0;
4a71df50
FB		 5186 void *data_ptr;
5187 int data_len;
5188 int headroom = 0;
5189 int use_rx_sg = 0;
5190 int frag = 0;
5191
4a71df50
FB		 5192 /* qeth_hdr must not cross element boundaries */
5193 if (element->length < offset + sizeof(struct qeth_hdr)) {
5194 if (qeth_is_last_sbale(element))
5195 return NULL;
5196 element++;
5197 offset = 0;
5198 if (element->length < sizeof(struct qeth_hdr))
5199 return NULL;
5200 }
5201 *hdr = element->addr + offset;
5202
5203 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5204 switch ((*hdr)->hdr.l2.id) {
5205 case QETH_HEADER_TYPE_LAYER2:
5206 skb_len = (*hdr)->hdr.l2.pkt_length;
5207 break;
5208 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5209 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5210 headroom = ETH_HLEN;
76b11f8e
UB		 5211 break;
5212 case QETH_HEADER_TYPE_OSN:
5213 skb_len = (*hdr)->hdr.osn.pdu_length;
5214 headroom = sizeof(struct qeth_hdr);
5215 break;
5216 default:
5217 break;
4a71df50
FB		 5218 }
5219
5220 if (!skb_len)
5221 return NULL;
5222
b3332930
FB		 5223 if (((skb_len >= card->options.rx_sg_cb) &&
5224 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5225 (!atomic_read(&card->force_alloc_skb))) ||
5226 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5227 use_rx_sg = 1;
5228 } else {
5229 skb = dev_alloc_skb(skb_len + headroom);
5230 if (!skb)
5231 goto no_mem;
5232 if (headroom)
5233 skb_reserve(skb, headroom);
5234 }
5235
5236 data_ptr = element->addr + offset;
5237 while (skb_len) {
5238 data_len = min(skb_len, (int)(element->length - offset));
5239 if (data_len) {
5240 if (use_rx_sg) {
b3332930
FB		 5241 if (qeth_create_skb_frag(qethbuffer, element,
5242 &skb, offset, &frag, data_len))
4a71df50
FB		 5243 goto no_mem;
5244 } else {
5245 memcpy(skb_put(skb, data_len), data_ptr,
5246 data_len);
5247 }
5248 }
5249 skb_len -= data_len;
5250 if (skb_len) {
5251 if (qeth_is_last_sbale(element)) {
847a50fd 5252 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5253 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5254 dev_kfree_skb_any(skb);
5255 card->stats.rx_errors++;
5256 return NULL;
5257 }
5258 element++;
5259 offset = 0;
5260 data_ptr = element->addr;
5261 } else {
5262 offset += data_len;
5263 }
5264 }
5265 *__element = element;
5266 *__offset = offset;
5267 if (use_rx_sg && card->options.performance_stats) {
5268 card->perf_stats.sg_skbs_rx++;
5269 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5270 }
5271 return skb;
5272no_mem:
5273 if (net_ratelimit()) {
847a50fd 5274 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5275 }
5276 card->stats.rx_dropped++;
5277 return NULL;
5278}
5279EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5280
4d7def2a
TR		 5281static int qeth_setassparms_cb(struct qeth_card *card,
5282 struct qeth_reply *reply, unsigned long data)
5283{
5284 struct qeth_ipa_cmd *cmd;
5285
5286 QETH_CARD_TEXT(card, 4, "defadpcb");
5287
5288 cmd = (struct qeth_ipa_cmd *) data;
5289 if (cmd->hdr.return_code == 0) {
5290 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5291 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5292 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5293 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5294 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5295 }
5296 if (cmd->data.setassparms.hdr.assist_no == IPA_INBOUND_CHECKSUM &&
5297 cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
5298 card->info.csum_mask = cmd->data.setassparms.data.flags_32bit;
5299 QETH_CARD_TEXT_(card, 3, "csum:%d", card->info.csum_mask);
5300 }
5301 if (cmd->data.setassparms.hdr.assist_no == IPA_OUTBOUND_CHECKSUM &&
5302 cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
5303 card->info.tx_csum_mask =
5304 cmd->data.setassparms.data.flags_32bit;
5305 QETH_CARD_TEXT_(card, 3, "tcsu:%d", card->info.tx_csum_mask);
5306 }
5307
5308 return 0;
5309}
5310
b475e316
TR		 5311struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5312 enum qeth_ipa_funcs ipa_func,
5313 __u16 cmd_code, __u16 len,
5314 enum qeth_prot_versions prot)
4d7def2a
TR		 5315{
5316 struct qeth_cmd_buffer *iob;
5317 struct qeth_ipa_cmd *cmd;
5318
5319 QETH_CARD_TEXT(card, 4, "getasscm");
5320 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5321
5322 if (iob) {
5323 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5324 cmd->data.setassparms.hdr.assist_no = ipa_func;
5325 cmd->data.setassparms.hdr.length = 8 + len;
5326 cmd->data.setassparms.hdr.command_code = cmd_code;
5327 cmd->data.setassparms.hdr.return_code = 0;
5328 cmd->data.setassparms.hdr.seq_no = 0;
5329 }
5330
5331 return iob;
5332}
b475e316 5333EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5334
5335int qeth_send_setassparms(struct qeth_card *card,
5336 struct qeth_cmd_buffer *iob, __u16 len, long data,
5337 int (*reply_cb)(struct qeth_card *,
5338 struct qeth_reply *, unsigned long),
5339 void *reply_param)
5340{
5341 int rc;
5342 struct qeth_ipa_cmd *cmd;
5343
5344 QETH_CARD_TEXT(card, 4, "sendassp");
5345
5346 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5347 if (len <= sizeof(__u32))
5348 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5349 else /* (len > sizeof(__u32)) */
5350 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5351
5352 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5353 return rc;
5354}
5355EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5356
5357int qeth_send_simple_setassparms(struct qeth_card *card,
5358 enum qeth_ipa_funcs ipa_func,
5359 __u16 cmd_code, long data)
5360{
5361 int rc;
5362 int length = 0;
5363 struct qeth_cmd_buffer *iob;
5364
5365 QETH_CARD_TEXT(card, 4, "simassp4");
5366 if (data)
5367 length = sizeof(__u32);
5368 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5369 length, QETH_PROT_IPV4);
5370 if (!iob)
5371 return -ENOMEM;
5372 rc = qeth_send_setassparms(card, iob, length, data,
5373 qeth_setassparms_cb, NULL);
5374 return rc;
5375}
5376EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5377
4a71df50
FB		 5378static void qeth_unregister_dbf_views(void)
5379{
d11ba0c4
PT		 5380 int x;
5381 for (x = 0; x < QETH_DBF_INFOS; x++) {
5382 debug_unregister(qeth_dbf[x].id);
5383 qeth_dbf[x].id = NULL;
5384 }
4a71df50
FB		 5385}
5386
8e96c51c 5387void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5388{
5389 char dbf_txt_buf[32];
345aa66e 5390 va_list args;
cd023216 5391
8e6a8285 5392 if (!debug_level_enabled(id, level))
cd023216 5393 return;
345aa66e
PT		 5394 va_start(args, fmt);
5395 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5396 va_end(args);
8e96c51c 5397 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5398}
5399EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5400
4a71df50
FB		 5401static int qeth_register_dbf_views(void)
5402{
d11ba0c4
PT		 5403 int ret;
5404 int x;
5405
5406 for (x = 0; x < QETH_DBF_INFOS; x++) {
5407 /* register the areas */
5408 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5409 qeth_dbf[x].pages,
5410 qeth_dbf[x].areas,
5411 qeth_dbf[x].len);
5412 if (qeth_dbf[x].id == NULL) {
5413 qeth_unregister_dbf_views();
5414 return -ENOMEM;
5415 }
4a71df50 5416
d11ba0c4
PT		 5417 /* register a view */
5418 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5419 if (ret) {
5420 qeth_unregister_dbf_views();
5421 return ret;
5422 }
4a71df50 5423
d11ba0c4
PT		 5424 /* set a passing level */
5425 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5426 }
4a71df50
FB		 5427
5428 return 0;
5429}
5430
5431int qeth_core_load_discipline(struct qeth_card *card,
5432 enum qeth_discipline_id discipline)
5433{
5434 int rc = 0;
2022e00c 5435 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5436 switch (discipline) {
5437 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5438 card->discipline = try_then_request_module(
5439 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5440 break;
5441 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5442 card->discipline = try_then_request_module(
5443 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5444 break;
5445 }
c041f2d4 5446 if (!card->discipline) {
74eacdb9
FB		 5447 dev_err(&card->gdev->dev, "There is no kernel module to "
5448 "support discipline %d\n", discipline);
4a71df50
FB		 5449 rc = -EINVAL;
5450 }
2022e00c 5451 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5452 return rc;
5453}
5454
5455void qeth_core_free_discipline(struct qeth_card *card)
5456{
5457 if (card->options.layer2)
c041f2d4 5458 symbol_put(qeth_l2_discipline);
4a71df50 5459 else
c041f2d4
SO		 5460 symbol_put(qeth_l3_discipline);
5461 card->discipline = NULL;
4a71df50
FB		 5462}
5463
b7169c51
SO		 5464static const struct device_type qeth_generic_devtype = {
5465 .name = "qeth_generic",
5466 .groups = qeth_generic_attr_groups,
5467};
5468static const struct device_type qeth_osn_devtype = {
5469 .name = "qeth_osn",
5470 .groups = qeth_osn_attr_groups,
5471};
5472
819dc537
SR		 5473#define DBF_NAME_LEN 20
5474
5475struct qeth_dbf_entry {
5476 char dbf_name[DBF_NAME_LEN];
5477 debug_info_t *dbf_info;
5478 struct list_head dbf_list;
5479};
5480
5481static LIST_HEAD(qeth_dbf_list);
5482static DEFINE_MUTEX(qeth_dbf_list_mutex);
5483
5484static debug_info_t *qeth_get_dbf_entry(char *name)
5485{
5486 struct qeth_dbf_entry *entry;
5487 debug_info_t *rc = NULL;
5488
5489 mutex_lock(&qeth_dbf_list_mutex);
5490 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5491 if (strcmp(entry->dbf_name, name) == 0) {
5492 rc = entry->dbf_info;
5493 break;
5494 }
5495 }
5496 mutex_unlock(&qeth_dbf_list_mutex);
5497 return rc;
5498}
5499
5500static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5501{
5502 struct qeth_dbf_entry *new_entry;
5503
5504 card->debug = debug_register(name, 2, 1, 8);
5505 if (!card->debug) {
5506 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5507 goto err;
5508 }
5509 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5510 goto err_dbg;
5511 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5512 if (!new_entry)
5513 goto err_dbg;
5514 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5515 new_entry->dbf_info = card->debug;
5516 mutex_lock(&qeth_dbf_list_mutex);
5517 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5518 mutex_unlock(&qeth_dbf_list_mutex);
5519
5520 return 0;
5521
5522err_dbg:
5523 debug_unregister(card->debug);
5524err:
5525 return -ENOMEM;
5526}
5527
5528static void qeth_clear_dbf_list(void)
5529{
5530 struct qeth_dbf_entry *entry, *tmp;
5531
5532 mutex_lock(&qeth_dbf_list_mutex);
5533 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5534 list_del(&entry->dbf_list);
5535 debug_unregister(entry->dbf_info);
5536 kfree(entry);
5537 }
5538 mutex_unlock(&qeth_dbf_list_mutex);
5539}
5540
4a71df50
FB		 5541static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5542{
5543 struct qeth_card *card;
5544 struct device *dev;
5545 int rc;
5546 unsigned long flags;
819dc537 5547 char dbf_name[DBF_NAME_LEN];
4a71df50 5548
d11ba0c4 5549 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5550
5551 dev = &gdev->dev;
5552 if (!get_device(dev))
5553 return -ENODEV;
5554
2a0217d5 5555 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5556
5557 card = qeth_alloc_card();
5558 if (!card) {
d11ba0c4 5559 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5560 rc = -ENOMEM;
5561 goto err_dev;
5562 }
af039068
CO		 5563
5564 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5565 dev_name(&gdev->dev));
819dc537 5566 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5567 if (!card->debug) {
819dc537
SR		 5568 rc = qeth_add_dbf_entry(card, dbf_name);
5569 if (rc)
5570 goto err_card;
af039068 5571 }
af039068 5572
4a71df50
FB		 5573 card->read.ccwdev = gdev->cdev[0];
5574 card->write.ccwdev = gdev->cdev[1];
5575 card->data.ccwdev = gdev->cdev[2];
5576 dev_set_drvdata(&gdev->dev, card);
5577 card->gdev = gdev;
5578 gdev->cdev[0]->handler = qeth_irq;
5579 gdev->cdev[1]->handler = qeth_irq;
5580 gdev->cdev[2]->handler = qeth_irq;
5581
5582 rc = qeth_determine_card_type(card);
5583 if (rc) {
d11ba0c4 5584 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5585 goto err_card;
4a71df50
FB		 5586 }
5587 rc = qeth_setup_card(card);
5588 if (rc) {
d11ba0c4 5589 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5590 goto err_card;
4a71df50
FB		 5591 }
5592
5113fec0 5593 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5594 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5595 else
b7169c51
SO		 5596 gdev->dev.type = &qeth_generic_devtype;
5597
5113fec0
UB		 5598 switch (card->info.type) {
5599 case QETH_CARD_TYPE_OSN:
5600 case QETH_CARD_TYPE_OSM:
4a71df50 5601 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5602 if (rc)
819dc537 5603 goto err_card;
c041f2d4 5604 rc = card->discipline->setup(card->gdev);
4a71df50 5605 if (rc)
5113fec0
UB		 5606 goto err_disc;
5607 case QETH_CARD_TYPE_OSD:
5608 case QETH_CARD_TYPE_OSX:
5609 default:
5610 break;
4a71df50
FB		 5611 }
5612
5613 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5614 list_add_tail(&card->list, &qeth_core_card_list.list);
5615 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5616
5617 qeth_determine_capabilities(card);
4a71df50
FB		 5618 return 0;
5619
5113fec0
UB		 5620err_disc:
5621 qeth_core_free_discipline(card);
4a71df50
FB		 5622err_card:
5623 qeth_core_free_card(card);
5624err_dev:
5625 put_device(dev);
5626 return rc;
5627}
5628
5629static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5630{
5631 unsigned long flags;
5632 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5633
28a7e4c9 5634 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5635
c041f2d4
SO		 5636 if (card->discipline) {
5637 card->discipline->remove(gdev);
9dc48ccc
UB		 5638 qeth_core_free_discipline(card);
5639 }
5640
4a71df50
FB		 5641 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5642 list_del(&card->list);
5643 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5644 qeth_core_free_card(card);
5645 dev_set_drvdata(&gdev->dev, NULL);
5646 put_device(&gdev->dev);
5647 return;
5648}
5649
5650static int qeth_core_set_online(struct ccwgroup_device *gdev)
5651{
5652 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5653 int rc = 0;
5654 int def_discipline;
5655
c041f2d4 5656 if (!card->discipline) {
4a71df50
FB		 5657 if (card->info.type == QETH_CARD_TYPE_IQD)
5658 def_discipline = QETH_DISCIPLINE_LAYER3;
5659 else
5660 def_discipline = QETH_DISCIPLINE_LAYER2;
5661 rc = qeth_core_load_discipline(card, def_discipline);
5662 if (rc)
5663 goto err;
c041f2d4 5664 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5665 if (rc)
5666 goto err;
5667 }
c041f2d4 5668 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5669err:
5670 return rc;
5671}
5672
5673static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5674{
5675 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5676 return card->discipline->set_offline(gdev);
4a71df50
FB		 5677}
5678
5679static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5680{
5681 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5682 if (card->discipline && card->discipline->shutdown)
5683 card->discipline->shutdown(gdev);
4a71df50
FB		 5684}
5685
bbcfcdc8
FB		 5686static int qeth_core_prepare(struct ccwgroup_device *gdev)
5687{
5688 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5689 if (card->discipline && card->discipline->prepare)
5690 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5691 return 0;
5692}
5693
5694static void qeth_core_complete(struct ccwgroup_device *gdev)
5695{
5696 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5697 if (card->discipline && card->discipline->complete)
5698 card->discipline->complete(gdev);
bbcfcdc8
FB		 5699}
5700
5701static int qeth_core_freeze(struct ccwgroup_device *gdev)
5702{
5703 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5704 if (card->discipline && card->discipline->freeze)
5705 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5706 return 0;
5707}
5708
5709static int qeth_core_thaw(struct ccwgroup_device *gdev)
5710{
5711 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5712 if (card->discipline && card->discipline->thaw)
5713 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5714 return 0;
5715}
5716
5717static int qeth_core_restore(struct ccwgroup_device *gdev)
5718{
5719 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5720 if (card->discipline && card->discipline->restore)
5721 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5722 return 0;
5723}
5724
4a71df50 5725static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5726 .driver = {
5727 .owner = THIS_MODULE,
5728 .name = "qeth",
5729 },
b7169c51 5730 .setup = qeth_core_probe_device,
4a71df50
FB		 5731 .remove = qeth_core_remove_device,
5732 .set_online = qeth_core_set_online,
5733 .set_offline = qeth_core_set_offline,
5734 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5735 .prepare = qeth_core_prepare,
5736 .complete = qeth_core_complete,
5737 .freeze = qeth_core_freeze,
5738 .thaw = qeth_core_thaw,
5739 .restore = qeth_core_restore,
4a71df50
FB		 5740};
5741
b7169c51
SO		 5742static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5743 const char *buf, size_t count)
4a71df50
FB		 5744{
5745 int err;
4a71df50 5746
b7169c51 5747 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5748 &qeth_core_ccwgroup_driver, 3, buf);
5749
5750 return err ? err : count;
5751}
4a71df50
FB		 5752static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5753
f47e2256
SO		 5754static struct attribute *qeth_drv_attrs[] = {
5755 &driver_attr_group.attr,
5756 NULL,
5757};
5758static struct attribute_group qeth_drv_attr_group = {
5759 .attrs = qeth_drv_attrs,
5760};
5761static const struct attribute_group *qeth_drv_attr_groups[] = {
5762 &qeth_drv_attr_group,
5763 NULL,
5764};
5765
4a71df50
FB		 5766static struct {
5767 const char str[ETH_GSTRING_LEN];
5768} qeth_ethtool_stats_keys[] = {
5769/* 0 */{"rx skbs"},
5770 {"rx buffers"},
5771 {"tx skbs"},
5772 {"tx buffers"},
5773 {"tx skbs no packing"},
5774 {"tx buffers no packing"},
5775 {"tx skbs packing"},
5776 {"tx buffers packing"},
5777 {"tx sg skbs"},
5778 {"tx sg frags"},
5779/* 10 */{"rx sg skbs"},
5780 {"rx sg frags"},
5781 {"rx sg page allocs"},
5782 {"tx large kbytes"},
5783 {"tx large count"},
5784 {"tx pk state ch n->p"},
5785 {"tx pk state ch p->n"},
5786 {"tx pk watermark low"},
5787 {"tx pk watermark high"},
5788 {"queue 0 buffer usage"},
5789/* 20 */{"queue 1 buffer usage"},
5790 {"queue 2 buffer usage"},
5791 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5792 {"rx poll time"},
5793 {"rx poll count"},
4a71df50
FB		 5794 {"rx do_QDIO time"},
5795 {"rx do_QDIO count"},
5796 {"tx handler time"},
5797 {"tx handler count"},
5798 {"tx time"},
5799/* 30 */{"tx count"},
5800 {"tx do_QDIO time"},
5801 {"tx do_QDIO count"},
f61a0d05 5802 {"tx csum"},
c3b4a740 5803 {"tx lin"},
0da9581d
EL		 5804 {"cq handler count"},
5805 {"cq handler time"}
4a71df50
FB		 5806};
5807
df8b4ec8 5808int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5809{
df8b4ec8
BH		 5810 switch (stringset) {
5811 case ETH_SS_STATS:
5812 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5813 default:
5814 return -EINVAL;
5815 }
4a71df50 5816}
df8b4ec8 5817EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5818
5819void qeth_core_get_ethtool_stats(struct net_device *dev,
5820 struct ethtool_stats *stats, u64 *data)
5821{
509e2562 5822 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5823 data[0] = card->stats.rx_packets -
5824 card->perf_stats.initial_rx_packets;
5825 data[1] = card->perf_stats.bufs_rec;
5826 data[2] = card->stats.tx_packets -
5827 card->perf_stats.initial_tx_packets;
5828 data[3] = card->perf_stats.bufs_sent;
5829 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5830 - card->perf_stats.skbs_sent_pack;
5831 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5832 data[6] = card->perf_stats.skbs_sent_pack;
5833 data[7] = card->perf_stats.bufs_sent_pack;
5834 data[8] = card->perf_stats.sg_skbs_sent;
5835 data[9] = card->perf_stats.sg_frags_sent;
5836 data[10] = card->perf_stats.sg_skbs_rx;
5837 data[11] = card->perf_stats.sg_frags_rx;
5838 data[12] = card->perf_stats.sg_alloc_page_rx;
5839 data[13] = (card->perf_stats.large_send_bytes >> 10);
5840 data[14] = card->perf_stats.large_send_cnt;
5841 data[15] = card->perf_stats.sc_dp_p;
5842 data[16] = card->perf_stats.sc_p_dp;
5843 data[17] = QETH_LOW_WATERMARK_PACK;
5844 data[18] = QETH_HIGH_WATERMARK_PACK;
5845 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5846 data[20] = (card->qdio.no_out_queues > 1) ?
5847 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5848 data[21] = (card->qdio.no_out_queues > 2) ?
5849 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5850 data[22] = (card->qdio.no_out_queues > 3) ?
5851 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5852 data[23] = card->perf_stats.inbound_time;
5853 data[24] = card->perf_stats.inbound_cnt;
5854 data[25] = card->perf_stats.inbound_do_qdio_time;
5855 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5856 data[27] = card->perf_stats.outbound_handler_time;
5857 data[28] = card->perf_stats.outbound_handler_cnt;
5858 data[29] = card->perf_stats.outbound_time;
5859 data[30] = card->perf_stats.outbound_cnt;
5860 data[31] = card->perf_stats.outbound_do_qdio_time;
5861 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5862 data[33] = card->perf_stats.tx_csum;
c3b4a740 5863 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5864 data[35] = card->perf_stats.cq_cnt;
5865 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5866}
5867EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5868
5869void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5870{
5871 switch (stringset) {
5872 case ETH_SS_STATS:
5873 memcpy(data, &qeth_ethtool_stats_keys,
5874 sizeof(qeth_ethtool_stats_keys));
5875 break;
5876 default:
5877 WARN_ON(1);
5878 break;
5879 }
5880}
5881EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5882
5883void qeth_core_get_drvinfo(struct net_device *dev,
5884 struct ethtool_drvinfo *info)
5885{
509e2562 5886 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 5887
5888 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5889 sizeof(info->driver));
5890 strlcpy(info->version, "1.0", sizeof(info->version));
5891 strlcpy(info->fw_version, card->info.mcl_level,
5892 sizeof(info->fw_version));
5893 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5894 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 5895}
5896EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5897
02d5cb5b
EC		 5898/* Helper function to fill 'advertizing' and 'supported' which are the same. */
5899/* Autoneg and full-duplex are supported and advertized uncondionally. */
5900/* Always advertize and support all speeds up to specified, and only one */
5901/* specified port type. */
5902static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
5903 int maxspeed, int porttype)
5904{
5905 int port_sup, port_adv, spd_sup, spd_adv;
5906
5907 switch (porttype) {
5908 case PORT_TP:
5909 port_sup = SUPPORTED_TP;
5910 port_adv = ADVERTISED_TP;
5911 break;
5912 case PORT_FIBRE:
5913 port_sup = SUPPORTED_FIBRE;
5914 port_adv = ADVERTISED_FIBRE;
5915 break;
5916 default:
5917 port_sup = SUPPORTED_TP;
5918 port_adv = ADVERTISED_TP;
5919 WARN_ON_ONCE(1);
5920 }
5921
5922 /* "Fallthrough" case'es ordered from high to low result in setting */
5923 /* flags cumulatively, starting from the specified speed and down to */
5924 /* the lowest possible. */
5925 spd_sup = 0;
5926 spd_adv = 0;
5927 switch (maxspeed) {
5928 case SPEED_10000:
5929 spd_sup |= SUPPORTED_10000baseT_Full;
5930 spd_adv |= ADVERTISED_10000baseT_Full;
5931 case SPEED_1000:
5932 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
5933 spd_adv |= ADVERTISED_1000baseT_Half |
5934 ADVERTISED_1000baseT_Full;
5935 case SPEED_100:
5936 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
5937 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
5938 case SPEED_10:
5939 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5940 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5941 break;
5942 default:
5943 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5944 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5945 WARN_ON_ONCE(1);
5946 }
5947 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
5948 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
5949}
5950
3f9975aa
FB		 5951int qeth_core_ethtool_get_settings(struct net_device *netdev,
5952 struct ethtool_cmd *ecmd)
5953{
509e2562 5954 struct qeth_card *card = netdev->ml_priv;
3f9975aa 5955 enum qeth_link_types link_type;
02d5cb5b 5956 struct carrier_info carrier_info;
511c2445 5957 int rc;
d4f3cd49 5958 u32 speed;
3f9975aa
FB		 5959
5960 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5961 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5962 else
5963 link_type = card->info.link_type;
5964
5965 ecmd->transceiver = XCVR_INTERNAL;
3f9975aa
FB		 5966 ecmd->duplex = DUPLEX_FULL;
5967 ecmd->autoneg = AUTONEG_ENABLE;
5968
5969 switch (link_type) {
5970 case QETH_LINK_TYPE_FAST_ETH:
5971 case QETH_LINK_TYPE_LANE_ETH100:
02d5cb5b 5972 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
d4f3cd49 5973 speed = SPEED_100;
3f9975aa
FB		 5974 ecmd->port = PORT_TP;
5975 break;
5976
5977 case QETH_LINK_TYPE_GBIT_ETH:
5978 case QETH_LINK_TYPE_LANE_ETH1000:
02d5cb5b 5979 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
d4f3cd49 5980 speed = SPEED_1000;
3f9975aa
FB		 5981 ecmd->port = PORT_FIBRE;
5982 break;
5983
5984 case QETH_LINK_TYPE_10GBIT_ETH:
02d5cb5b 5985 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
d4f3cd49 5986 speed = SPEED_10000;
3f9975aa
FB		 5987 ecmd->port = PORT_FIBRE;
5988 break;
5989
5990 default:
02d5cb5b 5991 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
d4f3cd49 5992 speed = SPEED_10;
3f9975aa
FB		 5993 ecmd->port = PORT_TP;
5994 }
d4f3cd49 5995 ethtool_cmd_speed_set(ecmd, speed);
3f9975aa 5996
02d5cb5b
EC		 5997 /* Check if we can obtain more accurate information. */
5998 /* If QUERY_CARD_INFO command is not supported or fails, */
5999 /* just return the heuristics that was filled above. */
511c2445
EC		 6000 if (!qeth_card_hw_is_reachable(card))
6001 return -ENODEV;
6002 rc = qeth_query_card_info(card, &carrier_info);
6003 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6004 return 0;
511c2445
EC		 6005 if (rc) /* report error from the hardware operation */
6006 return rc;
6007 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6008
6009 netdev_dbg(netdev,
6010 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6011 carrier_info.card_type,
6012 carrier_info.port_mode,
6013 carrier_info.port_speed);
6014
6015 /* Update attributes for which we've obtained more authoritative */
6016 /* information, leave the rest the way they where filled above. */
6017 switch (carrier_info.card_type) {
6018 case CARD_INFO_TYPE_1G_COPPER_A:
6019 case CARD_INFO_TYPE_1G_COPPER_B:
6020 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
6021 ecmd->port = PORT_TP;
6022 break;
6023 case CARD_INFO_TYPE_1G_FIBRE_A:
6024 case CARD_INFO_TYPE_1G_FIBRE_B:
6025 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
6026 ecmd->port = PORT_FIBRE;
6027 break;
6028 case CARD_INFO_TYPE_10G_FIBRE_A:
6029 case CARD_INFO_TYPE_10G_FIBRE_B:
6030 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
6031 ecmd->port = PORT_FIBRE;
6032 break;
6033 }
6034
6035 switch (carrier_info.port_mode) {
6036 case CARD_INFO_PORTM_FULLDUPLEX:
6037 ecmd->duplex = DUPLEX_FULL;
6038 break;
6039 case CARD_INFO_PORTM_HALFDUPLEX:
6040 ecmd->duplex = DUPLEX_HALF;
6041 break;
6042 }
6043
6044 switch (carrier_info.port_speed) {
6045 case CARD_INFO_PORTS_10M:
d4f3cd49 6046 speed = SPEED_10;
02d5cb5b
EC		 6047 break;
6048 case CARD_INFO_PORTS_100M:
d4f3cd49 6049 speed = SPEED_100;
02d5cb5b
EC		 6050 break;
6051 case CARD_INFO_PORTS_1G:
d4f3cd49 6052 speed = SPEED_1000;
02d5cb5b
EC		 6053 break;
6054 case CARD_INFO_PORTS_10G:
d4f3cd49 6055 speed = SPEED_10000;
02d5cb5b
EC		 6056 break;
6057 }
d4f3cd49 6058 ethtool_cmd_speed_set(ecmd, speed);
02d5cb5b 6059
3f9975aa
FB		 6060 return 0;
6061}
6062EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
6063
4d7def2a
TR		 6064static int qeth_send_checksum_command(struct qeth_card *card)
6065{
6066 int rc;
6067
6068 rc = qeth_send_simple_setassparms(card, IPA_INBOUND_CHECKSUM,
6069 IPA_CMD_ASS_START, 0);
6070 if (rc) {
6071 dev_warn(&card->gdev->dev, "Starting HW checksumming for %s "
6072 "failed, using SW checksumming\n",
6073 QETH_CARD_IFNAME(card));
6074 return rc;
6075 }
6076 rc = qeth_send_simple_setassparms(card, IPA_INBOUND_CHECKSUM,
6077 IPA_CMD_ASS_ENABLE,
6078 card->info.csum_mask);
6079 if (rc) {
6080 dev_warn(&card->gdev->dev, "Enabling HW checksumming for %s "
6081 "failed, using SW checksumming\n",
6082 QETH_CARD_IFNAME(card));
6083 return rc;
6084 }
6085 return 0;
6086}
6087
6088int qeth_set_rx_csum(struct qeth_card *card, int on)
6089{
6090 int rc;
6091
6092 if (on) {
6093 rc = qeth_send_checksum_command(card);
6094 if (rc)
6095 return -EIO;
6096 dev_info(&card->gdev->dev,
6097 "HW Checksumming (inbound) enabled\n");
6098 } else {
6099 rc = qeth_send_simple_setassparms(card,
6100 IPA_INBOUND_CHECKSUM, IPA_CMD_ASS_STOP, 0);
6101 if (rc)
6102 return -EIO;
6103 }
6104 return 0;
6105}
6106EXPORT_SYMBOL_GPL(qeth_set_rx_csum);
6107
6108int qeth_start_ipa_tx_checksum(struct qeth_card *card)
6109{
6110 int rc = 0;
6111
6112 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6113 return rc;
6114 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_CHECKSUM,
6115 IPA_CMD_ASS_START, 0);
6116 if (rc)
6117 goto err_out;
6118 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_CHECKSUM,
6119 IPA_CMD_ASS_ENABLE,
6120 card->info.tx_csum_mask);
6121 if (rc)
6122 goto err_out;
6123
6124 dev_info(&card->gdev->dev, "HW TX Checksumming enabled\n");
6125 return rc;
6126err_out:
6127 dev_warn(&card->gdev->dev, "Enabling HW TX checksumming for %s "
6128 "failed, using SW TX checksumming\n", QETH_CARD_IFNAME(card));
6129 return rc;
6130}
6131EXPORT_SYMBOL_GPL(qeth_start_ipa_tx_checksum);
6132
4a71df50
FB		 6133static int __init qeth_core_init(void)
6134{
6135 int rc;
6136
74eacdb9 6137 pr_info("loading core functions\n");
4a71df50 6138 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6139 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6140 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6141 mutex_init(&qeth_mod_mutex);
4a71df50 6142
0f54761d
SR		 6143 qeth_wq = create_singlethread_workqueue("qeth_wq");
6144
4a71df50
FB		 6145 rc = qeth_register_dbf_views();
6146 if (rc)
6147 goto out_err;
035da16f 6148 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6149 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6150 if (rc)
6151 goto register_err;
683d718a
FB		 6152 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6153 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6154 if (!qeth_core_header_cache) {
6155 rc = -ENOMEM;
6156 goto slab_err;
6157 }
0da9581d
EL		 6158 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6159 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6160 if (!qeth_qdio_outbuf_cache) {
6161 rc = -ENOMEM;
6162 goto cqslab_err;
6163 }
afb6ac59
SO		 6164 rc = ccw_driver_register(&qeth_ccw_driver);
6165 if (rc)
6166 goto ccw_err;
6167 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6168 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6169 if (rc)
6170 goto ccwgroup_err;
0da9581d 6171
683d718a 6172 return 0;
afb6ac59
SO		 6173
6174ccwgroup_err:
6175 ccw_driver_unregister(&qeth_ccw_driver);
6176ccw_err:
6177 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6178cqslab_err:
6179 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6180slab_err:
035da16f 6181 root_device_unregister(qeth_core_root_dev);
4a71df50 6182register_err:
4a71df50
FB		 6183 qeth_unregister_dbf_views();
6184out_err:
74eacdb9 6185 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6186 return rc;
6187}
6188
6189static void __exit qeth_core_exit(void)
6190{
819dc537 6191 qeth_clear_dbf_list();
0f54761d 6192 destroy_workqueue(qeth_wq);
4a71df50
FB		 6193 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6194 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6195 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6196 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6197 root_device_unregister(qeth_core_root_dev);
4a71df50 6198 qeth_unregister_dbf_views();
74eacdb9 6199 pr_info("core functions removed\n");
4a71df50
FB		 6200}
6201
6202module_init(qeth_core_init);
6203module_exit(qeth_core_exit);
6204MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6205MODULE_DESCRIPTION("qeth core functions");
6206MODULE_LICENSE("GPL");
ubuntu-bionic-kernel mirror