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qeth: Extend priority queueing to IPv6
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
290b8348 23#include <net/dsfield.h>
4a71df50 24
ab4227cb
MS		 25#include <asm/ebcdic.h>
26#include <asm/io.h>
1da74b1c 27#include <asm/sysinfo.h>
c3ab96f3 28#include <asm/compat.h>
4a71df50
FB		 29
30#include "qeth_core.h"
4a71df50 31
d11ba0c4
PT		 32struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 37 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
38 &debug_sprintf_view, NULL},
d11ba0c4
PT		 39 [QETH_DBF_CTRL] = {"qeth_control",
40 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
41};
42EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 43
44struct qeth_card_list_struct qeth_core_card_list;
45EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 46struct kmem_cache *qeth_core_header_cache;
47EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 48static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 49
50static struct device *qeth_core_root_dev;
5113fec0 51static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 52static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 53static struct mutex qeth_mod_mutex;
4a71df50
FB		 54
55static void qeth_send_control_data_cb(struct qeth_channel *,
56 struct qeth_cmd_buffer *);
57static int qeth_issue_next_read(struct qeth_card *);
58static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
59static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
60static void qeth_free_buffer_pool(struct qeth_card *);
61static int qeth_qdio_establish(struct qeth_card *);
0da9581d 62static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 63static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
64 struct qeth_qdio_out_buffer *buf,
65 enum iucv_tx_notify notification);
66static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 67static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
68 struct qeth_qdio_out_buffer *buf,
69 enum qeth_qdio_buffer_states newbufstate);
72861ae7 70static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 71
b4d72c08 72struct workqueue_struct *qeth_wq;
c044dc21 73EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d
SR		 74
75static void qeth_close_dev_handler(struct work_struct *work)
76{
77 struct qeth_card *card;
78
79 card = container_of(work, struct qeth_card, close_dev_work);
80 QETH_CARD_TEXT(card, 2, "cldevhdl");
81 rtnl_lock();
82 dev_close(card->dev);
83 rtnl_unlock();
84 ccwgroup_set_offline(card->gdev);
85}
86
87void qeth_close_dev(struct qeth_card *card)
88{
89 QETH_CARD_TEXT(card, 2, "cldevsubm");
90 queue_work(qeth_wq, &card->close_dev_work);
91}
92EXPORT_SYMBOL_GPL(qeth_close_dev);
93
4a71df50
FB		 94static inline const char *qeth_get_cardname(struct qeth_card *card)
95{
96 if (card->info.guestlan) {
97 switch (card->info.type) {
5113fec0 98 case QETH_CARD_TYPE_OSD:
7096b187 99 return " Virtual NIC QDIO";
4a71df50 100 case QETH_CARD_TYPE_IQD:
7096b187 101 return " Virtual NIC Hiper";
5113fec0 102 case QETH_CARD_TYPE_OSM:
7096b187 103 return " Virtual NIC QDIO - OSM";
5113fec0 104 case QETH_CARD_TYPE_OSX:
7096b187 105 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 106 default:
107 return " unknown";
108 }
109 } else {
110 switch (card->info.type) {
5113fec0 111 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 112 return " OSD Express";
113 case QETH_CARD_TYPE_IQD:
114 return " HiperSockets";
115 case QETH_CARD_TYPE_OSN:
116 return " OSN QDIO";
5113fec0
UB		 117 case QETH_CARD_TYPE_OSM:
118 return " OSM QDIO";
119 case QETH_CARD_TYPE_OSX:
120 return " OSX QDIO";
4a71df50
FB		 121 default:
122 return " unknown";
123 }
124 }
125 return " n/a";
126}
127
128/* max length to be returned: 14 */
129const char *qeth_get_cardname_short(struct qeth_card *card)
130{
131 if (card->info.guestlan) {
132 switch (card->info.type) {
5113fec0 133 case QETH_CARD_TYPE_OSD:
7096b187 134 return "Virt.NIC QDIO";
4a71df50 135 case QETH_CARD_TYPE_IQD:
7096b187 136 return "Virt.NIC Hiper";
5113fec0 137 case QETH_CARD_TYPE_OSM:
7096b187 138 return "Virt.NIC OSM";
5113fec0 139 case QETH_CARD_TYPE_OSX:
7096b187 140 return "Virt.NIC OSX";
4a71df50
FB		 141 default:
142 return "unknown";
143 }
144 } else {
145 switch (card->info.type) {
5113fec0 146 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 147 switch (card->info.link_type) {
148 case QETH_LINK_TYPE_FAST_ETH:
149 return "OSD_100";
150 case QETH_LINK_TYPE_HSTR:
151 return "HSTR";
152 case QETH_LINK_TYPE_GBIT_ETH:
153 return "OSD_1000";
154 case QETH_LINK_TYPE_10GBIT_ETH:
155 return "OSD_10GIG";
156 case QETH_LINK_TYPE_LANE_ETH100:
157 return "OSD_FE_LANE";
158 case QETH_LINK_TYPE_LANE_TR:
159 return "OSD_TR_LANE";
160 case QETH_LINK_TYPE_LANE_ETH1000:
161 return "OSD_GbE_LANE";
162 case QETH_LINK_TYPE_LANE:
163 return "OSD_ATM_LANE";
164 default:
165 return "OSD_Express";
166 }
167 case QETH_CARD_TYPE_IQD:
168 return "HiperSockets";
169 case QETH_CARD_TYPE_OSN:
170 return "OSN";
5113fec0
UB		 171 case QETH_CARD_TYPE_OSM:
172 return "OSM_1000";
173 case QETH_CARD_TYPE_OSX:
174 return "OSX_10GIG";
4a71df50
FB		 175 default:
176 return "unknown";
177 }
178 }
179 return "n/a";
180}
181
65d8013c
SR		 182void qeth_set_recovery_task(struct qeth_card *card)
183{
184 card->recovery_task = current;
185}
186EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
187
188void qeth_clear_recovery_task(struct qeth_card *card)
189{
190 card->recovery_task = NULL;
191}
192EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
193
194static bool qeth_is_recovery_task(const struct qeth_card *card)
195{
196 return card->recovery_task == current;
197}
198
4a71df50
FB		 199void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
200 int clear_start_mask)
201{
202 unsigned long flags;
203
204 spin_lock_irqsave(&card->thread_mask_lock, flags);
205 card->thread_allowed_mask = threads;
206 if (clear_start_mask)
207 card->thread_start_mask &= threads;
208 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
209 wake_up(&card->wait_q);
210}
211EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
212
213int qeth_threads_running(struct qeth_card *card, unsigned long threads)
214{
215 unsigned long flags;
216 int rc = 0;
217
218 spin_lock_irqsave(&card->thread_mask_lock, flags);
219 rc = (card->thread_running_mask & threads);
220 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
221 return rc;
222}
223EXPORT_SYMBOL_GPL(qeth_threads_running);
224
225int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
226{
65d8013c
SR		 227 if (qeth_is_recovery_task(card))
228 return 0;
4a71df50
FB		 229 return wait_event_interruptible(card->wait_q,
230 qeth_threads_running(card, threads) == 0);
231}
232EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
233
234void qeth_clear_working_pool_list(struct qeth_card *card)
235{
236 struct qeth_buffer_pool_entry *pool_entry, *tmp;
237
847a50fd 238 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 239 list_for_each_entry_safe(pool_entry, tmp,
240 &card->qdio.in_buf_pool.entry_list, list){
241 list_del(&pool_entry->list);
242 }
243}
244EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
245
246static int qeth_alloc_buffer_pool(struct qeth_card *card)
247{
248 struct qeth_buffer_pool_entry *pool_entry;
249 void *ptr;
250 int i, j;
251
847a50fd 252 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 253 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 254 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 255 if (!pool_entry) {
256 qeth_free_buffer_pool(card);
257 return -ENOMEM;
258 }
259 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 260 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 261 if (!ptr) {
262 while (j > 0)
263 free_page((unsigned long)
264 pool_entry->elements[--j]);
265 kfree(pool_entry);
266 qeth_free_buffer_pool(card);
267 return -ENOMEM;
268 }
269 pool_entry->elements[j] = ptr;
270 }
271 list_add(&pool_entry->init_list,
272 &card->qdio.init_pool.entry_list);
273 }
274 return 0;
275}
276
277int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
278{
847a50fd 279 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 280
281 if ((card->state != CARD_STATE_DOWN) &&
282 (card->state != CARD_STATE_RECOVER))
283 return -EPERM;
284
285 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
286 qeth_clear_working_pool_list(card);
287 qeth_free_buffer_pool(card);
288 card->qdio.in_buf_pool.buf_count = bufcnt;
289 card->qdio.init_pool.buf_count = bufcnt;
290 return qeth_alloc_buffer_pool(card);
291}
76b11f8e 292EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 293
0da9581d
EL		 294static inline int qeth_cq_init(struct qeth_card *card)
295{
296 int rc;
297
298 if (card->options.cq == QETH_CQ_ENABLED) {
299 QETH_DBF_TEXT(SETUP, 2, "cqinit");
300 memset(card->qdio.c_q->qdio_bufs, 0,
301 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
302 card->qdio.c_q->next_buf_to_init = 127;
303 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
304 card->qdio.no_in_queues - 1, 0,
305 127);
306 if (rc) {
307 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
308 goto out;
309 }
310 }
311 rc = 0;
312out:
313 return rc;
314}
315
316static inline int qeth_alloc_cq(struct qeth_card *card)
317{
318 int rc;
319
320 if (card->options.cq == QETH_CQ_ENABLED) {
321 int i;
322 struct qdio_outbuf_state *outbuf_states;
323
324 QETH_DBF_TEXT(SETUP, 2, "cqon");
325 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
326 GFP_KERNEL);
327 if (!card->qdio.c_q) {
328 rc = -1;
329 goto kmsg_out;
330 }
331 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
332
333 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
334 card->qdio.c_q->bufs[i].buffer =
335 &card->qdio.c_q->qdio_bufs[i];
336 }
337
338 card->qdio.no_in_queues = 2;
339
4a912f98 340 card->qdio.out_bufstates =
0da9581d
EL		 341 kzalloc(card->qdio.no_out_queues *
342 QDIO_MAX_BUFFERS_PER_Q *
343 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
344 outbuf_states = card->qdio.out_bufstates;
345 if (outbuf_states == NULL) {
346 rc = -1;
347 goto free_cq_out;
348 }
349 for (i = 0; i < card->qdio.no_out_queues; ++i) {
350 card->qdio.out_qs[i]->bufstates = outbuf_states;
351 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
352 }
353 } else {
354 QETH_DBF_TEXT(SETUP, 2, "nocq");
355 card->qdio.c_q = NULL;
356 card->qdio.no_in_queues = 1;
357 }
358 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
359 rc = 0;
360out:
361 return rc;
362free_cq_out:
363 kfree(card->qdio.c_q);
364 card->qdio.c_q = NULL;
365kmsg_out:
366 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
367 goto out;
368}
369
370static inline void qeth_free_cq(struct qeth_card *card)
371{
372 if (card->qdio.c_q) {
373 --card->qdio.no_in_queues;
374 kfree(card->qdio.c_q);
375 card->qdio.c_q = NULL;
376 }
377 kfree(card->qdio.out_bufstates);
378 card->qdio.out_bufstates = NULL;
379}
380
b3332930
FB		 381static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
382 int delayed) {
383 enum iucv_tx_notify n;
384
385 switch (sbalf15) {
386 case 0:
387 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
388 break;
389 case 4:
390 case 16:
391 case 17:
392 case 18:
393 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
394 TX_NOTIFY_UNREACHABLE;
395 break;
396 default:
397 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
398 TX_NOTIFY_GENERALERROR;
399 break;
400 }
401
402 return n;
403}
404
0da9581d
EL		 405static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
406 int bidx, int forced_cleanup)
407{
72861ae7
EL		 408 if (q->card->options.cq != QETH_CQ_ENABLED)
409 return;
410
0da9581d
EL		 411 if (q->bufs[bidx]->next_pending != NULL) {
412 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
413 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
414
415 while (c) {
416 if (forced_cleanup ||
417 atomic_read(&c->state) ==
418 QETH_QDIO_BUF_HANDLED_DELAYED) {
419 struct qeth_qdio_out_buffer *f = c;
420 QETH_CARD_TEXT(f->q->card, 5, "fp");
421 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 422 /* release here to avoid interleaving between
423 outbound tasklet and inbound tasklet
424 regarding notifications and lifecycle */
425 qeth_release_skbs(c);
426
0da9581d 427 c = f->next_pending;
18af5c17 428 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 429 head->next_pending = c;
430 kmem_cache_free(qeth_qdio_outbuf_cache, f);
431 } else {
432 head = c;
433 c = c->next_pending;
434 }
435
436 }
437 }
72861ae7
EL		 438 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
439 QETH_QDIO_BUF_HANDLED_DELAYED)) {
440 /* for recovery situations */
441 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
442 qeth_init_qdio_out_buf(q, bidx);
443 QETH_CARD_TEXT(q->card, 2, "clprecov");
444 }
0da9581d
EL		 445}
446
447
448static inline void qeth_qdio_handle_aob(struct qeth_card *card,
449 unsigned long phys_aob_addr) {
450 struct qaob *aob;
451 struct qeth_qdio_out_buffer *buffer;
b3332930 452 enum iucv_tx_notify notification;
0da9581d
EL		 453
454 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
455 QETH_CARD_TEXT(card, 5, "haob");
456 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
457 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
458 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
459
b3332930
FB		 460 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
461 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
462 notification = TX_NOTIFY_OK;
463 } else {
18af5c17
SR		 464 WARN_ON_ONCE(atomic_read(&buffer->state) !=
465 QETH_QDIO_BUF_PENDING);
b3332930
FB		 466 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
467 notification = TX_NOTIFY_DELAYED_OK;
468 }
469
470 if (aob->aorc != 0) {
471 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
472 notification = qeth_compute_cq_notification(aob->aorc, 1);
473 }
474 qeth_notify_skbs(buffer->q, buffer, notification);
475
0da9581d
EL		 476 buffer->aob = NULL;
477 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 478 QETH_QDIO_BUF_HANDLED_DELAYED);
479
0da9581d
EL		 480 /* from here on: do not touch buffer anymore */
481 qdio_release_aob(aob);
482}
483
484static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
485{
486 return card->options.cq == QETH_CQ_ENABLED &&
487 card->qdio.c_q != NULL &&
488 queue != 0 &&
489 queue == card->qdio.no_in_queues - 1;
490}
491
492
4a71df50
FB		 493static int qeth_issue_next_read(struct qeth_card *card)
494{
495 int rc;
496 struct qeth_cmd_buffer *iob;
497
847a50fd 498 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 499 if (card->read.state != CH_STATE_UP)
500 return -EIO;
501 iob = qeth_get_buffer(&card->read);
502 if (!iob) {
74eacdb9
FB		 503 dev_warn(&card->gdev->dev, "The qeth device driver "
504 "failed to recover an error on the device\n");
505 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
506 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 507 return -ENOMEM;
508 }
509 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 510 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 511 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
512 (addr_t) iob, 0, 0);
513 if (rc) {
74eacdb9
FB		 514 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
515 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 516 atomic_set(&card->read.irq_pending, 0);
908abbb5 517 card->read_or_write_problem = 1;
4a71df50
FB		 518 qeth_schedule_recovery(card);
519 wake_up(&card->wait_q);
520 }
521 return rc;
522}
523
524static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
525{
526 struct qeth_reply *reply;
527
528 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
529 if (reply) {
530 atomic_set(&reply->refcnt, 1);
531 atomic_set(&reply->received, 0);
532 reply->card = card;
6531084c 533 }
4a71df50
FB		 534 return reply;
535}
536
537static void qeth_get_reply(struct qeth_reply *reply)
538{
539 WARN_ON(atomic_read(&reply->refcnt) <= 0);
540 atomic_inc(&reply->refcnt);
541}
542
543static void qeth_put_reply(struct qeth_reply *reply)
544{
545 WARN_ON(atomic_read(&reply->refcnt) <= 0);
546 if (atomic_dec_and_test(&reply->refcnt))
547 kfree(reply);
548}
549
d11ba0c4 550static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 551 struct qeth_card *card)
552{
4a71df50 553 char *ipa_name;
d11ba0c4 554 int com = cmd->hdr.command;
4a71df50 555 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 556 if (rc)
70919e23
UB		 557 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
558 "x%X \"%s\"\n",
559 ipa_name, com, dev_name(&card->gdev->dev),
560 QETH_CARD_IFNAME(card), rc,
561 qeth_get_ipa_msg(rc));
d11ba0c4 562 else
70919e23
UB		 563 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
564 ipa_name, com, dev_name(&card->gdev->dev),
565 QETH_CARD_IFNAME(card));
4a71df50
FB		 566}
567
568static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
569 struct qeth_cmd_buffer *iob)
570{
571 struct qeth_ipa_cmd *cmd = NULL;
572
847a50fd 573 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 574 if (IS_IPA(iob->data)) {
575 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
576 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 577 if (cmd->hdr.command != IPA_CMD_SETCCID &&
578 cmd->hdr.command != IPA_CMD_DELCCID &&
579 cmd->hdr.command != IPA_CMD_MODCCID &&
580 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 581 qeth_issue_ipa_msg(cmd,
582 cmd->hdr.return_code, card);
4a71df50
FB		 583 return cmd;
584 } else {
585 switch (cmd->hdr.command) {
586 case IPA_CMD_STOPLAN:
0f54761d
SR		 587 if (cmd->hdr.return_code ==
588 IPA_RC_VEPA_TO_VEB_TRANSITION) {
589 dev_err(&card->gdev->dev,
590 "Interface %s is down because the "
591 "adjacent port is no longer in "
592 "reflective relay mode\n",
593 QETH_CARD_IFNAME(card));
594 qeth_close_dev(card);
595 } else {
596 dev_warn(&card->gdev->dev,
74eacdb9
FB		 597 "The link for interface %s on CHPID"
598 " 0x%X failed\n",
4a71df50
FB		 599 QETH_CARD_IFNAME(card),
600 card->info.chpid);
0f54761d
SR		 601 qeth_issue_ipa_msg(cmd,
602 cmd->hdr.return_code, card);
603 }
4a71df50
FB		 604 card->lan_online = 0;
605 if (card->dev && netif_carrier_ok(card->dev))
606 netif_carrier_off(card->dev);
607 return NULL;
608 case IPA_CMD_STARTLAN:
74eacdb9
FB		 609 dev_info(&card->gdev->dev,
610 "The link for %s on CHPID 0x%X has"
611 " been restored\n",
4a71df50
FB		 612 QETH_CARD_IFNAME(card),
613 card->info.chpid);
614 netif_carrier_on(card->dev);
922dc062 615 card->lan_online = 1;
1da74b1c
FB		 616 if (card->info.hwtrap)
617 card->info.hwtrap = 2;
4a71df50
FB		 618 qeth_schedule_recovery(card);
619 return NULL;
b4d72c08 620 case IPA_CMD_SETBRIDGEPORT:
9f48b9db 621 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 622 if (card->discipline->control_event_handler
623 (card, cmd))
624 return cmd;
625 else
626 return NULL;
4a71df50
FB		 627 case IPA_CMD_MODCCID:
628 return cmd;
629 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 630 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 631 break;
632 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 633 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 634 break;
635 default:
c4cef07c 636 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 637 "but not a reply!\n");
638 break;
639 }
640 }
641 }
642 return cmd;
643}
644
645void qeth_clear_ipacmd_list(struct qeth_card *card)
646{
647 struct qeth_reply *reply, *r;
648 unsigned long flags;
649
847a50fd 650 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 651
652 spin_lock_irqsave(&card->lock, flags);
653 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
654 qeth_get_reply(reply);
655 reply->rc = -EIO;
656 atomic_inc(&reply->received);
657 list_del_init(&reply->list);
658 wake_up(&reply->wait_q);
659 qeth_put_reply(reply);
660 }
661 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 662 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 663}
664EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
665
5113fec0
UB		 666static int qeth_check_idx_response(struct qeth_card *card,
667 unsigned char *buffer)
4a71df50
FB		 668{
669 if (!buffer)
670 return 0;
671
d11ba0c4 672 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 673 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 674 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 675 "with cause code 0x%02x%s\n",
676 buffer[4],
677 ((buffer[4] == 0x22) ?
678 " -- try another portname" : ""));
847a50fd
CO		 679 QETH_CARD_TEXT(card, 2, "ckidxres");
680 QETH_CARD_TEXT(card, 2, " idxterm");
681 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 682 if (buffer[4] == 0xf6) {
683 dev_err(&card->gdev->dev,
684 "The qeth device is not configured "
685 "for the OSI layer required by z/VM\n");
686 return -EPERM;
687 }
4a71df50
FB		 688 return -EIO;
689 }
690 return 0;
691}
692
693static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
694 __u32 len)
695{
696 struct qeth_card *card;
697
4a71df50 698 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 699 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 700 if (channel == &card->read)
701 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
702 else
703 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
704 channel->ccw.count = len;
705 channel->ccw.cda = (__u32) __pa(iob);
706}
707
708static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
709{
710 __u8 index;
711
847a50fd 712 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 713 index = channel->io_buf_no;
714 do {
715 if (channel->iob[index].state == BUF_STATE_FREE) {
716 channel->iob[index].state = BUF_STATE_LOCKED;
717 channel->io_buf_no = (channel->io_buf_no + 1) %
718 QETH_CMD_BUFFER_NO;
719 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
720 return channel->iob + index;
721 }
722 index = (index + 1) % QETH_CMD_BUFFER_NO;
723 } while (index != channel->io_buf_no);
724
725 return NULL;
726}
727
728void qeth_release_buffer(struct qeth_channel *channel,
729 struct qeth_cmd_buffer *iob)
730{
731 unsigned long flags;
732
847a50fd 733 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 734 spin_lock_irqsave(&channel->iob_lock, flags);
735 memset(iob->data, 0, QETH_BUFSIZE);
736 iob->state = BUF_STATE_FREE;
737 iob->callback = qeth_send_control_data_cb;
738 iob->rc = 0;
739 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 740 wake_up(&channel->wait_q);
4a71df50
FB		 741}
742EXPORT_SYMBOL_GPL(qeth_release_buffer);
743
744static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
745{
746 struct qeth_cmd_buffer *buffer = NULL;
747 unsigned long flags;
748
749 spin_lock_irqsave(&channel->iob_lock, flags);
750 buffer = __qeth_get_buffer(channel);
751 spin_unlock_irqrestore(&channel->iob_lock, flags);
752 return buffer;
753}
754
755struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
756{
757 struct qeth_cmd_buffer *buffer;
758 wait_event(channel->wait_q,
759 ((buffer = qeth_get_buffer(channel)) != NULL));
760 return buffer;
761}
762EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
763
764void qeth_clear_cmd_buffers(struct qeth_channel *channel)
765{
766 int cnt;
767
768 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
769 qeth_release_buffer(channel, &channel->iob[cnt]);
770 channel->buf_no = 0;
771 channel->io_buf_no = 0;
772}
773EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
774
775static void qeth_send_control_data_cb(struct qeth_channel *channel,
776 struct qeth_cmd_buffer *iob)
777{
778 struct qeth_card *card;
779 struct qeth_reply *reply, *r;
780 struct qeth_ipa_cmd *cmd;
781 unsigned long flags;
782 int keep_reply;
5113fec0 783 int rc = 0;
4a71df50 784
4a71df50 785 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 786 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 787 rc = qeth_check_idx_response(card, iob->data);
788 switch (rc) {
789 case 0:
790 break;
791 case -EIO:
4a71df50 792 qeth_clear_ipacmd_list(card);
5113fec0 793 qeth_schedule_recovery(card);
01fc3e86 794 /* fall through */
5113fec0 795 default:
4a71df50
FB		 796 goto out;
797 }
798
799 cmd = qeth_check_ipa_data(card, iob);
800 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
801 goto out;
802 /*in case of OSN : check if cmd is set */
803 if (card->info.type == QETH_CARD_TYPE_OSN &&
804 cmd &&
805 cmd->hdr.command != IPA_CMD_STARTLAN &&
806 card->osn_info.assist_cb != NULL) {
807 card->osn_info.assist_cb(card->dev, cmd);
808 goto out;
809 }
810
811 spin_lock_irqsave(&card->lock, flags);
812 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
813 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
814 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
815 qeth_get_reply(reply);
816 list_del_init(&reply->list);
817 spin_unlock_irqrestore(&card->lock, flags);
818 keep_reply = 0;
819 if (reply->callback != NULL) {
820 if (cmd) {
821 reply->offset = (__u16)((char *)cmd -
822 (char *)iob->data);
823 keep_reply = reply->callback(card,
824 reply,
825 (unsigned long)cmd);
826 } else
827 keep_reply = reply->callback(card,
828 reply,
829 (unsigned long)iob);
830 }
831 if (cmd)
832 reply->rc = (u16) cmd->hdr.return_code;
833 else if (iob->rc)
834 reply->rc = iob->rc;
835 if (keep_reply) {
836 spin_lock_irqsave(&card->lock, flags);
837 list_add_tail(&reply->list,
838 &card->cmd_waiter_list);
839 spin_unlock_irqrestore(&card->lock, flags);
840 } else {
841 atomic_inc(&reply->received);
842 wake_up(&reply->wait_q);
843 }
844 qeth_put_reply(reply);
845 goto out;
846 }
847 }
848 spin_unlock_irqrestore(&card->lock, flags);
849out:
850 memcpy(&card->seqno.pdu_hdr_ack,
851 QETH_PDU_HEADER_SEQ_NO(iob->data),
852 QETH_SEQ_NO_LENGTH);
853 qeth_release_buffer(channel, iob);
854}
855
856static int qeth_setup_channel(struct qeth_channel *channel)
857{
858 int cnt;
859
d11ba0c4 860 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 861 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 862 channel->iob[cnt].data =
b3332930 863 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 864 if (channel->iob[cnt].data == NULL)
865 break;
866 channel->iob[cnt].state = BUF_STATE_FREE;
867 channel->iob[cnt].channel = channel;
868 channel->iob[cnt].callback = qeth_send_control_data_cb;
869 channel->iob[cnt].rc = 0;
870 }
871 if (cnt < QETH_CMD_BUFFER_NO) {
872 while (cnt-- > 0)
873 kfree(channel->iob[cnt].data);
874 return -ENOMEM;
875 }
876 channel->buf_no = 0;
877 channel->io_buf_no = 0;
878 atomic_set(&channel->irq_pending, 0);
879 spin_lock_init(&channel->iob_lock);
880
881 init_waitqueue_head(&channel->wait_q);
882 return 0;
883}
884
885static int qeth_set_thread_start_bit(struct qeth_card *card,
886 unsigned long thread)
887{
888 unsigned long flags;
889
890 spin_lock_irqsave(&card->thread_mask_lock, flags);
891 if (!(card->thread_allowed_mask & thread) ||
892 (card->thread_start_mask & thread)) {
893 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
894 return -EPERM;
895 }
896 card->thread_start_mask |= thread;
897 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
898 return 0;
899}
900
901void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
902{
903 unsigned long flags;
904
905 spin_lock_irqsave(&card->thread_mask_lock, flags);
906 card->thread_start_mask &= ~thread;
907 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
908 wake_up(&card->wait_q);
909}
910EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
911
912void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
913{
914 unsigned long flags;
915
916 spin_lock_irqsave(&card->thread_mask_lock, flags);
917 card->thread_running_mask &= ~thread;
918 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
919 wake_up(&card->wait_q);
920}
921EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
922
923static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
924{
925 unsigned long flags;
926 int rc = 0;
927
928 spin_lock_irqsave(&card->thread_mask_lock, flags);
929 if (card->thread_start_mask & thread) {
930 if ((card->thread_allowed_mask & thread) &&
931 !(card->thread_running_mask & thread)) {
932 rc = 1;
933 card->thread_start_mask &= ~thread;
934 card->thread_running_mask |= thread;
935 } else
936 rc = -EPERM;
937 }
938 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
939 return rc;
940}
941
942int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
943{
944 int rc = 0;
945
946 wait_event(card->wait_q,
947 (rc = __qeth_do_run_thread(card, thread)) >= 0);
948 return rc;
949}
950EXPORT_SYMBOL_GPL(qeth_do_run_thread);
951
952void qeth_schedule_recovery(struct qeth_card *card)
953{
847a50fd 954 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 955 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
956 schedule_work(&card->kernel_thread_starter);
957}
958EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
959
960static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
961{
962 int dstat, cstat;
963 char *sense;
847a50fd 964 struct qeth_card *card;
4a71df50
FB		 965
966 sense = (char *) irb->ecw;
23d805b6
PO		 967 cstat = irb->scsw.cmd.cstat;
968 dstat = irb->scsw.cmd.dstat;
847a50fd 969 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 970
971 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
972 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
973 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 974 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 975 dev_warn(&cdev->dev, "The qeth device driver "
976 "failed to recover an error on the device\n");
5113fec0 977 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 978 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 979 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
980 16, 1, irb, 64, 1);
981 return 1;
982 }
983
984 if (dstat & DEV_STAT_UNIT_CHECK) {
985 if (sense[SENSE_RESETTING_EVENT_BYTE] &
986 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 987 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 988 return 1;
989 }
990 if (sense[SENSE_COMMAND_REJECT_BYTE] &
991 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 992 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 993 return 1;
4a71df50
FB		 994 }
995 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 996 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 997 return 1;
998 }
999 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1000 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1001 return 0;
1002 }
847a50fd 1003 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1004 return 1;
1005 }
1006 return 0;
1007}
1008
1009static long __qeth_check_irb_error(struct ccw_device *cdev,
1010 unsigned long intparm, struct irb *irb)
1011{
847a50fd
CO		 1012 struct qeth_card *card;
1013
1014 card = CARD_FROM_CDEV(cdev);
1015
4a71df50
FB		 1016 if (!IS_ERR(irb))
1017 return 0;
1018
1019 switch (PTR_ERR(irb)) {
1020 case -EIO:
74eacdb9
FB		 1021 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1022 dev_name(&cdev->dev));
847a50fd
CO		 1023 QETH_CARD_TEXT(card, 2, "ckirberr");
1024 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1025 break;
1026 case -ETIMEDOUT:
74eacdb9
FB		 1027 dev_warn(&cdev->dev, "A hardware operation timed out"
1028 " on the device\n");
847a50fd
CO		 1029 QETH_CARD_TEXT(card, 2, "ckirberr");
1030 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1031 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 1032 if (card && (card->data.ccwdev == cdev)) {
1033 card->data.state = CH_STATE_DOWN;
1034 wake_up(&card->wait_q);
1035 }
1036 }
1037 break;
1038 default:
74eacdb9
FB		 1039 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1040 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1041 QETH_CARD_TEXT(card, 2, "ckirberr");
1042 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1043 }
1044 return PTR_ERR(irb);
1045}
1046
1047static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1048 struct irb *irb)
1049{
1050 int rc;
1051 int cstat, dstat;
1052 struct qeth_cmd_buffer *buffer;
1053 struct qeth_channel *channel;
1054 struct qeth_card *card;
1055 struct qeth_cmd_buffer *iob;
1056 __u8 index;
1057
4a71df50
FB		 1058 if (__qeth_check_irb_error(cdev, intparm, irb))
1059 return;
23d805b6
PO		 1060 cstat = irb->scsw.cmd.cstat;
1061 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1062
1063 card = CARD_FROM_CDEV(cdev);
1064 if (!card)
1065 return;
1066
847a50fd
CO		 1067 QETH_CARD_TEXT(card, 5, "irq");
1068
4a71df50
FB		 1069 if (card->read.ccwdev == cdev) {
1070 channel = &card->read;
847a50fd 1071 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1072 } else if (card->write.ccwdev == cdev) {
1073 channel = &card->write;
847a50fd 1074 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1075 } else {
1076 channel = &card->data;
847a50fd 1077 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1078 }
1079 atomic_set(&channel->irq_pending, 0);
1080
23d805b6 1081 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1082 channel->state = CH_STATE_STOPPED;
1083
23d805b6 1084 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1085 channel->state = CH_STATE_HALTED;
1086
1087 /*let's wake up immediately on data channel*/
1088 if ((channel == &card->data) && (intparm != 0) &&
1089 (intparm != QETH_RCD_PARM))
1090 goto out;
1091
1092 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1093 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1094 /* we don't have to handle this further */
1095 intparm = 0;
1096 }
1097 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1098 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1099 /* we don't have to handle this further */
1100 intparm = 0;
1101 }
1102 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1103 (dstat & DEV_STAT_UNIT_CHECK) ||
1104 (cstat)) {
1105 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1106 dev_warn(&channel->ccwdev->dev,
1107 "The qeth device driver failed to recover "
1108 "an error on the device\n");
1109 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1110 "0x%X dstat 0x%X\n",
1111 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1112 print_hex_dump(KERN_WARNING, "qeth: irb ",
1113 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1114 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1115 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1116 }
1117 if (intparm == QETH_RCD_PARM) {
1118 channel->state = CH_STATE_DOWN;
1119 goto out;
1120 }
1121 rc = qeth_get_problem(cdev, irb);
1122 if (rc) {
28a7e4c9 1123 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1124 qeth_schedule_recovery(card);
1125 goto out;
1126 }
1127 }
1128
1129 if (intparm == QETH_RCD_PARM) {
1130 channel->state = CH_STATE_RCD_DONE;
1131 goto out;
1132 }
1133 if (intparm) {
1134 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1135 buffer->state = BUF_STATE_PROCESSED;
1136 }
1137 if (channel == &card->data)
1138 return;
1139 if (channel == &card->read &&
1140 channel->state == CH_STATE_UP)
1141 qeth_issue_next_read(card);
1142
1143 iob = channel->iob;
1144 index = channel->buf_no;
1145 while (iob[index].state == BUF_STATE_PROCESSED) {
1146 if (iob[index].callback != NULL)
1147 iob[index].callback(channel, iob + index);
1148
1149 index = (index + 1) % QETH_CMD_BUFFER_NO;
1150 }
1151 channel->buf_no = index;
1152out:
1153 wake_up(&card->wait_q);
1154 return;
1155}
1156
b3332930 1157static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1158 struct qeth_qdio_out_buffer *buf,
b3332930 1159 enum iucv_tx_notify notification)
4a71df50 1160{
4a71df50
FB		 1161 struct sk_buff *skb;
1162
b3332930
FB		 1163 if (skb_queue_empty(&buf->skb_list))
1164 goto out;
1165 skb = skb_peek(&buf->skb_list);
1166 while (skb) {
1167 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1168 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1169 if (skb->protocol == ETH_P_AF_IUCV) {
1170 if (skb->sk) {
1171 struct iucv_sock *iucv = iucv_sk(skb->sk);
1172 iucv->sk_txnotify(skb, notification);
1173 }
1174 }
1175 if (skb_queue_is_last(&buf->skb_list, skb))
1176 skb = NULL;
1177 else
1178 skb = skb_queue_next(&buf->skb_list, skb);
1179 }
1180out:
1181 return;
1182}
1183
1184static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1185{
1186 struct sk_buff *skb;
72861ae7
EL		 1187 struct iucv_sock *iucv;
1188 int notify_general_error = 0;
1189
1190 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1191 notify_general_error = 1;
1192
1193 /* release may never happen from within CQ tasklet scope */
18af5c17 1194 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1195
b67d801f
UB		 1196 skb = skb_dequeue(&buf->skb_list);
1197 while (skb) {
b3332930
FB		 1198 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1199 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1200 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1201 if (skb->sk) {
1202 iucv = iucv_sk(skb->sk);
1203 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1204 }
1205 }
b67d801f
UB		 1206 atomic_dec(&skb->users);
1207 dev_kfree_skb_any(skb);
4a71df50
FB		 1208 skb = skb_dequeue(&buf->skb_list);
1209 }
b3332930
FB		 1210}
1211
1212static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1213 struct qeth_qdio_out_buffer *buf,
1214 enum qeth_qdio_buffer_states newbufstate)
1215{
1216 int i;
1217
1218 /* is PCI flag set on buffer? */
1219 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1220 atomic_dec(&queue->set_pci_flags_count);
1221
1222 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1223 qeth_release_skbs(buf);
1224 }
4a71df50 1225 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1226 if (buf->buffer->element[i].addr && buf->is_header[i])
1227 kmem_cache_free(qeth_core_header_cache,
1228 buf->buffer->element[i].addr);
1229 buf->is_header[i] = 0;
4a71df50
FB		 1230 buf->buffer->element[i].length = 0;
1231 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1232 buf->buffer->element[i].eflags = 0;
1233 buf->buffer->element[i].sflags = 0;
4a71df50 1234 }
3ec90878
JG		 1235 buf->buffer->element[15].eflags = 0;
1236 buf->buffer->element[15].sflags = 0;
4a71df50 1237 buf->next_element_to_fill = 0;
0da9581d
EL		 1238 atomic_set(&buf->state, newbufstate);
1239}
1240
1241static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1242{
1243 int j;
1244
1245 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1246 if (!q->bufs[j])
1247 continue;
72861ae7 1248 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1249 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1250 if (free) {
1251 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1252 q->bufs[j] = NULL;
1253 }
1254 }
4a71df50
FB		 1255}
1256
1257void qeth_clear_qdio_buffers(struct qeth_card *card)
1258{
0da9581d 1259 int i;
4a71df50 1260
847a50fd 1261 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1262 /* clear outbound buffers to free skbs */
0da9581d 1263 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1264 if (card->qdio.out_qs[i]) {
0da9581d 1265 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1266 }
0da9581d 1267 }
4a71df50
FB		 1268}
1269EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1270
1271static void qeth_free_buffer_pool(struct qeth_card *card)
1272{
1273 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1274 int i = 0;
4a71df50
FB		 1275 list_for_each_entry_safe(pool_entry, tmp,
1276 &card->qdio.init_pool.entry_list, init_list){
1277 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1278 free_page((unsigned long)pool_entry->elements[i]);
1279 list_del(&pool_entry->init_list);
1280 kfree(pool_entry);
1281 }
1282}
1283
1284static void qeth_free_qdio_buffers(struct qeth_card *card)
1285{
b3332930 1286 int i, j;
4a71df50 1287
4a71df50
FB		 1288 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1289 QETH_QDIO_UNINITIALIZED)
1290 return;
0da9581d
EL		 1291
1292 qeth_free_cq(card);
b3332930 1293 cancel_delayed_work_sync(&card->buffer_reclaim_work);
ede88671
SR		 1294 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1295 if (card->qdio.in_q->bufs[j].rx_skb)
1296 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
1297 }
4a71df50
FB		 1298 kfree(card->qdio.in_q);
1299 card->qdio.in_q = NULL;
1300 /* inbound buffer pool */
1301 qeth_free_buffer_pool(card);
1302 /* free outbound qdio_qs */
1303 if (card->qdio.out_qs) {
1304 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1305 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1306 kfree(card->qdio.out_qs[i]);
1307 }
1308 kfree(card->qdio.out_qs);
1309 card->qdio.out_qs = NULL;
1310 }
1311}
1312
1313static void qeth_clean_channel(struct qeth_channel *channel)
1314{
1315 int cnt;
1316
d11ba0c4 1317 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1318 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1319 kfree(channel->iob[cnt].data);
1320}
1321
725b9c04
SO		 1322static void qeth_set_single_write_queues(struct qeth_card *card)
1323{
1324 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1325 (card->qdio.no_out_queues == 4))
1326 qeth_free_qdio_buffers(card);
1327
1328 card->qdio.no_out_queues = 1;
1329 if (card->qdio.default_out_queue != 0)
1330 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1331
1332 card->qdio.default_out_queue = 0;
1333}
1334
1335static void qeth_set_multiple_write_queues(struct qeth_card *card)
1336{
1337 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1338 (card->qdio.no_out_queues == 1)) {
1339 qeth_free_qdio_buffers(card);
1340 card->qdio.default_out_queue = 2;
1341 }
1342 card->qdio.no_out_queues = 4;
1343}
1344
1345static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1346{
4a71df50
FB		 1347 struct ccw_device *ccwdev;
1348 struct channelPath_dsc {
1349 u8 flags;
1350 u8 lsn;
1351 u8 desc;
1352 u8 chpid;
1353 u8 swla;
1354 u8 zeroes;
1355 u8 chla;
1356 u8 chpp;
1357 } *chp_dsc;
1358
5113fec0 1359 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1360
1361 ccwdev = card->data.ccwdev;
725b9c04
SO		 1362 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1363 if (!chp_dsc)
1364 goto out;
1365
1366 card->info.func_level = 0x4100 + chp_dsc->desc;
1367 if (card->info.type == QETH_CARD_TYPE_IQD)
1368 goto out;
1369
1370 /* CHPP field bit 6 == 1 -> single queue */
1371 if ((chp_dsc->chpp & 0x02) == 0x02)
1372 qeth_set_single_write_queues(card);
1373 else
1374 qeth_set_multiple_write_queues(card);
1375out:
1376 kfree(chp_dsc);
5113fec0
UB		 1377 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1378 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1379}
1380
1381static void qeth_init_qdio_info(struct qeth_card *card)
1382{
d11ba0c4 1383 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1384 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1385 /* inbound */
1386 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1387 if (card->info.type == QETH_CARD_TYPE_IQD)
1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1389 else
1390 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1391 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1392 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1393 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1394}
1395
1396static void qeth_set_intial_options(struct qeth_card *card)
1397{
1398 card->options.route4.type = NO_ROUTER;
1399 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1400 card->options.fake_broadcast = 0;
1401 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1402 card->options.performance_stats = 0;
1403 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1404 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1405 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1406}
1407
1408static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1409{
1410 unsigned long flags;
1411 int rc = 0;
1412
1413 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1414 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1415 (u8) card->thread_start_mask,
1416 (u8) card->thread_allowed_mask,
1417 (u8) card->thread_running_mask);
1418 rc = (card->thread_start_mask & thread);
1419 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1420 return rc;
1421}
1422
1423static void qeth_start_kernel_thread(struct work_struct *work)
1424{
3f36b890 1425 struct task_struct *ts;
4a71df50
FB		 1426 struct qeth_card *card = container_of(work, struct qeth_card,
1427 kernel_thread_starter);
847a50fd 1428 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1429
1430 if (card->read.state != CH_STATE_UP &&
1431 card->write.state != CH_STATE_UP)
1432 return;
3f36b890 1433 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1434 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1435 "qeth_recover");
3f36b890
FB		 1436 if (IS_ERR(ts)) {
1437 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1438 qeth_clear_thread_running_bit(card,
1439 QETH_RECOVER_THREAD);
1440 }
1441 }
4a71df50
FB		 1442}
1443
1444static int qeth_setup_card(struct qeth_card *card)
1445{
1446
d11ba0c4
PT		 1447 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1448 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1449
1450 card->read.state = CH_STATE_DOWN;
1451 card->write.state = CH_STATE_DOWN;
1452 card->data.state = CH_STATE_DOWN;
1453 card->state = CARD_STATE_DOWN;
1454 card->lan_online = 0;
908abbb5 1455 card->read_or_write_problem = 0;
4a71df50
FB		 1456 card->dev = NULL;
1457 spin_lock_init(&card->vlanlock);
1458 spin_lock_init(&card->mclock);
4a71df50
FB		 1459 spin_lock_init(&card->lock);
1460 spin_lock_init(&card->ip_lock);
1461 spin_lock_init(&card->thread_mask_lock);
c4949f07 1462 mutex_init(&card->conf_mutex);
9dc48ccc 1463 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1464 card->thread_start_mask = 0;
1465 card->thread_allowed_mask = 0;
1466 card->thread_running_mask = 0;
1467 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1468 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1469 INIT_LIST_HEAD(card->ip_tbd_list);
1470 INIT_LIST_HEAD(&card->cmd_waiter_list);
1471 init_waitqueue_head(&card->wait_q);
25985edc 1472 /* initial options */
4a71df50
FB		 1473 qeth_set_intial_options(card);
1474 /* IP address takeover */
1475 INIT_LIST_HEAD(&card->ipato.entries);
1476 card->ipato.enabled = 0;
1477 card->ipato.invert4 = 0;
1478 card->ipato.invert6 = 0;
1479 /* init QDIO stuff */
1480 qeth_init_qdio_info(card);
b3332930 1481 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1482 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1483 return 0;
1484}
1485
6bcac508
MS		 1486static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1487{
1488 struct qeth_card *card = container_of(slr, struct qeth_card,
1489 qeth_service_level);
0d788c7d
KDW		 1490 if (card->info.mcl_level[0])
1491 seq_printf(m, "qeth: %s firmware level %s\n",
1492 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1493}
1494
4a71df50
FB		 1495static struct qeth_card *qeth_alloc_card(void)
1496{
1497 struct qeth_card *card;
1498
d11ba0c4 1499 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1500 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1501 if (!card)
76b11f8e 1502 goto out;
d11ba0c4 1503 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1504 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1505 if (!card->ip_tbd_list) {
1506 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1507 goto out_card;
4a71df50 1508 }
76b11f8e
UB		 1509 if (qeth_setup_channel(&card->read))
1510 goto out_ip;
1511 if (qeth_setup_channel(&card->write))
1512 goto out_channel;
4a71df50 1513 card->options.layer2 = -1;
6bcac508
MS		 1514 card->qeth_service_level.seq_print = qeth_core_sl_print;
1515 register_service_level(&card->qeth_service_level);
4a71df50 1516 return card;
76b11f8e
UB		 1517
1518out_channel:
1519 qeth_clean_channel(&card->read);
1520out_ip:
1521 kfree(card->ip_tbd_list);
1522out_card:
1523 kfree(card);
1524out:
1525 return NULL;
4a71df50
FB		 1526}
1527
1528static int qeth_determine_card_type(struct qeth_card *card)
1529{
1530 int i = 0;
1531
d11ba0c4 1532 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1533
1534 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1535 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1536 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1537 if ((CARD_RDEV(card)->id.dev_type ==
1538 known_devices[i][QETH_DEV_TYPE_IND]) &&
1539 (CARD_RDEV(card)->id.dev_model ==
1540 known_devices[i][QETH_DEV_MODEL_IND])) {
1541 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1542 card->qdio.no_out_queues =
1543 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1544 card->qdio.no_in_queues = 1;
5113fec0
UB		 1545 card->info.is_multicast_different =
1546 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1547 qeth_update_from_chp_desc(card);
4a71df50
FB		 1548 return 0;
1549 }
1550 i++;
1551 }
1552 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1553 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1554 "unknown type\n");
4a71df50
FB		 1555 return -ENOENT;
1556}
1557
1558static int qeth_clear_channel(struct qeth_channel *channel)
1559{
1560 unsigned long flags;
1561 struct qeth_card *card;
1562 int rc;
1563
4a71df50 1564 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1565 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1566 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1567 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1568 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1569
1570 if (rc)
1571 return rc;
1572 rc = wait_event_interruptible_timeout(card->wait_q,
1573 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1574 if (rc == -ERESTARTSYS)
1575 return rc;
1576 if (channel->state != CH_STATE_STOPPED)
1577 return -ETIME;
1578 channel->state = CH_STATE_DOWN;
1579 return 0;
1580}
1581
1582static int qeth_halt_channel(struct qeth_channel *channel)
1583{
1584 unsigned long flags;
1585 struct qeth_card *card;
1586 int rc;
1587
4a71df50 1588 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1589 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1590 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1591 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1592 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1593
1594 if (rc)
1595 return rc;
1596 rc = wait_event_interruptible_timeout(card->wait_q,
1597 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1598 if (rc == -ERESTARTSYS)
1599 return rc;
1600 if (channel->state != CH_STATE_HALTED)
1601 return -ETIME;
1602 return 0;
1603}
1604
1605static int qeth_halt_channels(struct qeth_card *card)
1606{
1607 int rc1 = 0, rc2 = 0, rc3 = 0;
1608
847a50fd 1609 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1610 rc1 = qeth_halt_channel(&card->read);
1611 rc2 = qeth_halt_channel(&card->write);
1612 rc3 = qeth_halt_channel(&card->data);
1613 if (rc1)
1614 return rc1;
1615 if (rc2)
1616 return rc2;
1617 return rc3;
1618}
1619
1620static int qeth_clear_channels(struct qeth_card *card)
1621{
1622 int rc1 = 0, rc2 = 0, rc3 = 0;
1623
847a50fd 1624 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1625 rc1 = qeth_clear_channel(&card->read);
1626 rc2 = qeth_clear_channel(&card->write);
1627 rc3 = qeth_clear_channel(&card->data);
1628 if (rc1)
1629 return rc1;
1630 if (rc2)
1631 return rc2;
1632 return rc3;
1633}
1634
1635static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1636{
1637 int rc = 0;
1638
847a50fd 1639 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1640
1641 if (halt)
1642 rc = qeth_halt_channels(card);
1643 if (rc)
1644 return rc;
1645 return qeth_clear_channels(card);
1646}
1647
1648int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1649{
1650 int rc = 0;
1651
847a50fd 1652 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1653 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1654 QETH_QDIO_CLEANING)) {
1655 case QETH_QDIO_ESTABLISHED:
1656 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1657 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1658 QDIO_FLAG_CLEANUP_USING_HALT);
1659 else
cc961d40 1660 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1661 QDIO_FLAG_CLEANUP_USING_CLEAR);
1662 if (rc)
847a50fd 1663 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1664 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1665 break;
1666 case QETH_QDIO_CLEANING:
1667 return rc;
1668 default:
1669 break;
1670 }
1671 rc = qeth_clear_halt_card(card, use_halt);
1672 if (rc)
847a50fd 1673 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1674 card->state = CARD_STATE_DOWN;
1675 return rc;
1676}
1677EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1678
1679static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1680 int *length)
1681{
1682 struct ciw *ciw;
1683 char *rcd_buf;
1684 int ret;
1685 struct qeth_channel *channel = &card->data;
1686 unsigned long flags;
1687
1688 /*
1689 * scan for RCD command in extended SenseID data
1690 */
1691 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1692 if (!ciw || ciw->cmd == 0)
1693 return -EOPNOTSUPP;
1694 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1695 if (!rcd_buf)
1696 return -ENOMEM;
1697
1698 channel->ccw.cmd_code = ciw->cmd;
1699 channel->ccw.cda = (__u32) __pa(rcd_buf);
1700 channel->ccw.count = ciw->count;
1701 channel->ccw.flags = CCW_FLAG_SLI;
1702 channel->state = CH_STATE_RCD;
1703 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1704 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1705 QETH_RCD_PARM, LPM_ANYPATH, 0,
1706 QETH_RCD_TIMEOUT);
1707 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1708 if (!ret)
1709 wait_event(card->wait_q,
1710 (channel->state == CH_STATE_RCD_DONE ||
1711 channel->state == CH_STATE_DOWN));
1712 if (channel->state == CH_STATE_DOWN)
1713 ret = -EIO;
1714 else
1715 channel->state = CH_STATE_DOWN;
1716 if (ret) {
1717 kfree(rcd_buf);
1718 *buffer = NULL;
1719 *length = 0;
1720 } else {
1721 *length = ciw->count;
1722 *buffer = rcd_buf;
1723 }
1724 return ret;
1725}
1726
a60389ab 1727static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1728{
a60389ab 1729 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1730 card->info.chpid = prcd[30];
1731 card->info.unit_addr2 = prcd[31];
1732 card->info.cula = prcd[63];
1733 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1734 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1735}
1736
1737static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1738{
1739 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1740
e6e056ba 1741 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1742 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1743 card->info.blkt.time_total = 0;
1744 card->info.blkt.inter_packet = 0;
1745 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1746 } else {
1747 card->info.blkt.time_total = 250;
1748 card->info.blkt.inter_packet = 5;
1749 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1750 }
4a71df50
FB		 1751}
1752
1753static void qeth_init_tokens(struct qeth_card *card)
1754{
1755 card->token.issuer_rm_w = 0x00010103UL;
1756 card->token.cm_filter_w = 0x00010108UL;
1757 card->token.cm_connection_w = 0x0001010aUL;
1758 card->token.ulp_filter_w = 0x0001010bUL;
1759 card->token.ulp_connection_w = 0x0001010dUL;
1760}
1761
1762static void qeth_init_func_level(struct qeth_card *card)
1763{
5113fec0
UB		 1764 switch (card->info.type) {
1765 case QETH_CARD_TYPE_IQD:
6298263a 1766 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1767 break;
1768 case QETH_CARD_TYPE_OSD:
0132951e 1769 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1770 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1771 break;
1772 default:
1773 break;
4a71df50
FB		 1774 }
1775}
1776
4a71df50
FB		 1777static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1778 void (*idx_reply_cb)(struct qeth_channel *,
1779 struct qeth_cmd_buffer *))
1780{
1781 struct qeth_cmd_buffer *iob;
1782 unsigned long flags;
1783 int rc;
1784 struct qeth_card *card;
1785
d11ba0c4 1786 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1787 card = CARD_FROM_CDEV(channel->ccwdev);
1788 iob = qeth_get_buffer(channel);
1789 iob->callback = idx_reply_cb;
1790 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1791 channel->ccw.count = QETH_BUFSIZE;
1792 channel->ccw.cda = (__u32) __pa(iob->data);
1793
1794 wait_event(card->wait_q,
1795 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1796 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1797 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1798 rc = ccw_device_start(channel->ccwdev,
1799 &channel->ccw, (addr_t) iob, 0, 0);
1800 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1801
1802 if (rc) {
14cc21b6 1803 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1804 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1805 atomic_set(&channel->irq_pending, 0);
1806 wake_up(&card->wait_q);
1807 return rc;
1808 }
1809 rc = wait_event_interruptible_timeout(card->wait_q,
1810 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1811 if (rc == -ERESTARTSYS)
1812 return rc;
1813 if (channel->state != CH_STATE_UP) {
1814 rc = -ETIME;
d11ba0c4 1815 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1816 qeth_clear_cmd_buffers(channel);
1817 } else
1818 rc = 0;
1819 return rc;
1820}
1821
1822static int qeth_idx_activate_channel(struct qeth_channel *channel,
1823 void (*idx_reply_cb)(struct qeth_channel *,
1824 struct qeth_cmd_buffer *))
1825{
1826 struct qeth_card *card;
1827 struct qeth_cmd_buffer *iob;
1828 unsigned long flags;
1829 __u16 temp;
1830 __u8 tmp;
1831 int rc;
f06f6f32 1832 struct ccw_dev_id temp_devid;
4a71df50
FB		 1833
1834 card = CARD_FROM_CDEV(channel->ccwdev);
1835
d11ba0c4 1836 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1837
1838 iob = qeth_get_buffer(channel);
1839 iob->callback = idx_reply_cb;
1840 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1841 channel->ccw.count = IDX_ACTIVATE_SIZE;
1842 channel->ccw.cda = (__u32) __pa(iob->data);
1843 if (channel == &card->write) {
1844 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1845 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1846 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1847 card->seqno.trans_hdr++;
1848 } else {
1849 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1850 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1851 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1852 }
1853 tmp = ((__u8)card->info.portno) | 0x80;
1854 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1855 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1856 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1857 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1858 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1859 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1860 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1861 temp = (card->info.cula << 8) + card->info.unit_addr2;
1862 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1863
1864 wait_event(card->wait_q,
1865 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1866 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1867 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1868 rc = ccw_device_start(channel->ccwdev,
1869 &channel->ccw, (addr_t) iob, 0, 0);
1870 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1871
1872 if (rc) {
14cc21b6
FB		 1873 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1874 rc);
d11ba0c4 1875 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1876 atomic_set(&channel->irq_pending, 0);
1877 wake_up(&card->wait_q);
1878 return rc;
1879 }
1880 rc = wait_event_interruptible_timeout(card->wait_q,
1881 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1882 if (rc == -ERESTARTSYS)
1883 return rc;
1884 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1885 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1886 " failed to recover an error on the device\n");
1887 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1888 dev_name(&channel->ccwdev->dev));
d11ba0c4 1889 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1890 qeth_clear_cmd_buffers(channel);
1891 return -ETIME;
1892 }
1893 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1894}
1895
1896static int qeth_peer_func_level(int level)
1897{
1898 if ((level & 0xff) == 8)
1899 return (level & 0xff) + 0x400;
1900 if (((level >> 8) & 3) == 1)
1901 return (level & 0xff) + 0x200;
1902 return level;
1903}
1904
1905static void qeth_idx_write_cb(struct qeth_channel *channel,
1906 struct qeth_cmd_buffer *iob)
1907{
1908 struct qeth_card *card;
1909 __u16 temp;
1910
d11ba0c4 1911 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1912
1913 if (channel->state == CH_STATE_DOWN) {
1914 channel->state = CH_STATE_ACTIVATING;
1915 goto out;
1916 }
1917 card = CARD_FROM_CDEV(channel->ccwdev);
1918
1919 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1920 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1921 dev_err(&card->write.ccwdev->dev,
1922 "The adapter is used exclusively by another "
1923 "host\n");
4a71df50 1924 else
74eacdb9
FB		 1925 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1926 " negative reply\n",
1927 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1928 goto out;
1929 }
1930 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1931 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1932 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1933 "function level mismatch (sent: 0x%x, received: "
1934 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1935 card->info.func_level, temp);
4a71df50
FB		 1936 goto out;
1937 }
1938 channel->state = CH_STATE_UP;
1939out:
1940 qeth_release_buffer(channel, iob);
1941}
1942
1943static void qeth_idx_read_cb(struct qeth_channel *channel,
1944 struct qeth_cmd_buffer *iob)
1945{
1946 struct qeth_card *card;
1947 __u16 temp;
1948
d11ba0c4 1949 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1950 if (channel->state == CH_STATE_DOWN) {
1951 channel->state = CH_STATE_ACTIVATING;
1952 goto out;
1953 }
1954
1955 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1956 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1957 goto out;
1958
1959 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1960 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1961 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1962 dev_err(&card->write.ccwdev->dev,
1963 "The adapter is used exclusively by another "
1964 "host\n");
5113fec0
UB		 1965 break;
1966 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1967 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1968 dev_err(&card->read.ccwdev->dev,
1969 "Setting the device online failed because of "
01fc3e86 1970 "insufficient authorization\n");
5113fec0
UB		 1971 break;
1972 default:
74eacdb9
FB		 1973 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1974 " negative reply\n",
1975 dev_name(&card->read.ccwdev->dev));
5113fec0 1976 }
01fc3e86
UB		 1977 QETH_CARD_TEXT_(card, 2, "idxread%c",
1978 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1979 goto out;
1980 }
1981
1982/**
5113fec0
UB		 1983 * * temporary fix for microcode bug
1984 * * to revert it,replace OR by AND
1985 * */
4a71df50 1986 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1987 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1988 card->info.portname_required = 1;
1989
1990 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1991 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1992 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1993 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1994 dev_name(&card->read.ccwdev->dev),
1995 card->info.func_level, temp);
4a71df50
FB		 1996 goto out;
1997 }
1998 memcpy(&card->token.issuer_rm_r,
1999 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2000 QETH_MPC_TOKEN_LENGTH);
2001 memcpy(&card->info.mcl_level[0],
2002 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2003 channel->state = CH_STATE_UP;
2004out:
2005 qeth_release_buffer(channel, iob);
2006}
2007
2008void qeth_prepare_control_data(struct qeth_card *card, int len,
2009 struct qeth_cmd_buffer *iob)
2010{
2011 qeth_setup_ccw(&card->write, iob->data, len);
2012 iob->callback = qeth_release_buffer;
2013
2014 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2015 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2016 card->seqno.trans_hdr++;
2017 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2018 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2019 card->seqno.pdu_hdr++;
2020 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2021 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2022 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2023}
2024EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2025
2026int qeth_send_control_data(struct qeth_card *card, int len,
2027 struct qeth_cmd_buffer *iob,
2028 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
2029 unsigned long),
2030 void *reply_param)
2031{
2032 int rc;
2033 unsigned long flags;
2034 struct qeth_reply *reply = NULL;
7834cd5a 2035 unsigned long timeout, event_timeout;
5b54e16f 2036 struct qeth_ipa_cmd *cmd;
4a71df50 2037
847a50fd 2038 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2039
908abbb5
UB		 2040 if (card->read_or_write_problem) {
2041 qeth_release_buffer(iob->channel, iob);
2042 return -EIO;
2043 }
4a71df50
FB		 2044 reply = qeth_alloc_reply(card);
2045 if (!reply) {
4a71df50
FB		 2046 return -ENOMEM;
2047 }
2048 reply->callback = reply_cb;
2049 reply->param = reply_param;
2050 if (card->state == CARD_STATE_DOWN)
2051 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2052 else
2053 reply->seqno = card->seqno.ipa++;
2054 init_waitqueue_head(&reply->wait_q);
2055 spin_lock_irqsave(&card->lock, flags);
2056 list_add_tail(&reply->list, &card->cmd_waiter_list);
2057 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 2058 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2059
2060 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2061 qeth_prepare_control_data(card, len, iob);
2062
2063 if (IS_IPA(iob->data))
7834cd5a 2064 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2065 else
7834cd5a
HC		 2066 event_timeout = QETH_TIMEOUT;
2067 timeout = jiffies + event_timeout;
4a71df50 2068
847a50fd 2069 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2070 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2071 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2072 (addr_t) iob, 0, 0);
2073 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2074 if (rc) {
74eacdb9
FB		 2075 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2076 "ccw_device_start rc = %i\n",
2077 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2078 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2079 spin_lock_irqsave(&card->lock, flags);
2080 list_del_init(&reply->list);
2081 qeth_put_reply(reply);
2082 spin_unlock_irqrestore(&card->lock, flags);
2083 qeth_release_buffer(iob->channel, iob);
2084 atomic_set(&card->write.irq_pending, 0);
2085 wake_up(&card->wait_q);
2086 return rc;
2087 }
5b54e16f
FB		 2088
2089 /* we have only one long running ipassist, since we can ensure
2090 process context of this command we can sleep */
2091 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2092 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2093 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2094 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2095 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2096 goto time_err;
2097 } else {
2098 while (!atomic_read(&reply->received)) {
2099 if (time_after(jiffies, timeout))
2100 goto time_err;
2101 cpu_relax();
6531084c 2102 }
5b54e16f
FB		 2103 }
2104
70919e23
UB		 2105 if (reply->rc == -EIO)
2106 goto error;
5b54e16f
FB		 2107 rc = reply->rc;
2108 qeth_put_reply(reply);
2109 return rc;
2110
2111time_err:
70919e23 2112 reply->rc = -ETIME;
5b54e16f
FB		 2113 spin_lock_irqsave(&reply->card->lock, flags);
2114 list_del_init(&reply->list);
2115 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2116 atomic_inc(&reply->received);
70919e23 2117error:
908abbb5
UB		 2118 atomic_set(&card->write.irq_pending, 0);
2119 qeth_release_buffer(iob->channel, iob);
2120 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2121 rc = reply->rc;
2122 qeth_put_reply(reply);
2123 return rc;
2124}
2125EXPORT_SYMBOL_GPL(qeth_send_control_data);
2126
2127static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2128 unsigned long data)
2129{
2130 struct qeth_cmd_buffer *iob;
2131
d11ba0c4 2132 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2133
2134 iob = (struct qeth_cmd_buffer *) data;
2135 memcpy(&card->token.cm_filter_r,
2136 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2137 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2138 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2139 return 0;
2140}
2141
2142static int qeth_cm_enable(struct qeth_card *card)
2143{
2144 int rc;
2145 struct qeth_cmd_buffer *iob;
2146
d11ba0c4 2147 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2148
2149 iob = qeth_wait_for_buffer(&card->write);
2150 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2151 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2152 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2153 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2154 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2155
2156 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2157 qeth_cm_enable_cb, NULL);
2158 return rc;
2159}
2160
2161static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2162 unsigned long data)
2163{
2164
2165 struct qeth_cmd_buffer *iob;
2166
d11ba0c4 2167 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2168
2169 iob = (struct qeth_cmd_buffer *) data;
2170 memcpy(&card->token.cm_connection_r,
2171 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2172 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2173 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2174 return 0;
2175}
2176
2177static int qeth_cm_setup(struct qeth_card *card)
2178{
2179 int rc;
2180 struct qeth_cmd_buffer *iob;
2181
d11ba0c4 2182 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2183
2184 iob = qeth_wait_for_buffer(&card->write);
2185 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2186 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2187 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2188 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2189 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2190 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2191 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2192 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2193 qeth_cm_setup_cb, NULL);
2194 return rc;
2195
2196}
2197
2198static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2199{
2200 switch (card->info.type) {
2201 case QETH_CARD_TYPE_UNKNOWN:
2202 return 1500;
2203 case QETH_CARD_TYPE_IQD:
2204 return card->info.max_mtu;
5113fec0 2205 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2206 switch (card->info.link_type) {
2207 case QETH_LINK_TYPE_HSTR:
2208 case QETH_LINK_TYPE_LANE_TR:
2209 return 2000;
2210 default:
fe44014a 2211 return card->options.layer2 ? 1500 : 1492;
4a71df50 2212 }
5113fec0
UB		 2213 case QETH_CARD_TYPE_OSM:
2214 case QETH_CARD_TYPE_OSX:
fe44014a 2215 return card->options.layer2 ? 1500 : 1492;
4a71df50
FB		 2216 default:
2217 return 1500;
2218 }
2219}
2220
4a71df50
FB		 2221static inline int qeth_get_mtu_outof_framesize(int framesize)
2222{
2223 switch (framesize) {
2224 case 0x4000:
2225 return 8192;
2226 case 0x6000:
2227 return 16384;
2228 case 0xa000:
2229 return 32768;
2230 case 0xffff:
2231 return 57344;
2232 default:
2233 return 0;
2234 }
2235}
2236
2237static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2238{
2239 switch (card->info.type) {
5113fec0
UB		 2240 case QETH_CARD_TYPE_OSD:
2241 case QETH_CARD_TYPE_OSM:
2242 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2243 case QETH_CARD_TYPE_IQD:
2244 return ((mtu >= 576) &&
9853b97b 2245 (mtu <= card->info.max_mtu));
4a71df50
FB		 2246 case QETH_CARD_TYPE_OSN:
2247 case QETH_CARD_TYPE_UNKNOWN:
2248 default:
2249 return 1;
2250 }
2251}
2252
2253static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2254 unsigned long data)
2255{
2256
2257 __u16 mtu, framesize;
2258 __u16 len;
2259 __u8 link_type;
2260 struct qeth_cmd_buffer *iob;
2261
d11ba0c4 2262 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2263
2264 iob = (struct qeth_cmd_buffer *) data;
2265 memcpy(&card->token.ulp_filter_r,
2266 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2267 QETH_MPC_TOKEN_LENGTH);
9853b97b 2268 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2269 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2270 mtu = qeth_get_mtu_outof_framesize(framesize);
2271 if (!mtu) {
2272 iob->rc = -EINVAL;
d11ba0c4 2273 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2274 return 0;
2275 }
8b2e18f6
UB		 2276 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2277 /* frame size has changed */
2278 if (card->dev &&
2279 ((card->dev->mtu == card->info.initial_mtu) ||
2280 (card->dev->mtu > mtu)))
2281 card->dev->mtu = mtu;
2282 qeth_free_qdio_buffers(card);
2283 }
4a71df50 2284 card->info.initial_mtu = mtu;
8b2e18f6 2285 card->info.max_mtu = mtu;
4a71df50
FB		 2286 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2287 } else {
9853b97b
FB		 2288 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2289 iob->data);
fe44014a
SR		 2290 card->info.initial_mtu = min(card->info.max_mtu,
2291 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2292 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2293 }
2294
2295 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2296 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2297 memcpy(&link_type,
2298 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2299 card->info.link_type = link_type;
2300 } else
2301 card->info.link_type = 0;
01fc3e86 2302 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2303 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2304 return 0;
2305}
2306
2307static int qeth_ulp_enable(struct qeth_card *card)
2308{
2309 int rc;
2310 char prot_type;
2311 struct qeth_cmd_buffer *iob;
2312
2313 /*FIXME: trace view callbacks*/
d11ba0c4 2314 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2315
2316 iob = qeth_wait_for_buffer(&card->write);
2317 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2318
2319 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2320 (__u8) card->info.portno;
2321 if (card->options.layer2)
2322 if (card->info.type == QETH_CARD_TYPE_OSN)
2323 prot_type = QETH_PROT_OSN2;
2324 else
2325 prot_type = QETH_PROT_LAYER2;
2326 else
2327 prot_type = QETH_PROT_TCPIP;
2328
2329 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2330 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2331 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2332 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2333 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2334 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2335 card->info.portname, 9);
2336 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2337 qeth_ulp_enable_cb, NULL);
2338 return rc;
2339
2340}
2341
2342static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2343 unsigned long data)
2344{
2345 struct qeth_cmd_buffer *iob;
2346
d11ba0c4 2347 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2348
2349 iob = (struct qeth_cmd_buffer *) data;
2350 memcpy(&card->token.ulp_connection_r,
2351 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2352 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2353 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2354 3)) {
2355 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2356 dev_err(&card->gdev->dev, "A connection could not be "
2357 "established because of an OLM limit\n");
bbb822a8 2358 iob->rc = -EMLINK;
65a1f898 2359 }
d11ba0c4 2360 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2361 return 0;
4a71df50
FB		 2362}
2363
2364static int qeth_ulp_setup(struct qeth_card *card)
2365{
2366 int rc;
2367 __u16 temp;
2368 struct qeth_cmd_buffer *iob;
2369 struct ccw_dev_id dev_id;
2370
d11ba0c4 2371 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2372
2373 iob = qeth_wait_for_buffer(&card->write);
2374 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2375
2376 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2377 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2378 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2379 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2380 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2381 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2382
2383 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2384 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2385 temp = (card->info.cula << 8) + card->info.unit_addr2;
2386 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2387 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2388 qeth_ulp_setup_cb, NULL);
2389 return rc;
2390}
2391
0da9581d
EL		 2392static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2393{
2394 int rc;
2395 struct qeth_qdio_out_buffer *newbuf;
2396
2397 rc = 0;
2398 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2399 if (!newbuf) {
2400 rc = -ENOMEM;
2401 goto out;
2402 }
2403 newbuf->buffer = &q->qdio_bufs[bidx];
2404 skb_queue_head_init(&newbuf->skb_list);
2405 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2406 newbuf->q = q;
2407 newbuf->aob = NULL;
2408 newbuf->next_pending = q->bufs[bidx];
2409 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2410 q->bufs[bidx] = newbuf;
2411 if (q->bufstates) {
2412 q->bufstates[bidx].user = newbuf;
2413 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2414 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2415 QETH_CARD_TEXT_(q->card, 2, "%lx",
2416 (long) newbuf->next_pending);
2417 }
2418out:
2419 return rc;
2420}
2421
2422
4a71df50
FB		 2423static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2424{
2425 int i, j;
2426
d11ba0c4 2427 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2428
2429 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2430 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2431 return 0;
2432
b3332930 2433 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2434 GFP_KERNEL);
4a71df50
FB		 2435 if (!card->qdio.in_q)
2436 goto out_nomem;
d11ba0c4
PT		 2437 QETH_DBF_TEXT(SETUP, 2, "inq");
2438 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2439 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2440 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2441 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2442 card->qdio.in_q->bufs[i].buffer =
2443 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2444 card->qdio.in_q->bufs[i].rx_skb = NULL;
2445 }
4a71df50
FB		 2446 /* inbound buffer pool */
2447 if (qeth_alloc_buffer_pool(card))
2448 goto out_freeinq;
0da9581d 2449
4a71df50
FB		 2450 /* outbound */
2451 card->qdio.out_qs =
b3332930 2452 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2453 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2454 if (!card->qdio.out_qs)
2455 goto out_freepool;
2456 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2457 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2458 GFP_KERNEL);
4a71df50
FB		 2459 if (!card->qdio.out_qs[i])
2460 goto out_freeoutq;
d11ba0c4
PT		 2461 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2462 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2463 card->qdio.out_qs[i]->queue_no = i;
2464 /* give outbound qeth_qdio_buffers their qdio_buffers */
2465 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2466 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2467 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2468 goto out_freeoutqbufs;
4a71df50
FB		 2469 }
2470 }
0da9581d
EL		 2471
2472 /* completion */
2473 if (qeth_alloc_cq(card))
2474 goto out_freeoutq;
2475
4a71df50
FB		 2476 return 0;
2477
0da9581d
EL		 2478out_freeoutqbufs:
2479 while (j > 0) {
2480 --j;
2481 kmem_cache_free(qeth_qdio_outbuf_cache,
2482 card->qdio.out_qs[i]->bufs[j]);
2483 card->qdio.out_qs[i]->bufs[j] = NULL;
2484 }
4a71df50 2485out_freeoutq:
0da9581d 2486 while (i > 0) {
4a71df50 2487 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2488 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2489 }
4a71df50
FB		 2490 kfree(card->qdio.out_qs);
2491 card->qdio.out_qs = NULL;
2492out_freepool:
2493 qeth_free_buffer_pool(card);
2494out_freeinq:
2495 kfree(card->qdio.in_q);
2496 card->qdio.in_q = NULL;
2497out_nomem:
2498 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2499 return -ENOMEM;
2500}
2501
2502static void qeth_create_qib_param_field(struct qeth_card *card,
2503 char *param_field)
2504{
2505
2506 param_field[0] = _ascebc['P'];
2507 param_field[1] = _ascebc['C'];
2508 param_field[2] = _ascebc['I'];
2509 param_field[3] = _ascebc['T'];
2510 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2511 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2512 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2513}
2514
2515static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2516 char *param_field)
2517{
2518 param_field[16] = _ascebc['B'];
2519 param_field[17] = _ascebc['L'];
2520 param_field[18] = _ascebc['K'];
2521 param_field[19] = _ascebc['T'];
2522 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2523 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2524 *((unsigned int *) (&param_field[28])) =
2525 card->info.blkt.inter_packet_jumbo;
2526}
2527
2528static int qeth_qdio_activate(struct qeth_card *card)
2529{
d11ba0c4 2530 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2531 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2532}
2533
2534static int qeth_dm_act(struct qeth_card *card)
2535{
2536 int rc;
2537 struct qeth_cmd_buffer *iob;
2538
d11ba0c4 2539 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2540
2541 iob = qeth_wait_for_buffer(&card->write);
2542 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2543
2544 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2545 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2546 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2547 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2548 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2549 return rc;
2550}
2551
2552static int qeth_mpc_initialize(struct qeth_card *card)
2553{
2554 int rc;
2555
d11ba0c4 2556 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2557
2558 rc = qeth_issue_next_read(card);
2559 if (rc) {
d11ba0c4 2560 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2561 return rc;
2562 }
2563 rc = qeth_cm_enable(card);
2564 if (rc) {
d11ba0c4 2565 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2566 goto out_qdio;
2567 }
2568 rc = qeth_cm_setup(card);
2569 if (rc) {
d11ba0c4 2570 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2571 goto out_qdio;
2572 }
2573 rc = qeth_ulp_enable(card);
2574 if (rc) {
d11ba0c4 2575 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2576 goto out_qdio;
2577 }
2578 rc = qeth_ulp_setup(card);
2579 if (rc) {
d11ba0c4 2580 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2581 goto out_qdio;
2582 }
2583 rc = qeth_alloc_qdio_buffers(card);
2584 if (rc) {
d11ba0c4 2585 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2586 goto out_qdio;
2587 }
2588 rc = qeth_qdio_establish(card);
2589 if (rc) {
d11ba0c4 2590 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2591 qeth_free_qdio_buffers(card);
2592 goto out_qdio;
2593 }
2594 rc = qeth_qdio_activate(card);
2595 if (rc) {
d11ba0c4 2596 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2597 goto out_qdio;
2598 }
2599 rc = qeth_dm_act(card);
2600 if (rc) {
d11ba0c4 2601 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2602 goto out_qdio;
2603 }
2604
2605 return 0;
2606out_qdio:
2607 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2608 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2609 return rc;
2610}
2611
2612static void qeth_print_status_with_portname(struct qeth_card *card)
2613{
2614 char dbf_text[15];
2615 int i;
2616
2617 sprintf(dbf_text, "%s", card->info.portname + 1);
2618 for (i = 0; i < 8; i++)
2619 dbf_text[i] =
2620 (char) _ebcasc[(__u8) dbf_text[i]];
2621 dbf_text[8] = 0;
74eacdb9 2622 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2623 "with link type %s (portname: %s)\n",
4a71df50
FB		 2624 qeth_get_cardname(card),
2625 (card->info.mcl_level[0]) ? " (level: " : "",
2626 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2627 (card->info.mcl_level[0]) ? ")" : "",
2628 qeth_get_cardname_short(card),
2629 dbf_text);
2630
2631}
2632
2633static void qeth_print_status_no_portname(struct qeth_card *card)
2634{
2635 if (card->info.portname[0])
74eacdb9 2636 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2637 "card%s%s%s\nwith link type %s "
2638 "(no portname needed by interface).\n",
4a71df50
FB		 2639 qeth_get_cardname(card),
2640 (card->info.mcl_level[0]) ? " (level: " : "",
2641 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2642 (card->info.mcl_level[0]) ? ")" : "",
2643 qeth_get_cardname_short(card));
2644 else
74eacdb9 2645 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2646 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2647 qeth_get_cardname(card),
2648 (card->info.mcl_level[0]) ? " (level: " : "",
2649 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2650 (card->info.mcl_level[0]) ? ")" : "",
2651 qeth_get_cardname_short(card));
2652}
2653
2654void qeth_print_status_message(struct qeth_card *card)
2655{
2656 switch (card->info.type) {
5113fec0
UB		 2657 case QETH_CARD_TYPE_OSD:
2658 case QETH_CARD_TYPE_OSM:
2659 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2660 /* VM will use a non-zero first character
2661 * to indicate a HiperSockets like reporting
2662 * of the level OSA sets the first character to zero
2663 * */
2664 if (!card->info.mcl_level[0]) {
2665 sprintf(card->info.mcl_level, "%02x%02x",
2666 card->info.mcl_level[2],
2667 card->info.mcl_level[3]);
2668
2669 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2670 break;
2671 }
2672 /* fallthrough */
2673 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2674 if ((card->info.guestlan) ||
2675 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2676 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2677 card->info.mcl_level[0]];
2678 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2679 card->info.mcl_level[1]];
2680 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2681 card->info.mcl_level[2]];
2682 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2683 card->info.mcl_level[3]];
2684 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2685 }
2686 break;
2687 default:
2688 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2689 }
2690 if (card->info.portname_required)
2691 qeth_print_status_with_portname(card);
2692 else
2693 qeth_print_status_no_portname(card);
2694}
2695EXPORT_SYMBOL_GPL(qeth_print_status_message);
2696
4a71df50
FB		 2697static void qeth_initialize_working_pool_list(struct qeth_card *card)
2698{
2699 struct qeth_buffer_pool_entry *entry;
2700
847a50fd 2701 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2702
2703 list_for_each_entry(entry,
2704 &card->qdio.init_pool.entry_list, init_list) {
2705 qeth_put_buffer_pool_entry(card, entry);
2706 }
2707}
2708
2709static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2710 struct qeth_card *card)
2711{
2712 struct list_head *plh;
2713 struct qeth_buffer_pool_entry *entry;
2714 int i, free;
2715 struct page *page;
2716
2717 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2718 return NULL;
2719
2720 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2721 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2722 free = 1;
2723 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2724 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2725 free = 0;
2726 break;
2727 }
2728 }
2729 if (free) {
2730 list_del_init(&entry->list);
2731 return entry;
2732 }
2733 }
2734
2735 /* no free buffer in pool so take first one and swap pages */
2736 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2737 struct qeth_buffer_pool_entry, list);
2738 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2739 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2740 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2741 if (!page) {
2742 return NULL;
2743 } else {
2744 free_page((unsigned long)entry->elements[i]);
2745 entry->elements[i] = page_address(page);
2746 if (card->options.performance_stats)
2747 card->perf_stats.sg_alloc_page_rx++;
2748 }
2749 }
2750 }
2751 list_del_init(&entry->list);
2752 return entry;
2753}
2754
2755static int qeth_init_input_buffer(struct qeth_card *card,
2756 struct qeth_qdio_buffer *buf)
2757{
2758 struct qeth_buffer_pool_entry *pool_entry;
2759 int i;
2760
b3332930
FB		 2761 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2762 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2763 if (!buf->rx_skb)
2764 return 1;
2765 }
2766
4a71df50
FB		 2767 pool_entry = qeth_find_free_buffer_pool_entry(card);
2768 if (!pool_entry)
2769 return 1;
2770
2771 /*
2772 * since the buffer is accessed only from the input_tasklet
2773 * there shouldn't be a need to synchronize; also, since we use
2774 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2775 * buffers
2776 */
4a71df50
FB		 2777
2778 buf->pool_entry = pool_entry;
2779 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2780 buf->buffer->element[i].length = PAGE_SIZE;
2781 buf->buffer->element[i].addr = pool_entry->elements[i];
2782 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2783 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2784 else
3ec90878
JG		 2785 buf->buffer->element[i].eflags = 0;
2786 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2787 }
2788 return 0;
2789}
2790
2791int qeth_init_qdio_queues(struct qeth_card *card)
2792{
2793 int i, j;
2794 int rc;
2795
d11ba0c4 2796 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2797
2798 /* inbound queue */
2799 memset(card->qdio.in_q->qdio_bufs, 0,
2800 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2801 qeth_initialize_working_pool_list(card);
2802 /*give only as many buffers to hardware as we have buffer pool entries*/
2803 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2804 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2805 card->qdio.in_q->next_buf_to_init =
2806 card->qdio.in_buf_pool.buf_count - 1;
2807 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2808 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2809 if (rc) {
d11ba0c4 2810 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2811 return rc;
2812 }
0da9581d
EL		 2813
2814 /* completion */
2815 rc = qeth_cq_init(card);
2816 if (rc) {
2817 return rc;
2818 }
2819
4a71df50
FB		 2820 /* outbound queue */
2821 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2822 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2823 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2824 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2825 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2826 card->qdio.out_qs[i]->bufs[j],
2827 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2828 }
2829 card->qdio.out_qs[i]->card = card;
2830 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2831 card->qdio.out_qs[i]->do_pack = 0;
2832 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2833 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2834 atomic_set(&card->qdio.out_qs[i]->state,
2835 QETH_OUT_Q_UNLOCKED);
2836 }
2837 return 0;
2838}
2839EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2840
2841static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2842{
2843 switch (link_type) {
2844 case QETH_LINK_TYPE_HSTR:
2845 return 2;
2846 default:
2847 return 1;
2848 }
2849}
2850
2851static void qeth_fill_ipacmd_header(struct qeth_card *card,
2852 struct qeth_ipa_cmd *cmd, __u8 command,
2853 enum qeth_prot_versions prot)
2854{
2855 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2856 cmd->hdr.command = command;
2857 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2858 cmd->hdr.seqno = card->seqno.ipa;
2859 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2860 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2861 if (card->options.layer2)
2862 cmd->hdr.prim_version_no = 2;
2863 else
2864 cmd->hdr.prim_version_no = 1;
2865 cmd->hdr.param_count = 1;
2866 cmd->hdr.prot_version = prot;
2867 cmd->hdr.ipa_supported = 0;
2868 cmd->hdr.ipa_enabled = 0;
2869}
2870
2871struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2872 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2873{
2874 struct qeth_cmd_buffer *iob;
2875 struct qeth_ipa_cmd *cmd;
2876
2877 iob = qeth_wait_for_buffer(&card->write);
2878 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2879 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2880
2881 return iob;
2882}
2883EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2884
2885void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2886 char prot_type)
2887{
2888 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2889 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2890 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2891 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2892}
2893EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2894
2895int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2896 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2897 unsigned long),
2898 void *reply_param)
2899{
2900 int rc;
2901 char prot_type;
4a71df50 2902
847a50fd 2903 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2904
2905 if (card->options.layer2)
2906 if (card->info.type == QETH_CARD_TYPE_OSN)
2907 prot_type = QETH_PROT_OSN2;
2908 else
2909 prot_type = QETH_PROT_LAYER2;
2910 else
2911 prot_type = QETH_PROT_TCPIP;
2912 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2913 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2914 iob, reply_cb, reply_param);
908abbb5
UB		 2915 if (rc == -ETIME) {
2916 qeth_clear_ipacmd_list(card);
2917 qeth_schedule_recovery(card);
2918 }
4a71df50
FB		 2919 return rc;
2920}
2921EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2922
4a71df50
FB		 2923int qeth_send_startlan(struct qeth_card *card)
2924{
2925 int rc;
70919e23 2926 struct qeth_cmd_buffer *iob;
4a71df50 2927
d11ba0c4 2928 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2929
70919e23
UB		 2930 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2931 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2932 return rc;
2933}
2934EXPORT_SYMBOL_GPL(qeth_send_startlan);
2935
eb3fb0ba 2936static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2937 struct qeth_reply *reply, unsigned long data)
2938{
2939 struct qeth_ipa_cmd *cmd;
2940
847a50fd 2941 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2942
2943 cmd = (struct qeth_ipa_cmd *) data;
2944 if (cmd->hdr.return_code == 0)
2945 cmd->hdr.return_code =
2946 cmd->data.setadapterparms.hdr.return_code;
2947 return 0;
2948}
4a71df50
FB		 2949
2950static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2951 struct qeth_reply *reply, unsigned long data)
2952{
2953 struct qeth_ipa_cmd *cmd;
2954
847a50fd 2955 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2956
2957 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2958 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2959 card->info.link_type =
2960 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2961 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2962 }
4a71df50
FB		 2963 card->options.adp.supported_funcs =
2964 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2965 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2966}
2967
eb3fb0ba 2968static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2969 __u32 command, __u32 cmdlen)
2970{
2971 struct qeth_cmd_buffer *iob;
2972 struct qeth_ipa_cmd *cmd;
2973
2974 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2975 QETH_PROT_IPV4);
2976 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2977 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2978 cmd->data.setadapterparms.hdr.command_code = command;
2979 cmd->data.setadapterparms.hdr.used_total = 1;
2980 cmd->data.setadapterparms.hdr.seq_no = 1;
2981
2982 return iob;
2983}
4a71df50
FB		 2984
2985int qeth_query_setadapterparms(struct qeth_card *card)
2986{
2987 int rc;
2988 struct qeth_cmd_buffer *iob;
2989
847a50fd 2990 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2991 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2992 sizeof(struct qeth_ipacmd_setadpparms));
2993 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2994 return rc;
2995}
2996EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2997
1da74b1c
FB		 2998static int qeth_query_ipassists_cb(struct qeth_card *card,
2999 struct qeth_reply *reply, unsigned long data)
3000{
3001 struct qeth_ipa_cmd *cmd;
3002
3003 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3004
3005 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3006
3007 switch (cmd->hdr.return_code) {
3008 case IPA_RC_NOTSUPP:
3009 case IPA_RC_L2_UNSUPPORTED_CMD:
3010 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3011 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3012 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3013 return -0;
3014 default:
3015 if (cmd->hdr.return_code) {
3016 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3017 "rc=%d\n",
3018 dev_name(&card->gdev->dev),
3019 cmd->hdr.return_code);
3020 return 0;
3021 }
3022 }
3023
1da74b1c
FB		 3024 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3025 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3026 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3027 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3028 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3029 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3030 } else
3031 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3032 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3033 return 0;
3034}
3035
3036int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3037{
3038 int rc;
3039 struct qeth_cmd_buffer *iob;
3040
3041 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3042 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3043 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3044 return rc;
3045}
3046EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3047
3048static int qeth_query_setdiagass_cb(struct qeth_card *card,
3049 struct qeth_reply *reply, unsigned long data)
3050{
3051 struct qeth_ipa_cmd *cmd;
3052 __u16 rc;
3053
3054 cmd = (struct qeth_ipa_cmd *)data;
3055 rc = cmd->hdr.return_code;
3056 if (rc)
3057 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3058 else
3059 card->info.diagass_support = cmd->data.diagass.ext;
3060 return 0;
3061}
3062
3063static int qeth_query_setdiagass(struct qeth_card *card)
3064{
3065 struct qeth_cmd_buffer *iob;
3066 struct qeth_ipa_cmd *cmd;
3067
3068 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3069 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3070 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3071 cmd->data.diagass.subcmd_len = 16;
3072 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3073 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3074}
3075
3076static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3077{
3078 unsigned long info = get_zeroed_page(GFP_KERNEL);
3079 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3080 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3081 struct ccw_dev_id ccwid;
caf757c6 3082 int level;
1da74b1c
FB		 3083
3084 tid->chpid = card->info.chpid;
3085 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3086 tid->ssid = ccwid.ssid;
3087 tid->devno = ccwid.devno;
3088 if (!info)
3089 return;
caf757c6
HC		 3090 level = stsi(NULL, 0, 0, 0);
3091 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3092 tid->lparnr = info222->lpar_number;
caf757c6 3093 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3094 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3095 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3096 }
3097 free_page(info);
3098 return;
3099}
3100
3101static int qeth_hw_trap_cb(struct qeth_card *card,
3102 struct qeth_reply *reply, unsigned long data)
3103{
3104 struct qeth_ipa_cmd *cmd;
3105 __u16 rc;
3106
3107 cmd = (struct qeth_ipa_cmd *)data;
3108 rc = cmd->hdr.return_code;
3109 if (rc)
3110 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3111 return 0;
3112}
3113
3114int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3115{
3116 struct qeth_cmd_buffer *iob;
3117 struct qeth_ipa_cmd *cmd;
3118
3119 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3120 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3121 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3122 cmd->data.diagass.subcmd_len = 80;
3123 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3124 cmd->data.diagass.type = 1;
3125 cmd->data.diagass.action = action;
3126 switch (action) {
3127 case QETH_DIAGS_TRAP_ARM:
3128 cmd->data.diagass.options = 0x0003;
3129 cmd->data.diagass.ext = 0x00010000 +
3130 sizeof(struct qeth_trap_id);
3131 qeth_get_trap_id(card,
3132 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3133 break;
3134 case QETH_DIAGS_TRAP_DISARM:
3135 cmd->data.diagass.options = 0x0001;
3136 break;
3137 case QETH_DIAGS_TRAP_CAPTURE:
3138 break;
3139 }
3140 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3141}
3142EXPORT_SYMBOL_GPL(qeth_hw_trap);
3143
76b11f8e
UB		 3144int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3145 unsigned int qdio_error, const char *dbftext)
4a71df50 3146{
779e6e1c 3147 if (qdio_error) {
847a50fd 3148 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3149 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3150 buf->element[15].sflags);
38593d01 3151 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3152 buf->element[14].sflags);
38593d01 3153 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3154 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3155 card->stats.rx_dropped++;
3156 return 0;
3157 } else
3158 return 1;
4a71df50
FB		 3159 }
3160 return 0;
3161}
3162EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3163
b3332930
FB		 3164void qeth_buffer_reclaim_work(struct work_struct *work)
3165{
3166 struct qeth_card *card = container_of(work, struct qeth_card,
3167 buffer_reclaim_work.work);
3168
3169 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3170 qeth_queue_input_buffer(card, card->reclaim_index);
3171}
3172
4a71df50
FB		 3173void qeth_queue_input_buffer(struct qeth_card *card, int index)
3174{
3175 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3176 struct list_head *lh;
4a71df50
FB		 3177 int count;
3178 int i;
3179 int rc;
3180 int newcount = 0;
3181
4a71df50
FB		 3182 count = (index < queue->next_buf_to_init)?
3183 card->qdio.in_buf_pool.buf_count -
3184 (queue->next_buf_to_init - index) :
3185 card->qdio.in_buf_pool.buf_count -
3186 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3187 /* only requeue at a certain threshold to avoid SIGAs */
3188 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3189 for (i = queue->next_buf_to_init;
3190 i < queue->next_buf_to_init + count; ++i) {
3191 if (qeth_init_input_buffer(card,
3192 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3193 break;
3194 } else {
3195 newcount++;
3196 }
3197 }
3198
3199 if (newcount < count) {
3200 /* we are in memory shortage so we switch back to
3201 traditional skb allocation and drop packages */
4a71df50
FB		 3202 atomic_set(&card->force_alloc_skb, 3);
3203 count = newcount;
3204 } else {
4a71df50
FB		 3205 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3206 }
3207
b3332930
FB		 3208 if (!count) {
3209 i = 0;
3210 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3211 i++;
3212 if (i == card->qdio.in_buf_pool.buf_count) {
3213 QETH_CARD_TEXT(card, 2, "qsarbw");
3214 card->reclaim_index = index;
3215 schedule_delayed_work(
3216 &card->buffer_reclaim_work,
3217 QETH_RECLAIM_WORK_TIME);
3218 }
3219 return;
3220 }
3221
4a71df50
FB		 3222 /*
3223 * according to old code it should be avoided to requeue all
3224 * 128 buffers in order to benefit from PCI avoidance.
3225 * this function keeps at least one buffer (the buffer at
3226 * 'index') un-requeued -> this buffer is the first buffer that
3227 * will be requeued the next time
3228 */
3229 if (card->options.performance_stats) {
3230 card->perf_stats.inbound_do_qdio_cnt++;
3231 card->perf_stats.inbound_do_qdio_start_time =
3232 qeth_get_micros();
3233 }
779e6e1c
JG		 3234 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3235 queue->next_buf_to_init, count);
4a71df50
FB		 3236 if (card->options.performance_stats)
3237 card->perf_stats.inbound_do_qdio_time +=
3238 qeth_get_micros() -
3239 card->perf_stats.inbound_do_qdio_start_time;
3240 if (rc) {
847a50fd 3241 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3242 }
3243 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3244 QDIO_MAX_BUFFERS_PER_Q;
3245 }
3246}
3247EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3248
3249static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3250 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3251{
3ec90878 3252 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3253
847a50fd 3254 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3255 if (card->info.type == QETH_CARD_TYPE_IQD) {
3256 if (sbalf15 == 0) {
3257 qdio_err = 0;
3258 } else {
3259 qdio_err = 1;
3260 }
3261 }
76b11f8e 3262 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3263
3264 if (!qdio_err)
4a71df50 3265 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3266
3267 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3268 return QETH_SEND_ERROR_RETRY;
3269
847a50fd
CO		 3270 QETH_CARD_TEXT(card, 1, "lnkfail");
3271 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3272 (u16)qdio_err, (u8)sbalf15);
3273 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3274}
3275
3276/*
3277 * Switched to packing state if the number of used buffers on a queue
3278 * reaches a certain limit.
3279 */
3280static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3281{
3282 if (!queue->do_pack) {
3283 if (atomic_read(&queue->used_buffers)
3284 >= QETH_HIGH_WATERMARK_PACK){
3285 /* switch non-PACKING -> PACKING */
847a50fd 3286 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3287 if (queue->card->options.performance_stats)
3288 queue->card->perf_stats.sc_dp_p++;
3289 queue->do_pack = 1;
3290 }
3291 }
3292}
3293
3294/*
3295 * Switches from packing to non-packing mode. If there is a packing
3296 * buffer on the queue this buffer will be prepared to be flushed.
3297 * In that case 1 is returned to inform the caller. If no buffer
3298 * has to be flushed, zero is returned.
3299 */
3300static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3301{
3302 struct qeth_qdio_out_buffer *buffer;
3303 int flush_count = 0;
3304
3305 if (queue->do_pack) {
3306 if (atomic_read(&queue->used_buffers)
3307 <= QETH_LOW_WATERMARK_PACK) {
3308 /* switch PACKING -> non-PACKING */
847a50fd 3309 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3310 if (queue->card->options.performance_stats)
3311 queue->card->perf_stats.sc_p_dp++;
3312 queue->do_pack = 0;
3313 /* flush packing buffers */
0da9581d 3314 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3315 if ((atomic_read(&buffer->state) ==
3316 QETH_QDIO_BUF_EMPTY) &&
3317 (buffer->next_element_to_fill > 0)) {
3318 atomic_set(&buffer->state,
0da9581d 3319 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3320 flush_count++;
3321 queue->next_buf_to_fill =
3322 (queue->next_buf_to_fill + 1) %
3323 QDIO_MAX_BUFFERS_PER_Q;
3324 }
3325 }
3326 }
3327 return flush_count;
3328}
3329
0da9581d 3330
4a71df50
FB		 3331/*
3332 * Called to flush a packing buffer if no more pci flags are on the queue.
3333 * Checks if there is a packing buffer and prepares it to be flushed.
3334 * In that case returns 1, otherwise zero.
3335 */
3336static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3337{
3338 struct qeth_qdio_out_buffer *buffer;
3339
0da9581d 3340 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3341 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3342 (buffer->next_element_to_fill > 0)) {
3343 /* it's a packing buffer */
3344 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3345 queue->next_buf_to_fill =
3346 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3347 return 1;
3348 }
3349 return 0;
3350}
3351
779e6e1c
JG		 3352static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3353 int count)
4a71df50
FB		 3354{
3355 struct qeth_qdio_out_buffer *buf;
3356 int rc;
3357 int i;
3358 unsigned int qdio_flags;
3359
4a71df50 3360 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3361 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3362 buf = queue->bufs[bidx];
3ec90878
JG		 3363 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3364 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3365
0da9581d
EL		 3366 if (queue->bufstates)
3367 queue->bufstates[bidx].user = buf;
3368
4a71df50
FB		 3369 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3370 continue;
3371
3372 if (!queue->do_pack) {
3373 if ((atomic_read(&queue->used_buffers) >=
3374 (QETH_HIGH_WATERMARK_PACK -
3375 QETH_WATERMARK_PACK_FUZZ)) &&
3376 !atomic_read(&queue->set_pci_flags_count)) {
3377 /* it's likely that we'll go to packing
3378 * mode soon */
3379 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3380 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3381 }
3382 } else {
3383 if (!atomic_read(&queue->set_pci_flags_count)) {
3384 /*
3385 * there's no outstanding PCI any more, so we
3386 * have to request a PCI to be sure the the PCI
3387 * will wake at some time in the future then we
3388 * can flush packed buffers that might still be
3389 * hanging around, which can happen if no
3390 * further send was requested by the stack
3391 */
3392 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3393 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3394 }
3395 }
3396 }
3397
3398 queue->card->dev->trans_start = jiffies;
3399 if (queue->card->options.performance_stats) {
3400 queue->card->perf_stats.outbound_do_qdio_cnt++;
3401 queue->card->perf_stats.outbound_do_qdio_start_time =
3402 qeth_get_micros();
3403 }
3404 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3405 if (atomic_read(&queue->set_pci_flags_count))
3406 qdio_flags |= QDIO_FLAG_PCI_OUT;
3407 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3408 queue->queue_no, index, count);
4a71df50
FB		 3409 if (queue->card->options.performance_stats)
3410 queue->card->perf_stats.outbound_do_qdio_time +=
3411 qeth_get_micros() -
3412 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3413 atomic_add(count, &queue->used_buffers);
4a71df50 3414 if (rc) {
d303b6fd
JG		 3415 queue->card->stats.tx_errors += count;
3416 /* ignore temporary SIGA errors without busy condition */
1549d13f 3417 if (rc == -ENOBUFS)
d303b6fd 3418 return;
847a50fd 3419 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3420 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3421 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3422 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3423 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3424
4a71df50
FB		 3425 /* this must not happen under normal circumstances. if it
3426 * happens something is really wrong -> recover */
3427 qeth_schedule_recovery(queue->card);
3428 return;
3429 }
4a71df50
FB		 3430 if (queue->card->options.performance_stats)
3431 queue->card->perf_stats.bufs_sent += count;
3432}
3433
3434static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3435{
3436 int index;
3437 int flush_cnt = 0;
3438 int q_was_packing = 0;
3439
3440 /*
3441 * check if weed have to switch to non-packing mode or if
3442 * we have to get a pci flag out on the queue
3443 */
3444 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3445 !atomic_read(&queue->set_pci_flags_count)) {
3446 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3447 QETH_OUT_Q_UNLOCKED) {
3448 /*
3449 * If we get in here, there was no action in
3450 * do_send_packet. So, we check if there is a
3451 * packing buffer to be flushed here.
3452 */
3453 netif_stop_queue(queue->card->dev);
3454 index = queue->next_buf_to_fill;
3455 q_was_packing = queue->do_pack;
3456 /* queue->do_pack may change */
3457 barrier();
3458 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3459 if (!flush_cnt &&
3460 !atomic_read(&queue->set_pci_flags_count))
3461 flush_cnt +=
3462 qeth_flush_buffers_on_no_pci(queue);
3463 if (queue->card->options.performance_stats &&
3464 q_was_packing)
3465 queue->card->perf_stats.bufs_sent_pack +=
3466 flush_cnt;
3467 if (flush_cnt)
779e6e1c 3468 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3469 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3470 }
3471 }
3472}
3473
a1c3ed4c
FB		 3474void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3475 unsigned long card_ptr)
3476{
3477 struct qeth_card *card = (struct qeth_card *)card_ptr;
3478
0cffef48 3479 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3480 napi_schedule(&card->napi);
3481}
3482EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3483
0da9581d
EL		 3484int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3485{
3486 int rc;
3487
3488 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3489 rc = -1;
3490 goto out;
3491 } else {
3492 if (card->options.cq == cq) {
3493 rc = 0;
3494 goto out;
3495 }
3496
3497 if (card->state != CARD_STATE_DOWN &&
3498 card->state != CARD_STATE_RECOVER) {
3499 rc = -1;
3500 goto out;
3501 }
3502
3503 qeth_free_qdio_buffers(card);
3504 card->options.cq = cq;
3505 rc = 0;
3506 }
3507out:
3508 return rc;
3509
3510}
3511EXPORT_SYMBOL_GPL(qeth_configure_cq);
3512
3513
3514static void qeth_qdio_cq_handler(struct qeth_card *card,
3515 unsigned int qdio_err,
3516 unsigned int queue, int first_element, int count) {
3517 struct qeth_qdio_q *cq = card->qdio.c_q;
3518 int i;
3519 int rc;
3520
3521 if (!qeth_is_cq(card, queue))
3522 goto out;
3523
3524 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3525 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3526 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3527
3528 if (qdio_err) {
3529 netif_stop_queue(card->dev);
3530 qeth_schedule_recovery(card);
3531 goto out;
3532 }
3533
3534 if (card->options.performance_stats) {
3535 card->perf_stats.cq_cnt++;
3536 card->perf_stats.cq_start_time = qeth_get_micros();
3537 }
3538
3539 for (i = first_element; i < first_element + count; ++i) {
3540 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3541 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3542 int e;
3543
3544 e = 0;
3545 while (buffer->element[e].addr) {
3546 unsigned long phys_aob_addr;
3547
3548 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3549 qeth_qdio_handle_aob(card, phys_aob_addr);
3550 buffer->element[e].addr = NULL;
3551 buffer->element[e].eflags = 0;
3552 buffer->element[e].sflags = 0;
3553 buffer->element[e].length = 0;
3554
3555 ++e;
3556 }
3557
3558 buffer->element[15].eflags = 0;
3559 buffer->element[15].sflags = 0;
3560 }
3561 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3562 card->qdio.c_q->next_buf_to_init,
3563 count);
3564 if (rc) {
3565 dev_warn(&card->gdev->dev,
3566 "QDIO reported an error, rc=%i\n", rc);
3567 QETH_CARD_TEXT(card, 2, "qcqherr");
3568 }
3569 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3570 + count) % QDIO_MAX_BUFFERS_PER_Q;
3571
3572 netif_wake_queue(card->dev);
3573
3574 if (card->options.performance_stats) {
3575 int delta_t = qeth_get_micros();
3576 delta_t -= card->perf_stats.cq_start_time;
3577 card->perf_stats.cq_time += delta_t;
3578 }
3579out:
3580 return;
3581}
3582
a1c3ed4c 3583void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3584 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3585 unsigned long card_ptr)
3586{
3587 struct qeth_card *card = (struct qeth_card *)card_ptr;
3588
0da9581d
EL		 3589 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3590 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3591
3592 if (qeth_is_cq(card, queue))
3593 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3594 else if (qdio_err)
a1c3ed4c 3595 qeth_schedule_recovery(card);
0da9581d
EL		 3596
3597
a1c3ed4c
FB		 3598}
3599EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3600
779e6e1c
JG		 3601void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3602 unsigned int qdio_error, int __queue, int first_element,
3603 int count, unsigned long card_ptr)
4a71df50
FB		 3604{
3605 struct qeth_card *card = (struct qeth_card *) card_ptr;
3606 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3607 struct qeth_qdio_out_buffer *buffer;
3608 int i;
3609
847a50fd 3610 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3611 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3612 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3613 netif_stop_queue(card->dev);
3614 qeth_schedule_recovery(card);
3615 return;
4a71df50
FB		 3616 }
3617 if (card->options.performance_stats) {
3618 card->perf_stats.outbound_handler_cnt++;
3619 card->perf_stats.outbound_handler_start_time =
3620 qeth_get_micros();
3621 }
3622 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3623 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3624 buffer = queue->bufs[bidx];
b67d801f 3625 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3626
3627 if (queue->bufstates &&
3628 (queue->bufstates[bidx].flags &
3629 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3630 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3631
3632 if (atomic_cmpxchg(&buffer->state,
3633 QETH_QDIO_BUF_PRIMED,
3634 QETH_QDIO_BUF_PENDING) ==
3635 QETH_QDIO_BUF_PRIMED) {
3636 qeth_notify_skbs(queue, buffer,
3637 TX_NOTIFY_PENDING);
3638 }
0da9581d
EL		 3639 buffer->aob = queue->bufstates[bidx].aob;
3640 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3641 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3642 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3643 virt_to_phys(buffer->aob));
b3332930
FB		 3644 if (qeth_init_qdio_out_buf(queue, bidx)) {
3645 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3646 qeth_schedule_recovery(card);
b3332930 3647 }
0da9581d 3648 } else {
b3332930
FB		 3649 if (card->options.cq == QETH_CQ_ENABLED) {
3650 enum iucv_tx_notify n;
3651
3652 n = qeth_compute_cq_notification(
3653 buffer->buffer->element[15].sflags, 0);
3654 qeth_notify_skbs(queue, buffer, n);
3655 }
3656
0da9581d
EL		 3657 qeth_clear_output_buffer(queue, buffer,
3658 QETH_QDIO_BUF_EMPTY);
3659 }
3660 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3661 }
3662 atomic_sub(count, &queue->used_buffers);
3663 /* check if we need to do something on this outbound queue */
3664 if (card->info.type != QETH_CARD_TYPE_IQD)
3665 qeth_check_outbound_queue(queue);
3666
3667 netif_wake_queue(queue->card->dev);
3668 if (card->options.performance_stats)
3669 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3670 card->perf_stats.outbound_handler_start_time;
3671}
3672EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3673
290b8348
SR		 3674/**
3675 * Note: Function assumes that we have 4 outbound queues.
3676 */
4a71df50
FB		 3677int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3678 int ipv, int cast_type)
3679{
290b8348
SR		 3680 u8 tos;
3681
5113fec0
UB		 3682 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3683 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50 3684 return card->qdio.default_out_queue;
290b8348
SR		 3685
3686 if (cast_type && card->info.is_multicast_different)
3687 return card->info.is_multicast_different &
3688 (card->qdio.no_out_queues - 1);
3689
3690 switch (card->qdio.do_prio_queueing) {
3691 case QETH_PRIO_Q_ING_TOS:
3692 case QETH_PRIO_Q_ING_PREC:
3693 switch (ipv) {
3694 case 4:
3695 tos = ipv4_get_dsfield(ip_hdr(skb));
3696 break;
3697 case 6:
3698 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3699 break;
3700 default:
3701 return card->qdio.default_out_queue;
4a71df50 3702 }
290b8348
SR		 3703 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
3704 return ~tos >> 6 & 3;
3705 if (tos & IPTOS_MINCOST)
3706 return 3;
3707 if (tos & IPTOS_RELIABILITY)
3708 return 2;
3709 if (tos & IPTOS_THROUGHPUT)
3710 return 1;
3711 if (tos & IPTOS_LOWDELAY)
3712 return 0;
4a71df50 3713 default:
290b8348 3714 break;
4a71df50 3715 }
290b8348 3716 return card->qdio.default_out_queue;
4a71df50
FB		 3717}
3718EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3719
271648b4
FB		 3720int qeth_get_elements_for_frags(struct sk_buff *skb)
3721{
3722 int cnt, length, e, elements = 0;
3723 struct skb_frag_struct *frag;
3724 char *data;
3725
3726 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3727 frag = &skb_shinfo(skb)->frags[cnt];
3728 data = (char *)page_to_phys(skb_frag_page(frag)) +
3729 frag->page_offset;
3730 length = frag->size;
3731 e = PFN_UP((unsigned long)data + length - 1) -
3732 PFN_DOWN((unsigned long)data);
3733 elements += e;
3734 }
3735 return elements;
3736}
3737EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3738
065cc782 3739int qeth_get_elements_no(struct qeth_card *card,
4a71df50
FB		 3740 struct sk_buff *skb, int elems)
3741{
51aa165c
FB		 3742 int dlen = skb->len - skb->data_len;
3743 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3744 PFN_DOWN((unsigned long)skb->data);
4a71df50 3745
271648b4
FB		 3746 elements_needed += qeth_get_elements_for_frags(skb);
3747
4a71df50 3748 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3749 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3750 "(Number=%d / Length=%d). Discarded.\n",
3751 (elements_needed+elems), skb->len);
3752 return 0;
3753 }
3754 return elements_needed;
3755}
3756EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3757
d4ae1f5e 3758int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3759{
3760 int hroom, inpage, rest;
3761
3762 if (((unsigned long)skb->data & PAGE_MASK) !=
3763 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3764 hroom = skb_headroom(skb);
3765 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3766 rest = len - inpage;
3767 if (rest > hroom)
3768 return 1;
3769 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3770 skb->data -= rest;
d4ae1f5e
SR		 3771 skb->tail -= rest;
3772 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3773 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3774 }
3775 return 0;
3776}
3777EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3778
f90b744e 3779static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3780 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3781 int offset)
4a71df50 3782{
51aa165c 3783 int length = skb->len - skb->data_len;
4a71df50
FB		 3784 int length_here;
3785 int element;
3786 char *data;
51aa165c
FB		 3787 int first_lap, cnt;
3788 struct skb_frag_struct *frag;
4a71df50
FB		 3789
3790 element = *next_element_to_fill;
3791 data = skb->data;
3792 first_lap = (is_tso == 0 ? 1 : 0);
3793
683d718a
FB		 3794 if (offset >= 0) {
3795 data = skb->data + offset;
e1f03ae8 3796 length -= offset;
683d718a
FB		 3797 first_lap = 0;
3798 }
3799
4a71df50
FB		 3800 while (length > 0) {
3801 /* length_here is the remaining amount of data in this page */
3802 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3803 if (length < length_here)
3804 length_here = length;
3805
3806 buffer->element[element].addr = data;
3807 buffer->element[element].length = length_here;
3808 length -= length_here;
3809 if (!length) {
3810 if (first_lap)
51aa165c 3811 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3812 buffer->element[element].eflags =
3813 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3814 else
3ec90878 3815 buffer->element[element].eflags = 0;
4a71df50 3816 else
3ec90878
JG		 3817 buffer->element[element].eflags =
3818 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3819 } else {
3820 if (first_lap)
3ec90878
JG		 3821 buffer->element[element].eflags =
3822 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3823 else
3ec90878
JG		 3824 buffer->element[element].eflags =
3825 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3826 }
3827 data += length_here;
3828 element++;
3829 first_lap = 0;
3830 }
51aa165c
FB		 3831
3832 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3833 frag = &skb_shinfo(skb)->frags[cnt];
271648b4
FB		 3834 data = (char *)page_to_phys(skb_frag_page(frag)) +
3835 frag->page_offset;
3836 length = frag->size;
3837 while (length > 0) {
3838 length_here = PAGE_SIZE -
3839 ((unsigned long) data % PAGE_SIZE);
3840 if (length < length_here)
3841 length_here = length;
3842
3843 buffer->element[element].addr = data;
3844 buffer->element[element].length = length_here;
3845 buffer->element[element].eflags =
3846 SBAL_EFLAGS_MIDDLE_FRAG;
3847 length -= length_here;
3848 data += length_here;
3849 element++;
3850 }
51aa165c
FB		 3851 }
3852
3ec90878
JG		 3853 if (buffer->element[element - 1].eflags)
3854 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3855 *next_element_to_fill = element;
3856}
3857
f90b744e 3858static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3859 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3860 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3861{
3862 struct qdio_buffer *buffer;
4a71df50
FB		 3863 int flush_cnt = 0, hdr_len, large_send = 0;
3864
4a71df50
FB		 3865 buffer = buf->buffer;
3866 atomic_inc(&skb->users);
3867 skb_queue_tail(&buf->skb_list, skb);
3868
4a71df50 3869 /*check first on TSO ....*/
683d718a 3870 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3871 int element = buf->next_element_to_fill;
3872
683d718a
FB		 3873 hdr_len = sizeof(struct qeth_hdr_tso) +
3874 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3875 /*fill first buffer entry only with header information */
3876 buffer->element[element].addr = skb->data;
3877 buffer->element[element].length = hdr_len;
3ec90878 3878 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3879 buf->next_element_to_fill++;
3880 skb->data += hdr_len;
3881 skb->len -= hdr_len;
3882 large_send = 1;
3883 }
683d718a
FB		 3884
3885 if (offset >= 0) {
3886 int element = buf->next_element_to_fill;
3887 buffer->element[element].addr = hdr;
3888 buffer->element[element].length = sizeof(struct qeth_hdr) +
3889 hd_len;
3ec90878 3890 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3891 buf->is_header[element] = 1;
3892 buf->next_element_to_fill++;
3893 }
3894
51aa165c
FB		 3895 __qeth_fill_buffer(skb, buffer, large_send,
3896 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3897
3898 if (!queue->do_pack) {
847a50fd 3899 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3900 /* set state to PRIMED -> will be flushed */
3901 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3902 flush_cnt = 1;
3903 } else {
847a50fd 3904 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3905 if (queue->card->options.performance_stats)
3906 queue->card->perf_stats.skbs_sent_pack++;
3907 if (buf->next_element_to_fill >=
3908 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3909 /*
3910 * packed buffer if full -> set state PRIMED
3911 * -> will be flushed
3912 */
3913 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3914 flush_cnt = 1;
3915 }
3916 }
3917 return flush_cnt;
3918}
3919
3920int qeth_do_send_packet_fast(struct qeth_card *card,
3921 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3922 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3923 int offset, int hd_len)
4a71df50
FB		 3924{
3925 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3926 int index;
3927
4a71df50
FB		 3928 /* spin until we get the queue ... */
3929 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3930 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3931 /* ... now we've got the queue */
3932 index = queue->next_buf_to_fill;
0da9581d 3933 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3934 /*
3935 * check if buffer is empty to make sure that we do not 'overtake'
3936 * ourselves and try to fill a buffer that is already primed
3937 */
3938 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3939 goto out;
64ef8957 3940 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3941 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3942 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3943 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3944 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3945 return 0;
3946out:
3947 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3948 return -EBUSY;
3949}
3950EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3951
3952int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3953 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3954 int elements_needed)
4a71df50
FB		 3955{
3956 struct qeth_qdio_out_buffer *buffer;
3957 int start_index;
3958 int flush_count = 0;
3959 int do_pack = 0;
3960 int tmp;
3961 int rc = 0;
3962
4a71df50
FB		 3963 /* spin until we get the queue ... */
3964 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3965 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3966 start_index = queue->next_buf_to_fill;
0da9581d 3967 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3968 /*
3969 * check if buffer is empty to make sure that we do not 'overtake'
3970 * ourselves and try to fill a buffer that is already primed
3971 */
3972 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3973 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3974 return -EBUSY;
3975 }
3976 /* check if we need to switch packing state of this queue */
3977 qeth_switch_to_packing_if_needed(queue);
3978 if (queue->do_pack) {
3979 do_pack = 1;
64ef8957
FB		 3980 /* does packet fit in current buffer? */
3981 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3982 buffer->next_element_to_fill) < elements_needed) {
3983 /* ... no -> set state PRIMED */
3984 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3985 flush_count++;
3986 queue->next_buf_to_fill =
3987 (queue->next_buf_to_fill + 1) %
3988 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3989 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3990 /* we did a step forward, so check buffer state
3991 * again */
3992 if (atomic_read(&buffer->state) !=
3993 QETH_QDIO_BUF_EMPTY) {
3994 qeth_flush_buffers(queue, start_index,
779e6e1c 3995 flush_count);
64ef8957 3996 atomic_set(&queue->state,
4a71df50 3997 QETH_OUT_Q_UNLOCKED);
64ef8957 3998 return -EBUSY;
4a71df50
FB		 3999 }
4000 }
4001 }
64ef8957 4002 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 4003 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4004 QDIO_MAX_BUFFERS_PER_Q;
4005 flush_count += tmp;
4a71df50 4006 if (flush_count)
779e6e1c 4007 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4008 else if (!atomic_read(&queue->set_pci_flags_count))
4009 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4010 /*
4011 * queue->state will go from LOCKED -> UNLOCKED or from
4012 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4013 * (switch packing state or flush buffer to get another pci flag out).
4014 * In that case we will enter this loop
4015 */
4016 while (atomic_dec_return(&queue->state)) {
4017 flush_count = 0;
4018 start_index = queue->next_buf_to_fill;
4019 /* check if we can go back to non-packing state */
4020 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4021 /*
4022 * check if we need to flush a packing buffer to get a pci
4023 * flag out on the queue
4024 */
4025 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4026 flush_count += qeth_flush_buffers_on_no_pci(queue);
4027 if (flush_count)
779e6e1c 4028 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4029 }
4030 /* at this point the queue is UNLOCKED again */
4031 if (queue->card->options.performance_stats && do_pack)
4032 queue->card->perf_stats.bufs_sent_pack += flush_count;
4033
4034 return rc;
4035}
4036EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4037
4038static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4039 struct qeth_reply *reply, unsigned long data)
4040{
4041 struct qeth_ipa_cmd *cmd;
4042 struct qeth_ipacmd_setadpparms *setparms;
4043
847a50fd 4044 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4045
4046 cmd = (struct qeth_ipa_cmd *) data;
4047 setparms = &(cmd->data.setadapterparms);
4048
4049 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4050 if (cmd->hdr.return_code) {
847a50fd 4051 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 4052 setparms->data.mode = SET_PROMISC_MODE_OFF;
4053 }
4054 card->info.promisc_mode = setparms->data.mode;
4055 return 0;
4056}
4057
4058void qeth_setadp_promisc_mode(struct qeth_card *card)
4059{
4060 enum qeth_ipa_promisc_modes mode;
4061 struct net_device *dev = card->dev;
4062 struct qeth_cmd_buffer *iob;
4063 struct qeth_ipa_cmd *cmd;
4064
847a50fd 4065 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4066
4067 if (((dev->flags & IFF_PROMISC) &&
4068 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4069 (!(dev->flags & IFF_PROMISC) &&
4070 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4071 return;
4072 mode = SET_PROMISC_MODE_OFF;
4073 if (dev->flags & IFF_PROMISC)
4074 mode = SET_PROMISC_MODE_ON;
847a50fd 4075 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4076
4077 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4078 sizeof(struct qeth_ipacmd_setadpparms));
4079 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4080 cmd->data.setadapterparms.data.mode = mode;
4081 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4082}
4083EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4084
4085int qeth_change_mtu(struct net_device *dev, int new_mtu)
4086{
4087 struct qeth_card *card;
4088 char dbf_text[15];
4089
509e2562 4090 card = dev->ml_priv;
4a71df50 4091
847a50fd 4092 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4093 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4094 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 4095
4096 if (new_mtu < 64)
4097 return -EINVAL;
4098 if (new_mtu > 65535)
4099 return -EINVAL;
4100 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4101 (!qeth_mtu_is_valid(card, new_mtu)))
4102 return -EINVAL;
4103 dev->mtu = new_mtu;
4104 return 0;
4105}
4106EXPORT_SYMBOL_GPL(qeth_change_mtu);
4107
4108struct net_device_stats *qeth_get_stats(struct net_device *dev)
4109{
4110 struct qeth_card *card;
4111
509e2562 4112 card = dev->ml_priv;
4a71df50 4113
847a50fd 4114 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4115
4116 return &card->stats;
4117}
4118EXPORT_SYMBOL_GPL(qeth_get_stats);
4119
4120static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4121 struct qeth_reply *reply, unsigned long data)
4122{
4123 struct qeth_ipa_cmd *cmd;
4124
847a50fd 4125 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4126
4127 cmd = (struct qeth_ipa_cmd *) data;
4128 if (!card->options.layer2 ||
4129 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4130 memcpy(card->dev->dev_addr,
4131 &cmd->data.setadapterparms.data.change_addr.addr,
4132 OSA_ADDR_LEN);
4133 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4134 }
4135 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4136 return 0;
4137}
4138
4139int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4140{
4141 int rc;
4142 struct qeth_cmd_buffer *iob;
4143 struct qeth_ipa_cmd *cmd;
4144
847a50fd 4145 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4146
4147 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4148 sizeof(struct qeth_ipacmd_setadpparms));
4149 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4150 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4151 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4152 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4153 card->dev->dev_addr, OSA_ADDR_LEN);
4154 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4155 NULL);
4156 return rc;
4157}
4158EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4159
d64ecc22
EL		 4160static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4161 struct qeth_reply *reply, unsigned long data)
4162{
4163 struct qeth_ipa_cmd *cmd;
4164 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4165 int fallback = *(int *)reply->param;
d64ecc22 4166
847a50fd 4167 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4168
4169 cmd = (struct qeth_ipa_cmd *) data;
4170 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4171 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4172 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4173 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4174 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4175 if (cmd->data.setadapterparms.hdr.return_code !=
4176 SET_ACCESS_CTRL_RC_SUCCESS)
4177 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4178 card->gdev->dev.kobj.name,
4179 access_ctrl_req->subcmd_code,
4180 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4181 switch (cmd->data.setadapterparms.hdr.return_code) {
4182 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4183 if (card->options.isolation == ISOLATION_MODE_NONE) {
4184 dev_info(&card->gdev->dev,
4185 "QDIO data connection isolation is deactivated\n");
4186 } else {
4187 dev_info(&card->gdev->dev,
4188 "QDIO data connection isolation is activated\n");
4189 }
d64ecc22 4190 break;
0f54761d
SR		 4191 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4192 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4193 "deactivated\n", dev_name(&card->gdev->dev));
4194 if (fallback)
4195 card->options.isolation = card->options.prev_isolation;
4196 break;
4197 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4198 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4199 " activated\n", dev_name(&card->gdev->dev));
4200 if (fallback)
4201 card->options.isolation = card->options.prev_isolation;
4202 break;
d64ecc22 4203 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4204 dev_err(&card->gdev->dev, "Adapter does not "
4205 "support QDIO data connection isolation\n");
d64ecc22 4206 break;
d64ecc22 4207 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4208 dev_err(&card->gdev->dev,
4209 "Adapter is dedicated. "
4210 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4211 if (fallback)
4212 card->options.isolation = card->options.prev_isolation;
d64ecc22 4213 break;
d64ecc22 4214 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4215 dev_err(&card->gdev->dev,
4216 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4217 if (fallback)
4218 card->options.isolation = card->options.prev_isolation;
4219 break;
4220 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4221 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4222 "support reflective relay mode\n");
4223 if (fallback)
4224 card->options.isolation = card->options.prev_isolation;
4225 break;
4226 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4227 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4228 "enabled at the adjacent switch port");
4229 if (fallback)
4230 card->options.isolation = card->options.prev_isolation;
4231 break;
4232 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4233 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4234 "at the adjacent switch failed\n");
d64ecc22 4235 break;
d64ecc22 4236 default:
d64ecc22 4237 /* this should never happen */
0f54761d
SR		 4238 if (fallback)
4239 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4240 break;
4241 }
d64ecc22 4242 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4243 return 0;
d64ecc22
EL		 4244}
4245
4246static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4247 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4248{
4249 int rc;
4250 struct qeth_cmd_buffer *iob;
4251 struct qeth_ipa_cmd *cmd;
4252 struct qeth_set_access_ctrl *access_ctrl_req;
4253
847a50fd 4254 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4255
4256 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4257 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4258
4259 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4260 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4261 sizeof(struct qeth_set_access_ctrl));
4262 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4263 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4264 access_ctrl_req->subcmd_code = isolation;
4265
4266 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4267 &fallback);
d64ecc22
EL		 4268 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4269 return rc;
4270}
4271
0f54761d 4272int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4273{
4274 int rc = 0;
4275
847a50fd 4276 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4277
5113fec0
UB		 4278 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4279 card->info.type == QETH_CARD_TYPE_OSX) &&
4280 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4281 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4282 card->options.isolation, fallback);
d64ecc22
EL		 4283 if (rc) {
4284 QETH_DBF_MESSAGE(3,
5113fec0 4285 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4286 card->gdev->dev.kobj.name,
4287 rc);
0f54761d 4288 rc = -EOPNOTSUPP;
d64ecc22
EL		 4289 }
4290 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4291 card->options.isolation = ISOLATION_MODE_NONE;
4292
4293 dev_err(&card->gdev->dev, "Adapter does not "
4294 "support QDIO data connection isolation\n");
4295 rc = -EOPNOTSUPP;
4296 }
4297 return rc;
4298}
4299EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4300
4a71df50
FB		 4301void qeth_tx_timeout(struct net_device *dev)
4302{
4303 struct qeth_card *card;
4304
509e2562 4305 card = dev->ml_priv;
847a50fd 4306 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4307 card->stats.tx_errors++;
4308 qeth_schedule_recovery(card);
4309}
4310EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4311
4312int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4313{
509e2562 4314 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4315 int rc = 0;
4316
4317 switch (regnum) {
4318 case MII_BMCR: /* Basic mode control register */
4319 rc = BMCR_FULLDPLX;
4320 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4321 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4322 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4323 rc |= BMCR_SPEED100;
4324 break;
4325 case MII_BMSR: /* Basic mode status register */
4326 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4327 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4328 BMSR_100BASE4;
4329 break;
4330 case MII_PHYSID1: /* PHYS ID 1 */
4331 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4332 dev->dev_addr[2];
4333 rc = (rc >> 5) & 0xFFFF;
4334 break;
4335 case MII_PHYSID2: /* PHYS ID 2 */
4336 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4337 break;
4338 case MII_ADVERTISE: /* Advertisement control reg */
4339 rc = ADVERTISE_ALL;
4340 break;
4341 case MII_LPA: /* Link partner ability reg */
4342 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4343 LPA_100BASE4 | LPA_LPACK;
4344 break;
4345 case MII_EXPANSION: /* Expansion register */
4346 break;
4347 case MII_DCOUNTER: /* disconnect counter */
4348 break;
4349 case MII_FCSCOUNTER: /* false carrier counter */
4350 break;
4351 case MII_NWAYTEST: /* N-way auto-neg test register */
4352 break;
4353 case MII_RERRCOUNTER: /* rx error counter */
4354 rc = card->stats.rx_errors;
4355 break;
4356 case MII_SREVISION: /* silicon revision */
4357 break;
4358 case MII_RESV1: /* reserved 1 */
4359 break;
4360 case MII_LBRERROR: /* loopback, rx, bypass error */
4361 break;
4362 case MII_PHYADDR: /* physical address */
4363 break;
4364 case MII_RESV2: /* reserved 2 */
4365 break;
4366 case MII_TPISTATUS: /* TPI status for 10mbps */
4367 break;
4368 case MII_NCONFIG: /* network interface config */
4369 break;
4370 default:
4371 break;
4372 }
4373 return rc;
4374}
4375EXPORT_SYMBOL_GPL(qeth_mdio_read);
4376
4377static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4378 struct qeth_cmd_buffer *iob, int len,
4379 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4380 unsigned long),
4381 void *reply_param)
4382{
4383 u16 s1, s2;
4384
847a50fd 4385 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4386
4387 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4388 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4389 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4390 /* adjust PDU length fields in IPA_PDU_HEADER */
4391 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4392 s2 = (u32) len;
4393 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4394 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4395 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4396 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4397 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4398 reply_cb, reply_param);
4399}
4400
4401static int qeth_snmp_command_cb(struct qeth_card *card,
4402 struct qeth_reply *reply, unsigned long sdata)
4403{
4404 struct qeth_ipa_cmd *cmd;
4405 struct qeth_arp_query_info *qinfo;
4406 struct qeth_snmp_cmd *snmp;
4407 unsigned char *data;
4408 __u16 data_len;
4409
847a50fd 4410 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4411
4412 cmd = (struct qeth_ipa_cmd *) sdata;
4413 data = (unsigned char *)((char *)cmd - reply->offset);
4414 qinfo = (struct qeth_arp_query_info *) reply->param;
4415 snmp = &cmd->data.setadapterparms.data.snmp;
4416
4417 if (cmd->hdr.return_code) {
847a50fd 4418 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4419 return 0;
4420 }
4421 if (cmd->data.setadapterparms.hdr.return_code) {
4422 cmd->hdr.return_code =
4423 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4424 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4425 return 0;
4426 }
4427 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4428 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4429 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4430 else
4431 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4432
4433 /* check if there is enough room in userspace */
4434 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4435 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4436 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4437 return 0;
4438 }
847a50fd 4439 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4440 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4441 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4442 cmd->data.setadapterparms.hdr.seq_no);
4443 /*copy entries to user buffer*/
4444 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4445 memcpy(qinfo->udata + qinfo->udata_offset,
4446 (char *)snmp,
4447 data_len + offsetof(struct qeth_snmp_cmd, data));
4448 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4449 } else {
4450 memcpy(qinfo->udata + qinfo->udata_offset,
4451 (char *)&snmp->request, data_len);
4452 }
4453 qinfo->udata_offset += data_len;
4454 /* check if all replies received ... */
847a50fd 4455 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4456 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4457 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4458 cmd->data.setadapterparms.hdr.seq_no);
4459 if (cmd->data.setadapterparms.hdr.seq_no <
4460 cmd->data.setadapterparms.hdr.used_total)
4461 return 1;
4462 return 0;
4463}
4464
4465int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4466{
4467 struct qeth_cmd_buffer *iob;
4468 struct qeth_ipa_cmd *cmd;
4469 struct qeth_snmp_ureq *ureq;
6fb392b1 4470 unsigned int req_len;
4a71df50
FB		 4471 struct qeth_arp_query_info qinfo = {0, };
4472 int rc = 0;
4473
847a50fd 4474 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4475
4476 if (card->info.guestlan)
4477 return -EOPNOTSUPP;
4478
4479 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4480 (!card->options.layer2)) {
4a71df50
FB		 4481 return -EOPNOTSUPP;
4482 }
4483 /* skip 4 bytes (data_len struct member) to get req_len */
4484 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4485 return -EFAULT;
6fb392b1
UB		 4486 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4487 sizeof(struct qeth_ipacmd_hdr) -
4488 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4489 return -EINVAL;
4986f3f0
JL		 4490 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4491 if (IS_ERR(ureq)) {
847a50fd 4492 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4493 return PTR_ERR(ureq);
4a71df50
FB		 4494 }
4495 qinfo.udata_len = ureq->hdr.data_len;
4496 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4497 if (!qinfo.udata) {
4498 kfree(ureq);
4499 return -ENOMEM;
4500 }
4501 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4502
4503 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4504 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4505 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4506 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4507 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4508 qeth_snmp_command_cb, (void *)&qinfo);
4509 if (rc)
14cc21b6 4510 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4511 QETH_CARD_IFNAME(card), rc);
4512 else {
4513 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4514 rc = -EFAULT;
4515 }
4516
4517 kfree(ureq);
4518 kfree(qinfo.udata);
4519 return rc;
4520}
4521EXPORT_SYMBOL_GPL(qeth_snmp_command);
4522
c3ab96f3
FB		 4523static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4524 struct qeth_reply *reply, unsigned long data)
4525{
4526 struct qeth_ipa_cmd *cmd;
4527 struct qeth_qoat_priv *priv;
4528 char *resdata;
4529 int resdatalen;
4530
4531 QETH_CARD_TEXT(card, 3, "qoatcb");
4532
4533 cmd = (struct qeth_ipa_cmd *)data;
4534 priv = (struct qeth_qoat_priv *)reply->param;
4535 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4536 resdata = (char *)data + 28;
4537
4538 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4539 cmd->hdr.return_code = IPA_RC_FFFF;
4540 return 0;
4541 }
4542
4543 memcpy((priv->buffer + priv->response_len), resdata,
4544 resdatalen);
4545 priv->response_len += resdatalen;
4546
4547 if (cmd->data.setadapterparms.hdr.seq_no <
4548 cmd->data.setadapterparms.hdr.used_total)
4549 return 1;
4550 return 0;
4551}
4552
4553int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4554{
4555 int rc = 0;
4556 struct qeth_cmd_buffer *iob;
4557 struct qeth_ipa_cmd *cmd;
4558 struct qeth_query_oat *oat_req;
4559 struct qeth_query_oat_data oat_data;
4560 struct qeth_qoat_priv priv;
4561 void __user *tmp;
4562
4563 QETH_CARD_TEXT(card, 3, "qoatcmd");
4564
4565 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4566 rc = -EOPNOTSUPP;
4567 goto out;
4568 }
4569
4570 if (copy_from_user(&oat_data, udata,
4571 sizeof(struct qeth_query_oat_data))) {
4572 rc = -EFAULT;
4573 goto out;
4574 }
4575
4576 priv.buffer_len = oat_data.buffer_len;
4577 priv.response_len = 0;
4578 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4579 if (!priv.buffer) {
4580 rc = -ENOMEM;
4581 goto out;
4582 }
4583
4584 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4585 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4586 sizeof(struct qeth_query_oat));
4587 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4588 oat_req = &cmd->data.setadapterparms.data.query_oat;
4589 oat_req->subcmd_code = oat_data.command;
4590
4591 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4592 &priv);
4593 if (!rc) {
4594 if (is_compat_task())
4595 tmp = compat_ptr(oat_data.ptr);
4596 else
4597 tmp = (void __user *)(unsigned long)oat_data.ptr;
4598
4599 if (copy_to_user(tmp, priv.buffer,
4600 priv.response_len)) {
4601 rc = -EFAULT;
4602 goto out_free;
4603 }
4604
4605 oat_data.response_len = priv.response_len;
4606
4607 if (copy_to_user(udata, &oat_data,
4608 sizeof(struct qeth_query_oat_data)))
4609 rc = -EFAULT;
4610 } else
4611 if (rc == IPA_RC_FFFF)
4612 rc = -EFAULT;
4613
4614out_free:
4615 kfree(priv.buffer);
4616out:
4617 return rc;
4618}
4619EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4620
e71e4072
HC		 4621static int qeth_query_card_info_cb(struct qeth_card *card,
4622 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4623{
4624 struct qeth_ipa_cmd *cmd;
4625 struct qeth_query_card_info *card_info;
4626 struct carrier_info *carrier_info;
4627
4628 QETH_CARD_TEXT(card, 2, "qcrdincb");
4629 carrier_info = (struct carrier_info *)reply->param;
4630 cmd = (struct qeth_ipa_cmd *)data;
4631 card_info = &cmd->data.setadapterparms.data.card_info;
4632 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4633 carrier_info->card_type = card_info->card_type;
4634 carrier_info->port_mode = card_info->port_mode;
4635 carrier_info->port_speed = card_info->port_speed;
4636 }
4637
4638 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4639 return 0;
4640}
4641
4642int qeth_query_card_info(struct qeth_card *card,
4643 struct carrier_info *carrier_info)
4644{
4645 struct qeth_cmd_buffer *iob;
4646
4647 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4648 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4649 return -EOPNOTSUPP;
4650 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4651 sizeof(struct qeth_ipacmd_setadpparms_hdr));
4652 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4653 (void *)carrier_info);
4654}
4655EXPORT_SYMBOL_GPL(qeth_query_card_info);
4656
4a71df50
FB		 4657static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4658{
4659 switch (card->info.type) {
4660 case QETH_CARD_TYPE_IQD:
4661 return 2;
4662 default:
4663 return 0;
4664 }
4665}
4666
d0ff1f52
UB		 4667static void qeth_determine_capabilities(struct qeth_card *card)
4668{
4669 int rc;
4670 int length;
4671 char *prcd;
4672 struct ccw_device *ddev;
4673 int ddev_offline = 0;
4674
4675 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4676 ddev = CARD_DDEV(card);
4677 if (!ddev->online) {
4678 ddev_offline = 1;
4679 rc = ccw_device_set_online(ddev);
4680 if (rc) {
4681 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4682 goto out;
4683 }
4684 }
4685
4686 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4687 if (rc) {
4688 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4689 dev_name(&card->gdev->dev), rc);
4690 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4691 goto out_offline;
4692 }
4693 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4694 if (ddev_offline)
4695 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4696 kfree(prcd);
4697
4698 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4699 if (rc)
4700 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4701
0da9581d
EL		 4702 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4703 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4704 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4705 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4706 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4707 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4708 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4709 dev_info(&card->gdev->dev,
4710 "Completion Queueing supported\n");
4711 } else {
4712 card->options.cq = QETH_CQ_NOTAVAILABLE;
4713 }
4714
4715
d0ff1f52
UB		 4716out_offline:
4717 if (ddev_offline == 1)
4718 ccw_device_set_offline(ddev);
4719out:
4720 return;
4721}
4722
0da9581d
EL		 4723static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4724 struct qdio_buffer **in_sbal_ptrs,
4725 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4726 int i;
4727
4728 if (card->options.cq == QETH_CQ_ENABLED) {
4729 int offset = QDIO_MAX_BUFFERS_PER_Q *
4730 (card->qdio.no_in_queues - 1);
4731 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4732 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4733 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4734 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4735 }
4736
4737 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4738 }
4739}
4740
4a71df50
FB		 4741static int qeth_qdio_establish(struct qeth_card *card)
4742{
4743 struct qdio_initialize init_data;
4744 char *qib_param_field;
4745 struct qdio_buffer **in_sbal_ptrs;
104ea556 4746 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4747 struct qdio_buffer **out_sbal_ptrs;
4748 int i, j, k;
4749 int rc = 0;
4750
d11ba0c4 4751 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4752
4753 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4754 GFP_KERNEL);
104ea556 4755 if (!qib_param_field) {
4756 rc = -ENOMEM;
4757 goto out_free_nothing;
4758 }
4a71df50
FB		 4759
4760 qeth_create_qib_param_field(card, qib_param_field);
4761 qeth_create_qib_param_field_blkt(card, qib_param_field);
4762
b3332930 4763 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4764 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4765 GFP_KERNEL);
4766 if (!in_sbal_ptrs) {
104ea556 4767 rc = -ENOMEM;
4768 goto out_free_qib_param;
4a71df50 4769 }
0da9581d 4770 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4771 in_sbal_ptrs[i] = (struct qdio_buffer *)
4772 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4773 }
4a71df50 4774
0da9581d
EL		 4775 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4776 GFP_KERNEL);
104ea556 4777 if (!queue_start_poll) {
4778 rc = -ENOMEM;
4779 goto out_free_in_sbals;
4780 }
0da9581d 4781 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4782 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4783
4784 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4785
4a71df50 4786 out_sbal_ptrs =
b3332930 4787 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4788 sizeof(void *), GFP_KERNEL);
4789 if (!out_sbal_ptrs) {
104ea556 4790 rc = -ENOMEM;
4791 goto out_free_queue_start_poll;
4a71df50
FB		 4792 }
4793 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4794 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4795 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4796 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4797 }
4798
4799 memset(&init_data, 0, sizeof(struct qdio_initialize));
4800 init_data.cdev = CARD_DDEV(card);
4801 init_data.q_format = qeth_get_qdio_q_format(card);
4802 init_data.qib_param_field_format = 0;
4803 init_data.qib_param_field = qib_param_field;
0da9581d 4804 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4805 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4806 init_data.input_handler = card->discipline->input_handler;
4807 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4808 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4809 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4810 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4811 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4812 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4813 init_data.scan_threshold =
0fa81cd4 4814 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4815
4816 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4817 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4818 rc = qdio_allocate(&init_data);
4819 if (rc) {
4820 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4821 goto out;
4822 }
4823 rc = qdio_establish(&init_data);
4824 if (rc) {
4a71df50 4825 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4826 qdio_free(CARD_DDEV(card));
4827 }
4a71df50 4828 }
0da9581d
EL		 4829
4830 switch (card->options.cq) {
4831 case QETH_CQ_ENABLED:
4832 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4833 break;
4834 case QETH_CQ_DISABLED:
4835 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4836 break;
4837 default:
4838 break;
4839 }
cc961d40 4840out:
4a71df50 4841 kfree(out_sbal_ptrs);
104ea556 4842out_free_queue_start_poll:
4843 kfree(queue_start_poll);
4844out_free_in_sbals:
4a71df50 4845 kfree(in_sbal_ptrs);
104ea556 4846out_free_qib_param:
4a71df50 4847 kfree(qib_param_field);
104ea556 4848out_free_nothing:
4a71df50
FB		 4849 return rc;
4850}
4851
4852static void qeth_core_free_card(struct qeth_card *card)
4853{
4854
d11ba0c4
PT		 4855 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4856 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4857 qeth_clean_channel(&card->read);
4858 qeth_clean_channel(&card->write);
4859 if (card->dev)
4860 free_netdev(card->dev);
4861 kfree(card->ip_tbd_list);
4862 qeth_free_qdio_buffers(card);
6bcac508 4863 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4864 kfree(card);
4865}
4866
395672e0
SR		 4867void qeth_trace_features(struct qeth_card *card)
4868{
4869 QETH_CARD_TEXT(card, 2, "features");
4870 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4871 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4872 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4873 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4874 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4875 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4876 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4877}
4878EXPORT_SYMBOL_GPL(qeth_trace_features);
4879
4a71df50 4880static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4881 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4882 .driver_info = QETH_CARD_TYPE_OSD},
4883 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4884 .driver_info = QETH_CARD_TYPE_IQD},
4885 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4886 .driver_info = QETH_CARD_TYPE_OSN},
4887 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4888 .driver_info = QETH_CARD_TYPE_OSM},
4889 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4890 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4891 {},
4892};
4893MODULE_DEVICE_TABLE(ccw, qeth_ids);
4894
4895static struct ccw_driver qeth_ccw_driver = {
3bda058b 4896 .driver = {
3e70b3b8 4897 .owner = THIS_MODULE,
3bda058b
SO		 4898 .name = "qeth",
4899 },
4a71df50
FB		 4900 .ids = qeth_ids,
4901 .probe = ccwgroup_probe_ccwdev,
4902 .remove = ccwgroup_remove_ccwdev,
4903};
4904
4a71df50
FB		 4905int qeth_core_hardsetup_card(struct qeth_card *card)
4906{
6ebb7f8d 4907 int retries = 3;
4a71df50
FB		 4908 int rc;
4909
d11ba0c4 4910 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4911 atomic_set(&card->force_alloc_skb, 0);
725b9c04 4912 qeth_update_from_chp_desc(card);
4a71df50 4913retry:
6ebb7f8d 4914 if (retries < 3)
74eacdb9
FB		 4915 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4916 dev_name(&card->gdev->dev));
22ae2790 4917 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 4918 ccw_device_set_offline(CARD_DDEV(card));
4919 ccw_device_set_offline(CARD_WDEV(card));
4920 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 4921 qdio_free(CARD_DDEV(card));
aa909224
UB		 4922 rc = ccw_device_set_online(CARD_RDEV(card));
4923 if (rc)
4924 goto retriable;
4925 rc = ccw_device_set_online(CARD_WDEV(card));
4926 if (rc)
4927 goto retriable;
4928 rc = ccw_device_set_online(CARD_DDEV(card));
4929 if (rc)
4930 goto retriable;
aa909224 4931retriable:
4a71df50 4932 if (rc == -ERESTARTSYS) {
d11ba0c4 4933 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4934 return rc;
4935 } else if (rc) {
d11ba0c4 4936 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 4937 if (--retries < 0)
4a71df50
FB		 4938 goto out;
4939 else
4940 goto retry;
4941 }
d0ff1f52 4942 qeth_determine_capabilities(card);
4a71df50
FB		 4943 qeth_init_tokens(card);
4944 qeth_init_func_level(card);
4945 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4946 if (rc == -ERESTARTSYS) {
d11ba0c4 4947 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4948 return rc;
4949 } else if (rc) {
d11ba0c4 4950 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4951 if (--retries < 0)
4952 goto out;
4953 else
4954 goto retry;
4955 }
4956 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4957 if (rc == -ERESTARTSYS) {
d11ba0c4 4958 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4959 return rc;
4960 } else if (rc) {
d11ba0c4 4961 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4962 if (--retries < 0)
4963 goto out;
4964 else
4965 goto retry;
4966 }
908abbb5 4967 card->read_or_write_problem = 0;
4a71df50
FB		 4968 rc = qeth_mpc_initialize(card);
4969 if (rc) {
d11ba0c4 4970 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4971 goto out;
4972 }
1da74b1c
FB		 4973
4974 card->options.ipa4.supported_funcs = 0;
4975 card->options.adp.supported_funcs = 0;
b4d72c08 4976 card->options.sbp.supported_funcs = 0;
1da74b1c
FB		 4977 card->info.diagass_support = 0;
4978 qeth_query_ipassists(card, QETH_PROT_IPV4);
4979 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4980 qeth_query_setadapterparms(card);
4981 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4982 qeth_query_setdiagass(card);
4a71df50
FB		 4983 return 0;
4984out:
74eacdb9
FB		 4985 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4986 "an error on the device\n");
4987 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4988 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4989 return rc;
4990}
4991EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4992
b3332930
FB		 4993static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4994 struct qdio_buffer_element *element,
4a71df50
FB		 4995 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4996{
4997 struct page *page = virt_to_page(element->addr);
4998 if (*pskb == NULL) {
b3332930
FB		 4999 if (qethbuffer->rx_skb) {
5000 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
5001 *pskb = qethbuffer->rx_skb;
5002 qethbuffer->rx_skb = NULL;
5003 } else {
5004 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5005 if (!(*pskb))
5006 return -ENOMEM;
5007 }
5008
4a71df50 5009 skb_reserve(*pskb, ETH_HLEN);
b3332930 5010 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 5011 memcpy(skb_put(*pskb, data_len), element->addr + offset,
5012 data_len);
5013 } else {
5014 get_page(page);
b3332930
FB		 5015 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
5016 element->addr + offset, QETH_RX_PULL_LEN);
5017 skb_fill_page_desc(*pskb, *pfrag, page,
5018 offset + QETH_RX_PULL_LEN,
5019 data_len - QETH_RX_PULL_LEN);
5020 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5021 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5022 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 5023 (*pfrag)++;
5024 }
5025 } else {
5026 get_page(page);
5027 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5028 (*pskb)->data_len += data_len;
5029 (*pskb)->len += data_len;
5030 (*pskb)->truesize += data_len;
5031 (*pfrag)++;
5032 }
0da9581d
EL		 5033
5034
4a71df50
FB		 5035 return 0;
5036}
5037
5038struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5039 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5040 struct qdio_buffer_element **__element, int *__offset,
5041 struct qeth_hdr **hdr)
5042{
5043 struct qdio_buffer_element *element = *__element;
b3332930 5044 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 5045 int offset = *__offset;
5046 struct sk_buff *skb = NULL;
76b11f8e 5047 int skb_len = 0;
4a71df50
FB		 5048 void *data_ptr;
5049 int data_len;
5050 int headroom = 0;
5051 int use_rx_sg = 0;
5052 int frag = 0;
5053
4a71df50
FB		 5054 /* qeth_hdr must not cross element boundaries */
5055 if (element->length < offset + sizeof(struct qeth_hdr)) {
5056 if (qeth_is_last_sbale(element))
5057 return NULL;
5058 element++;
5059 offset = 0;
5060 if (element->length < sizeof(struct qeth_hdr))
5061 return NULL;
5062 }
5063 *hdr = element->addr + offset;
5064
5065 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5066 switch ((*hdr)->hdr.l2.id) {
5067 case QETH_HEADER_TYPE_LAYER2:
5068 skb_len = (*hdr)->hdr.l2.pkt_length;
5069 break;
5070 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5071 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5072 headroom = ETH_HLEN;
76b11f8e
UB		 5073 break;
5074 case QETH_HEADER_TYPE_OSN:
5075 skb_len = (*hdr)->hdr.osn.pdu_length;
5076 headroom = sizeof(struct qeth_hdr);
5077 break;
5078 default:
5079 break;
4a71df50
FB		 5080 }
5081
5082 if (!skb_len)
5083 return NULL;
5084
b3332930
FB		 5085 if (((skb_len >= card->options.rx_sg_cb) &&
5086 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5087 (!atomic_read(&card->force_alloc_skb))) ||
5088 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 5089 use_rx_sg = 1;
5090 } else {
5091 skb = dev_alloc_skb(skb_len + headroom);
5092 if (!skb)
5093 goto no_mem;
5094 if (headroom)
5095 skb_reserve(skb, headroom);
5096 }
5097
5098 data_ptr = element->addr + offset;
5099 while (skb_len) {
5100 data_len = min(skb_len, (int)(element->length - offset));
5101 if (data_len) {
5102 if (use_rx_sg) {
b3332930
FB		 5103 if (qeth_create_skb_frag(qethbuffer, element,
5104 &skb, offset, &frag, data_len))
4a71df50
FB		 5105 goto no_mem;
5106 } else {
5107 memcpy(skb_put(skb, data_len), data_ptr,
5108 data_len);
5109 }
5110 }
5111 skb_len -= data_len;
5112 if (skb_len) {
5113 if (qeth_is_last_sbale(element)) {
847a50fd 5114 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5115 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5116 dev_kfree_skb_any(skb);
5117 card->stats.rx_errors++;
5118 return NULL;
5119 }
5120 element++;
5121 offset = 0;
5122 data_ptr = element->addr;
5123 } else {
5124 offset += data_len;
5125 }
5126 }
5127 *__element = element;
5128 *__offset = offset;
5129 if (use_rx_sg && card->options.performance_stats) {
5130 card->perf_stats.sg_skbs_rx++;
5131 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5132 }
5133 return skb;
5134no_mem:
5135 if (net_ratelimit()) {
847a50fd 5136 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5137 }
5138 card->stats.rx_dropped++;
5139 return NULL;
5140}
5141EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5142
5143static void qeth_unregister_dbf_views(void)
5144{
d11ba0c4
PT		 5145 int x;
5146 for (x = 0; x < QETH_DBF_INFOS; x++) {
5147 debug_unregister(qeth_dbf[x].id);
5148 qeth_dbf[x].id = NULL;
5149 }
4a71df50
FB		 5150}
5151
8e96c51c 5152void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5153{
5154 char dbf_txt_buf[32];
345aa66e 5155 va_list args;
cd023216 5156
8e6a8285 5157 if (!debug_level_enabled(id, level))
cd023216 5158 return;
345aa66e
PT		 5159 va_start(args, fmt);
5160 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5161 va_end(args);
8e96c51c 5162 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5163}
5164EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5165
4a71df50
FB		 5166static int qeth_register_dbf_views(void)
5167{
d11ba0c4
PT		 5168 int ret;
5169 int x;
5170
5171 for (x = 0; x < QETH_DBF_INFOS; x++) {
5172 /* register the areas */
5173 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5174 qeth_dbf[x].pages,
5175 qeth_dbf[x].areas,
5176 qeth_dbf[x].len);
5177 if (qeth_dbf[x].id == NULL) {
5178 qeth_unregister_dbf_views();
5179 return -ENOMEM;
5180 }
4a71df50 5181
d11ba0c4
PT		 5182 /* register a view */
5183 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5184 if (ret) {
5185 qeth_unregister_dbf_views();
5186 return ret;
5187 }
4a71df50 5188
d11ba0c4
PT		 5189 /* set a passing level */
5190 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5191 }
4a71df50
FB		 5192
5193 return 0;
5194}
5195
5196int qeth_core_load_discipline(struct qeth_card *card,
5197 enum qeth_discipline_id discipline)
5198{
5199 int rc = 0;
2022e00c 5200 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5201 switch (discipline) {
5202 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5203 card->discipline = try_then_request_module(
5204 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5205 break;
5206 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5207 card->discipline = try_then_request_module(
5208 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5209 break;
5210 }
c041f2d4 5211 if (!card->discipline) {
74eacdb9
FB		 5212 dev_err(&card->gdev->dev, "There is no kernel module to "
5213 "support discipline %d\n", discipline);
4a71df50
FB		 5214 rc = -EINVAL;
5215 }
2022e00c 5216 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5217 return rc;
5218}
5219
5220void qeth_core_free_discipline(struct qeth_card *card)
5221{
5222 if (card->options.layer2)
c041f2d4 5223 symbol_put(qeth_l2_discipline);
4a71df50 5224 else
c041f2d4
SO		 5225 symbol_put(qeth_l3_discipline);
5226 card->discipline = NULL;
4a71df50
FB		 5227}
5228
b7169c51
SO		 5229static const struct device_type qeth_generic_devtype = {
5230 .name = "qeth_generic",
5231 .groups = qeth_generic_attr_groups,
5232};
5233static const struct device_type qeth_osn_devtype = {
5234 .name = "qeth_osn",
5235 .groups = qeth_osn_attr_groups,
5236};
5237
819dc537
SR		 5238#define DBF_NAME_LEN 20
5239
5240struct qeth_dbf_entry {
5241 char dbf_name[DBF_NAME_LEN];
5242 debug_info_t *dbf_info;
5243 struct list_head dbf_list;
5244};
5245
5246static LIST_HEAD(qeth_dbf_list);
5247static DEFINE_MUTEX(qeth_dbf_list_mutex);
5248
5249static debug_info_t *qeth_get_dbf_entry(char *name)
5250{
5251 struct qeth_dbf_entry *entry;
5252 debug_info_t *rc = NULL;
5253
5254 mutex_lock(&qeth_dbf_list_mutex);
5255 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5256 if (strcmp(entry->dbf_name, name) == 0) {
5257 rc = entry->dbf_info;
5258 break;
5259 }
5260 }
5261 mutex_unlock(&qeth_dbf_list_mutex);
5262 return rc;
5263}
5264
5265static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5266{
5267 struct qeth_dbf_entry *new_entry;
5268
5269 card->debug = debug_register(name, 2, 1, 8);
5270 if (!card->debug) {
5271 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5272 goto err;
5273 }
5274 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5275 goto err_dbg;
5276 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5277 if (!new_entry)
5278 goto err_dbg;
5279 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5280 new_entry->dbf_info = card->debug;
5281 mutex_lock(&qeth_dbf_list_mutex);
5282 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5283 mutex_unlock(&qeth_dbf_list_mutex);
5284
5285 return 0;
5286
5287err_dbg:
5288 debug_unregister(card->debug);
5289err:
5290 return -ENOMEM;
5291}
5292
5293static void qeth_clear_dbf_list(void)
5294{
5295 struct qeth_dbf_entry *entry, *tmp;
5296
5297 mutex_lock(&qeth_dbf_list_mutex);
5298 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5299 list_del(&entry->dbf_list);
5300 debug_unregister(entry->dbf_info);
5301 kfree(entry);
5302 }
5303 mutex_unlock(&qeth_dbf_list_mutex);
5304}
5305
4a71df50
FB		 5306static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5307{
5308 struct qeth_card *card;
5309 struct device *dev;
5310 int rc;
5311 unsigned long flags;
819dc537 5312 char dbf_name[DBF_NAME_LEN];
4a71df50 5313
d11ba0c4 5314 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5315
5316 dev = &gdev->dev;
5317 if (!get_device(dev))
5318 return -ENODEV;
5319
2a0217d5 5320 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5321
5322 card = qeth_alloc_card();
5323 if (!card) {
d11ba0c4 5324 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5325 rc = -ENOMEM;
5326 goto err_dev;
5327 }
af039068
CO		 5328
5329 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5330 dev_name(&gdev->dev));
819dc537 5331 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5332 if (!card->debug) {
819dc537
SR		 5333 rc = qeth_add_dbf_entry(card, dbf_name);
5334 if (rc)
5335 goto err_card;
af039068 5336 }
af039068 5337
4a71df50
FB		 5338 card->read.ccwdev = gdev->cdev[0];
5339 card->write.ccwdev = gdev->cdev[1];
5340 card->data.ccwdev = gdev->cdev[2];
5341 dev_set_drvdata(&gdev->dev, card);
5342 card->gdev = gdev;
5343 gdev->cdev[0]->handler = qeth_irq;
5344 gdev->cdev[1]->handler = qeth_irq;
5345 gdev->cdev[2]->handler = qeth_irq;
5346
5347 rc = qeth_determine_card_type(card);
5348 if (rc) {
d11ba0c4 5349 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
819dc537 5350 goto err_card;
4a71df50
FB		 5351 }
5352 rc = qeth_setup_card(card);
5353 if (rc) {
d11ba0c4 5354 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5355 goto err_card;
4a71df50
FB		 5356 }
5357
5113fec0 5358 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5359 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5360 else
b7169c51
SO		 5361 gdev->dev.type = &qeth_generic_devtype;
5362
5113fec0
UB		 5363 switch (card->info.type) {
5364 case QETH_CARD_TYPE_OSN:
5365 case QETH_CARD_TYPE_OSM:
4a71df50 5366 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5367 if (rc)
819dc537 5368 goto err_card;
c041f2d4 5369 rc = card->discipline->setup(card->gdev);
4a71df50 5370 if (rc)
5113fec0
UB		 5371 goto err_disc;
5372 case QETH_CARD_TYPE_OSD:
5373 case QETH_CARD_TYPE_OSX:
5374 default:
5375 break;
4a71df50
FB		 5376 }
5377
5378 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5379 list_add_tail(&card->list, &qeth_core_card_list.list);
5380 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5381
5382 qeth_determine_capabilities(card);
4a71df50
FB		 5383 return 0;
5384
5113fec0
UB		 5385err_disc:
5386 qeth_core_free_discipline(card);
4a71df50
FB		 5387err_card:
5388 qeth_core_free_card(card);
5389err_dev:
5390 put_device(dev);
5391 return rc;
5392}
5393
5394static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5395{
5396 unsigned long flags;
5397 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5398
28a7e4c9 5399 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5400
c041f2d4
SO		 5401 if (card->discipline) {
5402 card->discipline->remove(gdev);
9dc48ccc
UB		 5403 qeth_core_free_discipline(card);
5404 }
5405
4a71df50
FB		 5406 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5407 list_del(&card->list);
5408 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5409 qeth_core_free_card(card);
5410 dev_set_drvdata(&gdev->dev, NULL);
5411 put_device(&gdev->dev);
5412 return;
5413}
5414
5415static int qeth_core_set_online(struct ccwgroup_device *gdev)
5416{
5417 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5418 int rc = 0;
5419 int def_discipline;
5420
c041f2d4 5421 if (!card->discipline) {
4a71df50
FB		 5422 if (card->info.type == QETH_CARD_TYPE_IQD)
5423 def_discipline = QETH_DISCIPLINE_LAYER3;
5424 else
5425 def_discipline = QETH_DISCIPLINE_LAYER2;
5426 rc = qeth_core_load_discipline(card, def_discipline);
5427 if (rc)
5428 goto err;
c041f2d4 5429 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5430 if (rc)
5431 goto err;
5432 }
c041f2d4 5433 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5434err:
5435 return rc;
5436}
5437
5438static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5439{
5440 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5441 return card->discipline->set_offline(gdev);
4a71df50
FB		 5442}
5443
5444static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5445{
5446 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5447 if (card->discipline && card->discipline->shutdown)
5448 card->discipline->shutdown(gdev);
4a71df50
FB		 5449}
5450
bbcfcdc8
FB		 5451static int qeth_core_prepare(struct ccwgroup_device *gdev)
5452{
5453 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5454 if (card->discipline && card->discipline->prepare)
5455 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5456 return 0;
5457}
5458
5459static void qeth_core_complete(struct ccwgroup_device *gdev)
5460{
5461 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5462 if (card->discipline && card->discipline->complete)
5463 card->discipline->complete(gdev);
bbcfcdc8
FB		 5464}
5465
5466static int qeth_core_freeze(struct ccwgroup_device *gdev)
5467{
5468 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5469 if (card->discipline && card->discipline->freeze)
5470 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5471 return 0;
5472}
5473
5474static int qeth_core_thaw(struct ccwgroup_device *gdev)
5475{
5476 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5477 if (card->discipline && card->discipline->thaw)
5478 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5479 return 0;
5480}
5481
5482static int qeth_core_restore(struct ccwgroup_device *gdev)
5483{
5484 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5485 if (card->discipline && card->discipline->restore)
5486 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5487 return 0;
5488}
5489
4a71df50 5490static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5491 .driver = {
5492 .owner = THIS_MODULE,
5493 .name = "qeth",
5494 },
b7169c51 5495 .setup = qeth_core_probe_device,
4a71df50
FB		 5496 .remove = qeth_core_remove_device,
5497 .set_online = qeth_core_set_online,
5498 .set_offline = qeth_core_set_offline,
5499 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5500 .prepare = qeth_core_prepare,
5501 .complete = qeth_core_complete,
5502 .freeze = qeth_core_freeze,
5503 .thaw = qeth_core_thaw,
5504 .restore = qeth_core_restore,
4a71df50
FB		 5505};
5506
b7169c51
SO		 5507static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5508 const char *buf, size_t count)
4a71df50
FB		 5509{
5510 int err;
4a71df50 5511
b7169c51 5512 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5513 &qeth_core_ccwgroup_driver, 3, buf);
5514
5515 return err ? err : count;
5516}
4a71df50
FB		 5517static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5518
f47e2256
SO		 5519static struct attribute *qeth_drv_attrs[] = {
5520 &driver_attr_group.attr,
5521 NULL,
5522};
5523static struct attribute_group qeth_drv_attr_group = {
5524 .attrs = qeth_drv_attrs,
5525};
5526static const struct attribute_group *qeth_drv_attr_groups[] = {
5527 &qeth_drv_attr_group,
5528 NULL,
5529};
5530
4a71df50
FB		 5531static struct {
5532 const char str[ETH_GSTRING_LEN];
5533} qeth_ethtool_stats_keys[] = {
5534/* 0 */{"rx skbs"},
5535 {"rx buffers"},
5536 {"tx skbs"},
5537 {"tx buffers"},
5538 {"tx skbs no packing"},
5539 {"tx buffers no packing"},
5540 {"tx skbs packing"},
5541 {"tx buffers packing"},
5542 {"tx sg skbs"},
5543 {"tx sg frags"},
5544/* 10 */{"rx sg skbs"},
5545 {"rx sg frags"},
5546 {"rx sg page allocs"},
5547 {"tx large kbytes"},
5548 {"tx large count"},
5549 {"tx pk state ch n->p"},
5550 {"tx pk state ch p->n"},
5551 {"tx pk watermark low"},
5552 {"tx pk watermark high"},
5553 {"queue 0 buffer usage"},
5554/* 20 */{"queue 1 buffer usage"},
5555 {"queue 2 buffer usage"},
5556 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5557 {"rx poll time"},
5558 {"rx poll count"},
4a71df50
FB		 5559 {"rx do_QDIO time"},
5560 {"rx do_QDIO count"},
5561 {"tx handler time"},
5562 {"tx handler count"},
5563 {"tx time"},
5564/* 30 */{"tx count"},
5565 {"tx do_QDIO time"},
5566 {"tx do_QDIO count"},
f61a0d05 5567 {"tx csum"},
c3b4a740 5568 {"tx lin"},
0da9581d
EL		 5569 {"cq handler count"},
5570 {"cq handler time"}
4a71df50
FB		 5571};
5572
df8b4ec8 5573int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5574{
df8b4ec8
BH		 5575 switch (stringset) {
5576 case ETH_SS_STATS:
5577 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5578 default:
5579 return -EINVAL;
5580 }
4a71df50 5581}
df8b4ec8 5582EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5583
5584void qeth_core_get_ethtool_stats(struct net_device *dev,
5585 struct ethtool_stats *stats, u64 *data)
5586{
509e2562 5587 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5588 data[0] = card->stats.rx_packets -
5589 card->perf_stats.initial_rx_packets;
5590 data[1] = card->perf_stats.bufs_rec;
5591 data[2] = card->stats.tx_packets -
5592 card->perf_stats.initial_tx_packets;
5593 data[3] = card->perf_stats.bufs_sent;
5594 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5595 - card->perf_stats.skbs_sent_pack;
5596 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5597 data[6] = card->perf_stats.skbs_sent_pack;
5598 data[7] = card->perf_stats.bufs_sent_pack;
5599 data[8] = card->perf_stats.sg_skbs_sent;
5600 data[9] = card->perf_stats.sg_frags_sent;
5601 data[10] = card->perf_stats.sg_skbs_rx;
5602 data[11] = card->perf_stats.sg_frags_rx;
5603 data[12] = card->perf_stats.sg_alloc_page_rx;
5604 data[13] = (card->perf_stats.large_send_bytes >> 10);
5605 data[14] = card->perf_stats.large_send_cnt;
5606 data[15] = card->perf_stats.sc_dp_p;
5607 data[16] = card->perf_stats.sc_p_dp;
5608 data[17] = QETH_LOW_WATERMARK_PACK;
5609 data[18] = QETH_HIGH_WATERMARK_PACK;
5610 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5611 data[20] = (card->qdio.no_out_queues > 1) ?
5612 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5613 data[21] = (card->qdio.no_out_queues > 2) ?
5614 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5615 data[22] = (card->qdio.no_out_queues > 3) ?
5616 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5617 data[23] = card->perf_stats.inbound_time;
5618 data[24] = card->perf_stats.inbound_cnt;
5619 data[25] = card->perf_stats.inbound_do_qdio_time;
5620 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5621 data[27] = card->perf_stats.outbound_handler_time;
5622 data[28] = card->perf_stats.outbound_handler_cnt;
5623 data[29] = card->perf_stats.outbound_time;
5624 data[30] = card->perf_stats.outbound_cnt;
5625 data[31] = card->perf_stats.outbound_do_qdio_time;
5626 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5627 data[33] = card->perf_stats.tx_csum;
c3b4a740 5628 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5629 data[35] = card->perf_stats.cq_cnt;
5630 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5631}
5632EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5633
5634void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5635{
5636 switch (stringset) {
5637 case ETH_SS_STATS:
5638 memcpy(data, &qeth_ethtool_stats_keys,
5639 sizeof(qeth_ethtool_stats_keys));
5640 break;
5641 default:
5642 WARN_ON(1);
5643 break;
5644 }
5645}
5646EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5647
5648void qeth_core_get_drvinfo(struct net_device *dev,
5649 struct ethtool_drvinfo *info)
5650{
509e2562 5651 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 5652
5653 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5654 sizeof(info->driver));
5655 strlcpy(info->version, "1.0", sizeof(info->version));
5656 strlcpy(info->fw_version, card->info.mcl_level,
5657 sizeof(info->fw_version));
5658 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5659 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 5660}
5661EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5662
02d5cb5b
EC		 5663/* Helper function to fill 'advertizing' and 'supported' which are the same. */
5664/* Autoneg and full-duplex are supported and advertized uncondionally. */
5665/* Always advertize and support all speeds up to specified, and only one */
5666/* specified port type. */
5667static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
5668 int maxspeed, int porttype)
5669{
5670 int port_sup, port_adv, spd_sup, spd_adv;
5671
5672 switch (porttype) {
5673 case PORT_TP:
5674 port_sup = SUPPORTED_TP;
5675 port_adv = ADVERTISED_TP;
5676 break;
5677 case PORT_FIBRE:
5678 port_sup = SUPPORTED_FIBRE;
5679 port_adv = ADVERTISED_FIBRE;
5680 break;
5681 default:
5682 port_sup = SUPPORTED_TP;
5683 port_adv = ADVERTISED_TP;
5684 WARN_ON_ONCE(1);
5685 }
5686
5687 /* "Fallthrough" case'es ordered from high to low result in setting */
5688 /* flags cumulatively, starting from the specified speed and down to */
5689 /* the lowest possible. */
5690 spd_sup = 0;
5691 spd_adv = 0;
5692 switch (maxspeed) {
5693 case SPEED_10000:
5694 spd_sup |= SUPPORTED_10000baseT_Full;
5695 spd_adv |= ADVERTISED_10000baseT_Full;
5696 case SPEED_1000:
5697 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
5698 spd_adv |= ADVERTISED_1000baseT_Half |
5699 ADVERTISED_1000baseT_Full;
5700 case SPEED_100:
5701 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
5702 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
5703 case SPEED_10:
5704 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5705 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5706 break;
5707 default:
5708 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5709 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5710 WARN_ON_ONCE(1);
5711 }
5712 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
5713 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
5714}
5715
3f9975aa
FB		 5716int qeth_core_ethtool_get_settings(struct net_device *netdev,
5717 struct ethtool_cmd *ecmd)
5718{
509e2562 5719 struct qeth_card *card = netdev->ml_priv;
3f9975aa 5720 enum qeth_link_types link_type;
02d5cb5b 5721 struct carrier_info carrier_info;
3f9975aa
FB		 5722
5723 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5724 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5725 else
5726 link_type = card->info.link_type;
5727
5728 ecmd->transceiver = XCVR_INTERNAL;
3f9975aa
FB		 5729 ecmd->duplex = DUPLEX_FULL;
5730 ecmd->autoneg = AUTONEG_ENABLE;
5731
5732 switch (link_type) {
5733 case QETH_LINK_TYPE_FAST_ETH:
5734 case QETH_LINK_TYPE_LANE_ETH100:
02d5cb5b 5735 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
3f9975aa
FB		 5736 ecmd->speed = SPEED_100;
5737 ecmd->port = PORT_TP;
5738 break;
5739
5740 case QETH_LINK_TYPE_GBIT_ETH:
5741 case QETH_LINK_TYPE_LANE_ETH1000:
02d5cb5b 5742 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
3f9975aa
FB		 5743 ecmd->speed = SPEED_1000;
5744 ecmd->port = PORT_FIBRE;
5745 break;
5746
5747 case QETH_LINK_TYPE_10GBIT_ETH:
02d5cb5b 5748 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
3f9975aa
FB		 5749 ecmd->speed = SPEED_10000;
5750 ecmd->port = PORT_FIBRE;
5751 break;
5752
5753 default:
02d5cb5b 5754 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
3f9975aa
FB		 5755 ecmd->speed = SPEED_10;
5756 ecmd->port = PORT_TP;
5757 }
5758
02d5cb5b
EC		 5759 /* Check if we can obtain more accurate information. */
5760 /* If QUERY_CARD_INFO command is not supported or fails, */
5761 /* just return the heuristics that was filled above. */
5762 if (qeth_query_card_info(card, &carrier_info) != 0)
5763 return 0;
5764
5765 netdev_dbg(netdev,
5766 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
5767 carrier_info.card_type,
5768 carrier_info.port_mode,
5769 carrier_info.port_speed);
5770
5771 /* Update attributes for which we've obtained more authoritative */
5772 /* information, leave the rest the way they where filled above. */
5773 switch (carrier_info.card_type) {
5774 case CARD_INFO_TYPE_1G_COPPER_A:
5775 case CARD_INFO_TYPE_1G_COPPER_B:
5776 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
5777 ecmd->port = PORT_TP;
5778 break;
5779 case CARD_INFO_TYPE_1G_FIBRE_A:
5780 case CARD_INFO_TYPE_1G_FIBRE_B:
5781 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
5782 ecmd->port = PORT_FIBRE;
5783 break;
5784 case CARD_INFO_TYPE_10G_FIBRE_A:
5785 case CARD_INFO_TYPE_10G_FIBRE_B:
5786 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
5787 ecmd->port = PORT_FIBRE;
5788 break;
5789 }
5790
5791 switch (carrier_info.port_mode) {
5792 case CARD_INFO_PORTM_FULLDUPLEX:
5793 ecmd->duplex = DUPLEX_FULL;
5794 break;
5795 case CARD_INFO_PORTM_HALFDUPLEX:
5796 ecmd->duplex = DUPLEX_HALF;
5797 break;
5798 }
5799
5800 switch (carrier_info.port_speed) {
5801 case CARD_INFO_PORTS_10M:
5802 ecmd->speed = SPEED_10;
5803 break;
5804 case CARD_INFO_PORTS_100M:
5805 ecmd->speed = SPEED_100;
5806 break;
5807 case CARD_INFO_PORTS_1G:
5808 ecmd->speed = SPEED_1000;
5809 break;
5810 case CARD_INFO_PORTS_10G:
5811 ecmd->speed = SPEED_10000;
5812 break;
5813 }
5814
3f9975aa
FB		 5815 return 0;
5816}
5817EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5818
4a71df50
FB		 5819static int __init qeth_core_init(void)
5820{
5821 int rc;
5822
74eacdb9 5823 pr_info("loading core functions\n");
4a71df50 5824 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 5825 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 5826 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 5827 mutex_init(&qeth_mod_mutex);
4a71df50 5828
0f54761d
SR		 5829 qeth_wq = create_singlethread_workqueue("qeth_wq");
5830
4a71df50
FB		 5831 rc = qeth_register_dbf_views();
5832 if (rc)
5833 goto out_err;
035da16f 5834 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 5835 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 5836 if (rc)
5837 goto register_err;
683d718a
FB		 5838 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5839 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5840 if (!qeth_core_header_cache) {
5841 rc = -ENOMEM;
5842 goto slab_err;
5843 }
0da9581d
EL		 5844 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5845 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5846 if (!qeth_qdio_outbuf_cache) {
5847 rc = -ENOMEM;
5848 goto cqslab_err;
5849 }
afb6ac59
SO		 5850 rc = ccw_driver_register(&qeth_ccw_driver);
5851 if (rc)
5852 goto ccw_err;
5853 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5854 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5855 if (rc)
5856 goto ccwgroup_err;
0da9581d 5857
683d718a 5858 return 0;
afb6ac59
SO		 5859
5860ccwgroup_err:
5861 ccw_driver_unregister(&qeth_ccw_driver);
5862ccw_err:
5863 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 5864cqslab_err:
5865 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5866slab_err:
035da16f 5867 root_device_unregister(qeth_core_root_dev);
4a71df50 5868register_err:
4a71df50
FB		 5869 qeth_unregister_dbf_views();
5870out_err:
74eacdb9 5871 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5872 return rc;
5873}
5874
5875static void __exit qeth_core_exit(void)
5876{
819dc537 5877 qeth_clear_dbf_list();
0f54761d 5878 destroy_workqueue(qeth_wq);
4a71df50
FB		 5879 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5880 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5881 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5882 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 5883 root_device_unregister(qeth_core_root_dev);
4a71df50 5884 qeth_unregister_dbf_views();
74eacdb9 5885 pr_info("core functions removed\n");
4a71df50
FB		 5886}
5887
5888module_init(qeth_core_init);
5889module_exit(qeth_core_exit);
5890MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5891MODULE_DESCRIPTION("qeth core functions");
5892MODULE_LICENSE("GPL");
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