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qeth: Consolidate tracing of card features
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
b3332930 22#include <net/iucv/af_iucv.h>
4a71df50 23
ab4227cb
MS		 24#include <asm/ebcdic.h>
25#include <asm/io.h>
1da74b1c 26#include <asm/sysinfo.h>
c3ab96f3 27#include <asm/compat.h>
4a71df50
FB		 28
29#include "qeth_core.h"
4a71df50 30
d11ba0c4
PT		 31struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
33 /* N P A M L V H */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 36 [QETH_DBF_MSG] = {"qeth_msg",
37 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 38 [QETH_DBF_CTRL] = {"qeth_control",
39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
40};
41EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 42
43struct qeth_card_list_struct qeth_core_card_list;
44EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 45struct kmem_cache *qeth_core_header_cache;
46EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 47static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 48
49static struct device *qeth_core_root_dev;
5113fec0 50static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 51static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 52static struct mutex qeth_mod_mutex;
4a71df50
FB		 53
54static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56static int qeth_issue_next_read(struct qeth_card *);
57static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59static void qeth_free_buffer_pool(struct qeth_card *);
60static int qeth_qdio_establish(struct qeth_card *);
0da9581d 61static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 62static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 66static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
72861ae7 69static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 70
4a71df50
FB		 71static inline const char *qeth_get_cardname(struct qeth_card *card)
72{
73 if (card->info.guestlan) {
74 switch (card->info.type) {
5113fec0 75 case QETH_CARD_TYPE_OSD:
7096b187 76 return " Virtual NIC QDIO";
4a71df50 77 case QETH_CARD_TYPE_IQD:
7096b187 78 return " Virtual NIC Hiper";
5113fec0 79 case QETH_CARD_TYPE_OSM:
7096b187 80 return " Virtual NIC QDIO - OSM";
5113fec0 81 case QETH_CARD_TYPE_OSX:
7096b187 82 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
5113fec0 88 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
5113fec0
UB		 94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
4a71df50
FB		 98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103}
104
105/* max length to be returned: 14 */
106const char *qeth_get_cardname_short(struct qeth_card *card)
107{
108 if (card->info.guestlan) {
109 switch (card->info.type) {
5113fec0 110 case QETH_CARD_TYPE_OSD:
7096b187 111 return "Virt.NIC QDIO";
4a71df50 112 case QETH_CARD_TYPE_IQD:
7096b187 113 return "Virt.NIC Hiper";
5113fec0 114 case QETH_CARD_TYPE_OSM:
7096b187 115 return "Virt.NIC OSM";
5113fec0 116 case QETH_CARD_TYPE_OSX:
7096b187 117 return "Virt.NIC OSX";
4a71df50
FB		 118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
5113fec0 123 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
5113fec0
UB		 148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
4a71df50
FB		 152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157}
158
159void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161{
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170}
171EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174{
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182}
183EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186{
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189}
190EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192void qeth_clear_working_pool_list(struct qeth_card *card)
193{
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
847a50fd 196 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201}
202EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204static int qeth_alloc_buffer_pool(struct qeth_card *card)
205{
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
847a50fd 210 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 218 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233}
234
235int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236{
847a50fd 237 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249}
76b11f8e 250EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 251
0da9581d
EL		 252static inline int qeth_cq_init(struct qeth_card *card)
253{
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270out:
271 return rc;
272}
273
274static inline int qeth_alloc_cq(struct qeth_card *card)
275{
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318out:
319 return rc;
320free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326}
327
328static inline void qeth_free_cq(struct qeth_card *card)
329{
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337}
338
b3332930
FB		 339static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361}
362
0da9581d
EL		 363static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365{
72861ae7
EL		 366 if (q->card->options.cq != QETH_CQ_ENABLED)
367 return;
368
0da9581d
EL		 369 if (q->bufs[bidx]->next_pending != NULL) {
370 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
371 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
372
373 while (c) {
374 if (forced_cleanup ||
375 atomic_read(&c->state) ==
376 QETH_QDIO_BUF_HANDLED_DELAYED) {
377 struct qeth_qdio_out_buffer *f = c;
378 QETH_CARD_TEXT(f->q->card, 5, "fp");
379 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 380 /* release here to avoid interleaving between
381 outbound tasklet and inbound tasklet
382 regarding notifications and lifecycle */
383 qeth_release_skbs(c);
384
0da9581d
EL		 385 c = f->next_pending;
386 BUG_ON(head->next_pending != f);
387 head->next_pending = c;
388 kmem_cache_free(qeth_qdio_outbuf_cache, f);
389 } else {
390 head = c;
391 c = c->next_pending;
392 }
393
394 }
395 }
72861ae7
EL		 396 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
397 QETH_QDIO_BUF_HANDLED_DELAYED)) {
398 /* for recovery situations */
399 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
400 qeth_init_qdio_out_buf(q, bidx);
401 QETH_CARD_TEXT(q->card, 2, "clprecov");
402 }
0da9581d
EL		 403}
404
405
406static inline void qeth_qdio_handle_aob(struct qeth_card *card,
407 unsigned long phys_aob_addr) {
408 struct qaob *aob;
409 struct qeth_qdio_out_buffer *buffer;
b3332930 410 enum iucv_tx_notify notification;
0da9581d
EL		 411
412 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
413 QETH_CARD_TEXT(card, 5, "haob");
414 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
415 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
416 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
417
418 BUG_ON(buffer == NULL);
419
b3332930
FB		 420 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
421 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
422 notification = TX_NOTIFY_OK;
423 } else {
424 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
b3332930
FB		 425 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
426 notification = TX_NOTIFY_DELAYED_OK;
427 }
428
429 if (aob->aorc != 0) {
430 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
431 notification = qeth_compute_cq_notification(aob->aorc, 1);
432 }
433 qeth_notify_skbs(buffer->q, buffer, notification);
434
0da9581d
EL		 435 buffer->aob = NULL;
436 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 437 QETH_QDIO_BUF_HANDLED_DELAYED);
438
0da9581d
EL		 439 /* from here on: do not touch buffer anymore */
440 qdio_release_aob(aob);
441}
442
443static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
444{
445 return card->options.cq == QETH_CQ_ENABLED &&
446 card->qdio.c_q != NULL &&
447 queue != 0 &&
448 queue == card->qdio.no_in_queues - 1;
449}
450
451
4a71df50
FB		 452static int qeth_issue_next_read(struct qeth_card *card)
453{
454 int rc;
455 struct qeth_cmd_buffer *iob;
456
847a50fd 457 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 458 if (card->read.state != CH_STATE_UP)
459 return -EIO;
460 iob = qeth_get_buffer(&card->read);
461 if (!iob) {
74eacdb9
FB		 462 dev_warn(&card->gdev->dev, "The qeth device driver "
463 "failed to recover an error on the device\n");
464 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
465 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 466 return -ENOMEM;
467 }
468 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 469 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 470 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
471 (addr_t) iob, 0, 0);
472 if (rc) {
74eacdb9
FB		 473 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
474 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 475 atomic_set(&card->read.irq_pending, 0);
908abbb5 476 card->read_or_write_problem = 1;
4a71df50
FB		 477 qeth_schedule_recovery(card);
478 wake_up(&card->wait_q);
479 }
480 return rc;
481}
482
483static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
484{
485 struct qeth_reply *reply;
486
487 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
488 if (reply) {
489 atomic_set(&reply->refcnt, 1);
490 atomic_set(&reply->received, 0);
491 reply->card = card;
6531084c 492 }
4a71df50
FB		 493 return reply;
494}
495
496static void qeth_get_reply(struct qeth_reply *reply)
497{
498 WARN_ON(atomic_read(&reply->refcnt) <= 0);
499 atomic_inc(&reply->refcnt);
500}
501
502static void qeth_put_reply(struct qeth_reply *reply)
503{
504 WARN_ON(atomic_read(&reply->refcnt) <= 0);
505 if (atomic_dec_and_test(&reply->refcnt))
506 kfree(reply);
507}
508
d11ba0c4 509static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 510 struct qeth_card *card)
511{
4a71df50 512 char *ipa_name;
d11ba0c4 513 int com = cmd->hdr.command;
4a71df50 514 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 515 if (rc)
70919e23
UB		 516 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
517 "x%X \"%s\"\n",
518 ipa_name, com, dev_name(&card->gdev->dev),
519 QETH_CARD_IFNAME(card), rc,
520 qeth_get_ipa_msg(rc));
d11ba0c4 521 else
70919e23
UB		 522 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
523 ipa_name, com, dev_name(&card->gdev->dev),
524 QETH_CARD_IFNAME(card));
4a71df50
FB		 525}
526
527static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
528 struct qeth_cmd_buffer *iob)
529{
530 struct qeth_ipa_cmd *cmd = NULL;
531
847a50fd 532 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 533 if (IS_IPA(iob->data)) {
534 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
535 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 536 if (cmd->hdr.command != IPA_CMD_SETCCID &&
537 cmd->hdr.command != IPA_CMD_DELCCID &&
538 cmd->hdr.command != IPA_CMD_MODCCID &&
539 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 540 qeth_issue_ipa_msg(cmd,
541 cmd->hdr.return_code, card);
4a71df50
FB		 542 return cmd;
543 } else {
544 switch (cmd->hdr.command) {
545 case IPA_CMD_STOPLAN:
74eacdb9
FB		 546 dev_warn(&card->gdev->dev,
547 "The link for interface %s on CHPID"
548 " 0x%X failed\n",
4a71df50
FB		 549 QETH_CARD_IFNAME(card),
550 card->info.chpid);
551 card->lan_online = 0;
552 if (card->dev && netif_carrier_ok(card->dev))
553 netif_carrier_off(card->dev);
554 return NULL;
555 case IPA_CMD_STARTLAN:
74eacdb9
FB		 556 dev_info(&card->gdev->dev,
557 "The link for %s on CHPID 0x%X has"
558 " been restored\n",
4a71df50
FB		 559 QETH_CARD_IFNAME(card),
560 card->info.chpid);
561 netif_carrier_on(card->dev);
922dc062 562 card->lan_online = 1;
1da74b1c
FB		 563 if (card->info.hwtrap)
564 card->info.hwtrap = 2;
4a71df50
FB		 565 qeth_schedule_recovery(card);
566 return NULL;
567 case IPA_CMD_MODCCID:
568 return cmd;
569 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 570 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 571 break;
572 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 573 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 574 break;
575 default:
c4cef07c 576 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 577 "but not a reply!\n");
578 break;
579 }
580 }
581 }
582 return cmd;
583}
584
585void qeth_clear_ipacmd_list(struct qeth_card *card)
586{
587 struct qeth_reply *reply, *r;
588 unsigned long flags;
589
847a50fd 590 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 591
592 spin_lock_irqsave(&card->lock, flags);
593 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
594 qeth_get_reply(reply);
595 reply->rc = -EIO;
596 atomic_inc(&reply->received);
597 list_del_init(&reply->list);
598 wake_up(&reply->wait_q);
599 qeth_put_reply(reply);
600 }
601 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 602 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 603}
604EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
605
5113fec0
UB		 606static int qeth_check_idx_response(struct qeth_card *card,
607 unsigned char *buffer)
4a71df50
FB		 608{
609 if (!buffer)
610 return 0;
611
d11ba0c4 612 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 613 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 614 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 615 "with cause code 0x%02x%s\n",
616 buffer[4],
617 ((buffer[4] == 0x22) ?
618 " -- try another portname" : ""));
847a50fd
CO		 619 QETH_CARD_TEXT(card, 2, "ckidxres");
620 QETH_CARD_TEXT(card, 2, " idxterm");
621 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 622 if (buffer[4] == 0xf6) {
623 dev_err(&card->gdev->dev,
624 "The qeth device is not configured "
625 "for the OSI layer required by z/VM\n");
626 return -EPERM;
627 }
4a71df50
FB		 628 return -EIO;
629 }
630 return 0;
631}
632
633static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
634 __u32 len)
635{
636 struct qeth_card *card;
637
4a71df50 638 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 639 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 640 if (channel == &card->read)
641 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
642 else
643 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
644 channel->ccw.count = len;
645 channel->ccw.cda = (__u32) __pa(iob);
646}
647
648static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
649{
650 __u8 index;
651
847a50fd 652 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 653 index = channel->io_buf_no;
654 do {
655 if (channel->iob[index].state == BUF_STATE_FREE) {
656 channel->iob[index].state = BUF_STATE_LOCKED;
657 channel->io_buf_no = (channel->io_buf_no + 1) %
658 QETH_CMD_BUFFER_NO;
659 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
660 return channel->iob + index;
661 }
662 index = (index + 1) % QETH_CMD_BUFFER_NO;
663 } while (index != channel->io_buf_no);
664
665 return NULL;
666}
667
668void qeth_release_buffer(struct qeth_channel *channel,
669 struct qeth_cmd_buffer *iob)
670{
671 unsigned long flags;
672
847a50fd 673 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 674 spin_lock_irqsave(&channel->iob_lock, flags);
675 memset(iob->data, 0, QETH_BUFSIZE);
676 iob->state = BUF_STATE_FREE;
677 iob->callback = qeth_send_control_data_cb;
678 iob->rc = 0;
679 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 680 wake_up(&channel->wait_q);
4a71df50
FB		 681}
682EXPORT_SYMBOL_GPL(qeth_release_buffer);
683
684static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
685{
686 struct qeth_cmd_buffer *buffer = NULL;
687 unsigned long flags;
688
689 spin_lock_irqsave(&channel->iob_lock, flags);
690 buffer = __qeth_get_buffer(channel);
691 spin_unlock_irqrestore(&channel->iob_lock, flags);
692 return buffer;
693}
694
695struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
696{
697 struct qeth_cmd_buffer *buffer;
698 wait_event(channel->wait_q,
699 ((buffer = qeth_get_buffer(channel)) != NULL));
700 return buffer;
701}
702EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
703
704void qeth_clear_cmd_buffers(struct qeth_channel *channel)
705{
706 int cnt;
707
708 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
709 qeth_release_buffer(channel, &channel->iob[cnt]);
710 channel->buf_no = 0;
711 channel->io_buf_no = 0;
712}
713EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
714
715static void qeth_send_control_data_cb(struct qeth_channel *channel,
716 struct qeth_cmd_buffer *iob)
717{
718 struct qeth_card *card;
719 struct qeth_reply *reply, *r;
720 struct qeth_ipa_cmd *cmd;
721 unsigned long flags;
722 int keep_reply;
5113fec0 723 int rc = 0;
4a71df50 724
4a71df50 725 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 726 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 727 rc = qeth_check_idx_response(card, iob->data);
728 switch (rc) {
729 case 0:
730 break;
731 case -EIO:
4a71df50 732 qeth_clear_ipacmd_list(card);
5113fec0 733 qeth_schedule_recovery(card);
01fc3e86 734 /* fall through */
5113fec0 735 default:
4a71df50
FB		 736 goto out;
737 }
738
739 cmd = qeth_check_ipa_data(card, iob);
740 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
741 goto out;
742 /*in case of OSN : check if cmd is set */
743 if (card->info.type == QETH_CARD_TYPE_OSN &&
744 cmd &&
745 cmd->hdr.command != IPA_CMD_STARTLAN &&
746 card->osn_info.assist_cb != NULL) {
747 card->osn_info.assist_cb(card->dev, cmd);
748 goto out;
749 }
750
751 spin_lock_irqsave(&card->lock, flags);
752 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
753 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
754 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
755 qeth_get_reply(reply);
756 list_del_init(&reply->list);
757 spin_unlock_irqrestore(&card->lock, flags);
758 keep_reply = 0;
759 if (reply->callback != NULL) {
760 if (cmd) {
761 reply->offset = (__u16)((char *)cmd -
762 (char *)iob->data);
763 keep_reply = reply->callback(card,
764 reply,
765 (unsigned long)cmd);
766 } else
767 keep_reply = reply->callback(card,
768 reply,
769 (unsigned long)iob);
770 }
771 if (cmd)
772 reply->rc = (u16) cmd->hdr.return_code;
773 else if (iob->rc)
774 reply->rc = iob->rc;
775 if (keep_reply) {
776 spin_lock_irqsave(&card->lock, flags);
777 list_add_tail(&reply->list,
778 &card->cmd_waiter_list);
779 spin_unlock_irqrestore(&card->lock, flags);
780 } else {
781 atomic_inc(&reply->received);
782 wake_up(&reply->wait_q);
783 }
784 qeth_put_reply(reply);
785 goto out;
786 }
787 }
788 spin_unlock_irqrestore(&card->lock, flags);
789out:
790 memcpy(&card->seqno.pdu_hdr_ack,
791 QETH_PDU_HEADER_SEQ_NO(iob->data),
792 QETH_SEQ_NO_LENGTH);
793 qeth_release_buffer(channel, iob);
794}
795
796static int qeth_setup_channel(struct qeth_channel *channel)
797{
798 int cnt;
799
d11ba0c4 800 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 801 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 802 channel->iob[cnt].data =
b3332930 803 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 804 if (channel->iob[cnt].data == NULL)
805 break;
806 channel->iob[cnt].state = BUF_STATE_FREE;
807 channel->iob[cnt].channel = channel;
808 channel->iob[cnt].callback = qeth_send_control_data_cb;
809 channel->iob[cnt].rc = 0;
810 }
811 if (cnt < QETH_CMD_BUFFER_NO) {
812 while (cnt-- > 0)
813 kfree(channel->iob[cnt].data);
814 return -ENOMEM;
815 }
816 channel->buf_no = 0;
817 channel->io_buf_no = 0;
818 atomic_set(&channel->irq_pending, 0);
819 spin_lock_init(&channel->iob_lock);
820
821 init_waitqueue_head(&channel->wait_q);
822 return 0;
823}
824
825static int qeth_set_thread_start_bit(struct qeth_card *card,
826 unsigned long thread)
827{
828 unsigned long flags;
829
830 spin_lock_irqsave(&card->thread_mask_lock, flags);
831 if (!(card->thread_allowed_mask & thread) ||
832 (card->thread_start_mask & thread)) {
833 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
834 return -EPERM;
835 }
836 card->thread_start_mask |= thread;
837 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
838 return 0;
839}
840
841void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
842{
843 unsigned long flags;
844
845 spin_lock_irqsave(&card->thread_mask_lock, flags);
846 card->thread_start_mask &= ~thread;
847 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
848 wake_up(&card->wait_q);
849}
850EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
851
852void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
853{
854 unsigned long flags;
855
856 spin_lock_irqsave(&card->thread_mask_lock, flags);
857 card->thread_running_mask &= ~thread;
858 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
859 wake_up(&card->wait_q);
860}
861EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
862
863static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
864{
865 unsigned long flags;
866 int rc = 0;
867
868 spin_lock_irqsave(&card->thread_mask_lock, flags);
869 if (card->thread_start_mask & thread) {
870 if ((card->thread_allowed_mask & thread) &&
871 !(card->thread_running_mask & thread)) {
872 rc = 1;
873 card->thread_start_mask &= ~thread;
874 card->thread_running_mask |= thread;
875 } else
876 rc = -EPERM;
877 }
878 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
879 return rc;
880}
881
882int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
883{
884 int rc = 0;
885
886 wait_event(card->wait_q,
887 (rc = __qeth_do_run_thread(card, thread)) >= 0);
888 return rc;
889}
890EXPORT_SYMBOL_GPL(qeth_do_run_thread);
891
892void qeth_schedule_recovery(struct qeth_card *card)
893{
847a50fd 894 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 895 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
896 schedule_work(&card->kernel_thread_starter);
897}
898EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
899
900static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
901{
902 int dstat, cstat;
903 char *sense;
847a50fd 904 struct qeth_card *card;
4a71df50
FB		 905
906 sense = (char *) irb->ecw;
23d805b6
PO		 907 cstat = irb->scsw.cmd.cstat;
908 dstat = irb->scsw.cmd.dstat;
847a50fd 909 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 910
911 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
912 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
913 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 914 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 915 dev_warn(&cdev->dev, "The qeth device driver "
916 "failed to recover an error on the device\n");
5113fec0 917 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 918 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 919 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
920 16, 1, irb, 64, 1);
921 return 1;
922 }
923
924 if (dstat & DEV_STAT_UNIT_CHECK) {
925 if (sense[SENSE_RESETTING_EVENT_BYTE] &
926 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 927 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 928 return 1;
929 }
930 if (sense[SENSE_COMMAND_REJECT_BYTE] &
931 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 932 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 933 return 1;
4a71df50
FB		 934 }
935 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 936 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 937 return 1;
938 }
939 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 940 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 941 return 0;
942 }
847a50fd 943 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 944 return 1;
945 }
946 return 0;
947}
948
949static long __qeth_check_irb_error(struct ccw_device *cdev,
950 unsigned long intparm, struct irb *irb)
951{
847a50fd
CO		 952 struct qeth_card *card;
953
954 card = CARD_FROM_CDEV(cdev);
955
4a71df50
FB		 956 if (!IS_ERR(irb))
957 return 0;
958
959 switch (PTR_ERR(irb)) {
960 case -EIO:
74eacdb9
FB		 961 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
962 dev_name(&cdev->dev));
847a50fd
CO		 963 QETH_CARD_TEXT(card, 2, "ckirberr");
964 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 965 break;
966 case -ETIMEDOUT:
74eacdb9
FB		 967 dev_warn(&cdev->dev, "A hardware operation timed out"
968 " on the device\n");
847a50fd
CO		 969 QETH_CARD_TEXT(card, 2, "ckirberr");
970 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 971 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 972 if (card && (card->data.ccwdev == cdev)) {
973 card->data.state = CH_STATE_DOWN;
974 wake_up(&card->wait_q);
975 }
976 }
977 break;
978 default:
74eacdb9
FB		 979 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
980 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 981 QETH_CARD_TEXT(card, 2, "ckirberr");
982 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 983 }
984 return PTR_ERR(irb);
985}
986
987static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
988 struct irb *irb)
989{
990 int rc;
991 int cstat, dstat;
992 struct qeth_cmd_buffer *buffer;
993 struct qeth_channel *channel;
994 struct qeth_card *card;
995 struct qeth_cmd_buffer *iob;
996 __u8 index;
997
4a71df50
FB		 998 if (__qeth_check_irb_error(cdev, intparm, irb))
999 return;
23d805b6
PO		 1000 cstat = irb->scsw.cmd.cstat;
1001 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1002
1003 card = CARD_FROM_CDEV(cdev);
1004 if (!card)
1005 return;
1006
847a50fd
CO		 1007 QETH_CARD_TEXT(card, 5, "irq");
1008
4a71df50
FB		 1009 if (card->read.ccwdev == cdev) {
1010 channel = &card->read;
847a50fd 1011 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1012 } else if (card->write.ccwdev == cdev) {
1013 channel = &card->write;
847a50fd 1014 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1015 } else {
1016 channel = &card->data;
847a50fd 1017 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1018 }
1019 atomic_set(&channel->irq_pending, 0);
1020
23d805b6 1021 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1022 channel->state = CH_STATE_STOPPED;
1023
23d805b6 1024 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1025 channel->state = CH_STATE_HALTED;
1026
1027 /*let's wake up immediately on data channel*/
1028 if ((channel == &card->data) && (intparm != 0) &&
1029 (intparm != QETH_RCD_PARM))
1030 goto out;
1031
1032 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1033 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1034 /* we don't have to handle this further */
1035 intparm = 0;
1036 }
1037 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1038 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1039 /* we don't have to handle this further */
1040 intparm = 0;
1041 }
1042 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1043 (dstat & DEV_STAT_UNIT_CHECK) ||
1044 (cstat)) {
1045 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1046 dev_warn(&channel->ccwdev->dev,
1047 "The qeth device driver failed to recover "
1048 "an error on the device\n");
1049 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1050 "0x%X dstat 0x%X\n",
1051 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1052 print_hex_dump(KERN_WARNING, "qeth: irb ",
1053 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1054 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1055 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1056 }
1057 if (intparm == QETH_RCD_PARM) {
1058 channel->state = CH_STATE_DOWN;
1059 goto out;
1060 }
1061 rc = qeth_get_problem(cdev, irb);
1062 if (rc) {
28a7e4c9 1063 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1064 qeth_schedule_recovery(card);
1065 goto out;
1066 }
1067 }
1068
1069 if (intparm == QETH_RCD_PARM) {
1070 channel->state = CH_STATE_RCD_DONE;
1071 goto out;
1072 }
1073 if (intparm) {
1074 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1075 buffer->state = BUF_STATE_PROCESSED;
1076 }
1077 if (channel == &card->data)
1078 return;
1079 if (channel == &card->read &&
1080 channel->state == CH_STATE_UP)
1081 qeth_issue_next_read(card);
1082
1083 iob = channel->iob;
1084 index = channel->buf_no;
1085 while (iob[index].state == BUF_STATE_PROCESSED) {
1086 if (iob[index].callback != NULL)
1087 iob[index].callback(channel, iob + index);
1088
1089 index = (index + 1) % QETH_CMD_BUFFER_NO;
1090 }
1091 channel->buf_no = index;
1092out:
1093 wake_up(&card->wait_q);
1094 return;
1095}
1096
b3332930 1097static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1098 struct qeth_qdio_out_buffer *buf,
b3332930 1099 enum iucv_tx_notify notification)
4a71df50 1100{
4a71df50
FB		 1101 struct sk_buff *skb;
1102
b3332930
FB		 1103 if (skb_queue_empty(&buf->skb_list))
1104 goto out;
1105 skb = skb_peek(&buf->skb_list);
1106 while (skb) {
1107 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1108 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1109 if (skb->protocol == ETH_P_AF_IUCV) {
1110 if (skb->sk) {
1111 struct iucv_sock *iucv = iucv_sk(skb->sk);
1112 iucv->sk_txnotify(skb, notification);
1113 }
1114 }
1115 if (skb_queue_is_last(&buf->skb_list, skb))
1116 skb = NULL;
1117 else
1118 skb = skb_queue_next(&buf->skb_list, skb);
1119 }
1120out:
1121 return;
1122}
1123
1124static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1125{
1126 struct sk_buff *skb;
72861ae7
EL		 1127 struct iucv_sock *iucv;
1128 int notify_general_error = 0;
1129
1130 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1131 notify_general_error = 1;
1132
1133 /* release may never happen from within CQ tasklet scope */
1134 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1135
b67d801f
UB		 1136 skb = skb_dequeue(&buf->skb_list);
1137 while (skb) {
b3332930
FB		 1138 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1139 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
72861ae7
EL		 1140 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1141 if (skb->sk) {
1142 iucv = iucv_sk(skb->sk);
1143 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1144 }
1145 }
b67d801f
UB		 1146 atomic_dec(&skb->users);
1147 dev_kfree_skb_any(skb);
4a71df50
FB		 1148 skb = skb_dequeue(&buf->skb_list);
1149 }
b3332930
FB		 1150}
1151
1152static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1153 struct qeth_qdio_out_buffer *buf,
1154 enum qeth_qdio_buffer_states newbufstate)
1155{
1156 int i;
1157
1158 /* is PCI flag set on buffer? */
1159 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1160 atomic_dec(&queue->set_pci_flags_count);
1161
1162 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1163 qeth_release_skbs(buf);
1164 }
4a71df50 1165 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1166 if (buf->buffer->element[i].addr && buf->is_header[i])
1167 kmem_cache_free(qeth_core_header_cache,
1168 buf->buffer->element[i].addr);
1169 buf->is_header[i] = 0;
4a71df50
FB		 1170 buf->buffer->element[i].length = 0;
1171 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1172 buf->buffer->element[i].eflags = 0;
1173 buf->buffer->element[i].sflags = 0;
4a71df50 1174 }
3ec90878
JG		 1175 buf->buffer->element[15].eflags = 0;
1176 buf->buffer->element[15].sflags = 0;
4a71df50 1177 buf->next_element_to_fill = 0;
0da9581d
EL		 1178 atomic_set(&buf->state, newbufstate);
1179}
1180
1181static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1182{
1183 int j;
1184
1185 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1186 if (!q->bufs[j])
1187 continue;
72861ae7 1188 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1189 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1190 if (free) {
1191 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1192 q->bufs[j] = NULL;
1193 }
1194 }
4a71df50
FB		 1195}
1196
1197void qeth_clear_qdio_buffers(struct qeth_card *card)
1198{
0da9581d 1199 int i;
4a71df50 1200
847a50fd 1201 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1202 /* clear outbound buffers to free skbs */
0da9581d 1203 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1204 if (card->qdio.out_qs[i]) {
0da9581d 1205 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1206 }
0da9581d 1207 }
4a71df50
FB		 1208}
1209EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1210
1211static void qeth_free_buffer_pool(struct qeth_card *card)
1212{
1213 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1214 int i = 0;
4a71df50
FB		 1215 list_for_each_entry_safe(pool_entry, tmp,
1216 &card->qdio.init_pool.entry_list, init_list){
1217 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1218 free_page((unsigned long)pool_entry->elements[i]);
1219 list_del(&pool_entry->init_list);
1220 kfree(pool_entry);
1221 }
1222}
1223
1224static void qeth_free_qdio_buffers(struct qeth_card *card)
1225{
b3332930 1226 int i, j;
4a71df50 1227
4a71df50
FB		 1228 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1229 QETH_QDIO_UNINITIALIZED)
1230 return;
0da9581d
EL		 1231
1232 qeth_free_cq(card);
b3332930
FB		 1233 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1234 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
72861ae7 1235 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
4a71df50
FB		 1236 kfree(card->qdio.in_q);
1237 card->qdio.in_q = NULL;
1238 /* inbound buffer pool */
1239 qeth_free_buffer_pool(card);
1240 /* free outbound qdio_qs */
1241 if (card->qdio.out_qs) {
1242 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1243 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1244 kfree(card->qdio.out_qs[i]);
1245 }
1246 kfree(card->qdio.out_qs);
1247 card->qdio.out_qs = NULL;
1248 }
1249}
1250
1251static void qeth_clean_channel(struct qeth_channel *channel)
1252{
1253 int cnt;
1254
d11ba0c4 1255 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1256 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1257 kfree(channel->iob[cnt].data);
1258}
1259
725b9c04
SO		 1260static void qeth_set_single_write_queues(struct qeth_card *card)
1261{
1262 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1263 (card->qdio.no_out_queues == 4))
1264 qeth_free_qdio_buffers(card);
1265
1266 card->qdio.no_out_queues = 1;
1267 if (card->qdio.default_out_queue != 0)
1268 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1269
1270 card->qdio.default_out_queue = 0;
1271}
1272
1273static void qeth_set_multiple_write_queues(struct qeth_card *card)
1274{
1275 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1276 (card->qdio.no_out_queues == 1)) {
1277 qeth_free_qdio_buffers(card);
1278 card->qdio.default_out_queue = 2;
1279 }
1280 card->qdio.no_out_queues = 4;
1281}
1282
1283static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1284{
4a71df50
FB		 1285 struct ccw_device *ccwdev;
1286 struct channelPath_dsc {
1287 u8 flags;
1288 u8 lsn;
1289 u8 desc;
1290 u8 chpid;
1291 u8 swla;
1292 u8 zeroes;
1293 u8 chla;
1294 u8 chpp;
1295 } *chp_dsc;
1296
5113fec0 1297 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1298
1299 ccwdev = card->data.ccwdev;
725b9c04
SO		 1300 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1301 if (!chp_dsc)
1302 goto out;
1303
1304 card->info.func_level = 0x4100 + chp_dsc->desc;
1305 if (card->info.type == QETH_CARD_TYPE_IQD)
1306 goto out;
1307
1308 /* CHPP field bit 6 == 1 -> single queue */
1309 if ((chp_dsc->chpp & 0x02) == 0x02)
1310 qeth_set_single_write_queues(card);
1311 else
1312 qeth_set_multiple_write_queues(card);
1313out:
1314 kfree(chp_dsc);
5113fec0
UB		 1315 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1316 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1317}
1318
1319static void qeth_init_qdio_info(struct qeth_card *card)
1320{
d11ba0c4 1321 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1322 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1323 /* inbound */
1324 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1325 if (card->info.type == QETH_CARD_TYPE_IQD)
1326 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1327 else
1328 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1329 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1330 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1331 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1332}
1333
1334static void qeth_set_intial_options(struct qeth_card *card)
1335{
1336 card->options.route4.type = NO_ROUTER;
1337 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1338 card->options.fake_broadcast = 0;
1339 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1340 card->options.performance_stats = 0;
1341 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1342 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1343 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1344}
1345
1346static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1347{
1348 unsigned long flags;
1349 int rc = 0;
1350
1351 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1352 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1353 (u8) card->thread_start_mask,
1354 (u8) card->thread_allowed_mask,
1355 (u8) card->thread_running_mask);
1356 rc = (card->thread_start_mask & thread);
1357 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1358 return rc;
1359}
1360
1361static void qeth_start_kernel_thread(struct work_struct *work)
1362{
3f36b890 1363 struct task_struct *ts;
4a71df50
FB		 1364 struct qeth_card *card = container_of(work, struct qeth_card,
1365 kernel_thread_starter);
847a50fd 1366 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1367
1368 if (card->read.state != CH_STATE_UP &&
1369 card->write.state != CH_STATE_UP)
1370 return;
3f36b890 1371 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1372 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1373 "qeth_recover");
3f36b890
FB		 1374 if (IS_ERR(ts)) {
1375 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1376 qeth_clear_thread_running_bit(card,
1377 QETH_RECOVER_THREAD);
1378 }
1379 }
4a71df50
FB		 1380}
1381
1382static int qeth_setup_card(struct qeth_card *card)
1383{
1384
d11ba0c4
PT		 1385 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1386 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1387
1388 card->read.state = CH_STATE_DOWN;
1389 card->write.state = CH_STATE_DOWN;
1390 card->data.state = CH_STATE_DOWN;
1391 card->state = CARD_STATE_DOWN;
1392 card->lan_online = 0;
908abbb5 1393 card->read_or_write_problem = 0;
4a71df50
FB		 1394 card->dev = NULL;
1395 spin_lock_init(&card->vlanlock);
1396 spin_lock_init(&card->mclock);
4a71df50
FB		 1397 spin_lock_init(&card->lock);
1398 spin_lock_init(&card->ip_lock);
1399 spin_lock_init(&card->thread_mask_lock);
c4949f07 1400 mutex_init(&card->conf_mutex);
9dc48ccc 1401 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1402 card->thread_start_mask = 0;
1403 card->thread_allowed_mask = 0;
1404 card->thread_running_mask = 0;
1405 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1406 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1407 INIT_LIST_HEAD(card->ip_tbd_list);
1408 INIT_LIST_HEAD(&card->cmd_waiter_list);
1409 init_waitqueue_head(&card->wait_q);
25985edc 1410 /* initial options */
4a71df50
FB		 1411 qeth_set_intial_options(card);
1412 /* IP address takeover */
1413 INIT_LIST_HEAD(&card->ipato.entries);
1414 card->ipato.enabled = 0;
1415 card->ipato.invert4 = 0;
1416 card->ipato.invert6 = 0;
1417 /* init QDIO stuff */
1418 qeth_init_qdio_info(card);
b3332930 1419 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
4a71df50
FB		 1420 return 0;
1421}
1422
6bcac508
MS		 1423static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1424{
1425 struct qeth_card *card = container_of(slr, struct qeth_card,
1426 qeth_service_level);
0d788c7d
KDW		 1427 if (card->info.mcl_level[0])
1428 seq_printf(m, "qeth: %s firmware level %s\n",
1429 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1430}
1431
4a71df50
FB		 1432static struct qeth_card *qeth_alloc_card(void)
1433{
1434 struct qeth_card *card;
1435
d11ba0c4 1436 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1437 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1438 if (!card)
76b11f8e 1439 goto out;
d11ba0c4 1440 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1441 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1442 if (!card->ip_tbd_list) {
1443 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1444 goto out_card;
4a71df50 1445 }
76b11f8e
UB		 1446 if (qeth_setup_channel(&card->read))
1447 goto out_ip;
1448 if (qeth_setup_channel(&card->write))
1449 goto out_channel;
4a71df50 1450 card->options.layer2 = -1;
6bcac508
MS		 1451 card->qeth_service_level.seq_print = qeth_core_sl_print;
1452 register_service_level(&card->qeth_service_level);
4a71df50 1453 return card;
76b11f8e
UB		 1454
1455out_channel:
1456 qeth_clean_channel(&card->read);
1457out_ip:
1458 kfree(card->ip_tbd_list);
1459out_card:
1460 kfree(card);
1461out:
1462 return NULL;
4a71df50
FB		 1463}
1464
1465static int qeth_determine_card_type(struct qeth_card *card)
1466{
1467 int i = 0;
1468
d11ba0c4 1469 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1470
1471 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1472 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1473 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1474 if ((CARD_RDEV(card)->id.dev_type ==
1475 known_devices[i][QETH_DEV_TYPE_IND]) &&
1476 (CARD_RDEV(card)->id.dev_model ==
1477 known_devices[i][QETH_DEV_MODEL_IND])) {
1478 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1479 card->qdio.no_out_queues =
1480 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1481 card->qdio.no_in_queues = 1;
5113fec0
UB		 1482 card->info.is_multicast_different =
1483 known_devices[i][QETH_MULTICAST_IND];
725b9c04 1484 qeth_update_from_chp_desc(card);
4a71df50
FB		 1485 return 0;
1486 }
1487 i++;
1488 }
1489 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1490 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1491 "unknown type\n");
4a71df50
FB		 1492 return -ENOENT;
1493}
1494
1495static int qeth_clear_channel(struct qeth_channel *channel)
1496{
1497 unsigned long flags;
1498 struct qeth_card *card;
1499 int rc;
1500
4a71df50 1501 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1502 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1503 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1504 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1505 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1506
1507 if (rc)
1508 return rc;
1509 rc = wait_event_interruptible_timeout(card->wait_q,
1510 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1511 if (rc == -ERESTARTSYS)
1512 return rc;
1513 if (channel->state != CH_STATE_STOPPED)
1514 return -ETIME;
1515 channel->state = CH_STATE_DOWN;
1516 return 0;
1517}
1518
1519static int qeth_halt_channel(struct qeth_channel *channel)
1520{
1521 unsigned long flags;
1522 struct qeth_card *card;
1523 int rc;
1524
4a71df50 1525 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1526 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1527 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1528 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1529 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1530
1531 if (rc)
1532 return rc;
1533 rc = wait_event_interruptible_timeout(card->wait_q,
1534 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1535 if (rc == -ERESTARTSYS)
1536 return rc;
1537 if (channel->state != CH_STATE_HALTED)
1538 return -ETIME;
1539 return 0;
1540}
1541
1542static int qeth_halt_channels(struct qeth_card *card)
1543{
1544 int rc1 = 0, rc2 = 0, rc3 = 0;
1545
847a50fd 1546 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1547 rc1 = qeth_halt_channel(&card->read);
1548 rc2 = qeth_halt_channel(&card->write);
1549 rc3 = qeth_halt_channel(&card->data);
1550 if (rc1)
1551 return rc1;
1552 if (rc2)
1553 return rc2;
1554 return rc3;
1555}
1556
1557static int qeth_clear_channels(struct qeth_card *card)
1558{
1559 int rc1 = 0, rc2 = 0, rc3 = 0;
1560
847a50fd 1561 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1562 rc1 = qeth_clear_channel(&card->read);
1563 rc2 = qeth_clear_channel(&card->write);
1564 rc3 = qeth_clear_channel(&card->data);
1565 if (rc1)
1566 return rc1;
1567 if (rc2)
1568 return rc2;
1569 return rc3;
1570}
1571
1572static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1573{
1574 int rc = 0;
1575
847a50fd 1576 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1577
1578 if (halt)
1579 rc = qeth_halt_channels(card);
1580 if (rc)
1581 return rc;
1582 return qeth_clear_channels(card);
1583}
1584
1585int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1586{
1587 int rc = 0;
1588
847a50fd 1589 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1590 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1591 QETH_QDIO_CLEANING)) {
1592 case QETH_QDIO_ESTABLISHED:
1593 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1594 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1595 QDIO_FLAG_CLEANUP_USING_HALT);
1596 else
cc961d40 1597 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1598 QDIO_FLAG_CLEANUP_USING_CLEAR);
1599 if (rc)
847a50fd 1600 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1601 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1602 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1603 break;
1604 case QETH_QDIO_CLEANING:
1605 return rc;
1606 default:
1607 break;
1608 }
1609 rc = qeth_clear_halt_card(card, use_halt);
1610 if (rc)
847a50fd 1611 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1612 card->state = CARD_STATE_DOWN;
1613 return rc;
1614}
1615EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1616
1617static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1618 int *length)
1619{
1620 struct ciw *ciw;
1621 char *rcd_buf;
1622 int ret;
1623 struct qeth_channel *channel = &card->data;
1624 unsigned long flags;
1625
1626 /*
1627 * scan for RCD command in extended SenseID data
1628 */
1629 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1630 if (!ciw || ciw->cmd == 0)
1631 return -EOPNOTSUPP;
1632 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1633 if (!rcd_buf)
1634 return -ENOMEM;
1635
1636 channel->ccw.cmd_code = ciw->cmd;
1637 channel->ccw.cda = (__u32) __pa(rcd_buf);
1638 channel->ccw.count = ciw->count;
1639 channel->ccw.flags = CCW_FLAG_SLI;
1640 channel->state = CH_STATE_RCD;
1641 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1642 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1643 QETH_RCD_PARM, LPM_ANYPATH, 0,
1644 QETH_RCD_TIMEOUT);
1645 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1646 if (!ret)
1647 wait_event(card->wait_q,
1648 (channel->state == CH_STATE_RCD_DONE ||
1649 channel->state == CH_STATE_DOWN));
1650 if (channel->state == CH_STATE_DOWN)
1651 ret = -EIO;
1652 else
1653 channel->state = CH_STATE_DOWN;
1654 if (ret) {
1655 kfree(rcd_buf);
1656 *buffer = NULL;
1657 *length = 0;
1658 } else {
1659 *length = ciw->count;
1660 *buffer = rcd_buf;
1661 }
1662 return ret;
1663}
1664
a60389ab 1665static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1666{
a60389ab 1667 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1668 card->info.chpid = prcd[30];
1669 card->info.unit_addr2 = prcd[31];
1670 card->info.cula = prcd[63];
1671 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1672 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1673}
1674
1675static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1676{
1677 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1678
e6e056ba
SR		 1679 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1680 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) {
a60389ab
EL		 1681 card->info.blkt.time_total = 250;
1682 card->info.blkt.inter_packet = 5;
1683 card->info.blkt.inter_packet_jumbo = 15;
1684 } else {
1685 card->info.blkt.time_total = 0;
1686 card->info.blkt.inter_packet = 0;
1687 card->info.blkt.inter_packet_jumbo = 0;
1688 }
4a71df50
FB		 1689}
1690
1691static void qeth_init_tokens(struct qeth_card *card)
1692{
1693 card->token.issuer_rm_w = 0x00010103UL;
1694 card->token.cm_filter_w = 0x00010108UL;
1695 card->token.cm_connection_w = 0x0001010aUL;
1696 card->token.ulp_filter_w = 0x0001010bUL;
1697 card->token.ulp_connection_w = 0x0001010dUL;
1698}
1699
1700static void qeth_init_func_level(struct qeth_card *card)
1701{
5113fec0
UB		 1702 switch (card->info.type) {
1703 case QETH_CARD_TYPE_IQD:
6298263a 1704 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1705 break;
1706 case QETH_CARD_TYPE_OSD:
0132951e 1707 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1708 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1709 break;
1710 default:
1711 break;
4a71df50
FB		 1712 }
1713}
1714
4a71df50
FB		 1715static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1716 void (*idx_reply_cb)(struct qeth_channel *,
1717 struct qeth_cmd_buffer *))
1718{
1719 struct qeth_cmd_buffer *iob;
1720 unsigned long flags;
1721 int rc;
1722 struct qeth_card *card;
1723
d11ba0c4 1724 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1725 card = CARD_FROM_CDEV(channel->ccwdev);
1726 iob = qeth_get_buffer(channel);
1727 iob->callback = idx_reply_cb;
1728 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1729 channel->ccw.count = QETH_BUFSIZE;
1730 channel->ccw.cda = (__u32) __pa(iob->data);
1731
1732 wait_event(card->wait_q,
1733 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1734 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1735 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1736 rc = ccw_device_start(channel->ccwdev,
1737 &channel->ccw, (addr_t) iob, 0, 0);
1738 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1739
1740 if (rc) {
14cc21b6 1741 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1742 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1743 atomic_set(&channel->irq_pending, 0);
1744 wake_up(&card->wait_q);
1745 return rc;
1746 }
1747 rc = wait_event_interruptible_timeout(card->wait_q,
1748 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1749 if (rc == -ERESTARTSYS)
1750 return rc;
1751 if (channel->state != CH_STATE_UP) {
1752 rc = -ETIME;
d11ba0c4 1753 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1754 qeth_clear_cmd_buffers(channel);
1755 } else
1756 rc = 0;
1757 return rc;
1758}
1759
1760static int qeth_idx_activate_channel(struct qeth_channel *channel,
1761 void (*idx_reply_cb)(struct qeth_channel *,
1762 struct qeth_cmd_buffer *))
1763{
1764 struct qeth_card *card;
1765 struct qeth_cmd_buffer *iob;
1766 unsigned long flags;
1767 __u16 temp;
1768 __u8 tmp;
1769 int rc;
f06f6f32 1770 struct ccw_dev_id temp_devid;
4a71df50
FB		 1771
1772 card = CARD_FROM_CDEV(channel->ccwdev);
1773
d11ba0c4 1774 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1775
1776 iob = qeth_get_buffer(channel);
1777 iob->callback = idx_reply_cb;
1778 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1779 channel->ccw.count = IDX_ACTIVATE_SIZE;
1780 channel->ccw.cda = (__u32) __pa(iob->data);
1781 if (channel == &card->write) {
1782 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1783 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1784 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1785 card->seqno.trans_hdr++;
1786 } else {
1787 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1788 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1789 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1790 }
1791 tmp = ((__u8)card->info.portno) | 0x80;
1792 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1793 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1794 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1795 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1796 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1797 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1798 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1799 temp = (card->info.cula << 8) + card->info.unit_addr2;
1800 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1801
1802 wait_event(card->wait_q,
1803 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1804 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1805 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1806 rc = ccw_device_start(channel->ccwdev,
1807 &channel->ccw, (addr_t) iob, 0, 0);
1808 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1809
1810 if (rc) {
14cc21b6
FB		 1811 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1812 rc);
d11ba0c4 1813 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1814 atomic_set(&channel->irq_pending, 0);
1815 wake_up(&card->wait_q);
1816 return rc;
1817 }
1818 rc = wait_event_interruptible_timeout(card->wait_q,
1819 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1820 if (rc == -ERESTARTSYS)
1821 return rc;
1822 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1823 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1824 " failed to recover an error on the device\n");
1825 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1826 dev_name(&channel->ccwdev->dev));
d11ba0c4 1827 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1828 qeth_clear_cmd_buffers(channel);
1829 return -ETIME;
1830 }
1831 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1832}
1833
1834static int qeth_peer_func_level(int level)
1835{
1836 if ((level & 0xff) == 8)
1837 return (level & 0xff) + 0x400;
1838 if (((level >> 8) & 3) == 1)
1839 return (level & 0xff) + 0x200;
1840 return level;
1841}
1842
1843static void qeth_idx_write_cb(struct qeth_channel *channel,
1844 struct qeth_cmd_buffer *iob)
1845{
1846 struct qeth_card *card;
1847 __u16 temp;
1848
d11ba0c4 1849 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1850
1851 if (channel->state == CH_STATE_DOWN) {
1852 channel->state = CH_STATE_ACTIVATING;
1853 goto out;
1854 }
1855 card = CARD_FROM_CDEV(channel->ccwdev);
1856
1857 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1858 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1859 dev_err(&card->write.ccwdev->dev,
1860 "The adapter is used exclusively by another "
1861 "host\n");
4a71df50 1862 else
74eacdb9
FB		 1863 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1864 " negative reply\n",
1865 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1866 goto out;
1867 }
1868 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1869 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1870 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1871 "function level mismatch (sent: 0x%x, received: "
1872 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1873 card->info.func_level, temp);
4a71df50
FB		 1874 goto out;
1875 }
1876 channel->state = CH_STATE_UP;
1877out:
1878 qeth_release_buffer(channel, iob);
1879}
1880
1881static void qeth_idx_read_cb(struct qeth_channel *channel,
1882 struct qeth_cmd_buffer *iob)
1883{
1884 struct qeth_card *card;
1885 __u16 temp;
1886
d11ba0c4 1887 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1888 if (channel->state == CH_STATE_DOWN) {
1889 channel->state = CH_STATE_ACTIVATING;
1890 goto out;
1891 }
1892
1893 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1894 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1895 goto out;
1896
1897 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1898 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1899 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1900 dev_err(&card->write.ccwdev->dev,
1901 "The adapter is used exclusively by another "
1902 "host\n");
5113fec0
UB		 1903 break;
1904 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1905 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1906 dev_err(&card->read.ccwdev->dev,
1907 "Setting the device online failed because of "
01fc3e86 1908 "insufficient authorization\n");
5113fec0
UB		 1909 break;
1910 default:
74eacdb9
FB		 1911 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1912 " negative reply\n",
1913 dev_name(&card->read.ccwdev->dev));
5113fec0 1914 }
01fc3e86
UB		 1915 QETH_CARD_TEXT_(card, 2, "idxread%c",
1916 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1917 goto out;
1918 }
1919
1920/**
5113fec0
UB		 1921 * * temporary fix for microcode bug
1922 * * to revert it,replace OR by AND
1923 * */
4a71df50 1924 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1925 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1926 card->info.portname_required = 1;
1927
1928 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1929 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1930 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1931 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1932 dev_name(&card->read.ccwdev->dev),
1933 card->info.func_level, temp);
4a71df50
FB		 1934 goto out;
1935 }
1936 memcpy(&card->token.issuer_rm_r,
1937 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1938 QETH_MPC_TOKEN_LENGTH);
1939 memcpy(&card->info.mcl_level[0],
1940 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1941 channel->state = CH_STATE_UP;
1942out:
1943 qeth_release_buffer(channel, iob);
1944}
1945
1946void qeth_prepare_control_data(struct qeth_card *card, int len,
1947 struct qeth_cmd_buffer *iob)
1948{
1949 qeth_setup_ccw(&card->write, iob->data, len);
1950 iob->callback = qeth_release_buffer;
1951
1952 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1953 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1954 card->seqno.trans_hdr++;
1955 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1956 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1957 card->seqno.pdu_hdr++;
1958 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1959 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1960 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1961}
1962EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1963
1964int qeth_send_control_data(struct qeth_card *card, int len,
1965 struct qeth_cmd_buffer *iob,
1966 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1967 unsigned long),
1968 void *reply_param)
1969{
1970 int rc;
1971 unsigned long flags;
1972 struct qeth_reply *reply = NULL;
7834cd5a 1973 unsigned long timeout, event_timeout;
5b54e16f 1974 struct qeth_ipa_cmd *cmd;
4a71df50 1975
847a50fd 1976 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1977
908abbb5
UB		 1978 if (card->read_or_write_problem) {
1979 qeth_release_buffer(iob->channel, iob);
1980 return -EIO;
1981 }
4a71df50
FB		 1982 reply = qeth_alloc_reply(card);
1983 if (!reply) {
4a71df50
FB		 1984 return -ENOMEM;
1985 }
1986 reply->callback = reply_cb;
1987 reply->param = reply_param;
1988 if (card->state == CARD_STATE_DOWN)
1989 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1990 else
1991 reply->seqno = card->seqno.ipa++;
1992 init_waitqueue_head(&reply->wait_q);
1993 spin_lock_irqsave(&card->lock, flags);
1994 list_add_tail(&reply->list, &card->cmd_waiter_list);
1995 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1996 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1997
1998 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1999 qeth_prepare_control_data(card, len, iob);
2000
2001 if (IS_IPA(iob->data))
7834cd5a 2002 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2003 else
7834cd5a
HC		 2004 event_timeout = QETH_TIMEOUT;
2005 timeout = jiffies + event_timeout;
4a71df50 2006
847a50fd 2007 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2008 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2009 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2010 (addr_t) iob, 0, 0);
2011 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2012 if (rc) {
74eacdb9
FB		 2013 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2014 "ccw_device_start rc = %i\n",
2015 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2016 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2017 spin_lock_irqsave(&card->lock, flags);
2018 list_del_init(&reply->list);
2019 qeth_put_reply(reply);
2020 spin_unlock_irqrestore(&card->lock, flags);
2021 qeth_release_buffer(iob->channel, iob);
2022 atomic_set(&card->write.irq_pending, 0);
2023 wake_up(&card->wait_q);
2024 return rc;
2025 }
5b54e16f
FB		 2026
2027 /* we have only one long running ipassist, since we can ensure
2028 process context of this command we can sleep */
2029 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2030 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2031 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2032 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2033 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2034 goto time_err;
2035 } else {
2036 while (!atomic_read(&reply->received)) {
2037 if (time_after(jiffies, timeout))
2038 goto time_err;
2039 cpu_relax();
6531084c 2040 }
5b54e16f
FB		 2041 }
2042
70919e23
UB		 2043 if (reply->rc == -EIO)
2044 goto error;
5b54e16f
FB		 2045 rc = reply->rc;
2046 qeth_put_reply(reply);
2047 return rc;
2048
2049time_err:
70919e23 2050 reply->rc = -ETIME;
5b54e16f
FB		 2051 spin_lock_irqsave(&reply->card->lock, flags);
2052 list_del_init(&reply->list);
2053 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2054 atomic_inc(&reply->received);
70919e23 2055error:
908abbb5
UB		 2056 atomic_set(&card->write.irq_pending, 0);
2057 qeth_release_buffer(iob->channel, iob);
2058 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2059 rc = reply->rc;
2060 qeth_put_reply(reply);
2061 return rc;
2062}
2063EXPORT_SYMBOL_GPL(qeth_send_control_data);
2064
2065static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2066 unsigned long data)
2067{
2068 struct qeth_cmd_buffer *iob;
2069
d11ba0c4 2070 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2071
2072 iob = (struct qeth_cmd_buffer *) data;
2073 memcpy(&card->token.cm_filter_r,
2074 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2075 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2076 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2077 return 0;
2078}
2079
2080static int qeth_cm_enable(struct qeth_card *card)
2081{
2082 int rc;
2083 struct qeth_cmd_buffer *iob;
2084
d11ba0c4 2085 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2086
2087 iob = qeth_wait_for_buffer(&card->write);
2088 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2089 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2090 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2091 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2092 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2093
2094 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2095 qeth_cm_enable_cb, NULL);
2096 return rc;
2097}
2098
2099static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2100 unsigned long data)
2101{
2102
2103 struct qeth_cmd_buffer *iob;
2104
d11ba0c4 2105 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2106
2107 iob = (struct qeth_cmd_buffer *) data;
2108 memcpy(&card->token.cm_connection_r,
2109 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2110 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2111 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2112 return 0;
2113}
2114
2115static int qeth_cm_setup(struct qeth_card *card)
2116{
2117 int rc;
2118 struct qeth_cmd_buffer *iob;
2119
d11ba0c4 2120 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2121
2122 iob = qeth_wait_for_buffer(&card->write);
2123 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2124 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2125 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2126 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2127 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2128 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2129 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2130 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2131 qeth_cm_setup_cb, NULL);
2132 return rc;
2133
2134}
2135
2136static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2137{
2138 switch (card->info.type) {
2139 case QETH_CARD_TYPE_UNKNOWN:
2140 return 1500;
2141 case QETH_CARD_TYPE_IQD:
2142 return card->info.max_mtu;
5113fec0 2143 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2144 switch (card->info.link_type) {
2145 case QETH_LINK_TYPE_HSTR:
2146 case QETH_LINK_TYPE_LANE_TR:
2147 return 2000;
2148 default:
2149 return 1492;
2150 }
5113fec0
UB		 2151 case QETH_CARD_TYPE_OSM:
2152 case QETH_CARD_TYPE_OSX:
2153 return 1492;
4a71df50
FB		 2154 default:
2155 return 1500;
2156 }
2157}
2158
4a71df50
FB		 2159static inline int qeth_get_mtu_outof_framesize(int framesize)
2160{
2161 switch (framesize) {
2162 case 0x4000:
2163 return 8192;
2164 case 0x6000:
2165 return 16384;
2166 case 0xa000:
2167 return 32768;
2168 case 0xffff:
2169 return 57344;
2170 default:
2171 return 0;
2172 }
2173}
2174
2175static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2176{
2177 switch (card->info.type) {
5113fec0
UB		 2178 case QETH_CARD_TYPE_OSD:
2179 case QETH_CARD_TYPE_OSM:
2180 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2181 case QETH_CARD_TYPE_IQD:
2182 return ((mtu >= 576) &&
9853b97b 2183 (mtu <= card->info.max_mtu));
4a71df50
FB		 2184 case QETH_CARD_TYPE_OSN:
2185 case QETH_CARD_TYPE_UNKNOWN:
2186 default:
2187 return 1;
2188 }
2189}
2190
2191static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2192 unsigned long data)
2193{
2194
2195 __u16 mtu, framesize;
2196 __u16 len;
2197 __u8 link_type;
2198 struct qeth_cmd_buffer *iob;
2199
d11ba0c4 2200 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2201
2202 iob = (struct qeth_cmd_buffer *) data;
2203 memcpy(&card->token.ulp_filter_r,
2204 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2205 QETH_MPC_TOKEN_LENGTH);
9853b97b 2206 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2207 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2208 mtu = qeth_get_mtu_outof_framesize(framesize);
2209 if (!mtu) {
2210 iob->rc = -EINVAL;
d11ba0c4 2211 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2212 return 0;
2213 }
8b2e18f6
UB		 2214 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2215 /* frame size has changed */
2216 if (card->dev &&
2217 ((card->dev->mtu == card->info.initial_mtu) ||
2218 (card->dev->mtu > mtu)))
2219 card->dev->mtu = mtu;
2220 qeth_free_qdio_buffers(card);
2221 }
4a71df50 2222 card->info.initial_mtu = mtu;
8b2e18f6 2223 card->info.max_mtu = mtu;
4a71df50
FB		 2224 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2225 } else {
2226 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 2227 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2228 iob->data);
4a71df50
FB		 2229 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2230 }
2231
2232 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2233 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2234 memcpy(&link_type,
2235 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2236 card->info.link_type = link_type;
2237 } else
2238 card->info.link_type = 0;
01fc3e86 2239 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2240 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2241 return 0;
2242}
2243
2244static int qeth_ulp_enable(struct qeth_card *card)
2245{
2246 int rc;
2247 char prot_type;
2248 struct qeth_cmd_buffer *iob;
2249
2250 /*FIXME: trace view callbacks*/
d11ba0c4 2251 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2252
2253 iob = qeth_wait_for_buffer(&card->write);
2254 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2255
2256 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2257 (__u8) card->info.portno;
2258 if (card->options.layer2)
2259 if (card->info.type == QETH_CARD_TYPE_OSN)
2260 prot_type = QETH_PROT_OSN2;
2261 else
2262 prot_type = QETH_PROT_LAYER2;
2263 else
2264 prot_type = QETH_PROT_TCPIP;
2265
2266 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2267 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2268 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2269 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2270 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2271 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2272 card->info.portname, 9);
2273 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2274 qeth_ulp_enable_cb, NULL);
2275 return rc;
2276
2277}
2278
2279static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2280 unsigned long data)
2281{
2282 struct qeth_cmd_buffer *iob;
2283
d11ba0c4 2284 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2285
2286 iob = (struct qeth_cmd_buffer *) data;
2287 memcpy(&card->token.ulp_connection_r,
2288 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2289 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2290 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2291 3)) {
2292 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2293 dev_err(&card->gdev->dev, "A connection could not be "
2294 "established because of an OLM limit\n");
bbb822a8 2295 iob->rc = -EMLINK;
65a1f898 2296 }
d11ba0c4 2297 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2298 return 0;
4a71df50
FB		 2299}
2300
2301static int qeth_ulp_setup(struct qeth_card *card)
2302{
2303 int rc;
2304 __u16 temp;
2305 struct qeth_cmd_buffer *iob;
2306 struct ccw_dev_id dev_id;
2307
d11ba0c4 2308 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2309
2310 iob = qeth_wait_for_buffer(&card->write);
2311 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2312
2313 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2314 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2315 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2316 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2317 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2318 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2319
2320 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2321 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2322 temp = (card->info.cula << 8) + card->info.unit_addr2;
2323 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2324 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2325 qeth_ulp_setup_cb, NULL);
2326 return rc;
2327}
2328
0da9581d
EL		 2329static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2330{
2331 int rc;
2332 struct qeth_qdio_out_buffer *newbuf;
2333
2334 rc = 0;
2335 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2336 if (!newbuf) {
2337 rc = -ENOMEM;
2338 goto out;
2339 }
2340 newbuf->buffer = &q->qdio_bufs[bidx];
2341 skb_queue_head_init(&newbuf->skb_list);
2342 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2343 newbuf->q = q;
2344 newbuf->aob = NULL;
2345 newbuf->next_pending = q->bufs[bidx];
2346 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2347 q->bufs[bidx] = newbuf;
2348 if (q->bufstates) {
2349 q->bufstates[bidx].user = newbuf;
2350 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2351 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2352 QETH_CARD_TEXT_(q->card, 2, "%lx",
2353 (long) newbuf->next_pending);
2354 }
2355out:
2356 return rc;
2357}
2358
2359
4a71df50
FB		 2360static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2361{
2362 int i, j;
2363
d11ba0c4 2364 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2365
2366 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2367 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2368 return 0;
2369
b3332930 2370 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2371 GFP_KERNEL);
4a71df50
FB		 2372 if (!card->qdio.in_q)
2373 goto out_nomem;
d11ba0c4
PT		 2374 QETH_DBF_TEXT(SETUP, 2, "inq");
2375 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2376 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2377 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2378 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2379 card->qdio.in_q->bufs[i].buffer =
2380 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2381 card->qdio.in_q->bufs[i].rx_skb = NULL;
2382 }
4a71df50
FB		 2383 /* inbound buffer pool */
2384 if (qeth_alloc_buffer_pool(card))
2385 goto out_freeinq;
0da9581d 2386
4a71df50
FB		 2387 /* outbound */
2388 card->qdio.out_qs =
b3332930 2389 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2390 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2391 if (!card->qdio.out_qs)
2392 goto out_freepool;
2393 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2394 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2395 GFP_KERNEL);
4a71df50
FB		 2396 if (!card->qdio.out_qs[i])
2397 goto out_freeoutq;
d11ba0c4
PT		 2398 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2399 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2400 card->qdio.out_qs[i]->queue_no = i;
2401 /* give outbound qeth_qdio_buffers their qdio_buffers */
2402 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
0da9581d
EL		 2403 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2404 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2405 goto out_freeoutqbufs;
4a71df50
FB		 2406 }
2407 }
0da9581d
EL		 2408
2409 /* completion */
2410 if (qeth_alloc_cq(card))
2411 goto out_freeoutq;
2412
4a71df50
FB		 2413 return 0;
2414
0da9581d
EL		 2415out_freeoutqbufs:
2416 while (j > 0) {
2417 --j;
2418 kmem_cache_free(qeth_qdio_outbuf_cache,
2419 card->qdio.out_qs[i]->bufs[j]);
2420 card->qdio.out_qs[i]->bufs[j] = NULL;
2421 }
4a71df50 2422out_freeoutq:
0da9581d 2423 while (i > 0) {
4a71df50 2424 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2425 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2426 }
4a71df50
FB		 2427 kfree(card->qdio.out_qs);
2428 card->qdio.out_qs = NULL;
2429out_freepool:
2430 qeth_free_buffer_pool(card);
2431out_freeinq:
2432 kfree(card->qdio.in_q);
2433 card->qdio.in_q = NULL;
2434out_nomem:
2435 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2436 return -ENOMEM;
2437}
2438
2439static void qeth_create_qib_param_field(struct qeth_card *card,
2440 char *param_field)
2441{
2442
2443 param_field[0] = _ascebc['P'];
2444 param_field[1] = _ascebc['C'];
2445 param_field[2] = _ascebc['I'];
2446 param_field[3] = _ascebc['T'];
2447 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2448 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2449 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2450}
2451
2452static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2453 char *param_field)
2454{
2455 param_field[16] = _ascebc['B'];
2456 param_field[17] = _ascebc['L'];
2457 param_field[18] = _ascebc['K'];
2458 param_field[19] = _ascebc['T'];
2459 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2460 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2461 *((unsigned int *) (&param_field[28])) =
2462 card->info.blkt.inter_packet_jumbo;
2463}
2464
2465static int qeth_qdio_activate(struct qeth_card *card)
2466{
d11ba0c4 2467 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2468 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2469}
2470
2471static int qeth_dm_act(struct qeth_card *card)
2472{
2473 int rc;
2474 struct qeth_cmd_buffer *iob;
2475
d11ba0c4 2476 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2477
2478 iob = qeth_wait_for_buffer(&card->write);
2479 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2480
2481 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2482 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2483 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2484 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2485 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2486 return rc;
2487}
2488
2489static int qeth_mpc_initialize(struct qeth_card *card)
2490{
2491 int rc;
2492
d11ba0c4 2493 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2494
2495 rc = qeth_issue_next_read(card);
2496 if (rc) {
d11ba0c4 2497 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2498 return rc;
2499 }
2500 rc = qeth_cm_enable(card);
2501 if (rc) {
d11ba0c4 2502 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2503 goto out_qdio;
2504 }
2505 rc = qeth_cm_setup(card);
2506 if (rc) {
d11ba0c4 2507 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2508 goto out_qdio;
2509 }
2510 rc = qeth_ulp_enable(card);
2511 if (rc) {
d11ba0c4 2512 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2513 goto out_qdio;
2514 }
2515 rc = qeth_ulp_setup(card);
2516 if (rc) {
d11ba0c4 2517 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2518 goto out_qdio;
2519 }
2520 rc = qeth_alloc_qdio_buffers(card);
2521 if (rc) {
d11ba0c4 2522 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2523 goto out_qdio;
2524 }
2525 rc = qeth_qdio_establish(card);
2526 if (rc) {
d11ba0c4 2527 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2528 qeth_free_qdio_buffers(card);
2529 goto out_qdio;
2530 }
2531 rc = qeth_qdio_activate(card);
2532 if (rc) {
d11ba0c4 2533 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2534 goto out_qdio;
2535 }
2536 rc = qeth_dm_act(card);
2537 if (rc) {
d11ba0c4 2538 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2539 goto out_qdio;
2540 }
2541
2542 return 0;
2543out_qdio:
2544 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2545 return rc;
2546}
2547
2548static void qeth_print_status_with_portname(struct qeth_card *card)
2549{
2550 char dbf_text[15];
2551 int i;
2552
2553 sprintf(dbf_text, "%s", card->info.portname + 1);
2554 for (i = 0; i < 8; i++)
2555 dbf_text[i] =
2556 (char) _ebcasc[(__u8) dbf_text[i]];
2557 dbf_text[8] = 0;
74eacdb9 2558 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2559 "with link type %s (portname: %s)\n",
4a71df50
FB		 2560 qeth_get_cardname(card),
2561 (card->info.mcl_level[0]) ? " (level: " : "",
2562 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2563 (card->info.mcl_level[0]) ? ")" : "",
2564 qeth_get_cardname_short(card),
2565 dbf_text);
2566
2567}
2568
2569static void qeth_print_status_no_portname(struct qeth_card *card)
2570{
2571 if (card->info.portname[0])
74eacdb9 2572 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2573 "card%s%s%s\nwith link type %s "
2574 "(no portname needed by interface).\n",
4a71df50
FB		 2575 qeth_get_cardname(card),
2576 (card->info.mcl_level[0]) ? " (level: " : "",
2577 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2578 (card->info.mcl_level[0]) ? ")" : "",
2579 qeth_get_cardname_short(card));
2580 else
74eacdb9 2581 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2582 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2583 qeth_get_cardname(card),
2584 (card->info.mcl_level[0]) ? " (level: " : "",
2585 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2586 (card->info.mcl_level[0]) ? ")" : "",
2587 qeth_get_cardname_short(card));
2588}
2589
2590void qeth_print_status_message(struct qeth_card *card)
2591{
2592 switch (card->info.type) {
5113fec0
UB		 2593 case QETH_CARD_TYPE_OSD:
2594 case QETH_CARD_TYPE_OSM:
2595 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2596 /* VM will use a non-zero first character
2597 * to indicate a HiperSockets like reporting
2598 * of the level OSA sets the first character to zero
2599 * */
2600 if (!card->info.mcl_level[0]) {
2601 sprintf(card->info.mcl_level, "%02x%02x",
2602 card->info.mcl_level[2],
2603 card->info.mcl_level[3]);
2604
2605 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2606 break;
2607 }
2608 /* fallthrough */
2609 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2610 if ((card->info.guestlan) ||
2611 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2612 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2613 card->info.mcl_level[0]];
2614 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2615 card->info.mcl_level[1]];
2616 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2617 card->info.mcl_level[2]];
2618 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2619 card->info.mcl_level[3]];
2620 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2621 }
2622 break;
2623 default:
2624 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2625 }
2626 if (card->info.portname_required)
2627 qeth_print_status_with_portname(card);
2628 else
2629 qeth_print_status_no_portname(card);
2630}
2631EXPORT_SYMBOL_GPL(qeth_print_status_message);
2632
4a71df50
FB		 2633static void qeth_initialize_working_pool_list(struct qeth_card *card)
2634{
2635 struct qeth_buffer_pool_entry *entry;
2636
847a50fd 2637 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2638
2639 list_for_each_entry(entry,
2640 &card->qdio.init_pool.entry_list, init_list) {
2641 qeth_put_buffer_pool_entry(card, entry);
2642 }
2643}
2644
2645static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2646 struct qeth_card *card)
2647{
2648 struct list_head *plh;
2649 struct qeth_buffer_pool_entry *entry;
2650 int i, free;
2651 struct page *page;
2652
2653 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2654 return NULL;
2655
2656 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2657 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2658 free = 1;
2659 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2660 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2661 free = 0;
2662 break;
2663 }
2664 }
2665 if (free) {
2666 list_del_init(&entry->list);
2667 return entry;
2668 }
2669 }
2670
2671 /* no free buffer in pool so take first one and swap pages */
2672 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2673 struct qeth_buffer_pool_entry, list);
2674 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2675 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2676 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2677 if (!page) {
2678 return NULL;
2679 } else {
2680 free_page((unsigned long)entry->elements[i]);
2681 entry->elements[i] = page_address(page);
2682 if (card->options.performance_stats)
2683 card->perf_stats.sg_alloc_page_rx++;
2684 }
2685 }
2686 }
2687 list_del_init(&entry->list);
2688 return entry;
2689}
2690
2691static int qeth_init_input_buffer(struct qeth_card *card,
2692 struct qeth_qdio_buffer *buf)
2693{
2694 struct qeth_buffer_pool_entry *pool_entry;
2695 int i;
2696
b3332930
FB		 2697 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2698 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2699 if (!buf->rx_skb)
2700 return 1;
2701 }
2702
4a71df50
FB		 2703 pool_entry = qeth_find_free_buffer_pool_entry(card);
2704 if (!pool_entry)
2705 return 1;
2706
2707 /*
2708 * since the buffer is accessed only from the input_tasklet
2709 * there shouldn't be a need to synchronize; also, since we use
2710 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2711 * buffers
2712 */
4a71df50
FB		 2713
2714 buf->pool_entry = pool_entry;
2715 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2716 buf->buffer->element[i].length = PAGE_SIZE;
2717 buf->buffer->element[i].addr = pool_entry->elements[i];
2718 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2719 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2720 else
3ec90878
JG		 2721 buf->buffer->element[i].eflags = 0;
2722 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2723 }
2724 return 0;
2725}
2726
2727int qeth_init_qdio_queues(struct qeth_card *card)
2728{
2729 int i, j;
2730 int rc;
2731
d11ba0c4 2732 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2733
2734 /* inbound queue */
2735 memset(card->qdio.in_q->qdio_bufs, 0,
2736 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2737 qeth_initialize_working_pool_list(card);
2738 /*give only as many buffers to hardware as we have buffer pool entries*/
2739 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2740 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2741 card->qdio.in_q->next_buf_to_init =
2742 card->qdio.in_buf_pool.buf_count - 1;
2743 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2744 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2745 if (rc) {
d11ba0c4 2746 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2747 return rc;
2748 }
0da9581d
EL		 2749
2750 /* completion */
2751 rc = qeth_cq_init(card);
2752 if (rc) {
2753 return rc;
2754 }
2755
4a71df50
FB		 2756 /* outbound queue */
2757 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2758 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2759 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2760 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2761 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2762 card->qdio.out_qs[i]->bufs[j],
2763 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2764 }
2765 card->qdio.out_qs[i]->card = card;
2766 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2767 card->qdio.out_qs[i]->do_pack = 0;
2768 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2769 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2770 atomic_set(&card->qdio.out_qs[i]->state,
2771 QETH_OUT_Q_UNLOCKED);
2772 }
2773 return 0;
2774}
2775EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2776
2777static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2778{
2779 switch (link_type) {
2780 case QETH_LINK_TYPE_HSTR:
2781 return 2;
2782 default:
2783 return 1;
2784 }
2785}
2786
2787static void qeth_fill_ipacmd_header(struct qeth_card *card,
2788 struct qeth_ipa_cmd *cmd, __u8 command,
2789 enum qeth_prot_versions prot)
2790{
2791 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2792 cmd->hdr.command = command;
2793 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2794 cmd->hdr.seqno = card->seqno.ipa;
2795 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2796 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2797 if (card->options.layer2)
2798 cmd->hdr.prim_version_no = 2;
2799 else
2800 cmd->hdr.prim_version_no = 1;
2801 cmd->hdr.param_count = 1;
2802 cmd->hdr.prot_version = prot;
2803 cmd->hdr.ipa_supported = 0;
2804 cmd->hdr.ipa_enabled = 0;
2805}
2806
2807struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2808 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2809{
2810 struct qeth_cmd_buffer *iob;
2811 struct qeth_ipa_cmd *cmd;
2812
2813 iob = qeth_wait_for_buffer(&card->write);
2814 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2815 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2816
2817 return iob;
2818}
2819EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2820
2821void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2822 char prot_type)
2823{
2824 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2825 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2826 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2827 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2828}
2829EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2830
2831int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2832 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2833 unsigned long),
2834 void *reply_param)
2835{
2836 int rc;
2837 char prot_type;
4a71df50 2838
847a50fd 2839 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2840
2841 if (card->options.layer2)
2842 if (card->info.type == QETH_CARD_TYPE_OSN)
2843 prot_type = QETH_PROT_OSN2;
2844 else
2845 prot_type = QETH_PROT_LAYER2;
2846 else
2847 prot_type = QETH_PROT_TCPIP;
2848 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2849 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2850 iob, reply_cb, reply_param);
908abbb5
UB		 2851 if (rc == -ETIME) {
2852 qeth_clear_ipacmd_list(card);
2853 qeth_schedule_recovery(card);
2854 }
4a71df50
FB		 2855 return rc;
2856}
2857EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2858
4a71df50
FB		 2859int qeth_send_startlan(struct qeth_card *card)
2860{
2861 int rc;
70919e23 2862 struct qeth_cmd_buffer *iob;
4a71df50 2863
d11ba0c4 2864 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2865
70919e23
UB		 2866 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2867 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2868 return rc;
2869}
2870EXPORT_SYMBOL_GPL(qeth_send_startlan);
2871
4a71df50
FB		 2872int qeth_default_setadapterparms_cb(struct qeth_card *card,
2873 struct qeth_reply *reply, unsigned long data)
2874{
2875 struct qeth_ipa_cmd *cmd;
2876
847a50fd 2877 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2878
2879 cmd = (struct qeth_ipa_cmd *) data;
2880 if (cmd->hdr.return_code == 0)
2881 cmd->hdr.return_code =
2882 cmd->data.setadapterparms.hdr.return_code;
2883 return 0;
2884}
2885EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2886
2887static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2888 struct qeth_reply *reply, unsigned long data)
2889{
2890 struct qeth_ipa_cmd *cmd;
2891
847a50fd 2892 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2893
2894 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2895 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2896 card->info.link_type =
2897 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2898 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2899 }
4a71df50
FB		 2900 card->options.adp.supported_funcs =
2901 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2902 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2903}
2904
2905struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2906 __u32 command, __u32 cmdlen)
2907{
2908 struct qeth_cmd_buffer *iob;
2909 struct qeth_ipa_cmd *cmd;
2910
2911 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2912 QETH_PROT_IPV4);
2913 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2914 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2915 cmd->data.setadapterparms.hdr.command_code = command;
2916 cmd->data.setadapterparms.hdr.used_total = 1;
2917 cmd->data.setadapterparms.hdr.seq_no = 1;
2918
2919 return iob;
2920}
2921EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2922
2923int qeth_query_setadapterparms(struct qeth_card *card)
2924{
2925 int rc;
2926 struct qeth_cmd_buffer *iob;
2927
847a50fd 2928 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2929 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2930 sizeof(struct qeth_ipacmd_setadpparms));
2931 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2932 return rc;
2933}
2934EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2935
1da74b1c
FB		 2936static int qeth_query_ipassists_cb(struct qeth_card *card,
2937 struct qeth_reply *reply, unsigned long data)
2938{
2939 struct qeth_ipa_cmd *cmd;
2940
2941 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2942
2943 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 2944
2945 switch (cmd->hdr.return_code) {
2946 case IPA_RC_NOTSUPP:
2947 case IPA_RC_L2_UNSUPPORTED_CMD:
2948 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
2949 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
2950 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
2951 return -0;
2952 default:
2953 if (cmd->hdr.return_code) {
2954 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
2955 "rc=%d\n",
2956 dev_name(&card->gdev->dev),
2957 cmd->hdr.return_code);
2958 return 0;
2959 }
2960 }
2961
1da74b1c
FB		 2962 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2963 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2964 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 2965 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 2966 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2967 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 2968 } else
2969 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
2970 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 2971 return 0;
2972}
2973
2974int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2975{
2976 int rc;
2977 struct qeth_cmd_buffer *iob;
2978
2979 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2980 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2981 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2982 return rc;
2983}
2984EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2985
2986static int qeth_query_setdiagass_cb(struct qeth_card *card,
2987 struct qeth_reply *reply, unsigned long data)
2988{
2989 struct qeth_ipa_cmd *cmd;
2990 __u16 rc;
2991
2992 cmd = (struct qeth_ipa_cmd *)data;
2993 rc = cmd->hdr.return_code;
2994 if (rc)
2995 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2996 else
2997 card->info.diagass_support = cmd->data.diagass.ext;
2998 return 0;
2999}
3000
3001static int qeth_query_setdiagass(struct qeth_card *card)
3002{
3003 struct qeth_cmd_buffer *iob;
3004 struct qeth_ipa_cmd *cmd;
3005
3006 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3007 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3008 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3009 cmd->data.diagass.subcmd_len = 16;
3010 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3011 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3012}
3013
3014static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3015{
3016 unsigned long info = get_zeroed_page(GFP_KERNEL);
3017 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3018 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3019 struct ccw_dev_id ccwid;
caf757c6 3020 int level;
1da74b1c
FB		 3021
3022 tid->chpid = card->info.chpid;
3023 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3024 tid->ssid = ccwid.ssid;
3025 tid->devno = ccwid.devno;
3026 if (!info)
3027 return;
caf757c6
HC		 3028 level = stsi(NULL, 0, 0, 0);
3029 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3030 tid->lparnr = info222->lpar_number;
caf757c6 3031 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3032 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3033 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3034 }
3035 free_page(info);
3036 return;
3037}
3038
3039static int qeth_hw_trap_cb(struct qeth_card *card,
3040 struct qeth_reply *reply, unsigned long data)
3041{
3042 struct qeth_ipa_cmd *cmd;
3043 __u16 rc;
3044
3045 cmd = (struct qeth_ipa_cmd *)data;
3046 rc = cmd->hdr.return_code;
3047 if (rc)
3048 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3049 return 0;
3050}
3051
3052int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3053{
3054 struct qeth_cmd_buffer *iob;
3055 struct qeth_ipa_cmd *cmd;
3056
3057 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3058 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3059 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3060 cmd->data.diagass.subcmd_len = 80;
3061 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3062 cmd->data.diagass.type = 1;
3063 cmd->data.diagass.action = action;
3064 switch (action) {
3065 case QETH_DIAGS_TRAP_ARM:
3066 cmd->data.diagass.options = 0x0003;
3067 cmd->data.diagass.ext = 0x00010000 +
3068 sizeof(struct qeth_trap_id);
3069 qeth_get_trap_id(card,
3070 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3071 break;
3072 case QETH_DIAGS_TRAP_DISARM:
3073 cmd->data.diagass.options = 0x0001;
3074 break;
3075 case QETH_DIAGS_TRAP_CAPTURE:
3076 break;
3077 }
3078 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3079}
3080EXPORT_SYMBOL_GPL(qeth_hw_trap);
3081
76b11f8e
UB		 3082int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3083 unsigned int qdio_error, const char *dbftext)
4a71df50 3084{
779e6e1c 3085 if (qdio_error) {
847a50fd 3086 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3087 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3088 buf->element[15].sflags);
38593d01 3089 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3090 buf->element[14].sflags);
38593d01 3091 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3092 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3093 card->stats.rx_dropped++;
3094 return 0;
3095 } else
3096 return 1;
4a71df50
FB		 3097 }
3098 return 0;
3099}
3100EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3101
b3332930
FB		 3102void qeth_buffer_reclaim_work(struct work_struct *work)
3103{
3104 struct qeth_card *card = container_of(work, struct qeth_card,
3105 buffer_reclaim_work.work);
3106
3107 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3108 qeth_queue_input_buffer(card, card->reclaim_index);
3109}
3110
4a71df50
FB		 3111void qeth_queue_input_buffer(struct qeth_card *card, int index)
3112{
3113 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3114 struct list_head *lh;
4a71df50
FB		 3115 int count;
3116 int i;
3117 int rc;
3118 int newcount = 0;
3119
4a71df50
FB		 3120 count = (index < queue->next_buf_to_init)?
3121 card->qdio.in_buf_pool.buf_count -
3122 (queue->next_buf_to_init - index) :
3123 card->qdio.in_buf_pool.buf_count -
3124 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3125 /* only requeue at a certain threshold to avoid SIGAs */
3126 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3127 for (i = queue->next_buf_to_init;
3128 i < queue->next_buf_to_init + count; ++i) {
3129 if (qeth_init_input_buffer(card,
3130 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3131 break;
3132 } else {
3133 newcount++;
3134 }
3135 }
3136
3137 if (newcount < count) {
3138 /* we are in memory shortage so we switch back to
3139 traditional skb allocation and drop packages */
4a71df50
FB		 3140 atomic_set(&card->force_alloc_skb, 3);
3141 count = newcount;
3142 } else {
4a71df50
FB		 3143 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3144 }
3145
b3332930
FB		 3146 if (!count) {
3147 i = 0;
3148 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3149 i++;
3150 if (i == card->qdio.in_buf_pool.buf_count) {
3151 QETH_CARD_TEXT(card, 2, "qsarbw");
3152 card->reclaim_index = index;
3153 schedule_delayed_work(
3154 &card->buffer_reclaim_work,
3155 QETH_RECLAIM_WORK_TIME);
3156 }
3157 return;
3158 }
3159
4a71df50
FB		 3160 /*
3161 * according to old code it should be avoided to requeue all
3162 * 128 buffers in order to benefit from PCI avoidance.
3163 * this function keeps at least one buffer (the buffer at
3164 * 'index') un-requeued -> this buffer is the first buffer that
3165 * will be requeued the next time
3166 */
3167 if (card->options.performance_stats) {
3168 card->perf_stats.inbound_do_qdio_cnt++;
3169 card->perf_stats.inbound_do_qdio_start_time =
3170 qeth_get_micros();
3171 }
779e6e1c
JG		 3172 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3173 queue->next_buf_to_init, count);
4a71df50
FB		 3174 if (card->options.performance_stats)
3175 card->perf_stats.inbound_do_qdio_time +=
3176 qeth_get_micros() -
3177 card->perf_stats.inbound_do_qdio_start_time;
3178 if (rc) {
847a50fd 3179 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3180 }
3181 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3182 QDIO_MAX_BUFFERS_PER_Q;
3183 }
3184}
3185EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3186
3187static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3188 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3189{
3ec90878 3190 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3191
847a50fd 3192 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3193 if (card->info.type == QETH_CARD_TYPE_IQD) {
3194 if (sbalf15 == 0) {
3195 qdio_err = 0;
3196 } else {
3197 qdio_err = 1;
3198 }
3199 }
76b11f8e 3200 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3201
3202 if (!qdio_err)
4a71df50 3203 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3204
3205 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3206 return QETH_SEND_ERROR_RETRY;
3207
847a50fd
CO		 3208 QETH_CARD_TEXT(card, 1, "lnkfail");
3209 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3210 (u16)qdio_err, (u8)sbalf15);
3211 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3212}
3213
3214/*
3215 * Switched to packing state if the number of used buffers on a queue
3216 * reaches a certain limit.
3217 */
3218static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3219{
3220 if (!queue->do_pack) {
3221 if (atomic_read(&queue->used_buffers)
3222 >= QETH_HIGH_WATERMARK_PACK){
3223 /* switch non-PACKING -> PACKING */
847a50fd 3224 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3225 if (queue->card->options.performance_stats)
3226 queue->card->perf_stats.sc_dp_p++;
3227 queue->do_pack = 1;
3228 }
3229 }
3230}
3231
3232/*
3233 * Switches from packing to non-packing mode. If there is a packing
3234 * buffer on the queue this buffer will be prepared to be flushed.
3235 * In that case 1 is returned to inform the caller. If no buffer
3236 * has to be flushed, zero is returned.
3237 */
3238static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3239{
3240 struct qeth_qdio_out_buffer *buffer;
3241 int flush_count = 0;
3242
3243 if (queue->do_pack) {
3244 if (atomic_read(&queue->used_buffers)
3245 <= QETH_LOW_WATERMARK_PACK) {
3246 /* switch PACKING -> non-PACKING */
847a50fd 3247 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3248 if (queue->card->options.performance_stats)
3249 queue->card->perf_stats.sc_p_dp++;
3250 queue->do_pack = 0;
3251 /* flush packing buffers */
0da9581d 3252 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3253 if ((atomic_read(&buffer->state) ==
3254 QETH_QDIO_BUF_EMPTY) &&
3255 (buffer->next_element_to_fill > 0)) {
3256 atomic_set(&buffer->state,
0da9581d 3257 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3258 flush_count++;
3259 queue->next_buf_to_fill =
3260 (queue->next_buf_to_fill + 1) %
3261 QDIO_MAX_BUFFERS_PER_Q;
3262 }
3263 }
3264 }
3265 return flush_count;
3266}
3267
0da9581d 3268
4a71df50
FB		 3269/*
3270 * Called to flush a packing buffer if no more pci flags are on the queue.
3271 * Checks if there is a packing buffer and prepares it to be flushed.
3272 * In that case returns 1, otherwise zero.
3273 */
3274static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3275{
3276 struct qeth_qdio_out_buffer *buffer;
3277
0da9581d 3278 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3279 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3280 (buffer->next_element_to_fill > 0)) {
3281 /* it's a packing buffer */
3282 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3283 queue->next_buf_to_fill =
3284 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3285 return 1;
3286 }
3287 return 0;
3288}
3289
779e6e1c
JG		 3290static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3291 int count)
4a71df50
FB		 3292{
3293 struct qeth_qdio_out_buffer *buf;
3294 int rc;
3295 int i;
3296 unsigned int qdio_flags;
3297
4a71df50 3298 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3299 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3300 buf = queue->bufs[bidx];
3ec90878
JG		 3301 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3302 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3303
0da9581d
EL		 3304 if (queue->bufstates)
3305 queue->bufstates[bidx].user = buf;
3306
4a71df50
FB		 3307 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3308 continue;
3309
3310 if (!queue->do_pack) {
3311 if ((atomic_read(&queue->used_buffers) >=
3312 (QETH_HIGH_WATERMARK_PACK -
3313 QETH_WATERMARK_PACK_FUZZ)) &&
3314 !atomic_read(&queue->set_pci_flags_count)) {
3315 /* it's likely that we'll go to packing
3316 * mode soon */
3317 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3318 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3319 }
3320 } else {
3321 if (!atomic_read(&queue->set_pci_flags_count)) {
3322 /*
3323 * there's no outstanding PCI any more, so we
3324 * have to request a PCI to be sure the the PCI
3325 * will wake at some time in the future then we
3326 * can flush packed buffers that might still be
3327 * hanging around, which can happen if no
3328 * further send was requested by the stack
3329 */
3330 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3331 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3332 }
3333 }
3334 }
3335
3336 queue->card->dev->trans_start = jiffies;
3337 if (queue->card->options.performance_stats) {
3338 queue->card->perf_stats.outbound_do_qdio_cnt++;
3339 queue->card->perf_stats.outbound_do_qdio_start_time =
3340 qeth_get_micros();
3341 }
3342 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3343 if (atomic_read(&queue->set_pci_flags_count))
3344 qdio_flags |= QDIO_FLAG_PCI_OUT;
3345 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3346 queue->queue_no, index, count);
4a71df50
FB		 3347 if (queue->card->options.performance_stats)
3348 queue->card->perf_stats.outbound_do_qdio_time +=
3349 qeth_get_micros() -
3350 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3351 atomic_add(count, &queue->used_buffers);
4a71df50 3352 if (rc) {
d303b6fd
JG		 3353 queue->card->stats.tx_errors += count;
3354 /* ignore temporary SIGA errors without busy condition */
1549d13f 3355 if (rc == -ENOBUFS)
d303b6fd 3356 return;
847a50fd 3357 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3358 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3359 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3360 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3361 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3362
4a71df50
FB		 3363 /* this must not happen under normal circumstances. if it
3364 * happens something is really wrong -> recover */
3365 qeth_schedule_recovery(queue->card);
3366 return;
3367 }
4a71df50
FB		 3368 if (queue->card->options.performance_stats)
3369 queue->card->perf_stats.bufs_sent += count;
3370}
3371
3372static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3373{
3374 int index;
3375 int flush_cnt = 0;
3376 int q_was_packing = 0;
3377
3378 /*
3379 * check if weed have to switch to non-packing mode or if
3380 * we have to get a pci flag out on the queue
3381 */
3382 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3383 !atomic_read(&queue->set_pci_flags_count)) {
3384 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3385 QETH_OUT_Q_UNLOCKED) {
3386 /*
3387 * If we get in here, there was no action in
3388 * do_send_packet. So, we check if there is a
3389 * packing buffer to be flushed here.
3390 */
3391 netif_stop_queue(queue->card->dev);
3392 index = queue->next_buf_to_fill;
3393 q_was_packing = queue->do_pack;
3394 /* queue->do_pack may change */
3395 barrier();
3396 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3397 if (!flush_cnt &&
3398 !atomic_read(&queue->set_pci_flags_count))
3399 flush_cnt +=
3400 qeth_flush_buffers_on_no_pci(queue);
3401 if (queue->card->options.performance_stats &&
3402 q_was_packing)
3403 queue->card->perf_stats.bufs_sent_pack +=
3404 flush_cnt;
3405 if (flush_cnt)
779e6e1c 3406 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3407 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3408 }
3409 }
3410}
3411
a1c3ed4c
FB		 3412void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3413 unsigned long card_ptr)
3414{
3415 struct qeth_card *card = (struct qeth_card *)card_ptr;
3416
0cffef48 3417 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3418 napi_schedule(&card->napi);
3419}
3420EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3421
0da9581d
EL		 3422int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3423{
3424 int rc;
3425
3426 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3427 rc = -1;
3428 goto out;
3429 } else {
3430 if (card->options.cq == cq) {
3431 rc = 0;
3432 goto out;
3433 }
3434
3435 if (card->state != CARD_STATE_DOWN &&
3436 card->state != CARD_STATE_RECOVER) {
3437 rc = -1;
3438 goto out;
3439 }
3440
3441 qeth_free_qdio_buffers(card);
3442 card->options.cq = cq;
3443 rc = 0;
3444 }
3445out:
3446 return rc;
3447
3448}
3449EXPORT_SYMBOL_GPL(qeth_configure_cq);
3450
3451
3452static void qeth_qdio_cq_handler(struct qeth_card *card,
3453 unsigned int qdio_err,
3454 unsigned int queue, int first_element, int count) {
3455 struct qeth_qdio_q *cq = card->qdio.c_q;
3456 int i;
3457 int rc;
3458
3459 if (!qeth_is_cq(card, queue))
3460 goto out;
3461
3462 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3463 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3464 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3465
3466 if (qdio_err) {
3467 netif_stop_queue(card->dev);
3468 qeth_schedule_recovery(card);
3469 goto out;
3470 }
3471
3472 if (card->options.performance_stats) {
3473 card->perf_stats.cq_cnt++;
3474 card->perf_stats.cq_start_time = qeth_get_micros();
3475 }
3476
3477 for (i = first_element; i < first_element + count; ++i) {
3478 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3479 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3480 int e;
3481
3482 e = 0;
3483 while (buffer->element[e].addr) {
3484 unsigned long phys_aob_addr;
3485
3486 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3487 qeth_qdio_handle_aob(card, phys_aob_addr);
3488 buffer->element[e].addr = NULL;
3489 buffer->element[e].eflags = 0;
3490 buffer->element[e].sflags = 0;
3491 buffer->element[e].length = 0;
3492
3493 ++e;
3494 }
3495
3496 buffer->element[15].eflags = 0;
3497 buffer->element[15].sflags = 0;
3498 }
3499 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3500 card->qdio.c_q->next_buf_to_init,
3501 count);
3502 if (rc) {
3503 dev_warn(&card->gdev->dev,
3504 "QDIO reported an error, rc=%i\n", rc);
3505 QETH_CARD_TEXT(card, 2, "qcqherr");
3506 }
3507 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3508 + count) % QDIO_MAX_BUFFERS_PER_Q;
3509
3510 netif_wake_queue(card->dev);
3511
3512 if (card->options.performance_stats) {
3513 int delta_t = qeth_get_micros();
3514 delta_t -= card->perf_stats.cq_start_time;
3515 card->perf_stats.cq_time += delta_t;
3516 }
3517out:
3518 return;
3519}
3520
a1c3ed4c 3521void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3522 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3523 unsigned long card_ptr)
3524{
3525 struct qeth_card *card = (struct qeth_card *)card_ptr;
3526
0da9581d
EL		 3527 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3528 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3529
3530 if (qeth_is_cq(card, queue))
3531 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3532 else if (qdio_err)
a1c3ed4c 3533 qeth_schedule_recovery(card);
0da9581d
EL		 3534
3535
a1c3ed4c
FB		 3536}
3537EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3538
779e6e1c
JG		 3539void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3540 unsigned int qdio_error, int __queue, int first_element,
3541 int count, unsigned long card_ptr)
4a71df50
FB		 3542{
3543 struct qeth_card *card = (struct qeth_card *) card_ptr;
3544 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3545 struct qeth_qdio_out_buffer *buffer;
3546 int i;
3547
847a50fd 3548 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3549 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3550 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3551 netif_stop_queue(card->dev);
3552 qeth_schedule_recovery(card);
3553 return;
4a71df50
FB		 3554 }
3555 if (card->options.performance_stats) {
3556 card->perf_stats.outbound_handler_cnt++;
3557 card->perf_stats.outbound_handler_start_time =
3558 qeth_get_micros();
3559 }
3560 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3561 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3562 buffer = queue->bufs[bidx];
b67d801f 3563 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3564
3565 if (queue->bufstates &&
3566 (queue->bufstates[bidx].flags &
3567 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
b3332930
FB		 3568 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3569
3570 if (atomic_cmpxchg(&buffer->state,
3571 QETH_QDIO_BUF_PRIMED,
3572 QETH_QDIO_BUF_PENDING) ==
3573 QETH_QDIO_BUF_PRIMED) {
3574 qeth_notify_skbs(queue, buffer,
3575 TX_NOTIFY_PENDING);
3576 }
0da9581d
EL		 3577 buffer->aob = queue->bufstates[bidx].aob;
3578 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3579 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3580 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3581 virt_to_phys(buffer->aob));
3582 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
b3332930
FB		 3583 if (qeth_init_qdio_out_buf(queue, bidx)) {
3584 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3585 qeth_schedule_recovery(card);
b3332930 3586 }
0da9581d 3587 } else {
b3332930
FB		 3588 if (card->options.cq == QETH_CQ_ENABLED) {
3589 enum iucv_tx_notify n;
3590
3591 n = qeth_compute_cq_notification(
3592 buffer->buffer->element[15].sflags, 0);
3593 qeth_notify_skbs(queue, buffer, n);
3594 }
3595
0da9581d
EL		 3596 qeth_clear_output_buffer(queue, buffer,
3597 QETH_QDIO_BUF_EMPTY);
3598 }
3599 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3600 }
3601 atomic_sub(count, &queue->used_buffers);
3602 /* check if we need to do something on this outbound queue */
3603 if (card->info.type != QETH_CARD_TYPE_IQD)
3604 qeth_check_outbound_queue(queue);
3605
3606 netif_wake_queue(queue->card->dev);
3607 if (card->options.performance_stats)
3608 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3609 card->perf_stats.outbound_handler_start_time;
3610}
3611EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3612
4a71df50
FB		 3613int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3614 int ipv, int cast_type)
3615{
5113fec0
UB		 3616 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3617 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3618 return card->qdio.default_out_queue;
3619 switch (card->qdio.no_out_queues) {
3620 case 4:
3621 if (cast_type && card->info.is_multicast_different)
3622 return card->info.is_multicast_different &
3623 (card->qdio.no_out_queues - 1);
3624 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3625 const u8 tos = ip_hdr(skb)->tos;
3626
3627 if (card->qdio.do_prio_queueing ==
3628 QETH_PRIO_Q_ING_TOS) {
3629 if (tos & IP_TOS_NOTIMPORTANT)
3630 return 3;
3631 if (tos & IP_TOS_HIGHRELIABILITY)
3632 return 2;
3633 if (tos & IP_TOS_HIGHTHROUGHPUT)
3634 return 1;
3635 if (tos & IP_TOS_LOWDELAY)
3636 return 0;
3637 }
3638 if (card->qdio.do_prio_queueing ==
3639 QETH_PRIO_Q_ING_PREC)
3640 return 3 - (tos >> 6);
3641 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3642 /* TODO: IPv6!!! */
3643 }
3644 return card->qdio.default_out_queue;
3645 case 1: /* fallthrough for single-out-queue 1920-device */
3646 default:
3647 return card->qdio.default_out_queue;
3648 }
3649}
3650EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3651
4a71df50
FB		 3652int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3653 struct sk_buff *skb, int elems)
3654{
51aa165c
FB		 3655 int dlen = skb->len - skb->data_len;
3656 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3657 PFN_DOWN((unsigned long)skb->data);
4a71df50 3658
51aa165c 3659 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 3660 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3661 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3662 "(Number=%d / Length=%d). Discarded.\n",
3663 (elements_needed+elems), skb->len);
3664 return 0;
3665 }
3666 return elements_needed;
3667}
3668EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3669
51aa165c
FB		 3670int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3671{
3672 int hroom, inpage, rest;
3673
3674 if (((unsigned long)skb->data & PAGE_MASK) !=
3675 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3676 hroom = skb_headroom(skb);
3677 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3678 rest = len - inpage;
3679 if (rest > hroom)
3680 return 1;
3681 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3682 skb->data -= rest;
3683 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3684 }
3685 return 0;
3686}
3687EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3688
f90b744e 3689static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3690 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3691 int offset)
4a71df50 3692{
51aa165c 3693 int length = skb->len - skb->data_len;
4a71df50
FB		 3694 int length_here;
3695 int element;
3696 char *data;
51aa165c
FB		 3697 int first_lap, cnt;
3698 struct skb_frag_struct *frag;
4a71df50
FB		 3699
3700 element = *next_element_to_fill;
3701 data = skb->data;
3702 first_lap = (is_tso == 0 ? 1 : 0);
3703
683d718a
FB		 3704 if (offset >= 0) {
3705 data = skb->data + offset;
e1f03ae8 3706 length -= offset;
683d718a
FB		 3707 first_lap = 0;
3708 }
3709
4a71df50
FB		 3710 while (length > 0) {
3711 /* length_here is the remaining amount of data in this page */
3712 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3713 if (length < length_here)
3714 length_here = length;
3715
3716 buffer->element[element].addr = data;
3717 buffer->element[element].length = length_here;
3718 length -= length_here;
3719 if (!length) {
3720 if (first_lap)
51aa165c 3721 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3722 buffer->element[element].eflags =
3723 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3724 else
3ec90878 3725 buffer->element[element].eflags = 0;
4a71df50 3726 else
3ec90878
JG		 3727 buffer->element[element].eflags =
3728 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3729 } else {
3730 if (first_lap)
3ec90878
JG		 3731 buffer->element[element].eflags =
3732 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3733 else
3ec90878
JG		 3734 buffer->element[element].eflags =
3735 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3736 }
3737 data += length_here;
3738 element++;
3739 first_lap = 0;
3740 }
51aa165c
FB		 3741
3742 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3743 frag = &skb_shinfo(skb)->frags[cnt];
8d36bb0d
IC		 3744 buffer->element[element].addr = (char *)
3745 page_to_phys(skb_frag_page(frag))
51aa165c
FB		 3746 + frag->page_offset;
3747 buffer->element[element].length = frag->size;
3ec90878 3748 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
51aa165c
FB		 3749 element++;
3750 }
3751
3ec90878
JG		 3752 if (buffer->element[element - 1].eflags)
3753 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3754 *next_element_to_fill = element;
3755}
3756
f90b744e 3757static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3758 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3759 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3760{
3761 struct qdio_buffer *buffer;
4a71df50
FB		 3762 int flush_cnt = 0, hdr_len, large_send = 0;
3763
4a71df50
FB		 3764 buffer = buf->buffer;
3765 atomic_inc(&skb->users);
3766 skb_queue_tail(&buf->skb_list, skb);
3767
4a71df50 3768 /*check first on TSO ....*/
683d718a 3769 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3770 int element = buf->next_element_to_fill;
3771
683d718a
FB		 3772 hdr_len = sizeof(struct qeth_hdr_tso) +
3773 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3774 /*fill first buffer entry only with header information */
3775 buffer->element[element].addr = skb->data;
3776 buffer->element[element].length = hdr_len;
3ec90878 3777 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3778 buf->next_element_to_fill++;
3779 skb->data += hdr_len;
3780 skb->len -= hdr_len;
3781 large_send = 1;
3782 }
683d718a
FB		 3783
3784 if (offset >= 0) {
3785 int element = buf->next_element_to_fill;
3786 buffer->element[element].addr = hdr;
3787 buffer->element[element].length = sizeof(struct qeth_hdr) +
3788 hd_len;
3ec90878 3789 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3790 buf->is_header[element] = 1;
3791 buf->next_element_to_fill++;
3792 }
3793
51aa165c
FB		 3794 __qeth_fill_buffer(skb, buffer, large_send,
3795 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3796
3797 if (!queue->do_pack) {
847a50fd 3798 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3799 /* set state to PRIMED -> will be flushed */
3800 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3801 flush_cnt = 1;
3802 } else {
847a50fd 3803 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3804 if (queue->card->options.performance_stats)
3805 queue->card->perf_stats.skbs_sent_pack++;
3806 if (buf->next_element_to_fill >=
3807 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3808 /*
3809 * packed buffer if full -> set state PRIMED
3810 * -> will be flushed
3811 */
3812 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3813 flush_cnt = 1;
3814 }
3815 }
3816 return flush_cnt;
3817}
3818
3819int qeth_do_send_packet_fast(struct qeth_card *card,
3820 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3821 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3822 int offset, int hd_len)
4a71df50
FB		 3823{
3824 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3825 int index;
3826
4a71df50
FB		 3827 /* spin until we get the queue ... */
3828 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3829 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3830 /* ... now we've got the queue */
3831 index = queue->next_buf_to_fill;
0da9581d 3832 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3833 /*
3834 * check if buffer is empty to make sure that we do not 'overtake'
3835 * ourselves and try to fill a buffer that is already primed
3836 */
3837 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3838 goto out;
64ef8957 3839 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3840 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3841 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3842 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3843 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3844 return 0;
3845out:
3846 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3847 return -EBUSY;
3848}
3849EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3850
3851int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3852 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3853 int elements_needed)
4a71df50
FB		 3854{
3855 struct qeth_qdio_out_buffer *buffer;
3856 int start_index;
3857 int flush_count = 0;
3858 int do_pack = 0;
3859 int tmp;
3860 int rc = 0;
3861
4a71df50
FB		 3862 /* spin until we get the queue ... */
3863 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3864 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3865 start_index = queue->next_buf_to_fill;
0da9581d 3866 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3867 /*
3868 * check if buffer is empty to make sure that we do not 'overtake'
3869 * ourselves and try to fill a buffer that is already primed
3870 */
3871 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3872 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3873 return -EBUSY;
3874 }
3875 /* check if we need to switch packing state of this queue */
3876 qeth_switch_to_packing_if_needed(queue);
3877 if (queue->do_pack) {
3878 do_pack = 1;
64ef8957
FB		 3879 /* does packet fit in current buffer? */
3880 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3881 buffer->next_element_to_fill) < elements_needed) {
3882 /* ... no -> set state PRIMED */
3883 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3884 flush_count++;
3885 queue->next_buf_to_fill =
3886 (queue->next_buf_to_fill + 1) %
3887 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3888 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3889 /* we did a step forward, so check buffer state
3890 * again */
3891 if (atomic_read(&buffer->state) !=
3892 QETH_QDIO_BUF_EMPTY) {
3893 qeth_flush_buffers(queue, start_index,
779e6e1c 3894 flush_count);
64ef8957 3895 atomic_set(&queue->state,
4a71df50 3896 QETH_OUT_Q_UNLOCKED);
64ef8957 3897 return -EBUSY;
4a71df50
FB		 3898 }
3899 }
3900 }
64ef8957 3901 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3902 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3903 QDIO_MAX_BUFFERS_PER_Q;
3904 flush_count += tmp;
4a71df50 3905 if (flush_count)
779e6e1c 3906 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3907 else if (!atomic_read(&queue->set_pci_flags_count))
3908 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3909 /*
3910 * queue->state will go from LOCKED -> UNLOCKED or from
3911 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3912 * (switch packing state or flush buffer to get another pci flag out).
3913 * In that case we will enter this loop
3914 */
3915 while (atomic_dec_return(&queue->state)) {
3916 flush_count = 0;
3917 start_index = queue->next_buf_to_fill;
3918 /* check if we can go back to non-packing state */
3919 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3920 /*
3921 * check if we need to flush a packing buffer to get a pci
3922 * flag out on the queue
3923 */
3924 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3925 flush_count += qeth_flush_buffers_on_no_pci(queue);
3926 if (flush_count)
779e6e1c 3927 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3928 }
3929 /* at this point the queue is UNLOCKED again */
3930 if (queue->card->options.performance_stats && do_pack)
3931 queue->card->perf_stats.bufs_sent_pack += flush_count;
3932
3933 return rc;
3934}
3935EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3936
3937static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3938 struct qeth_reply *reply, unsigned long data)
3939{
3940 struct qeth_ipa_cmd *cmd;
3941 struct qeth_ipacmd_setadpparms *setparms;
3942
847a50fd 3943 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3944
3945 cmd = (struct qeth_ipa_cmd *) data;
3946 setparms = &(cmd->data.setadapterparms);
3947
3948 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3949 if (cmd->hdr.return_code) {
847a50fd 3950 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3951 setparms->data.mode = SET_PROMISC_MODE_OFF;
3952 }
3953 card->info.promisc_mode = setparms->data.mode;
3954 return 0;
3955}
3956
3957void qeth_setadp_promisc_mode(struct qeth_card *card)
3958{
3959 enum qeth_ipa_promisc_modes mode;
3960 struct net_device *dev = card->dev;
3961 struct qeth_cmd_buffer *iob;
3962 struct qeth_ipa_cmd *cmd;
3963
847a50fd 3964 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3965
3966 if (((dev->flags & IFF_PROMISC) &&
3967 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3968 (!(dev->flags & IFF_PROMISC) &&
3969 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3970 return;
3971 mode = SET_PROMISC_MODE_OFF;
3972 if (dev->flags & IFF_PROMISC)
3973 mode = SET_PROMISC_MODE_ON;
847a50fd 3974 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3975
3976 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3977 sizeof(struct qeth_ipacmd_setadpparms));
3978 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3979 cmd->data.setadapterparms.data.mode = mode;
3980 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3981}
3982EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3983
3984int qeth_change_mtu(struct net_device *dev, int new_mtu)
3985{
3986 struct qeth_card *card;
3987 char dbf_text[15];
3988
509e2562 3989 card = dev->ml_priv;
4a71df50 3990
847a50fd 3991 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3992 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3993 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3994
3995 if (new_mtu < 64)
3996 return -EINVAL;
3997 if (new_mtu > 65535)
3998 return -EINVAL;
3999 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4000 (!qeth_mtu_is_valid(card, new_mtu)))
4001 return -EINVAL;
4002 dev->mtu = new_mtu;
4003 return 0;
4004}
4005EXPORT_SYMBOL_GPL(qeth_change_mtu);
4006
4007struct net_device_stats *qeth_get_stats(struct net_device *dev)
4008{
4009 struct qeth_card *card;
4010
509e2562 4011 card = dev->ml_priv;
4a71df50 4012
847a50fd 4013 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4014
4015 return &card->stats;
4016}
4017EXPORT_SYMBOL_GPL(qeth_get_stats);
4018
4019static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4020 struct qeth_reply *reply, unsigned long data)
4021{
4022 struct qeth_ipa_cmd *cmd;
4023
847a50fd 4024 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4025
4026 cmd = (struct qeth_ipa_cmd *) data;
4027 if (!card->options.layer2 ||
4028 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4029 memcpy(card->dev->dev_addr,
4030 &cmd->data.setadapterparms.data.change_addr.addr,
4031 OSA_ADDR_LEN);
4032 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4033 }
4034 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4035 return 0;
4036}
4037
4038int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4039{
4040 int rc;
4041 struct qeth_cmd_buffer *iob;
4042 struct qeth_ipa_cmd *cmd;
4043
847a50fd 4044 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4045
4046 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4047 sizeof(struct qeth_ipacmd_setadpparms));
4048 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4049 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4050 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4051 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4052 card->dev->dev_addr, OSA_ADDR_LEN);
4053 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4054 NULL);
4055 return rc;
4056}
4057EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4058
d64ecc22
EL		 4059static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4060 struct qeth_reply *reply, unsigned long data)
4061{
4062 struct qeth_ipa_cmd *cmd;
4063 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 4064
847a50fd 4065 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4066
4067 cmd = (struct qeth_ipa_cmd *) data;
4068 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4069 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4070 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4071 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4072 cmd->data.setadapterparms.hdr.return_code);
4073 switch (cmd->data.setadapterparms.hdr.return_code) {
4074 case SET_ACCESS_CTRL_RC_SUCCESS:
4075 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4076 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4077 {
4078 card->options.isolation = access_ctrl_req->subcmd_code;
4079 if (card->options.isolation == ISOLATION_MODE_NONE) {
4080 dev_info(&card->gdev->dev,
4081 "QDIO data connection isolation is deactivated\n");
4082 } else {
4083 dev_info(&card->gdev->dev,
4084 "QDIO data connection isolation is activated\n");
4085 }
4086 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4087 card->gdev->dev.kobj.name,
4088 access_ctrl_req->subcmd_code,
4089 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4090 break;
4091 }
4092 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4093 {
4094 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4095 card->gdev->dev.kobj.name,
4096 access_ctrl_req->subcmd_code,
4097 cmd->data.setadapterparms.hdr.return_code);
4098 dev_err(&card->gdev->dev, "Adapter does not "
4099 "support QDIO data connection isolation\n");
4100
4101 /* ensure isolation mode is "none" */
4102 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4103 break;
4104 }
4105 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4106 {
4107 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4108 card->gdev->dev.kobj.name,
4109 access_ctrl_req->subcmd_code,
4110 cmd->data.setadapterparms.hdr.return_code);
4111 dev_err(&card->gdev->dev,
4112 "Adapter is dedicated. "
4113 "QDIO data connection isolation not supported\n");
4114
4115 /* ensure isolation mode is "none" */
4116 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4117 break;
4118 }
4119 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4120 {
4121 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4122 card->gdev->dev.kobj.name,
4123 access_ctrl_req->subcmd_code,
4124 cmd->data.setadapterparms.hdr.return_code);
4125 dev_err(&card->gdev->dev,
4126 "TSO does not permit QDIO data connection isolation\n");
4127
4128 /* ensure isolation mode is "none" */
4129 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4130 break;
4131 }
4132 default:
4133 {
4134 /* this should never happen */
4135 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4136 "==UNKNOWN\n",
4137 card->gdev->dev.kobj.name,
4138 access_ctrl_req->subcmd_code,
4139 cmd->data.setadapterparms.hdr.return_code);
4140
4141 /* ensure isolation mode is "none" */
4142 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4143 break;
4144 }
4145 }
4146 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4147 return 0;
d64ecc22
EL		 4148}
4149
4150static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4151 enum qeth_ipa_isolation_modes isolation)
4152{
4153 int rc;
4154 struct qeth_cmd_buffer *iob;
4155 struct qeth_ipa_cmd *cmd;
4156 struct qeth_set_access_ctrl *access_ctrl_req;
4157
847a50fd 4158 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4159
4160 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4161 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4162
4163 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4164 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4165 sizeof(struct qeth_set_access_ctrl));
4166 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4167 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4168 access_ctrl_req->subcmd_code = isolation;
4169
4170 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4171 NULL);
4172 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4173 return rc;
4174}
4175
4176int qeth_set_access_ctrl_online(struct qeth_card *card)
4177{
4178 int rc = 0;
4179
847a50fd 4180 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4181
5113fec0
UB		 4182 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4183 card->info.type == QETH_CARD_TYPE_OSX) &&
4184 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 4185 rc = qeth_setadpparms_set_access_ctrl(card,
4186 card->options.isolation);
4187 if (rc) {
4188 QETH_DBF_MESSAGE(3,
5113fec0 4189 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4190 card->gdev->dev.kobj.name,
4191 rc);
4192 }
4193 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4194 card->options.isolation = ISOLATION_MODE_NONE;
4195
4196 dev_err(&card->gdev->dev, "Adapter does not "
4197 "support QDIO data connection isolation\n");
4198 rc = -EOPNOTSUPP;
4199 }
4200 return rc;
4201}
4202EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4203
4a71df50
FB		 4204void qeth_tx_timeout(struct net_device *dev)
4205{
4206 struct qeth_card *card;
4207
509e2562 4208 card = dev->ml_priv;
847a50fd 4209 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4210 card->stats.tx_errors++;
4211 qeth_schedule_recovery(card);
4212}
4213EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4214
4215int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4216{
509e2562 4217 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4218 int rc = 0;
4219
4220 switch (regnum) {
4221 case MII_BMCR: /* Basic mode control register */
4222 rc = BMCR_FULLDPLX;
4223 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4224 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4225 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4226 rc |= BMCR_SPEED100;
4227 break;
4228 case MII_BMSR: /* Basic mode status register */
4229 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4230 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4231 BMSR_100BASE4;
4232 break;
4233 case MII_PHYSID1: /* PHYS ID 1 */
4234 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4235 dev->dev_addr[2];
4236 rc = (rc >> 5) & 0xFFFF;
4237 break;
4238 case MII_PHYSID2: /* PHYS ID 2 */
4239 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4240 break;
4241 case MII_ADVERTISE: /* Advertisement control reg */
4242 rc = ADVERTISE_ALL;
4243 break;
4244 case MII_LPA: /* Link partner ability reg */
4245 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4246 LPA_100BASE4 | LPA_LPACK;
4247 break;
4248 case MII_EXPANSION: /* Expansion register */
4249 break;
4250 case MII_DCOUNTER: /* disconnect counter */
4251 break;
4252 case MII_FCSCOUNTER: /* false carrier counter */
4253 break;
4254 case MII_NWAYTEST: /* N-way auto-neg test register */
4255 break;
4256 case MII_RERRCOUNTER: /* rx error counter */
4257 rc = card->stats.rx_errors;
4258 break;
4259 case MII_SREVISION: /* silicon revision */
4260 break;
4261 case MII_RESV1: /* reserved 1 */
4262 break;
4263 case MII_LBRERROR: /* loopback, rx, bypass error */
4264 break;
4265 case MII_PHYADDR: /* physical address */
4266 break;
4267 case MII_RESV2: /* reserved 2 */
4268 break;
4269 case MII_TPISTATUS: /* TPI status for 10mbps */
4270 break;
4271 case MII_NCONFIG: /* network interface config */
4272 break;
4273 default:
4274 break;
4275 }
4276 return rc;
4277}
4278EXPORT_SYMBOL_GPL(qeth_mdio_read);
4279
4280static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4281 struct qeth_cmd_buffer *iob, int len,
4282 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4283 unsigned long),
4284 void *reply_param)
4285{
4286 u16 s1, s2;
4287
847a50fd 4288 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4289
4290 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4291 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4292 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4293 /* adjust PDU length fields in IPA_PDU_HEADER */
4294 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4295 s2 = (u32) len;
4296 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4297 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4298 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4299 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4300 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4301 reply_cb, reply_param);
4302}
4303
4304static int qeth_snmp_command_cb(struct qeth_card *card,
4305 struct qeth_reply *reply, unsigned long sdata)
4306{
4307 struct qeth_ipa_cmd *cmd;
4308 struct qeth_arp_query_info *qinfo;
4309 struct qeth_snmp_cmd *snmp;
4310 unsigned char *data;
4311 __u16 data_len;
4312
847a50fd 4313 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4314
4315 cmd = (struct qeth_ipa_cmd *) sdata;
4316 data = (unsigned char *)((char *)cmd - reply->offset);
4317 qinfo = (struct qeth_arp_query_info *) reply->param;
4318 snmp = &cmd->data.setadapterparms.data.snmp;
4319
4320 if (cmd->hdr.return_code) {
847a50fd 4321 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4322 return 0;
4323 }
4324 if (cmd->data.setadapterparms.hdr.return_code) {
4325 cmd->hdr.return_code =
4326 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4327 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4328 return 0;
4329 }
4330 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4331 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4332 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4333 else
4334 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4335
4336 /* check if there is enough room in userspace */
4337 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4338 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4339 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4340 return 0;
4341 }
847a50fd 4342 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4343 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4344 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4345 cmd->data.setadapterparms.hdr.seq_no);
4346 /*copy entries to user buffer*/
4347 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4348 memcpy(qinfo->udata + qinfo->udata_offset,
4349 (char *)snmp,
4350 data_len + offsetof(struct qeth_snmp_cmd, data));
4351 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4352 } else {
4353 memcpy(qinfo->udata + qinfo->udata_offset,
4354 (char *)&snmp->request, data_len);
4355 }
4356 qinfo->udata_offset += data_len;
4357 /* check if all replies received ... */
847a50fd 4358 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4359 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4360 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4361 cmd->data.setadapterparms.hdr.seq_no);
4362 if (cmd->data.setadapterparms.hdr.seq_no <
4363 cmd->data.setadapterparms.hdr.used_total)
4364 return 1;
4365 return 0;
4366}
4367
4368int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4369{
4370 struct qeth_cmd_buffer *iob;
4371 struct qeth_ipa_cmd *cmd;
4372 struct qeth_snmp_ureq *ureq;
4373 int req_len;
4374 struct qeth_arp_query_info qinfo = {0, };
4375 int rc = 0;
4376
847a50fd 4377 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4378
4379 if (card->info.guestlan)
4380 return -EOPNOTSUPP;
4381
4382 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4383 (!card->options.layer2)) {
4a71df50
FB		 4384 return -EOPNOTSUPP;
4385 }
4386 /* skip 4 bytes (data_len struct member) to get req_len */
4387 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4388 return -EFAULT;
4986f3f0
JL		 4389 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4390 if (IS_ERR(ureq)) {
847a50fd 4391 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4392 return PTR_ERR(ureq);
4a71df50
FB		 4393 }
4394 qinfo.udata_len = ureq->hdr.data_len;
4395 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4396 if (!qinfo.udata) {
4397 kfree(ureq);
4398 return -ENOMEM;
4399 }
4400 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4401
4402 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4403 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4404 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4405 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4406 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4407 qeth_snmp_command_cb, (void *)&qinfo);
4408 if (rc)
14cc21b6 4409 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4410 QETH_CARD_IFNAME(card), rc);
4411 else {
4412 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4413 rc = -EFAULT;
4414 }
4415
4416 kfree(ureq);
4417 kfree(qinfo.udata);
4418 return rc;
4419}
4420EXPORT_SYMBOL_GPL(qeth_snmp_command);
4421
c3ab96f3
FB		 4422static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4423 struct qeth_reply *reply, unsigned long data)
4424{
4425 struct qeth_ipa_cmd *cmd;
4426 struct qeth_qoat_priv *priv;
4427 char *resdata;
4428 int resdatalen;
4429
4430 QETH_CARD_TEXT(card, 3, "qoatcb");
4431
4432 cmd = (struct qeth_ipa_cmd *)data;
4433 priv = (struct qeth_qoat_priv *)reply->param;
4434 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4435 resdata = (char *)data + 28;
4436
4437 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4438 cmd->hdr.return_code = IPA_RC_FFFF;
4439 return 0;
4440 }
4441
4442 memcpy((priv->buffer + priv->response_len), resdata,
4443 resdatalen);
4444 priv->response_len += resdatalen;
4445
4446 if (cmd->data.setadapterparms.hdr.seq_no <
4447 cmd->data.setadapterparms.hdr.used_total)
4448 return 1;
4449 return 0;
4450}
4451
4452int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4453{
4454 int rc = 0;
4455 struct qeth_cmd_buffer *iob;
4456 struct qeth_ipa_cmd *cmd;
4457 struct qeth_query_oat *oat_req;
4458 struct qeth_query_oat_data oat_data;
4459 struct qeth_qoat_priv priv;
4460 void __user *tmp;
4461
4462 QETH_CARD_TEXT(card, 3, "qoatcmd");
4463
4464 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4465 rc = -EOPNOTSUPP;
4466 goto out;
4467 }
4468
4469 if (copy_from_user(&oat_data, udata,
4470 sizeof(struct qeth_query_oat_data))) {
4471 rc = -EFAULT;
4472 goto out;
4473 }
4474
4475 priv.buffer_len = oat_data.buffer_len;
4476 priv.response_len = 0;
4477 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4478 if (!priv.buffer) {
4479 rc = -ENOMEM;
4480 goto out;
4481 }
4482
4483 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4484 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4485 sizeof(struct qeth_query_oat));
4486 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4487 oat_req = &cmd->data.setadapterparms.data.query_oat;
4488 oat_req->subcmd_code = oat_data.command;
4489
4490 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4491 &priv);
4492 if (!rc) {
4493 if (is_compat_task())
4494 tmp = compat_ptr(oat_data.ptr);
4495 else
4496 tmp = (void __user *)(unsigned long)oat_data.ptr;
4497
4498 if (copy_to_user(tmp, priv.buffer,
4499 priv.response_len)) {
4500 rc = -EFAULT;
4501 goto out_free;
4502 }
4503
4504 oat_data.response_len = priv.response_len;
4505
4506 if (copy_to_user(udata, &oat_data,
4507 sizeof(struct qeth_query_oat_data)))
4508 rc = -EFAULT;
4509 } else
4510 if (rc == IPA_RC_FFFF)
4511 rc = -EFAULT;
4512
4513out_free:
4514 kfree(priv.buffer);
4515out:
4516 return rc;
4517}
4518EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4519
4a71df50
FB		 4520static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4521{
4522 switch (card->info.type) {
4523 case QETH_CARD_TYPE_IQD:
4524 return 2;
4525 default:
4526 return 0;
4527 }
4528}
4529
d0ff1f52
UB		 4530static void qeth_determine_capabilities(struct qeth_card *card)
4531{
4532 int rc;
4533 int length;
4534 char *prcd;
4535 struct ccw_device *ddev;
4536 int ddev_offline = 0;
4537
4538 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4539 ddev = CARD_DDEV(card);
4540 if (!ddev->online) {
4541 ddev_offline = 1;
4542 rc = ccw_device_set_online(ddev);
4543 if (rc) {
4544 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4545 goto out;
4546 }
4547 }
4548
4549 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4550 if (rc) {
4551 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4552 dev_name(&card->gdev->dev), rc);
4553 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4554 goto out_offline;
4555 }
4556 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4557 if (ddev_offline)
4558 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4559 kfree(prcd);
4560
4561 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4562 if (rc)
4563 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4564
0da9581d
EL		 4565 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4566 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4567 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4568 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4569 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4570 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4571 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4572 dev_info(&card->gdev->dev,
4573 "Completion Queueing supported\n");
4574 } else {
4575 card->options.cq = QETH_CQ_NOTAVAILABLE;
4576 }
4577
4578
d0ff1f52
UB		 4579out_offline:
4580 if (ddev_offline == 1)
4581 ccw_device_set_offline(ddev);
4582out:
4583 return;
4584}
4585
0da9581d
EL		 4586static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4587 struct qdio_buffer **in_sbal_ptrs,
4588 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4589 int i;
4590
4591 if (card->options.cq == QETH_CQ_ENABLED) {
4592 int offset = QDIO_MAX_BUFFERS_PER_Q *
4593 (card->qdio.no_in_queues - 1);
4594 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4595 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4596 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4597 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4598 }
4599
4600 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4601 }
4602}
4603
4a71df50
FB		 4604static int qeth_qdio_establish(struct qeth_card *card)
4605{
4606 struct qdio_initialize init_data;
4607 char *qib_param_field;
4608 struct qdio_buffer **in_sbal_ptrs;
104ea556 4609 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4610 struct qdio_buffer **out_sbal_ptrs;
4611 int i, j, k;
4612 int rc = 0;
4613
d11ba0c4 4614 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4615
4616 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4617 GFP_KERNEL);
104ea556 4618 if (!qib_param_field) {
4619 rc = -ENOMEM;
4620 goto out_free_nothing;
4621 }
4a71df50
FB		 4622
4623 qeth_create_qib_param_field(card, qib_param_field);
4624 qeth_create_qib_param_field_blkt(card, qib_param_field);
4625
b3332930 4626 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4627 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4628 GFP_KERNEL);
4629 if (!in_sbal_ptrs) {
104ea556 4630 rc = -ENOMEM;
4631 goto out_free_qib_param;
4a71df50 4632 }
0da9581d 4633 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4634 in_sbal_ptrs[i] = (struct qdio_buffer *)
4635 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4636 }
4a71df50 4637
0da9581d
EL		 4638 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4639 GFP_KERNEL);
104ea556 4640 if (!queue_start_poll) {
4641 rc = -ENOMEM;
4642 goto out_free_in_sbals;
4643 }
0da9581d 4644 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4645 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4646
4647 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4648
4a71df50 4649 out_sbal_ptrs =
b3332930 4650 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4651 sizeof(void *), GFP_KERNEL);
4652 if (!out_sbal_ptrs) {
104ea556 4653 rc = -ENOMEM;
4654 goto out_free_queue_start_poll;
4a71df50
FB		 4655 }
4656 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4657 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4658 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4659 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4660 }
4661
4662 memset(&init_data, 0, sizeof(struct qdio_initialize));
4663 init_data.cdev = CARD_DDEV(card);
4664 init_data.q_format = qeth_get_qdio_q_format(card);
4665 init_data.qib_param_field_format = 0;
4666 init_data.qib_param_field = qib_param_field;
0da9581d 4667 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4668 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4669 init_data.input_handler = card->discipline->input_handler;
4670 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4671 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4672 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4673 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4674 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4675 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff
JG		 4676 init_data.scan_threshold =
4677 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 4678
4679 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4680 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4681 rc = qdio_allocate(&init_data);
4682 if (rc) {
4683 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4684 goto out;
4685 }
4686 rc = qdio_establish(&init_data);
4687 if (rc) {
4a71df50 4688 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4689 qdio_free(CARD_DDEV(card));
4690 }
4a71df50 4691 }
0da9581d
EL		 4692
4693 switch (card->options.cq) {
4694 case QETH_CQ_ENABLED:
4695 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4696 break;
4697 case QETH_CQ_DISABLED:
4698 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4699 break;
4700 default:
4701 break;
4702 }
cc961d40 4703out:
4a71df50 4704 kfree(out_sbal_ptrs);
104ea556 4705out_free_queue_start_poll:
4706 kfree(queue_start_poll);
4707out_free_in_sbals:
4a71df50 4708 kfree(in_sbal_ptrs);
104ea556 4709out_free_qib_param:
4a71df50 4710 kfree(qib_param_field);
104ea556 4711out_free_nothing:
4a71df50
FB		 4712 return rc;
4713}
4714
4715static void qeth_core_free_card(struct qeth_card *card)
4716{
4717
d11ba0c4
PT		 4718 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4719 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4720 qeth_clean_channel(&card->read);
4721 qeth_clean_channel(&card->write);
4722 if (card->dev)
4723 free_netdev(card->dev);
4724 kfree(card->ip_tbd_list);
4725 qeth_free_qdio_buffers(card);
6bcac508 4726 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4727 kfree(card);
4728}
4729
395672e0
SR		 4730void qeth_trace_features(struct qeth_card *card)
4731{
4732 QETH_CARD_TEXT(card, 2, "features");
4733 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
4734 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
4735 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
4736 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
4737 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
4738 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
4739 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
4740}
4741EXPORT_SYMBOL_GPL(qeth_trace_features);
4742
4a71df50 4743static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4744 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4745 .driver_info = QETH_CARD_TYPE_OSD},
4746 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4747 .driver_info = QETH_CARD_TYPE_IQD},
4748 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4749 .driver_info = QETH_CARD_TYPE_OSN},
4750 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4751 .driver_info = QETH_CARD_TYPE_OSM},
4752 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4753 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4754 {},
4755};
4756MODULE_DEVICE_TABLE(ccw, qeth_ids);
4757
4758static struct ccw_driver qeth_ccw_driver = {
3bda058b 4759 .driver = {
3e70b3b8 4760 .owner = THIS_MODULE,
3bda058b
SO		 4761 .name = "qeth",
4762 },
4a71df50
FB		 4763 .ids = qeth_ids,
4764 .probe = ccwgroup_probe_ccwdev,
4765 .remove = ccwgroup_remove_ccwdev,
4766};
4767
4a71df50
FB		 4768int qeth_core_hardsetup_card(struct qeth_card *card)
4769{
aa909224 4770 int retries = 0;
4a71df50
FB		 4771 int rc;
4772
d11ba0c4 4773 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4774 atomic_set(&card->force_alloc_skb, 0);
725b9c04 4775 qeth_update_from_chp_desc(card);
4a71df50 4776retry:
aa909224 4777 if (retries)
74eacdb9
FB		 4778 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4779 dev_name(&card->gdev->dev));
aa909224
UB		 4780 ccw_device_set_offline(CARD_DDEV(card));
4781 ccw_device_set_offline(CARD_WDEV(card));
4782 ccw_device_set_offline(CARD_RDEV(card));
4783 rc = ccw_device_set_online(CARD_RDEV(card));
4784 if (rc)
4785 goto retriable;
4786 rc = ccw_device_set_online(CARD_WDEV(card));
4787 if (rc)
4788 goto retriable;
4789 rc = ccw_device_set_online(CARD_DDEV(card));
4790 if (rc)
4791 goto retriable;
4a71df50 4792 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4793retriable:
4a71df50 4794 if (rc == -ERESTARTSYS) {
d11ba0c4 4795 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4796 return rc;
4797 } else if (rc) {
d11ba0c4 4798 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 4799 if (++retries > 3)
4a71df50
FB		 4800 goto out;
4801 else
4802 goto retry;
4803 }
d0ff1f52 4804 qeth_determine_capabilities(card);
4a71df50
FB		 4805 qeth_init_tokens(card);
4806 qeth_init_func_level(card);
4807 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4808 if (rc == -ERESTARTSYS) {
d11ba0c4 4809 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4810 return rc;
4811 } else if (rc) {
d11ba0c4 4812 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4813 if (--retries < 0)
4814 goto out;
4815 else
4816 goto retry;
4817 }
4818 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4819 if (rc == -ERESTARTSYS) {
d11ba0c4 4820 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4821 return rc;
4822 } else if (rc) {
d11ba0c4 4823 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4824 if (--retries < 0)
4825 goto out;
4826 else
4827 goto retry;
4828 }
908abbb5 4829 card->read_or_write_problem = 0;
4a71df50
FB		 4830 rc = qeth_mpc_initialize(card);
4831 if (rc) {
d11ba0c4 4832 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4833 goto out;
4834 }
1da74b1c
FB		 4835
4836 card->options.ipa4.supported_funcs = 0;
4837 card->options.adp.supported_funcs = 0;
4838 card->info.diagass_support = 0;
4839 qeth_query_ipassists(card, QETH_PROT_IPV4);
4840 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4841 qeth_query_setadapterparms(card);
4842 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4843 qeth_query_setdiagass(card);
4a71df50
FB		 4844 return 0;
4845out:
74eacdb9
FB		 4846 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4847 "an error on the device\n");
4848 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4849 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4850 return rc;
4851}
4852EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4853
b3332930
FB		 4854static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4855 struct qdio_buffer_element *element,
4a71df50
FB		 4856 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4857{
4858 struct page *page = virt_to_page(element->addr);
4859 if (*pskb == NULL) {
b3332930
FB		 4860 if (qethbuffer->rx_skb) {
4861 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4862 *pskb = qethbuffer->rx_skb;
4863 qethbuffer->rx_skb = NULL;
4864 } else {
4865 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4866 if (!(*pskb))
4867 return -ENOMEM;
4868 }
4869
4a71df50 4870 skb_reserve(*pskb, ETH_HLEN);
b3332930 4871 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 4872 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4873 data_len);
4874 } else {
4875 get_page(page);
b3332930
FB		 4876 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4877 element->addr + offset, QETH_RX_PULL_LEN);
4878 skb_fill_page_desc(*pskb, *pfrag, page,
4879 offset + QETH_RX_PULL_LEN,
4880 data_len - QETH_RX_PULL_LEN);
4881 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4882 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4883 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 4884 (*pfrag)++;
4885 }
4886 } else {
4887 get_page(page);
4888 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4889 (*pskb)->data_len += data_len;
4890 (*pskb)->len += data_len;
4891 (*pskb)->truesize += data_len;
4892 (*pfrag)++;
4893 }
0da9581d
EL		 4894
4895
4a71df50
FB		 4896 return 0;
4897}
4898
4899struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 4900 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 4901 struct qdio_buffer_element **__element, int *__offset,
4902 struct qeth_hdr **hdr)
4903{
4904 struct qdio_buffer_element *element = *__element;
b3332930 4905 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 4906 int offset = *__offset;
4907 struct sk_buff *skb = NULL;
76b11f8e 4908 int skb_len = 0;
4a71df50
FB		 4909 void *data_ptr;
4910 int data_len;
4911 int headroom = 0;
4912 int use_rx_sg = 0;
4913 int frag = 0;
4914
4a71df50
FB		 4915 /* qeth_hdr must not cross element boundaries */
4916 if (element->length < offset + sizeof(struct qeth_hdr)) {
4917 if (qeth_is_last_sbale(element))
4918 return NULL;
4919 element++;
4920 offset = 0;
4921 if (element->length < sizeof(struct qeth_hdr))
4922 return NULL;
4923 }
4924 *hdr = element->addr + offset;
4925
4926 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4927 switch ((*hdr)->hdr.l2.id) {
4928 case QETH_HEADER_TYPE_LAYER2:
4929 skb_len = (*hdr)->hdr.l2.pkt_length;
4930 break;
4931 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4932 skb_len = (*hdr)->hdr.l3.length;
1abd2296 4933 headroom = ETH_HLEN;
76b11f8e
UB		 4934 break;
4935 case QETH_HEADER_TYPE_OSN:
4936 skb_len = (*hdr)->hdr.osn.pdu_length;
4937 headroom = sizeof(struct qeth_hdr);
4938 break;
4939 default:
4940 break;
4a71df50
FB		 4941 }
4942
4943 if (!skb_len)
4944 return NULL;
4945
b3332930
FB		 4946 if (((skb_len >= card->options.rx_sg_cb) &&
4947 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4948 (!atomic_read(&card->force_alloc_skb))) ||
4949 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 4950 use_rx_sg = 1;
4951 } else {
4952 skb = dev_alloc_skb(skb_len + headroom);
4953 if (!skb)
4954 goto no_mem;
4955 if (headroom)
4956 skb_reserve(skb, headroom);
4957 }
4958
4959 data_ptr = element->addr + offset;
4960 while (skb_len) {
4961 data_len = min(skb_len, (int)(element->length - offset));
4962 if (data_len) {
4963 if (use_rx_sg) {
b3332930
FB		 4964 if (qeth_create_skb_frag(qethbuffer, element,
4965 &skb, offset, &frag, data_len))
4a71df50
FB		 4966 goto no_mem;
4967 } else {
4968 memcpy(skb_put(skb, data_len), data_ptr,
4969 data_len);
4970 }
4971 }
4972 skb_len -= data_len;
4973 if (skb_len) {
4974 if (qeth_is_last_sbale(element)) {
847a50fd 4975 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4976 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4977 dev_kfree_skb_any(skb);
4978 card->stats.rx_errors++;
4979 return NULL;
4980 }
4981 element++;
4982 offset = 0;
4983 data_ptr = element->addr;
4984 } else {
4985 offset += data_len;
4986 }
4987 }
4988 *__element = element;
4989 *__offset = offset;
4990 if (use_rx_sg && card->options.performance_stats) {
4991 card->perf_stats.sg_skbs_rx++;
4992 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4993 }
4994 return skb;
4995no_mem:
4996 if (net_ratelimit()) {
847a50fd 4997 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4998 }
4999 card->stats.rx_dropped++;
5000 return NULL;
5001}
5002EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5003
5004static void qeth_unregister_dbf_views(void)
5005{
d11ba0c4
PT		 5006 int x;
5007 for (x = 0; x < QETH_DBF_INFOS; x++) {
5008 debug_unregister(qeth_dbf[x].id);
5009 qeth_dbf[x].id = NULL;
5010 }
4a71df50
FB		 5011}
5012
8e96c51c 5013void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5014{
5015 char dbf_txt_buf[32];
345aa66e 5016 va_list args;
cd023216 5017
8e96c51c 5018 if (level > id->level)
cd023216 5019 return;
345aa66e
PT		 5020 va_start(args, fmt);
5021 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5022 va_end(args);
8e96c51c 5023 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5024}
5025EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5026
4a71df50
FB		 5027static int qeth_register_dbf_views(void)
5028{
d11ba0c4
PT		 5029 int ret;
5030 int x;
5031
5032 for (x = 0; x < QETH_DBF_INFOS; x++) {
5033 /* register the areas */
5034 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5035 qeth_dbf[x].pages,
5036 qeth_dbf[x].areas,
5037 qeth_dbf[x].len);
5038 if (qeth_dbf[x].id == NULL) {
5039 qeth_unregister_dbf_views();
5040 return -ENOMEM;
5041 }
4a71df50 5042
d11ba0c4
PT		 5043 /* register a view */
5044 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5045 if (ret) {
5046 qeth_unregister_dbf_views();
5047 return ret;
5048 }
4a71df50 5049
d11ba0c4
PT		 5050 /* set a passing level */
5051 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5052 }
4a71df50
FB		 5053
5054 return 0;
5055}
5056
5057int qeth_core_load_discipline(struct qeth_card *card,
5058 enum qeth_discipline_id discipline)
5059{
5060 int rc = 0;
2022e00c 5061 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5062 switch (discipline) {
5063 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5064 card->discipline = try_then_request_module(
5065 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5066 break;
5067 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5068 card->discipline = try_then_request_module(
5069 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50
FB		 5070 break;
5071 }
c041f2d4 5072 if (!card->discipline) {
74eacdb9
FB		 5073 dev_err(&card->gdev->dev, "There is no kernel module to "
5074 "support discipline %d\n", discipline);
4a71df50
FB		 5075 rc = -EINVAL;
5076 }
2022e00c 5077 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5078 return rc;
5079}
5080
5081void qeth_core_free_discipline(struct qeth_card *card)
5082{
5083 if (card->options.layer2)
c041f2d4 5084 symbol_put(qeth_l2_discipline);
4a71df50 5085 else
c041f2d4
SO		 5086 symbol_put(qeth_l3_discipline);
5087 card->discipline = NULL;
4a71df50
FB		 5088}
5089
b7169c51
SO		 5090static const struct device_type qeth_generic_devtype = {
5091 .name = "qeth_generic",
5092 .groups = qeth_generic_attr_groups,
5093};
5094static const struct device_type qeth_osn_devtype = {
5095 .name = "qeth_osn",
5096 .groups = qeth_osn_attr_groups,
5097};
5098
4a71df50
FB		 5099static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5100{
5101 struct qeth_card *card;
5102 struct device *dev;
5103 int rc;
5104 unsigned long flags;
af039068 5105 char dbf_name[20];
4a71df50 5106
d11ba0c4 5107 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5108
5109 dev = &gdev->dev;
5110 if (!get_device(dev))
5111 return -ENODEV;
5112
2a0217d5 5113 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5114
5115 card = qeth_alloc_card();
5116 if (!card) {
d11ba0c4 5117 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5118 rc = -ENOMEM;
5119 goto err_dev;
5120 }
af039068
CO		 5121
5122 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5123 dev_name(&gdev->dev));
5124 card->debug = debug_register(dbf_name, 2, 1, 8);
5125 if (!card->debug) {
5126 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5127 rc = -ENOMEM;
5128 goto err_card;
5129 }
5130 debug_register_view(card->debug, &debug_hex_ascii_view);
5131
4a71df50
FB		 5132 card->read.ccwdev = gdev->cdev[0];
5133 card->write.ccwdev = gdev->cdev[1];
5134 card->data.ccwdev = gdev->cdev[2];
5135 dev_set_drvdata(&gdev->dev, card);
5136 card->gdev = gdev;
5137 gdev->cdev[0]->handler = qeth_irq;
5138 gdev->cdev[1]->handler = qeth_irq;
5139 gdev->cdev[2]->handler = qeth_irq;
5140
5141 rc = qeth_determine_card_type(card);
5142 if (rc) {
d11ba0c4 5143 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 5144 goto err_dbf;
4a71df50
FB		 5145 }
5146 rc = qeth_setup_card(card);
5147 if (rc) {
d11ba0c4 5148 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 5149 goto err_dbf;
4a71df50
FB		 5150 }
5151
5113fec0 5152 if (card->info.type == QETH_CARD_TYPE_OSN)
b7169c51 5153 gdev->dev.type = &qeth_osn_devtype;
5113fec0 5154 else
b7169c51
SO		 5155 gdev->dev.type = &qeth_generic_devtype;
5156
5113fec0
UB		 5157 switch (card->info.type) {
5158 case QETH_CARD_TYPE_OSN:
5159 case QETH_CARD_TYPE_OSM:
4a71df50 5160 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0 5161 if (rc)
b7169c51 5162 goto err_dbf;
c041f2d4 5163 rc = card->discipline->setup(card->gdev);
4a71df50 5164 if (rc)
5113fec0
UB		 5165 goto err_disc;
5166 case QETH_CARD_TYPE_OSD:
5167 case QETH_CARD_TYPE_OSX:
5168 default:
5169 break;
4a71df50
FB		 5170 }
5171
5172 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5173 list_add_tail(&card->list, &qeth_core_card_list.list);
5174 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5175
5176 qeth_determine_capabilities(card);
4a71df50
FB		 5177 return 0;
5178
5113fec0
UB		 5179err_disc:
5180 qeth_core_free_discipline(card);
af039068
CO		 5181err_dbf:
5182 debug_unregister(card->debug);
4a71df50
FB		 5183err_card:
5184 qeth_core_free_card(card);
5185err_dev:
5186 put_device(dev);
5187 return rc;
5188}
5189
5190static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5191{
5192 unsigned long flags;
5193 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5194
28a7e4c9 5195 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5196
c041f2d4
SO		 5197 if (card->discipline) {
5198 card->discipline->remove(gdev);
9dc48ccc
UB		 5199 qeth_core_free_discipline(card);
5200 }
5201
af039068 5202 debug_unregister(card->debug);
4a71df50
FB		 5203 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5204 list_del(&card->list);
5205 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5206 qeth_core_free_card(card);
5207 dev_set_drvdata(&gdev->dev, NULL);
5208 put_device(&gdev->dev);
5209 return;
5210}
5211
5212static int qeth_core_set_online(struct ccwgroup_device *gdev)
5213{
5214 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5215 int rc = 0;
5216 int def_discipline;
5217
c041f2d4 5218 if (!card->discipline) {
4a71df50
FB		 5219 if (card->info.type == QETH_CARD_TYPE_IQD)
5220 def_discipline = QETH_DISCIPLINE_LAYER3;
5221 else
5222 def_discipline = QETH_DISCIPLINE_LAYER2;
5223 rc = qeth_core_load_discipline(card, def_discipline);
5224 if (rc)
5225 goto err;
c041f2d4 5226 rc = card->discipline->setup(card->gdev);
4a71df50
FB		 5227 if (rc)
5228 goto err;
5229 }
c041f2d4 5230 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5231err:
5232 return rc;
5233}
5234
5235static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5236{
5237 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5238 return card->discipline->set_offline(gdev);
4a71df50
FB		 5239}
5240
5241static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5242{
5243 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5244 if (card->discipline && card->discipline->shutdown)
5245 card->discipline->shutdown(gdev);
4a71df50
FB		 5246}
5247
bbcfcdc8
FB		 5248static int qeth_core_prepare(struct ccwgroup_device *gdev)
5249{
5250 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5251 if (card->discipline && card->discipline->prepare)
5252 return card->discipline->prepare(gdev);
bbcfcdc8
FB		 5253 return 0;
5254}
5255
5256static void qeth_core_complete(struct ccwgroup_device *gdev)
5257{
5258 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5259 if (card->discipline && card->discipline->complete)
5260 card->discipline->complete(gdev);
bbcfcdc8
FB		 5261}
5262
5263static int qeth_core_freeze(struct ccwgroup_device *gdev)
5264{
5265 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5266 if (card->discipline && card->discipline->freeze)
5267 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5268 return 0;
5269}
5270
5271static int qeth_core_thaw(struct ccwgroup_device *gdev)
5272{
5273 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5274 if (card->discipline && card->discipline->thaw)
5275 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5276 return 0;
5277}
5278
5279static int qeth_core_restore(struct ccwgroup_device *gdev)
5280{
5281 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5282 if (card->discipline && card->discipline->restore)
5283 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5284 return 0;
5285}
5286
4a71df50 5287static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5288 .driver = {
5289 .owner = THIS_MODULE,
5290 .name = "qeth",
5291 },
b7169c51 5292 .setup = qeth_core_probe_device,
4a71df50
FB		 5293 .remove = qeth_core_remove_device,
5294 .set_online = qeth_core_set_online,
5295 .set_offline = qeth_core_set_offline,
5296 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5297 .prepare = qeth_core_prepare,
5298 .complete = qeth_core_complete,
5299 .freeze = qeth_core_freeze,
5300 .thaw = qeth_core_thaw,
5301 .restore = qeth_core_restore,
4a71df50
FB		 5302};
5303
b7169c51
SO		 5304static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5305 const char *buf, size_t count)
4a71df50
FB		 5306{
5307 int err;
4a71df50 5308
b7169c51 5309 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5310 &qeth_core_ccwgroup_driver, 3, buf);
5311
5312 return err ? err : count;
5313}
4a71df50
FB		 5314static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5315
f47e2256
SO		 5316static struct attribute *qeth_drv_attrs[] = {
5317 &driver_attr_group.attr,
5318 NULL,
5319};
5320static struct attribute_group qeth_drv_attr_group = {
5321 .attrs = qeth_drv_attrs,
5322};
5323static const struct attribute_group *qeth_drv_attr_groups[] = {
5324 &qeth_drv_attr_group,
5325 NULL,
5326};
5327
4a71df50
FB		 5328static struct {
5329 const char str[ETH_GSTRING_LEN];
5330} qeth_ethtool_stats_keys[] = {
5331/* 0 */{"rx skbs"},
5332 {"rx buffers"},
5333 {"tx skbs"},
5334 {"tx buffers"},
5335 {"tx skbs no packing"},
5336 {"tx buffers no packing"},
5337 {"tx skbs packing"},
5338 {"tx buffers packing"},
5339 {"tx sg skbs"},
5340 {"tx sg frags"},
5341/* 10 */{"rx sg skbs"},
5342 {"rx sg frags"},
5343 {"rx sg page allocs"},
5344 {"tx large kbytes"},
5345 {"tx large count"},
5346 {"tx pk state ch n->p"},
5347 {"tx pk state ch p->n"},
5348 {"tx pk watermark low"},
5349 {"tx pk watermark high"},
5350 {"queue 0 buffer usage"},
5351/* 20 */{"queue 1 buffer usage"},
5352 {"queue 2 buffer usage"},
5353 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5354 {"rx poll time"},
5355 {"rx poll count"},
4a71df50
FB		 5356 {"rx do_QDIO time"},
5357 {"rx do_QDIO count"},
5358 {"tx handler time"},
5359 {"tx handler count"},
5360 {"tx time"},
5361/* 30 */{"tx count"},
5362 {"tx do_QDIO time"},
5363 {"tx do_QDIO count"},
f61a0d05 5364 {"tx csum"},
c3b4a740 5365 {"tx lin"},
0da9581d
EL		 5366 {"cq handler count"},
5367 {"cq handler time"}
4a71df50
FB		 5368};
5369
df8b4ec8 5370int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5371{
df8b4ec8
BH		 5372 switch (stringset) {
5373 case ETH_SS_STATS:
5374 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5375 default:
5376 return -EINVAL;
5377 }
4a71df50 5378}
df8b4ec8 5379EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5380
5381void qeth_core_get_ethtool_stats(struct net_device *dev,
5382 struct ethtool_stats *stats, u64 *data)
5383{
509e2562 5384 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5385 data[0] = card->stats.rx_packets -
5386 card->perf_stats.initial_rx_packets;
5387 data[1] = card->perf_stats.bufs_rec;
5388 data[2] = card->stats.tx_packets -
5389 card->perf_stats.initial_tx_packets;
5390 data[3] = card->perf_stats.bufs_sent;
5391 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5392 - card->perf_stats.skbs_sent_pack;
5393 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5394 data[6] = card->perf_stats.skbs_sent_pack;
5395 data[7] = card->perf_stats.bufs_sent_pack;
5396 data[8] = card->perf_stats.sg_skbs_sent;
5397 data[9] = card->perf_stats.sg_frags_sent;
5398 data[10] = card->perf_stats.sg_skbs_rx;
5399 data[11] = card->perf_stats.sg_frags_rx;
5400 data[12] = card->perf_stats.sg_alloc_page_rx;
5401 data[13] = (card->perf_stats.large_send_bytes >> 10);
5402 data[14] = card->perf_stats.large_send_cnt;
5403 data[15] = card->perf_stats.sc_dp_p;
5404 data[16] = card->perf_stats.sc_p_dp;
5405 data[17] = QETH_LOW_WATERMARK_PACK;
5406 data[18] = QETH_HIGH_WATERMARK_PACK;
5407 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5408 data[20] = (card->qdio.no_out_queues > 1) ?
5409 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5410 data[21] = (card->qdio.no_out_queues > 2) ?
5411 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5412 data[22] = (card->qdio.no_out_queues > 3) ?
5413 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5414 data[23] = card->perf_stats.inbound_time;
5415 data[24] = card->perf_stats.inbound_cnt;
5416 data[25] = card->perf_stats.inbound_do_qdio_time;
5417 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5418 data[27] = card->perf_stats.outbound_handler_time;
5419 data[28] = card->perf_stats.outbound_handler_cnt;
5420 data[29] = card->perf_stats.outbound_time;
5421 data[30] = card->perf_stats.outbound_cnt;
5422 data[31] = card->perf_stats.outbound_do_qdio_time;
5423 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5424 data[33] = card->perf_stats.tx_csum;
c3b4a740 5425 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5426 data[35] = card->perf_stats.cq_cnt;
5427 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5428}
5429EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5430
5431void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5432{
5433 switch (stringset) {
5434 case ETH_SS_STATS:
5435 memcpy(data, &qeth_ethtool_stats_keys,
5436 sizeof(qeth_ethtool_stats_keys));
5437 break;
5438 default:
5439 WARN_ON(1);
5440 break;
5441 }
5442}
5443EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5444
5445void qeth_core_get_drvinfo(struct net_device *dev,
5446 struct ethtool_drvinfo *info)
5447{
509e2562 5448 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5449 if (card->options.layer2)
5450 strcpy(info->driver, "qeth_l2");
5451 else
5452 strcpy(info->driver, "qeth_l3");
5453
5454 strcpy(info->version, "1.0");
5455 strcpy(info->fw_version, card->info.mcl_level);
5456 sprintf(info->bus_info, "%s/%s/%s",
5457 CARD_RDEV_ID(card),
5458 CARD_WDEV_ID(card),
5459 CARD_DDEV_ID(card));
5460}
5461EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5462
3f9975aa
FB		 5463int qeth_core_ethtool_get_settings(struct net_device *netdev,
5464 struct ethtool_cmd *ecmd)
5465{
509e2562 5466 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 5467 enum qeth_link_types link_type;
5468
5469 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5470 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5471 else
5472 link_type = card->info.link_type;
5473
5474 ecmd->transceiver = XCVR_INTERNAL;
5475 ecmd->supported = SUPPORTED_Autoneg;
5476 ecmd->advertising = ADVERTISED_Autoneg;
5477 ecmd->duplex = DUPLEX_FULL;
5478 ecmd->autoneg = AUTONEG_ENABLE;
5479
5480 switch (link_type) {
5481 case QETH_LINK_TYPE_FAST_ETH:
5482 case QETH_LINK_TYPE_LANE_ETH100:
5483 ecmd->supported |= SUPPORTED_10baseT_Half |
5484 SUPPORTED_10baseT_Full |
5485 SUPPORTED_100baseT_Half |
5486 SUPPORTED_100baseT_Full |
5487 SUPPORTED_TP;
5488 ecmd->advertising |= ADVERTISED_10baseT_Half |
5489 ADVERTISED_10baseT_Full |
5490 ADVERTISED_100baseT_Half |
5491 ADVERTISED_100baseT_Full |
5492 ADVERTISED_TP;
5493 ecmd->speed = SPEED_100;
5494 ecmd->port = PORT_TP;
5495 break;
5496
5497 case QETH_LINK_TYPE_GBIT_ETH:
5498 case QETH_LINK_TYPE_LANE_ETH1000:
5499 ecmd->supported |= SUPPORTED_10baseT_Half |
5500 SUPPORTED_10baseT_Full |
5501 SUPPORTED_100baseT_Half |
5502 SUPPORTED_100baseT_Full |
5503 SUPPORTED_1000baseT_Half |
5504 SUPPORTED_1000baseT_Full |
5505 SUPPORTED_FIBRE;
5506 ecmd->advertising |= ADVERTISED_10baseT_Half |
5507 ADVERTISED_10baseT_Full |
5508 ADVERTISED_100baseT_Half |
5509 ADVERTISED_100baseT_Full |
5510 ADVERTISED_1000baseT_Half |
5511 ADVERTISED_1000baseT_Full |
5512 ADVERTISED_FIBRE;
5513 ecmd->speed = SPEED_1000;
5514 ecmd->port = PORT_FIBRE;
5515 break;
5516
5517 case QETH_LINK_TYPE_10GBIT_ETH:
5518 ecmd->supported |= SUPPORTED_10baseT_Half |
5519 SUPPORTED_10baseT_Full |
5520 SUPPORTED_100baseT_Half |
5521 SUPPORTED_100baseT_Full |
5522 SUPPORTED_1000baseT_Half |
5523 SUPPORTED_1000baseT_Full |
5524 SUPPORTED_10000baseT_Full |
5525 SUPPORTED_FIBRE;
5526 ecmd->advertising |= ADVERTISED_10baseT_Half |
5527 ADVERTISED_10baseT_Full |
5528 ADVERTISED_100baseT_Half |
5529 ADVERTISED_100baseT_Full |
5530 ADVERTISED_1000baseT_Half |
5531 ADVERTISED_1000baseT_Full |
5532 ADVERTISED_10000baseT_Full |
5533 ADVERTISED_FIBRE;
5534 ecmd->speed = SPEED_10000;
5535 ecmd->port = PORT_FIBRE;
5536 break;
5537
5538 default:
5539 ecmd->supported |= SUPPORTED_10baseT_Half |
5540 SUPPORTED_10baseT_Full |
5541 SUPPORTED_TP;
5542 ecmd->advertising |= ADVERTISED_10baseT_Half |
5543 ADVERTISED_10baseT_Full |
5544 ADVERTISED_TP;
5545 ecmd->speed = SPEED_10;
5546 ecmd->port = PORT_TP;
5547 }
5548
5549 return 0;
5550}
5551EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5552
4a71df50
FB		 5553static int __init qeth_core_init(void)
5554{
5555 int rc;
5556
74eacdb9 5557 pr_info("loading core functions\n");
4a71df50
FB		 5558 INIT_LIST_HEAD(&qeth_core_card_list.list);
5559 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 5560 mutex_init(&qeth_mod_mutex);
4a71df50
FB		 5561
5562 rc = qeth_register_dbf_views();
5563 if (rc)
5564 goto out_err;
035da16f 5565 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 5566 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5567 if (rc)
5568 goto register_err;
683d718a
FB		 5569 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5570 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5571 if (!qeth_core_header_cache) {
5572 rc = -ENOMEM;
5573 goto slab_err;
5574 }
0da9581d
EL		 5575 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5576 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5577 if (!qeth_qdio_outbuf_cache) {
5578 rc = -ENOMEM;
5579 goto cqslab_err;
5580 }
afb6ac59
SO		 5581 rc = ccw_driver_register(&qeth_ccw_driver);
5582 if (rc)
5583 goto ccw_err;
5584 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
5585 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5586 if (rc)
5587 goto ccwgroup_err;
0da9581d 5588
683d718a 5589 return 0;
afb6ac59
SO		 5590
5591ccwgroup_err:
5592 ccw_driver_unregister(&qeth_ccw_driver);
5593ccw_err:
5594 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 5595cqslab_err:
5596 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5597slab_err:
035da16f 5598 root_device_unregister(qeth_core_root_dev);
4a71df50 5599register_err:
4a71df50
FB		 5600 qeth_unregister_dbf_views();
5601out_err:
74eacdb9 5602 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5603 return rc;
5604}
5605
5606static void __exit qeth_core_exit(void)
5607{
4a71df50
FB		 5608 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5609 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5610 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5611 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 5612 root_device_unregister(qeth_core_root_dev);
4a71df50 5613 qeth_unregister_dbf_views();
74eacdb9 5614 pr_info("core functions removed\n");
4a71df50
FB		 5615}
5616
5617module_init(qeth_core_init);
5618module_exit(qeth_core_exit);
5619MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5620MODULE_DESCRIPTION("qeth core functions");
5621MODULE_LICENSE("GPL");
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