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Merge branch 'tip/perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt...
[mirror_ubuntu-eoan-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
bbcfcdc8 4 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
4a71df50
FB		 20#include <linux/tcp.h>
21#include <linux/mii.h>
22#include <linux/kthread.h>
5a0e3ad6 23#include <linux/slab.h>
b3332930 24#include <net/iucv/af_iucv.h>
4a71df50 25
ab4227cb
MS		 26#include <asm/ebcdic.h>
27#include <asm/io.h>
1da74b1c 28#include <asm/sysinfo.h>
4a71df50
FB		 29
30#include "qeth_core.h"
4a71df50 31
d11ba0c4
PT		 32struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
d11ba0c4
PT		 37 [QETH_DBF_MSG] = {"qeth_msg",
38 8, 1, 128, 3, &debug_sprintf_view, NULL},
d11ba0c4
PT		 39 [QETH_DBF_CTRL] = {"qeth_control",
40 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
41};
42EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 43
44struct qeth_card_list_struct qeth_core_card_list;
45EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 46struct kmem_cache *qeth_core_header_cache;
47EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 48static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 49
50static struct device *qeth_core_root_dev;
5113fec0 51static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
4a71df50 52static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 53
54static void qeth_send_control_data_cb(struct qeth_channel *,
55 struct qeth_cmd_buffer *);
56static int qeth_issue_next_read(struct qeth_card *);
57static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
58static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
59static void qeth_free_buffer_pool(struct qeth_card *);
60static int qeth_qdio_establish(struct qeth_card *);
0da9581d 61static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 62static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
63 struct qeth_qdio_out_buffer *buf,
64 enum iucv_tx_notify notification);
65static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 66static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
67 struct qeth_qdio_out_buffer *buf,
68 enum qeth_qdio_buffer_states newbufstate);
4a71df50
FB		 69
70
4a71df50
FB		 71static inline const char *qeth_get_cardname(struct qeth_card *card)
72{
73 if (card->info.guestlan) {
74 switch (card->info.type) {
5113fec0 75 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 76 return " Guest LAN QDIO";
77 case QETH_CARD_TYPE_IQD:
78 return " Guest LAN Hiper";
5113fec0
UB		 79 case QETH_CARD_TYPE_OSM:
80 return " Guest LAN QDIO - OSM";
81 case QETH_CARD_TYPE_OSX:
82 return " Guest LAN QDIO - OSX";
4a71df50
FB		 83 default:
84 return " unknown";
85 }
86 } else {
87 switch (card->info.type) {
5113fec0 88 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 89 return " OSD Express";
90 case QETH_CARD_TYPE_IQD:
91 return " HiperSockets";
92 case QETH_CARD_TYPE_OSN:
93 return " OSN QDIO";
5113fec0
UB		 94 case QETH_CARD_TYPE_OSM:
95 return " OSM QDIO";
96 case QETH_CARD_TYPE_OSX:
97 return " OSX QDIO";
4a71df50
FB		 98 default:
99 return " unknown";
100 }
101 }
102 return " n/a";
103}
104
105/* max length to be returned: 14 */
106const char *qeth_get_cardname_short(struct qeth_card *card)
107{
108 if (card->info.guestlan) {
109 switch (card->info.type) {
5113fec0 110 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 111 return "GuestLAN QDIO";
112 case QETH_CARD_TYPE_IQD:
113 return "GuestLAN Hiper";
5113fec0
UB		 114 case QETH_CARD_TYPE_OSM:
115 return "GuestLAN OSM";
116 case QETH_CARD_TYPE_OSX:
117 return "GuestLAN OSX";
4a71df50
FB		 118 default:
119 return "unknown";
120 }
121 } else {
122 switch (card->info.type) {
5113fec0 123 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 124 switch (card->info.link_type) {
125 case QETH_LINK_TYPE_FAST_ETH:
126 return "OSD_100";
127 case QETH_LINK_TYPE_HSTR:
128 return "HSTR";
129 case QETH_LINK_TYPE_GBIT_ETH:
130 return "OSD_1000";
131 case QETH_LINK_TYPE_10GBIT_ETH:
132 return "OSD_10GIG";
133 case QETH_LINK_TYPE_LANE_ETH100:
134 return "OSD_FE_LANE";
135 case QETH_LINK_TYPE_LANE_TR:
136 return "OSD_TR_LANE";
137 case QETH_LINK_TYPE_LANE_ETH1000:
138 return "OSD_GbE_LANE";
139 case QETH_LINK_TYPE_LANE:
140 return "OSD_ATM_LANE";
141 default:
142 return "OSD_Express";
143 }
144 case QETH_CARD_TYPE_IQD:
145 return "HiperSockets";
146 case QETH_CARD_TYPE_OSN:
147 return "OSN";
5113fec0
UB		 148 case QETH_CARD_TYPE_OSM:
149 return "OSM_1000";
150 case QETH_CARD_TYPE_OSX:
151 return "OSX_10GIG";
4a71df50
FB		 152 default:
153 return "unknown";
154 }
155 }
156 return "n/a";
157}
158
159void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
160 int clear_start_mask)
161{
162 unsigned long flags;
163
164 spin_lock_irqsave(&card->thread_mask_lock, flags);
165 card->thread_allowed_mask = threads;
166 if (clear_start_mask)
167 card->thread_start_mask &= threads;
168 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
169 wake_up(&card->wait_q);
170}
171EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
172
173int qeth_threads_running(struct qeth_card *card, unsigned long threads)
174{
175 unsigned long flags;
176 int rc = 0;
177
178 spin_lock_irqsave(&card->thread_mask_lock, flags);
179 rc = (card->thread_running_mask & threads);
180 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
181 return rc;
182}
183EXPORT_SYMBOL_GPL(qeth_threads_running);
184
185int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
186{
187 return wait_event_interruptible(card->wait_q,
188 qeth_threads_running(card, threads) == 0);
189}
190EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
191
192void qeth_clear_working_pool_list(struct qeth_card *card)
193{
194 struct qeth_buffer_pool_entry *pool_entry, *tmp;
195
847a50fd 196 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 197 list_for_each_entry_safe(pool_entry, tmp,
198 &card->qdio.in_buf_pool.entry_list, list){
199 list_del(&pool_entry->list);
200 }
201}
202EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
203
204static int qeth_alloc_buffer_pool(struct qeth_card *card)
205{
206 struct qeth_buffer_pool_entry *pool_entry;
207 void *ptr;
208 int i, j;
209
847a50fd 210 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 211 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 212 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 213 if (!pool_entry) {
214 qeth_free_buffer_pool(card);
215 return -ENOMEM;
216 }
217 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 218 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 219 if (!ptr) {
220 while (j > 0)
221 free_page((unsigned long)
222 pool_entry->elements[--j]);
223 kfree(pool_entry);
224 qeth_free_buffer_pool(card);
225 return -ENOMEM;
226 }
227 pool_entry->elements[j] = ptr;
228 }
229 list_add(&pool_entry->init_list,
230 &card->qdio.init_pool.entry_list);
231 }
232 return 0;
233}
234
235int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
236{
847a50fd 237 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 238
239 if ((card->state != CARD_STATE_DOWN) &&
240 (card->state != CARD_STATE_RECOVER))
241 return -EPERM;
242
243 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
244 qeth_clear_working_pool_list(card);
245 qeth_free_buffer_pool(card);
246 card->qdio.in_buf_pool.buf_count = bufcnt;
247 card->qdio.init_pool.buf_count = bufcnt;
248 return qeth_alloc_buffer_pool(card);
249}
76b11f8e 250EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 251
0da9581d
EL		 252static inline int qeth_cq_init(struct qeth_card *card)
253{
254 int rc;
255
256 if (card->options.cq == QETH_CQ_ENABLED) {
257 QETH_DBF_TEXT(SETUP, 2, "cqinit");
258 memset(card->qdio.c_q->qdio_bufs, 0,
259 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
260 card->qdio.c_q->next_buf_to_init = 127;
261 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
262 card->qdio.no_in_queues - 1, 0,
263 127);
264 if (rc) {
265 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
266 goto out;
267 }
268 }
269 rc = 0;
270out:
271 return rc;
272}
273
274static inline int qeth_alloc_cq(struct qeth_card *card)
275{
276 int rc;
277
278 if (card->options.cq == QETH_CQ_ENABLED) {
279 int i;
280 struct qdio_outbuf_state *outbuf_states;
281
282 QETH_DBF_TEXT(SETUP, 2, "cqon");
283 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q),
284 GFP_KERNEL);
285 if (!card->qdio.c_q) {
286 rc = -1;
287 goto kmsg_out;
288 }
289 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *));
290
291 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
292 card->qdio.c_q->bufs[i].buffer =
293 &card->qdio.c_q->qdio_bufs[i];
294 }
295
296 card->qdio.no_in_queues = 2;
297
298 card->qdio.out_bufstates = (struct qdio_outbuf_state *)
299 kzalloc(card->qdio.no_out_queues *
300 QDIO_MAX_BUFFERS_PER_Q *
301 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
302 outbuf_states = card->qdio.out_bufstates;
303 if (outbuf_states == NULL) {
304 rc = -1;
305 goto free_cq_out;
306 }
307 for (i = 0; i < card->qdio.no_out_queues; ++i) {
308 card->qdio.out_qs[i]->bufstates = outbuf_states;
309 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
310 }
311 } else {
312 QETH_DBF_TEXT(SETUP, 2, "nocq");
313 card->qdio.c_q = NULL;
314 card->qdio.no_in_queues = 1;
315 }
316 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
317 rc = 0;
318out:
319 return rc;
320free_cq_out:
321 kfree(card->qdio.c_q);
322 card->qdio.c_q = NULL;
323kmsg_out:
324 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
325 goto out;
326}
327
328static inline void qeth_free_cq(struct qeth_card *card)
329{
330 if (card->qdio.c_q) {
331 --card->qdio.no_in_queues;
332 kfree(card->qdio.c_q);
333 card->qdio.c_q = NULL;
334 }
335 kfree(card->qdio.out_bufstates);
336 card->qdio.out_bufstates = NULL;
337}
338
b3332930
FB		 339static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
340 int delayed) {
341 enum iucv_tx_notify n;
342
343 switch (sbalf15) {
344 case 0:
345 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
346 break;
347 case 4:
348 case 16:
349 case 17:
350 case 18:
351 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
352 TX_NOTIFY_UNREACHABLE;
353 break;
354 default:
355 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
356 TX_NOTIFY_GENERALERROR;
357 break;
358 }
359
360 return n;
361}
362
0da9581d
EL		 363static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
364 int bidx, int forced_cleanup)
365{
366 if (q->bufs[bidx]->next_pending != NULL) {
367 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
368 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
369
370 while (c) {
371 if (forced_cleanup ||
372 atomic_read(&c->state) ==
373 QETH_QDIO_BUF_HANDLED_DELAYED) {
374 struct qeth_qdio_out_buffer *f = c;
375 QETH_CARD_TEXT(f->q->card, 5, "fp");
376 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 377 /* release here to avoid interleaving between
378 outbound tasklet and inbound tasklet
379 regarding notifications and lifecycle */
380 qeth_release_skbs(c);
381
0da9581d
EL		 382 c = f->next_pending;
383 BUG_ON(head->next_pending != f);
384 head->next_pending = c;
385 kmem_cache_free(qeth_qdio_outbuf_cache, f);
386 } else {
387 head = c;
388 c = c->next_pending;
389 }
390
391 }
392 }
393}
394
395
396static inline void qeth_qdio_handle_aob(struct qeth_card *card,
397 unsigned long phys_aob_addr) {
398 struct qaob *aob;
399 struct qeth_qdio_out_buffer *buffer;
b3332930 400 enum iucv_tx_notify notification;
0da9581d
EL		 401
402 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
403 QETH_CARD_TEXT(card, 5, "haob");
404 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
405 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
406 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
407
408 BUG_ON(buffer == NULL);
409
b3332930
FB		 410 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
411 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
412 notification = TX_NOTIFY_OK;
413 } else {
414 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING);
415
416 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
417 notification = TX_NOTIFY_DELAYED_OK;
418 }
419
420 if (aob->aorc != 0) {
421 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
422 notification = qeth_compute_cq_notification(aob->aorc, 1);
423 }
424 qeth_notify_skbs(buffer->q, buffer, notification);
425
0da9581d
EL		 426 buffer->aob = NULL;
427 qeth_clear_output_buffer(buffer->q, buffer,
428 QETH_QDIO_BUF_HANDLED_DELAYED);
429 /* from here on: do not touch buffer anymore */
430 qdio_release_aob(aob);
431}
432
433static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
434{
435 return card->options.cq == QETH_CQ_ENABLED &&
436 card->qdio.c_q != NULL &&
437 queue != 0 &&
438 queue == card->qdio.no_in_queues - 1;
439}
440
441
4a71df50
FB		 442static int qeth_issue_next_read(struct qeth_card *card)
443{
444 int rc;
445 struct qeth_cmd_buffer *iob;
446
847a50fd 447 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 448 if (card->read.state != CH_STATE_UP)
449 return -EIO;
450 iob = qeth_get_buffer(&card->read);
451 if (!iob) {
74eacdb9
FB		 452 dev_warn(&card->gdev->dev, "The qeth device driver "
453 "failed to recover an error on the device\n");
454 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
455 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 456 return -ENOMEM;
457 }
458 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 459 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 460 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
461 (addr_t) iob, 0, 0);
462 if (rc) {
74eacdb9
FB		 463 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
464 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 465 atomic_set(&card->read.irq_pending, 0);
908abbb5 466 card->read_or_write_problem = 1;
4a71df50
FB		 467 qeth_schedule_recovery(card);
468 wake_up(&card->wait_q);
469 }
470 return rc;
471}
472
473static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
474{
475 struct qeth_reply *reply;
476
477 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
478 if (reply) {
479 atomic_set(&reply->refcnt, 1);
480 atomic_set(&reply->received, 0);
481 reply->card = card;
482 };
483 return reply;
484}
485
486static void qeth_get_reply(struct qeth_reply *reply)
487{
488 WARN_ON(atomic_read(&reply->refcnt) <= 0);
489 atomic_inc(&reply->refcnt);
490}
491
492static void qeth_put_reply(struct qeth_reply *reply)
493{
494 WARN_ON(atomic_read(&reply->refcnt) <= 0);
495 if (atomic_dec_and_test(&reply->refcnt))
496 kfree(reply);
497}
498
d11ba0c4 499static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 500 struct qeth_card *card)
501{
4a71df50 502 char *ipa_name;
d11ba0c4 503 int com = cmd->hdr.command;
4a71df50 504 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 505 if (rc)
70919e23
UB		 506 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
507 "x%X \"%s\"\n",
508 ipa_name, com, dev_name(&card->gdev->dev),
509 QETH_CARD_IFNAME(card), rc,
510 qeth_get_ipa_msg(rc));
d11ba0c4 511 else
70919e23
UB		 512 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
513 ipa_name, com, dev_name(&card->gdev->dev),
514 QETH_CARD_IFNAME(card));
4a71df50
FB		 515}
516
517static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
518 struct qeth_cmd_buffer *iob)
519{
520 struct qeth_ipa_cmd *cmd = NULL;
521
847a50fd 522 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 523 if (IS_IPA(iob->data)) {
524 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
525 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 526 if (cmd->hdr.command != IPA_CMD_SETCCID &&
527 cmd->hdr.command != IPA_CMD_DELCCID &&
528 cmd->hdr.command != IPA_CMD_MODCCID &&
529 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 530 qeth_issue_ipa_msg(cmd,
531 cmd->hdr.return_code, card);
4a71df50
FB		 532 return cmd;
533 } else {
534 switch (cmd->hdr.command) {
535 case IPA_CMD_STOPLAN:
74eacdb9
FB		 536 dev_warn(&card->gdev->dev,
537 "The link for interface %s on CHPID"
538 " 0x%X failed\n",
4a71df50
FB		 539 QETH_CARD_IFNAME(card),
540 card->info.chpid);
541 card->lan_online = 0;
542 if (card->dev && netif_carrier_ok(card->dev))
543 netif_carrier_off(card->dev);
544 return NULL;
545 case IPA_CMD_STARTLAN:
74eacdb9
FB		 546 dev_info(&card->gdev->dev,
547 "The link for %s on CHPID 0x%X has"
548 " been restored\n",
4a71df50
FB		 549 QETH_CARD_IFNAME(card),
550 card->info.chpid);
551 netif_carrier_on(card->dev);
922dc062 552 card->lan_online = 1;
1da74b1c
FB		 553 if (card->info.hwtrap)
554 card->info.hwtrap = 2;
4a71df50
FB		 555 qeth_schedule_recovery(card);
556 return NULL;
557 case IPA_CMD_MODCCID:
558 return cmd;
559 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 560 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 561 break;
562 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 563 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 564 break;
565 default:
c4cef07c 566 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 567 "but not a reply!\n");
568 break;
569 }
570 }
571 }
572 return cmd;
573}
574
575void qeth_clear_ipacmd_list(struct qeth_card *card)
576{
577 struct qeth_reply *reply, *r;
578 unsigned long flags;
579
847a50fd 580 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 581
582 spin_lock_irqsave(&card->lock, flags);
583 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
584 qeth_get_reply(reply);
585 reply->rc = -EIO;
586 atomic_inc(&reply->received);
587 list_del_init(&reply->list);
588 wake_up(&reply->wait_q);
589 qeth_put_reply(reply);
590 }
591 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 592 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 593}
594EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
595
5113fec0
UB		 596static int qeth_check_idx_response(struct qeth_card *card,
597 unsigned char *buffer)
4a71df50
FB		 598{
599 if (!buffer)
600 return 0;
601
d11ba0c4 602 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 603 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 604 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 605 "with cause code 0x%02x%s\n",
606 buffer[4],
607 ((buffer[4] == 0x22) ?
608 " -- try another portname" : ""));
847a50fd
CO		 609 QETH_CARD_TEXT(card, 2, "ckidxres");
610 QETH_CARD_TEXT(card, 2, " idxterm");
611 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 612 if (buffer[4] == 0xf6) {
613 dev_err(&card->gdev->dev,
614 "The qeth device is not configured "
615 "for the OSI layer required by z/VM\n");
616 return -EPERM;
617 }
4a71df50
FB		 618 return -EIO;
619 }
620 return 0;
621}
622
623static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
624 __u32 len)
625{
626 struct qeth_card *card;
627
4a71df50 628 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 629 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 630 if (channel == &card->read)
631 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
632 else
633 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
634 channel->ccw.count = len;
635 channel->ccw.cda = (__u32) __pa(iob);
636}
637
638static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
639{
640 __u8 index;
641
847a50fd 642 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 643 index = channel->io_buf_no;
644 do {
645 if (channel->iob[index].state == BUF_STATE_FREE) {
646 channel->iob[index].state = BUF_STATE_LOCKED;
647 channel->io_buf_no = (channel->io_buf_no + 1) %
648 QETH_CMD_BUFFER_NO;
649 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
650 return channel->iob + index;
651 }
652 index = (index + 1) % QETH_CMD_BUFFER_NO;
653 } while (index != channel->io_buf_no);
654
655 return NULL;
656}
657
658void qeth_release_buffer(struct qeth_channel *channel,
659 struct qeth_cmd_buffer *iob)
660{
661 unsigned long flags;
662
847a50fd 663 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 664 spin_lock_irqsave(&channel->iob_lock, flags);
665 memset(iob->data, 0, QETH_BUFSIZE);
666 iob->state = BUF_STATE_FREE;
667 iob->callback = qeth_send_control_data_cb;
668 iob->rc = 0;
669 spin_unlock_irqrestore(&channel->iob_lock, flags);
670}
671EXPORT_SYMBOL_GPL(qeth_release_buffer);
672
673static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
674{
675 struct qeth_cmd_buffer *buffer = NULL;
676 unsigned long flags;
677
678 spin_lock_irqsave(&channel->iob_lock, flags);
679 buffer = __qeth_get_buffer(channel);
680 spin_unlock_irqrestore(&channel->iob_lock, flags);
681 return buffer;
682}
683
684struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
685{
686 struct qeth_cmd_buffer *buffer;
687 wait_event(channel->wait_q,
688 ((buffer = qeth_get_buffer(channel)) != NULL));
689 return buffer;
690}
691EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
692
693void qeth_clear_cmd_buffers(struct qeth_channel *channel)
694{
695 int cnt;
696
697 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
698 qeth_release_buffer(channel, &channel->iob[cnt]);
699 channel->buf_no = 0;
700 channel->io_buf_no = 0;
701}
702EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
703
704static void qeth_send_control_data_cb(struct qeth_channel *channel,
705 struct qeth_cmd_buffer *iob)
706{
707 struct qeth_card *card;
708 struct qeth_reply *reply, *r;
709 struct qeth_ipa_cmd *cmd;
710 unsigned long flags;
711 int keep_reply;
5113fec0 712 int rc = 0;
4a71df50 713
4a71df50 714 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 715 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 716 rc = qeth_check_idx_response(card, iob->data);
717 switch (rc) {
718 case 0:
719 break;
720 case -EIO:
4a71df50 721 qeth_clear_ipacmd_list(card);
5113fec0 722 qeth_schedule_recovery(card);
01fc3e86 723 /* fall through */
5113fec0 724 default:
4a71df50
FB		 725 goto out;
726 }
727
728 cmd = qeth_check_ipa_data(card, iob);
729 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
730 goto out;
731 /*in case of OSN : check if cmd is set */
732 if (card->info.type == QETH_CARD_TYPE_OSN &&
733 cmd &&
734 cmd->hdr.command != IPA_CMD_STARTLAN &&
735 card->osn_info.assist_cb != NULL) {
736 card->osn_info.assist_cb(card->dev, cmd);
737 goto out;
738 }
739
740 spin_lock_irqsave(&card->lock, flags);
741 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
742 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
743 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
744 qeth_get_reply(reply);
745 list_del_init(&reply->list);
746 spin_unlock_irqrestore(&card->lock, flags);
747 keep_reply = 0;
748 if (reply->callback != NULL) {
749 if (cmd) {
750 reply->offset = (__u16)((char *)cmd -
751 (char *)iob->data);
752 keep_reply = reply->callback(card,
753 reply,
754 (unsigned long)cmd);
755 } else
756 keep_reply = reply->callback(card,
757 reply,
758 (unsigned long)iob);
759 }
760 if (cmd)
761 reply->rc = (u16) cmd->hdr.return_code;
762 else if (iob->rc)
763 reply->rc = iob->rc;
764 if (keep_reply) {
765 spin_lock_irqsave(&card->lock, flags);
766 list_add_tail(&reply->list,
767 &card->cmd_waiter_list);
768 spin_unlock_irqrestore(&card->lock, flags);
769 } else {
770 atomic_inc(&reply->received);
771 wake_up(&reply->wait_q);
772 }
773 qeth_put_reply(reply);
774 goto out;
775 }
776 }
777 spin_unlock_irqrestore(&card->lock, flags);
778out:
779 memcpy(&card->seqno.pdu_hdr_ack,
780 QETH_PDU_HEADER_SEQ_NO(iob->data),
781 QETH_SEQ_NO_LENGTH);
782 qeth_release_buffer(channel, iob);
783}
784
785static int qeth_setup_channel(struct qeth_channel *channel)
786{
787 int cnt;
788
d11ba0c4 789 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 790 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 791 channel->iob[cnt].data =
b3332930 792 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 793 if (channel->iob[cnt].data == NULL)
794 break;
795 channel->iob[cnt].state = BUF_STATE_FREE;
796 channel->iob[cnt].channel = channel;
797 channel->iob[cnt].callback = qeth_send_control_data_cb;
798 channel->iob[cnt].rc = 0;
799 }
800 if (cnt < QETH_CMD_BUFFER_NO) {
801 while (cnt-- > 0)
802 kfree(channel->iob[cnt].data);
803 return -ENOMEM;
804 }
805 channel->buf_no = 0;
806 channel->io_buf_no = 0;
807 atomic_set(&channel->irq_pending, 0);
808 spin_lock_init(&channel->iob_lock);
809
810 init_waitqueue_head(&channel->wait_q);
811 return 0;
812}
813
814static int qeth_set_thread_start_bit(struct qeth_card *card,
815 unsigned long thread)
816{
817 unsigned long flags;
818
819 spin_lock_irqsave(&card->thread_mask_lock, flags);
820 if (!(card->thread_allowed_mask & thread) ||
821 (card->thread_start_mask & thread)) {
822 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
823 return -EPERM;
824 }
825 card->thread_start_mask |= thread;
826 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
827 return 0;
828}
829
830void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
831{
832 unsigned long flags;
833
834 spin_lock_irqsave(&card->thread_mask_lock, flags);
835 card->thread_start_mask &= ~thread;
836 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
837 wake_up(&card->wait_q);
838}
839EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
840
841void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
842{
843 unsigned long flags;
844
845 spin_lock_irqsave(&card->thread_mask_lock, flags);
846 card->thread_running_mask &= ~thread;
847 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
848 wake_up(&card->wait_q);
849}
850EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
851
852static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
853{
854 unsigned long flags;
855 int rc = 0;
856
857 spin_lock_irqsave(&card->thread_mask_lock, flags);
858 if (card->thread_start_mask & thread) {
859 if ((card->thread_allowed_mask & thread) &&
860 !(card->thread_running_mask & thread)) {
861 rc = 1;
862 card->thread_start_mask &= ~thread;
863 card->thread_running_mask |= thread;
864 } else
865 rc = -EPERM;
866 }
867 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
868 return rc;
869}
870
871int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
872{
873 int rc = 0;
874
875 wait_event(card->wait_q,
876 (rc = __qeth_do_run_thread(card, thread)) >= 0);
877 return rc;
878}
879EXPORT_SYMBOL_GPL(qeth_do_run_thread);
880
881void qeth_schedule_recovery(struct qeth_card *card)
882{
847a50fd 883 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 884 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
885 schedule_work(&card->kernel_thread_starter);
886}
887EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
888
889static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
890{
891 int dstat, cstat;
892 char *sense;
847a50fd 893 struct qeth_card *card;
4a71df50
FB		 894
895 sense = (char *) irb->ecw;
23d805b6
PO		 896 cstat = irb->scsw.cmd.cstat;
897 dstat = irb->scsw.cmd.dstat;
847a50fd 898 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 899
900 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
901 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
902 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 903 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 904 dev_warn(&cdev->dev, "The qeth device driver "
905 "failed to recover an error on the device\n");
5113fec0 906 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 907 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 908 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
909 16, 1, irb, 64, 1);
910 return 1;
911 }
912
913 if (dstat & DEV_STAT_UNIT_CHECK) {
914 if (sense[SENSE_RESETTING_EVENT_BYTE] &
915 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 916 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 917 return 1;
918 }
919 if (sense[SENSE_COMMAND_REJECT_BYTE] &
920 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 921 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 922 return 1;
4a71df50
FB		 923 }
924 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 925 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 926 return 1;
927 }
928 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 929 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 930 return 0;
931 }
847a50fd 932 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 933 return 1;
934 }
935 return 0;
936}
937
938static long __qeth_check_irb_error(struct ccw_device *cdev,
939 unsigned long intparm, struct irb *irb)
940{
847a50fd
CO		 941 struct qeth_card *card;
942
943 card = CARD_FROM_CDEV(cdev);
944
4a71df50
FB		 945 if (!IS_ERR(irb))
946 return 0;
947
948 switch (PTR_ERR(irb)) {
949 case -EIO:
74eacdb9
FB		 950 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
951 dev_name(&cdev->dev));
847a50fd
CO		 952 QETH_CARD_TEXT(card, 2, "ckirberr");
953 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 954 break;
955 case -ETIMEDOUT:
74eacdb9
FB		 956 dev_warn(&cdev->dev, "A hardware operation timed out"
957 " on the device\n");
847a50fd
CO		 958 QETH_CARD_TEXT(card, 2, "ckirberr");
959 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 960 if (intparm == QETH_RCD_PARM) {
4a71df50
FB		 961 if (card && (card->data.ccwdev == cdev)) {
962 card->data.state = CH_STATE_DOWN;
963 wake_up(&card->wait_q);
964 }
965 }
966 break;
967 default:
74eacdb9
FB		 968 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
969 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 970 QETH_CARD_TEXT(card, 2, "ckirberr");
971 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 972 }
973 return PTR_ERR(irb);
974}
975
976static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
977 struct irb *irb)
978{
979 int rc;
980 int cstat, dstat;
981 struct qeth_cmd_buffer *buffer;
982 struct qeth_channel *channel;
983 struct qeth_card *card;
984 struct qeth_cmd_buffer *iob;
985 __u8 index;
986
4a71df50
FB		 987 if (__qeth_check_irb_error(cdev, intparm, irb))
988 return;
23d805b6
PO		 989 cstat = irb->scsw.cmd.cstat;
990 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 991
992 card = CARD_FROM_CDEV(cdev);
993 if (!card)
994 return;
995
847a50fd
CO		 996 QETH_CARD_TEXT(card, 5, "irq");
997
4a71df50
FB		 998 if (card->read.ccwdev == cdev) {
999 channel = &card->read;
847a50fd 1000 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1001 } else if (card->write.ccwdev == cdev) {
1002 channel = &card->write;
847a50fd 1003 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1004 } else {
1005 channel = &card->data;
847a50fd 1006 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1007 }
1008 atomic_set(&channel->irq_pending, 0);
1009
23d805b6 1010 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1011 channel->state = CH_STATE_STOPPED;
1012
23d805b6 1013 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1014 channel->state = CH_STATE_HALTED;
1015
1016 /*let's wake up immediately on data channel*/
1017 if ((channel == &card->data) && (intparm != 0) &&
1018 (intparm != QETH_RCD_PARM))
1019 goto out;
1020
1021 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1022 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1023 /* we don't have to handle this further */
1024 intparm = 0;
1025 }
1026 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1027 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1028 /* we don't have to handle this further */
1029 intparm = 0;
1030 }
1031 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1032 (dstat & DEV_STAT_UNIT_CHECK) ||
1033 (cstat)) {
1034 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1035 dev_warn(&channel->ccwdev->dev,
1036 "The qeth device driver failed to recover "
1037 "an error on the device\n");
1038 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1039 "0x%X dstat 0x%X\n",
1040 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1041 print_hex_dump(KERN_WARNING, "qeth: irb ",
1042 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1043 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1044 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1045 }
1046 if (intparm == QETH_RCD_PARM) {
1047 channel->state = CH_STATE_DOWN;
1048 goto out;
1049 }
1050 rc = qeth_get_problem(cdev, irb);
1051 if (rc) {
28a7e4c9 1052 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1053 qeth_schedule_recovery(card);
1054 goto out;
1055 }
1056 }
1057
1058 if (intparm == QETH_RCD_PARM) {
1059 channel->state = CH_STATE_RCD_DONE;
1060 goto out;
1061 }
1062 if (intparm) {
1063 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1064 buffer->state = BUF_STATE_PROCESSED;
1065 }
1066 if (channel == &card->data)
1067 return;
1068 if (channel == &card->read &&
1069 channel->state == CH_STATE_UP)
1070 qeth_issue_next_read(card);
1071
1072 iob = channel->iob;
1073 index = channel->buf_no;
1074 while (iob[index].state == BUF_STATE_PROCESSED) {
1075 if (iob[index].callback != NULL)
1076 iob[index].callback(channel, iob + index);
1077
1078 index = (index + 1) % QETH_CMD_BUFFER_NO;
1079 }
1080 channel->buf_no = index;
1081out:
1082 wake_up(&card->wait_q);
1083 return;
1084}
1085
b3332930 1086static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1087 struct qeth_qdio_out_buffer *buf,
b3332930 1088 enum iucv_tx_notify notification)
4a71df50 1089{
4a71df50
FB		 1090 struct sk_buff *skb;
1091
b3332930
FB		 1092 if (skb_queue_empty(&buf->skb_list))
1093 goto out;
1094 skb = skb_peek(&buf->skb_list);
1095 while (skb) {
1096 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1097 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1098 if (skb->protocol == ETH_P_AF_IUCV) {
1099 if (skb->sk) {
1100 struct iucv_sock *iucv = iucv_sk(skb->sk);
1101 iucv->sk_txnotify(skb, notification);
1102 }
1103 }
1104 if (skb_queue_is_last(&buf->skb_list, skb))
1105 skb = NULL;
1106 else
1107 skb = skb_queue_next(&buf->skb_list, skb);
1108 }
1109out:
1110 return;
1111}
1112
1113static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1114{
1115 struct sk_buff *skb;
4a71df50 1116
b67d801f
UB		 1117 skb = skb_dequeue(&buf->skb_list);
1118 while (skb) {
b3332930
FB		 1119 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1120 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
b67d801f
UB		 1121 atomic_dec(&skb->users);
1122 dev_kfree_skb_any(skb);
4a71df50
FB		 1123 skb = skb_dequeue(&buf->skb_list);
1124 }
b3332930
FB		 1125}
1126
1127static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1128 struct qeth_qdio_out_buffer *buf,
1129 enum qeth_qdio_buffer_states newbufstate)
1130{
1131 int i;
1132
1133 /* is PCI flag set on buffer? */
1134 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1135 atomic_dec(&queue->set_pci_flags_count);
1136
1137 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1138 qeth_release_skbs(buf);
1139 }
4a71df50 1140 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1141 if (buf->buffer->element[i].addr && buf->is_header[i])
1142 kmem_cache_free(qeth_core_header_cache,
1143 buf->buffer->element[i].addr);
1144 buf->is_header[i] = 0;
4a71df50
FB		 1145 buf->buffer->element[i].length = 0;
1146 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1147 buf->buffer->element[i].eflags = 0;
1148 buf->buffer->element[i].sflags = 0;
4a71df50 1149 }
3ec90878
JG		 1150 buf->buffer->element[15].eflags = 0;
1151 buf->buffer->element[15].sflags = 0;
4a71df50 1152 buf->next_element_to_fill = 0;
0da9581d
EL		 1153 atomic_set(&buf->state, newbufstate);
1154}
1155
1156static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1157{
1158 int j;
1159
1160 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1161 if (!q->bufs[j])
1162 continue;
1163 qeth_cleanup_handled_pending(q, j, free);
1164 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1165 if (free) {
1166 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1167 q->bufs[j] = NULL;
1168 }
1169 }
4a71df50
FB		 1170}
1171
1172void qeth_clear_qdio_buffers(struct qeth_card *card)
1173{
0da9581d 1174 int i;
4a71df50 1175
847a50fd 1176 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1177 /* clear outbound buffers to free skbs */
0da9581d 1178 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1179 if (card->qdio.out_qs[i]) {
0da9581d 1180 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1181 }
0da9581d 1182 }
4a71df50
FB		 1183}
1184EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1185
1186static void qeth_free_buffer_pool(struct qeth_card *card)
1187{
1188 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1189 int i = 0;
4a71df50
FB		 1190 list_for_each_entry_safe(pool_entry, tmp,
1191 &card->qdio.init_pool.entry_list, init_list){
1192 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1193 free_page((unsigned long)pool_entry->elements[i]);
1194 list_del(&pool_entry->init_list);
1195 kfree(pool_entry);
1196 }
1197}
1198
1199static void qeth_free_qdio_buffers(struct qeth_card *card)
1200{
b3332930 1201 int i, j;
4a71df50 1202
4a71df50
FB		 1203 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1204 QETH_QDIO_UNINITIALIZED)
1205 return;
0da9581d
EL		 1206
1207 qeth_free_cq(card);
b3332930
FB		 1208 cancel_delayed_work_sync(&card->buffer_reclaim_work);
1209 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1210 kfree_skb(card->qdio.in_q->bufs[j].rx_skb);
4a71df50
FB		 1211 kfree(card->qdio.in_q);
1212 card->qdio.in_q = NULL;
1213 /* inbound buffer pool */
1214 qeth_free_buffer_pool(card);
1215 /* free outbound qdio_qs */
1216 if (card->qdio.out_qs) {
1217 for (i = 0; i < card->qdio.no_out_queues; ++i) {
0da9581d 1218 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
4a71df50
FB		 1219 kfree(card->qdio.out_qs[i]);
1220 }
1221 kfree(card->qdio.out_qs);
1222 card->qdio.out_qs = NULL;
1223 }
1224}
1225
1226static void qeth_clean_channel(struct qeth_channel *channel)
1227{
1228 int cnt;
1229
d11ba0c4 1230 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1231 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1232 kfree(channel->iob[cnt].data);
1233}
1234
5113fec0 1235static void qeth_get_channel_path_desc(struct qeth_card *card)
4a71df50 1236{
4a71df50
FB		 1237 struct ccw_device *ccwdev;
1238 struct channelPath_dsc {
1239 u8 flags;
1240 u8 lsn;
1241 u8 desc;
1242 u8 chpid;
1243 u8 swla;
1244 u8 zeroes;
1245 u8 chla;
1246 u8 chpp;
1247 } *chp_dsc;
1248
5113fec0 1249 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1250
1251 ccwdev = card->data.ccwdev;
1252 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1253 if (chp_dsc != NULL) {
99558ea9
UB		 1254 if (card->info.type != QETH_CARD_TYPE_IQD) {
1255 /* CHPP field bit 6 == 1 -> single queue */
1256 if ((chp_dsc->chpp & 0x02) == 0x02) {
1257 if ((atomic_read(&card->qdio.state) !=
1258 QETH_QDIO_UNINITIALIZED) &&
1259 (card->qdio.no_out_queues == 4))
1260 /* change from 4 to 1 outbound queues */
1261 qeth_free_qdio_buffers(card);
1262 card->qdio.no_out_queues = 1;
1263 if (card->qdio.default_out_queue != 0)
1264 dev_info(&card->gdev->dev,
d0ff1f52 1265 "Priority Queueing not supported\n");
99558ea9
UB		 1266 card->qdio.default_out_queue = 0;
1267 } else {
1268 if ((atomic_read(&card->qdio.state) !=
1269 QETH_QDIO_UNINITIALIZED) &&
1270 (card->qdio.no_out_queues == 1)) {
1271 /* change from 1 to 4 outbound queues */
1272 qeth_free_qdio_buffers(card);
1273 card->qdio.default_out_queue = 2;
1274 }
1275 card->qdio.no_out_queues = 4;
d0ff1f52 1276 }
d0ff1f52 1277 }
5113fec0 1278 card->info.func_level = 0x4100 + chp_dsc->desc;
4a71df50
FB		 1279 kfree(chp_dsc);
1280 }
5113fec0
UB		 1281 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1282 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1283 return;
4a71df50
FB		 1284}
1285
1286static void qeth_init_qdio_info(struct qeth_card *card)
1287{
d11ba0c4 1288 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1289 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1290 /* inbound */
1291 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1292 if (card->info.type == QETH_CARD_TYPE_IQD)
1293 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1294 else
1295 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1296 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1297 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1298 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1299}
1300
1301static void qeth_set_intial_options(struct qeth_card *card)
1302{
1303 card->options.route4.type = NO_ROUTER;
1304 card->options.route6.type = NO_ROUTER;
4a71df50
FB		 1305 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1306 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1307 card->options.fake_broadcast = 0;
1308 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1309 card->options.performance_stats = 0;
1310 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1311 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1312 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1313}
1314
1315static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1316{
1317 unsigned long flags;
1318 int rc = 0;
1319
1320 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1321 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1322 (u8) card->thread_start_mask,
1323 (u8) card->thread_allowed_mask,
1324 (u8) card->thread_running_mask);
1325 rc = (card->thread_start_mask & thread);
1326 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1327 return rc;
1328}
1329
1330static void qeth_start_kernel_thread(struct work_struct *work)
1331{
1332 struct qeth_card *card = container_of(work, struct qeth_card,
1333 kernel_thread_starter);
847a50fd 1334 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1335
1336 if (card->read.state != CH_STATE_UP &&
1337 card->write.state != CH_STATE_UP)
1338 return;
1339 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1340 kthread_run(card->discipline.recover, (void *) card,
1341 "qeth_recover");
1342}
1343
1344static int qeth_setup_card(struct qeth_card *card)
1345{
1346
d11ba0c4
PT		 1347 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1348 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1349
1350 card->read.state = CH_STATE_DOWN;
1351 card->write.state = CH_STATE_DOWN;
1352 card->data.state = CH_STATE_DOWN;
1353 card->state = CARD_STATE_DOWN;
1354 card->lan_online = 0;
908abbb5 1355 card->read_or_write_problem = 0;
4a71df50
FB		 1356 card->dev = NULL;
1357 spin_lock_init(&card->vlanlock);
1358 spin_lock_init(&card->mclock);
4a71df50
FB		 1359 spin_lock_init(&card->lock);
1360 spin_lock_init(&card->ip_lock);
1361 spin_lock_init(&card->thread_mask_lock);
c4949f07 1362 mutex_init(&card->conf_mutex);
9dc48ccc 1363 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1364 card->thread_start_mask = 0;
1365 card->thread_allowed_mask = 0;
1366 card->thread_running_mask = 0;
1367 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1368 INIT_LIST_HEAD(&card->ip_list);
4a71df50
FB		 1369 INIT_LIST_HEAD(card->ip_tbd_list);
1370 INIT_LIST_HEAD(&card->cmd_waiter_list);
1371 init_waitqueue_head(&card->wait_q);
25985edc 1372 /* initial options */
4a71df50
FB		 1373 qeth_set_intial_options(card);
1374 /* IP address takeover */
1375 INIT_LIST_HEAD(&card->ipato.entries);
1376 card->ipato.enabled = 0;
1377 card->ipato.invert4 = 0;
1378 card->ipato.invert6 = 0;
1379 /* init QDIO stuff */
1380 qeth_init_qdio_info(card);
b3332930 1381 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
4a71df50
FB		 1382 return 0;
1383}
1384
6bcac508
MS		 1385static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1386{
1387 struct qeth_card *card = container_of(slr, struct qeth_card,
1388 qeth_service_level);
0d788c7d
KDW		 1389 if (card->info.mcl_level[0])
1390 seq_printf(m, "qeth: %s firmware level %s\n",
1391 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1392}
1393
4a71df50
FB		 1394static struct qeth_card *qeth_alloc_card(void)
1395{
1396 struct qeth_card *card;
1397
d11ba0c4 1398 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1399 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1400 if (!card)
76b11f8e 1401 goto out;
d11ba0c4 1402 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
b3332930 1403 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
76b11f8e
UB		 1404 if (!card->ip_tbd_list) {
1405 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1406 goto out_card;
4a71df50 1407 }
76b11f8e
UB		 1408 if (qeth_setup_channel(&card->read))
1409 goto out_ip;
1410 if (qeth_setup_channel(&card->write))
1411 goto out_channel;
4a71df50 1412 card->options.layer2 = -1;
6bcac508
MS		 1413 card->qeth_service_level.seq_print = qeth_core_sl_print;
1414 register_service_level(&card->qeth_service_level);
4a71df50 1415 return card;
76b11f8e
UB		 1416
1417out_channel:
1418 qeth_clean_channel(&card->read);
1419out_ip:
1420 kfree(card->ip_tbd_list);
1421out_card:
1422 kfree(card);
1423out:
1424 return NULL;
4a71df50
FB		 1425}
1426
1427static int qeth_determine_card_type(struct qeth_card *card)
1428{
1429 int i = 0;
1430
d11ba0c4 1431 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1432
1433 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1434 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
5113fec0
UB		 1435 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1436 if ((CARD_RDEV(card)->id.dev_type ==
1437 known_devices[i][QETH_DEV_TYPE_IND]) &&
1438 (CARD_RDEV(card)->id.dev_model ==
1439 known_devices[i][QETH_DEV_MODEL_IND])) {
1440 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1441 card->qdio.no_out_queues =
1442 known_devices[i][QETH_QUEUE_NO_IND];
0da9581d 1443 card->qdio.no_in_queues = 1;
5113fec0
UB		 1444 card->info.is_multicast_different =
1445 known_devices[i][QETH_MULTICAST_IND];
1446 qeth_get_channel_path_desc(card);
4a71df50
FB		 1447 return 0;
1448 }
1449 i++;
1450 }
1451 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1452 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1453 "unknown type\n");
4a71df50
FB		 1454 return -ENOENT;
1455}
1456
1457static int qeth_clear_channel(struct qeth_channel *channel)
1458{
1459 unsigned long flags;
1460 struct qeth_card *card;
1461 int rc;
1462
4a71df50 1463 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1464 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1465 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1466 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1467 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1468
1469 if (rc)
1470 return rc;
1471 rc = wait_event_interruptible_timeout(card->wait_q,
1472 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1473 if (rc == -ERESTARTSYS)
1474 return rc;
1475 if (channel->state != CH_STATE_STOPPED)
1476 return -ETIME;
1477 channel->state = CH_STATE_DOWN;
1478 return 0;
1479}
1480
1481static int qeth_halt_channel(struct qeth_channel *channel)
1482{
1483 unsigned long flags;
1484 struct qeth_card *card;
1485 int rc;
1486
4a71df50 1487 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1488 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1489 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1490 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1491 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1492
1493 if (rc)
1494 return rc;
1495 rc = wait_event_interruptible_timeout(card->wait_q,
1496 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1497 if (rc == -ERESTARTSYS)
1498 return rc;
1499 if (channel->state != CH_STATE_HALTED)
1500 return -ETIME;
1501 return 0;
1502}
1503
1504static int qeth_halt_channels(struct qeth_card *card)
1505{
1506 int rc1 = 0, rc2 = 0, rc3 = 0;
1507
847a50fd 1508 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1509 rc1 = qeth_halt_channel(&card->read);
1510 rc2 = qeth_halt_channel(&card->write);
1511 rc3 = qeth_halt_channel(&card->data);
1512 if (rc1)
1513 return rc1;
1514 if (rc2)
1515 return rc2;
1516 return rc3;
1517}
1518
1519static int qeth_clear_channels(struct qeth_card *card)
1520{
1521 int rc1 = 0, rc2 = 0, rc3 = 0;
1522
847a50fd 1523 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1524 rc1 = qeth_clear_channel(&card->read);
1525 rc2 = qeth_clear_channel(&card->write);
1526 rc3 = qeth_clear_channel(&card->data);
1527 if (rc1)
1528 return rc1;
1529 if (rc2)
1530 return rc2;
1531 return rc3;
1532}
1533
1534static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1535{
1536 int rc = 0;
1537
847a50fd 1538 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1539
1540 if (halt)
1541 rc = qeth_halt_channels(card);
1542 if (rc)
1543 return rc;
1544 return qeth_clear_channels(card);
1545}
1546
1547int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1548{
1549 int rc = 0;
1550
847a50fd 1551 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1552 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1553 QETH_QDIO_CLEANING)) {
1554 case QETH_QDIO_ESTABLISHED:
1555 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1556 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1557 QDIO_FLAG_CLEANUP_USING_HALT);
1558 else
cc961d40 1559 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1560 QDIO_FLAG_CLEANUP_USING_CLEAR);
1561 if (rc)
847a50fd 1562 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
cc961d40 1563 qdio_free(CARD_DDEV(card));
4a71df50
FB		 1564 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1565 break;
1566 case QETH_QDIO_CLEANING:
1567 return rc;
1568 default:
1569 break;
1570 }
1571 rc = qeth_clear_halt_card(card, use_halt);
1572 if (rc)
847a50fd 1573 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1574 card->state = CARD_STATE_DOWN;
1575 return rc;
1576}
1577EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1578
1579static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1580 int *length)
1581{
1582 struct ciw *ciw;
1583 char *rcd_buf;
1584 int ret;
1585 struct qeth_channel *channel = &card->data;
1586 unsigned long flags;
1587
1588 /*
1589 * scan for RCD command in extended SenseID data
1590 */
1591 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1592 if (!ciw || ciw->cmd == 0)
1593 return -EOPNOTSUPP;
1594 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1595 if (!rcd_buf)
1596 return -ENOMEM;
1597
1598 channel->ccw.cmd_code = ciw->cmd;
1599 channel->ccw.cda = (__u32) __pa(rcd_buf);
1600 channel->ccw.count = ciw->count;
1601 channel->ccw.flags = CCW_FLAG_SLI;
1602 channel->state = CH_STATE_RCD;
1603 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1604 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1605 QETH_RCD_PARM, LPM_ANYPATH, 0,
1606 QETH_RCD_TIMEOUT);
1607 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1608 if (!ret)
1609 wait_event(card->wait_q,
1610 (channel->state == CH_STATE_RCD_DONE ||
1611 channel->state == CH_STATE_DOWN));
1612 if (channel->state == CH_STATE_DOWN)
1613 ret = -EIO;
1614 else
1615 channel->state = CH_STATE_DOWN;
1616 if (ret) {
1617 kfree(rcd_buf);
1618 *buffer = NULL;
1619 *length = 0;
1620 } else {
1621 *length = ciw->count;
1622 *buffer = rcd_buf;
1623 }
1624 return ret;
1625}
1626
a60389ab 1627static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1628{
a60389ab 1629 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1630 card->info.chpid = prcd[30];
1631 card->info.unit_addr2 = prcd[31];
1632 card->info.cula = prcd[63];
1633 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1634 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1635}
1636
1637static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1638{
1639 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1640
1641 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) {
1642 card->info.blkt.time_total = 250;
1643 card->info.blkt.inter_packet = 5;
1644 card->info.blkt.inter_packet_jumbo = 15;
1645 } else {
1646 card->info.blkt.time_total = 0;
1647 card->info.blkt.inter_packet = 0;
1648 card->info.blkt.inter_packet_jumbo = 0;
1649 }
4a71df50
FB		 1650}
1651
1652static void qeth_init_tokens(struct qeth_card *card)
1653{
1654 card->token.issuer_rm_w = 0x00010103UL;
1655 card->token.cm_filter_w = 0x00010108UL;
1656 card->token.cm_connection_w = 0x0001010aUL;
1657 card->token.ulp_filter_w = 0x0001010bUL;
1658 card->token.ulp_connection_w = 0x0001010dUL;
1659}
1660
1661static void qeth_init_func_level(struct qeth_card *card)
1662{
5113fec0
UB		 1663 switch (card->info.type) {
1664 case QETH_CARD_TYPE_IQD:
6298263a 1665 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1666 break;
1667 case QETH_CARD_TYPE_OSD:
0132951e 1668 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1669 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1670 break;
1671 default:
1672 break;
4a71df50
FB		 1673 }
1674}
1675
4a71df50
FB		 1676static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1677 void (*idx_reply_cb)(struct qeth_channel *,
1678 struct qeth_cmd_buffer *))
1679{
1680 struct qeth_cmd_buffer *iob;
1681 unsigned long flags;
1682 int rc;
1683 struct qeth_card *card;
1684
d11ba0c4 1685 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1686 card = CARD_FROM_CDEV(channel->ccwdev);
1687 iob = qeth_get_buffer(channel);
1688 iob->callback = idx_reply_cb;
1689 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1690 channel->ccw.count = QETH_BUFSIZE;
1691 channel->ccw.cda = (__u32) __pa(iob->data);
1692
1693 wait_event(card->wait_q,
1694 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1695 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1696 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1697 rc = ccw_device_start(channel->ccwdev,
1698 &channel->ccw, (addr_t) iob, 0, 0);
1699 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1700
1701 if (rc) {
14cc21b6 1702 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1703 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1704 atomic_set(&channel->irq_pending, 0);
1705 wake_up(&card->wait_q);
1706 return rc;
1707 }
1708 rc = wait_event_interruptible_timeout(card->wait_q,
1709 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1710 if (rc == -ERESTARTSYS)
1711 return rc;
1712 if (channel->state != CH_STATE_UP) {
1713 rc = -ETIME;
d11ba0c4 1714 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1715 qeth_clear_cmd_buffers(channel);
1716 } else
1717 rc = 0;
1718 return rc;
1719}
1720
1721static int qeth_idx_activate_channel(struct qeth_channel *channel,
1722 void (*idx_reply_cb)(struct qeth_channel *,
1723 struct qeth_cmd_buffer *))
1724{
1725 struct qeth_card *card;
1726 struct qeth_cmd_buffer *iob;
1727 unsigned long flags;
1728 __u16 temp;
1729 __u8 tmp;
1730 int rc;
f06f6f32 1731 struct ccw_dev_id temp_devid;
4a71df50
FB		 1732
1733 card = CARD_FROM_CDEV(channel->ccwdev);
1734
d11ba0c4 1735 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1736
1737 iob = qeth_get_buffer(channel);
1738 iob->callback = idx_reply_cb;
1739 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1740 channel->ccw.count = IDX_ACTIVATE_SIZE;
1741 channel->ccw.cda = (__u32) __pa(iob->data);
1742 if (channel == &card->write) {
1743 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1744 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1745 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1746 card->seqno.trans_hdr++;
1747 } else {
1748 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1749 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1750 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1751 }
1752 tmp = ((__u8)card->info.portno) | 0x80;
1753 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1754 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1755 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1756 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1757 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1758 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1759 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1760 temp = (card->info.cula << 8) + card->info.unit_addr2;
1761 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1762
1763 wait_event(card->wait_q,
1764 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1765 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1766 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1767 rc = ccw_device_start(channel->ccwdev,
1768 &channel->ccw, (addr_t) iob, 0, 0);
1769 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1770
1771 if (rc) {
14cc21b6
FB		 1772 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1773 rc);
d11ba0c4 1774 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1775 atomic_set(&channel->irq_pending, 0);
1776 wake_up(&card->wait_q);
1777 return rc;
1778 }
1779 rc = wait_event_interruptible_timeout(card->wait_q,
1780 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1781 if (rc == -ERESTARTSYS)
1782 return rc;
1783 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1784 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1785 " failed to recover an error on the device\n");
1786 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1787 dev_name(&channel->ccwdev->dev));
d11ba0c4 1788 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1789 qeth_clear_cmd_buffers(channel);
1790 return -ETIME;
1791 }
1792 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1793}
1794
1795static int qeth_peer_func_level(int level)
1796{
1797 if ((level & 0xff) == 8)
1798 return (level & 0xff) + 0x400;
1799 if (((level >> 8) & 3) == 1)
1800 return (level & 0xff) + 0x200;
1801 return level;
1802}
1803
1804static void qeth_idx_write_cb(struct qeth_channel *channel,
1805 struct qeth_cmd_buffer *iob)
1806{
1807 struct qeth_card *card;
1808 __u16 temp;
1809
d11ba0c4 1810 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1811
1812 if (channel->state == CH_STATE_DOWN) {
1813 channel->state = CH_STATE_ACTIVATING;
1814 goto out;
1815 }
1816 card = CARD_FROM_CDEV(channel->ccwdev);
1817
1818 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1819 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1820 dev_err(&card->write.ccwdev->dev,
1821 "The adapter is used exclusively by another "
1822 "host\n");
4a71df50 1823 else
74eacdb9
FB		 1824 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1825 " negative reply\n",
1826 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1827 goto out;
1828 }
1829 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1830 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1831 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1832 "function level mismatch (sent: 0x%x, received: "
1833 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1834 card->info.func_level, temp);
4a71df50
FB		 1835 goto out;
1836 }
1837 channel->state = CH_STATE_UP;
1838out:
1839 qeth_release_buffer(channel, iob);
1840}
1841
1842static void qeth_idx_read_cb(struct qeth_channel *channel,
1843 struct qeth_cmd_buffer *iob)
1844{
1845 struct qeth_card *card;
1846 __u16 temp;
1847
d11ba0c4 1848 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1849 if (channel->state == CH_STATE_DOWN) {
1850 channel->state = CH_STATE_ACTIVATING;
1851 goto out;
1852 }
1853
1854 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1855 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1856 goto out;
1857
1858 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1859 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1860 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1861 dev_err(&card->write.ccwdev->dev,
1862 "The adapter is used exclusively by another "
1863 "host\n");
5113fec0
UB		 1864 break;
1865 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1866 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1867 dev_err(&card->read.ccwdev->dev,
1868 "Setting the device online failed because of "
01fc3e86 1869 "insufficient authorization\n");
5113fec0
UB		 1870 break;
1871 default:
74eacdb9
FB		 1872 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1873 " negative reply\n",
1874 dev_name(&card->read.ccwdev->dev));
5113fec0 1875 }
01fc3e86
UB		 1876 QETH_CARD_TEXT_(card, 2, "idxread%c",
1877 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1878 goto out;
1879 }
1880
1881/**
5113fec0
UB		 1882 * * temporary fix for microcode bug
1883 * * to revert it,replace OR by AND
1884 * */
4a71df50 1885 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
5113fec0 1886 (card->info.type == QETH_CARD_TYPE_OSD))
4a71df50
FB		 1887 card->info.portname_required = 1;
1888
1889 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1890 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1891 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1892 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1893 dev_name(&card->read.ccwdev->dev),
1894 card->info.func_level, temp);
4a71df50
FB		 1895 goto out;
1896 }
1897 memcpy(&card->token.issuer_rm_r,
1898 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1899 QETH_MPC_TOKEN_LENGTH);
1900 memcpy(&card->info.mcl_level[0],
1901 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1902 channel->state = CH_STATE_UP;
1903out:
1904 qeth_release_buffer(channel, iob);
1905}
1906
1907void qeth_prepare_control_data(struct qeth_card *card, int len,
1908 struct qeth_cmd_buffer *iob)
1909{
1910 qeth_setup_ccw(&card->write, iob->data, len);
1911 iob->callback = qeth_release_buffer;
1912
1913 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1914 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1915 card->seqno.trans_hdr++;
1916 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1917 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1918 card->seqno.pdu_hdr++;
1919 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1920 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1921 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1922}
1923EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1924
1925int qeth_send_control_data(struct qeth_card *card, int len,
1926 struct qeth_cmd_buffer *iob,
1927 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1928 unsigned long),
1929 void *reply_param)
1930{
1931 int rc;
1932 unsigned long flags;
1933 struct qeth_reply *reply = NULL;
7834cd5a 1934 unsigned long timeout, event_timeout;
5b54e16f 1935 struct qeth_ipa_cmd *cmd;
4a71df50 1936
847a50fd 1937 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 1938
908abbb5
UB		 1939 if (card->read_or_write_problem) {
1940 qeth_release_buffer(iob->channel, iob);
1941 return -EIO;
1942 }
4a71df50
FB		 1943 reply = qeth_alloc_reply(card);
1944 if (!reply) {
4a71df50
FB		 1945 return -ENOMEM;
1946 }
1947 reply->callback = reply_cb;
1948 reply->param = reply_param;
1949 if (card->state == CARD_STATE_DOWN)
1950 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1951 else
1952 reply->seqno = card->seqno.ipa++;
1953 init_waitqueue_head(&reply->wait_q);
1954 spin_lock_irqsave(&card->lock, flags);
1955 list_add_tail(&reply->list, &card->cmd_waiter_list);
1956 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1957 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1958
1959 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1960 qeth_prepare_control_data(card, len, iob);
1961
1962 if (IS_IPA(iob->data))
7834cd5a 1963 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 1964 else
7834cd5a
HC		 1965 event_timeout = QETH_TIMEOUT;
1966 timeout = jiffies + event_timeout;
4a71df50 1967
847a50fd 1968 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 1969 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1970 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1971 (addr_t) iob, 0, 0);
1972 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1973 if (rc) {
74eacdb9
FB		 1974 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1975 "ccw_device_start rc = %i\n",
1976 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 1977 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 1978 spin_lock_irqsave(&card->lock, flags);
1979 list_del_init(&reply->list);
1980 qeth_put_reply(reply);
1981 spin_unlock_irqrestore(&card->lock, flags);
1982 qeth_release_buffer(iob->channel, iob);
1983 atomic_set(&card->write.irq_pending, 0);
1984 wake_up(&card->wait_q);
1985 return rc;
1986 }
5b54e16f
FB		 1987
1988 /* we have only one long running ipassist, since we can ensure
1989 process context of this command we can sleep */
1990 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1991 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1992 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1993 if (!wait_event_timeout(reply->wait_q,
7834cd5a 1994 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 1995 goto time_err;
1996 } else {
1997 while (!atomic_read(&reply->received)) {
1998 if (time_after(jiffies, timeout))
1999 goto time_err;
2000 cpu_relax();
2001 };
2002 }
2003
70919e23
UB		 2004 if (reply->rc == -EIO)
2005 goto error;
5b54e16f
FB		 2006 rc = reply->rc;
2007 qeth_put_reply(reply);
2008 return rc;
2009
2010time_err:
70919e23 2011 reply->rc = -ETIME;
5b54e16f
FB		 2012 spin_lock_irqsave(&reply->card->lock, flags);
2013 list_del_init(&reply->list);
2014 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2015 atomic_inc(&reply->received);
70919e23 2016error:
908abbb5
UB		 2017 atomic_set(&card->write.irq_pending, 0);
2018 qeth_release_buffer(iob->channel, iob);
2019 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2020 rc = reply->rc;
2021 qeth_put_reply(reply);
2022 return rc;
2023}
2024EXPORT_SYMBOL_GPL(qeth_send_control_data);
2025
2026static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2027 unsigned long data)
2028{
2029 struct qeth_cmd_buffer *iob;
2030
d11ba0c4 2031 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2032
2033 iob = (struct qeth_cmd_buffer *) data;
2034 memcpy(&card->token.cm_filter_r,
2035 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2036 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2037 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2038 return 0;
2039}
2040
2041static int qeth_cm_enable(struct qeth_card *card)
2042{
2043 int rc;
2044 struct qeth_cmd_buffer *iob;
2045
d11ba0c4 2046 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2047
2048 iob = qeth_wait_for_buffer(&card->write);
2049 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2050 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2051 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2052 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2053 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2054
2055 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2056 qeth_cm_enable_cb, NULL);
2057 return rc;
2058}
2059
2060static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2061 unsigned long data)
2062{
2063
2064 struct qeth_cmd_buffer *iob;
2065
d11ba0c4 2066 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2067
2068 iob = (struct qeth_cmd_buffer *) data;
2069 memcpy(&card->token.cm_connection_r,
2070 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2071 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2072 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2073 return 0;
2074}
2075
2076static int qeth_cm_setup(struct qeth_card *card)
2077{
2078 int rc;
2079 struct qeth_cmd_buffer *iob;
2080
d11ba0c4 2081 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2082
2083 iob = qeth_wait_for_buffer(&card->write);
2084 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2085 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2086 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2087 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2088 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2089 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2090 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2091 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2092 qeth_cm_setup_cb, NULL);
2093 return rc;
2094
2095}
2096
2097static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2098{
2099 switch (card->info.type) {
2100 case QETH_CARD_TYPE_UNKNOWN:
2101 return 1500;
2102 case QETH_CARD_TYPE_IQD:
2103 return card->info.max_mtu;
5113fec0 2104 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 2105 switch (card->info.link_type) {
2106 case QETH_LINK_TYPE_HSTR:
2107 case QETH_LINK_TYPE_LANE_TR:
2108 return 2000;
2109 default:
2110 return 1492;
2111 }
5113fec0
UB		 2112 case QETH_CARD_TYPE_OSM:
2113 case QETH_CARD_TYPE_OSX:
2114 return 1492;
4a71df50
FB		 2115 default:
2116 return 1500;
2117 }
2118}
2119
4a71df50
FB		 2120static inline int qeth_get_mtu_outof_framesize(int framesize)
2121{
2122 switch (framesize) {
2123 case 0x4000:
2124 return 8192;
2125 case 0x6000:
2126 return 16384;
2127 case 0xa000:
2128 return 32768;
2129 case 0xffff:
2130 return 57344;
2131 default:
2132 return 0;
2133 }
2134}
2135
2136static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2137{
2138 switch (card->info.type) {
5113fec0
UB		 2139 case QETH_CARD_TYPE_OSD:
2140 case QETH_CARD_TYPE_OSM:
2141 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2142 case QETH_CARD_TYPE_IQD:
2143 return ((mtu >= 576) &&
9853b97b 2144 (mtu <= card->info.max_mtu));
4a71df50
FB		 2145 case QETH_CARD_TYPE_OSN:
2146 case QETH_CARD_TYPE_UNKNOWN:
2147 default:
2148 return 1;
2149 }
2150}
2151
2152static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2153 unsigned long data)
2154{
2155
2156 __u16 mtu, framesize;
2157 __u16 len;
2158 __u8 link_type;
2159 struct qeth_cmd_buffer *iob;
2160
d11ba0c4 2161 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2162
2163 iob = (struct qeth_cmd_buffer *) data;
2164 memcpy(&card->token.ulp_filter_r,
2165 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2166 QETH_MPC_TOKEN_LENGTH);
9853b97b 2167 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2168 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2169 mtu = qeth_get_mtu_outof_framesize(framesize);
2170 if (!mtu) {
2171 iob->rc = -EINVAL;
d11ba0c4 2172 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2173 return 0;
2174 }
8b2e18f6
UB		 2175 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2176 /* frame size has changed */
2177 if (card->dev &&
2178 ((card->dev->mtu == card->info.initial_mtu) ||
2179 (card->dev->mtu > mtu)))
2180 card->dev->mtu = mtu;
2181 qeth_free_qdio_buffers(card);
2182 }
4a71df50 2183 card->info.initial_mtu = mtu;
8b2e18f6 2184 card->info.max_mtu = mtu;
4a71df50
FB		 2185 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2186 } else {
2187 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
9853b97b
FB		 2188 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2189 iob->data);
4a71df50
FB		 2190 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2191 }
2192
2193 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2194 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2195 memcpy(&link_type,
2196 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2197 card->info.link_type = link_type;
2198 } else
2199 card->info.link_type = 0;
01fc3e86 2200 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2201 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2202 return 0;
2203}
2204
2205static int qeth_ulp_enable(struct qeth_card *card)
2206{
2207 int rc;
2208 char prot_type;
2209 struct qeth_cmd_buffer *iob;
2210
2211 /*FIXME: trace view callbacks*/
d11ba0c4 2212 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2213
2214 iob = qeth_wait_for_buffer(&card->write);
2215 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2216
2217 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2218 (__u8) card->info.portno;
2219 if (card->options.layer2)
2220 if (card->info.type == QETH_CARD_TYPE_OSN)
2221 prot_type = QETH_PROT_OSN2;
2222 else
2223 prot_type = QETH_PROT_LAYER2;
2224 else
2225 prot_type = QETH_PROT_TCPIP;
2226
2227 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2228 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2229 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2230 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2231 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2232 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2233 card->info.portname, 9);
2234 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2235 qeth_ulp_enable_cb, NULL);
2236 return rc;
2237
2238}
2239
2240static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2241 unsigned long data)
2242{
2243 struct qeth_cmd_buffer *iob;
65a1f898 2244 int rc = 0;
4a71df50 2245
d11ba0c4 2246 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2247
2248 iob = (struct qeth_cmd_buffer *) data;
2249 memcpy(&card->token.ulp_connection_r,
2250 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2251 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2252 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2253 3)) {
2254 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2255 dev_err(&card->gdev->dev, "A connection could not be "
2256 "established because of an OLM limit\n");
bbb822a8 2257 iob->rc = -EMLINK;
65a1f898 2258 }
d11ba0c4 2259 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
65a1f898 2260 return rc;
4a71df50
FB		 2261}
2262
2263static int qeth_ulp_setup(struct qeth_card *card)
2264{
2265 int rc;
2266 __u16 temp;
2267 struct qeth_cmd_buffer *iob;
2268 struct ccw_dev_id dev_id;
2269
d11ba0c4 2270 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2271
2272 iob = qeth_wait_for_buffer(&card->write);
2273 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2274
2275 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2276 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2277 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2278 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2279 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2280 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2281
2282 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2283 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2284 temp = (card->info.cula << 8) + card->info.unit_addr2;
2285 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2286 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2287 qeth_ulp_setup_cb, NULL);
2288 return rc;
2289}
2290
0da9581d
EL		 2291static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2292{
2293 int rc;
2294 struct qeth_qdio_out_buffer *newbuf;
2295
2296 rc = 0;
2297 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2298 if (!newbuf) {
2299 rc = -ENOMEM;
2300 goto out;
2301 }
2302 newbuf->buffer = &q->qdio_bufs[bidx];
2303 skb_queue_head_init(&newbuf->skb_list);
2304 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2305 newbuf->q = q;
2306 newbuf->aob = NULL;
2307 newbuf->next_pending = q->bufs[bidx];
2308 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2309 q->bufs[bidx] = newbuf;
2310 if (q->bufstates) {
2311 q->bufstates[bidx].user = newbuf;
2312 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2313 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2314 QETH_CARD_TEXT_(q->card, 2, "%lx",
2315 (long) newbuf->next_pending);
2316 }
2317out:
2318 return rc;
2319}
2320
2321
4a71df50
FB		 2322static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2323{
2324 int i, j;
2325
d11ba0c4 2326 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2327
2328 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2329 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2330 return 0;
2331
b3332930 2332 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q),
0da9581d 2333 GFP_KERNEL);
4a71df50
FB		 2334 if (!card->qdio.in_q)
2335 goto out_nomem;
d11ba0c4
PT		 2336 QETH_DBF_TEXT(SETUP, 2, "inq");
2337 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2338 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2339 /* give inbound qeth_qdio_buffers their qdio_buffers */
b3332930 2340 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 2341 card->qdio.in_q->bufs[i].buffer =
2342 &card->qdio.in_q->qdio_bufs[i];
b3332930
FB		 2343 card->qdio.in_q->bufs[i].rx_skb = NULL;
2344 }
4a71df50
FB		 2345 /* inbound buffer pool */
2346 if (qeth_alloc_buffer_pool(card))
2347 goto out_freeinq;
0da9581d 2348
4a71df50
FB		 2349 /* outbound */
2350 card->qdio.out_qs =
b3332930 2351 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2352 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2353 if (!card->qdio.out_qs)
2354 goto out_freepool;
2355 for (i = 0; i < card->qdio.no_out_queues; ++i) {
b3332930 2356 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2357 GFP_KERNEL);
4a71df50
FB		 2358 if (!card->qdio.out_qs[i])
2359 goto out_freeoutq;
d11ba0c4
PT		 2360 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2361 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2362 card->qdio.out_qs[i]->queue_no = i;
2363 /* give outbound qeth_qdio_buffers their qdio_buffers */
2364 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
0da9581d
EL		 2365 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2366 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2367 goto out_freeoutqbufs;
4a71df50
FB		 2368 }
2369 }
0da9581d
EL		 2370
2371 /* completion */
2372 if (qeth_alloc_cq(card))
2373 goto out_freeoutq;
2374
4a71df50
FB		 2375 return 0;
2376
0da9581d
EL		 2377out_freeoutqbufs:
2378 while (j > 0) {
2379 --j;
2380 kmem_cache_free(qeth_qdio_outbuf_cache,
2381 card->qdio.out_qs[i]->bufs[j]);
2382 card->qdio.out_qs[i]->bufs[j] = NULL;
2383 }
4a71df50 2384out_freeoutq:
0da9581d 2385 while (i > 0) {
4a71df50 2386 kfree(card->qdio.out_qs[--i]);
0da9581d
EL		 2387 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2388 }
4a71df50
FB		 2389 kfree(card->qdio.out_qs);
2390 card->qdio.out_qs = NULL;
2391out_freepool:
2392 qeth_free_buffer_pool(card);
2393out_freeinq:
2394 kfree(card->qdio.in_q);
2395 card->qdio.in_q = NULL;
2396out_nomem:
2397 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2398 return -ENOMEM;
2399}
2400
2401static void qeth_create_qib_param_field(struct qeth_card *card,
2402 char *param_field)
2403{
2404
2405 param_field[0] = _ascebc['P'];
2406 param_field[1] = _ascebc['C'];
2407 param_field[2] = _ascebc['I'];
2408 param_field[3] = _ascebc['T'];
2409 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2410 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2411 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2412}
2413
2414static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2415 char *param_field)
2416{
2417 param_field[16] = _ascebc['B'];
2418 param_field[17] = _ascebc['L'];
2419 param_field[18] = _ascebc['K'];
2420 param_field[19] = _ascebc['T'];
2421 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2422 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2423 *((unsigned int *) (&param_field[28])) =
2424 card->info.blkt.inter_packet_jumbo;
2425}
2426
2427static int qeth_qdio_activate(struct qeth_card *card)
2428{
d11ba0c4 2429 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2430 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2431}
2432
2433static int qeth_dm_act(struct qeth_card *card)
2434{
2435 int rc;
2436 struct qeth_cmd_buffer *iob;
2437
d11ba0c4 2438 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2439
2440 iob = qeth_wait_for_buffer(&card->write);
2441 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2442
2443 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2444 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2445 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2446 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2447 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2448 return rc;
2449}
2450
2451static int qeth_mpc_initialize(struct qeth_card *card)
2452{
2453 int rc;
2454
d11ba0c4 2455 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2456
2457 rc = qeth_issue_next_read(card);
2458 if (rc) {
d11ba0c4 2459 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2460 return rc;
2461 }
2462 rc = qeth_cm_enable(card);
2463 if (rc) {
d11ba0c4 2464 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2465 goto out_qdio;
2466 }
2467 rc = qeth_cm_setup(card);
2468 if (rc) {
d11ba0c4 2469 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2470 goto out_qdio;
2471 }
2472 rc = qeth_ulp_enable(card);
2473 if (rc) {
d11ba0c4 2474 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2475 goto out_qdio;
2476 }
2477 rc = qeth_ulp_setup(card);
2478 if (rc) {
d11ba0c4 2479 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2480 goto out_qdio;
2481 }
2482 rc = qeth_alloc_qdio_buffers(card);
2483 if (rc) {
d11ba0c4 2484 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2485 goto out_qdio;
2486 }
2487 rc = qeth_qdio_establish(card);
2488 if (rc) {
d11ba0c4 2489 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2490 qeth_free_qdio_buffers(card);
2491 goto out_qdio;
2492 }
2493 rc = qeth_qdio_activate(card);
2494 if (rc) {
d11ba0c4 2495 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2496 goto out_qdio;
2497 }
2498 rc = qeth_dm_act(card);
2499 if (rc) {
d11ba0c4 2500 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2501 goto out_qdio;
2502 }
2503
2504 return 0;
2505out_qdio:
2506 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2507 return rc;
2508}
2509
2510static void qeth_print_status_with_portname(struct qeth_card *card)
2511{
2512 char dbf_text[15];
2513 int i;
2514
2515 sprintf(dbf_text, "%s", card->info.portname + 1);
2516 for (i = 0; i < 8; i++)
2517 dbf_text[i] =
2518 (char) _ebcasc[(__u8) dbf_text[i]];
2519 dbf_text[8] = 0;
74eacdb9 2520 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2521 "with link type %s (portname: %s)\n",
4a71df50
FB		 2522 qeth_get_cardname(card),
2523 (card->info.mcl_level[0]) ? " (level: " : "",
2524 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2525 (card->info.mcl_level[0]) ? ")" : "",
2526 qeth_get_cardname_short(card),
2527 dbf_text);
2528
2529}
2530
2531static void qeth_print_status_no_portname(struct qeth_card *card)
2532{
2533 if (card->info.portname[0])
74eacdb9 2534 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2535 "card%s%s%s\nwith link type %s "
2536 "(no portname needed by interface).\n",
4a71df50
FB		 2537 qeth_get_cardname(card),
2538 (card->info.mcl_level[0]) ? " (level: " : "",
2539 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2540 (card->info.mcl_level[0]) ? ")" : "",
2541 qeth_get_cardname_short(card));
2542 else
74eacdb9 2543 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2544 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2545 qeth_get_cardname(card),
2546 (card->info.mcl_level[0]) ? " (level: " : "",
2547 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2548 (card->info.mcl_level[0]) ? ")" : "",
2549 qeth_get_cardname_short(card));
2550}
2551
2552void qeth_print_status_message(struct qeth_card *card)
2553{
2554 switch (card->info.type) {
5113fec0
UB		 2555 case QETH_CARD_TYPE_OSD:
2556 case QETH_CARD_TYPE_OSM:
2557 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2558 /* VM will use a non-zero first character
2559 * to indicate a HiperSockets like reporting
2560 * of the level OSA sets the first character to zero
2561 * */
2562 if (!card->info.mcl_level[0]) {
2563 sprintf(card->info.mcl_level, "%02x%02x",
2564 card->info.mcl_level[2],
2565 card->info.mcl_level[3]);
2566
2567 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2568 break;
2569 }
2570 /* fallthrough */
2571 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2572 if ((card->info.guestlan) ||
2573 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2574 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2575 card->info.mcl_level[0]];
2576 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2577 card->info.mcl_level[1]];
2578 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2579 card->info.mcl_level[2]];
2580 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2581 card->info.mcl_level[3]];
2582 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2583 }
2584 break;
2585 default:
2586 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2587 }
2588 if (card->info.portname_required)
2589 qeth_print_status_with_portname(card);
2590 else
2591 qeth_print_status_no_portname(card);
2592}
2593EXPORT_SYMBOL_GPL(qeth_print_status_message);
2594
4a71df50
FB		 2595static void qeth_initialize_working_pool_list(struct qeth_card *card)
2596{
2597 struct qeth_buffer_pool_entry *entry;
2598
847a50fd 2599 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2600
2601 list_for_each_entry(entry,
2602 &card->qdio.init_pool.entry_list, init_list) {
2603 qeth_put_buffer_pool_entry(card, entry);
2604 }
2605}
2606
2607static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2608 struct qeth_card *card)
2609{
2610 struct list_head *plh;
2611 struct qeth_buffer_pool_entry *entry;
2612 int i, free;
2613 struct page *page;
2614
2615 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2616 return NULL;
2617
2618 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2619 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2620 free = 1;
2621 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2622 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2623 free = 0;
2624 break;
2625 }
2626 }
2627 if (free) {
2628 list_del_init(&entry->list);
2629 return entry;
2630 }
2631 }
2632
2633 /* no free buffer in pool so take first one and swap pages */
2634 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2635 struct qeth_buffer_pool_entry, list);
2636 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2637 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2638 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2639 if (!page) {
2640 return NULL;
2641 } else {
2642 free_page((unsigned long)entry->elements[i]);
2643 entry->elements[i] = page_address(page);
2644 if (card->options.performance_stats)
2645 card->perf_stats.sg_alloc_page_rx++;
2646 }
2647 }
2648 }
2649 list_del_init(&entry->list);
2650 return entry;
2651}
2652
2653static int qeth_init_input_buffer(struct qeth_card *card,
2654 struct qeth_qdio_buffer *buf)
2655{
2656 struct qeth_buffer_pool_entry *pool_entry;
2657 int i;
2658
b3332930
FB		 2659 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2660 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2661 if (!buf->rx_skb)
2662 return 1;
2663 }
2664
4a71df50
FB		 2665 pool_entry = qeth_find_free_buffer_pool_entry(card);
2666 if (!pool_entry)
2667 return 1;
2668
2669 /*
2670 * since the buffer is accessed only from the input_tasklet
2671 * there shouldn't be a need to synchronize; also, since we use
2672 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2673 * buffers
2674 */
4a71df50
FB		 2675
2676 buf->pool_entry = pool_entry;
2677 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2678 buf->buffer->element[i].length = PAGE_SIZE;
2679 buf->buffer->element[i].addr = pool_entry->elements[i];
2680 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2681 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2682 else
3ec90878
JG		 2683 buf->buffer->element[i].eflags = 0;
2684 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2685 }
2686 return 0;
2687}
2688
2689int qeth_init_qdio_queues(struct qeth_card *card)
2690{
2691 int i, j;
2692 int rc;
2693
d11ba0c4 2694 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2695
2696 /* inbound queue */
2697 memset(card->qdio.in_q->qdio_bufs, 0,
2698 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2699 qeth_initialize_working_pool_list(card);
2700 /*give only as many buffers to hardware as we have buffer pool entries*/
2701 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2702 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2703 card->qdio.in_q->next_buf_to_init =
2704 card->qdio.in_buf_pool.buf_count - 1;
2705 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2706 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2707 if (rc) {
d11ba0c4 2708 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2709 return rc;
2710 }
0da9581d
EL		 2711
2712 /* completion */
2713 rc = qeth_cq_init(card);
2714 if (rc) {
2715 return rc;
2716 }
2717
4a71df50
FB		 2718 /* outbound queue */
2719 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2720 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2721 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2722 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2723 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2724 card->qdio.out_qs[i]->bufs[j],
2725 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2726 }
2727 card->qdio.out_qs[i]->card = card;
2728 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2729 card->qdio.out_qs[i]->do_pack = 0;
2730 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2731 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2732 atomic_set(&card->qdio.out_qs[i]->state,
2733 QETH_OUT_Q_UNLOCKED);
2734 }
2735 return 0;
2736}
2737EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2738
2739static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2740{
2741 switch (link_type) {
2742 case QETH_LINK_TYPE_HSTR:
2743 return 2;
2744 default:
2745 return 1;
2746 }
2747}
2748
2749static void qeth_fill_ipacmd_header(struct qeth_card *card,
2750 struct qeth_ipa_cmd *cmd, __u8 command,
2751 enum qeth_prot_versions prot)
2752{
2753 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2754 cmd->hdr.command = command;
2755 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2756 cmd->hdr.seqno = card->seqno.ipa;
2757 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2758 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2759 if (card->options.layer2)
2760 cmd->hdr.prim_version_no = 2;
2761 else
2762 cmd->hdr.prim_version_no = 1;
2763 cmd->hdr.param_count = 1;
2764 cmd->hdr.prot_version = prot;
2765 cmd->hdr.ipa_supported = 0;
2766 cmd->hdr.ipa_enabled = 0;
2767}
2768
2769struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2770 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2771{
2772 struct qeth_cmd_buffer *iob;
2773 struct qeth_ipa_cmd *cmd;
2774
2775 iob = qeth_wait_for_buffer(&card->write);
2776 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2777 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2778
2779 return iob;
2780}
2781EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2782
2783void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2784 char prot_type)
2785{
2786 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2787 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2788 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2789 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2790}
2791EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2792
2793int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2794 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2795 unsigned long),
2796 void *reply_param)
2797{
2798 int rc;
2799 char prot_type;
4a71df50 2800
847a50fd 2801 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2802
2803 if (card->options.layer2)
2804 if (card->info.type == QETH_CARD_TYPE_OSN)
2805 prot_type = QETH_PROT_OSN2;
2806 else
2807 prot_type = QETH_PROT_LAYER2;
2808 else
2809 prot_type = QETH_PROT_TCPIP;
2810 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2811 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2812 iob, reply_cb, reply_param);
908abbb5
UB		 2813 if (rc == -ETIME) {
2814 qeth_clear_ipacmd_list(card);
2815 qeth_schedule_recovery(card);
2816 }
4a71df50
FB		 2817 return rc;
2818}
2819EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2820
4a71df50
FB		 2821int qeth_send_startlan(struct qeth_card *card)
2822{
2823 int rc;
70919e23 2824 struct qeth_cmd_buffer *iob;
4a71df50 2825
d11ba0c4 2826 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2827
70919e23
UB		 2828 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
2829 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2830 return rc;
2831}
2832EXPORT_SYMBOL_GPL(qeth_send_startlan);
2833
4a71df50
FB		 2834int qeth_default_setadapterparms_cb(struct qeth_card *card,
2835 struct qeth_reply *reply, unsigned long data)
2836{
2837 struct qeth_ipa_cmd *cmd;
2838
847a50fd 2839 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2840
2841 cmd = (struct qeth_ipa_cmd *) data;
2842 if (cmd->hdr.return_code == 0)
2843 cmd->hdr.return_code =
2844 cmd->data.setadapterparms.hdr.return_code;
2845 return 0;
2846}
2847EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2848
2849static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2850 struct qeth_reply *reply, unsigned long data)
2851{
2852 struct qeth_ipa_cmd *cmd;
2853
847a50fd 2854 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2855
2856 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2857 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2858 card->info.link_type =
2859 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2860 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2861 }
4a71df50
FB		 2862 card->options.adp.supported_funcs =
2863 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2864 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2865}
2866
2867struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2868 __u32 command, __u32 cmdlen)
2869{
2870 struct qeth_cmd_buffer *iob;
2871 struct qeth_ipa_cmd *cmd;
2872
2873 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2874 QETH_PROT_IPV4);
2875 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2876 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2877 cmd->data.setadapterparms.hdr.command_code = command;
2878 cmd->data.setadapterparms.hdr.used_total = 1;
2879 cmd->data.setadapterparms.hdr.seq_no = 1;
2880
2881 return iob;
2882}
2883EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2884
2885int qeth_query_setadapterparms(struct qeth_card *card)
2886{
2887 int rc;
2888 struct qeth_cmd_buffer *iob;
2889
847a50fd 2890 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 2891 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2892 sizeof(struct qeth_ipacmd_setadpparms));
2893 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2894 return rc;
2895}
2896EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2897
1da74b1c
FB		 2898static int qeth_query_ipassists_cb(struct qeth_card *card,
2899 struct qeth_reply *reply, unsigned long data)
2900{
2901 struct qeth_ipa_cmd *cmd;
2902
2903 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
2904
2905 cmd = (struct qeth_ipa_cmd *) data;
2906 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
2907 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
2908 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
2909 } else {
2910 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
2911 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
2912 }
2913 QETH_DBF_TEXT(SETUP, 2, "suppenbl");
2914 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported);
2915 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled);
2916 return 0;
2917}
2918
2919int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
2920{
2921 int rc;
2922 struct qeth_cmd_buffer *iob;
2923
2924 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
2925 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
2926 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
2927 return rc;
2928}
2929EXPORT_SYMBOL_GPL(qeth_query_ipassists);
2930
2931static int qeth_query_setdiagass_cb(struct qeth_card *card,
2932 struct qeth_reply *reply, unsigned long data)
2933{
2934 struct qeth_ipa_cmd *cmd;
2935 __u16 rc;
2936
2937 cmd = (struct qeth_ipa_cmd *)data;
2938 rc = cmd->hdr.return_code;
2939 if (rc)
2940 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
2941 else
2942 card->info.diagass_support = cmd->data.diagass.ext;
2943 return 0;
2944}
2945
2946static int qeth_query_setdiagass(struct qeth_card *card)
2947{
2948 struct qeth_cmd_buffer *iob;
2949 struct qeth_ipa_cmd *cmd;
2950
2951 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
2952 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
2953 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2954 cmd->data.diagass.subcmd_len = 16;
2955 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
2956 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
2957}
2958
2959static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
2960{
2961 unsigned long info = get_zeroed_page(GFP_KERNEL);
2962 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
2963 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
2964 struct ccw_dev_id ccwid;
2965 int level, rc;
2966
2967 tid->chpid = card->info.chpid;
2968 ccw_device_get_id(CARD_RDEV(card), &ccwid);
2969 tid->ssid = ccwid.ssid;
2970 tid->devno = ccwid.devno;
2971 if (!info)
2972 return;
2973
2974 rc = stsi(NULL, 0, 0, 0);
2975 if (rc == -ENOSYS)
2976 level = rc;
2977 else
2978 level = (((unsigned int) rc) >> 28);
2979
2980 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS))
2981 tid->lparnr = info222->lpar_number;
2982
2983 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) {
2984 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
2985 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
2986 }
2987 free_page(info);
2988 return;
2989}
2990
2991static int qeth_hw_trap_cb(struct qeth_card *card,
2992 struct qeth_reply *reply, unsigned long data)
2993{
2994 struct qeth_ipa_cmd *cmd;
2995 __u16 rc;
2996
2997 cmd = (struct qeth_ipa_cmd *)data;
2998 rc = cmd->hdr.return_code;
2999 if (rc)
3000 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3001 return 0;
3002}
3003
3004int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3005{
3006 struct qeth_cmd_buffer *iob;
3007 struct qeth_ipa_cmd *cmd;
3008
3009 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3010 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3011 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3012 cmd->data.diagass.subcmd_len = 80;
3013 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3014 cmd->data.diagass.type = 1;
3015 cmd->data.diagass.action = action;
3016 switch (action) {
3017 case QETH_DIAGS_TRAP_ARM:
3018 cmd->data.diagass.options = 0x0003;
3019 cmd->data.diagass.ext = 0x00010000 +
3020 sizeof(struct qeth_trap_id);
3021 qeth_get_trap_id(card,
3022 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3023 break;
3024 case QETH_DIAGS_TRAP_DISARM:
3025 cmd->data.diagass.options = 0x0001;
3026 break;
3027 case QETH_DIAGS_TRAP_CAPTURE:
3028 break;
3029 }
3030 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3031}
3032EXPORT_SYMBOL_GPL(qeth_hw_trap);
3033
76b11f8e
UB		 3034int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3035 unsigned int qdio_error, const char *dbftext)
4a71df50 3036{
779e6e1c 3037 if (qdio_error) {
847a50fd 3038 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3039 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3040 buf->element[15].sflags);
38593d01 3041 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3042 buf->element[14].sflags);
38593d01 3043 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3044 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3045 card->stats.rx_dropped++;
3046 return 0;
3047 } else
3048 return 1;
4a71df50
FB		 3049 }
3050 return 0;
3051}
3052EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3053
b3332930
FB		 3054void qeth_buffer_reclaim_work(struct work_struct *work)
3055{
3056 struct qeth_card *card = container_of(work, struct qeth_card,
3057 buffer_reclaim_work.work);
3058
3059 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3060 qeth_queue_input_buffer(card, card->reclaim_index);
3061}
3062
4a71df50
FB		 3063void qeth_queue_input_buffer(struct qeth_card *card, int index)
3064{
3065 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3066 struct list_head *lh;
4a71df50
FB		 3067 int count;
3068 int i;
3069 int rc;
3070 int newcount = 0;
3071
4a71df50
FB		 3072 count = (index < queue->next_buf_to_init)?
3073 card->qdio.in_buf_pool.buf_count -
3074 (queue->next_buf_to_init - index) :
3075 card->qdio.in_buf_pool.buf_count -
3076 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3077 /* only requeue at a certain threshold to avoid SIGAs */
3078 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3079 for (i = queue->next_buf_to_init;
3080 i < queue->next_buf_to_init + count; ++i) {
3081 if (qeth_init_input_buffer(card,
3082 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3083 break;
3084 } else {
3085 newcount++;
3086 }
3087 }
3088
3089 if (newcount < count) {
3090 /* we are in memory shortage so we switch back to
3091 traditional skb allocation and drop packages */
4a71df50
FB		 3092 atomic_set(&card->force_alloc_skb, 3);
3093 count = newcount;
3094 } else {
4a71df50
FB		 3095 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3096 }
3097
b3332930
FB		 3098 if (!count) {
3099 i = 0;
3100 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3101 i++;
3102 if (i == card->qdio.in_buf_pool.buf_count) {
3103 QETH_CARD_TEXT(card, 2, "qsarbw");
3104 card->reclaim_index = index;
3105 schedule_delayed_work(
3106 &card->buffer_reclaim_work,
3107 QETH_RECLAIM_WORK_TIME);
3108 }
3109 return;
3110 }
3111
4a71df50
FB		 3112 /*
3113 * according to old code it should be avoided to requeue all
3114 * 128 buffers in order to benefit from PCI avoidance.
3115 * this function keeps at least one buffer (the buffer at
3116 * 'index') un-requeued -> this buffer is the first buffer that
3117 * will be requeued the next time
3118 */
3119 if (card->options.performance_stats) {
3120 card->perf_stats.inbound_do_qdio_cnt++;
3121 card->perf_stats.inbound_do_qdio_start_time =
3122 qeth_get_micros();
3123 }
779e6e1c
JG		 3124 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3125 queue->next_buf_to_init, count);
4a71df50
FB		 3126 if (card->options.performance_stats)
3127 card->perf_stats.inbound_do_qdio_time +=
3128 qeth_get_micros() -
3129 card->perf_stats.inbound_do_qdio_start_time;
3130 if (rc) {
847a50fd 3131 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3132 }
3133 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3134 QDIO_MAX_BUFFERS_PER_Q;
3135 }
3136}
3137EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3138
3139static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3140 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3141{
3ec90878 3142 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3143
847a50fd 3144 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3145 if (card->info.type == QETH_CARD_TYPE_IQD) {
3146 if (sbalf15 == 0) {
3147 qdio_err = 0;
3148 } else {
3149 qdio_err = 1;
3150 }
3151 }
76b11f8e 3152 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3153
3154 if (!qdio_err)
4a71df50 3155 return QETH_SEND_ERROR_NONE;
d303b6fd
JG		 3156
3157 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3158 return QETH_SEND_ERROR_RETRY;
3159
847a50fd
CO		 3160 QETH_CARD_TEXT(card, 1, "lnkfail");
3161 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd
JG		 3162 (u16)qdio_err, (u8)sbalf15);
3163 return QETH_SEND_ERROR_LINK_FAILURE;
4a71df50
FB		 3164}
3165
3166/*
3167 * Switched to packing state if the number of used buffers on a queue
3168 * reaches a certain limit.
3169 */
3170static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3171{
3172 if (!queue->do_pack) {
3173 if (atomic_read(&queue->used_buffers)
3174 >= QETH_HIGH_WATERMARK_PACK){
3175 /* switch non-PACKING -> PACKING */
847a50fd 3176 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3177 if (queue->card->options.performance_stats)
3178 queue->card->perf_stats.sc_dp_p++;
3179 queue->do_pack = 1;
3180 }
3181 }
3182}
3183
3184/*
3185 * Switches from packing to non-packing mode. If there is a packing
3186 * buffer on the queue this buffer will be prepared to be flushed.
3187 * In that case 1 is returned to inform the caller. If no buffer
3188 * has to be flushed, zero is returned.
3189 */
3190static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3191{
3192 struct qeth_qdio_out_buffer *buffer;
3193 int flush_count = 0;
3194
3195 if (queue->do_pack) {
3196 if (atomic_read(&queue->used_buffers)
3197 <= QETH_LOW_WATERMARK_PACK) {
3198 /* switch PACKING -> non-PACKING */
847a50fd 3199 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3200 if (queue->card->options.performance_stats)
3201 queue->card->perf_stats.sc_p_dp++;
3202 queue->do_pack = 0;
3203 /* flush packing buffers */
0da9581d 3204 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3205 if ((atomic_read(&buffer->state) ==
3206 QETH_QDIO_BUF_EMPTY) &&
3207 (buffer->next_element_to_fill > 0)) {
3208 atomic_set(&buffer->state,
0da9581d 3209 QETH_QDIO_BUF_PRIMED);
4a71df50
FB		 3210 flush_count++;
3211 queue->next_buf_to_fill =
3212 (queue->next_buf_to_fill + 1) %
3213 QDIO_MAX_BUFFERS_PER_Q;
3214 }
3215 }
3216 }
3217 return flush_count;
3218}
3219
0da9581d 3220
4a71df50
FB		 3221/*
3222 * Called to flush a packing buffer if no more pci flags are on the queue.
3223 * Checks if there is a packing buffer and prepares it to be flushed.
3224 * In that case returns 1, otherwise zero.
3225 */
3226static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3227{
3228 struct qeth_qdio_out_buffer *buffer;
3229
0da9581d 3230 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3231 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3232 (buffer->next_element_to_fill > 0)) {
3233 /* it's a packing buffer */
3234 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3235 queue->next_buf_to_fill =
3236 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3237 return 1;
3238 }
3239 return 0;
3240}
3241
779e6e1c
JG		 3242static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3243 int count)
4a71df50
FB		 3244{
3245 struct qeth_qdio_out_buffer *buf;
3246 int rc;
3247 int i;
3248 unsigned int qdio_flags;
3249
4a71df50 3250 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3251 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3252 buf = queue->bufs[bidx];
3ec90878
JG		 3253 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3254 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3255
0da9581d
EL		 3256 if (queue->bufstates)
3257 queue->bufstates[bidx].user = buf;
3258
4a71df50
FB		 3259 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3260 continue;
3261
3262 if (!queue->do_pack) {
3263 if ((atomic_read(&queue->used_buffers) >=
3264 (QETH_HIGH_WATERMARK_PACK -
3265 QETH_WATERMARK_PACK_FUZZ)) &&
3266 !atomic_read(&queue->set_pci_flags_count)) {
3267 /* it's likely that we'll go to packing
3268 * mode soon */
3269 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3270 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3271 }
3272 } else {
3273 if (!atomic_read(&queue->set_pci_flags_count)) {
3274 /*
3275 * there's no outstanding PCI any more, so we
3276 * have to request a PCI to be sure the the PCI
3277 * will wake at some time in the future then we
3278 * can flush packed buffers that might still be
3279 * hanging around, which can happen if no
3280 * further send was requested by the stack
3281 */
3282 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3283 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3284 }
3285 }
3286 }
3287
3288 queue->card->dev->trans_start = jiffies;
3289 if (queue->card->options.performance_stats) {
3290 queue->card->perf_stats.outbound_do_qdio_cnt++;
3291 queue->card->perf_stats.outbound_do_qdio_start_time =
3292 qeth_get_micros();
3293 }
3294 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3295 if (atomic_read(&queue->set_pci_flags_count))
3296 qdio_flags |= QDIO_FLAG_PCI_OUT;
3297 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3298 queue->queue_no, index, count);
4a71df50
FB		 3299 if (queue->card->options.performance_stats)
3300 queue->card->perf_stats.outbound_do_qdio_time +=
3301 qeth_get_micros() -
3302 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3303 atomic_add(count, &queue->used_buffers);
4a71df50 3304 if (rc) {
d303b6fd
JG		 3305 queue->card->stats.tx_errors += count;
3306 /* ignore temporary SIGA errors without busy condition */
3307 if (rc == QDIO_ERROR_SIGA_TARGET)
3308 return;
847a50fd 3309 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3310 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3311 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3312 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3313 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3314
4a71df50
FB		 3315 /* this must not happen under normal circumstances. if it
3316 * happens something is really wrong -> recover */
3317 qeth_schedule_recovery(queue->card);
3318 return;
3319 }
4a71df50
FB		 3320 if (queue->card->options.performance_stats)
3321 queue->card->perf_stats.bufs_sent += count;
3322}
3323
3324static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3325{
3326 int index;
3327 int flush_cnt = 0;
3328 int q_was_packing = 0;
3329
3330 /*
3331 * check if weed have to switch to non-packing mode or if
3332 * we have to get a pci flag out on the queue
3333 */
3334 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3335 !atomic_read(&queue->set_pci_flags_count)) {
3336 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3337 QETH_OUT_Q_UNLOCKED) {
3338 /*
3339 * If we get in here, there was no action in
3340 * do_send_packet. So, we check if there is a
3341 * packing buffer to be flushed here.
3342 */
3343 netif_stop_queue(queue->card->dev);
3344 index = queue->next_buf_to_fill;
3345 q_was_packing = queue->do_pack;
3346 /* queue->do_pack may change */
3347 barrier();
3348 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3349 if (!flush_cnt &&
3350 !atomic_read(&queue->set_pci_flags_count))
3351 flush_cnt +=
3352 qeth_flush_buffers_on_no_pci(queue);
3353 if (queue->card->options.performance_stats &&
3354 q_was_packing)
3355 queue->card->perf_stats.bufs_sent_pack +=
3356 flush_cnt;
3357 if (flush_cnt)
779e6e1c 3358 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3359 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3360 }
3361 }
3362}
3363
a1c3ed4c
FB		 3364void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3365 unsigned long card_ptr)
3366{
3367 struct qeth_card *card = (struct qeth_card *)card_ptr;
3368
0cffef48 3369 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3370 napi_schedule(&card->napi);
3371}
3372EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3373
0da9581d
EL		 3374int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3375{
3376 int rc;
3377
3378 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3379 rc = -1;
3380 goto out;
3381 } else {
3382 if (card->options.cq == cq) {
3383 rc = 0;
3384 goto out;
3385 }
3386
3387 if (card->state != CARD_STATE_DOWN &&
3388 card->state != CARD_STATE_RECOVER) {
3389 rc = -1;
3390 goto out;
3391 }
3392
3393 qeth_free_qdio_buffers(card);
3394 card->options.cq = cq;
3395 rc = 0;
3396 }
3397out:
3398 return rc;
3399
3400}
3401EXPORT_SYMBOL_GPL(qeth_configure_cq);
3402
3403
3404static void qeth_qdio_cq_handler(struct qeth_card *card,
3405 unsigned int qdio_err,
3406 unsigned int queue, int first_element, int count) {
3407 struct qeth_qdio_q *cq = card->qdio.c_q;
3408 int i;
3409 int rc;
3410
3411 if (!qeth_is_cq(card, queue))
3412 goto out;
3413
3414 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3415 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3416 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3417
3418 if (qdio_err) {
3419 netif_stop_queue(card->dev);
3420 qeth_schedule_recovery(card);
3421 goto out;
3422 }
3423
3424 if (card->options.performance_stats) {
3425 card->perf_stats.cq_cnt++;
3426 card->perf_stats.cq_start_time = qeth_get_micros();
3427 }
3428
3429 for (i = first_element; i < first_element + count; ++i) {
3430 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3431 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx];
3432 int e;
3433
3434 e = 0;
3435 while (buffer->element[e].addr) {
3436 unsigned long phys_aob_addr;
3437
3438 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3439 qeth_qdio_handle_aob(card, phys_aob_addr);
3440 buffer->element[e].addr = NULL;
3441 buffer->element[e].eflags = 0;
3442 buffer->element[e].sflags = 0;
3443 buffer->element[e].length = 0;
3444
3445 ++e;
3446 }
3447
3448 buffer->element[15].eflags = 0;
3449 buffer->element[15].sflags = 0;
3450 }
3451 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3452 card->qdio.c_q->next_buf_to_init,
3453 count);
3454 if (rc) {
3455 dev_warn(&card->gdev->dev,
3456 "QDIO reported an error, rc=%i\n", rc);
3457 QETH_CARD_TEXT(card, 2, "qcqherr");
3458 }
3459 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3460 + count) % QDIO_MAX_BUFFERS_PER_Q;
3461
3462 netif_wake_queue(card->dev);
3463
3464 if (card->options.performance_stats) {
3465 int delta_t = qeth_get_micros();
3466 delta_t -= card->perf_stats.cq_start_time;
3467 card->perf_stats.cq_time += delta_t;
3468 }
3469out:
3470 return;
3471}
3472
a1c3ed4c 3473void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3474 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3475 unsigned long card_ptr)
3476{
3477 struct qeth_card *card = (struct qeth_card *)card_ptr;
3478
0da9581d
EL		 3479 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3480 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3481
3482 if (qeth_is_cq(card, queue))
3483 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3484 else if (qdio_err)
a1c3ed4c 3485 qeth_schedule_recovery(card);
0da9581d
EL		 3486
3487
a1c3ed4c
FB		 3488}
3489EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3490
779e6e1c
JG		 3491void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3492 unsigned int qdio_error, int __queue, int first_element,
3493 int count, unsigned long card_ptr)
4a71df50
FB		 3494{
3495 struct qeth_card *card = (struct qeth_card *) card_ptr;
3496 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3497 struct qeth_qdio_out_buffer *buffer;
3498 int i;
3499
847a50fd 3500 QETH_CARD_TEXT(card, 6, "qdouhdl");
779e6e1c 3501 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
847a50fd 3502 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3503 netif_stop_queue(card->dev);
3504 qeth_schedule_recovery(card);
3505 return;
4a71df50
FB		 3506 }
3507 if (card->options.performance_stats) {
3508 card->perf_stats.outbound_handler_cnt++;
3509 card->perf_stats.outbound_handler_start_time =
3510 qeth_get_micros();
3511 }
3512 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3513 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3514 buffer = queue->bufs[bidx];
b67d801f 3515 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3516
3517 if (queue->bufstates &&
3518 (queue->bufstates[bidx].flags &
3519 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
b3332930
FB		 3520 BUG_ON(card->options.cq != QETH_CQ_ENABLED);
3521
3522 if (atomic_cmpxchg(&buffer->state,
3523 QETH_QDIO_BUF_PRIMED,
3524 QETH_QDIO_BUF_PENDING) ==
3525 QETH_QDIO_BUF_PRIMED) {
3526 qeth_notify_skbs(queue, buffer,
3527 TX_NOTIFY_PENDING);
3528 }
0da9581d
EL		 3529 buffer->aob = queue->bufstates[bidx].aob;
3530 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3531 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3532 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3533 virt_to_phys(buffer->aob));
3534 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q);
b3332930
FB		 3535 if (qeth_init_qdio_out_buf(queue, bidx)) {
3536 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3537 qeth_schedule_recovery(card);
b3332930 3538 }
0da9581d 3539 } else {
b3332930
FB		 3540 if (card->options.cq == QETH_CQ_ENABLED) {
3541 enum iucv_tx_notify n;
3542
3543 n = qeth_compute_cq_notification(
3544 buffer->buffer->element[15].sflags, 0);
3545 qeth_notify_skbs(queue, buffer, n);
3546 }
3547
0da9581d
EL		 3548 qeth_clear_output_buffer(queue, buffer,
3549 QETH_QDIO_BUF_EMPTY);
3550 }
3551 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3552 }
3553 atomic_sub(count, &queue->used_buffers);
3554 /* check if we need to do something on this outbound queue */
3555 if (card->info.type != QETH_CARD_TYPE_IQD)
3556 qeth_check_outbound_queue(queue);
3557
3558 netif_wake_queue(queue->card->dev);
3559 if (card->options.performance_stats)
3560 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3561 card->perf_stats.outbound_handler_start_time;
3562}
3563EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3564
4a71df50
FB		 3565int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3566 int ipv, int cast_type)
3567{
5113fec0
UB		 3568 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD ||
3569 card->info.type == QETH_CARD_TYPE_OSX))
4a71df50
FB		 3570 return card->qdio.default_out_queue;
3571 switch (card->qdio.no_out_queues) {
3572 case 4:
3573 if (cast_type && card->info.is_multicast_different)
3574 return card->info.is_multicast_different &
3575 (card->qdio.no_out_queues - 1);
3576 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3577 const u8 tos = ip_hdr(skb)->tos;
3578
3579 if (card->qdio.do_prio_queueing ==
3580 QETH_PRIO_Q_ING_TOS) {
3581 if (tos & IP_TOS_NOTIMPORTANT)
3582 return 3;
3583 if (tos & IP_TOS_HIGHRELIABILITY)
3584 return 2;
3585 if (tos & IP_TOS_HIGHTHROUGHPUT)
3586 return 1;
3587 if (tos & IP_TOS_LOWDELAY)
3588 return 0;
3589 }
3590 if (card->qdio.do_prio_queueing ==
3591 QETH_PRIO_Q_ING_PREC)
3592 return 3 - (tos >> 6);
3593 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3594 /* TODO: IPv6!!! */
3595 }
3596 return card->qdio.default_out_queue;
3597 case 1: /* fallthrough for single-out-queue 1920-device */
3598 default:
3599 return card->qdio.default_out_queue;
3600 }
3601}
3602EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3603
4a71df50
FB		 3604int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3605 struct sk_buff *skb, int elems)
3606{
51aa165c
FB		 3607 int dlen = skb->len - skb->data_len;
3608 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3609 PFN_DOWN((unsigned long)skb->data);
4a71df50 3610
51aa165c 3611 elements_needed += skb_shinfo(skb)->nr_frags;
4a71df50 3612 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3613 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3614 "(Number=%d / Length=%d). Discarded.\n",
3615 (elements_needed+elems), skb->len);
3616 return 0;
3617 }
3618 return elements_needed;
3619}
3620EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3621
51aa165c
FB		 3622int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len)
3623{
3624 int hroom, inpage, rest;
3625
3626 if (((unsigned long)skb->data & PAGE_MASK) !=
3627 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3628 hroom = skb_headroom(skb);
3629 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3630 rest = len - inpage;
3631 if (rest > hroom)
3632 return 1;
3633 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3634 skb->data -= rest;
3635 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3636 }
3637 return 0;
3638}
3639EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3640
f90b744e 3641static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3642 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3643 int offset)
4a71df50 3644{
51aa165c 3645 int length = skb->len - skb->data_len;
4a71df50
FB		 3646 int length_here;
3647 int element;
3648 char *data;
51aa165c
FB		 3649 int first_lap, cnt;
3650 struct skb_frag_struct *frag;
4a71df50
FB		 3651
3652 element = *next_element_to_fill;
3653 data = skb->data;
3654 first_lap = (is_tso == 0 ? 1 : 0);
3655
683d718a
FB		 3656 if (offset >= 0) {
3657 data = skb->data + offset;
e1f03ae8 3658 length -= offset;
683d718a
FB		 3659 first_lap = 0;
3660 }
3661
4a71df50
FB		 3662 while (length > 0) {
3663 /* length_here is the remaining amount of data in this page */
3664 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3665 if (length < length_here)
3666 length_here = length;
3667
3668 buffer->element[element].addr = data;
3669 buffer->element[element].length = length_here;
3670 length -= length_here;
3671 if (!length) {
3672 if (first_lap)
51aa165c 3673 if (skb_shinfo(skb)->nr_frags)
3ec90878
JG		 3674 buffer->element[element].eflags =
3675 SBAL_EFLAGS_FIRST_FRAG;
51aa165c 3676 else
3ec90878 3677 buffer->element[element].eflags = 0;
4a71df50 3678 else
3ec90878
JG		 3679 buffer->element[element].eflags =
3680 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3681 } else {
3682 if (first_lap)
3ec90878
JG		 3683 buffer->element[element].eflags =
3684 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3685 else
3ec90878
JG		 3686 buffer->element[element].eflags =
3687 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3688 }
3689 data += length_here;
3690 element++;
3691 first_lap = 0;
3692 }
51aa165c
FB		 3693
3694 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3695 frag = &skb_shinfo(skb)->frags[cnt];
8d36bb0d
IC		 3696 buffer->element[element].addr = (char *)
3697 page_to_phys(skb_frag_page(frag))
51aa165c
FB		 3698 + frag->page_offset;
3699 buffer->element[element].length = frag->size;
3ec90878 3700 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG;
51aa165c
FB		 3701 element++;
3702 }
3703
3ec90878
JG		 3704 if (buffer->element[element - 1].eflags)
3705 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
4a71df50
FB		 3706 *next_element_to_fill = element;
3707}
3708
f90b744e 3709static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3710 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3711 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3712{
3713 struct qdio_buffer *buffer;
4a71df50
FB		 3714 int flush_cnt = 0, hdr_len, large_send = 0;
3715
4a71df50
FB		 3716 buffer = buf->buffer;
3717 atomic_inc(&skb->users);
3718 skb_queue_tail(&buf->skb_list, skb);
3719
4a71df50 3720 /*check first on TSO ....*/
683d718a 3721 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3722 int element = buf->next_element_to_fill;
3723
683d718a
FB		 3724 hdr_len = sizeof(struct qeth_hdr_tso) +
3725 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3726 /*fill first buffer entry only with header information */
3727 buffer->element[element].addr = skb->data;
3728 buffer->element[element].length = hdr_len;
3ec90878 3729 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4a71df50
FB		 3730 buf->next_element_to_fill++;
3731 skb->data += hdr_len;
3732 skb->len -= hdr_len;
3733 large_send = 1;
3734 }
683d718a
FB		 3735
3736 if (offset >= 0) {
3737 int element = buf->next_element_to_fill;
3738 buffer->element[element].addr = hdr;
3739 buffer->element[element].length = sizeof(struct qeth_hdr) +
3740 hd_len;
3ec90878 3741 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
683d718a
FB		 3742 buf->is_header[element] = 1;
3743 buf->next_element_to_fill++;
3744 }
3745
51aa165c
FB		 3746 __qeth_fill_buffer(skb, buffer, large_send,
3747 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3748
3749 if (!queue->do_pack) {
847a50fd 3750 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 3751 /* set state to PRIMED -> will be flushed */
3752 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3753 flush_cnt = 1;
3754 } else {
847a50fd 3755 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 3756 if (queue->card->options.performance_stats)
3757 queue->card->perf_stats.skbs_sent_pack++;
3758 if (buf->next_element_to_fill >=
3759 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3760 /*
3761 * packed buffer if full -> set state PRIMED
3762 * -> will be flushed
3763 */
3764 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3765 flush_cnt = 1;
3766 }
3767 }
3768 return flush_cnt;
3769}
3770
3771int qeth_do_send_packet_fast(struct qeth_card *card,
3772 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3773 struct qeth_hdr *hdr, int elements_needed,
64ef8957 3774 int offset, int hd_len)
4a71df50
FB		 3775{
3776 struct qeth_qdio_out_buffer *buffer;
4a71df50
FB		 3777 int index;
3778
4a71df50
FB		 3779 /* spin until we get the queue ... */
3780 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3781 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3782 /* ... now we've got the queue */
3783 index = queue->next_buf_to_fill;
0da9581d 3784 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3785 /*
3786 * check if buffer is empty to make sure that we do not 'overtake'
3787 * ourselves and try to fill a buffer that is already primed
3788 */
3789 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3790 goto out;
64ef8957 3791 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4a71df50 3792 QDIO_MAX_BUFFERS_PER_Q;
4a71df50 3793 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
64ef8957
FB		 3794 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3795 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3796 return 0;
3797out:
3798 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3799 return -EBUSY;
3800}
3801EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3802
3803int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3804 struct sk_buff *skb, struct qeth_hdr *hdr,
64ef8957 3805 int elements_needed)
4a71df50
FB		 3806{
3807 struct qeth_qdio_out_buffer *buffer;
3808 int start_index;
3809 int flush_count = 0;
3810 int do_pack = 0;
3811 int tmp;
3812 int rc = 0;
3813
4a71df50
FB		 3814 /* spin until we get the queue ... */
3815 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3816 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3817 start_index = queue->next_buf_to_fill;
0da9581d 3818 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 3819 /*
3820 * check if buffer is empty to make sure that we do not 'overtake'
3821 * ourselves and try to fill a buffer that is already primed
3822 */
3823 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3824 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3825 return -EBUSY;
3826 }
3827 /* check if we need to switch packing state of this queue */
3828 qeth_switch_to_packing_if_needed(queue);
3829 if (queue->do_pack) {
3830 do_pack = 1;
64ef8957
FB		 3831 /* does packet fit in current buffer? */
3832 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3833 buffer->next_element_to_fill) < elements_needed) {
3834 /* ... no -> set state PRIMED */
3835 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3836 flush_count++;
3837 queue->next_buf_to_fill =
3838 (queue->next_buf_to_fill + 1) %
3839 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 3840 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 3841 /* we did a step forward, so check buffer state
3842 * again */
3843 if (atomic_read(&buffer->state) !=
3844 QETH_QDIO_BUF_EMPTY) {
3845 qeth_flush_buffers(queue, start_index,
779e6e1c 3846 flush_count);
64ef8957 3847 atomic_set(&queue->state,
4a71df50 3848 QETH_OUT_Q_UNLOCKED);
64ef8957 3849 return -EBUSY;
4a71df50
FB		 3850 }
3851 }
3852 }
64ef8957 3853 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3854 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3855 QDIO_MAX_BUFFERS_PER_Q;
3856 flush_count += tmp;
4a71df50 3857 if (flush_count)
779e6e1c 3858 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3859 else if (!atomic_read(&queue->set_pci_flags_count))
3860 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3861 /*
3862 * queue->state will go from LOCKED -> UNLOCKED or from
3863 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3864 * (switch packing state or flush buffer to get another pci flag out).
3865 * In that case we will enter this loop
3866 */
3867 while (atomic_dec_return(&queue->state)) {
3868 flush_count = 0;
3869 start_index = queue->next_buf_to_fill;
3870 /* check if we can go back to non-packing state */
3871 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3872 /*
3873 * check if we need to flush a packing buffer to get a pci
3874 * flag out on the queue
3875 */
3876 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3877 flush_count += qeth_flush_buffers_on_no_pci(queue);
3878 if (flush_count)
779e6e1c 3879 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3880 }
3881 /* at this point the queue is UNLOCKED again */
3882 if (queue->card->options.performance_stats && do_pack)
3883 queue->card->perf_stats.bufs_sent_pack += flush_count;
3884
3885 return rc;
3886}
3887EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3888
3889static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3890 struct qeth_reply *reply, unsigned long data)
3891{
3892 struct qeth_ipa_cmd *cmd;
3893 struct qeth_ipacmd_setadpparms *setparms;
3894
847a50fd 3895 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 3896
3897 cmd = (struct qeth_ipa_cmd *) data;
3898 setparms = &(cmd->data.setadapterparms);
3899
3900 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3901 if (cmd->hdr.return_code) {
847a50fd 3902 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3903 setparms->data.mode = SET_PROMISC_MODE_OFF;
3904 }
3905 card->info.promisc_mode = setparms->data.mode;
3906 return 0;
3907}
3908
3909void qeth_setadp_promisc_mode(struct qeth_card *card)
3910{
3911 enum qeth_ipa_promisc_modes mode;
3912 struct net_device *dev = card->dev;
3913 struct qeth_cmd_buffer *iob;
3914 struct qeth_ipa_cmd *cmd;
3915
847a50fd 3916 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 3917
3918 if (((dev->flags & IFF_PROMISC) &&
3919 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3920 (!(dev->flags & IFF_PROMISC) &&
3921 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3922 return;
3923 mode = SET_PROMISC_MODE_OFF;
3924 if (dev->flags & IFF_PROMISC)
3925 mode = SET_PROMISC_MODE_ON;
847a50fd 3926 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 3927
3928 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3929 sizeof(struct qeth_ipacmd_setadpparms));
3930 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3931 cmd->data.setadapterparms.data.mode = mode;
3932 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3933}
3934EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3935
3936int qeth_change_mtu(struct net_device *dev, int new_mtu)
3937{
3938 struct qeth_card *card;
3939 char dbf_text[15];
3940
509e2562 3941 card = dev->ml_priv;
4a71df50 3942
847a50fd 3943 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 3944 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 3945 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50
FB		 3946
3947 if (new_mtu < 64)
3948 return -EINVAL;
3949 if (new_mtu > 65535)
3950 return -EINVAL;
3951 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3952 (!qeth_mtu_is_valid(card, new_mtu)))
3953 return -EINVAL;
3954 dev->mtu = new_mtu;
3955 return 0;
3956}
3957EXPORT_SYMBOL_GPL(qeth_change_mtu);
3958
3959struct net_device_stats *qeth_get_stats(struct net_device *dev)
3960{
3961 struct qeth_card *card;
3962
509e2562 3963 card = dev->ml_priv;
4a71df50 3964
847a50fd 3965 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 3966
3967 return &card->stats;
3968}
3969EXPORT_SYMBOL_GPL(qeth_get_stats);
3970
3971static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3972 struct qeth_reply *reply, unsigned long data)
3973{
3974 struct qeth_ipa_cmd *cmd;
3975
847a50fd 3976 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 3977
3978 cmd = (struct qeth_ipa_cmd *) data;
3979 if (!card->options.layer2 ||
3980 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3981 memcpy(card->dev->dev_addr,
3982 &cmd->data.setadapterparms.data.change_addr.addr,
3983 OSA_ADDR_LEN);
3984 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3985 }
3986 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3987 return 0;
3988}
3989
3990int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3991{
3992 int rc;
3993 struct qeth_cmd_buffer *iob;
3994 struct qeth_ipa_cmd *cmd;
3995
847a50fd 3996 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 3997
3998 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3999 sizeof(struct qeth_ipacmd_setadpparms));
4000 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4001 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4002 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4003 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4004 card->dev->dev_addr, OSA_ADDR_LEN);
4005 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4006 NULL);
4007 return rc;
4008}
4009EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4010
d64ecc22
EL		 4011static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4012 struct qeth_reply *reply, unsigned long data)
4013{
4014 struct qeth_ipa_cmd *cmd;
4015 struct qeth_set_access_ctrl *access_ctrl_req;
d64ecc22 4016
847a50fd 4017 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4018
4019 cmd = (struct qeth_ipa_cmd *) data;
4020 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4021 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4022 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4023 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4024 cmd->data.setadapterparms.hdr.return_code);
4025 switch (cmd->data.setadapterparms.hdr.return_code) {
4026 case SET_ACCESS_CTRL_RC_SUCCESS:
4027 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4028 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4029 {
4030 card->options.isolation = access_ctrl_req->subcmd_code;
4031 if (card->options.isolation == ISOLATION_MODE_NONE) {
4032 dev_info(&card->gdev->dev,
4033 "QDIO data connection isolation is deactivated\n");
4034 } else {
4035 dev_info(&card->gdev->dev,
4036 "QDIO data connection isolation is activated\n");
4037 }
4038 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n",
4039 card->gdev->dev.kobj.name,
4040 access_ctrl_req->subcmd_code,
4041 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4042 break;
4043 }
4044 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4045 {
4046 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4047 card->gdev->dev.kobj.name,
4048 access_ctrl_req->subcmd_code,
4049 cmd->data.setadapterparms.hdr.return_code);
4050 dev_err(&card->gdev->dev, "Adapter does not "
4051 "support QDIO data connection isolation\n");
4052
4053 /* ensure isolation mode is "none" */
4054 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4055 break;
4056 }
4057 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4058 {
4059 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4060 card->gdev->dev.kobj.name,
4061 access_ctrl_req->subcmd_code,
4062 cmd->data.setadapterparms.hdr.return_code);
4063 dev_err(&card->gdev->dev,
4064 "Adapter is dedicated. "
4065 "QDIO data connection isolation not supported\n");
4066
4067 /* ensure isolation mode is "none" */
4068 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4069 break;
4070 }
4071 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4072 {
4073 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n",
4074 card->gdev->dev.kobj.name,
4075 access_ctrl_req->subcmd_code,
4076 cmd->data.setadapterparms.hdr.return_code);
4077 dev_err(&card->gdev->dev,
4078 "TSO does not permit QDIO data connection isolation\n");
4079
4080 /* ensure isolation mode is "none" */
4081 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4082 break;
4083 }
4084 default:
4085 {
4086 /* this should never happen */
4087 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d"
4088 "==UNKNOWN\n",
4089 card->gdev->dev.kobj.name,
4090 access_ctrl_req->subcmd_code,
4091 cmd->data.setadapterparms.hdr.return_code);
4092
4093 /* ensure isolation mode is "none" */
4094 card->options.isolation = ISOLATION_MODE_NONE;
d64ecc22
EL		 4095 break;
4096 }
4097 }
4098 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4099 return 0;
d64ecc22
EL		 4100}
4101
4102static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4103 enum qeth_ipa_isolation_modes isolation)
4104{
4105 int rc;
4106 struct qeth_cmd_buffer *iob;
4107 struct qeth_ipa_cmd *cmd;
4108 struct qeth_set_access_ctrl *access_ctrl_req;
4109
847a50fd 4110 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4111
4112 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4113 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4114
4115 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4116 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4117 sizeof(struct qeth_set_access_ctrl));
4118 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4119 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4120 access_ctrl_req->subcmd_code = isolation;
4121
4122 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4123 NULL);
4124 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4125 return rc;
4126}
4127
4128int qeth_set_access_ctrl_online(struct qeth_card *card)
4129{
4130 int rc = 0;
4131
847a50fd 4132 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4133
5113fec0
UB		 4134 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4135 card->info.type == QETH_CARD_TYPE_OSX) &&
4136 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22
EL		 4137 rc = qeth_setadpparms_set_access_ctrl(card,
4138 card->options.isolation);
4139 if (rc) {
4140 QETH_DBF_MESSAGE(3,
5113fec0 4141 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4142 card->gdev->dev.kobj.name,
4143 rc);
4144 }
4145 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4146 card->options.isolation = ISOLATION_MODE_NONE;
4147
4148 dev_err(&card->gdev->dev, "Adapter does not "
4149 "support QDIO data connection isolation\n");
4150 rc = -EOPNOTSUPP;
4151 }
4152 return rc;
4153}
4154EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4155
4a71df50
FB		 4156void qeth_tx_timeout(struct net_device *dev)
4157{
4158 struct qeth_card *card;
4159
509e2562 4160 card = dev->ml_priv;
847a50fd 4161 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4162 card->stats.tx_errors++;
4163 qeth_schedule_recovery(card);
4164}
4165EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4166
4167int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4168{
509e2562 4169 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4170 int rc = 0;
4171
4172 switch (regnum) {
4173 case MII_BMCR: /* Basic mode control register */
4174 rc = BMCR_FULLDPLX;
4175 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4176 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4177 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4178 rc |= BMCR_SPEED100;
4179 break;
4180 case MII_BMSR: /* Basic mode status register */
4181 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4182 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4183 BMSR_100BASE4;
4184 break;
4185 case MII_PHYSID1: /* PHYS ID 1 */
4186 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4187 dev->dev_addr[2];
4188 rc = (rc >> 5) & 0xFFFF;
4189 break;
4190 case MII_PHYSID2: /* PHYS ID 2 */
4191 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4192 break;
4193 case MII_ADVERTISE: /* Advertisement control reg */
4194 rc = ADVERTISE_ALL;
4195 break;
4196 case MII_LPA: /* Link partner ability reg */
4197 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4198 LPA_100BASE4 | LPA_LPACK;
4199 break;
4200 case MII_EXPANSION: /* Expansion register */
4201 break;
4202 case MII_DCOUNTER: /* disconnect counter */
4203 break;
4204 case MII_FCSCOUNTER: /* false carrier counter */
4205 break;
4206 case MII_NWAYTEST: /* N-way auto-neg test register */
4207 break;
4208 case MII_RERRCOUNTER: /* rx error counter */
4209 rc = card->stats.rx_errors;
4210 break;
4211 case MII_SREVISION: /* silicon revision */
4212 break;
4213 case MII_RESV1: /* reserved 1 */
4214 break;
4215 case MII_LBRERROR: /* loopback, rx, bypass error */
4216 break;
4217 case MII_PHYADDR: /* physical address */
4218 break;
4219 case MII_RESV2: /* reserved 2 */
4220 break;
4221 case MII_TPISTATUS: /* TPI status for 10mbps */
4222 break;
4223 case MII_NCONFIG: /* network interface config */
4224 break;
4225 default:
4226 break;
4227 }
4228 return rc;
4229}
4230EXPORT_SYMBOL_GPL(qeth_mdio_read);
4231
4232static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4233 struct qeth_cmd_buffer *iob, int len,
4234 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4235 unsigned long),
4236 void *reply_param)
4237{
4238 u16 s1, s2;
4239
847a50fd 4240 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4241
4242 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4243 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4244 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4245 /* adjust PDU length fields in IPA_PDU_HEADER */
4246 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4247 s2 = (u32) len;
4248 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4249 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4250 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4251 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4252 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4253 reply_cb, reply_param);
4254}
4255
4256static int qeth_snmp_command_cb(struct qeth_card *card,
4257 struct qeth_reply *reply, unsigned long sdata)
4258{
4259 struct qeth_ipa_cmd *cmd;
4260 struct qeth_arp_query_info *qinfo;
4261 struct qeth_snmp_cmd *snmp;
4262 unsigned char *data;
4263 __u16 data_len;
4264
847a50fd 4265 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4266
4267 cmd = (struct qeth_ipa_cmd *) sdata;
4268 data = (unsigned char *)((char *)cmd - reply->offset);
4269 qinfo = (struct qeth_arp_query_info *) reply->param;
4270 snmp = &cmd->data.setadapterparms.data.snmp;
4271
4272 if (cmd->hdr.return_code) {
847a50fd 4273 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 4274 return 0;
4275 }
4276 if (cmd->data.setadapterparms.hdr.return_code) {
4277 cmd->hdr.return_code =
4278 cmd->data.setadapterparms.hdr.return_code;
847a50fd 4279 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 4280 return 0;
4281 }
4282 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4283 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4284 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4285 else
4286 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4287
4288 /* check if there is enough room in userspace */
4289 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4290 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 4291 cmd->hdr.return_code = -ENOMEM;
4292 return 0;
4293 }
847a50fd 4294 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4295 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4296 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4297 cmd->data.setadapterparms.hdr.seq_no);
4298 /*copy entries to user buffer*/
4299 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4300 memcpy(qinfo->udata + qinfo->udata_offset,
4301 (char *)snmp,
4302 data_len + offsetof(struct qeth_snmp_cmd, data));
4303 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4304 } else {
4305 memcpy(qinfo->udata + qinfo->udata_offset,
4306 (char *)&snmp->request, data_len);
4307 }
4308 qinfo->udata_offset += data_len;
4309 /* check if all replies received ... */
847a50fd 4310 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4311 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4312 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4313 cmd->data.setadapterparms.hdr.seq_no);
4314 if (cmd->data.setadapterparms.hdr.seq_no <
4315 cmd->data.setadapterparms.hdr.used_total)
4316 return 1;
4317 return 0;
4318}
4319
4320int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4321{
4322 struct qeth_cmd_buffer *iob;
4323 struct qeth_ipa_cmd *cmd;
4324 struct qeth_snmp_ureq *ureq;
4325 int req_len;
4326 struct qeth_arp_query_info qinfo = {0, };
4327 int rc = 0;
4328
847a50fd 4329 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4330
4331 if (card->info.guestlan)
4332 return -EOPNOTSUPP;
4333
4334 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4335 (!card->options.layer2)) {
4a71df50
FB		 4336 return -EOPNOTSUPP;
4337 }
4338 /* skip 4 bytes (data_len struct member) to get req_len */
4339 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4340 return -EFAULT;
4986f3f0
JL		 4341 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4342 if (IS_ERR(ureq)) {
847a50fd 4343 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4344 return PTR_ERR(ureq);
4a71df50
FB		 4345 }
4346 qinfo.udata_len = ureq->hdr.data_len;
4347 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4348 if (!qinfo.udata) {
4349 kfree(ureq);
4350 return -ENOMEM;
4351 }
4352 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4353
4354 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4355 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4356 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4357 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4358 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4359 qeth_snmp_command_cb, (void *)&qinfo);
4360 if (rc)
14cc21b6 4361 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4362 QETH_CARD_IFNAME(card), rc);
4363 else {
4364 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4365 rc = -EFAULT;
4366 }
4367
4368 kfree(ureq);
4369 kfree(qinfo.udata);
4370 return rc;
4371}
4372EXPORT_SYMBOL_GPL(qeth_snmp_command);
4373
4374static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4375{
4376 switch (card->info.type) {
4377 case QETH_CARD_TYPE_IQD:
4378 return 2;
4379 default:
4380 return 0;
4381 }
4382}
4383
d0ff1f52
UB		 4384static void qeth_determine_capabilities(struct qeth_card *card)
4385{
4386 int rc;
4387 int length;
4388 char *prcd;
4389 struct ccw_device *ddev;
4390 int ddev_offline = 0;
4391
4392 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4393 ddev = CARD_DDEV(card);
4394 if (!ddev->online) {
4395 ddev_offline = 1;
4396 rc = ccw_device_set_online(ddev);
4397 if (rc) {
4398 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4399 goto out;
4400 }
4401 }
4402
4403 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4404 if (rc) {
4405 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4406 dev_name(&card->gdev->dev), rc);
4407 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4408 goto out_offline;
4409 }
4410 qeth_configure_unitaddr(card, prcd);
4411 qeth_configure_blkt_default(card, prcd);
4412 kfree(prcd);
4413
4414 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4415 if (rc)
4416 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4417
0da9581d
EL		 4418 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4419 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4420 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4421 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4422 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4423 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4424 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4425 dev_info(&card->gdev->dev,
4426 "Completion Queueing supported\n");
4427 } else {
4428 card->options.cq = QETH_CQ_NOTAVAILABLE;
4429 }
4430
4431
d0ff1f52
UB		 4432out_offline:
4433 if (ddev_offline == 1)
4434 ccw_device_set_offline(ddev);
4435out:
4436 return;
4437}
4438
0da9581d
EL		 4439static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4440 struct qdio_buffer **in_sbal_ptrs,
4441 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4442 int i;
4443
4444 if (card->options.cq == QETH_CQ_ENABLED) {
4445 int offset = QDIO_MAX_BUFFERS_PER_Q *
4446 (card->qdio.no_in_queues - 1);
4447 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4448 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4449 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4450 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4451 }
4452
4453 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4454 }
4455}
4456
4a71df50
FB		 4457static int qeth_qdio_establish(struct qeth_card *card)
4458{
4459 struct qdio_initialize init_data;
4460 char *qib_param_field;
4461 struct qdio_buffer **in_sbal_ptrs;
104ea556 4462 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4463 struct qdio_buffer **out_sbal_ptrs;
4464 int i, j, k;
4465 int rc = 0;
4466
d11ba0c4 4467 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4468
4469 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4470 GFP_KERNEL);
104ea556 4471 if (!qib_param_field) {
4472 rc = -ENOMEM;
4473 goto out_free_nothing;
4474 }
4a71df50
FB		 4475
4476 qeth_create_qib_param_field(card, qib_param_field);
4477 qeth_create_qib_param_field_blkt(card, qib_param_field);
4478
b3332930 4479 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4480 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4481 GFP_KERNEL);
4482 if (!in_sbal_ptrs) {
104ea556 4483 rc = -ENOMEM;
4484 goto out_free_qib_param;
4a71df50 4485 }
0da9581d 4486 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4487 in_sbal_ptrs[i] = (struct qdio_buffer *)
4488 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4489 }
4a71df50 4490
0da9581d
EL		 4491 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4492 GFP_KERNEL);
104ea556 4493 if (!queue_start_poll) {
4494 rc = -ENOMEM;
4495 goto out_free_in_sbals;
4496 }
0da9581d
EL		 4497 for (i = 0; i < card->qdio.no_in_queues; ++i)
4498 queue_start_poll[i] = card->discipline.start_poll;
4499
4500 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4501
4a71df50 4502 out_sbal_ptrs =
b3332930 4503 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4504 sizeof(void *), GFP_KERNEL);
4505 if (!out_sbal_ptrs) {
104ea556 4506 rc = -ENOMEM;
4507 goto out_free_queue_start_poll;
4a71df50
FB		 4508 }
4509 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4510 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4511 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4512 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4513 }
4514
4515 memset(&init_data, 0, sizeof(struct qdio_initialize));
4516 init_data.cdev = CARD_DDEV(card);
4517 init_data.q_format = qeth_get_qdio_q_format(card);
4518 init_data.qib_param_field_format = 0;
4519 init_data.qib_param_field = qib_param_field;
0da9581d 4520 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50
FB		 4521 init_data.no_output_qs = card->qdio.no_out_queues;
4522 init_data.input_handler = card->discipline.input_handler;
4523 init_data.output_handler = card->discipline.output_handler;
104ea556 4524 init_data.queue_start_poll = queue_start_poll;
4a71df50 4525 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4526 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4527 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4528 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff
JG		 4529 init_data.scan_threshold =
4530 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32;
4a71df50
FB		 4531
4532 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4533 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4534 rc = qdio_allocate(&init_data);
4535 if (rc) {
4536 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4537 goto out;
4538 }
4539 rc = qdio_establish(&init_data);
4540 if (rc) {
4a71df50 4541 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4542 qdio_free(CARD_DDEV(card));
4543 }
4a71df50 4544 }
0da9581d
EL		 4545
4546 switch (card->options.cq) {
4547 case QETH_CQ_ENABLED:
4548 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4549 break;
4550 case QETH_CQ_DISABLED:
4551 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4552 break;
4553 default:
4554 break;
4555 }
cc961d40 4556out:
4a71df50 4557 kfree(out_sbal_ptrs);
104ea556 4558out_free_queue_start_poll:
4559 kfree(queue_start_poll);
4560out_free_in_sbals:
4a71df50 4561 kfree(in_sbal_ptrs);
104ea556 4562out_free_qib_param:
4a71df50 4563 kfree(qib_param_field);
104ea556 4564out_free_nothing:
4a71df50
FB		 4565 return rc;
4566}
4567
4568static void qeth_core_free_card(struct qeth_card *card)
4569{
4570
d11ba0c4
PT		 4571 QETH_DBF_TEXT(SETUP, 2, "freecrd");
4572 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 4573 qeth_clean_channel(&card->read);
4574 qeth_clean_channel(&card->write);
4575 if (card->dev)
4576 free_netdev(card->dev);
4577 kfree(card->ip_tbd_list);
4578 qeth_free_qdio_buffers(card);
6bcac508 4579 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 4580 kfree(card);
4581}
4582
4583static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 4584 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
4585 .driver_info = QETH_CARD_TYPE_OSD},
4586 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
4587 .driver_info = QETH_CARD_TYPE_IQD},
4588 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
4589 .driver_info = QETH_CARD_TYPE_OSN},
4590 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
4591 .driver_info = QETH_CARD_TYPE_OSM},
4592 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
4593 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 4594 {},
4595};
4596MODULE_DEVICE_TABLE(ccw, qeth_ids);
4597
4598static struct ccw_driver qeth_ccw_driver = {
3bda058b 4599 .driver = {
3e70b3b8 4600 .owner = THIS_MODULE,
3bda058b
SO		 4601 .name = "qeth",
4602 },
4a71df50
FB		 4603 .ids = qeth_ids,
4604 .probe = ccwgroup_probe_ccwdev,
4605 .remove = ccwgroup_remove_ccwdev,
4606};
4607
4608static int qeth_core_driver_group(const char *buf, struct device *root_dev,
4609 unsigned long driver_id)
4610{
022b660a
UB		 4611 return ccwgroup_create_from_string(root_dev, driver_id,
4612 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 4613}
4614
4615int qeth_core_hardsetup_card(struct qeth_card *card)
4616{
aa909224 4617 int retries = 0;
4a71df50
FB		 4618 int rc;
4619
d11ba0c4 4620 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 4621 atomic_set(&card->force_alloc_skb, 0);
d0ff1f52 4622 qeth_get_channel_path_desc(card);
4a71df50 4623retry:
aa909224 4624 if (retries)
74eacdb9
FB		 4625 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
4626 dev_name(&card->gdev->dev));
aa909224
UB		 4627 ccw_device_set_offline(CARD_DDEV(card));
4628 ccw_device_set_offline(CARD_WDEV(card));
4629 ccw_device_set_offline(CARD_RDEV(card));
4630 rc = ccw_device_set_online(CARD_RDEV(card));
4631 if (rc)
4632 goto retriable;
4633 rc = ccw_device_set_online(CARD_WDEV(card));
4634 if (rc)
4635 goto retriable;
4636 rc = ccw_device_set_online(CARD_DDEV(card));
4637 if (rc)
4638 goto retriable;
4a71df50 4639 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224 4640retriable:
4a71df50 4641 if (rc == -ERESTARTSYS) {
d11ba0c4 4642 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 4643 return rc;
4644 } else if (rc) {
d11ba0c4 4645 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
aa909224 4646 if (++retries > 3)
4a71df50
FB		 4647 goto out;
4648 else
4649 goto retry;
4650 }
d0ff1f52 4651 qeth_determine_capabilities(card);
4a71df50
FB		 4652 qeth_init_tokens(card);
4653 qeth_init_func_level(card);
4654 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
4655 if (rc == -ERESTARTSYS) {
d11ba0c4 4656 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 4657 return rc;
4658 } else if (rc) {
d11ba0c4 4659 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4660 if (--retries < 0)
4661 goto out;
4662 else
4663 goto retry;
4664 }
4665 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
4666 if (rc == -ERESTARTSYS) {
d11ba0c4 4667 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 4668 return rc;
4669 } else if (rc) {
d11ba0c4 4670 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 4671 if (--retries < 0)
4672 goto out;
4673 else
4674 goto retry;
4675 }
908abbb5 4676 card->read_or_write_problem = 0;
4a71df50
FB		 4677 rc = qeth_mpc_initialize(card);
4678 if (rc) {
d11ba0c4 4679 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 4680 goto out;
4681 }
1da74b1c
FB		 4682
4683 card->options.ipa4.supported_funcs = 0;
4684 card->options.adp.supported_funcs = 0;
4685 card->info.diagass_support = 0;
4686 qeth_query_ipassists(card, QETH_PROT_IPV4);
4687 if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
4688 qeth_query_setadapterparms(card);
4689 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
4690 qeth_query_setdiagass(card);
4a71df50
FB		 4691 return 0;
4692out:
74eacdb9
FB		 4693 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
4694 "an error on the device\n");
4695 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
4696 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 4697 return rc;
4698}
4699EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
4700
b3332930
FB		 4701static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
4702 struct qdio_buffer_element *element,
4a71df50
FB		 4703 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
4704{
4705 struct page *page = virt_to_page(element->addr);
4706 if (*pskb == NULL) {
b3332930
FB		 4707 if (qethbuffer->rx_skb) {
4708 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
4709 *pskb = qethbuffer->rx_skb;
4710 qethbuffer->rx_skb = NULL;
4711 } else {
4712 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
4713 if (!(*pskb))
4714 return -ENOMEM;
4715 }
4716
4a71df50 4717 skb_reserve(*pskb, ETH_HLEN);
b3332930 4718 if (data_len <= QETH_RX_PULL_LEN) {
4a71df50
FB		 4719 memcpy(skb_put(*pskb, data_len), element->addr + offset,
4720 data_len);
4721 } else {
4722 get_page(page);
b3332930
FB		 4723 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
4724 element->addr + offset, QETH_RX_PULL_LEN);
4725 skb_fill_page_desc(*pskb, *pfrag, page,
4726 offset + QETH_RX_PULL_LEN,
4727 data_len - QETH_RX_PULL_LEN);
4728 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
4729 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
4730 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
4a71df50
FB		 4731 (*pfrag)++;
4732 }
4733 } else {
4734 get_page(page);
4735 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
4736 (*pskb)->data_len += data_len;
4737 (*pskb)->len += data_len;
4738 (*pskb)->truesize += data_len;
4739 (*pfrag)++;
4740 }
0da9581d
EL		 4741
4742
4a71df50
FB		 4743 return 0;
4744}
4745
4746struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 4747 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 4748 struct qdio_buffer_element **__element, int *__offset,
4749 struct qeth_hdr **hdr)
4750{
4751 struct qdio_buffer_element *element = *__element;
b3332930 4752 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50
FB		 4753 int offset = *__offset;
4754 struct sk_buff *skb = NULL;
76b11f8e 4755 int skb_len = 0;
4a71df50
FB		 4756 void *data_ptr;
4757 int data_len;
4758 int headroom = 0;
4759 int use_rx_sg = 0;
4760 int frag = 0;
4761
4a71df50
FB		 4762 /* qeth_hdr must not cross element boundaries */
4763 if (element->length < offset + sizeof(struct qeth_hdr)) {
4764 if (qeth_is_last_sbale(element))
4765 return NULL;
4766 element++;
4767 offset = 0;
4768 if (element->length < sizeof(struct qeth_hdr))
4769 return NULL;
4770 }
4771 *hdr = element->addr + offset;
4772
4773 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 4774 switch ((*hdr)->hdr.l2.id) {
4775 case QETH_HEADER_TYPE_LAYER2:
4776 skb_len = (*hdr)->hdr.l2.pkt_length;
4777 break;
4778 case QETH_HEADER_TYPE_LAYER3:
4a71df50 4779 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 4780 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
4781 (card->info.link_type == QETH_LINK_TYPE_HSTR))
4782 headroom = TR_HLEN;
4783 else
4784 headroom = ETH_HLEN;
76b11f8e
UB		 4785 break;
4786 case QETH_HEADER_TYPE_OSN:
4787 skb_len = (*hdr)->hdr.osn.pdu_length;
4788 headroom = sizeof(struct qeth_hdr);
4789 break;
4790 default:
4791 break;
4a71df50
FB		 4792 }
4793
4794 if (!skb_len)
4795 return NULL;
4796
b3332930
FB		 4797 if (((skb_len >= card->options.rx_sg_cb) &&
4798 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
4799 (!atomic_read(&card->force_alloc_skb))) ||
4800 (card->options.cq == QETH_CQ_ENABLED)) {
4a71df50
FB		 4801 use_rx_sg = 1;
4802 } else {
4803 skb = dev_alloc_skb(skb_len + headroom);
4804 if (!skb)
4805 goto no_mem;
4806 if (headroom)
4807 skb_reserve(skb, headroom);
4808 }
4809
4810 data_ptr = element->addr + offset;
4811 while (skb_len) {
4812 data_len = min(skb_len, (int)(element->length - offset));
4813 if (data_len) {
4814 if (use_rx_sg) {
b3332930
FB		 4815 if (qeth_create_skb_frag(qethbuffer, element,
4816 &skb, offset, &frag, data_len))
4a71df50
FB		 4817 goto no_mem;
4818 } else {
4819 memcpy(skb_put(skb, data_len), data_ptr,
4820 data_len);
4821 }
4822 }
4823 skb_len -= data_len;
4824 if (skb_len) {
4825 if (qeth_is_last_sbale(element)) {
847a50fd 4826 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 4827 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 4828 dev_kfree_skb_any(skb);
4829 card->stats.rx_errors++;
4830 return NULL;
4831 }
4832 element++;
4833 offset = 0;
4834 data_ptr = element->addr;
4835 } else {
4836 offset += data_len;
4837 }
4838 }
4839 *__element = element;
4840 *__offset = offset;
4841 if (use_rx_sg && card->options.performance_stats) {
4842 card->perf_stats.sg_skbs_rx++;
4843 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4844 }
4845 return skb;
4846no_mem:
4847 if (net_ratelimit()) {
847a50fd 4848 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 4849 }
4850 card->stats.rx_dropped++;
4851 return NULL;
4852}
4853EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4854
4855static void qeth_unregister_dbf_views(void)
4856{
d11ba0c4
PT		 4857 int x;
4858 for (x = 0; x < QETH_DBF_INFOS; x++) {
4859 debug_unregister(qeth_dbf[x].id);
4860 qeth_dbf[x].id = NULL;
4861 }
4a71df50
FB		 4862}
4863
8e96c51c 4864void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 4865{
4866 char dbf_txt_buf[32];
345aa66e 4867 va_list args;
cd023216 4868
8e96c51c 4869 if (level > id->level)
cd023216 4870 return;
345aa66e
PT		 4871 va_start(args, fmt);
4872 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4873 va_end(args);
8e96c51c 4874 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 4875}
4876EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4877
4a71df50
FB		 4878static int qeth_register_dbf_views(void)
4879{
d11ba0c4
PT		 4880 int ret;
4881 int x;
4882
4883 for (x = 0; x < QETH_DBF_INFOS; x++) {
4884 /* register the areas */
4885 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4886 qeth_dbf[x].pages,
4887 qeth_dbf[x].areas,
4888 qeth_dbf[x].len);
4889 if (qeth_dbf[x].id == NULL) {
4890 qeth_unregister_dbf_views();
4891 return -ENOMEM;
4892 }
4a71df50 4893
d11ba0c4
PT		 4894 /* register a view */
4895 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4896 if (ret) {
4897 qeth_unregister_dbf_views();
4898 return ret;
4899 }
4a71df50 4900
d11ba0c4
PT		 4901 /* set a passing level */
4902 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4903 }
4a71df50
FB		 4904
4905 return 0;
4906}
4907
4908int qeth_core_load_discipline(struct qeth_card *card,
4909 enum qeth_discipline_id discipline)
4910{
4911 int rc = 0;
4912 switch (discipline) {
4913 case QETH_DISCIPLINE_LAYER3:
4914 card->discipline.ccwgdriver = try_then_request_module(
4915 symbol_get(qeth_l3_ccwgroup_driver),
4916 "qeth_l3");
4917 break;
4918 case QETH_DISCIPLINE_LAYER2:
4919 card->discipline.ccwgdriver = try_then_request_module(
4920 symbol_get(qeth_l2_ccwgroup_driver),
4921 "qeth_l2");
4922 break;
4923 }
4924 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4925 dev_err(&card->gdev->dev, "There is no kernel module to "
4926 "support discipline %d\n", discipline);
4a71df50
FB		 4927 rc = -EINVAL;
4928 }
4929 return rc;
4930}
4931
4932void qeth_core_free_discipline(struct qeth_card *card)
4933{
4934 if (card->options.layer2)
4935 symbol_put(qeth_l2_ccwgroup_driver);
4936 else
4937 symbol_put(qeth_l3_ccwgroup_driver);
4938 card->discipline.ccwgdriver = NULL;
4939}
4940
4941static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4942{
4943 struct qeth_card *card;
4944 struct device *dev;
4945 int rc;
4946 unsigned long flags;
af039068 4947 char dbf_name[20];
4a71df50 4948
d11ba0c4 4949 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4950
4951 dev = &gdev->dev;
4952 if (!get_device(dev))
4953 return -ENODEV;
4954
2a0217d5 4955 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4956
4957 card = qeth_alloc_card();
4958 if (!card) {
d11ba0c4 4959 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4960 rc = -ENOMEM;
4961 goto err_dev;
4962 }
af039068
CO		 4963
4964 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
4965 dev_name(&gdev->dev));
4966 card->debug = debug_register(dbf_name, 2, 1, 8);
4967 if (!card->debug) {
4968 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
4969 rc = -ENOMEM;
4970 goto err_card;
4971 }
4972 debug_register_view(card->debug, &debug_hex_ascii_view);
4973
4a71df50
FB		 4974 card->read.ccwdev = gdev->cdev[0];
4975 card->write.ccwdev = gdev->cdev[1];
4976 card->data.ccwdev = gdev->cdev[2];
4977 dev_set_drvdata(&gdev->dev, card);
4978 card->gdev = gdev;
4979 gdev->cdev[0]->handler = qeth_irq;
4980 gdev->cdev[1]->handler = qeth_irq;
4981 gdev->cdev[2]->handler = qeth_irq;
4982
4983 rc = qeth_determine_card_type(card);
4984 if (rc) {
d11ba0c4 4985 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
af039068 4986 goto err_dbf;
4a71df50
FB		 4987 }
4988 rc = qeth_setup_card(card);
4989 if (rc) {
d11ba0c4 4990 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
af039068 4991 goto err_dbf;
4a71df50
FB		 4992 }
4993
5113fec0 4994 if (card->info.type == QETH_CARD_TYPE_OSN)
4a71df50 4995 rc = qeth_core_create_osn_attributes(dev);
5113fec0
UB		 4996 else
4997 rc = qeth_core_create_device_attributes(dev);
4998 if (rc)
af039068 4999 goto err_dbf;
5113fec0
UB		 5000 switch (card->info.type) {
5001 case QETH_CARD_TYPE_OSN:
5002 case QETH_CARD_TYPE_OSM:
4a71df50 5003 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5113fec0
UB		 5004 if (rc)
5005 goto err_attr;
4a71df50 5006 rc = card->discipline.ccwgdriver->probe(card->gdev);
4a71df50 5007 if (rc)
5113fec0
UB		 5008 goto err_disc;
5009 case QETH_CARD_TYPE_OSD:
5010 case QETH_CARD_TYPE_OSX:
5011 default:
5012 break;
4a71df50
FB		 5013 }
5014
5015 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5016 list_add_tail(&card->list, &qeth_core_card_list.list);
5017 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
76b11f8e
UB		 5018
5019 qeth_determine_capabilities(card);
4a71df50
FB		 5020 return 0;
5021
5113fec0
UB		 5022err_disc:
5023 qeth_core_free_discipline(card);
5024err_attr:
5025 if (card->info.type == QETH_CARD_TYPE_OSN)
5026 qeth_core_remove_osn_attributes(dev);
5027 else
5028 qeth_core_remove_device_attributes(dev);
af039068
CO		 5029err_dbf:
5030 debug_unregister(card->debug);
4a71df50
FB		 5031err_card:
5032 qeth_core_free_card(card);
5033err_dev:
5034 put_device(dev);
5035 return rc;
5036}
5037
5038static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5039{
5040 unsigned long flags;
5041 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5042
28a7e4c9 5043 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 5044
5045 if (card->info.type == QETH_CARD_TYPE_OSN) {
5046 qeth_core_remove_osn_attributes(&gdev->dev);
5047 } else {
5048 qeth_core_remove_device_attributes(&gdev->dev);
5049 }
9dc48ccc
UB		 5050
5051 if (card->discipline.ccwgdriver) {
5052 card->discipline.ccwgdriver->remove(gdev);
5053 qeth_core_free_discipline(card);
5054 }
5055
af039068 5056 debug_unregister(card->debug);
4a71df50
FB		 5057 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5058 list_del(&card->list);
5059 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5060 qeth_core_free_card(card);
5061 dev_set_drvdata(&gdev->dev, NULL);
5062 put_device(&gdev->dev);
5063 return;
5064}
5065
5066static int qeth_core_set_online(struct ccwgroup_device *gdev)
5067{
5068 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5069 int rc = 0;
5070 int def_discipline;
5071
5072 if (!card->discipline.ccwgdriver) {
5073 if (card->info.type == QETH_CARD_TYPE_IQD)
5074 def_discipline = QETH_DISCIPLINE_LAYER3;
5075 else
5076 def_discipline = QETH_DISCIPLINE_LAYER2;
5077 rc = qeth_core_load_discipline(card, def_discipline);
5078 if (rc)
5079 goto err;
5080 rc = card->discipline.ccwgdriver->probe(card->gdev);
5081 if (rc)
5082 goto err;
5083 }
5084 rc = card->discipline.ccwgdriver->set_online(gdev);
5085err:
5086 return rc;
5087}
5088
5089static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5090{
5091 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5092 return card->discipline.ccwgdriver->set_offline(gdev);
5093}
5094
5095static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5096{
5097 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5098 if (card->discipline.ccwgdriver &&
5099 card->discipline.ccwgdriver->shutdown)
5100 card->discipline.ccwgdriver->shutdown(gdev);
5101}
5102
bbcfcdc8
FB		 5103static int qeth_core_prepare(struct ccwgroup_device *gdev)
5104{
5105 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5106 if (card->discipline.ccwgdriver &&
5107 card->discipline.ccwgdriver->prepare)
5108 return card->discipline.ccwgdriver->prepare(gdev);
5109 return 0;
5110}
5111
5112static void qeth_core_complete(struct ccwgroup_device *gdev)
5113{
5114 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5115 if (card->discipline.ccwgdriver &&
5116 card->discipline.ccwgdriver->complete)
5117 card->discipline.ccwgdriver->complete(gdev);
5118}
5119
5120static int qeth_core_freeze(struct ccwgroup_device *gdev)
5121{
5122 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5123 if (card->discipline.ccwgdriver &&
5124 card->discipline.ccwgdriver->freeze)
5125 return card->discipline.ccwgdriver->freeze(gdev);
5126 return 0;
5127}
5128
5129static int qeth_core_thaw(struct ccwgroup_device *gdev)
5130{
5131 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5132 if (card->discipline.ccwgdriver &&
5133 card->discipline.ccwgdriver->thaw)
5134 return card->discipline.ccwgdriver->thaw(gdev);
5135 return 0;
5136}
5137
5138static int qeth_core_restore(struct ccwgroup_device *gdev)
5139{
5140 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5141 if (card->discipline.ccwgdriver &&
5142 card->discipline.ccwgdriver->restore)
5143 return card->discipline.ccwgdriver->restore(gdev);
5144 return 0;
5145}
5146
4a71df50 5147static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5148 .driver = {
5149 .owner = THIS_MODULE,
5150 .name = "qeth",
5151 },
4a71df50
FB		 5152 .driver_id = 0xD8C5E3C8,
5153 .probe = qeth_core_probe_device,
5154 .remove = qeth_core_remove_device,
5155 .set_online = qeth_core_set_online,
5156 .set_offline = qeth_core_set_offline,
5157 .shutdown = qeth_core_shutdown,
bbcfcdc8
FB		 5158 .prepare = qeth_core_prepare,
5159 .complete = qeth_core_complete,
5160 .freeze = qeth_core_freeze,
5161 .thaw = qeth_core_thaw,
5162 .restore = qeth_core_restore,
4a71df50
FB		 5163};
5164
5165static ssize_t
5166qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
5167 size_t count)
5168{
5169 int err;
5170 err = qeth_core_driver_group(buf, qeth_core_root_dev,
5171 qeth_core_ccwgroup_driver.driver_id);
5172 if (err)
5173 return err;
5174 else
5175 return count;
5176}
5177
5178static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5179
5180static struct {
5181 const char str[ETH_GSTRING_LEN];
5182} qeth_ethtool_stats_keys[] = {
5183/* 0 */{"rx skbs"},
5184 {"rx buffers"},
5185 {"tx skbs"},
5186 {"tx buffers"},
5187 {"tx skbs no packing"},
5188 {"tx buffers no packing"},
5189 {"tx skbs packing"},
5190 {"tx buffers packing"},
5191 {"tx sg skbs"},
5192 {"tx sg frags"},
5193/* 10 */{"rx sg skbs"},
5194 {"rx sg frags"},
5195 {"rx sg page allocs"},
5196 {"tx large kbytes"},
5197 {"tx large count"},
5198 {"tx pk state ch n->p"},
5199 {"tx pk state ch p->n"},
5200 {"tx pk watermark low"},
5201 {"tx pk watermark high"},
5202 {"queue 0 buffer usage"},
5203/* 20 */{"queue 1 buffer usage"},
5204 {"queue 2 buffer usage"},
5205 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5206 {"rx poll time"},
5207 {"rx poll count"},
4a71df50
FB		 5208 {"rx do_QDIO time"},
5209 {"rx do_QDIO count"},
5210 {"tx handler time"},
5211 {"tx handler count"},
5212 {"tx time"},
5213/* 30 */{"tx count"},
5214 {"tx do_QDIO time"},
5215 {"tx do_QDIO count"},
f61a0d05 5216 {"tx csum"},
c3b4a740 5217 {"tx lin"},
0da9581d
EL		 5218 {"cq handler count"},
5219 {"cq handler time"}
4a71df50
FB		 5220};
5221
df8b4ec8 5222int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5223{
df8b4ec8
BH		 5224 switch (stringset) {
5225 case ETH_SS_STATS:
5226 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5227 default:
5228 return -EINVAL;
5229 }
4a71df50 5230}
df8b4ec8 5231EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5232
5233void qeth_core_get_ethtool_stats(struct net_device *dev,
5234 struct ethtool_stats *stats, u64 *data)
5235{
509e2562 5236 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5237 data[0] = card->stats.rx_packets -
5238 card->perf_stats.initial_rx_packets;
5239 data[1] = card->perf_stats.bufs_rec;
5240 data[2] = card->stats.tx_packets -
5241 card->perf_stats.initial_tx_packets;
5242 data[3] = card->perf_stats.bufs_sent;
5243 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5244 - card->perf_stats.skbs_sent_pack;
5245 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5246 data[6] = card->perf_stats.skbs_sent_pack;
5247 data[7] = card->perf_stats.bufs_sent_pack;
5248 data[8] = card->perf_stats.sg_skbs_sent;
5249 data[9] = card->perf_stats.sg_frags_sent;
5250 data[10] = card->perf_stats.sg_skbs_rx;
5251 data[11] = card->perf_stats.sg_frags_rx;
5252 data[12] = card->perf_stats.sg_alloc_page_rx;
5253 data[13] = (card->perf_stats.large_send_bytes >> 10);
5254 data[14] = card->perf_stats.large_send_cnt;
5255 data[15] = card->perf_stats.sc_dp_p;
5256 data[16] = card->perf_stats.sc_p_dp;
5257 data[17] = QETH_LOW_WATERMARK_PACK;
5258 data[18] = QETH_HIGH_WATERMARK_PACK;
5259 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5260 data[20] = (card->qdio.no_out_queues > 1) ?
5261 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5262 data[21] = (card->qdio.no_out_queues > 2) ?
5263 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5264 data[22] = (card->qdio.no_out_queues > 3) ?
5265 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5266 data[23] = card->perf_stats.inbound_time;
5267 data[24] = card->perf_stats.inbound_cnt;
5268 data[25] = card->perf_stats.inbound_do_qdio_time;
5269 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5270 data[27] = card->perf_stats.outbound_handler_time;
5271 data[28] = card->perf_stats.outbound_handler_cnt;
5272 data[29] = card->perf_stats.outbound_time;
5273 data[30] = card->perf_stats.outbound_cnt;
5274 data[31] = card->perf_stats.outbound_do_qdio_time;
5275 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 5276 data[33] = card->perf_stats.tx_csum;
c3b4a740 5277 data[34] = card->perf_stats.tx_lin;
0da9581d
EL		 5278 data[35] = card->perf_stats.cq_cnt;
5279 data[36] = card->perf_stats.cq_time;
4a71df50
FB		 5280}
5281EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5282
5283void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5284{
5285 switch (stringset) {
5286 case ETH_SS_STATS:
5287 memcpy(data, &qeth_ethtool_stats_keys,
5288 sizeof(qeth_ethtool_stats_keys));
5289 break;
5290 default:
5291 WARN_ON(1);
5292 break;
5293 }
5294}
5295EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5296
5297void qeth_core_get_drvinfo(struct net_device *dev,
5298 struct ethtool_drvinfo *info)
5299{
509e2562 5300 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5301 if (card->options.layer2)
5302 strcpy(info->driver, "qeth_l2");
5303 else
5304 strcpy(info->driver, "qeth_l3");
5305
5306 strcpy(info->version, "1.0");
5307 strcpy(info->fw_version, card->info.mcl_level);
5308 sprintf(info->bus_info, "%s/%s/%s",
5309 CARD_RDEV_ID(card),
5310 CARD_WDEV_ID(card),
5311 CARD_DDEV_ID(card));
5312}
5313EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5314
3f9975aa
FB		 5315int qeth_core_ethtool_get_settings(struct net_device *netdev,
5316 struct ethtool_cmd *ecmd)
5317{
509e2562 5318 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 5319 enum qeth_link_types link_type;
5320
5321 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5322 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5323 else
5324 link_type = card->info.link_type;
5325
5326 ecmd->transceiver = XCVR_INTERNAL;
5327 ecmd->supported = SUPPORTED_Autoneg;
5328 ecmd->advertising = ADVERTISED_Autoneg;
5329 ecmd->duplex = DUPLEX_FULL;
5330 ecmd->autoneg = AUTONEG_ENABLE;
5331
5332 switch (link_type) {
5333 case QETH_LINK_TYPE_FAST_ETH:
5334 case QETH_LINK_TYPE_LANE_ETH100:
5335 ecmd->supported |= SUPPORTED_10baseT_Half |
5336 SUPPORTED_10baseT_Full |
5337 SUPPORTED_100baseT_Half |
5338 SUPPORTED_100baseT_Full |
5339 SUPPORTED_TP;
5340 ecmd->advertising |= ADVERTISED_10baseT_Half |
5341 ADVERTISED_10baseT_Full |
5342 ADVERTISED_100baseT_Half |
5343 ADVERTISED_100baseT_Full |
5344 ADVERTISED_TP;
5345 ecmd->speed = SPEED_100;
5346 ecmd->port = PORT_TP;
5347 break;
5348
5349 case QETH_LINK_TYPE_GBIT_ETH:
5350 case QETH_LINK_TYPE_LANE_ETH1000:
5351 ecmd->supported |= SUPPORTED_10baseT_Half |
5352 SUPPORTED_10baseT_Full |
5353 SUPPORTED_100baseT_Half |
5354 SUPPORTED_100baseT_Full |
5355 SUPPORTED_1000baseT_Half |
5356 SUPPORTED_1000baseT_Full |
5357 SUPPORTED_FIBRE;
5358 ecmd->advertising |= ADVERTISED_10baseT_Half |
5359 ADVERTISED_10baseT_Full |
5360 ADVERTISED_100baseT_Half |
5361 ADVERTISED_100baseT_Full |
5362 ADVERTISED_1000baseT_Half |
5363 ADVERTISED_1000baseT_Full |
5364 ADVERTISED_FIBRE;
5365 ecmd->speed = SPEED_1000;
5366 ecmd->port = PORT_FIBRE;
5367 break;
5368
5369 case QETH_LINK_TYPE_10GBIT_ETH:
5370 ecmd->supported |= SUPPORTED_10baseT_Half |
5371 SUPPORTED_10baseT_Full |
5372 SUPPORTED_100baseT_Half |
5373 SUPPORTED_100baseT_Full |
5374 SUPPORTED_1000baseT_Half |
5375 SUPPORTED_1000baseT_Full |
5376 SUPPORTED_10000baseT_Full |
5377 SUPPORTED_FIBRE;
5378 ecmd->advertising |= ADVERTISED_10baseT_Half |
5379 ADVERTISED_10baseT_Full |
5380 ADVERTISED_100baseT_Half |
5381 ADVERTISED_100baseT_Full |
5382 ADVERTISED_1000baseT_Half |
5383 ADVERTISED_1000baseT_Full |
5384 ADVERTISED_10000baseT_Full |
5385 ADVERTISED_FIBRE;
5386 ecmd->speed = SPEED_10000;
5387 ecmd->port = PORT_FIBRE;
5388 break;
5389
5390 default:
5391 ecmd->supported |= SUPPORTED_10baseT_Half |
5392 SUPPORTED_10baseT_Full |
5393 SUPPORTED_TP;
5394 ecmd->advertising |= ADVERTISED_10baseT_Half |
5395 ADVERTISED_10baseT_Full |
5396 ADVERTISED_TP;
5397 ecmd->speed = SPEED_10;
5398 ecmd->port = PORT_TP;
5399 }
5400
5401 return 0;
5402}
5403EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
5404
4a71df50
FB		 5405static int __init qeth_core_init(void)
5406{
5407 int rc;
5408
74eacdb9 5409 pr_info("loading core functions\n");
4a71df50
FB		 5410 INIT_LIST_HEAD(&qeth_core_card_list.list);
5411 rwlock_init(&qeth_core_card_list.rwlock);
5412
5413 rc = qeth_register_dbf_views();
5414 if (rc)
5415 goto out_err;
5416 rc = ccw_driver_register(&qeth_ccw_driver);
5417 if (rc)
5418 goto ccw_err;
5419 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
5420 if (rc)
5421 goto ccwgroup_err;
5422 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
5423 &driver_attr_group);
5424 if (rc)
5425 goto driver_err;
035da16f 5426 qeth_core_root_dev = root_device_register("qeth");
4a71df50
FB		 5427 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
5428 if (rc)
5429 goto register_err;
4a71df50 5430
683d718a
FB		 5431 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
5432 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
5433 if (!qeth_core_header_cache) {
5434 rc = -ENOMEM;
5435 goto slab_err;
5436 }
5437
0da9581d
EL		 5438 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
5439 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
5440 if (!qeth_qdio_outbuf_cache) {
5441 rc = -ENOMEM;
5442 goto cqslab_err;
5443 }
5444
683d718a 5445 return 0;
0da9581d
EL		 5446cqslab_err:
5447 kmem_cache_destroy(qeth_core_header_cache);
683d718a 5448slab_err:
035da16f 5449 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5450register_err:
5451 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5452 &driver_attr_group);
5453driver_err:
5454 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5455ccwgroup_err:
5456 ccw_driver_unregister(&qeth_ccw_driver);
5457ccw_err:
74eacdb9 5458 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 5459 qeth_unregister_dbf_views();
5460out_err:
74eacdb9 5461 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 5462 return rc;
5463}
5464
5465static void __exit qeth_core_exit(void)
5466{
035da16f 5467 root_device_unregister(qeth_core_root_dev);
4a71df50
FB		 5468 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
5469 &driver_attr_group);
5470 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
5471 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 5472 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 5473 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 5474 qeth_unregister_dbf_views();
74eacdb9 5475 pr_info("core functions removed\n");
4a71df50
FB		 5476}
5477
5478module_init(qeth_core_init);
5479module_exit(qeth_core_exit);
5480MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
5481MODULE_DESCRIPTION("qeth core functions");
5482MODULE_LICENSE("GPL");
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