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s390/qeth: fix GSO throughput regression
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50 1/*
bbcfcdc8 2 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
4 * Frank Pavlic <fpavlic@de.ibm.com>,
5 * Thomas Spatzier <tspat@de.ibm.com>,
6 * Frank Blaschka <frank.blaschka@de.ibm.com>
7 */
8
74eacdb9
FB		 9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
4a71df50
FB		 12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
4a71df50
FB		 18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
5a0e3ad6 21#include <linux/slab.h>
6d69b1f1
JW		 22#include <linux/if_vlan.h>
23#include <linux/netdevice.h>
24#include <linux/netdev_features.h>
25#include <linux/skbuff.h>
26
b3332930 27#include <net/iucv/af_iucv.h>
290b8348 28#include <net/dsfield.h>
4a71df50 29
ab4227cb 30#include <asm/ebcdic.h>
2bf29df7 31#include <asm/chpid.h>
ab4227cb 32#include <asm/io.h>
1da74b1c 33#include <asm/sysinfo.h>
c3ab96f3 34#include <asm/compat.h>
ec61bd2f
JW		 35#include <asm/diag.h>
36#include <asm/cio.h>
37#include <asm/ccwdev.h>
4a71df50
FB		 38
39#include "qeth_core.h"
4a71df50 40
d11ba0c4
PT		 41struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
42 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
43 /* N P A M L V H */
44 [QETH_DBF_SETUP] = {"qeth_setup",
45 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 46 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
47 &debug_sprintf_view, NULL},
d11ba0c4
PT		 48 [QETH_DBF_CTRL] = {"qeth_control",
49 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
50};
51EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 52
53struct qeth_card_list_struct qeth_core_card_list;
54EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 55struct kmem_cache *qeth_core_header_cache;
56EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 57static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 58
59static struct device *qeth_core_root_dev;
4a71df50 60static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 61static struct mutex qeth_mod_mutex;
4a71df50
FB		 62
63static void qeth_send_control_data_cb(struct qeth_channel *,
64 struct qeth_cmd_buffer *);
4a71df50
FB		 65static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
66static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
67static void qeth_free_buffer_pool(struct qeth_card *);
68static int qeth_qdio_establish(struct qeth_card *);
0da9581d 69static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 70static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
71 struct qeth_qdio_out_buffer *buf,
72 enum iucv_tx_notify notification);
73static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 74static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
75 struct qeth_qdio_out_buffer *buf,
76 enum qeth_qdio_buffer_states newbufstate);
72861ae7 77static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 78
b4d72c08 79struct workqueue_struct *qeth_wq;
c044dc21 80EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 81
511c2445
EC		 82int qeth_card_hw_is_reachable(struct qeth_card *card)
83{
84 return (card->state == CARD_STATE_SOFTSETUP) ||
85 (card->state == CARD_STATE_UP);
86}
87EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
88
0f54761d
SR		 89static void qeth_close_dev_handler(struct work_struct *work)
90{
91 struct qeth_card *card;
92
93 card = container_of(work, struct qeth_card, close_dev_work);
94 QETH_CARD_TEXT(card, 2, "cldevhdl");
95 rtnl_lock();
96 dev_close(card->dev);
97 rtnl_unlock();
98 ccwgroup_set_offline(card->gdev);
99}
100
101void qeth_close_dev(struct qeth_card *card)
102{
103 QETH_CARD_TEXT(card, 2, "cldevsubm");
104 queue_work(qeth_wq, &card->close_dev_work);
105}
106EXPORT_SYMBOL_GPL(qeth_close_dev);
107
cef6ff22 108static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 109{
110 if (card->info.guestlan) {
111 switch (card->info.type) {
5113fec0 112 case QETH_CARD_TYPE_OSD:
7096b187 113 return " Virtual NIC QDIO";
4a71df50 114 case QETH_CARD_TYPE_IQD:
7096b187 115 return " Virtual NIC Hiper";
5113fec0 116 case QETH_CARD_TYPE_OSM:
7096b187 117 return " Virtual NIC QDIO - OSM";
5113fec0 118 case QETH_CARD_TYPE_OSX:
7096b187 119 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 120 default:
121 return " unknown";
122 }
123 } else {
124 switch (card->info.type) {
5113fec0 125 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 126 return " OSD Express";
127 case QETH_CARD_TYPE_IQD:
128 return " HiperSockets";
129 case QETH_CARD_TYPE_OSN:
130 return " OSN QDIO";
5113fec0
UB		 131 case QETH_CARD_TYPE_OSM:
132 return " OSM QDIO";
133 case QETH_CARD_TYPE_OSX:
134 return " OSX QDIO";
4a71df50
FB		 135 default:
136 return " unknown";
137 }
138 }
139 return " n/a";
140}
141
142/* max length to be returned: 14 */
143const char *qeth_get_cardname_short(struct qeth_card *card)
144{
145 if (card->info.guestlan) {
146 switch (card->info.type) {
5113fec0 147 case QETH_CARD_TYPE_OSD:
7096b187 148 return "Virt.NIC QDIO";
4a71df50 149 case QETH_CARD_TYPE_IQD:
7096b187 150 return "Virt.NIC Hiper";
5113fec0 151 case QETH_CARD_TYPE_OSM:
7096b187 152 return "Virt.NIC OSM";
5113fec0 153 case QETH_CARD_TYPE_OSX:
7096b187 154 return "Virt.NIC OSX";
4a71df50
FB		 155 default:
156 return "unknown";
157 }
158 } else {
159 switch (card->info.type) {
5113fec0 160 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 161 switch (card->info.link_type) {
162 case QETH_LINK_TYPE_FAST_ETH:
163 return "OSD_100";
164 case QETH_LINK_TYPE_HSTR:
165 return "HSTR";
166 case QETH_LINK_TYPE_GBIT_ETH:
167 return "OSD_1000";
168 case QETH_LINK_TYPE_10GBIT_ETH:
169 return "OSD_10GIG";
170 case QETH_LINK_TYPE_LANE_ETH100:
171 return "OSD_FE_LANE";
172 case QETH_LINK_TYPE_LANE_TR:
173 return "OSD_TR_LANE";
174 case QETH_LINK_TYPE_LANE_ETH1000:
175 return "OSD_GbE_LANE";
176 case QETH_LINK_TYPE_LANE:
177 return "OSD_ATM_LANE";
178 default:
179 return "OSD_Express";
180 }
181 case QETH_CARD_TYPE_IQD:
182 return "HiperSockets";
183 case QETH_CARD_TYPE_OSN:
184 return "OSN";
5113fec0
UB		 185 case QETH_CARD_TYPE_OSM:
186 return "OSM_1000";
187 case QETH_CARD_TYPE_OSX:
188 return "OSX_10GIG";
4a71df50
FB		 189 default:
190 return "unknown";
191 }
192 }
193 return "n/a";
194}
195
65d8013c
SR		 196void qeth_set_recovery_task(struct qeth_card *card)
197{
198 card->recovery_task = current;
199}
200EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
201
202void qeth_clear_recovery_task(struct qeth_card *card)
203{
204 card->recovery_task = NULL;
205}
206EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
207
208static bool qeth_is_recovery_task(const struct qeth_card *card)
209{
210 return card->recovery_task == current;
211}
212
4a71df50
FB		 213void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
214 int clear_start_mask)
215{
216 unsigned long flags;
217
218 spin_lock_irqsave(&card->thread_mask_lock, flags);
219 card->thread_allowed_mask = threads;
220 if (clear_start_mask)
221 card->thread_start_mask &= threads;
222 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
223 wake_up(&card->wait_q);
224}
225EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
226
227int qeth_threads_running(struct qeth_card *card, unsigned long threads)
228{
229 unsigned long flags;
230 int rc = 0;
231
232 spin_lock_irqsave(&card->thread_mask_lock, flags);
233 rc = (card->thread_running_mask & threads);
234 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
235 return rc;
236}
237EXPORT_SYMBOL_GPL(qeth_threads_running);
238
239int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
240{
65d8013c
SR		 241 if (qeth_is_recovery_task(card))
242 return 0;
4a71df50
FB		 243 return wait_event_interruptible(card->wait_q,
244 qeth_threads_running(card, threads) == 0);
245}
246EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
247
248void qeth_clear_working_pool_list(struct qeth_card *card)
249{
250 struct qeth_buffer_pool_entry *pool_entry, *tmp;
251
847a50fd 252 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 253 list_for_each_entry_safe(pool_entry, tmp,
254 &card->qdio.in_buf_pool.entry_list, list){
255 list_del(&pool_entry->list);
256 }
257}
258EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
259
260static int qeth_alloc_buffer_pool(struct qeth_card *card)
261{
262 struct qeth_buffer_pool_entry *pool_entry;
263 void *ptr;
264 int i, j;
265
847a50fd 266 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 267 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 268 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 269 if (!pool_entry) {
270 qeth_free_buffer_pool(card);
271 return -ENOMEM;
272 }
273 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 274 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 275 if (!ptr) {
276 while (j > 0)
277 free_page((unsigned long)
278 pool_entry->elements[--j]);
279 kfree(pool_entry);
280 qeth_free_buffer_pool(card);
281 return -ENOMEM;
282 }
283 pool_entry->elements[j] = ptr;
284 }
285 list_add(&pool_entry->init_list,
286 &card->qdio.init_pool.entry_list);
287 }
288 return 0;
289}
290
291int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
292{
847a50fd 293 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 294
295 if ((card->state != CARD_STATE_DOWN) &&
296 (card->state != CARD_STATE_RECOVER))
297 return -EPERM;
298
299 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
300 qeth_clear_working_pool_list(card);
301 qeth_free_buffer_pool(card);
302 card->qdio.in_buf_pool.buf_count = bufcnt;
303 card->qdio.init_pool.buf_count = bufcnt;
304 return qeth_alloc_buffer_pool(card);
305}
76b11f8e 306EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 307
4601ba6c
SO		 308static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
309{
6d284bde
SO		 310 if (!q)
311 return;
312
313 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 314 kfree(q);
315}
316
317static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
318{
319 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
320 int i;
321
322 if (!q)
323 return NULL;
324
6d284bde
SO		 325 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
326 kfree(q);
327 return NULL;
328 }
329
4601ba6c 330 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 331 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 332
333 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
334 return q;
335}
336
cef6ff22 337static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 338{
339 int rc;
340
341 if (card->options.cq == QETH_CQ_ENABLED) {
342 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 343 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
344 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 345 card->qdio.c_q->next_buf_to_init = 127;
346 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
347 card->qdio.no_in_queues - 1, 0,
348 127);
349 if (rc) {
350 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
351 goto out;
352 }
353 }
354 rc = 0;
355out:
356 return rc;
357}
358
cef6ff22 359static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 360{
361 int rc;
362
363 if (card->options.cq == QETH_CQ_ENABLED) {
364 int i;
365 struct qdio_outbuf_state *outbuf_states;
366
367 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 368 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 369 if (!card->qdio.c_q) {
370 rc = -1;
371 goto kmsg_out;
372 }
0da9581d 373 card->qdio.no_in_queues = 2;
4a912f98 374 card->qdio.out_bufstates =
0da9581d
EL		 375 kzalloc(card->qdio.no_out_queues *
376 QDIO_MAX_BUFFERS_PER_Q *
377 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
378 outbuf_states = card->qdio.out_bufstates;
379 if (outbuf_states == NULL) {
380 rc = -1;
381 goto free_cq_out;
382 }
383 for (i = 0; i < card->qdio.no_out_queues; ++i) {
384 card->qdio.out_qs[i]->bufstates = outbuf_states;
385 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
386 }
387 } else {
388 QETH_DBF_TEXT(SETUP, 2, "nocq");
389 card->qdio.c_q = NULL;
390 card->qdio.no_in_queues = 1;
391 }
392 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
393 rc = 0;
394out:
395 return rc;
396free_cq_out:
4601ba6c 397 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 398 card->qdio.c_q = NULL;
399kmsg_out:
400 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
401 goto out;
402}
403
cef6ff22 404static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 405{
406 if (card->qdio.c_q) {
407 --card->qdio.no_in_queues;
4601ba6c 408 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 409 card->qdio.c_q = NULL;
410 }
411 kfree(card->qdio.out_bufstates);
412 card->qdio.out_bufstates = NULL;
413}
414
cef6ff22
JW		 415static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
416 int delayed)
417{
b3332930
FB		 418 enum iucv_tx_notify n;
419
420 switch (sbalf15) {
421 case 0:
422 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
423 break;
424 case 4:
425 case 16:
426 case 17:
427 case 18:
428 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
429 TX_NOTIFY_UNREACHABLE;
430 break;
431 default:
432 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
433 TX_NOTIFY_GENERALERROR;
434 break;
435 }
436
437 return n;
438}
439
cef6ff22
JW		 440static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
441 int forced_cleanup)
0da9581d 442{
72861ae7
EL		 443 if (q->card->options.cq != QETH_CQ_ENABLED)
444 return;
445
0da9581d
EL		 446 if (q->bufs[bidx]->next_pending != NULL) {
447 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
448 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
449
450 while (c) {
451 if (forced_cleanup ||
452 atomic_read(&c->state) ==
453 QETH_QDIO_BUF_HANDLED_DELAYED) {
454 struct qeth_qdio_out_buffer *f = c;
455 QETH_CARD_TEXT(f->q->card, 5, "fp");
456 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 457 /* release here to avoid interleaving between
458 outbound tasklet and inbound tasklet
459 regarding notifications and lifecycle */
460 qeth_release_skbs(c);
461
0da9581d 462 c = f->next_pending;
18af5c17 463 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 464 head->next_pending = c;
465 kmem_cache_free(qeth_qdio_outbuf_cache, f);
466 } else {
467 head = c;
468 c = c->next_pending;
469 }
470
471 }
472 }
72861ae7
EL		 473 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
474 QETH_QDIO_BUF_HANDLED_DELAYED)) {
475 /* for recovery situations */
476 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
477 qeth_init_qdio_out_buf(q, bidx);
478 QETH_CARD_TEXT(q->card, 2, "clprecov");
479 }
0da9581d
EL		 480}
481
482
cef6ff22
JW		 483static void qeth_qdio_handle_aob(struct qeth_card *card,
484 unsigned long phys_aob_addr)
485{
0da9581d
EL		 486 struct qaob *aob;
487 struct qeth_qdio_out_buffer *buffer;
b3332930 488 enum iucv_tx_notify notification;
0da9581d
EL		 489
490 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
491 QETH_CARD_TEXT(card, 5, "haob");
492 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
493 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
494 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
495
b3332930
FB		 496 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
497 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
498 notification = TX_NOTIFY_OK;
499 } else {
18af5c17
SR		 500 WARN_ON_ONCE(atomic_read(&buffer->state) !=
501 QETH_QDIO_BUF_PENDING);
b3332930
FB		 502 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
503 notification = TX_NOTIFY_DELAYED_OK;
504 }
505
506 if (aob->aorc != 0) {
507 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
508 notification = qeth_compute_cq_notification(aob->aorc, 1);
509 }
510 qeth_notify_skbs(buffer->q, buffer, notification);
511
0da9581d
EL		 512 buffer->aob = NULL;
513 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 514 QETH_QDIO_BUF_HANDLED_DELAYED);
515
0da9581d
EL		 516 /* from here on: do not touch buffer anymore */
517 qdio_release_aob(aob);
518}
519
520static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
521{
522 return card->options.cq == QETH_CQ_ENABLED &&
523 card->qdio.c_q != NULL &&
524 queue != 0 &&
525 queue == card->qdio.no_in_queues - 1;
526}
527
528
4a71df50
FB		 529static int qeth_issue_next_read(struct qeth_card *card)
530{
531 int rc;
532 struct qeth_cmd_buffer *iob;
533
847a50fd 534 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 535 if (card->read.state != CH_STATE_UP)
536 return -EIO;
537 iob = qeth_get_buffer(&card->read);
538 if (!iob) {
74eacdb9
FB		 539 dev_warn(&card->gdev->dev, "The qeth device driver "
540 "failed to recover an error on the device\n");
541 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
542 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 543 return -ENOMEM;
544 }
545 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 546 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 547 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
548 (addr_t) iob, 0, 0);
549 if (rc) {
74eacdb9
FB		 550 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
551 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 552 atomic_set(&card->read.irq_pending, 0);
908abbb5 553 card->read_or_write_problem = 1;
4a71df50
FB		 554 qeth_schedule_recovery(card);
555 wake_up(&card->wait_q);
556 }
557 return rc;
558}
559
560static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
561{
562 struct qeth_reply *reply;
563
564 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
565 if (reply) {
566 atomic_set(&reply->refcnt, 1);
567 atomic_set(&reply->received, 0);
568 reply->card = card;
6531084c 569 }
4a71df50
FB		 570 return reply;
571}
572
573static void qeth_get_reply(struct qeth_reply *reply)
574{
575 WARN_ON(atomic_read(&reply->refcnt) <= 0);
576 atomic_inc(&reply->refcnt);
577}
578
579static void qeth_put_reply(struct qeth_reply *reply)
580{
581 WARN_ON(atomic_read(&reply->refcnt) <= 0);
582 if (atomic_dec_and_test(&reply->refcnt))
583 kfree(reply);
584}
585
d11ba0c4 586static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 587 struct qeth_card *card)
588{
4a71df50 589 char *ipa_name;
d11ba0c4 590 int com = cmd->hdr.command;
4a71df50 591 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 592 if (rc)
70919e23
UB		 593 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
594 "x%X \"%s\"\n",
595 ipa_name, com, dev_name(&card->gdev->dev),
596 QETH_CARD_IFNAME(card), rc,
597 qeth_get_ipa_msg(rc));
d11ba0c4 598 else
70919e23
UB		 599 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
600 ipa_name, com, dev_name(&card->gdev->dev),
601 QETH_CARD_IFNAME(card));
4a71df50
FB		 602}
603
604static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
605 struct qeth_cmd_buffer *iob)
606{
607 struct qeth_ipa_cmd *cmd = NULL;
608
847a50fd 609 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 610 if (IS_IPA(iob->data)) {
611 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
612 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 613 if (cmd->hdr.command != IPA_CMD_SETCCID &&
614 cmd->hdr.command != IPA_CMD_DELCCID &&
615 cmd->hdr.command != IPA_CMD_MODCCID &&
616 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 617 qeth_issue_ipa_msg(cmd,
618 cmd->hdr.return_code, card);
4a71df50
FB		 619 return cmd;
620 } else {
621 switch (cmd->hdr.command) {
622 case IPA_CMD_STOPLAN:
0f54761d
SR		 623 if (cmd->hdr.return_code ==
624 IPA_RC_VEPA_TO_VEB_TRANSITION) {
625 dev_err(&card->gdev->dev,
626 "Interface %s is down because the "
627 "adjacent port is no longer in "
628 "reflective relay mode\n",
629 QETH_CARD_IFNAME(card));
630 qeth_close_dev(card);
631 } else {
632 dev_warn(&card->gdev->dev,
74eacdb9
FB		 633 "The link for interface %s on CHPID"
634 " 0x%X failed\n",
4a71df50
FB		 635 QETH_CARD_IFNAME(card),
636 card->info.chpid);
0f54761d
SR		 637 qeth_issue_ipa_msg(cmd,
638 cmd->hdr.return_code, card);
639 }
4a71df50
FB		 640 card->lan_online = 0;
641 if (card->dev && netif_carrier_ok(card->dev))
642 netif_carrier_off(card->dev);
643 return NULL;
644 case IPA_CMD_STARTLAN:
74eacdb9
FB		 645 dev_info(&card->gdev->dev,
646 "The link for %s on CHPID 0x%X has"
647 " been restored\n",
4a71df50
FB		 648 QETH_CARD_IFNAME(card),
649 card->info.chpid);
650 netif_carrier_on(card->dev);
922dc062 651 card->lan_online = 1;
1da74b1c
FB		 652 if (card->info.hwtrap)
653 card->info.hwtrap = 2;
4a71df50
FB		 654 qeth_schedule_recovery(card);
655 return NULL;
9c23f4da
EC		 656 case IPA_CMD_SETBRIDGEPORT_IQD:
657 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 658 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 659 if (card->discipline->control_event_handler
660 (card, cmd))
661 return cmd;
662 else
663 return NULL;
4a71df50
FB		 664 case IPA_CMD_MODCCID:
665 return cmd;
666 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 667 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 668 break;
669 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 670 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 671 break;
672 default:
c4cef07c 673 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 674 "but not a reply!\n");
675 break;
676 }
677 }
678 }
679 return cmd;
680}
681
682void qeth_clear_ipacmd_list(struct qeth_card *card)
683{
684 struct qeth_reply *reply, *r;
685 unsigned long flags;
686
847a50fd 687 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 688
689 spin_lock_irqsave(&card->lock, flags);
690 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
691 qeth_get_reply(reply);
692 reply->rc = -EIO;
693 atomic_inc(&reply->received);
694 list_del_init(&reply->list);
695 wake_up(&reply->wait_q);
696 qeth_put_reply(reply);
697 }
698 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 699 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 700}
701EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
702
5113fec0
UB		 703static int qeth_check_idx_response(struct qeth_card *card,
704 unsigned char *buffer)
4a71df50
FB		 705{
706 if (!buffer)
707 return 0;
708
d11ba0c4 709 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 710 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 711 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 712 "with cause code 0x%02x%s\n",
713 buffer[4],
714 ((buffer[4] == 0x22) ?
715 " -- try another portname" : ""));
847a50fd
CO		 716 QETH_CARD_TEXT(card, 2, "ckidxres");
717 QETH_CARD_TEXT(card, 2, " idxterm");
718 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 719 if (buffer[4] == 0xf6) {
720 dev_err(&card->gdev->dev,
721 "The qeth device is not configured "
722 "for the OSI layer required by z/VM\n");
723 return -EPERM;
724 }
4a71df50
FB		 725 return -EIO;
726 }
727 return 0;
728}
729
bca51650
TR		 730static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
731{
732 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
733 dev_get_drvdata(&cdev->dev))->dev);
734 return card;
735}
736
4a71df50
FB		 737static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
738 __u32 len)
739{
740 struct qeth_card *card;
741
4a71df50 742 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 743 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 744 if (channel == &card->read)
745 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
746 else
747 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
748 channel->ccw.count = len;
749 channel->ccw.cda = (__u32) __pa(iob);
750}
751
752static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
753{
754 __u8 index;
755
847a50fd 756 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 757 index = channel->io_buf_no;
758 do {
759 if (channel->iob[index].state == BUF_STATE_FREE) {
760 channel->iob[index].state = BUF_STATE_LOCKED;
761 channel->io_buf_no = (channel->io_buf_no + 1) %
762 QETH_CMD_BUFFER_NO;
763 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
764 return channel->iob + index;
765 }
766 index = (index + 1) % QETH_CMD_BUFFER_NO;
767 } while (index != channel->io_buf_no);
768
769 return NULL;
770}
771
772void qeth_release_buffer(struct qeth_channel *channel,
773 struct qeth_cmd_buffer *iob)
774{
775 unsigned long flags;
776
847a50fd 777 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 778 spin_lock_irqsave(&channel->iob_lock, flags);
779 memset(iob->data, 0, QETH_BUFSIZE);
780 iob->state = BUF_STATE_FREE;
781 iob->callback = qeth_send_control_data_cb;
782 iob->rc = 0;
783 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 784 wake_up(&channel->wait_q);
4a71df50
FB		 785}
786EXPORT_SYMBOL_GPL(qeth_release_buffer);
787
788static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
789{
790 struct qeth_cmd_buffer *buffer = NULL;
791 unsigned long flags;
792
793 spin_lock_irqsave(&channel->iob_lock, flags);
794 buffer = __qeth_get_buffer(channel);
795 spin_unlock_irqrestore(&channel->iob_lock, flags);
796 return buffer;
797}
798
799struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
800{
801 struct qeth_cmd_buffer *buffer;
802 wait_event(channel->wait_q,
803 ((buffer = qeth_get_buffer(channel)) != NULL));
804 return buffer;
805}
806EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
807
808void qeth_clear_cmd_buffers(struct qeth_channel *channel)
809{
810 int cnt;
811
812 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
813 qeth_release_buffer(channel, &channel->iob[cnt]);
814 channel->buf_no = 0;
815 channel->io_buf_no = 0;
816}
817EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
818
819static void qeth_send_control_data_cb(struct qeth_channel *channel,
820 struct qeth_cmd_buffer *iob)
821{
822 struct qeth_card *card;
823 struct qeth_reply *reply, *r;
824 struct qeth_ipa_cmd *cmd;
825 unsigned long flags;
826 int keep_reply;
5113fec0 827 int rc = 0;
4a71df50 828
4a71df50 829 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 830 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 831 rc = qeth_check_idx_response(card, iob->data);
832 switch (rc) {
833 case 0:
834 break;
835 case -EIO:
4a71df50 836 qeth_clear_ipacmd_list(card);
5113fec0 837 qeth_schedule_recovery(card);
01fc3e86 838 /* fall through */
5113fec0 839 default:
4a71df50
FB		 840 goto out;
841 }
842
843 cmd = qeth_check_ipa_data(card, iob);
844 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
845 goto out;
846 /*in case of OSN : check if cmd is set */
847 if (card->info.type == QETH_CARD_TYPE_OSN &&
848 cmd &&
849 cmd->hdr.command != IPA_CMD_STARTLAN &&
850 card->osn_info.assist_cb != NULL) {
851 card->osn_info.assist_cb(card->dev, cmd);
852 goto out;
853 }
854
855 spin_lock_irqsave(&card->lock, flags);
856 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
857 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
858 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
859 qeth_get_reply(reply);
860 list_del_init(&reply->list);
861 spin_unlock_irqrestore(&card->lock, flags);
862 keep_reply = 0;
863 if (reply->callback != NULL) {
864 if (cmd) {
865 reply->offset = (__u16)((char *)cmd -
866 (char *)iob->data);
867 keep_reply = reply->callback(card,
868 reply,
869 (unsigned long)cmd);
870 } else
871 keep_reply = reply->callback(card,
872 reply,
873 (unsigned long)iob);
874 }
875 if (cmd)
876 reply->rc = (u16) cmd->hdr.return_code;
877 else if (iob->rc)
878 reply->rc = iob->rc;
879 if (keep_reply) {
880 spin_lock_irqsave(&card->lock, flags);
881 list_add_tail(&reply->list,
882 &card->cmd_waiter_list);
883 spin_unlock_irqrestore(&card->lock, flags);
884 } else {
885 atomic_inc(&reply->received);
886 wake_up(&reply->wait_q);
887 }
888 qeth_put_reply(reply);
889 goto out;
890 }
891 }
892 spin_unlock_irqrestore(&card->lock, flags);
893out:
894 memcpy(&card->seqno.pdu_hdr_ack,
895 QETH_PDU_HEADER_SEQ_NO(iob->data),
896 QETH_SEQ_NO_LENGTH);
897 qeth_release_buffer(channel, iob);
898}
899
900static int qeth_setup_channel(struct qeth_channel *channel)
901{
902 int cnt;
903
d11ba0c4 904 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 905 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 906 channel->iob[cnt].data =
b3332930 907 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 908 if (channel->iob[cnt].data == NULL)
909 break;
910 channel->iob[cnt].state = BUF_STATE_FREE;
911 channel->iob[cnt].channel = channel;
912 channel->iob[cnt].callback = qeth_send_control_data_cb;
913 channel->iob[cnt].rc = 0;
914 }
915 if (cnt < QETH_CMD_BUFFER_NO) {
916 while (cnt-- > 0)
917 kfree(channel->iob[cnt].data);
918 return -ENOMEM;
919 }
920 channel->buf_no = 0;
921 channel->io_buf_no = 0;
922 atomic_set(&channel->irq_pending, 0);
923 spin_lock_init(&channel->iob_lock);
924
925 init_waitqueue_head(&channel->wait_q);
926 return 0;
927}
928
929static int qeth_set_thread_start_bit(struct qeth_card *card,
930 unsigned long thread)
931{
932 unsigned long flags;
933
934 spin_lock_irqsave(&card->thread_mask_lock, flags);
935 if (!(card->thread_allowed_mask & thread) ||
936 (card->thread_start_mask & thread)) {
937 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
938 return -EPERM;
939 }
940 card->thread_start_mask |= thread;
941 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
942 return 0;
943}
944
945void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
946{
947 unsigned long flags;
948
949 spin_lock_irqsave(&card->thread_mask_lock, flags);
950 card->thread_start_mask &= ~thread;
951 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
952 wake_up(&card->wait_q);
953}
954EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
955
956void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
957{
958 unsigned long flags;
959
960 spin_lock_irqsave(&card->thread_mask_lock, flags);
961 card->thread_running_mask &= ~thread;
962 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
963 wake_up(&card->wait_q);
964}
965EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
966
967static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
968{
969 unsigned long flags;
970 int rc = 0;
971
972 spin_lock_irqsave(&card->thread_mask_lock, flags);
973 if (card->thread_start_mask & thread) {
974 if ((card->thread_allowed_mask & thread) &&
975 !(card->thread_running_mask & thread)) {
976 rc = 1;
977 card->thread_start_mask &= ~thread;
978 card->thread_running_mask |= thread;
979 } else
980 rc = -EPERM;
981 }
982 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
983 return rc;
984}
985
986int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
987{
988 int rc = 0;
989
990 wait_event(card->wait_q,
991 (rc = __qeth_do_run_thread(card, thread)) >= 0);
992 return rc;
993}
994EXPORT_SYMBOL_GPL(qeth_do_run_thread);
995
996void qeth_schedule_recovery(struct qeth_card *card)
997{
847a50fd 998 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 999 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
1000 schedule_work(&card->kernel_thread_starter);
1001}
1002EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
1003
1004static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
1005{
1006 int dstat, cstat;
1007 char *sense;
847a50fd 1008 struct qeth_card *card;
4a71df50
FB		 1009
1010 sense = (char *) irb->ecw;
23d805b6
PO		 1011 cstat = irb->scsw.cmd.cstat;
1012 dstat = irb->scsw.cmd.dstat;
847a50fd 1013 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1014
1015 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1016 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1017 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1018 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1019 dev_warn(&cdev->dev, "The qeth device driver "
1020 "failed to recover an error on the device\n");
5113fec0 1021 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1022 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1023 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1024 16, 1, irb, 64, 1);
1025 return 1;
1026 }
1027
1028 if (dstat & DEV_STAT_UNIT_CHECK) {
1029 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1030 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1031 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1032 return 1;
1033 }
1034 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1035 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1036 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1037 return 1;
4a71df50
FB		 1038 }
1039 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1040 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1041 return 1;
1042 }
1043 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1044 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1045 return 0;
1046 }
847a50fd 1047 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1048 return 1;
1049 }
1050 return 0;
1051}
1052
1053static long __qeth_check_irb_error(struct ccw_device *cdev,
1054 unsigned long intparm, struct irb *irb)
1055{
847a50fd
CO		 1056 struct qeth_card *card;
1057
1058 card = CARD_FROM_CDEV(cdev);
1059
e95051ff 1060 if (!card || !IS_ERR(irb))
4a71df50
FB		 1061 return 0;
1062
1063 switch (PTR_ERR(irb)) {
1064 case -EIO:
74eacdb9
FB		 1065 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1066 dev_name(&cdev->dev));
847a50fd
CO		 1067 QETH_CARD_TEXT(card, 2, "ckirberr");
1068 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1069 break;
1070 case -ETIMEDOUT:
74eacdb9
FB		 1071 dev_warn(&cdev->dev, "A hardware operation timed out"
1072 " on the device\n");
847a50fd
CO		 1073 QETH_CARD_TEXT(card, 2, "ckirberr");
1074 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1075 if (intparm == QETH_RCD_PARM) {
e95051ff 1076 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1077 card->data.state = CH_STATE_DOWN;
1078 wake_up(&card->wait_q);
1079 }
1080 }
1081 break;
1082 default:
74eacdb9
FB		 1083 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1084 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1085 QETH_CARD_TEXT(card, 2, "ckirberr");
1086 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1087 }
1088 return PTR_ERR(irb);
1089}
1090
1091static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1092 struct irb *irb)
1093{
1094 int rc;
1095 int cstat, dstat;
1096 struct qeth_cmd_buffer *buffer;
1097 struct qeth_channel *channel;
1098 struct qeth_card *card;
1099 struct qeth_cmd_buffer *iob;
1100 __u8 index;
1101
4a71df50
FB		 1102 if (__qeth_check_irb_error(cdev, intparm, irb))
1103 return;
23d805b6
PO		 1104 cstat = irb->scsw.cmd.cstat;
1105 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1106
1107 card = CARD_FROM_CDEV(cdev);
1108 if (!card)
1109 return;
1110
847a50fd
CO		 1111 QETH_CARD_TEXT(card, 5, "irq");
1112
4a71df50
FB		 1113 if (card->read.ccwdev == cdev) {
1114 channel = &card->read;
847a50fd 1115 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1116 } else if (card->write.ccwdev == cdev) {
1117 channel = &card->write;
847a50fd 1118 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1119 } else {
1120 channel = &card->data;
847a50fd 1121 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1122 }
1123 atomic_set(&channel->irq_pending, 0);
1124
23d805b6 1125 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1126 channel->state = CH_STATE_STOPPED;
1127
23d805b6 1128 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1129 channel->state = CH_STATE_HALTED;
1130
1131 /*let's wake up immediately on data channel*/
1132 if ((channel == &card->data) && (intparm != 0) &&
1133 (intparm != QETH_RCD_PARM))
1134 goto out;
1135
1136 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1137 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1138 /* we don't have to handle this further */
1139 intparm = 0;
1140 }
1141 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1142 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1143 /* we don't have to handle this further */
1144 intparm = 0;
1145 }
1146 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1147 (dstat & DEV_STAT_UNIT_CHECK) ||
1148 (cstat)) {
1149 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1150 dev_warn(&channel->ccwdev->dev,
1151 "The qeth device driver failed to recover "
1152 "an error on the device\n");
1153 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1154 "0x%X dstat 0x%X\n",
1155 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1156 print_hex_dump(KERN_WARNING, "qeth: irb ",
1157 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1158 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1159 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1160 }
1161 if (intparm == QETH_RCD_PARM) {
1162 channel->state = CH_STATE_DOWN;
1163 goto out;
1164 }
1165 rc = qeth_get_problem(cdev, irb);
1166 if (rc) {
28a7e4c9 1167 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1168 qeth_schedule_recovery(card);
1169 goto out;
1170 }
1171 }
1172
1173 if (intparm == QETH_RCD_PARM) {
1174 channel->state = CH_STATE_RCD_DONE;
1175 goto out;
1176 }
1177 if (intparm) {
1178 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1179 buffer->state = BUF_STATE_PROCESSED;
1180 }
1181 if (channel == &card->data)
1182 return;
1183 if (channel == &card->read &&
1184 channel->state == CH_STATE_UP)
1185 qeth_issue_next_read(card);
1186
1187 iob = channel->iob;
1188 index = channel->buf_no;
1189 while (iob[index].state == BUF_STATE_PROCESSED) {
1190 if (iob[index].callback != NULL)
1191 iob[index].callback(channel, iob + index);
1192
1193 index = (index + 1) % QETH_CMD_BUFFER_NO;
1194 }
1195 channel->buf_no = index;
1196out:
1197 wake_up(&card->wait_q);
1198 return;
1199}
1200
b3332930 1201static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1202 struct qeth_qdio_out_buffer *buf,
b3332930 1203 enum iucv_tx_notify notification)
4a71df50 1204{
4a71df50
FB		 1205 struct sk_buff *skb;
1206
b3332930
FB		 1207 if (skb_queue_empty(&buf->skb_list))
1208 goto out;
1209 skb = skb_peek(&buf->skb_list);
1210 while (skb) {
1211 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1212 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1213 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1214 if (skb->sk) {
1215 struct iucv_sock *iucv = iucv_sk(skb->sk);
1216 iucv->sk_txnotify(skb, notification);
1217 }
1218 }
1219 if (skb_queue_is_last(&buf->skb_list, skb))
1220 skb = NULL;
1221 else
1222 skb = skb_queue_next(&buf->skb_list, skb);
1223 }
1224out:
1225 return;
1226}
1227
1228static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1229{
1230 struct sk_buff *skb;
72861ae7
EL		 1231 struct iucv_sock *iucv;
1232 int notify_general_error = 0;
1233
1234 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1235 notify_general_error = 1;
1236
1237 /* release may never happen from within CQ tasklet scope */
18af5c17 1238 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1239
b67d801f
UB		 1240 skb = skb_dequeue(&buf->skb_list);
1241 while (skb) {
b3332930
FB		 1242 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1243 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1244 if (notify_general_error &&
1245 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1246 if (skb->sk) {
1247 iucv = iucv_sk(skb->sk);
1248 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1249 }
1250 }
63354797 1251 refcount_dec(&skb->users);
b67d801f 1252 dev_kfree_skb_any(skb);
4a71df50
FB		 1253 skb = skb_dequeue(&buf->skb_list);
1254 }
b3332930
FB		 1255}
1256
1257static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1258 struct qeth_qdio_out_buffer *buf,
1259 enum qeth_qdio_buffer_states newbufstate)
1260{
1261 int i;
1262
1263 /* is PCI flag set on buffer? */
1264 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1265 atomic_dec(&queue->set_pci_flags_count);
1266
1267 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1268 qeth_release_skbs(buf);
1269 }
4a71df50 1270 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1271 if (buf->buffer->element[i].addr && buf->is_header[i])
1272 kmem_cache_free(qeth_core_header_cache,
1273 buf->buffer->element[i].addr);
1274 buf->is_header[i] = 0;
4a71df50
FB		 1275 buf->buffer->element[i].length = 0;
1276 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1277 buf->buffer->element[i].eflags = 0;
1278 buf->buffer->element[i].sflags = 0;
4a71df50 1279 }
3ec90878
JG		 1280 buf->buffer->element[15].eflags = 0;
1281 buf->buffer->element[15].sflags = 0;
4a71df50 1282 buf->next_element_to_fill = 0;
0da9581d
EL		 1283 atomic_set(&buf->state, newbufstate);
1284}
1285
1286static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1287{
1288 int j;
1289
1290 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1291 if (!q->bufs[j])
1292 continue;
72861ae7 1293 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1294 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1295 if (free) {
1296 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1297 q->bufs[j] = NULL;
1298 }
1299 }
4a71df50
FB		 1300}
1301
1302void qeth_clear_qdio_buffers(struct qeth_card *card)
1303{
0da9581d 1304 int i;
4a71df50 1305
847a50fd 1306 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1307 /* clear outbound buffers to free skbs */
0da9581d 1308 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1309 if (card->qdio.out_qs[i]) {
0da9581d 1310 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1311 }
0da9581d 1312 }
4a71df50
FB		 1313}
1314EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1315
1316static void qeth_free_buffer_pool(struct qeth_card *card)
1317{
1318 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1319 int i = 0;
4a71df50
FB		 1320 list_for_each_entry_safe(pool_entry, tmp,
1321 &card->qdio.init_pool.entry_list, init_list){
1322 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1323 free_page((unsigned long)pool_entry->elements[i]);
1324 list_del(&pool_entry->init_list);
1325 kfree(pool_entry);
1326 }
1327}
1328
4a71df50
FB		 1329static void qeth_clean_channel(struct qeth_channel *channel)
1330{
1331 int cnt;
1332
d11ba0c4 1333 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1334 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1335 kfree(channel->iob[cnt].data);
1336}
1337
725b9c04
SO		 1338static void qeth_set_single_write_queues(struct qeth_card *card)
1339{
1340 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1341 (card->qdio.no_out_queues == 4))
1342 qeth_free_qdio_buffers(card);
1343
1344 card->qdio.no_out_queues = 1;
1345 if (card->qdio.default_out_queue != 0)
1346 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1347
1348 card->qdio.default_out_queue = 0;
1349}
1350
1351static void qeth_set_multiple_write_queues(struct qeth_card *card)
1352{
1353 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1354 (card->qdio.no_out_queues == 1)) {
1355 qeth_free_qdio_buffers(card);
1356 card->qdio.default_out_queue = 2;
1357 }
1358 card->qdio.no_out_queues = 4;
1359}
1360
1361static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1362{
4a71df50 1363 struct ccw_device *ccwdev;
2bf29df7 1364 struct channel_path_desc *chp_dsc;
4a71df50 1365
5113fec0 1366 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1367
1368 ccwdev = card->data.ccwdev;
725b9c04
SO		 1369 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1370 if (!chp_dsc)
1371 goto out;
1372
1373 card->info.func_level = 0x4100 + chp_dsc->desc;
1374 if (card->info.type == QETH_CARD_TYPE_IQD)
1375 goto out;
1376
1377 /* CHPP field bit 6 == 1 -> single queue */
1378 if ((chp_dsc->chpp & 0x02) == 0x02)
1379 qeth_set_single_write_queues(card);
1380 else
1381 qeth_set_multiple_write_queues(card);
1382out:
1383 kfree(chp_dsc);
5113fec0
UB		 1384 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1385 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1386}
1387
1388static void qeth_init_qdio_info(struct qeth_card *card)
1389{
d11ba0c4 1390 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1391 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1392 /* inbound */
ed2e93ef 1393 card->qdio.no_in_queues = 1;
4a71df50 1394 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1395 if (card->info.type == QETH_CARD_TYPE_IQD)
1396 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1397 else
1398 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1399 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1400 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1401 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1402}
1403
1404static void qeth_set_intial_options(struct qeth_card *card)
1405{
1406 card->options.route4.type = NO_ROUTER;
1407 card->options.route6.type = NO_ROUTER;
4a71df50 1408 card->options.fake_broadcast = 0;
4a71df50
FB		 1409 card->options.performance_stats = 0;
1410 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1411 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1412 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1413}
1414
1415static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1416{
1417 unsigned long flags;
1418 int rc = 0;
1419
1420 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1421 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1422 (u8) card->thread_start_mask,
1423 (u8) card->thread_allowed_mask,
1424 (u8) card->thread_running_mask);
1425 rc = (card->thread_start_mask & thread);
1426 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1427 return rc;
1428}
1429
1430static void qeth_start_kernel_thread(struct work_struct *work)
1431{
3f36b890 1432 struct task_struct *ts;
4a71df50
FB		 1433 struct qeth_card *card = container_of(work, struct qeth_card,
1434 kernel_thread_starter);
847a50fd 1435 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1436
1437 if (card->read.state != CH_STATE_UP &&
1438 card->write.state != CH_STATE_UP)
1439 return;
3f36b890 1440 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1441 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1442 "qeth_recover");
3f36b890
FB		 1443 if (IS_ERR(ts)) {
1444 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1445 qeth_clear_thread_running_bit(card,
1446 QETH_RECOVER_THREAD);
1447 }
1448 }
4a71df50
FB		 1449}
1450
bca51650 1451static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1452static int qeth_setup_card(struct qeth_card *card)
1453{
1454
d11ba0c4
PT		 1455 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1456 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1457
1458 card->read.state = CH_STATE_DOWN;
1459 card->write.state = CH_STATE_DOWN;
1460 card->data.state = CH_STATE_DOWN;
1461 card->state = CARD_STATE_DOWN;
1462 card->lan_online = 0;
908abbb5 1463 card->read_or_write_problem = 0;
4a71df50
FB		 1464 card->dev = NULL;
1465 spin_lock_init(&card->vlanlock);
1466 spin_lock_init(&card->mclock);
4a71df50
FB		 1467 spin_lock_init(&card->lock);
1468 spin_lock_init(&card->ip_lock);
1469 spin_lock_init(&card->thread_mask_lock);
c4949f07 1470 mutex_init(&card->conf_mutex);
9dc48ccc 1471 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1472 card->thread_start_mask = 0;
1473 card->thread_allowed_mask = 0;
1474 card->thread_running_mask = 0;
1475 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1476 INIT_LIST_HEAD(&card->cmd_waiter_list);
1477 init_waitqueue_head(&card->wait_q);
25985edc 1478 /* initial options */
4a71df50
FB		 1479 qeth_set_intial_options(card);
1480 /* IP address takeover */
1481 INIT_LIST_HEAD(&card->ipato.entries);
1482 card->ipato.enabled = 0;
1483 card->ipato.invert4 = 0;
1484 card->ipato.invert6 = 0;
1485 /* init QDIO stuff */
1486 qeth_init_qdio_info(card);
b3332930 1487 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1488 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1489 return 0;
1490}
1491
6bcac508
MS		 1492static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1493{
1494 struct qeth_card *card = container_of(slr, struct qeth_card,
1495 qeth_service_level);
0d788c7d
KDW		 1496 if (card->info.mcl_level[0])
1497 seq_printf(m, "qeth: %s firmware level %s\n",
1498 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1499}
1500
4a71df50
FB		 1501static struct qeth_card *qeth_alloc_card(void)
1502{
1503 struct qeth_card *card;
1504
d11ba0c4 1505 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1506 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1507 if (!card)
76b11f8e 1508 goto out;
d11ba0c4 1509 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1510 if (qeth_setup_channel(&card->read))
1511 goto out_ip;
1512 if (qeth_setup_channel(&card->write))
1513 goto out_channel;
4a71df50 1514 card->options.layer2 = -1;
6bcac508
MS		 1515 card->qeth_service_level.seq_print = qeth_core_sl_print;
1516 register_service_level(&card->qeth_service_level);
4a71df50 1517 return card;
76b11f8e
UB		 1518
1519out_channel:
1520 qeth_clean_channel(&card->read);
1521out_ip:
76b11f8e
UB		 1522 kfree(card);
1523out:
1524 return NULL;
4a71df50
FB		 1525}
1526
ed2e93ef 1527static void qeth_determine_card_type(struct qeth_card *card)
4a71df50 1528{
d11ba0c4 1529 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1530
1531 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1532 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
ed2e93ef
JW		 1533 card->info.type = CARD_RDEV(card)->id.driver_info;
1534 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1535 if (card->info.type == QETH_CARD_TYPE_IQD)
1536 card->info.is_multicast_different = 0x0103;
1537 qeth_update_from_chp_desc(card);
4a71df50
FB		 1538}
1539
1540static int qeth_clear_channel(struct qeth_channel *channel)
1541{
1542 unsigned long flags;
1543 struct qeth_card *card;
1544 int rc;
1545
4a71df50 1546 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1547 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1548 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1549 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1550 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1551
1552 if (rc)
1553 return rc;
1554 rc = wait_event_interruptible_timeout(card->wait_q,
1555 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1556 if (rc == -ERESTARTSYS)
1557 return rc;
1558 if (channel->state != CH_STATE_STOPPED)
1559 return -ETIME;
1560 channel->state = CH_STATE_DOWN;
1561 return 0;
1562}
1563
1564static int qeth_halt_channel(struct qeth_channel *channel)
1565{
1566 unsigned long flags;
1567 struct qeth_card *card;
1568 int rc;
1569
4a71df50 1570 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1571 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1572 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1573 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1574 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1575
1576 if (rc)
1577 return rc;
1578 rc = wait_event_interruptible_timeout(card->wait_q,
1579 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1580 if (rc == -ERESTARTSYS)
1581 return rc;
1582 if (channel->state != CH_STATE_HALTED)
1583 return -ETIME;
1584 return 0;
1585}
1586
1587static int qeth_halt_channels(struct qeth_card *card)
1588{
1589 int rc1 = 0, rc2 = 0, rc3 = 0;
1590
847a50fd 1591 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1592 rc1 = qeth_halt_channel(&card->read);
1593 rc2 = qeth_halt_channel(&card->write);
1594 rc3 = qeth_halt_channel(&card->data);
1595 if (rc1)
1596 return rc1;
1597 if (rc2)
1598 return rc2;
1599 return rc3;
1600}
1601
1602static int qeth_clear_channels(struct qeth_card *card)
1603{
1604 int rc1 = 0, rc2 = 0, rc3 = 0;
1605
847a50fd 1606 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1607 rc1 = qeth_clear_channel(&card->read);
1608 rc2 = qeth_clear_channel(&card->write);
1609 rc3 = qeth_clear_channel(&card->data);
1610 if (rc1)
1611 return rc1;
1612 if (rc2)
1613 return rc2;
1614 return rc3;
1615}
1616
1617static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1618{
1619 int rc = 0;
1620
847a50fd 1621 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1622
1623 if (halt)
1624 rc = qeth_halt_channels(card);
1625 if (rc)
1626 return rc;
1627 return qeth_clear_channels(card);
1628}
1629
1630int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1631{
1632 int rc = 0;
1633
847a50fd 1634 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1635 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1636 QETH_QDIO_CLEANING)) {
1637 case QETH_QDIO_ESTABLISHED:
1638 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1639 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1640 QDIO_FLAG_CLEANUP_USING_HALT);
1641 else
cc961d40 1642 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1643 QDIO_FLAG_CLEANUP_USING_CLEAR);
1644 if (rc)
847a50fd 1645 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1646 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1647 break;
1648 case QETH_QDIO_CLEANING:
1649 return rc;
1650 default:
1651 break;
1652 }
1653 rc = qeth_clear_halt_card(card, use_halt);
1654 if (rc)
847a50fd 1655 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1656 card->state = CARD_STATE_DOWN;
1657 return rc;
1658}
1659EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1660
1661static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1662 int *length)
1663{
1664 struct ciw *ciw;
1665 char *rcd_buf;
1666 int ret;
1667 struct qeth_channel *channel = &card->data;
1668 unsigned long flags;
1669
1670 /*
1671 * scan for RCD command in extended SenseID data
1672 */
1673 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1674 if (!ciw || ciw->cmd == 0)
1675 return -EOPNOTSUPP;
1676 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1677 if (!rcd_buf)
1678 return -ENOMEM;
1679
1680 channel->ccw.cmd_code = ciw->cmd;
1681 channel->ccw.cda = (__u32) __pa(rcd_buf);
1682 channel->ccw.count = ciw->count;
1683 channel->ccw.flags = CCW_FLAG_SLI;
1684 channel->state = CH_STATE_RCD;
1685 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1686 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1687 QETH_RCD_PARM, LPM_ANYPATH, 0,
1688 QETH_RCD_TIMEOUT);
1689 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1690 if (!ret)
1691 wait_event(card->wait_q,
1692 (channel->state == CH_STATE_RCD_DONE ||
1693 channel->state == CH_STATE_DOWN));
1694 if (channel->state == CH_STATE_DOWN)
1695 ret = -EIO;
1696 else
1697 channel->state = CH_STATE_DOWN;
1698 if (ret) {
1699 kfree(rcd_buf);
1700 *buffer = NULL;
1701 *length = 0;
1702 } else {
1703 *length = ciw->count;
1704 *buffer = rcd_buf;
1705 }
1706 return ret;
1707}
1708
a60389ab 1709static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1710{
a60389ab 1711 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1712 card->info.chpid = prcd[30];
1713 card->info.unit_addr2 = prcd[31];
1714 card->info.cula = prcd[63];
1715 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1716 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1717}
1718
c70eb09d
JW		 1719/* Determine whether the device requires a specific layer discipline */
1720static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1721{
1722 if (card->info.type == QETH_CARD_TYPE_OSM ||
1723 card->info.type == QETH_CARD_TYPE_OSN) {
1724 QETH_DBF_TEXT(SETUP, 3, "force l2");
1725 return QETH_DISCIPLINE_LAYER2;
1726 }
1727
1728 /* virtual HiperSocket is L3 only: */
1729 if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) {
1730 QETH_DBF_TEXT(SETUP, 3, "force l3");
1731 return QETH_DISCIPLINE_LAYER3;
1732 }
1733
1734 QETH_DBF_TEXT(SETUP, 3, "force no");
1735 return QETH_DISCIPLINE_UNDETERMINED;
1736}
1737
a60389ab
EL		 1738static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1739{
1740 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1741
e6e056ba 1742 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1743 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1744 card->info.blkt.time_total = 0;
1745 card->info.blkt.inter_packet = 0;
1746 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1747 } else {
1748 card->info.blkt.time_total = 250;
1749 card->info.blkt.inter_packet = 5;
1750 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1751 }
4a71df50
FB		 1752}
1753
1754static void qeth_init_tokens(struct qeth_card *card)
1755{
1756 card->token.issuer_rm_w = 0x00010103UL;
1757 card->token.cm_filter_w = 0x00010108UL;
1758 card->token.cm_connection_w = 0x0001010aUL;
1759 card->token.ulp_filter_w = 0x0001010bUL;
1760 card->token.ulp_connection_w = 0x0001010dUL;
1761}
1762
1763static void qeth_init_func_level(struct qeth_card *card)
1764{
5113fec0
UB		 1765 switch (card->info.type) {
1766 case QETH_CARD_TYPE_IQD:
6298263a 1767 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1768 break;
1769 case QETH_CARD_TYPE_OSD:
0132951e 1770 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1771 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1772 break;
1773 default:
1774 break;
4a71df50
FB		 1775 }
1776}
1777
4a71df50
FB		 1778static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1779 void (*idx_reply_cb)(struct qeth_channel *,
1780 struct qeth_cmd_buffer *))
1781{
1782 struct qeth_cmd_buffer *iob;
1783 unsigned long flags;
1784 int rc;
1785 struct qeth_card *card;
1786
d11ba0c4 1787 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1788 card = CARD_FROM_CDEV(channel->ccwdev);
1789 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1790 if (!iob)
1791 return -ENOMEM;
4a71df50
FB		 1792 iob->callback = idx_reply_cb;
1793 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1794 channel->ccw.count = QETH_BUFSIZE;
1795 channel->ccw.cda = (__u32) __pa(iob->data);
1796
1797 wait_event(card->wait_q,
1798 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1799 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1800 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1801 rc = ccw_device_start(channel->ccwdev,
1802 &channel->ccw, (addr_t) iob, 0, 0);
1803 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1804
1805 if (rc) {
14cc21b6 1806 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1807 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1808 atomic_set(&channel->irq_pending, 0);
1809 wake_up(&card->wait_q);
1810 return rc;
1811 }
1812 rc = wait_event_interruptible_timeout(card->wait_q,
1813 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1814 if (rc == -ERESTARTSYS)
1815 return rc;
1816 if (channel->state != CH_STATE_UP) {
1817 rc = -ETIME;
d11ba0c4 1818 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1819 qeth_clear_cmd_buffers(channel);
1820 } else
1821 rc = 0;
1822 return rc;
1823}
1824
1825static int qeth_idx_activate_channel(struct qeth_channel *channel,
1826 void (*idx_reply_cb)(struct qeth_channel *,
1827 struct qeth_cmd_buffer *))
1828{
1829 struct qeth_card *card;
1830 struct qeth_cmd_buffer *iob;
1831 unsigned long flags;
1832 __u16 temp;
1833 __u8 tmp;
1834 int rc;
f06f6f32 1835 struct ccw_dev_id temp_devid;
4a71df50
FB		 1836
1837 card = CARD_FROM_CDEV(channel->ccwdev);
1838
d11ba0c4 1839 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1840
1841 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1842 if (!iob)
1843 return -ENOMEM;
4a71df50
FB		 1844 iob->callback = idx_reply_cb;
1845 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1846 channel->ccw.count = IDX_ACTIVATE_SIZE;
1847 channel->ccw.cda = (__u32) __pa(iob->data);
1848 if (channel == &card->write) {
1849 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1850 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1851 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1852 card->seqno.trans_hdr++;
1853 } else {
1854 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1855 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1856 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1857 }
1858 tmp = ((__u8)card->info.portno) | 0x80;
1859 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1860 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1861 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1862 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1863 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1864 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1865 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1866 temp = (card->info.cula << 8) + card->info.unit_addr2;
1867 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1868
1869 wait_event(card->wait_q,
1870 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1871 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1872 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1873 rc = ccw_device_start(channel->ccwdev,
1874 &channel->ccw, (addr_t) iob, 0, 0);
1875 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1876
1877 if (rc) {
14cc21b6
FB		 1878 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1879 rc);
d11ba0c4 1880 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1881 atomic_set(&channel->irq_pending, 0);
1882 wake_up(&card->wait_q);
1883 return rc;
1884 }
1885 rc = wait_event_interruptible_timeout(card->wait_q,
1886 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1887 if (rc == -ERESTARTSYS)
1888 return rc;
1889 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1890 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1891 " failed to recover an error on the device\n");
1892 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1893 dev_name(&channel->ccwdev->dev));
d11ba0c4 1894 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1895 qeth_clear_cmd_buffers(channel);
1896 return -ETIME;
1897 }
1898 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1899}
1900
1901static int qeth_peer_func_level(int level)
1902{
1903 if ((level & 0xff) == 8)
1904 return (level & 0xff) + 0x400;
1905 if (((level >> 8) & 3) == 1)
1906 return (level & 0xff) + 0x200;
1907 return level;
1908}
1909
1910static void qeth_idx_write_cb(struct qeth_channel *channel,
1911 struct qeth_cmd_buffer *iob)
1912{
1913 struct qeth_card *card;
1914 __u16 temp;
1915
d11ba0c4 1916 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1917
1918 if (channel->state == CH_STATE_DOWN) {
1919 channel->state = CH_STATE_ACTIVATING;
1920 goto out;
1921 }
1922 card = CARD_FROM_CDEV(channel->ccwdev);
1923
1924 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1925 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1926 dev_err(&card->write.ccwdev->dev,
1927 "The adapter is used exclusively by another "
1928 "host\n");
4a71df50 1929 else
74eacdb9
FB		 1930 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1931 " negative reply\n",
1932 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1933 goto out;
1934 }
1935 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1936 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1937 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1938 "function level mismatch (sent: 0x%x, received: "
1939 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1940 card->info.func_level, temp);
4a71df50
FB		 1941 goto out;
1942 }
1943 channel->state = CH_STATE_UP;
1944out:
1945 qeth_release_buffer(channel, iob);
1946}
1947
1948static void qeth_idx_read_cb(struct qeth_channel *channel,
1949 struct qeth_cmd_buffer *iob)
1950{
1951 struct qeth_card *card;
1952 __u16 temp;
1953
d11ba0c4 1954 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1955 if (channel->state == CH_STATE_DOWN) {
1956 channel->state = CH_STATE_ACTIVATING;
1957 goto out;
1958 }
1959
1960 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1961 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1962 goto out;
1963
1964 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1965 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1966 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1967 dev_err(&card->write.ccwdev->dev,
1968 "The adapter is used exclusively by another "
1969 "host\n");
5113fec0
UB		 1970 break;
1971 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1972 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1973 dev_err(&card->read.ccwdev->dev,
1974 "Setting the device online failed because of "
01fc3e86 1975 "insufficient authorization\n");
5113fec0
UB		 1976 break;
1977 default:
74eacdb9
FB		 1978 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1979 " negative reply\n",
1980 dev_name(&card->read.ccwdev->dev));
5113fec0 1981 }
01fc3e86
UB		 1982 QETH_CARD_TEXT_(card, 2, "idxread%c",
1983 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1984 goto out;
1985 }
1986
4a71df50
FB		 1987 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1988 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1989 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1990 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1991 dev_name(&card->read.ccwdev->dev),
1992 card->info.func_level, temp);
4a71df50
FB		 1993 goto out;
1994 }
1995 memcpy(&card->token.issuer_rm_r,
1996 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1997 QETH_MPC_TOKEN_LENGTH);
1998 memcpy(&card->info.mcl_level[0],
1999 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2000 channel->state = CH_STATE_UP;
2001out:
2002 qeth_release_buffer(channel, iob);
2003}
2004
2005void qeth_prepare_control_data(struct qeth_card *card, int len,
2006 struct qeth_cmd_buffer *iob)
2007{
2008 qeth_setup_ccw(&card->write, iob->data, len);
2009 iob->callback = qeth_release_buffer;
2010
2011 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2012 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2013 card->seqno.trans_hdr++;
2014 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2015 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2016 card->seqno.pdu_hdr++;
2017 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2018 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2019 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2020}
2021EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2022
efbbc1d5
EC		 2023/**
2024 * qeth_send_control_data() - send control command to the card
2025 * @card: qeth_card structure pointer
2026 * @len: size of the command buffer
2027 * @iob: qeth_cmd_buffer pointer
2028 * @reply_cb: callback function pointer
2029 * @cb_card: pointer to the qeth_card structure
2030 * @cb_reply: pointer to the qeth_reply structure
2031 * @cb_cmd: pointer to the original iob for non-IPA
2032 * commands, or to the qeth_ipa_cmd structure
2033 * for the IPA commands.
2034 * @reply_param: private pointer passed to the callback
2035 *
2036 * Returns the value of the `return_code' field of the response
2037 * block returned from the hardware, or other error indication.
2038 * Value of zero indicates successful execution of the command.
2039 *
2040 * Callback function gets called one or more times, with cb_cmd
2041 * pointing to the response returned by the hardware. Callback
2042 * function must return non-zero if more reply blocks are expected,
2043 * and zero if the last or only reply block is received. Callback
2044 * function can get the value of the reply_param pointer from the
2045 * field 'param' of the structure qeth_reply.
2046 */
2047
4a71df50
FB		 2048int qeth_send_control_data(struct qeth_card *card, int len,
2049 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2050 int (*reply_cb)(struct qeth_card *cb_card,
2051 struct qeth_reply *cb_reply,
2052 unsigned long cb_cmd),
4a71df50
FB		 2053 void *reply_param)
2054{
2055 int rc;
2056 unsigned long flags;
2057 struct qeth_reply *reply = NULL;
7834cd5a 2058 unsigned long timeout, event_timeout;
5b54e16f 2059 struct qeth_ipa_cmd *cmd;
4a71df50 2060
847a50fd 2061 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2062
908abbb5
UB		 2063 if (card->read_or_write_problem) {
2064 qeth_release_buffer(iob->channel, iob);
2065 return -EIO;
2066 }
4a71df50
FB		 2067 reply = qeth_alloc_reply(card);
2068 if (!reply) {
4a71df50
FB		 2069 return -ENOMEM;
2070 }
2071 reply->callback = reply_cb;
2072 reply->param = reply_param;
2073 if (card->state == CARD_STATE_DOWN)
2074 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2075 else
2076 reply->seqno = card->seqno.ipa++;
2077 init_waitqueue_head(&reply->wait_q);
2078 spin_lock_irqsave(&card->lock, flags);
2079 list_add_tail(&reply->list, &card->cmd_waiter_list);
2080 spin_unlock_irqrestore(&card->lock, flags);
4a71df50
FB		 2081
2082 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2083 qeth_prepare_control_data(card, len, iob);
2084
2085 if (IS_IPA(iob->data))
7834cd5a 2086 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2087 else
7834cd5a
HC		 2088 event_timeout = QETH_TIMEOUT;
2089 timeout = jiffies + event_timeout;
4a71df50 2090
847a50fd 2091 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2092 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2093 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2094 (addr_t) iob, 0, 0);
2095 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2096 if (rc) {
74eacdb9
FB		 2097 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2098 "ccw_device_start rc = %i\n",
2099 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2100 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2101 spin_lock_irqsave(&card->lock, flags);
2102 list_del_init(&reply->list);
2103 qeth_put_reply(reply);
2104 spin_unlock_irqrestore(&card->lock, flags);
2105 qeth_release_buffer(iob->channel, iob);
2106 atomic_set(&card->write.irq_pending, 0);
2107 wake_up(&card->wait_q);
2108 return rc;
2109 }
5b54e16f
FB		 2110
2111 /* we have only one long running ipassist, since we can ensure
2112 process context of this command we can sleep */
2113 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2114 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2115 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2116 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2117 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2118 goto time_err;
2119 } else {
2120 while (!atomic_read(&reply->received)) {
2121 if (time_after(jiffies, timeout))
2122 goto time_err;
2123 cpu_relax();
6531084c 2124 }
5b54e16f
FB		 2125 }
2126
70919e23
UB		 2127 if (reply->rc == -EIO)
2128 goto error;
5b54e16f
FB		 2129 rc = reply->rc;
2130 qeth_put_reply(reply);
2131 return rc;
2132
2133time_err:
70919e23 2134 reply->rc = -ETIME;
5b54e16f
FB		 2135 spin_lock_irqsave(&reply->card->lock, flags);
2136 list_del_init(&reply->list);
2137 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2138 atomic_inc(&reply->received);
70919e23 2139error:
908abbb5
UB		 2140 atomic_set(&card->write.irq_pending, 0);
2141 qeth_release_buffer(iob->channel, iob);
2142 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2143 rc = reply->rc;
2144 qeth_put_reply(reply);
2145 return rc;
2146}
2147EXPORT_SYMBOL_GPL(qeth_send_control_data);
2148
2149static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2150 unsigned long data)
2151{
2152 struct qeth_cmd_buffer *iob;
2153
d11ba0c4 2154 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2155
2156 iob = (struct qeth_cmd_buffer *) data;
2157 memcpy(&card->token.cm_filter_r,
2158 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2159 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2160 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2161 return 0;
2162}
2163
2164static int qeth_cm_enable(struct qeth_card *card)
2165{
2166 int rc;
2167 struct qeth_cmd_buffer *iob;
2168
d11ba0c4 2169 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2170
2171 iob = qeth_wait_for_buffer(&card->write);
2172 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2173 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2174 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2175 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2176 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2177
2178 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2179 qeth_cm_enable_cb, NULL);
2180 return rc;
2181}
2182
2183static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2184 unsigned long data)
2185{
2186
2187 struct qeth_cmd_buffer *iob;
2188
d11ba0c4 2189 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2190
2191 iob = (struct qeth_cmd_buffer *) data;
2192 memcpy(&card->token.cm_connection_r,
2193 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2194 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2195 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2196 return 0;
2197}
2198
2199static int qeth_cm_setup(struct qeth_card *card)
2200{
2201 int rc;
2202 struct qeth_cmd_buffer *iob;
2203
d11ba0c4 2204 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2205
2206 iob = qeth_wait_for_buffer(&card->write);
2207 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2208 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2209 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2210 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2211 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2212 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2213 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2214 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2215 qeth_cm_setup_cb, NULL);
2216 return rc;
2217
2218}
2219
cef6ff22 2220static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
4a71df50
FB		 2221{
2222 switch (card->info.type) {
4a71df50
FB		 2223 case QETH_CARD_TYPE_IQD:
2224 return card->info.max_mtu;
5113fec0 2225 case QETH_CARD_TYPE_OSD:
5113fec0 2226 case QETH_CARD_TYPE_OSX:
6e6f472d
JW		 2227 if (!card->options.layer2)
2228 return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */
2229 /* fall through */
4a71df50 2230 default:
6e6f472d 2231 return ETH_DATA_LEN;
4a71df50
FB		 2232 }
2233}
2234
cef6ff22 2235static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2236{
2237 switch (framesize) {
2238 case 0x4000:
2239 return 8192;
2240 case 0x6000:
2241 return 16384;
2242 case 0xa000:
2243 return 32768;
2244 case 0xffff:
2245 return 57344;
2246 default:
2247 return 0;
2248 }
2249}
2250
cef6ff22 2251static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
4a71df50
FB		 2252{
2253 switch (card->info.type) {
5113fec0
UB		 2254 case QETH_CARD_TYPE_OSD:
2255 case QETH_CARD_TYPE_OSM:
2256 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2257 case QETH_CARD_TYPE_IQD:
2258 return ((mtu >= 576) &&
9853b97b 2259 (mtu <= card->info.max_mtu));
4a71df50 2260 case QETH_CARD_TYPE_OSN:
4a71df50
FB		 2261 default:
2262 return 1;
2263 }
2264}
2265
2266static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2267 unsigned long data)
2268{
2269
2270 __u16 mtu, framesize;
2271 __u16 len;
2272 __u8 link_type;
2273 struct qeth_cmd_buffer *iob;
2274
d11ba0c4 2275 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2276
2277 iob = (struct qeth_cmd_buffer *) data;
2278 memcpy(&card->token.ulp_filter_r,
2279 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2280 QETH_MPC_TOKEN_LENGTH);
9853b97b 2281 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2282 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2283 mtu = qeth_get_mtu_outof_framesize(framesize);
2284 if (!mtu) {
2285 iob->rc = -EINVAL;
d11ba0c4 2286 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2287 return 0;
2288 }
8b2e18f6
UB		 2289 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2290 /* frame size has changed */
2291 if (card->dev &&
2292 ((card->dev->mtu == card->info.initial_mtu) ||
2293 (card->dev->mtu > mtu)))
2294 card->dev->mtu = mtu;
2295 qeth_free_qdio_buffers(card);
2296 }
4a71df50 2297 card->info.initial_mtu = mtu;
8b2e18f6 2298 card->info.max_mtu = mtu;
4a71df50
FB		 2299 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2300 } else {
9853b97b
FB		 2301 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2302 iob->data);
fe44014a
SR		 2303 card->info.initial_mtu = min(card->info.max_mtu,
2304 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2305 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2306 }
2307
2308 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2309 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2310 memcpy(&link_type,
2311 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2312 card->info.link_type = link_type;
2313 } else
2314 card->info.link_type = 0;
01fc3e86 2315 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2316 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2317 return 0;
2318}
2319
2320static int qeth_ulp_enable(struct qeth_card *card)
2321{
2322 int rc;
2323 char prot_type;
2324 struct qeth_cmd_buffer *iob;
2325
2326 /*FIXME: trace view callbacks*/
d11ba0c4 2327 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2328
2329 iob = qeth_wait_for_buffer(&card->write);
2330 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2331
2332 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2333 (__u8) card->info.portno;
2334 if (card->options.layer2)
2335 if (card->info.type == QETH_CARD_TYPE_OSN)
2336 prot_type = QETH_PROT_OSN2;
2337 else
2338 prot_type = QETH_PROT_LAYER2;
2339 else
2340 prot_type = QETH_PROT_TCPIP;
2341
2342 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2343 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2344 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2345 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2346 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2347 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2348 qeth_ulp_enable_cb, NULL);
2349 return rc;
2350
2351}
2352
2353static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2354 unsigned long data)
2355{
2356 struct qeth_cmd_buffer *iob;
2357
d11ba0c4 2358 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2359
2360 iob = (struct qeth_cmd_buffer *) data;
2361 memcpy(&card->token.ulp_connection_r,
2362 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2363 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2364 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2365 3)) {
2366 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2367 dev_err(&card->gdev->dev, "A connection could not be "
2368 "established because of an OLM limit\n");
bbb822a8 2369 iob->rc = -EMLINK;
65a1f898 2370 }
d11ba0c4 2371 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2372 return 0;
4a71df50
FB		 2373}
2374
2375static int qeth_ulp_setup(struct qeth_card *card)
2376{
2377 int rc;
2378 __u16 temp;
2379 struct qeth_cmd_buffer *iob;
2380 struct ccw_dev_id dev_id;
2381
d11ba0c4 2382 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2383
2384 iob = qeth_wait_for_buffer(&card->write);
2385 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2386
2387 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2388 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2389 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2390 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2391 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2392 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2393
2394 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2395 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2396 temp = (card->info.cula << 8) + card->info.unit_addr2;
2397 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2398 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2399 qeth_ulp_setup_cb, NULL);
2400 return rc;
2401}
2402
0da9581d
EL		 2403static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2404{
2405 int rc;
2406 struct qeth_qdio_out_buffer *newbuf;
2407
2408 rc = 0;
2409 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2410 if (!newbuf) {
2411 rc = -ENOMEM;
2412 goto out;
2413 }
d445a4e2 2414 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2415 skb_queue_head_init(&newbuf->skb_list);
2416 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2417 newbuf->q = q;
2418 newbuf->aob = NULL;
2419 newbuf->next_pending = q->bufs[bidx];
2420 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2421 q->bufs[bidx] = newbuf;
2422 if (q->bufstates) {
2423 q->bufstates[bidx].user = newbuf;
2424 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2425 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2426 QETH_CARD_TEXT_(q->card, 2, "%lx",
2427 (long) newbuf->next_pending);
2428 }
2429out:
2430 return rc;
2431}
2432
d445a4e2
SO		 2433static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2434{
2435 if (!q)
2436 return;
2437
2438 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2439 kfree(q);
2440}
2441
2442static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2443{
2444 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2445
2446 if (!q)
2447 return NULL;
2448
2449 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2450 kfree(q);
2451 return NULL;
2452 }
2453 return q;
2454}
0da9581d 2455
4a71df50
FB		 2456static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2457{
2458 int i, j;
2459
d11ba0c4 2460 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2461
2462 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2463 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2464 return 0;
2465
4601ba6c
SO		 2466 QETH_DBF_TEXT(SETUP, 2, "inq");
2467 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2468 if (!card->qdio.in_q)
2469 goto out_nomem;
4601ba6c 2470
4a71df50
FB		 2471 /* inbound buffer pool */
2472 if (qeth_alloc_buffer_pool(card))
2473 goto out_freeinq;
0da9581d 2474
4a71df50
FB		 2475 /* outbound */
2476 card->qdio.out_qs =
b3332930 2477 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2478 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2479 if (!card->qdio.out_qs)
2480 goto out_freepool;
2481 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2482 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2483 if (!card->qdio.out_qs[i])
2484 goto out_freeoutq;
d11ba0c4
PT		 2485 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2486 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2487 card->qdio.out_qs[i]->queue_no = i;
2488 /* give outbound qeth_qdio_buffers their qdio_buffers */
2489 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2490 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2491 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2492 goto out_freeoutqbufs;
4a71df50
FB		 2493 }
2494 }
0da9581d
EL		 2495
2496 /* completion */
2497 if (qeth_alloc_cq(card))
2498 goto out_freeoutq;
2499
4a71df50
FB		 2500 return 0;
2501
0da9581d
EL		 2502out_freeoutqbufs:
2503 while (j > 0) {
2504 --j;
2505 kmem_cache_free(qeth_qdio_outbuf_cache,
2506 card->qdio.out_qs[i]->bufs[j]);
2507 card->qdio.out_qs[i]->bufs[j] = NULL;
2508 }
4a71df50 2509out_freeoutq:
0da9581d 2510 while (i > 0) {
d445a4e2 2511 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2512 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2513 }
4a71df50
FB		 2514 kfree(card->qdio.out_qs);
2515 card->qdio.out_qs = NULL;
2516out_freepool:
2517 qeth_free_buffer_pool(card);
2518out_freeinq:
4601ba6c 2519 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2520 card->qdio.in_q = NULL;
2521out_nomem:
2522 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2523 return -ENOMEM;
2524}
2525
d445a4e2
SO		 2526static void qeth_free_qdio_buffers(struct qeth_card *card)
2527{
2528 int i, j;
2529
2530 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2531 QETH_QDIO_UNINITIALIZED)
2532 return;
2533
2534 qeth_free_cq(card);
2535 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2536 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2537 if (card->qdio.in_q->bufs[j].rx_skb)
2538 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2539 }
2540 qeth_free_qdio_queue(card->qdio.in_q);
2541 card->qdio.in_q = NULL;
2542 /* inbound buffer pool */
2543 qeth_free_buffer_pool(card);
2544 /* free outbound qdio_qs */
2545 if (card->qdio.out_qs) {
2546 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2547 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2548 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2549 }
2550 kfree(card->qdio.out_qs);
2551 card->qdio.out_qs = NULL;
2552 }
2553}
2554
4a71df50
FB		 2555static void qeth_create_qib_param_field(struct qeth_card *card,
2556 char *param_field)
2557{
2558
2559 param_field[0] = _ascebc['P'];
2560 param_field[1] = _ascebc['C'];
2561 param_field[2] = _ascebc['I'];
2562 param_field[3] = _ascebc['T'];
2563 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2564 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2565 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2566}
2567
2568static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2569 char *param_field)
2570{
2571 param_field[16] = _ascebc['B'];
2572 param_field[17] = _ascebc['L'];
2573 param_field[18] = _ascebc['K'];
2574 param_field[19] = _ascebc['T'];
2575 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2576 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2577 *((unsigned int *) (&param_field[28])) =
2578 card->info.blkt.inter_packet_jumbo;
2579}
2580
2581static int qeth_qdio_activate(struct qeth_card *card)
2582{
d11ba0c4 2583 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2584 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2585}
2586
2587static int qeth_dm_act(struct qeth_card *card)
2588{
2589 int rc;
2590 struct qeth_cmd_buffer *iob;
2591
d11ba0c4 2592 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2593
2594 iob = qeth_wait_for_buffer(&card->write);
2595 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2596
2597 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2598 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2599 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2600 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2601 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2602 return rc;
2603}
2604
2605static int qeth_mpc_initialize(struct qeth_card *card)
2606{
2607 int rc;
2608
d11ba0c4 2609 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2610
2611 rc = qeth_issue_next_read(card);
2612 if (rc) {
d11ba0c4 2613 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2614 return rc;
2615 }
2616 rc = qeth_cm_enable(card);
2617 if (rc) {
d11ba0c4 2618 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2619 goto out_qdio;
2620 }
2621 rc = qeth_cm_setup(card);
2622 if (rc) {
d11ba0c4 2623 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2624 goto out_qdio;
2625 }
2626 rc = qeth_ulp_enable(card);
2627 if (rc) {
d11ba0c4 2628 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2629 goto out_qdio;
2630 }
2631 rc = qeth_ulp_setup(card);
2632 if (rc) {
d11ba0c4 2633 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2634 goto out_qdio;
2635 }
2636 rc = qeth_alloc_qdio_buffers(card);
2637 if (rc) {
d11ba0c4 2638 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2639 goto out_qdio;
2640 }
2641 rc = qeth_qdio_establish(card);
2642 if (rc) {
d11ba0c4 2643 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2644 qeth_free_qdio_buffers(card);
2645 goto out_qdio;
2646 }
2647 rc = qeth_qdio_activate(card);
2648 if (rc) {
d11ba0c4 2649 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2650 goto out_qdio;
2651 }
2652 rc = qeth_dm_act(card);
2653 if (rc) {
d11ba0c4 2654 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2655 goto out_qdio;
2656 }
2657
2658 return 0;
2659out_qdio:
2660 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2661 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2662 return rc;
2663}
2664
4a71df50
FB		 2665void qeth_print_status_message(struct qeth_card *card)
2666{
2667 switch (card->info.type) {
5113fec0
UB		 2668 case QETH_CARD_TYPE_OSD:
2669 case QETH_CARD_TYPE_OSM:
2670 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2671 /* VM will use a non-zero first character
2672 * to indicate a HiperSockets like reporting
2673 * of the level OSA sets the first character to zero
2674 * */
2675 if (!card->info.mcl_level[0]) {
2676 sprintf(card->info.mcl_level, "%02x%02x",
2677 card->info.mcl_level[2],
2678 card->info.mcl_level[3]);
4a71df50
FB		 2679 break;
2680 }
2681 /* fallthrough */
2682 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2683 if ((card->info.guestlan) ||
2684 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2685 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2686 card->info.mcl_level[0]];
2687 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2688 card->info.mcl_level[1]];
2689 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2690 card->info.mcl_level[2]];
2691 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2692 card->info.mcl_level[3]];
2693 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2694 }
2695 break;
2696 default:
2697 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2698 }
239ff408
UB		 2699 dev_info(&card->gdev->dev,
2700 "Device is a%s card%s%s%s\nwith link type %s.\n",
2701 qeth_get_cardname(card),
2702 (card->info.mcl_level[0]) ? " (level: " : "",
2703 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2704 (card->info.mcl_level[0]) ? ")" : "",
2705 qeth_get_cardname_short(card));
4a71df50
FB		 2706}
2707EXPORT_SYMBOL_GPL(qeth_print_status_message);
2708
4a71df50
FB		 2709static void qeth_initialize_working_pool_list(struct qeth_card *card)
2710{
2711 struct qeth_buffer_pool_entry *entry;
2712
847a50fd 2713 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2714
2715 list_for_each_entry(entry,
2716 &card->qdio.init_pool.entry_list, init_list) {
2717 qeth_put_buffer_pool_entry(card, entry);
2718 }
2719}
2720
cef6ff22
JW		 2721static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2722 struct qeth_card *card)
4a71df50
FB		 2723{
2724 struct list_head *plh;
2725 struct qeth_buffer_pool_entry *entry;
2726 int i, free;
2727 struct page *page;
2728
2729 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2730 return NULL;
2731
2732 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2733 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2734 free = 1;
2735 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2736 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2737 free = 0;
2738 break;
2739 }
2740 }
2741 if (free) {
2742 list_del_init(&entry->list);
2743 return entry;
2744 }
2745 }
2746
2747 /* no free buffer in pool so take first one and swap pages */
2748 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2749 struct qeth_buffer_pool_entry, list);
2750 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2751 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2752 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2753 if (!page) {
2754 return NULL;
2755 } else {
2756 free_page((unsigned long)entry->elements[i]);
2757 entry->elements[i] = page_address(page);
2758 if (card->options.performance_stats)
2759 card->perf_stats.sg_alloc_page_rx++;
2760 }
2761 }
2762 }
2763 list_del_init(&entry->list);
2764 return entry;
2765}
2766
2767static int qeth_init_input_buffer(struct qeth_card *card,
2768 struct qeth_qdio_buffer *buf)
2769{
2770 struct qeth_buffer_pool_entry *pool_entry;
2771 int i;
2772
b3332930
FB		 2773 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2774 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2775 if (!buf->rx_skb)
2776 return 1;
2777 }
2778
4a71df50
FB		 2779 pool_entry = qeth_find_free_buffer_pool_entry(card);
2780 if (!pool_entry)
2781 return 1;
2782
2783 /*
2784 * since the buffer is accessed only from the input_tasklet
2785 * there shouldn't be a need to synchronize; also, since we use
2786 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2787 * buffers
2788 */
4a71df50
FB		 2789
2790 buf->pool_entry = pool_entry;
2791 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2792 buf->buffer->element[i].length = PAGE_SIZE;
2793 buf->buffer->element[i].addr = pool_entry->elements[i];
2794 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2795 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2796 else
3ec90878
JG		 2797 buf->buffer->element[i].eflags = 0;
2798 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2799 }
2800 return 0;
2801}
2802
2803int qeth_init_qdio_queues(struct qeth_card *card)
2804{
2805 int i, j;
2806 int rc;
2807
d11ba0c4 2808 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2809
2810 /* inbound queue */
6d284bde
SO		 2811 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2812 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2813 qeth_initialize_working_pool_list(card);
2814 /*give only as many buffers to hardware as we have buffer pool entries*/
2815 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2816 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2817 card->qdio.in_q->next_buf_to_init =
2818 card->qdio.in_buf_pool.buf_count - 1;
2819 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2820 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2821 if (rc) {
d11ba0c4 2822 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2823 return rc;
2824 }
0da9581d
EL		 2825
2826 /* completion */
2827 rc = qeth_cq_init(card);
2828 if (rc) {
2829 return rc;
2830 }
2831
4a71df50
FB		 2832 /* outbound queue */
2833 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2834 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2835 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2836 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2837 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2838 card->qdio.out_qs[i]->bufs[j],
2839 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2840 }
2841 card->qdio.out_qs[i]->card = card;
2842 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2843 card->qdio.out_qs[i]->do_pack = 0;
2844 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2845 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2846 atomic_set(&card->qdio.out_qs[i]->state,
2847 QETH_OUT_Q_UNLOCKED);
2848 }
2849 return 0;
2850}
2851EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2852
cef6ff22 2853static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2854{
2855 switch (link_type) {
2856 case QETH_LINK_TYPE_HSTR:
2857 return 2;
2858 default:
2859 return 1;
2860 }
2861}
2862
2863static void qeth_fill_ipacmd_header(struct qeth_card *card,
2864 struct qeth_ipa_cmd *cmd, __u8 command,
2865 enum qeth_prot_versions prot)
2866{
2867 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2868 cmd->hdr.command = command;
2869 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2870 cmd->hdr.seqno = card->seqno.ipa;
2871 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2872 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2873 if (card->options.layer2)
2874 cmd->hdr.prim_version_no = 2;
2875 else
2876 cmd->hdr.prim_version_no = 1;
2877 cmd->hdr.param_count = 1;
2878 cmd->hdr.prot_version = prot;
2879 cmd->hdr.ipa_supported = 0;
2880 cmd->hdr.ipa_enabled = 0;
2881}
2882
2883struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2884 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2885{
2886 struct qeth_cmd_buffer *iob;
2887 struct qeth_ipa_cmd *cmd;
2888
1aec42bc
TR		 2889 iob = qeth_get_buffer(&card->write);
2890 if (iob) {
2891 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2892 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2893 } else {
2894 dev_warn(&card->gdev->dev,
2895 "The qeth driver ran out of channel command buffers\n");
2896 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2897 dev_name(&card->gdev->dev));
2898 }
4a71df50
FB		 2899
2900 return iob;
2901}
2902EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2903
2904void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2905 char prot_type)
2906{
2907 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2908 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2909 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2910 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2911}
2912EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2913
efbbc1d5
EC		 2914/**
2915 * qeth_send_ipa_cmd() - send an IPA command
2916 *
2917 * See qeth_send_control_data() for explanation of the arguments.
2918 */
2919
4a71df50
FB		 2920int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2921 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2922 unsigned long),
2923 void *reply_param)
2924{
2925 int rc;
2926 char prot_type;
4a71df50 2927
847a50fd 2928 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2929
2930 if (card->options.layer2)
2931 if (card->info.type == QETH_CARD_TYPE_OSN)
2932 prot_type = QETH_PROT_OSN2;
2933 else
2934 prot_type = QETH_PROT_LAYER2;
2935 else
2936 prot_type = QETH_PROT_TCPIP;
2937 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2938 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2939 iob, reply_cb, reply_param);
908abbb5
UB		 2940 if (rc == -ETIME) {
2941 qeth_clear_ipacmd_list(card);
2942 qeth_schedule_recovery(card);
2943 }
4a71df50
FB		 2944 return rc;
2945}
2946EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2947
10340510 2948static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2949{
2950 int rc;
70919e23 2951 struct qeth_cmd_buffer *iob;
4a71df50 2952
d11ba0c4 2953 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2954
70919e23 2955 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2956 if (!iob)
2957 return -ENOMEM;
70919e23 2958 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2959 return rc;
2960}
4a71df50 2961
eb3fb0ba 2962static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2963 struct qeth_reply *reply, unsigned long data)
2964{
2965 struct qeth_ipa_cmd *cmd;
2966
847a50fd 2967 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2968
2969 cmd = (struct qeth_ipa_cmd *) data;
2970 if (cmd->hdr.return_code == 0)
2971 cmd->hdr.return_code =
2972 cmd->data.setadapterparms.hdr.return_code;
2973 return 0;
2974}
4a71df50
FB		 2975
2976static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2977 struct qeth_reply *reply, unsigned long data)
2978{
2979 struct qeth_ipa_cmd *cmd;
2980
847a50fd 2981 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2982
2983 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2984 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2985 card->info.link_type =
2986 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2987 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2988 }
4a71df50
FB		 2989 card->options.adp.supported_funcs =
2990 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2991 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2992}
2993
eb3fb0ba 2994static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2995 __u32 command, __u32 cmdlen)
2996{
2997 struct qeth_cmd_buffer *iob;
2998 struct qeth_ipa_cmd *cmd;
2999
3000 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3001 QETH_PROT_IPV4);
1aec42bc
TR		 3002 if (iob) {
3003 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3004 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3005 cmd->data.setadapterparms.hdr.command_code = command;
3006 cmd->data.setadapterparms.hdr.used_total = 1;
3007 cmd->data.setadapterparms.hdr.seq_no = 1;
3008 }
4a71df50
FB		 3009
3010 return iob;
3011}
4a71df50
FB		 3012
3013int qeth_query_setadapterparms(struct qeth_card *card)
3014{
3015 int rc;
3016 struct qeth_cmd_buffer *iob;
3017
847a50fd 3018 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3019 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3020 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3021 if (!iob)
3022 return -ENOMEM;
4a71df50
FB		 3023 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3024 return rc;
3025}
3026EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3027
1da74b1c
FB		 3028static int qeth_query_ipassists_cb(struct qeth_card *card,
3029 struct qeth_reply *reply, unsigned long data)
3030{
3031 struct qeth_ipa_cmd *cmd;
3032
3033 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3034
3035 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3036
3037 switch (cmd->hdr.return_code) {
3038 case IPA_RC_NOTSUPP:
3039 case IPA_RC_L2_UNSUPPORTED_CMD:
3040 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3041 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3042 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3043 return -0;
3044 default:
3045 if (cmd->hdr.return_code) {
3046 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3047 "rc=%d\n",
3048 dev_name(&card->gdev->dev),
3049 cmd->hdr.return_code);
3050 return 0;
3051 }
3052 }
3053
1da74b1c
FB		 3054 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3055 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3056 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3057 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3058 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3059 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3060 } else
3061 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3062 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3063 return 0;
3064}
3065
3066int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3067{
3068 int rc;
3069 struct qeth_cmd_buffer *iob;
3070
3071 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3072 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3073 if (!iob)
3074 return -ENOMEM;
1da74b1c
FB		 3075 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3076 return rc;
3077}
3078EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3079
45cbb2e4
SR		 3080static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3081 struct qeth_reply *reply, unsigned long data)
3082{
3083 struct qeth_ipa_cmd *cmd;
3084 struct qeth_switch_info *sw_info;
3085 struct qeth_query_switch_attributes *attrs;
3086
3087 QETH_CARD_TEXT(card, 2, "qswiatcb");
3088 cmd = (struct qeth_ipa_cmd *) data;
3089 sw_info = (struct qeth_switch_info *)reply->param;
3090 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3091 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3092 sw_info->capabilities = attrs->capabilities;
3093 sw_info->settings = attrs->settings;
3094 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3095 sw_info->settings);
3096 }
3097 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3098
3099 return 0;
3100}
3101
3102int qeth_query_switch_attributes(struct qeth_card *card,
3103 struct qeth_switch_info *sw_info)
3104{
3105 struct qeth_cmd_buffer *iob;
3106
3107 QETH_CARD_TEXT(card, 2, "qswiattr");
3108 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3109 return -EOPNOTSUPP;
3110 if (!netif_carrier_ok(card->dev))
3111 return -ENOMEDIUM;
3112 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3113 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3114 if (!iob)
3115 return -ENOMEM;
45cbb2e4
SR		 3116 return qeth_send_ipa_cmd(card, iob,
3117 qeth_query_switch_attributes_cb, sw_info);
3118}
3119EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3120
1da74b1c
FB		 3121static int qeth_query_setdiagass_cb(struct qeth_card *card,
3122 struct qeth_reply *reply, unsigned long data)
3123{
3124 struct qeth_ipa_cmd *cmd;
3125 __u16 rc;
3126
3127 cmd = (struct qeth_ipa_cmd *)data;
3128 rc = cmd->hdr.return_code;
3129 if (rc)
3130 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3131 else
3132 card->info.diagass_support = cmd->data.diagass.ext;
3133 return 0;
3134}
3135
3136static int qeth_query_setdiagass(struct qeth_card *card)
3137{
3138 struct qeth_cmd_buffer *iob;
3139 struct qeth_ipa_cmd *cmd;
3140
3141 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3142 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3143 if (!iob)
3144 return -ENOMEM;
1da74b1c
FB		 3145 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3146 cmd->data.diagass.subcmd_len = 16;
3147 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3148 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3149}
3150
3151static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3152{
3153 unsigned long info = get_zeroed_page(GFP_KERNEL);
3154 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3155 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3156 struct ccw_dev_id ccwid;
caf757c6 3157 int level;
1da74b1c
FB		 3158
3159 tid->chpid = card->info.chpid;
3160 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3161 tid->ssid = ccwid.ssid;
3162 tid->devno = ccwid.devno;
3163 if (!info)
3164 return;
caf757c6
HC		 3165 level = stsi(NULL, 0, 0, 0);
3166 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3167 tid->lparnr = info222->lpar_number;
caf757c6 3168 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3169 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3170 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3171 }
3172 free_page(info);
3173 return;
3174}
3175
3176static int qeth_hw_trap_cb(struct qeth_card *card,
3177 struct qeth_reply *reply, unsigned long data)
3178{
3179 struct qeth_ipa_cmd *cmd;
3180 __u16 rc;
3181
3182 cmd = (struct qeth_ipa_cmd *)data;
3183 rc = cmd->hdr.return_code;
3184 if (rc)
3185 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3186 return 0;
3187}
3188
3189int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3190{
3191 struct qeth_cmd_buffer *iob;
3192 struct qeth_ipa_cmd *cmd;
3193
3194 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3195 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3196 if (!iob)
3197 return -ENOMEM;
1da74b1c
FB		 3198 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3199 cmd->data.diagass.subcmd_len = 80;
3200 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3201 cmd->data.diagass.type = 1;
3202 cmd->data.diagass.action = action;
3203 switch (action) {
3204 case QETH_DIAGS_TRAP_ARM:
3205 cmd->data.diagass.options = 0x0003;
3206 cmd->data.diagass.ext = 0x00010000 +
3207 sizeof(struct qeth_trap_id);
3208 qeth_get_trap_id(card,
3209 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3210 break;
3211 case QETH_DIAGS_TRAP_DISARM:
3212 cmd->data.diagass.options = 0x0001;
3213 break;
3214 case QETH_DIAGS_TRAP_CAPTURE:
3215 break;
3216 }
3217 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3218}
3219EXPORT_SYMBOL_GPL(qeth_hw_trap);
3220
d73ef324
JW		 3221static int qeth_check_qdio_errors(struct qeth_card *card,
3222 struct qdio_buffer *buf,
3223 unsigned int qdio_error,
3224 const char *dbftext)
4a71df50 3225{
779e6e1c 3226 if (qdio_error) {
847a50fd 3227 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3228 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3229 buf->element[15].sflags);
38593d01 3230 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3231 buf->element[14].sflags);
38593d01 3232 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3233 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3234 card->stats.rx_dropped++;
3235 return 0;
3236 } else
3237 return 1;
4a71df50
FB		 3238 }
3239 return 0;
3240}
4a71df50 3241
d73ef324 3242static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3243{
3244 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3245 struct list_head *lh;
4a71df50
FB		 3246 int count;
3247 int i;
3248 int rc;
3249 int newcount = 0;
3250
4a71df50
FB		 3251 count = (index < queue->next_buf_to_init)?
3252 card->qdio.in_buf_pool.buf_count -
3253 (queue->next_buf_to_init - index) :
3254 card->qdio.in_buf_pool.buf_count -
3255 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3256 /* only requeue at a certain threshold to avoid SIGAs */
3257 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3258 for (i = queue->next_buf_to_init;
3259 i < queue->next_buf_to_init + count; ++i) {
3260 if (qeth_init_input_buffer(card,
3261 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3262 break;
3263 } else {
3264 newcount++;
3265 }
3266 }
3267
3268 if (newcount < count) {
3269 /* we are in memory shortage so we switch back to
3270 traditional skb allocation and drop packages */
4a71df50
FB		 3271 atomic_set(&card->force_alloc_skb, 3);
3272 count = newcount;
3273 } else {
4a71df50
FB		 3274 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3275 }
3276
b3332930
FB		 3277 if (!count) {
3278 i = 0;
3279 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3280 i++;
3281 if (i == card->qdio.in_buf_pool.buf_count) {
3282 QETH_CARD_TEXT(card, 2, "qsarbw");
3283 card->reclaim_index = index;
3284 schedule_delayed_work(
3285 &card->buffer_reclaim_work,
3286 QETH_RECLAIM_WORK_TIME);
3287 }
3288 return;
3289 }
3290
4a71df50
FB		 3291 /*
3292 * according to old code it should be avoided to requeue all
3293 * 128 buffers in order to benefit from PCI avoidance.
3294 * this function keeps at least one buffer (the buffer at
3295 * 'index') un-requeued -> this buffer is the first buffer that
3296 * will be requeued the next time
3297 */
3298 if (card->options.performance_stats) {
3299 card->perf_stats.inbound_do_qdio_cnt++;
3300 card->perf_stats.inbound_do_qdio_start_time =
3301 qeth_get_micros();
3302 }
779e6e1c
JG		 3303 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3304 queue->next_buf_to_init, count);
4a71df50
FB		 3305 if (card->options.performance_stats)
3306 card->perf_stats.inbound_do_qdio_time +=
3307 qeth_get_micros() -
3308 card->perf_stats.inbound_do_qdio_start_time;
3309 if (rc) {
847a50fd 3310 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3311 }
3312 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3313 QDIO_MAX_BUFFERS_PER_Q;
3314 }
3315}
d73ef324
JW		 3316
3317static void qeth_buffer_reclaim_work(struct work_struct *work)
3318{
3319 struct qeth_card *card = container_of(work, struct qeth_card,
3320 buffer_reclaim_work.work);
3321
3322 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3323 qeth_queue_input_buffer(card, card->reclaim_index);
3324}
4a71df50 3325
d7a39937 3326static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3327 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3328{
3ec90878 3329 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3330
847a50fd 3331 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3332 if (card->info.type == QETH_CARD_TYPE_IQD) {
3333 if (sbalf15 == 0) {
3334 qdio_err = 0;
3335 } else {
3336 qdio_err = 1;
3337 }
3338 }
76b11f8e 3339 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3340
3341 if (!qdio_err)
d7a39937 3342 return;
d303b6fd
JG		 3343
3344 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3345 return;
d303b6fd 3346
847a50fd
CO		 3347 QETH_CARD_TEXT(card, 1, "lnkfail");
3348 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3349 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3350}
3351
664e42ac
JW		 3352/**
3353 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3354 * @queue: queue to check for packing buffer
3355 *
3356 * Returns number of buffers that were prepared for flush.
3357 */
3358static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3359{
3360 struct qeth_qdio_out_buffer *buffer;
3361
3362 buffer = queue->bufs[queue->next_buf_to_fill];
3363 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3364 (buffer->next_element_to_fill > 0)) {
3365 /* it's a packing buffer */
3366 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3367 queue->next_buf_to_fill =
3368 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3369 return 1;
3370 }
3371 return 0;
3372}
3373
4a71df50
FB		 3374/*
3375 * Switched to packing state if the number of used buffers on a queue
3376 * reaches a certain limit.
3377 */
3378static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3379{
3380 if (!queue->do_pack) {
3381 if (atomic_read(&queue->used_buffers)
3382 >= QETH_HIGH_WATERMARK_PACK){
3383 /* switch non-PACKING -> PACKING */
847a50fd 3384 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3385 if (queue->card->options.performance_stats)
3386 queue->card->perf_stats.sc_dp_p++;
3387 queue->do_pack = 1;
3388 }
3389 }
3390}
3391
3392/*
3393 * Switches from packing to non-packing mode. If there is a packing
3394 * buffer on the queue this buffer will be prepared to be flushed.
3395 * In that case 1 is returned to inform the caller. If no buffer
3396 * has to be flushed, zero is returned.
3397 */
3398static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3399{
4a71df50
FB		 3400 if (queue->do_pack) {
3401 if (atomic_read(&queue->used_buffers)
3402 <= QETH_LOW_WATERMARK_PACK) {
3403 /* switch PACKING -> non-PACKING */
847a50fd 3404 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3405 if (queue->card->options.performance_stats)
3406 queue->card->perf_stats.sc_p_dp++;
3407 queue->do_pack = 0;
664e42ac 3408 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3409 }
3410 }
4a71df50
FB		 3411 return 0;
3412}
3413
779e6e1c
JG		 3414static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3415 int count)
4a71df50
FB		 3416{
3417 struct qeth_qdio_out_buffer *buf;
3418 int rc;
3419 int i;
3420 unsigned int qdio_flags;
3421
4a71df50 3422 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3423 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3424 buf = queue->bufs[bidx];
3ec90878
JG		 3425 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3426 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3427
0da9581d
EL		 3428 if (queue->bufstates)
3429 queue->bufstates[bidx].user = buf;
3430
4a71df50
FB		 3431 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3432 continue;
3433
3434 if (!queue->do_pack) {
3435 if ((atomic_read(&queue->used_buffers) >=
3436 (QETH_HIGH_WATERMARK_PACK -
3437 QETH_WATERMARK_PACK_FUZZ)) &&
3438 !atomic_read(&queue->set_pci_flags_count)) {
3439 /* it's likely that we'll go to packing
3440 * mode soon */
3441 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3442 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3443 }
3444 } else {
3445 if (!atomic_read(&queue->set_pci_flags_count)) {
3446 /*
3447 * there's no outstanding PCI any more, so we
3448 * have to request a PCI to be sure the the PCI
3449 * will wake at some time in the future then we
3450 * can flush packed buffers that might still be
3451 * hanging around, which can happen if no
3452 * further send was requested by the stack
3453 */
3454 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3455 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3456 }
3457 }
3458 }
3459
3e66bab3 3460 netif_trans_update(queue->card->dev);
4a71df50
FB		 3461 if (queue->card->options.performance_stats) {
3462 queue->card->perf_stats.outbound_do_qdio_cnt++;
3463 queue->card->perf_stats.outbound_do_qdio_start_time =
3464 qeth_get_micros();
3465 }
3466 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3467 if (atomic_read(&queue->set_pci_flags_count))
3468 qdio_flags |= QDIO_FLAG_PCI_OUT;
3469 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3470 queue->queue_no, index, count);
4a71df50
FB		 3471 if (queue->card->options.performance_stats)
3472 queue->card->perf_stats.outbound_do_qdio_time +=
3473 qeth_get_micros() -
3474 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3475 atomic_add(count, &queue->used_buffers);
4a71df50 3476 if (rc) {
d303b6fd
JG		 3477 queue->card->stats.tx_errors += count;
3478 /* ignore temporary SIGA errors without busy condition */
1549d13f 3479 if (rc == -ENOBUFS)
d303b6fd 3480 return;
847a50fd 3481 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3482 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3483 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3484 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3485 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3486
4a71df50
FB		 3487 /* this must not happen under normal circumstances. if it
3488 * happens something is really wrong -> recover */
3489 qeth_schedule_recovery(queue->card);
3490 return;
3491 }
4a71df50
FB		 3492 if (queue->card->options.performance_stats)
3493 queue->card->perf_stats.bufs_sent += count;
3494}
3495
3496static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3497{
3498 int index;
3499 int flush_cnt = 0;
3500 int q_was_packing = 0;
3501
3502 /*
3503 * check if weed have to switch to non-packing mode or if
3504 * we have to get a pci flag out on the queue
3505 */
3506 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3507 !atomic_read(&queue->set_pci_flags_count)) {
3508 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3509 QETH_OUT_Q_UNLOCKED) {
3510 /*
3511 * If we get in here, there was no action in
3512 * do_send_packet. So, we check if there is a
3513 * packing buffer to be flushed here.
3514 */
3515 netif_stop_queue(queue->card->dev);
3516 index = queue->next_buf_to_fill;
3517 q_was_packing = queue->do_pack;
3518 /* queue->do_pack may change */
3519 barrier();
3520 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3521 if (!flush_cnt &&
3522 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3523 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3524 if (queue->card->options.performance_stats &&
3525 q_was_packing)
3526 queue->card->perf_stats.bufs_sent_pack +=
3527 flush_cnt;
3528 if (flush_cnt)
779e6e1c 3529 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3530 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3531 }
3532 }
3533}
3534
a1c3ed4c
FB		 3535void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3536 unsigned long card_ptr)
3537{
3538 struct qeth_card *card = (struct qeth_card *)card_ptr;
3539
0cffef48 3540 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3541 napi_schedule(&card->napi);
3542}
3543EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3544
0da9581d
EL		 3545int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3546{
3547 int rc;
3548
3549 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3550 rc = -1;
3551 goto out;
3552 } else {
3553 if (card->options.cq == cq) {
3554 rc = 0;
3555 goto out;
3556 }
3557
3558 if (card->state != CARD_STATE_DOWN &&
3559 card->state != CARD_STATE_RECOVER) {
3560 rc = -1;
3561 goto out;
3562 }
3563
3564 qeth_free_qdio_buffers(card);
3565 card->options.cq = cq;
3566 rc = 0;
3567 }
3568out:
3569 return rc;
3570
3571}
3572EXPORT_SYMBOL_GPL(qeth_configure_cq);
3573
3574
3575static void qeth_qdio_cq_handler(struct qeth_card *card,
3576 unsigned int qdio_err,
3577 unsigned int queue, int first_element, int count) {
3578 struct qeth_qdio_q *cq = card->qdio.c_q;
3579 int i;
3580 int rc;
3581
3582 if (!qeth_is_cq(card, queue))
3583 goto out;
3584
3585 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3586 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3587 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3588
3589 if (qdio_err) {
3590 netif_stop_queue(card->dev);
3591 qeth_schedule_recovery(card);
3592 goto out;
3593 }
3594
3595 if (card->options.performance_stats) {
3596 card->perf_stats.cq_cnt++;
3597 card->perf_stats.cq_start_time = qeth_get_micros();
3598 }
3599
3600 for (i = first_element; i < first_element + count; ++i) {
3601 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3602 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3603 int e;
3604
3605 e = 0;
903e4853
UB		 3606 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3607 buffer->element[e].addr) {
0da9581d
EL		 3608 unsigned long phys_aob_addr;
3609
3610 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3611 qeth_qdio_handle_aob(card, phys_aob_addr);
3612 buffer->element[e].addr = NULL;
3613 buffer->element[e].eflags = 0;
3614 buffer->element[e].sflags = 0;
3615 buffer->element[e].length = 0;
3616
3617 ++e;
3618 }
3619
3620 buffer->element[15].eflags = 0;
3621 buffer->element[15].sflags = 0;
3622 }
3623 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3624 card->qdio.c_q->next_buf_to_init,
3625 count);
3626 if (rc) {
3627 dev_warn(&card->gdev->dev,
3628 "QDIO reported an error, rc=%i\n", rc);
3629 QETH_CARD_TEXT(card, 2, "qcqherr");
3630 }
3631 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3632 + count) % QDIO_MAX_BUFFERS_PER_Q;
3633
3634 netif_wake_queue(card->dev);
3635
3636 if (card->options.performance_stats) {
3637 int delta_t = qeth_get_micros();
3638 delta_t -= card->perf_stats.cq_start_time;
3639 card->perf_stats.cq_time += delta_t;
3640 }
3641out:
3642 return;
3643}
3644
a1c3ed4c 3645void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3646 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3647 unsigned long card_ptr)
3648{
3649 struct qeth_card *card = (struct qeth_card *)card_ptr;
3650
0da9581d
EL		 3651 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3652 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3653
3654 if (qeth_is_cq(card, queue))
3655 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3656 else if (qdio_err)
a1c3ed4c 3657 qeth_schedule_recovery(card);
0da9581d
EL		 3658
3659
a1c3ed4c
FB		 3660}
3661EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3662
779e6e1c
JG		 3663void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3664 unsigned int qdio_error, int __queue, int first_element,
3665 int count, unsigned long card_ptr)
4a71df50
FB		 3666{
3667 struct qeth_card *card = (struct qeth_card *) card_ptr;
3668 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3669 struct qeth_qdio_out_buffer *buffer;
3670 int i;
3671
847a50fd 3672 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3673 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3674 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3675 netif_stop_queue(card->dev);
3676 qeth_schedule_recovery(card);
3677 return;
4a71df50
FB		 3678 }
3679 if (card->options.performance_stats) {
3680 card->perf_stats.outbound_handler_cnt++;
3681 card->perf_stats.outbound_handler_start_time =
3682 qeth_get_micros();
3683 }
3684 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3685 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3686 buffer = queue->bufs[bidx];
b67d801f 3687 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3688
3689 if (queue->bufstates &&
3690 (queue->bufstates[bidx].flags &
3691 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3692 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3693
3694 if (atomic_cmpxchg(&buffer->state,
3695 QETH_QDIO_BUF_PRIMED,
3696 QETH_QDIO_BUF_PENDING) ==
3697 QETH_QDIO_BUF_PRIMED) {
3698 qeth_notify_skbs(queue, buffer,
3699 TX_NOTIFY_PENDING);
3700 }
0da9581d
EL		 3701 buffer->aob = queue->bufstates[bidx].aob;
3702 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3703 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3704 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3705 virt_to_phys(buffer->aob));
b3332930
FB		 3706 if (qeth_init_qdio_out_buf(queue, bidx)) {
3707 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3708 qeth_schedule_recovery(card);
b3332930 3709 }
0da9581d 3710 } else {
b3332930
FB		 3711 if (card->options.cq == QETH_CQ_ENABLED) {
3712 enum iucv_tx_notify n;
3713
3714 n = qeth_compute_cq_notification(
3715 buffer->buffer->element[15].sflags, 0);
3716 qeth_notify_skbs(queue, buffer, n);
3717 }
3718
0da9581d
EL		 3719 qeth_clear_output_buffer(queue, buffer,
3720 QETH_QDIO_BUF_EMPTY);
3721 }
3722 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3723 }
3724 atomic_sub(count, &queue->used_buffers);
3725 /* check if we need to do something on this outbound queue */
3726 if (card->info.type != QETH_CARD_TYPE_IQD)
3727 qeth_check_outbound_queue(queue);
3728
3729 netif_wake_queue(queue->card->dev);
3730 if (card->options.performance_stats)
3731 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3732 card->perf_stats.outbound_handler_start_time;
3733}
3734EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3735
70deb016
HW		 3736/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3737static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3738{
3739 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3740 return 2;
3741 return queue_num;
3742}
3743
290b8348
SR		 3744/**
3745 * Note: Function assumes that we have 4 outbound queues.
3746 */
4a71df50
FB		 3747int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3748 int ipv, int cast_type)
3749{
d66cb37e 3750 __be16 *tci;
290b8348
SR		 3751 u8 tos;
3752
290b8348
SR		 3753 if (cast_type && card->info.is_multicast_different)
3754 return card->info.is_multicast_different &
3755 (card->qdio.no_out_queues - 1);
3756
3757 switch (card->qdio.do_prio_queueing) {
3758 case QETH_PRIO_Q_ING_TOS:
3759 case QETH_PRIO_Q_ING_PREC:
3760 switch (ipv) {
3761 case 4:
3762 tos = ipv4_get_dsfield(ip_hdr(skb));
3763 break;
3764 case 6:
3765 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3766 break;
3767 default:
3768 return card->qdio.default_out_queue;
4a71df50 3769 }
290b8348 3770 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3771 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3772 if (tos & IPTOS_MINCOST)
70deb016 3773 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3774 if (tos & IPTOS_RELIABILITY)
3775 return 2;
3776 if (tos & IPTOS_THROUGHPUT)
3777 return 1;
3778 if (tos & IPTOS_LOWDELAY)
3779 return 0;
d66cb37e
SR		 3780 break;
3781 case QETH_PRIO_Q_ING_SKB:
3782 if (skb->priority > 5)
3783 return 0;
70deb016 3784 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3785 case QETH_PRIO_Q_ING_VLAN:
3786 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3787 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3788 return qeth_cut_iqd_prio(card,
3789 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3790 break;
4a71df50 3791 default:
290b8348 3792 break;
4a71df50 3793 }
290b8348 3794 return card->qdio.default_out_queue;
4a71df50
FB		 3795}
3796EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3797
2863c613
EC		 3798/**
3799 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3800 * @skb: SKB address
3801 *
3802 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3803 * fragmented part of the SKB. Returns zero for linear SKB.
3804 */
271648b4
FB		 3805int qeth_get_elements_for_frags(struct sk_buff *skb)
3806{
2863c613 3807 int cnt, elements = 0;
271648b4
FB		 3808
3809 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3810 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3811
3812 elements += qeth_get_elements_for_range(
3813 (addr_t)skb_frag_address(frag),
3814 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3815 }
3816 return elements;
3817}
3818EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3819
2863c613
EC		 3820/**
3821 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3822 * @card: qeth card structure, to check max. elems.
3823 * @skb: SKB address
3824 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3825 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3826 *
3827 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3828 * skb data, including linear part and fragments. Checks if the result plus
3829 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3830 * Note: extra_elems is not included in the returned result.
3831 */
065cc782 3832int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3833 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3834{
2863c613 3835 int elements = qeth_get_elements_for_range(
7d969d2e 3836 (addr_t)skb->data + data_offset,
2863c613
EC		 3837 (addr_t)skb->data + skb_headlen(skb)) +
3838 qeth_get_elements_for_frags(skb);
4a71df50 3839
2863c613 3840 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3841 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3842 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3843 elements + extra_elems, skb->len);
4a71df50
FB		 3844 return 0;
3845 }
2863c613 3846 return elements;
4a71df50
FB		 3847}
3848EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3849
d4ae1f5e 3850int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3851{
3852 int hroom, inpage, rest;
3853
3854 if (((unsigned long)skb->data & PAGE_MASK) !=
3855 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3856 hroom = skb_headroom(skb);
3857 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3858 rest = len - inpage;
3859 if (rest > hroom)
3860 return 1;
2863c613 3861 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3862 skb->data -= rest;
d4ae1f5e
SR		 3863 skb->tail -= rest;
3864 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3865 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3866 }
3867 return 0;
3868}
3869EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3870
0d6f02d3
JW		 3871/**
3872 * qeth_push_hdr() - push a qeth_hdr onto an skb.
3873 * @skb: skb that the qeth_hdr should be pushed onto.
3874 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3875 * it contains a valid pointer to a qeth_hdr.
3876 * @len: length of the hdr that needs to be pushed on.
3877 *
3878 * Returns the pushed length. If the header can't be pushed on
3879 * (eg. because it would cross a page boundary), it is allocated from
3880 * the cache instead and 0 is returned.
3881 * Error to create the hdr is indicated by returning with < 0.
3882 */
3883int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
3884{
3885 if (skb_headroom(skb) >= len &&
3886 qeth_get_elements_for_range((addr_t)skb->data - len,
3887 (addr_t)skb->data) == 1) {
3888 *hdr = skb_push(skb, len);
3889 return len;
3890 }
3891 /* fall back */
3892 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3893 if (!*hdr)
3894 return -ENOMEM;
3895 return 0;
3896}
3897EXPORT_SYMBOL_GPL(qeth_push_hdr);
3898
cef6ff22
JW		 3899static void __qeth_fill_buffer(struct sk_buff *skb,
3900 struct qeth_qdio_out_buffer *buf,
3901 bool is_first_elem, unsigned int offset)
4a71df50 3902{
384d2ef1
JW		 3903 struct qdio_buffer *buffer = buf->buffer;
3904 int element = buf->next_element_to_fill;
cc309f83
JW		 3905 int length = skb_headlen(skb) - offset;
3906 char *data = skb->data + offset;
384d2ef1 3907 int length_here, cnt;
4a71df50 3908
cc309f83 3909 /* map linear part into buffer element(s) */
4a71df50
FB		 3910 while (length > 0) {
3911 /* length_here is the remaining amount of data in this page */
3912 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3913 if (length < length_here)
3914 length_here = length;
3915
3916 buffer->element[element].addr = data;
3917 buffer->element[element].length = length_here;
3918 length -= length_here;
384d2ef1
JW		 3919 if (is_first_elem) {
3920 is_first_elem = false;
5258830b
JW		 3921 if (length || skb_is_nonlinear(skb))
3922 /* skb needs additional elements */
3ec90878 3923 buffer->element[element].eflags =
5258830b 3924 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3925 else
5258830b
JW		 3926 buffer->element[element].eflags = 0;
3927 } else {
3928 buffer->element[element].eflags =
3929 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3930 }
3931 data += length_here;
3932 element++;
4a71df50 3933 }
51aa165c 3934
cc309f83 3935 /* map page frags into buffer element(s) */
51aa165c 3936 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3937 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3938
3939 data = skb_frag_address(frag);
3940 length = skb_frag_size(frag);
271648b4
FB		 3941 while (length > 0) {
3942 length_here = PAGE_SIZE -
3943 ((unsigned long) data % PAGE_SIZE);
3944 if (length < length_here)
3945 length_here = length;
3946
3947 buffer->element[element].addr = data;
3948 buffer->element[element].length = length_here;
3949 buffer->element[element].eflags =
3950 SBAL_EFLAGS_MIDDLE_FRAG;
3951 length -= length_here;
3952 data += length_here;
3953 element++;
3954 }
51aa165c
FB		 3955 }
3956
3ec90878
JG		 3957 if (buffer->element[element - 1].eflags)
3958 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3959 buf->next_element_to_fill = element;
4a71df50
FB		 3960}
3961
eaf3cc08
JW		 3962/**
3963 * qeth_fill_buffer() - map skb into an output buffer
3964 * @queue: QDIO queue to submit the buffer on
3965 * @buf: buffer to transport the skb
3966 * @skb: skb to map into the buffer
3967 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
3968 * from qeth_core_header_cache.
3969 * @offset: when mapping the skb, start at skb->data + offset
3970 * @hd_len: if > 0, build a dedicated header element of this size
3971 */
cef6ff22
JW		 3972static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3973 struct qeth_qdio_out_buffer *buf,
3974 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3975 unsigned int offset, unsigned int hd_len)
4a71df50 3976{
eaf3cc08 3977 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 3978 bool is_first_elem = true;
13ddacb5 3979 int flush_cnt = 0;
4a71df50 3980
63354797 3981 refcount_inc(&skb->users);
4a71df50
FB		 3982 skb_queue_tail(&buf->skb_list, skb);
3983
eaf3cc08
JW		 3984 /* build dedicated header element */
3985 if (hd_len) {
683d718a 3986 int element = buf->next_element_to_fill;
384d2ef1
JW		 3987 is_first_elem = false;
3988
683d718a 3989 buffer->element[element].addr = hdr;
f1588177 3990 buffer->element[element].length = hd_len;
3ec90878 3991 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 3992 /* remember to free cache-allocated qeth_hdr: */
3993 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 3994 buf->next_element_to_fill++;
3995 }
3996
384d2ef1 3997 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3998
3999 if (!queue->do_pack) {
847a50fd 4000 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 4001 /* set state to PRIMED -> will be flushed */
4002 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4003 flush_cnt = 1;
4004 } else {
847a50fd 4005 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4006 if (queue->card->options.performance_stats)
4007 queue->card->perf_stats.skbs_sent_pack++;
4008 if (buf->next_element_to_fill >=
4009 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4010 /*
4011 * packed buffer if full -> set state PRIMED
4012 * -> will be flushed
4013 */
4014 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4015 flush_cnt = 1;
4016 }
4017 }
4018 return flush_cnt;
4019}
4020
7c2e9ba3 4021int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
cc309f83 4022 struct qeth_hdr *hdr, unsigned int offset,
13ddacb5 4023 unsigned int hd_len)
4a71df50 4024{
7c2e9ba3
JW		 4025 int index = queue->next_buf_to_fill;
4026 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 4027
4a71df50
FB		 4028 /*
4029 * check if buffer is empty to make sure that we do not 'overtake'
4030 * ourselves and try to fill a buffer that is already primed
4031 */
4032 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3
JW		 4033 return -EBUSY;
4034 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
64ef8957
FB		 4035 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4036 qeth_flush_buffers(queue, index, 1);
4a71df50 4037 return 0;
4a71df50
FB		 4038}
4039EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4040
4041int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 4042 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 4043 unsigned int offset, unsigned int hd_len,
4044 int elements_needed)
4a71df50
FB		 4045{
4046 struct qeth_qdio_out_buffer *buffer;
4047 int start_index;
4048 int flush_count = 0;
4049 int do_pack = 0;
4050 int tmp;
4051 int rc = 0;
4052
4a71df50
FB		 4053 /* spin until we get the queue ... */
4054 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4055 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4056 start_index = queue->next_buf_to_fill;
0da9581d 4057 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4058 /*
4059 * check if buffer is empty to make sure that we do not 'overtake'
4060 * ourselves and try to fill a buffer that is already primed
4061 */
4062 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4063 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4064 return -EBUSY;
4065 }
4066 /* check if we need to switch packing state of this queue */
4067 qeth_switch_to_packing_if_needed(queue);
4068 if (queue->do_pack) {
4069 do_pack = 1;
64ef8957
FB		 4070 /* does packet fit in current buffer? */
4071 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4072 buffer->next_element_to_fill) < elements_needed) {
4073 /* ... no -> set state PRIMED */
4074 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4075 flush_count++;
4076 queue->next_buf_to_fill =
4077 (queue->next_buf_to_fill + 1) %
4078 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4079 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4080 /* we did a step forward, so check buffer state
4081 * again */
4082 if (atomic_read(&buffer->state) !=
4083 QETH_QDIO_BUF_EMPTY) {
4084 qeth_flush_buffers(queue, start_index,
779e6e1c 4085 flush_count);
64ef8957 4086 atomic_set(&queue->state,
4a71df50 4087 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4088 rc = -EBUSY;
4089 goto out;
4a71df50
FB		 4090 }
4091 }
4092 }
9c3bfda9 4093 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4a71df50
FB		 4094 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4095 QDIO_MAX_BUFFERS_PER_Q;
4096 flush_count += tmp;
4a71df50 4097 if (flush_count)
779e6e1c 4098 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4099 else if (!atomic_read(&queue->set_pci_flags_count))
4100 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4101 /*
4102 * queue->state will go from LOCKED -> UNLOCKED or from
4103 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4104 * (switch packing state or flush buffer to get another pci flag out).
4105 * In that case we will enter this loop
4106 */
4107 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4108 start_index = queue->next_buf_to_fill;
4109 /* check if we can go back to non-packing state */
3cdc8a25 4110 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4111 /*
4112 * check if we need to flush a packing buffer to get a pci
4113 * flag out on the queue
4114 */
3cdc8a25
JW		 4115 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4116 tmp = qeth_prep_flush_pack_buffer(queue);
4117 if (tmp) {
4118 qeth_flush_buffers(queue, start_index, tmp);
4119 flush_count += tmp;
4120 }
4a71df50 4121 }
3cdc8a25 4122out:
4a71df50
FB		 4123 /* at this point the queue is UNLOCKED again */
4124 if (queue->card->options.performance_stats && do_pack)
4125 queue->card->perf_stats.bufs_sent_pack += flush_count;
4126
4127 return rc;
4128}
4129EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4130
4131static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4132 struct qeth_reply *reply, unsigned long data)
4133{
4134 struct qeth_ipa_cmd *cmd;
4135 struct qeth_ipacmd_setadpparms *setparms;
4136
847a50fd 4137 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4138
4139 cmd = (struct qeth_ipa_cmd *) data;
4140 setparms = &(cmd->data.setadapterparms);
4141
4142 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4143 if (cmd->hdr.return_code) {
8a593148 4144 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4145 setparms->data.mode = SET_PROMISC_MODE_OFF;
4146 }
4147 card->info.promisc_mode = setparms->data.mode;
4148 return 0;
4149}
4150
4151void qeth_setadp_promisc_mode(struct qeth_card *card)
4152{
4153 enum qeth_ipa_promisc_modes mode;
4154 struct net_device *dev = card->dev;
4155 struct qeth_cmd_buffer *iob;
4156 struct qeth_ipa_cmd *cmd;
4157
847a50fd 4158 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4159
4160 if (((dev->flags & IFF_PROMISC) &&
4161 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4162 (!(dev->flags & IFF_PROMISC) &&
4163 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4164 return;
4165 mode = SET_PROMISC_MODE_OFF;
4166 if (dev->flags & IFF_PROMISC)
4167 mode = SET_PROMISC_MODE_ON;
847a50fd 4168 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4169
4170 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4171 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4172 if (!iob)
4173 return;
4a71df50
FB		 4174 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4175 cmd->data.setadapterparms.data.mode = mode;
4176 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4177}
4178EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4179
4180int qeth_change_mtu(struct net_device *dev, int new_mtu)
4181{
4182 struct qeth_card *card;
4183 char dbf_text[15];
4184
509e2562 4185 card = dev->ml_priv;
4a71df50 4186
847a50fd 4187 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4188 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4189 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50 4190
4845b93f 4191 if (!qeth_mtu_is_valid(card, new_mtu))
4a71df50
FB		 4192 return -EINVAL;
4193 dev->mtu = new_mtu;
4194 return 0;
4195}
4196EXPORT_SYMBOL_GPL(qeth_change_mtu);
4197
4198struct net_device_stats *qeth_get_stats(struct net_device *dev)
4199{
4200 struct qeth_card *card;
4201
509e2562 4202 card = dev->ml_priv;
4a71df50 4203
847a50fd 4204 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4205
4206 return &card->stats;
4207}
4208EXPORT_SYMBOL_GPL(qeth_get_stats);
4209
4210static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4211 struct qeth_reply *reply, unsigned long data)
4212{
4213 struct qeth_ipa_cmd *cmd;
4214
847a50fd 4215 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4216
4217 cmd = (struct qeth_ipa_cmd *) data;
4218 if (!card->options.layer2 ||
4219 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4220 memcpy(card->dev->dev_addr,
4221 &cmd->data.setadapterparms.data.change_addr.addr,
4222 OSA_ADDR_LEN);
4223 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4224 }
4225 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4226 return 0;
4227}
4228
4229int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4230{
4231 int rc;
4232 struct qeth_cmd_buffer *iob;
4233 struct qeth_ipa_cmd *cmd;
4234
847a50fd 4235 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4236
4237 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4238 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4239 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4240 if (!iob)
4241 return -ENOMEM;
4a71df50
FB		 4242 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4243 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4244 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4245 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4246 card->dev->dev_addr, OSA_ADDR_LEN);
4247 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4248 NULL);
4249 return rc;
4250}
4251EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4252
d64ecc22
EL		 4253static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4254 struct qeth_reply *reply, unsigned long data)
4255{
4256 struct qeth_ipa_cmd *cmd;
4257 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4258 int fallback = *(int *)reply->param;
d64ecc22 4259
847a50fd 4260 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4261
4262 cmd = (struct qeth_ipa_cmd *) data;
4263 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4264 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4265 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4266 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4267 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4268 if (cmd->data.setadapterparms.hdr.return_code !=
4269 SET_ACCESS_CTRL_RC_SUCCESS)
4270 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4271 card->gdev->dev.kobj.name,
4272 access_ctrl_req->subcmd_code,
4273 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4274 switch (cmd->data.setadapterparms.hdr.return_code) {
4275 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4276 if (card->options.isolation == ISOLATION_MODE_NONE) {
4277 dev_info(&card->gdev->dev,
4278 "QDIO data connection isolation is deactivated\n");
4279 } else {
4280 dev_info(&card->gdev->dev,
4281 "QDIO data connection isolation is activated\n");
4282 }
d64ecc22 4283 break;
0f54761d
SR		 4284 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4285 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4286 "deactivated\n", dev_name(&card->gdev->dev));
4287 if (fallback)
4288 card->options.isolation = card->options.prev_isolation;
4289 break;
4290 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4291 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4292 " activated\n", dev_name(&card->gdev->dev));
4293 if (fallback)
4294 card->options.isolation = card->options.prev_isolation;
4295 break;
d64ecc22 4296 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4297 dev_err(&card->gdev->dev, "Adapter does not "
4298 "support QDIO data connection isolation\n");
d64ecc22 4299 break;
d64ecc22 4300 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4301 dev_err(&card->gdev->dev,
4302 "Adapter is dedicated. "
4303 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4304 if (fallback)
4305 card->options.isolation = card->options.prev_isolation;
d64ecc22 4306 break;
d64ecc22 4307 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4308 dev_err(&card->gdev->dev,
4309 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4310 if (fallback)
4311 card->options.isolation = card->options.prev_isolation;
4312 break;
4313 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4314 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4315 "support reflective relay mode\n");
4316 if (fallback)
4317 card->options.isolation = card->options.prev_isolation;
4318 break;
4319 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4320 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4321 "enabled at the adjacent switch port");
4322 if (fallback)
4323 card->options.isolation = card->options.prev_isolation;
4324 break;
4325 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4326 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4327 "at the adjacent switch failed\n");
d64ecc22 4328 break;
d64ecc22 4329 default:
d64ecc22 4330 /* this should never happen */
0f54761d
SR		 4331 if (fallback)
4332 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4333 break;
4334 }
d64ecc22 4335 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4336 return 0;
d64ecc22
EL		 4337}
4338
4339static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4340 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4341{
4342 int rc;
4343 struct qeth_cmd_buffer *iob;
4344 struct qeth_ipa_cmd *cmd;
4345 struct qeth_set_access_ctrl *access_ctrl_req;
4346
847a50fd 4347 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4348
4349 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4350 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4351
4352 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4353 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4354 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4355 if (!iob)
4356 return -ENOMEM;
d64ecc22
EL		 4357 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4358 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4359 access_ctrl_req->subcmd_code = isolation;
4360
4361 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4362 &fallback);
d64ecc22
EL		 4363 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4364 return rc;
4365}
4366
0f54761d 4367int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4368{
4369 int rc = 0;
4370
847a50fd 4371 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4372
5113fec0
UB		 4373 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4374 card->info.type == QETH_CARD_TYPE_OSX) &&
4375 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4376 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4377 card->options.isolation, fallback);
d64ecc22
EL		 4378 if (rc) {
4379 QETH_DBF_MESSAGE(3,
5113fec0 4380 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4381 card->gdev->dev.kobj.name,
4382 rc);
0f54761d 4383 rc = -EOPNOTSUPP;
d64ecc22
EL		 4384 }
4385 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4386 card->options.isolation = ISOLATION_MODE_NONE;
4387
4388 dev_err(&card->gdev->dev, "Adapter does not "
4389 "support QDIO data connection isolation\n");
4390 rc = -EOPNOTSUPP;
4391 }
4392 return rc;
4393}
4394EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4395
4a71df50
FB		 4396void qeth_tx_timeout(struct net_device *dev)
4397{
4398 struct qeth_card *card;
4399
509e2562 4400 card = dev->ml_priv;
847a50fd 4401 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4402 card->stats.tx_errors++;
4403 qeth_schedule_recovery(card);
4404}
4405EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4406
942d6984 4407static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4408{
509e2562 4409 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4410 int rc = 0;
4411
4412 switch (regnum) {
4413 case MII_BMCR: /* Basic mode control register */
4414 rc = BMCR_FULLDPLX;
4415 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4416 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4417 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4418 rc |= BMCR_SPEED100;
4419 break;
4420 case MII_BMSR: /* Basic mode status register */
4421 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4422 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4423 BMSR_100BASE4;
4424 break;
4425 case MII_PHYSID1: /* PHYS ID 1 */
4426 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4427 dev->dev_addr[2];
4428 rc = (rc >> 5) & 0xFFFF;
4429 break;
4430 case MII_PHYSID2: /* PHYS ID 2 */
4431 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4432 break;
4433 case MII_ADVERTISE: /* Advertisement control reg */
4434 rc = ADVERTISE_ALL;
4435 break;
4436 case MII_LPA: /* Link partner ability reg */
4437 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4438 LPA_100BASE4 | LPA_LPACK;
4439 break;
4440 case MII_EXPANSION: /* Expansion register */
4441 break;
4442 case MII_DCOUNTER: /* disconnect counter */
4443 break;
4444 case MII_FCSCOUNTER: /* false carrier counter */
4445 break;
4446 case MII_NWAYTEST: /* N-way auto-neg test register */
4447 break;
4448 case MII_RERRCOUNTER: /* rx error counter */
4449 rc = card->stats.rx_errors;
4450 break;
4451 case MII_SREVISION: /* silicon revision */
4452 break;
4453 case MII_RESV1: /* reserved 1 */
4454 break;
4455 case MII_LBRERROR: /* loopback, rx, bypass error */
4456 break;
4457 case MII_PHYADDR: /* physical address */
4458 break;
4459 case MII_RESV2: /* reserved 2 */
4460 break;
4461 case MII_TPISTATUS: /* TPI status for 10mbps */
4462 break;
4463 case MII_NCONFIG: /* network interface config */
4464 break;
4465 default:
4466 break;
4467 }
4468 return rc;
4469}
4a71df50
FB		 4470
4471static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4472 struct qeth_cmd_buffer *iob, int len,
4473 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4474 unsigned long),
4475 void *reply_param)
4476{
4477 u16 s1, s2;
4478
847a50fd 4479 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4480
4481 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4482 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4483 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4484 /* adjust PDU length fields in IPA_PDU_HEADER */
4485 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4486 s2 = (u32) len;
4487 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4488 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4489 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4490 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4491 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4492 reply_cb, reply_param);
4493}
4494
4495static int qeth_snmp_command_cb(struct qeth_card *card,
4496 struct qeth_reply *reply, unsigned long sdata)
4497{
4498 struct qeth_ipa_cmd *cmd;
4499 struct qeth_arp_query_info *qinfo;
4500 struct qeth_snmp_cmd *snmp;
4501 unsigned char *data;
4502 __u16 data_len;
4503
847a50fd 4504 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4505
4506 cmd = (struct qeth_ipa_cmd *) sdata;
4507 data = (unsigned char *)((char *)cmd - reply->offset);
4508 qinfo = (struct qeth_arp_query_info *) reply->param;
4509 snmp = &cmd->data.setadapterparms.data.snmp;
4510
4511 if (cmd->hdr.return_code) {
8a593148 4512 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4513 return 0;
4514 }
4515 if (cmd->data.setadapterparms.hdr.return_code) {
4516 cmd->hdr.return_code =
4517 cmd->data.setadapterparms.hdr.return_code;
8a593148 4518 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4519 return 0;
4520 }
4521 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4522 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4523 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4524 else
4525 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4526
4527 /* check if there is enough room in userspace */
4528 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4529 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4530 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4531 return 0;
4532 }
847a50fd 4533 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4534 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4535 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4536 cmd->data.setadapterparms.hdr.seq_no);
4537 /*copy entries to user buffer*/
4538 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4539 memcpy(qinfo->udata + qinfo->udata_offset,
4540 (char *)snmp,
4541 data_len + offsetof(struct qeth_snmp_cmd, data));
4542 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4543 } else {
4544 memcpy(qinfo->udata + qinfo->udata_offset,
4545 (char *)&snmp->request, data_len);
4546 }
4547 qinfo->udata_offset += data_len;
4548 /* check if all replies received ... */
847a50fd 4549 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4550 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4551 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4552 cmd->data.setadapterparms.hdr.seq_no);
4553 if (cmd->data.setadapterparms.hdr.seq_no <
4554 cmd->data.setadapterparms.hdr.used_total)
4555 return 1;
4556 return 0;
4557}
4558
942d6984 4559static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4560{
4561 struct qeth_cmd_buffer *iob;
4562 struct qeth_ipa_cmd *cmd;
4563 struct qeth_snmp_ureq *ureq;
6fb392b1 4564 unsigned int req_len;
4a71df50
FB		 4565 struct qeth_arp_query_info qinfo = {0, };
4566 int rc = 0;
4567
847a50fd 4568 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4569
4570 if (card->info.guestlan)
4571 return -EOPNOTSUPP;
4572
4573 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4574 (!card->options.layer2)) {
4a71df50
FB		 4575 return -EOPNOTSUPP;
4576 }
4577 /* skip 4 bytes (data_len struct member) to get req_len */
4578 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4579 return -EFAULT;
6fb392b1
UB		 4580 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4581 sizeof(struct qeth_ipacmd_hdr) -
4582 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4583 return -EINVAL;
4986f3f0
JL		 4584 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4585 if (IS_ERR(ureq)) {
847a50fd 4586 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4587 return PTR_ERR(ureq);
4a71df50
FB		 4588 }
4589 qinfo.udata_len = ureq->hdr.data_len;
4590 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4591 if (!qinfo.udata) {
4592 kfree(ureq);
4593 return -ENOMEM;
4594 }
4595 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4596
4597 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4598 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4599 if (!iob) {
4600 rc = -ENOMEM;
4601 goto out;
4602 }
4a71df50
FB		 4603 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4604 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4605 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4606 qeth_snmp_command_cb, (void *)&qinfo);
4607 if (rc)
14cc21b6 4608 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4609 QETH_CARD_IFNAME(card), rc);
4610 else {
4611 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4612 rc = -EFAULT;
4613 }
1aec42bc 4614out:
4a71df50
FB		 4615 kfree(ureq);
4616 kfree(qinfo.udata);
4617 return rc;
4618}
4a71df50 4619
c3ab96f3
FB		 4620static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4621 struct qeth_reply *reply, unsigned long data)
4622{
4623 struct qeth_ipa_cmd *cmd;
4624 struct qeth_qoat_priv *priv;
4625 char *resdata;
4626 int resdatalen;
4627
4628 QETH_CARD_TEXT(card, 3, "qoatcb");
4629
4630 cmd = (struct qeth_ipa_cmd *)data;
4631 priv = (struct qeth_qoat_priv *)reply->param;
4632 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4633 resdata = (char *)data + 28;
4634
4635 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4636 cmd->hdr.return_code = IPA_RC_FFFF;
4637 return 0;
4638 }
4639
4640 memcpy((priv->buffer + priv->response_len), resdata,
4641 resdatalen);
4642 priv->response_len += resdatalen;
4643
4644 if (cmd->data.setadapterparms.hdr.seq_no <
4645 cmd->data.setadapterparms.hdr.used_total)
4646 return 1;
4647 return 0;
4648}
4649
942d6984 4650static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4651{
4652 int rc = 0;
4653 struct qeth_cmd_buffer *iob;
4654 struct qeth_ipa_cmd *cmd;
4655 struct qeth_query_oat *oat_req;
4656 struct qeth_query_oat_data oat_data;
4657 struct qeth_qoat_priv priv;
4658 void __user *tmp;
4659
4660 QETH_CARD_TEXT(card, 3, "qoatcmd");
4661
4662 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4663 rc = -EOPNOTSUPP;
4664 goto out;
4665 }
4666
4667 if (copy_from_user(&oat_data, udata,
4668 sizeof(struct qeth_query_oat_data))) {
4669 rc = -EFAULT;
4670 goto out;
4671 }
4672
4673 priv.buffer_len = oat_data.buffer_len;
4674 priv.response_len = 0;
4675 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4676 if (!priv.buffer) {
4677 rc = -ENOMEM;
4678 goto out;
4679 }
4680
4681 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4682 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4683 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4684 if (!iob) {
4685 rc = -ENOMEM;
4686 goto out_free;
4687 }
c3ab96f3
FB		 4688 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4689 oat_req = &cmd->data.setadapterparms.data.query_oat;
4690 oat_req->subcmd_code = oat_data.command;
4691
4692 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4693 &priv);
4694 if (!rc) {
4695 if (is_compat_task())
4696 tmp = compat_ptr(oat_data.ptr);
4697 else
4698 tmp = (void __user *)(unsigned long)oat_data.ptr;
4699
4700 if (copy_to_user(tmp, priv.buffer,
4701 priv.response_len)) {
4702 rc = -EFAULT;
4703 goto out_free;
4704 }
4705
4706 oat_data.response_len = priv.response_len;
4707
4708 if (copy_to_user(udata, &oat_data,
4709 sizeof(struct qeth_query_oat_data)))
4710 rc = -EFAULT;
4711 } else
4712 if (rc == IPA_RC_FFFF)
4713 rc = -EFAULT;
4714
4715out_free:
4716 kfree(priv.buffer);
4717out:
4718 return rc;
4719}
c3ab96f3 4720
e71e4072
HC		 4721static int qeth_query_card_info_cb(struct qeth_card *card,
4722 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4723{
4724 struct qeth_ipa_cmd *cmd;
4725 struct qeth_query_card_info *card_info;
4726 struct carrier_info *carrier_info;
4727
4728 QETH_CARD_TEXT(card, 2, "qcrdincb");
4729 carrier_info = (struct carrier_info *)reply->param;
4730 cmd = (struct qeth_ipa_cmd *)data;
4731 card_info = &cmd->data.setadapterparms.data.card_info;
4732 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4733 carrier_info->card_type = card_info->card_type;
4734 carrier_info->port_mode = card_info->port_mode;
4735 carrier_info->port_speed = card_info->port_speed;
4736 }
4737
4738 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4739 return 0;
4740}
4741
bca51650 4742static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4743 struct carrier_info *carrier_info)
4744{
4745 struct qeth_cmd_buffer *iob;
4746
4747 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4748 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4749 return -EOPNOTSUPP;
4750 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4751 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4752 if (!iob)
4753 return -ENOMEM;
02d5cb5b
EC		 4754 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4755 (void *)carrier_info);
4756}
02d5cb5b 4757
ec61bd2f
JW		 4758/**
4759 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4760 * @card: pointer to a qeth_card
4761 *
4762 * Returns
4763 * 0, if a MAC address has been set for the card's netdevice
4764 * a return code, for various error conditions
4765 */
4766int qeth_vm_request_mac(struct qeth_card *card)
4767{
4768 struct diag26c_mac_resp *response;
4769 struct diag26c_mac_req *request;
4770 struct ccw_dev_id id;
4771 int rc;
4772
4773 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4774
4775 if (!card->dev)
4776 return -ENODEV;
4777
4778 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4779 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4780 if (!request || !response) {
4781 rc = -ENOMEM;
4782 goto out;
4783 }
4784
4785 ccw_device_get_id(CARD_DDEV(card), &id);
4786 request->resp_buf_len = sizeof(*response);
4787 request->resp_version = DIAG26C_VERSION2;
4788 request->op_code = DIAG26C_GET_MAC;
4789 request->devno = id.devno;
4790
4791 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
4792 if (rc)
4793 goto out;
4794
4795 if (request->resp_buf_len < sizeof(*response) ||
4796 response->version != request->resp_version) {
4797 rc = -EIO;
4798 QETH_DBF_TEXT(SETUP, 2, "badresp");
4799 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4800 sizeof(request->resp_buf_len));
4801 } else if (!is_valid_ether_addr(response->mac)) {
4802 rc = -EINVAL;
4803 QETH_DBF_TEXT(SETUP, 2, "badmac");
4804 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4805 } else {
4806 ether_addr_copy(card->dev->dev_addr, response->mac);
4807 }
4808
4809out:
4810 kfree(response);
4811 kfree(request);
4812 return rc;
4813}
4814EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4815
cef6ff22 4816static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4817{
aa59004b
JW		 4818 if (card->info.type == QETH_CARD_TYPE_IQD)
4819 return QDIO_IQDIO_QFMT;
4820 else
4821 return QDIO_QETH_QFMT;
4a71df50
FB		 4822}
4823
d0ff1f52
UB		 4824static void qeth_determine_capabilities(struct qeth_card *card)
4825{
4826 int rc;
4827 int length;
4828 char *prcd;
4829 struct ccw_device *ddev;
4830 int ddev_offline = 0;
4831
4832 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4833 ddev = CARD_DDEV(card);
4834 if (!ddev->online) {
4835 ddev_offline = 1;
4836 rc = ccw_device_set_online(ddev);
4837 if (rc) {
4838 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4839 goto out;
4840 }
4841 }
4842
4843 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4844 if (rc) {
4845 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4846 dev_name(&card->gdev->dev), rc);
4847 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4848 goto out_offline;
4849 }
4850 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4851 if (ddev_offline)
4852 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4853 kfree(prcd);
4854
4855 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4856 if (rc)
4857 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4858
0da9581d 4859 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4860 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4861 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4862 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4863 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4864 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4865 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4866 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4867 dev_info(&card->gdev->dev,
4868 "Completion Queueing supported\n");
4869 } else {
4870 card->options.cq = QETH_CQ_NOTAVAILABLE;
4871 }
4872
4873
d0ff1f52
UB		 4874out_offline:
4875 if (ddev_offline == 1)
4876 ccw_device_set_offline(ddev);
4877out:
4878 return;
4879}
4880
cef6ff22
JW		 4881static void qeth_qdio_establish_cq(struct qeth_card *card,
4882 struct qdio_buffer **in_sbal_ptrs,
4883 void (**queue_start_poll)
4884 (struct ccw_device *, int,
4885 unsigned long))
4886{
0da9581d
EL		 4887 int i;
4888
4889 if (card->options.cq == QETH_CQ_ENABLED) {
4890 int offset = QDIO_MAX_BUFFERS_PER_Q *
4891 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4892 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4893 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4894 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4895 }
4896
4897 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4898 }
4899}
4900
4a71df50
FB		 4901static int qeth_qdio_establish(struct qeth_card *card)
4902{
4903 struct qdio_initialize init_data;
4904 char *qib_param_field;
4905 struct qdio_buffer **in_sbal_ptrs;
104ea556 4906 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4907 struct qdio_buffer **out_sbal_ptrs;
4908 int i, j, k;
4909 int rc = 0;
4910
d11ba0c4 4911 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4912
4913 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4914 GFP_KERNEL);
104ea556 4915 if (!qib_param_field) {
4916 rc = -ENOMEM;
4917 goto out_free_nothing;
4918 }
4a71df50
FB		 4919
4920 qeth_create_qib_param_field(card, qib_param_field);
4921 qeth_create_qib_param_field_blkt(card, qib_param_field);
4922
b3332930 4923 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4924 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4925 GFP_KERNEL);
4926 if (!in_sbal_ptrs) {
104ea556 4927 rc = -ENOMEM;
4928 goto out_free_qib_param;
4a71df50 4929 }
0da9581d 4930 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4931 in_sbal_ptrs[i] = (struct qdio_buffer *)
4932 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4933 }
4a71df50 4934
0da9581d
EL		 4935 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4936 GFP_KERNEL);
104ea556 4937 if (!queue_start_poll) {
4938 rc = -ENOMEM;
4939 goto out_free_in_sbals;
4940 }
0da9581d 4941 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4942 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4943
4944 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4945
4a71df50 4946 out_sbal_ptrs =
b3332930 4947 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4948 sizeof(void *), GFP_KERNEL);
4949 if (!out_sbal_ptrs) {
104ea556 4950 rc = -ENOMEM;
4951 goto out_free_queue_start_poll;
4a71df50
FB		 4952 }
4953 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4954 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4955 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4956 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4957 }
4958
4959 memset(&init_data, 0, sizeof(struct qdio_initialize));
4960 init_data.cdev = CARD_DDEV(card);
4961 init_data.q_format = qeth_get_qdio_q_format(card);
4962 init_data.qib_param_field_format = 0;
4963 init_data.qib_param_field = qib_param_field;
0da9581d 4964 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4965 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4966 init_data.input_handler = card->discipline->input_handler;
4967 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4968 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4969 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4970 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4971 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4972 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4973 init_data.scan_threshold =
0fa81cd4 4974 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4975
4976 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4977 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4978 rc = qdio_allocate(&init_data);
4979 if (rc) {
4980 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4981 goto out;
4982 }
4983 rc = qdio_establish(&init_data);
4984 if (rc) {
4a71df50 4985 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4986 qdio_free(CARD_DDEV(card));
4987 }
4a71df50 4988 }
0da9581d
EL		 4989
4990 switch (card->options.cq) {
4991 case QETH_CQ_ENABLED:
4992 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4993 break;
4994 case QETH_CQ_DISABLED:
4995 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4996 break;
4997 default:
4998 break;
4999 }
cc961d40 5000out:
4a71df50 5001 kfree(out_sbal_ptrs);
104ea556 5002out_free_queue_start_poll:
5003 kfree(queue_start_poll);
5004out_free_in_sbals:
4a71df50 5005 kfree(in_sbal_ptrs);
104ea556 5006out_free_qib_param:
4a71df50 5007 kfree(qib_param_field);
104ea556 5008out_free_nothing:
4a71df50
FB		 5009 return rc;
5010}
5011
5012static void qeth_core_free_card(struct qeth_card *card)
5013{
5014
d11ba0c4
PT		 5015 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5016 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5017 qeth_clean_channel(&card->read);
5018 qeth_clean_channel(&card->write);
5019 if (card->dev)
5020 free_netdev(card->dev);
4a71df50 5021 qeth_free_qdio_buffers(card);
6bcac508 5022 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 5023 kfree(card);
5024}
5025
395672e0
SR		 5026void qeth_trace_features(struct qeth_card *card)
5027{
5028 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5029 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5030 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5031 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5032 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5033 sizeof(card->info.diagass_support));
395672e0
SR		 5034}
5035EXPORT_SYMBOL_GPL(qeth_trace_features);
5036
4a71df50 5037static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5038 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5039 .driver_info = QETH_CARD_TYPE_OSD},
5040 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5041 .driver_info = QETH_CARD_TYPE_IQD},
5042 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5043 .driver_info = QETH_CARD_TYPE_OSN},
5044 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5045 .driver_info = QETH_CARD_TYPE_OSM},
5046 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5047 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5048 {},
5049};
5050MODULE_DEVICE_TABLE(ccw, qeth_ids);
5051
5052static struct ccw_driver qeth_ccw_driver = {
3bda058b 5053 .driver = {
3e70b3b8 5054 .owner = THIS_MODULE,
3bda058b
SO		 5055 .name = "qeth",
5056 },
4a71df50
FB		 5057 .ids = qeth_ids,
5058 .probe = ccwgroup_probe_ccwdev,
5059 .remove = ccwgroup_remove_ccwdev,
5060};
5061
4a71df50
FB		 5062int qeth_core_hardsetup_card(struct qeth_card *card)
5063{
6ebb7f8d 5064 int retries = 3;
4a71df50
FB		 5065 int rc;
5066
d11ba0c4 5067 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5068 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5069 qeth_update_from_chp_desc(card);
4a71df50 5070retry:
6ebb7f8d 5071 if (retries < 3)
74eacdb9
FB		 5072 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5073 dev_name(&card->gdev->dev));
22ae2790 5074 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5075 ccw_device_set_offline(CARD_DDEV(card));
5076 ccw_device_set_offline(CARD_WDEV(card));
5077 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5078 qdio_free(CARD_DDEV(card));
aa909224
UB		 5079 rc = ccw_device_set_online(CARD_RDEV(card));
5080 if (rc)
5081 goto retriable;
5082 rc = ccw_device_set_online(CARD_WDEV(card));
5083 if (rc)
5084 goto retriable;
5085 rc = ccw_device_set_online(CARD_DDEV(card));
5086 if (rc)
5087 goto retriable;
aa909224 5088retriable:
4a71df50 5089 if (rc == -ERESTARTSYS) {
d11ba0c4 5090 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5091 return rc;
5092 } else if (rc) {
d11ba0c4 5093 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5094 if (--retries < 0)
4a71df50
FB		 5095 goto out;
5096 else
5097 goto retry;
5098 }
d0ff1f52 5099 qeth_determine_capabilities(card);
4a71df50
FB		 5100 qeth_init_tokens(card);
5101 qeth_init_func_level(card);
5102 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5103 if (rc == -ERESTARTSYS) {
d11ba0c4 5104 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5105 return rc;
5106 } else if (rc) {
d11ba0c4 5107 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5108 if (--retries < 0)
5109 goto out;
5110 else
5111 goto retry;
5112 }
5113 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5114 if (rc == -ERESTARTSYS) {
d11ba0c4 5115 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5116 return rc;
5117 } else if (rc) {
d11ba0c4 5118 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5119 if (--retries < 0)
5120 goto out;
5121 else
5122 goto retry;
5123 }
908abbb5 5124 card->read_or_write_problem = 0;
4a71df50
FB		 5125 rc = qeth_mpc_initialize(card);
5126 if (rc) {
d11ba0c4 5127 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5128 goto out;
5129 }
1da74b1c 5130
10340510
JW		 5131 rc = qeth_send_startlan(card);
5132 if (rc) {
5133 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5134 if (rc == IPA_RC_LAN_OFFLINE) {
5135 dev_warn(&card->gdev->dev,
5136 "The LAN is offline\n");
5137 card->lan_online = 0;
5138 } else {
5139 rc = -ENODEV;
5140 goto out;
5141 }
5142 } else
5143 card->lan_online = 1;
5144
1da74b1c 5145 card->options.ipa4.supported_funcs = 0;
4d7def2a 5146 card->options.ipa6.supported_funcs = 0;
1da74b1c 5147 card->options.adp.supported_funcs = 0;
b4d72c08 5148 card->options.sbp.supported_funcs = 0;
1da74b1c 5149 card->info.diagass_support = 0;
1aec42bc
TR		 5150 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5151 if (rc == -ENOMEM)
5152 goto out;
5153 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5154 rc = qeth_query_setadapterparms(card);
5155 if (rc < 0) {
10340510 5156 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5157 goto out;
5158 }
5159 }
5160 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5161 rc = qeth_query_setdiagass(card);
5162 if (rc < 0) {
10340510 5163 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5164 goto out;
5165 }
5166 }
4a71df50
FB		 5167 return 0;
5168out:
74eacdb9
FB		 5169 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5170 "an error on the device\n");
5171 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5172 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5173 return rc;
5174}
5175EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5176
8d68af6a
JW		 5177static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5178 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5179{
5180 struct page *page = virt_to_page(element->addr);
b6f72f96 5181 unsigned int next_frag;
b3332930 5182
8d68af6a
JW		 5183 /* first fill the linear space */
5184 if (!skb->len) {
5185 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5186
8d68af6a
JW		 5187 skb_put_data(skb, element->addr + offset, linear);
5188 data_len -= linear;
5189 if (!data_len)
5190 return;
5191 offset += linear;
5192 /* fall through to add page frag for remaining data */
4a71df50 5193 }
0da9581d 5194
8d68af6a 5195 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5196 get_page(page);
8d68af6a 5197 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5198}
5199
bca51650
TR		 5200static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5201{
5202 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5203}
5204
4a71df50 5205struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5206 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5207 struct qdio_buffer_element **__element, int *__offset,
5208 struct qeth_hdr **hdr)
5209{
5210 struct qdio_buffer_element *element = *__element;
b3332930 5211 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5212 int offset = *__offset;
8d68af6a 5213 struct sk_buff *skb;
76b11f8e 5214 int skb_len = 0;
4a71df50
FB		 5215 void *data_ptr;
5216 int data_len;
5217 int headroom = 0;
5218 int use_rx_sg = 0;
4a71df50 5219
4a71df50 5220 /* qeth_hdr must not cross element boundaries */
864c17c3 5221 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5222 if (qeth_is_last_sbale(element))
5223 return NULL;
5224 element++;
5225 offset = 0;
4a71df50
FB		 5226 }
5227 *hdr = element->addr + offset;
5228
5229 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5230 switch ((*hdr)->hdr.l2.id) {
5231 case QETH_HEADER_TYPE_LAYER2:
5232 skb_len = (*hdr)->hdr.l2.pkt_length;
5233 break;
5234 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5235 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5236 headroom = ETH_HLEN;
76b11f8e
UB		 5237 break;
5238 case QETH_HEADER_TYPE_OSN:
5239 skb_len = (*hdr)->hdr.osn.pdu_length;
5240 headroom = sizeof(struct qeth_hdr);
5241 break;
5242 default:
5243 break;
4a71df50
FB		 5244 }
5245
5246 if (!skb_len)
5247 return NULL;
5248
b3332930
FB		 5249 if (((skb_len >= card->options.rx_sg_cb) &&
5250 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5251 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5252 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5253 use_rx_sg = 1;
8d68af6a
JW		 5254
5255 if (use_rx_sg && qethbuffer->rx_skb) {
5256 /* QETH_CQ_ENABLED only: */
5257 skb = qethbuffer->rx_skb;
5258 qethbuffer->rx_skb = NULL;
4a71df50 5259 } else {
8d68af6a
JW		 5260 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5261
5262 skb = dev_alloc_skb(linear + headroom);
4a71df50 5263 }
8d68af6a
JW		 5264 if (!skb)
5265 goto no_mem;
5266 if (headroom)
5267 skb_reserve(skb, headroom);
4a71df50
FB		 5268
5269 data_ptr = element->addr + offset;
5270 while (skb_len) {
5271 data_len = min(skb_len, (int)(element->length - offset));
5272 if (data_len) {
8d68af6a
JW		 5273 if (use_rx_sg)
5274 qeth_create_skb_frag(element, skb, offset,
5275 data_len);
5276 else
59ae1d12 5277 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5278 }
5279 skb_len -= data_len;
5280 if (skb_len) {
5281 if (qeth_is_last_sbale(element)) {
847a50fd 5282 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5283 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5284 dev_kfree_skb_any(skb);
5285 card->stats.rx_errors++;
5286 return NULL;
5287 }
5288 element++;
5289 offset = 0;
5290 data_ptr = element->addr;
5291 } else {
5292 offset += data_len;
5293 }
5294 }
5295 *__element = element;
5296 *__offset = offset;
5297 if (use_rx_sg && card->options.performance_stats) {
5298 card->perf_stats.sg_skbs_rx++;
5299 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5300 }
5301 return skb;
5302no_mem:
5303 if (net_ratelimit()) {
847a50fd 5304 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5305 }
5306 card->stats.rx_dropped++;
5307 return NULL;
5308}
5309EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5310
d73ef324
JW		 5311int qeth_poll(struct napi_struct *napi, int budget)
5312{
5313 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5314 int work_done = 0;
5315 struct qeth_qdio_buffer *buffer;
5316 int done;
5317 int new_budget = budget;
5318
5319 if (card->options.performance_stats) {
5320 card->perf_stats.inbound_cnt++;
5321 card->perf_stats.inbound_start_time = qeth_get_micros();
5322 }
5323
5324 while (1) {
5325 if (!card->rx.b_count) {
5326 card->rx.qdio_err = 0;
5327 card->rx.b_count = qdio_get_next_buffers(
5328 card->data.ccwdev, 0, &card->rx.b_index,
5329 &card->rx.qdio_err);
5330 if (card->rx.b_count <= 0) {
5331 card->rx.b_count = 0;
5332 break;
5333 }
5334 card->rx.b_element =
5335 &card->qdio.in_q->bufs[card->rx.b_index]
5336 .buffer->element[0];
5337 card->rx.e_offset = 0;
5338 }
5339
5340 while (card->rx.b_count) {
5341 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5342 if (!(card->rx.qdio_err &&
5343 qeth_check_qdio_errors(card, buffer->buffer,
5344 card->rx.qdio_err, "qinerr")))
5345 work_done +=
5346 card->discipline->process_rx_buffer(
5347 card, new_budget, &done);
5348 else
5349 done = 1;
5350
5351 if (done) {
5352 if (card->options.performance_stats)
5353 card->perf_stats.bufs_rec++;
5354 qeth_put_buffer_pool_entry(card,
5355 buffer->pool_entry);
5356 qeth_queue_input_buffer(card, card->rx.b_index);
5357 card->rx.b_count--;
5358 if (card->rx.b_count) {
5359 card->rx.b_index =
5360 (card->rx.b_index + 1) %
5361 QDIO_MAX_BUFFERS_PER_Q;
5362 card->rx.b_element =
5363 &card->qdio.in_q
5364 ->bufs[card->rx.b_index]
5365 .buffer->element[0];
5366 card->rx.e_offset = 0;
5367 }
5368 }
5369
5370 if (work_done >= budget)
5371 goto out;
5372 else
5373 new_budget = budget - work_done;
5374 }
5375 }
5376
978759e8 5377 napi_complete_done(napi, work_done);
d73ef324
JW		 5378 if (qdio_start_irq(card->data.ccwdev, 0))
5379 napi_schedule(&card->napi);
5380out:
5381 if (card->options.performance_stats)
5382 card->perf_stats.inbound_time += qeth_get_micros() -
5383 card->perf_stats.inbound_start_time;
5384 return work_done;
5385}
5386EXPORT_SYMBOL_GPL(qeth_poll);
5387
8f43fb00
TR		 5388int qeth_setassparms_cb(struct qeth_card *card,
5389 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5390{
5391 struct qeth_ipa_cmd *cmd;
5392
5393 QETH_CARD_TEXT(card, 4, "defadpcb");
5394
5395 cmd = (struct qeth_ipa_cmd *) data;
5396 if (cmd->hdr.return_code == 0) {
5397 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5398 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5399 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5400 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5401 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5402 }
4d7def2a
TR		 5403 return 0;
5404}
8f43fb00 5405EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5406
b475e316
TR		 5407struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5408 enum qeth_ipa_funcs ipa_func,
5409 __u16 cmd_code, __u16 len,
5410 enum qeth_prot_versions prot)
4d7def2a
TR		 5411{
5412 struct qeth_cmd_buffer *iob;
5413 struct qeth_ipa_cmd *cmd;
5414
5415 QETH_CARD_TEXT(card, 4, "getasscm");
5416 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5417
5418 if (iob) {
5419 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5420 cmd->data.setassparms.hdr.assist_no = ipa_func;
5421 cmd->data.setassparms.hdr.length = 8 + len;
5422 cmd->data.setassparms.hdr.command_code = cmd_code;
5423 cmd->data.setassparms.hdr.return_code = 0;
5424 cmd->data.setassparms.hdr.seq_no = 0;
5425 }
5426
5427 return iob;
5428}
b475e316 5429EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5430
5431int qeth_send_setassparms(struct qeth_card *card,
5432 struct qeth_cmd_buffer *iob, __u16 len, long data,
5433 int (*reply_cb)(struct qeth_card *,
5434 struct qeth_reply *, unsigned long),
5435 void *reply_param)
5436{
5437 int rc;
5438 struct qeth_ipa_cmd *cmd;
5439
5440 QETH_CARD_TEXT(card, 4, "sendassp");
5441
5442 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5443 if (len <= sizeof(__u32))
5444 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5445 else /* (len > sizeof(__u32)) */
5446 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5447
5448 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5449 return rc;
5450}
5451EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5452
5453int qeth_send_simple_setassparms(struct qeth_card *card,
5454 enum qeth_ipa_funcs ipa_func,
5455 __u16 cmd_code, long data)
5456{
5457 int rc;
5458 int length = 0;
5459 struct qeth_cmd_buffer *iob;
5460
5461 QETH_CARD_TEXT(card, 4, "simassp4");
5462 if (data)
5463 length = sizeof(__u32);
5464 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5465 length, QETH_PROT_IPV4);
5466 if (!iob)
5467 return -ENOMEM;
5468 rc = qeth_send_setassparms(card, iob, length, data,
5469 qeth_setassparms_cb, NULL);
5470 return rc;
5471}
5472EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5473
4a71df50
FB		 5474static void qeth_unregister_dbf_views(void)
5475{
d11ba0c4
PT		 5476 int x;
5477 for (x = 0; x < QETH_DBF_INFOS; x++) {
5478 debug_unregister(qeth_dbf[x].id);
5479 qeth_dbf[x].id = NULL;
5480 }
4a71df50
FB		 5481}
5482
8e96c51c 5483void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5484{
5485 char dbf_txt_buf[32];
345aa66e 5486 va_list args;
cd023216 5487
8e6a8285 5488 if (!debug_level_enabled(id, level))
cd023216 5489 return;
345aa66e
PT		 5490 va_start(args, fmt);
5491 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5492 va_end(args);
8e96c51c 5493 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5494}
5495EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5496
4a71df50
FB		 5497static int qeth_register_dbf_views(void)
5498{
d11ba0c4
PT		 5499 int ret;
5500 int x;
5501
5502 for (x = 0; x < QETH_DBF_INFOS; x++) {
5503 /* register the areas */
5504 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5505 qeth_dbf[x].pages,
5506 qeth_dbf[x].areas,
5507 qeth_dbf[x].len);
5508 if (qeth_dbf[x].id == NULL) {
5509 qeth_unregister_dbf_views();
5510 return -ENOMEM;
5511 }
4a71df50 5512
d11ba0c4
PT		 5513 /* register a view */
5514 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5515 if (ret) {
5516 qeth_unregister_dbf_views();
5517 return ret;
5518 }
4a71df50 5519
d11ba0c4
PT		 5520 /* set a passing level */
5521 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5522 }
4a71df50
FB		 5523
5524 return 0;
5525}
5526
5527int qeth_core_load_discipline(struct qeth_card *card,
5528 enum qeth_discipline_id discipline)
5529{
5530 int rc = 0;
c70eb09d 5531
2022e00c 5532 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5533 switch (discipline) {
5534 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5535 card->discipline = try_then_request_module(
5536 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5537 break;
5538 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5539 card->discipline = try_then_request_module(
5540 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5541 break;
c70eb09d
JW		 5542 default:
5543 break;
4a71df50 5544 }
c70eb09d 5545
c041f2d4 5546 if (!card->discipline) {
74eacdb9
FB		 5547 dev_err(&card->gdev->dev, "There is no kernel module to "
5548 "support discipline %d\n", discipline);
4a71df50
FB		 5549 rc = -EINVAL;
5550 }
2022e00c 5551 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5552 return rc;
5553}
5554
5555void qeth_core_free_discipline(struct qeth_card *card)
5556{
5557 if (card->options.layer2)
c041f2d4 5558 symbol_put(qeth_l2_discipline);
4a71df50 5559 else
c041f2d4
SO		 5560 symbol_put(qeth_l3_discipline);
5561 card->discipline = NULL;
4a71df50
FB		 5562}
5563
2d2ebb3e 5564const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5565 .name = "qeth_generic",
5566 .groups = qeth_generic_attr_groups,
5567};
2d2ebb3e
JW		 5568EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5569
b7169c51
SO		 5570static const struct device_type qeth_osn_devtype = {
5571 .name = "qeth_osn",
5572 .groups = qeth_osn_attr_groups,
5573};
5574
819dc537
SR		 5575#define DBF_NAME_LEN 20
5576
5577struct qeth_dbf_entry {
5578 char dbf_name[DBF_NAME_LEN];
5579 debug_info_t *dbf_info;
5580 struct list_head dbf_list;
5581};
5582
5583static LIST_HEAD(qeth_dbf_list);
5584static DEFINE_MUTEX(qeth_dbf_list_mutex);
5585
5586static debug_info_t *qeth_get_dbf_entry(char *name)
5587{
5588 struct qeth_dbf_entry *entry;
5589 debug_info_t *rc = NULL;
5590
5591 mutex_lock(&qeth_dbf_list_mutex);
5592 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5593 if (strcmp(entry->dbf_name, name) == 0) {
5594 rc = entry->dbf_info;
5595 break;
5596 }
5597 }
5598 mutex_unlock(&qeth_dbf_list_mutex);
5599 return rc;
5600}
5601
5602static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5603{
5604 struct qeth_dbf_entry *new_entry;
5605
5606 card->debug = debug_register(name, 2, 1, 8);
5607 if (!card->debug) {
5608 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5609 goto err;
5610 }
5611 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5612 goto err_dbg;
5613 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5614 if (!new_entry)
5615 goto err_dbg;
5616 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5617 new_entry->dbf_info = card->debug;
5618 mutex_lock(&qeth_dbf_list_mutex);
5619 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5620 mutex_unlock(&qeth_dbf_list_mutex);
5621
5622 return 0;
5623
5624err_dbg:
5625 debug_unregister(card->debug);
5626err:
5627 return -ENOMEM;
5628}
5629
5630static void qeth_clear_dbf_list(void)
5631{
5632 struct qeth_dbf_entry *entry, *tmp;
5633
5634 mutex_lock(&qeth_dbf_list_mutex);
5635 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5636 list_del(&entry->dbf_list);
5637 debug_unregister(entry->dbf_info);
5638 kfree(entry);
5639 }
5640 mutex_unlock(&qeth_dbf_list_mutex);
5641}
5642
4a71df50
FB		 5643static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5644{
5645 struct qeth_card *card;
5646 struct device *dev;
5647 int rc;
c70eb09d 5648 enum qeth_discipline_id enforced_disc;
4a71df50 5649 unsigned long flags;
819dc537 5650 char dbf_name[DBF_NAME_LEN];
4a71df50 5651
d11ba0c4 5652 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5653
5654 dev = &gdev->dev;
5655 if (!get_device(dev))
5656 return -ENODEV;
5657
2a0217d5 5658 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5659
5660 card = qeth_alloc_card();
5661 if (!card) {
d11ba0c4 5662 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5663 rc = -ENOMEM;
5664 goto err_dev;
5665 }
af039068
CO		 5666
5667 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5668 dev_name(&gdev->dev));
819dc537 5669 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5670 if (!card->debug) {
819dc537
SR		 5671 rc = qeth_add_dbf_entry(card, dbf_name);
5672 if (rc)
5673 goto err_card;
af039068 5674 }
af039068 5675
4a71df50
FB		 5676 card->read.ccwdev = gdev->cdev[0];
5677 card->write.ccwdev = gdev->cdev[1];
5678 card->data.ccwdev = gdev->cdev[2];
5679 dev_set_drvdata(&gdev->dev, card);
5680 card->gdev = gdev;
5681 gdev->cdev[0]->handler = qeth_irq;
5682 gdev->cdev[1]->handler = qeth_irq;
5683 gdev->cdev[2]->handler = qeth_irq;
5684
ed2e93ef 5685 qeth_determine_card_type(card);
4a71df50
FB		 5686 rc = qeth_setup_card(card);
5687 if (rc) {
d11ba0c4 5688 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5689 goto err_card;
4a71df50
FB		 5690 }
5691
c70eb09d
JW		 5692 qeth_determine_capabilities(card);
5693 enforced_disc = qeth_enforce_discipline(card);
5694 switch (enforced_disc) {
5695 case QETH_DISCIPLINE_UNDETERMINED:
5696 gdev->dev.type = &qeth_generic_devtype;
5697 break;
5698 default:
5699 card->info.layer_enforced = true;
5700 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5701 if (rc)
819dc537 5702 goto err_card;
2d2ebb3e
JW		 5703
5704 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5705 ? card->discipline->devtype
5706 : &qeth_osn_devtype;
c041f2d4 5707 rc = card->discipline->setup(card->gdev);
4a71df50 5708 if (rc)
5113fec0 5709 goto err_disc;
2d2ebb3e 5710 break;
4a71df50
FB		 5711 }
5712
5713 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5714 list_add_tail(&card->list, &qeth_core_card_list.list);
5715 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5716 return 0;
5717
5113fec0
UB		 5718err_disc:
5719 qeth_core_free_discipline(card);
4a71df50
FB		 5720err_card:
5721 qeth_core_free_card(card);
5722err_dev:
5723 put_device(dev);
5724 return rc;
5725}
5726
5727static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5728{
5729 unsigned long flags;
5730 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5731
28a7e4c9 5732 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5733
c041f2d4
SO		 5734 if (card->discipline) {
5735 card->discipline->remove(gdev);
9dc48ccc
UB		 5736 qeth_core_free_discipline(card);
5737 }
5738
4a71df50
FB		 5739 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5740 list_del(&card->list);
5741 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5742 qeth_core_free_card(card);
5743 dev_set_drvdata(&gdev->dev, NULL);
5744 put_device(&gdev->dev);
5745 return;
5746}
5747
5748static int qeth_core_set_online(struct ccwgroup_device *gdev)
5749{
5750 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5751 int rc = 0;
c70eb09d 5752 enum qeth_discipline_id def_discipline;
4a71df50 5753
c041f2d4 5754 if (!card->discipline) {
4a71df50
FB		 5755 if (card->info.type == QETH_CARD_TYPE_IQD)
5756 def_discipline = QETH_DISCIPLINE_LAYER3;
5757 else
5758 def_discipline = QETH_DISCIPLINE_LAYER2;
5759 rc = qeth_core_load_discipline(card, def_discipline);
5760 if (rc)
5761 goto err;
c041f2d4 5762 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5763 if (rc) {
5764 qeth_core_free_discipline(card);
4a71df50 5765 goto err;
9111e788 5766 }
4a71df50 5767 }
c041f2d4 5768 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5769err:
5770 return rc;
5771}
5772
5773static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5774{
5775 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5776 return card->discipline->set_offline(gdev);
4a71df50
FB		 5777}
5778
5779static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5780{
5781 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5782 qeth_set_allowed_threads(card, 0, 1);
5783 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5784 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5785 qeth_qdio_clear_card(card, 0);
5786 qeth_clear_qdio_buffers(card);
5787 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5788}
5789
bbcfcdc8
FB		 5790static int qeth_core_freeze(struct ccwgroup_device *gdev)
5791{
5792 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5793 if (card->discipline && card->discipline->freeze)
5794 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5795 return 0;
5796}
5797
5798static int qeth_core_thaw(struct ccwgroup_device *gdev)
5799{
5800 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5801 if (card->discipline && card->discipline->thaw)
5802 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5803 return 0;
5804}
5805
5806static int qeth_core_restore(struct ccwgroup_device *gdev)
5807{
5808 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5809 if (card->discipline && card->discipline->restore)
5810 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5811 return 0;
5812}
5813
4a71df50 5814static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5815 .driver = {
5816 .owner = THIS_MODULE,
5817 .name = "qeth",
5818 },
f9a5d70c 5819 .ccw_driver = &qeth_ccw_driver,
b7169c51 5820 .setup = qeth_core_probe_device,
4a71df50
FB		 5821 .remove = qeth_core_remove_device,
5822 .set_online = qeth_core_set_online,
5823 .set_offline = qeth_core_set_offline,
5824 .shutdown = qeth_core_shutdown,
6ffa4d1b
JW		 5825 .prepare = NULL,
5826 .complete = NULL,
bbcfcdc8
FB		 5827 .freeze = qeth_core_freeze,
5828 .thaw = qeth_core_thaw,
5829 .restore = qeth_core_restore,
4a71df50
FB		 5830};
5831
36369569
GKH		 5832static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5833 size_t count)
4a71df50
FB		 5834{
5835 int err;
4a71df50 5836
b7169c51 5837 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5838 &qeth_core_ccwgroup_driver, 3, buf);
5839
5840 return err ? err : count;
5841}
36369569 5842static DRIVER_ATTR_WO(group);
4a71df50 5843
f47e2256
SO		 5844static struct attribute *qeth_drv_attrs[] = {
5845 &driver_attr_group.attr,
5846 NULL,
5847};
5848static struct attribute_group qeth_drv_attr_group = {
5849 .attrs = qeth_drv_attrs,
5850};
5851static const struct attribute_group *qeth_drv_attr_groups[] = {
5852 &qeth_drv_attr_group,
5853 NULL,
5854};
5855
942d6984
JW		 5856int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5857{
5858 struct qeth_card *card = dev->ml_priv;
5859 struct mii_ioctl_data *mii_data;
5860 int rc = 0;
5861
5862 if (!card)
5863 return -ENODEV;
5864
5865 if (!qeth_card_hw_is_reachable(card))
5866 return -ENODEV;
5867
5868 if (card->info.type == QETH_CARD_TYPE_OSN)
5869 return -EPERM;
5870
5871 switch (cmd) {
5872 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5873 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5874 break;
5875 case SIOC_QETH_GET_CARD_TYPE:
5876 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5877 card->info.type == QETH_CARD_TYPE_OSM ||
5878 card->info.type == QETH_CARD_TYPE_OSX) &&
5879 !card->info.guestlan)
5880 return 1;
5881 else
5882 return 0;
5883 case SIOCGMIIPHY:
5884 mii_data = if_mii(rq);
5885 mii_data->phy_id = 0;
5886 break;
5887 case SIOCGMIIREG:
5888 mii_data = if_mii(rq);
5889 if (mii_data->phy_id != 0)
5890 rc = -EINVAL;
5891 else
5892 mii_data->val_out = qeth_mdio_read(dev,
5893 mii_data->phy_id, mii_data->reg_num);
5894 break;
5895 case SIOC_QETH_QUERY_OAT:
5896 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5897 break;
5898 default:
5899 if (card->discipline->do_ioctl)
5900 rc = card->discipline->do_ioctl(dev, rq, cmd);
5901 else
5902 rc = -EOPNOTSUPP;
5903 }
5904 if (rc)
5905 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5906 return rc;
5907}
5908EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5909
4a71df50
FB		 5910static struct {
5911 const char str[ETH_GSTRING_LEN];
5912} qeth_ethtool_stats_keys[] = {
5913/* 0 */{"rx skbs"},
5914 {"rx buffers"},
5915 {"tx skbs"},
5916 {"tx buffers"},
5917 {"tx skbs no packing"},
5918 {"tx buffers no packing"},
5919 {"tx skbs packing"},
5920 {"tx buffers packing"},
5921 {"tx sg skbs"},
5922 {"tx sg frags"},
5923/* 10 */{"rx sg skbs"},
5924 {"rx sg frags"},
5925 {"rx sg page allocs"},
5926 {"tx large kbytes"},
5927 {"tx large count"},
5928 {"tx pk state ch n->p"},
5929 {"tx pk state ch p->n"},
5930 {"tx pk watermark low"},
5931 {"tx pk watermark high"},
5932 {"queue 0 buffer usage"},
5933/* 20 */{"queue 1 buffer usage"},
5934 {"queue 2 buffer usage"},
5935 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5936 {"rx poll time"},
5937 {"rx poll count"},
4a71df50
FB		 5938 {"rx do_QDIO time"},
5939 {"rx do_QDIO count"},
5940 {"tx handler time"},
5941 {"tx handler count"},
5942 {"tx time"},
5943/* 30 */{"tx count"},
5944 {"tx do_QDIO time"},
5945 {"tx do_QDIO count"},
f61a0d05 5946 {"tx csum"},
c3b4a740 5947 {"tx lin"},
6059c905 5948 {"tx linfail"},
0da9581d
EL		 5949 {"cq handler count"},
5950 {"cq handler time"}
4a71df50
FB		 5951};
5952
df8b4ec8 5953int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5954{
df8b4ec8
BH		 5955 switch (stringset) {
5956 case ETH_SS_STATS:
5957 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5958 default:
5959 return -EINVAL;
5960 }
4a71df50 5961}
df8b4ec8 5962EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5963
5964void qeth_core_get_ethtool_stats(struct net_device *dev,
5965 struct ethtool_stats *stats, u64 *data)
5966{
509e2562 5967 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5968 data[0] = card->stats.rx_packets -
5969 card->perf_stats.initial_rx_packets;
5970 data[1] = card->perf_stats.bufs_rec;
5971 data[2] = card->stats.tx_packets -
5972 card->perf_stats.initial_tx_packets;
5973 data[3] = card->perf_stats.bufs_sent;
5974 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5975 - card->perf_stats.skbs_sent_pack;
5976 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5977 data[6] = card->perf_stats.skbs_sent_pack;
5978 data[7] = card->perf_stats.bufs_sent_pack;
5979 data[8] = card->perf_stats.sg_skbs_sent;
5980 data[9] = card->perf_stats.sg_frags_sent;
5981 data[10] = card->perf_stats.sg_skbs_rx;
5982 data[11] = card->perf_stats.sg_frags_rx;
5983 data[12] = card->perf_stats.sg_alloc_page_rx;
5984 data[13] = (card->perf_stats.large_send_bytes >> 10);
5985 data[14] = card->perf_stats.large_send_cnt;
5986 data[15] = card->perf_stats.sc_dp_p;
5987 data[16] = card->perf_stats.sc_p_dp;
5988 data[17] = QETH_LOW_WATERMARK_PACK;
5989 data[18] = QETH_HIGH_WATERMARK_PACK;
5990 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5991 data[20] = (card->qdio.no_out_queues > 1) ?
5992 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5993 data[21] = (card->qdio.no_out_queues > 2) ?
5994 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5995 data[22] = (card->qdio.no_out_queues > 3) ?
5996 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5997 data[23] = card->perf_stats.inbound_time;
5998 data[24] = card->perf_stats.inbound_cnt;
5999 data[25] = card->perf_stats.inbound_do_qdio_time;
6000 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6001 data[27] = card->perf_stats.outbound_handler_time;
6002 data[28] = card->perf_stats.outbound_handler_cnt;
6003 data[29] = card->perf_stats.outbound_time;
6004 data[30] = card->perf_stats.outbound_cnt;
6005 data[31] = card->perf_stats.outbound_do_qdio_time;
6006 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6007 data[33] = card->perf_stats.tx_csum;
c3b4a740 6008 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6009 data[35] = card->perf_stats.tx_linfail;
6010 data[36] = card->perf_stats.cq_cnt;
6011 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 6012}
6013EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6014
6015void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6016{
6017 switch (stringset) {
6018 case ETH_SS_STATS:
6019 memcpy(data, &qeth_ethtool_stats_keys,
6020 sizeof(qeth_ethtool_stats_keys));
6021 break;
6022 default:
6023 WARN_ON(1);
6024 break;
6025 }
6026}
6027EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6028
6029void qeth_core_get_drvinfo(struct net_device *dev,
6030 struct ethtool_drvinfo *info)
6031{
509e2562 6032 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 6033
6034 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6035 sizeof(info->driver));
6036 strlcpy(info->version, "1.0", sizeof(info->version));
6037 strlcpy(info->fw_version, card->info.mcl_level,
6038 sizeof(info->fw_version));
6039 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6040 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6041}
6042EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6043
774afb8e
JW		 6044/* Helper function to fill 'advertising' and 'supported' which are the same. */
6045/* Autoneg and full-duplex are supported and advertised unconditionally. */
6046/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6047/* specified port type. */
993e19c0 6048static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6049 int maxspeed, int porttype)
6050{
41fc3b65
JW		 6051 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6052 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6053 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6054
41fc3b65
JW		 6055 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6056 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6057
6058 switch (porttype) {
6059 case PORT_TP:
41fc3b65
JW		 6060 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6061 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6062 break;
6063 case PORT_FIBRE:
41fc3b65
JW		 6064 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6065 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6066 break;
6067 default:
41fc3b65
JW		 6068 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6069 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6070 WARN_ON_ONCE(1);
6071 }
6072
774afb8e 6073 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6074 switch (maxspeed) {
6075 case SPEED_10000:
41fc3b65
JW		 6076 ethtool_link_ksettings_add_link_mode(cmd, supported,
6077 10000baseT_Full);
6078 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6079 10000baseT_Full);
02d5cb5b 6080 case SPEED_1000:
41fc3b65
JW		 6081 ethtool_link_ksettings_add_link_mode(cmd, supported,
6082 1000baseT_Full);
6083 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6084 1000baseT_Full);
6085 ethtool_link_ksettings_add_link_mode(cmd, supported,
6086 1000baseT_Half);
6087 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6088 1000baseT_Half);
02d5cb5b 6089 case SPEED_100:
41fc3b65
JW		 6090 ethtool_link_ksettings_add_link_mode(cmd, supported,
6091 100baseT_Full);
6092 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6093 100baseT_Full);
6094 ethtool_link_ksettings_add_link_mode(cmd, supported,
6095 100baseT_Half);
6096 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6097 100baseT_Half);
02d5cb5b 6098 case SPEED_10:
41fc3b65
JW		 6099 ethtool_link_ksettings_add_link_mode(cmd, supported,
6100 10baseT_Full);
6101 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6102 10baseT_Full);
6103 ethtool_link_ksettings_add_link_mode(cmd, supported,
6104 10baseT_Half);
6105 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6106 10baseT_Half);
774afb8e
JW		 6107 /* end fallthrough */
6108 break;
02d5cb5b 6109 default:
41fc3b65
JW		 6110 ethtool_link_ksettings_add_link_mode(cmd, supported,
6111 10baseT_Full);
6112 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6113 10baseT_Full);
6114 ethtool_link_ksettings_add_link_mode(cmd, supported,
6115 10baseT_Half);
6116 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6117 10baseT_Half);
02d5cb5b
EC		 6118 WARN_ON_ONCE(1);
6119 }
02d5cb5b
EC		 6120}
6121
993e19c0
JW		 6122int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6123 struct ethtool_link_ksettings *cmd)
3f9975aa 6124{
509e2562 6125 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6126 enum qeth_link_types link_type;
02d5cb5b 6127 struct carrier_info carrier_info;
511c2445 6128 int rc;
3f9975aa
FB		 6129
6130 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6131 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6132 else
6133 link_type = card->info.link_type;
6134
993e19c0
JW		 6135 cmd->base.duplex = DUPLEX_FULL;
6136 cmd->base.autoneg = AUTONEG_ENABLE;
6137 cmd->base.phy_address = 0;
6138 cmd->base.mdio_support = 0;
6139 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6140 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6141
6142 switch (link_type) {
6143 case QETH_LINK_TYPE_FAST_ETH:
6144 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6145 cmd->base.speed = SPEED_100;
6146 cmd->base.port = PORT_TP;
3f9975aa 6147 break;
3f9975aa
FB		 6148 case QETH_LINK_TYPE_GBIT_ETH:
6149 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6150 cmd->base.speed = SPEED_1000;
6151 cmd->base.port = PORT_FIBRE;
3f9975aa 6152 break;
3f9975aa 6153 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6154 cmd->base.speed = SPEED_10000;
6155 cmd->base.port = PORT_FIBRE;
3f9975aa 6156 break;
3f9975aa 6157 default:
993e19c0
JW		 6158 cmd->base.speed = SPEED_10;
6159 cmd->base.port = PORT_TP;
3f9975aa 6160 }
993e19c0 6161 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6162
02d5cb5b
EC		 6163 /* Check if we can obtain more accurate information. */
6164 /* If QUERY_CARD_INFO command is not supported or fails, */
6165 /* just return the heuristics that was filled above. */
511c2445
EC		 6166 if (!qeth_card_hw_is_reachable(card))
6167 return -ENODEV;
6168 rc = qeth_query_card_info(card, &carrier_info);
6169 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6170 return 0;
511c2445
EC		 6171 if (rc) /* report error from the hardware operation */
6172 return rc;
6173 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6174
6175 netdev_dbg(netdev,
6176 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6177 carrier_info.card_type,
6178 carrier_info.port_mode,
6179 carrier_info.port_speed);
6180
6181 /* Update attributes for which we've obtained more authoritative */
6182 /* information, leave the rest the way they where filled above. */
6183 switch (carrier_info.card_type) {
6184 case CARD_INFO_TYPE_1G_COPPER_A:
6185 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6186 cmd->base.port = PORT_TP;
6187 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6188 break;
6189 case CARD_INFO_TYPE_1G_FIBRE_A:
6190 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6191 cmd->base.port = PORT_FIBRE;
6192 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6193 break;
6194 case CARD_INFO_TYPE_10G_FIBRE_A:
6195 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6196 cmd->base.port = PORT_FIBRE;
6197 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6198 break;
6199 }
6200
6201 switch (carrier_info.port_mode) {
6202 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6203 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6204 break;
6205 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6206 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6207 break;
6208 }
6209
6210 switch (carrier_info.port_speed) {
6211 case CARD_INFO_PORTS_10M:
993e19c0 6212 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6213 break;
6214 case CARD_INFO_PORTS_100M:
993e19c0 6215 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6216 break;
6217 case CARD_INFO_PORTS_1G:
993e19c0 6218 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6219 break;
6220 case CARD_INFO_PORTS_10G:
993e19c0 6221 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6222 break;
6223 }
6224
3f9975aa
FB		 6225 return 0;
6226}
993e19c0 6227EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6228
c9475369
TR		 6229/* Callback to handle checksum offload command reply from OSA card.
6230 * Verify that required features have been enabled on the card.
6231 * Return error in hdr->return_code as this value is checked by caller.
6232 *
6233 * Always returns zero to indicate no further messages from the OSA card.
6234 */
6235static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6236 struct qeth_reply *reply,
6237 unsigned long data)
6238{
6239 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6240 struct qeth_checksum_cmd *chksum_cb =
6241 (struct qeth_checksum_cmd *)reply->param;
6242
6243 QETH_CARD_TEXT(card, 4, "chkdoccb");
6244 if (cmd->hdr.return_code)
6245 return 0;
6246
6247 memset(chksum_cb, 0, sizeof(*chksum_cb));
6248 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6249 chksum_cb->supported =
6250 cmd->data.setassparms.data.chksum.supported;
6251 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6252 }
6253 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6254 chksum_cb->supported =
6255 cmd->data.setassparms.data.chksum.supported;
6256 chksum_cb->enabled =
6257 cmd->data.setassparms.data.chksum.enabled;
6258 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6259 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6260 }
6261 return 0;
6262}
6263
6264/* Send command to OSA card and check results. */
6265static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6266 enum qeth_ipa_funcs ipa_func,
6267 __u16 cmd_code, long data,
6268 struct qeth_checksum_cmd *chksum_cb)
6269{
6270 struct qeth_cmd_buffer *iob;
6271 int rc = -ENOMEM;
6272
6273 QETH_CARD_TEXT(card, 4, "chkdocmd");
6274 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6275 sizeof(__u32), QETH_PROT_IPV4);
6276 if (iob)
6277 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6278 qeth_ipa_checksum_run_cmd_cb,
6279 chksum_cb);
6280 return rc;
6281}
6282
8f43fb00 6283static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6284{
f9d8e6dc
TR		 6285 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6286 QETH_IPA_CHECKSUM_UDP |
6287 QETH_IPA_CHECKSUM_TCP;
c9475369 6288 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6289 int rc;
6290
c9475369
TR		 6291 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6292 &chksum_cb);
f9d8e6dc
TR		 6293 if (!rc) {
6294 if ((required_features & chksum_cb.supported) !=
6295 required_features)
6296 rc = -EIO;
dae84c8e
TR		 6297 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6298 cstype == IPA_INBOUND_CHECKSUM)
6299 dev_warn(&card->gdev->dev,
6300 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6301 QETH_CARD_IFNAME(card));
f9d8e6dc 6302 }
4d7def2a 6303 if (rc) {
c9475369 6304 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6305 dev_warn(&card->gdev->dev,
6306 "Starting HW checksumming for %s failed, using SW checksumming\n",
6307 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6308 return rc;
6309 }
c9475369
TR		 6310 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6311 chksum_cb.supported, &chksum_cb);
f9d8e6dc
TR		 6312 if (!rc) {
6313 if ((required_features & chksum_cb.enabled) !=
6314 required_features)
6315 rc = -EIO;
6316 }
4d7def2a 6317 if (rc) {
c9475369 6318 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6319 dev_warn(&card->gdev->dev,
6320 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6321 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6322 return rc;
6323 }
8f43fb00
TR		 6324
6325 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6326 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6327 return 0;
6328}
6329
8f43fb00 6330static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a 6331{
c9475369
TR		 6332 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6333 : qeth_send_simple_setassparms(card, cstype,
6334 IPA_CMD_ASS_STOP, 0);
6335 return rc ? -EIO : 0;
4d7def2a 6336}
4d7def2a 6337
8f43fb00 6338static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6339{
8f43fb00 6340 int rc;
4d7def2a 6341
8f43fb00 6342 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6343
8f43fb00
TR		 6344 if (on) {
6345 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6346 IPA_CMD_ASS_START, 0);
6347 if (rc) {
6348 dev_warn(&card->gdev->dev,
6349 "Starting outbound TCP segmentation offload for %s failed\n",
6350 QETH_CARD_IFNAME(card));
6351 return -EIO;
6352 }
6353 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6354 } else {
6355 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6356 IPA_CMD_ASS_STOP, 0);
6357 }
4d7def2a
TR		 6358 return rc;
6359}
8f43fb00 6360
ce344356
JW		 6361#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO)
6362
6363/**
6364 * qeth_recover_features() - Restore device features after recovery
6365 * @dev: the recovering net_device
6366 *
6367 * Caller must hold rtnl lock.
6368 */
6369void qeth_recover_features(struct net_device *dev)
e830baa9 6370{
ce344356 6371 netdev_features_t features = dev->features;
e830baa9 6372 struct qeth_card *card = dev->ml_priv;
e830baa9 6373
ce344356
JW		 6374 /* force-off any feature that needs an IPA sequence.
6375 * netdev_update_features() will restart them.
6376 */
6377 dev->features &= ~QETH_HW_FEATURES;
6378 netdev_update_features(dev);
e830baa9 6379
ce344356
JW		 6380 if (features == dev->features)
6381 return;
e830baa9
HW		 6382 dev_warn(&card->gdev->dev,
6383 "Device recovery failed to restore all offload features\n");
e830baa9
HW		 6384}
6385EXPORT_SYMBOL_GPL(qeth_recover_features);
6386
8f43fb00
TR		 6387int qeth_set_features(struct net_device *dev, netdev_features_t features)
6388{
6389 struct qeth_card *card = dev->ml_priv;
6c7cd712 6390 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6391 int rc = 0;
6392
6393 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6394 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6395
6c7cd712 6396 if ((changed & NETIF_F_IP_CSUM)) {
8f43fb00
TR		 6397 rc = qeth_set_ipa_csum(card,
6398 features & NETIF_F_IP_CSUM ? 1 : 0,
6399 IPA_OUTBOUND_CHECKSUM);
6c7cd712
HW		 6400 if (rc)
6401 changed ^= NETIF_F_IP_CSUM;
6402 }
6403 if ((changed & NETIF_F_RXCSUM)) {
6404 rc = qeth_set_ipa_csum(card,
8f43fb00
TR		 6405 features & NETIF_F_RXCSUM ? 1 : 0,
6406 IPA_INBOUND_CHECKSUM);
6c7cd712
HW		 6407 if (rc)
6408 changed ^= NETIF_F_RXCSUM;
6409 }
6410 if ((changed & NETIF_F_TSO)) {
6411 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6412 if (rc)
6413 changed ^= NETIF_F_TSO;
6414 }
6415
6416 /* everything changed successfully? */
6417 if ((dev->features ^ features) == changed)
6418 return 0;
6419 /* something went wrong. save changed features and return error */
6420 dev->features ^= changed;
6421 return -EIO;
8f43fb00
TR		 6422}
6423EXPORT_SYMBOL_GPL(qeth_set_features);
6424
6425netdev_features_t qeth_fix_features(struct net_device *dev,
6426 netdev_features_t features)
6427{
6428 struct qeth_card *card = dev->ml_priv;
6429
6430 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6431 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6432 features &= ~NETIF_F_IP_CSUM;
6433 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6434 features &= ~NETIF_F_RXCSUM;
cf536ffe 6435 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6436 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6437 /* if the card isn't up, remove features that require hw changes */
6438 if (card->state == CARD_STATE_DOWN ||
6439 card->state == CARD_STATE_RECOVER)
ce344356 6440 features &= ~QETH_HW_FEATURES;
8f43fb00
TR		 6441 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6442 return features;
6443}
6444EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6445
6d69b1f1
JW		 6446netdev_features_t qeth_features_check(struct sk_buff *skb,
6447 struct net_device *dev,
6448 netdev_features_t features)
6449{
6450 /* GSO segmentation builds skbs with
6451 * a (small) linear part for the headers, and
6452 * page frags for the data.
6453 * Compared to a linear skb, the header-only part consumes an
6454 * additional buffer element. This reduces buffer utilization, and
6455 * hurts throughput. So compress small segments into one element.
6456 */
6457 if (netif_needs_gso(skb, features)) {
6458 /* match skb_segment(): */
6459 unsigned int doffset = skb->data - skb_mac_header(skb);
6460 unsigned int hsize = skb_shinfo(skb)->gso_size;
6461 unsigned int hroom = skb_headroom(skb);
6462
6463 /* linearize only if resulting skb allocations are order-0: */
6464 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6465 features &= ~NETIF_F_SG;
6466 }
6467
6468 return vlan_features_check(skb, features);
6469}
6470EXPORT_SYMBOL_GPL(qeth_features_check);
6471
4a71df50
FB		 6472static int __init qeth_core_init(void)
6473{
6474 int rc;
6475
74eacdb9 6476 pr_info("loading core functions\n");
4a71df50 6477 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6478 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6479 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6480 mutex_init(&qeth_mod_mutex);
4a71df50 6481
0f54761d
SR		 6482 qeth_wq = create_singlethread_workqueue("qeth_wq");
6483
4a71df50
FB		 6484 rc = qeth_register_dbf_views();
6485 if (rc)
6486 goto out_err;
035da16f 6487 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6488 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6489 if (rc)
6490 goto register_err;
683d718a
FB		 6491 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6492 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6493 if (!qeth_core_header_cache) {
6494 rc = -ENOMEM;
6495 goto slab_err;
6496 }
0da9581d
EL		 6497 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6498 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6499 if (!qeth_qdio_outbuf_cache) {
6500 rc = -ENOMEM;
6501 goto cqslab_err;
6502 }
afb6ac59
SO		 6503 rc = ccw_driver_register(&qeth_ccw_driver);
6504 if (rc)
6505 goto ccw_err;
6506 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6507 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6508 if (rc)
6509 goto ccwgroup_err;
0da9581d 6510
683d718a 6511 return 0;
afb6ac59
SO		 6512
6513ccwgroup_err:
6514 ccw_driver_unregister(&qeth_ccw_driver);
6515ccw_err:
6516 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6517cqslab_err:
6518 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6519slab_err:
035da16f 6520 root_device_unregister(qeth_core_root_dev);
4a71df50 6521register_err:
4a71df50
FB		 6522 qeth_unregister_dbf_views();
6523out_err:
74eacdb9 6524 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6525 return rc;
6526}
6527
6528static void __exit qeth_core_exit(void)
6529{
819dc537 6530 qeth_clear_dbf_list();
0f54761d 6531 destroy_workqueue(qeth_wq);
4a71df50
FB		 6532 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6533 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6534 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6535 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6536 root_device_unregister(qeth_core_root_dev);
4a71df50 6537 qeth_unregister_dbf_views();
74eacdb9 6538 pr_info("core functions removed\n");
4a71df50
FB		 6539}
6540
6541module_init(qeth_core_init);
6542module_exit(qeth_core_exit);
6543MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6544MODULE_DESCRIPTION("qeth core functions");
6545MODULE_LICENSE("GPL");
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