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s390/qeth: apply takeover changes when mode is toggled
[mirror_ubuntu-bionic-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
ab9953ff 1// SPDX-License-Identifier: GPL-2.0
4a71df50 2/*
bbcfcdc8 3 * Copyright IBM Corp. 2007, 2009
4a71df50
FB		 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
5 * Frank Pavlic <fpavlic@de.ibm.com>,
6 * Thomas Spatzier <tspat@de.ibm.com>,
7 * Frank Blaschka <frank.blaschka@de.ibm.com>
8 */
9
74eacdb9
FB		 10#define KMSG_COMPONENT "qeth"
11#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
12
4a71df50
FB		 13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/string.h>
16#include <linux/errno.h>
17#include <linux/kernel.h>
18#include <linux/ip.h>
4a71df50
FB		 19#include <linux/tcp.h>
20#include <linux/mii.h>
21#include <linux/kthread.h>
5a0e3ad6 22#include <linux/slab.h>
6d69b1f1
JW		 23#include <linux/if_vlan.h>
24#include <linux/netdevice.h>
25#include <linux/netdev_features.h>
26#include <linux/skbuff.h>
27
b3332930 28#include <net/iucv/af_iucv.h>
290b8348 29#include <net/dsfield.h>
4a71df50 30
ab4227cb 31#include <asm/ebcdic.h>
2bf29df7 32#include <asm/chpid.h>
ab4227cb 33#include <asm/io.h>
1da74b1c 34#include <asm/sysinfo.h>
c3ab96f3 35#include <asm/compat.h>
ec61bd2f
JW		 36#include <asm/diag.h>
37#include <asm/cio.h>
38#include <asm/ccwdev.h>
4a71df50
FB		 39
40#include "qeth_core.h"
4a71df50 41
d11ba0c4
PT		 42struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
43 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
44 /* N P A M L V H */
45 [QETH_DBF_SETUP] = {"qeth_setup",
46 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
f7e1e65d
SO		 47 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
48 &debug_sprintf_view, NULL},
d11ba0c4
PT		 49 [QETH_DBF_CTRL] = {"qeth_control",
50 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
51};
52EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 53
54struct qeth_card_list_struct qeth_core_card_list;
55EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 56struct kmem_cache *qeth_core_header_cache;
57EXPORT_SYMBOL_GPL(qeth_core_header_cache);
0da9581d 58static struct kmem_cache *qeth_qdio_outbuf_cache;
4a71df50
FB		 59
60static struct device *qeth_core_root_dev;
4a71df50 61static struct lock_class_key qdio_out_skb_queue_key;
2022e00c 62static struct mutex qeth_mod_mutex;
4a71df50
FB		 63
64static void qeth_send_control_data_cb(struct qeth_channel *,
65 struct qeth_cmd_buffer *);
4a71df50
FB		 66static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
67static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
68static void qeth_free_buffer_pool(struct qeth_card *);
69static int qeth_qdio_establish(struct qeth_card *);
0da9581d 70static void qeth_free_qdio_buffers(struct qeth_card *);
b3332930
FB		 71static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
72 struct qeth_qdio_out_buffer *buf,
73 enum iucv_tx_notify notification);
74static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
0da9581d
EL		 75static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
76 struct qeth_qdio_out_buffer *buf,
77 enum qeth_qdio_buffer_states newbufstate);
72861ae7 78static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
4a71df50 79
b4d72c08 80struct workqueue_struct *qeth_wq;
c044dc21 81EXPORT_SYMBOL_GPL(qeth_wq);
0f54761d 82
511c2445
EC		 83int qeth_card_hw_is_reachable(struct qeth_card *card)
84{
85 return (card->state == CARD_STATE_SOFTSETUP) ||
86 (card->state == CARD_STATE_UP);
87}
88EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
89
0f54761d
SR		 90static void qeth_close_dev_handler(struct work_struct *work)
91{
92 struct qeth_card *card;
93
94 card = container_of(work, struct qeth_card, close_dev_work);
95 QETH_CARD_TEXT(card, 2, "cldevhdl");
96 rtnl_lock();
97 dev_close(card->dev);
98 rtnl_unlock();
99 ccwgroup_set_offline(card->gdev);
100}
101
102void qeth_close_dev(struct qeth_card *card)
103{
104 QETH_CARD_TEXT(card, 2, "cldevsubm");
105 queue_work(qeth_wq, &card->close_dev_work);
106}
107EXPORT_SYMBOL_GPL(qeth_close_dev);
108
cef6ff22 109static const char *qeth_get_cardname(struct qeth_card *card)
4a71df50
FB		 110{
111 if (card->info.guestlan) {
112 switch (card->info.type) {
5113fec0 113 case QETH_CARD_TYPE_OSD:
7096b187 114 return " Virtual NIC QDIO";
4a71df50 115 case QETH_CARD_TYPE_IQD:
7096b187 116 return " Virtual NIC Hiper";
5113fec0 117 case QETH_CARD_TYPE_OSM:
7096b187 118 return " Virtual NIC QDIO - OSM";
5113fec0 119 case QETH_CARD_TYPE_OSX:
7096b187 120 return " Virtual NIC QDIO - OSX";
4a71df50
FB		 121 default:
122 return " unknown";
123 }
124 } else {
125 switch (card->info.type) {
5113fec0 126 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 127 return " OSD Express";
128 case QETH_CARD_TYPE_IQD:
129 return " HiperSockets";
130 case QETH_CARD_TYPE_OSN:
131 return " OSN QDIO";
5113fec0
UB		 132 case QETH_CARD_TYPE_OSM:
133 return " OSM QDIO";
134 case QETH_CARD_TYPE_OSX:
135 return " OSX QDIO";
4a71df50
FB		 136 default:
137 return " unknown";
138 }
139 }
140 return " n/a";
141}
142
143/* max length to be returned: 14 */
144const char *qeth_get_cardname_short(struct qeth_card *card)
145{
146 if (card->info.guestlan) {
147 switch (card->info.type) {
5113fec0 148 case QETH_CARD_TYPE_OSD:
7096b187 149 return "Virt.NIC QDIO";
4a71df50 150 case QETH_CARD_TYPE_IQD:
7096b187 151 return "Virt.NIC Hiper";
5113fec0 152 case QETH_CARD_TYPE_OSM:
7096b187 153 return "Virt.NIC OSM";
5113fec0 154 case QETH_CARD_TYPE_OSX:
7096b187 155 return "Virt.NIC OSX";
4a71df50
FB		 156 default:
157 return "unknown";
158 }
159 } else {
160 switch (card->info.type) {
5113fec0 161 case QETH_CARD_TYPE_OSD:
4a71df50
FB		 162 switch (card->info.link_type) {
163 case QETH_LINK_TYPE_FAST_ETH:
164 return "OSD_100";
165 case QETH_LINK_TYPE_HSTR:
166 return "HSTR";
167 case QETH_LINK_TYPE_GBIT_ETH:
168 return "OSD_1000";
169 case QETH_LINK_TYPE_10GBIT_ETH:
170 return "OSD_10GIG";
171 case QETH_LINK_TYPE_LANE_ETH100:
172 return "OSD_FE_LANE";
173 case QETH_LINK_TYPE_LANE_TR:
174 return "OSD_TR_LANE";
175 case QETH_LINK_TYPE_LANE_ETH1000:
176 return "OSD_GbE_LANE";
177 case QETH_LINK_TYPE_LANE:
178 return "OSD_ATM_LANE";
179 default:
180 return "OSD_Express";
181 }
182 case QETH_CARD_TYPE_IQD:
183 return "HiperSockets";
184 case QETH_CARD_TYPE_OSN:
185 return "OSN";
5113fec0
UB		 186 case QETH_CARD_TYPE_OSM:
187 return "OSM_1000";
188 case QETH_CARD_TYPE_OSX:
189 return "OSX_10GIG";
4a71df50
FB		 190 default:
191 return "unknown";
192 }
193 }
194 return "n/a";
195}
196
65d8013c
SR		 197void qeth_set_recovery_task(struct qeth_card *card)
198{
199 card->recovery_task = current;
200}
201EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
202
203void qeth_clear_recovery_task(struct qeth_card *card)
204{
205 card->recovery_task = NULL;
206}
207EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
208
209static bool qeth_is_recovery_task(const struct qeth_card *card)
210{
211 return card->recovery_task == current;
212}
213
4a71df50
FB		 214void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
215 int clear_start_mask)
216{
217 unsigned long flags;
218
219 spin_lock_irqsave(&card->thread_mask_lock, flags);
220 card->thread_allowed_mask = threads;
221 if (clear_start_mask)
222 card->thread_start_mask &= threads;
223 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
224 wake_up(&card->wait_q);
225}
226EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
227
228int qeth_threads_running(struct qeth_card *card, unsigned long threads)
229{
230 unsigned long flags;
231 int rc = 0;
232
233 spin_lock_irqsave(&card->thread_mask_lock, flags);
234 rc = (card->thread_running_mask & threads);
235 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
236 return rc;
237}
238EXPORT_SYMBOL_GPL(qeth_threads_running);
239
240int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
241{
65d8013c
SR		 242 if (qeth_is_recovery_task(card))
243 return 0;
4a71df50
FB		 244 return wait_event_interruptible(card->wait_q,
245 qeth_threads_running(card, threads) == 0);
246}
247EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
248
249void qeth_clear_working_pool_list(struct qeth_card *card)
250{
251 struct qeth_buffer_pool_entry *pool_entry, *tmp;
252
847a50fd 253 QETH_CARD_TEXT(card, 5, "clwrklst");
4a71df50
FB		 254 list_for_each_entry_safe(pool_entry, tmp,
255 &card->qdio.in_buf_pool.entry_list, list){
256 list_del(&pool_entry->list);
257 }
258}
259EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
260
261static int qeth_alloc_buffer_pool(struct qeth_card *card)
262{
263 struct qeth_buffer_pool_entry *pool_entry;
264 void *ptr;
265 int i, j;
266
847a50fd 267 QETH_CARD_TEXT(card, 5, "alocpool");
4a71df50 268 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
b3332930 269 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
4a71df50
FB		 270 if (!pool_entry) {
271 qeth_free_buffer_pool(card);
272 return -ENOMEM;
273 }
274 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 275 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 276 if (!ptr) {
277 while (j > 0)
278 free_page((unsigned long)
279 pool_entry->elements[--j]);
280 kfree(pool_entry);
281 qeth_free_buffer_pool(card);
282 return -ENOMEM;
283 }
284 pool_entry->elements[j] = ptr;
285 }
286 list_add(&pool_entry->init_list,
287 &card->qdio.init_pool.entry_list);
288 }
289 return 0;
290}
291
292int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
293{
847a50fd 294 QETH_CARD_TEXT(card, 2, "realcbp");
4a71df50
FB		 295
296 if ((card->state != CARD_STATE_DOWN) &&
297 (card->state != CARD_STATE_RECOVER))
298 return -EPERM;
299
300 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
301 qeth_clear_working_pool_list(card);
302 qeth_free_buffer_pool(card);
303 card->qdio.in_buf_pool.buf_count = bufcnt;
304 card->qdio.init_pool.buf_count = bufcnt;
305 return qeth_alloc_buffer_pool(card);
306}
76b11f8e 307EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
4a71df50 308
4601ba6c
SO		 309static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
310{
6d284bde
SO		 311 if (!q)
312 return;
313
314 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
4601ba6c
SO		 315 kfree(q);
316}
317
318static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
319{
320 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
321 int i;
322
323 if (!q)
324 return NULL;
325
6d284bde
SO		 326 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
327 kfree(q);
328 return NULL;
329 }
330
4601ba6c 331 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
6d284bde 332 q->bufs[i].buffer = q->qdio_bufs[i];
4601ba6c
SO		 333
334 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
335 return q;
336}
337
cef6ff22 338static int qeth_cq_init(struct qeth_card *card)
0da9581d
EL		 339{
340 int rc;
341
342 if (card->options.cq == QETH_CQ_ENABLED) {
343 QETH_DBF_TEXT(SETUP, 2, "cqinit");
6d284bde
SO		 344 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
345 QDIO_MAX_BUFFERS_PER_Q);
0da9581d
EL		 346 card->qdio.c_q->next_buf_to_init = 127;
347 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
348 card->qdio.no_in_queues - 1, 0,
349 127);
350 if (rc) {
351 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
352 goto out;
353 }
354 }
355 rc = 0;
356out:
357 return rc;
358}
359
cef6ff22 360static int qeth_alloc_cq(struct qeth_card *card)
0da9581d
EL		 361{
362 int rc;
363
364 if (card->options.cq == QETH_CQ_ENABLED) {
365 int i;
366 struct qdio_outbuf_state *outbuf_states;
367
368 QETH_DBF_TEXT(SETUP, 2, "cqon");
4601ba6c 369 card->qdio.c_q = qeth_alloc_qdio_queue();
0da9581d
EL		 370 if (!card->qdio.c_q) {
371 rc = -1;
372 goto kmsg_out;
373 }
0da9581d 374 card->qdio.no_in_queues = 2;
4a912f98 375 card->qdio.out_bufstates =
0da9581d
EL		 376 kzalloc(card->qdio.no_out_queues *
377 QDIO_MAX_BUFFERS_PER_Q *
378 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
379 outbuf_states = card->qdio.out_bufstates;
380 if (outbuf_states == NULL) {
381 rc = -1;
382 goto free_cq_out;
383 }
384 for (i = 0; i < card->qdio.no_out_queues; ++i) {
385 card->qdio.out_qs[i]->bufstates = outbuf_states;
386 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
387 }
388 } else {
389 QETH_DBF_TEXT(SETUP, 2, "nocq");
390 card->qdio.c_q = NULL;
391 card->qdio.no_in_queues = 1;
392 }
393 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
394 rc = 0;
395out:
396 return rc;
397free_cq_out:
4601ba6c 398 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 399 card->qdio.c_q = NULL;
400kmsg_out:
401 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
402 goto out;
403}
404
cef6ff22 405static void qeth_free_cq(struct qeth_card *card)
0da9581d
EL		 406{
407 if (card->qdio.c_q) {
408 --card->qdio.no_in_queues;
4601ba6c 409 qeth_free_qdio_queue(card->qdio.c_q);
0da9581d
EL		 410 card->qdio.c_q = NULL;
411 }
412 kfree(card->qdio.out_bufstates);
413 card->qdio.out_bufstates = NULL;
414}
415
cef6ff22
JW		 416static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
417 int delayed)
418{
b3332930
FB		 419 enum iucv_tx_notify n;
420
421 switch (sbalf15) {
422 case 0:
423 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
424 break;
425 case 4:
426 case 16:
427 case 17:
428 case 18:
429 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
430 TX_NOTIFY_UNREACHABLE;
431 break;
432 default:
433 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
434 TX_NOTIFY_GENERALERROR;
435 break;
436 }
437
438 return n;
439}
440
cef6ff22
JW		 441static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
442 int forced_cleanup)
0da9581d 443{
72861ae7
EL		 444 if (q->card->options.cq != QETH_CQ_ENABLED)
445 return;
446
0da9581d
EL		 447 if (q->bufs[bidx]->next_pending != NULL) {
448 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
449 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
450
451 while (c) {
452 if (forced_cleanup ||
453 atomic_read(&c->state) ==
454 QETH_QDIO_BUF_HANDLED_DELAYED) {
455 struct qeth_qdio_out_buffer *f = c;
456 QETH_CARD_TEXT(f->q->card, 5, "fp");
457 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
b3332930
FB		 458 /* release here to avoid interleaving between
459 outbound tasklet and inbound tasklet
460 regarding notifications and lifecycle */
461 qeth_release_skbs(c);
462
0da9581d 463 c = f->next_pending;
18af5c17 464 WARN_ON_ONCE(head->next_pending != f);
0da9581d
EL		 465 head->next_pending = c;
466 kmem_cache_free(qeth_qdio_outbuf_cache, f);
467 } else {
468 head = c;
469 c = c->next_pending;
470 }
471
472 }
473 }
72861ae7
EL		 474 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
475 QETH_QDIO_BUF_HANDLED_DELAYED)) {
476 /* for recovery situations */
477 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
478 qeth_init_qdio_out_buf(q, bidx);
479 QETH_CARD_TEXT(q->card, 2, "clprecov");
480 }
0da9581d
EL		 481}
482
483
cef6ff22
JW		 484static void qeth_qdio_handle_aob(struct qeth_card *card,
485 unsigned long phys_aob_addr)
486{
0da9581d
EL		 487 struct qaob *aob;
488 struct qeth_qdio_out_buffer *buffer;
b3332930 489 enum iucv_tx_notify notification;
0da9581d
EL		 490
491 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
492 QETH_CARD_TEXT(card, 5, "haob");
493 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
494 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
495 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
496
b3332930
FB		 497 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
498 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
499 notification = TX_NOTIFY_OK;
500 } else {
18af5c17
SR		 501 WARN_ON_ONCE(atomic_read(&buffer->state) !=
502 QETH_QDIO_BUF_PENDING);
b3332930
FB		 503 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
504 notification = TX_NOTIFY_DELAYED_OK;
505 }
506
507 if (aob->aorc != 0) {
508 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
509 notification = qeth_compute_cq_notification(aob->aorc, 1);
510 }
511 qeth_notify_skbs(buffer->q, buffer, notification);
512
0da9581d
EL		 513 buffer->aob = NULL;
514 qeth_clear_output_buffer(buffer->q, buffer,
72861ae7
EL		 515 QETH_QDIO_BUF_HANDLED_DELAYED);
516
0da9581d
EL		 517 /* from here on: do not touch buffer anymore */
518 qdio_release_aob(aob);
519}
520
521static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
522{
523 return card->options.cq == QETH_CQ_ENABLED &&
524 card->qdio.c_q != NULL &&
525 queue != 0 &&
526 queue == card->qdio.no_in_queues - 1;
527}
528
529
4a71df50
FB		 530static int qeth_issue_next_read(struct qeth_card *card)
531{
532 int rc;
533 struct qeth_cmd_buffer *iob;
534
847a50fd 535 QETH_CARD_TEXT(card, 5, "issnxrd");
4a71df50
FB		 536 if (card->read.state != CH_STATE_UP)
537 return -EIO;
538 iob = qeth_get_buffer(&card->read);
539 if (!iob) {
74eacdb9
FB		 540 dev_warn(&card->gdev->dev, "The qeth device driver "
541 "failed to recover an error on the device\n");
542 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
543 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 544 return -ENOMEM;
545 }
546 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
847a50fd 547 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 548 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
549 (addr_t) iob, 0, 0);
550 if (rc) {
74eacdb9
FB		 551 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
552 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50 553 atomic_set(&card->read.irq_pending, 0);
908abbb5 554 card->read_or_write_problem = 1;
4a71df50
FB		 555 qeth_schedule_recovery(card);
556 wake_up(&card->wait_q);
557 }
558 return rc;
559}
560
561static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
562{
563 struct qeth_reply *reply;
564
565 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
566 if (reply) {
567 atomic_set(&reply->refcnt, 1);
568 atomic_set(&reply->received, 0);
569 reply->card = card;
6531084c 570 }
4a71df50
FB		 571 return reply;
572}
573
574static void qeth_get_reply(struct qeth_reply *reply)
575{
576 WARN_ON(atomic_read(&reply->refcnt) <= 0);
577 atomic_inc(&reply->refcnt);
578}
579
580static void qeth_put_reply(struct qeth_reply *reply)
581{
582 WARN_ON(atomic_read(&reply->refcnt) <= 0);
583 if (atomic_dec_and_test(&reply->refcnt))
584 kfree(reply);
585}
586
d11ba0c4 587static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 588 struct qeth_card *card)
589{
4a71df50 590 char *ipa_name;
d11ba0c4 591 int com = cmd->hdr.command;
4a71df50 592 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4 593 if (rc)
70919e23
UB		 594 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
595 "x%X \"%s\"\n",
596 ipa_name, com, dev_name(&card->gdev->dev),
597 QETH_CARD_IFNAME(card), rc,
598 qeth_get_ipa_msg(rc));
d11ba0c4 599 else
70919e23
UB		 600 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
601 ipa_name, com, dev_name(&card->gdev->dev),
602 QETH_CARD_IFNAME(card));
4a71df50
FB		 603}
604
605static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
606 struct qeth_cmd_buffer *iob)
607{
608 struct qeth_ipa_cmd *cmd = NULL;
609
847a50fd 610 QETH_CARD_TEXT(card, 5, "chkipad");
4a71df50
FB		 611 if (IS_IPA(iob->data)) {
612 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
613 if (IS_IPA_REPLY(cmd)) {
76b11f8e
UB		 614 if (cmd->hdr.command != IPA_CMD_SETCCID &&
615 cmd->hdr.command != IPA_CMD_DELCCID &&
616 cmd->hdr.command != IPA_CMD_MODCCID &&
617 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
d11ba0c4
PT		 618 qeth_issue_ipa_msg(cmd,
619 cmd->hdr.return_code, card);
4a71df50
FB		 620 return cmd;
621 } else {
622 switch (cmd->hdr.command) {
623 case IPA_CMD_STOPLAN:
0f54761d
SR		 624 if (cmd->hdr.return_code ==
625 IPA_RC_VEPA_TO_VEB_TRANSITION) {
626 dev_err(&card->gdev->dev,
627 "Interface %s is down because the "
628 "adjacent port is no longer in "
629 "reflective relay mode\n",
630 QETH_CARD_IFNAME(card));
631 qeth_close_dev(card);
632 } else {
633 dev_warn(&card->gdev->dev,
74eacdb9
FB		 634 "The link for interface %s on CHPID"
635 " 0x%X failed\n",
4a71df50
FB		 636 QETH_CARD_IFNAME(card),
637 card->info.chpid);
0f54761d
SR		 638 qeth_issue_ipa_msg(cmd,
639 cmd->hdr.return_code, card);
640 }
4a71df50
FB		 641 card->lan_online = 0;
642 if (card->dev && netif_carrier_ok(card->dev))
643 netif_carrier_off(card->dev);
644 return NULL;
645 case IPA_CMD_STARTLAN:
74eacdb9
FB		 646 dev_info(&card->gdev->dev,
647 "The link for %s on CHPID 0x%X has"
648 " been restored\n",
4a71df50
FB		 649 QETH_CARD_IFNAME(card),
650 card->info.chpid);
651 netif_carrier_on(card->dev);
922dc062 652 card->lan_online = 1;
1da74b1c
FB		 653 if (card->info.hwtrap)
654 card->info.hwtrap = 2;
4a71df50
FB		 655 qeth_schedule_recovery(card);
656 return NULL;
9c23f4da
EC		 657 case IPA_CMD_SETBRIDGEPORT_IQD:
658 case IPA_CMD_SETBRIDGEPORT_OSA:
9f48b9db 659 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
c044dc21
EC		 660 if (card->discipline->control_event_handler
661 (card, cmd))
662 return cmd;
663 else
664 return NULL;
4a71df50
FB		 665 case IPA_CMD_MODCCID:
666 return cmd;
667 case IPA_CMD_REGISTER_LOCAL_ADDR:
847a50fd 668 QETH_CARD_TEXT(card, 3, "irla");
4a71df50
FB		 669 break;
670 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
847a50fd 671 QETH_CARD_TEXT(card, 3, "urla");
4a71df50
FB		 672 break;
673 default:
c4cef07c 674 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 675 "but not a reply!\n");
676 break;
677 }
678 }
679 }
680 return cmd;
681}
682
683void qeth_clear_ipacmd_list(struct qeth_card *card)
684{
685 struct qeth_reply *reply, *r;
686 unsigned long flags;
687
847a50fd 688 QETH_CARD_TEXT(card, 4, "clipalst");
4a71df50
FB		 689
690 spin_lock_irqsave(&card->lock, flags);
691 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
692 qeth_get_reply(reply);
693 reply->rc = -EIO;
694 atomic_inc(&reply->received);
695 list_del_init(&reply->list);
696 wake_up(&reply->wait_q);
697 qeth_put_reply(reply);
698 }
699 spin_unlock_irqrestore(&card->lock, flags);
908abbb5 700 atomic_set(&card->write.irq_pending, 0);
4a71df50
FB		 701}
702EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
703
5113fec0
UB		 704static int qeth_check_idx_response(struct qeth_card *card,
705 unsigned char *buffer)
4a71df50
FB		 706{
707 if (!buffer)
708 return 0;
709
d11ba0c4 710 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 711 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 712 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 713 "with cause code 0x%02x%s\n",
714 buffer[4],
715 ((buffer[4] == 0x22) ?
716 " -- try another portname" : ""));
847a50fd
CO		 717 QETH_CARD_TEXT(card, 2, "ckidxres");
718 QETH_CARD_TEXT(card, 2, " idxterm");
719 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
5113fec0
UB		 720 if (buffer[4] == 0xf6) {
721 dev_err(&card->gdev->dev,
722 "The qeth device is not configured "
723 "for the OSI layer required by z/VM\n");
724 return -EPERM;
725 }
4a71df50
FB		 726 return -EIO;
727 }
728 return 0;
729}
730
bca51650
TR		 731static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
732{
733 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
734 dev_get_drvdata(&cdev->dev))->dev);
735 return card;
736}
737
4a71df50
FB		 738static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
739 __u32 len)
740{
741 struct qeth_card *card;
742
4a71df50 743 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 744 QETH_CARD_TEXT(card, 4, "setupccw");
4a71df50
FB		 745 if (channel == &card->read)
746 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
747 else
748 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
749 channel->ccw.count = len;
750 channel->ccw.cda = (__u32) __pa(iob);
751}
752
753static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
754{
755 __u8 index;
756
847a50fd 757 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
4a71df50
FB		 758 index = channel->io_buf_no;
759 do {
760 if (channel->iob[index].state == BUF_STATE_FREE) {
761 channel->iob[index].state = BUF_STATE_LOCKED;
762 channel->io_buf_no = (channel->io_buf_no + 1) %
763 QETH_CMD_BUFFER_NO;
764 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
765 return channel->iob + index;
766 }
767 index = (index + 1) % QETH_CMD_BUFFER_NO;
768 } while (index != channel->io_buf_no);
769
770 return NULL;
771}
772
773void qeth_release_buffer(struct qeth_channel *channel,
774 struct qeth_cmd_buffer *iob)
775{
776 unsigned long flags;
777
847a50fd 778 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
4a71df50
FB		 779 spin_lock_irqsave(&channel->iob_lock, flags);
780 memset(iob->data, 0, QETH_BUFSIZE);
781 iob->state = BUF_STATE_FREE;
782 iob->callback = qeth_send_control_data_cb;
783 iob->rc = 0;
784 spin_unlock_irqrestore(&channel->iob_lock, flags);
039055b9 785 wake_up(&channel->wait_q);
4a71df50
FB		 786}
787EXPORT_SYMBOL_GPL(qeth_release_buffer);
788
789static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
790{
791 struct qeth_cmd_buffer *buffer = NULL;
792 unsigned long flags;
793
794 spin_lock_irqsave(&channel->iob_lock, flags);
795 buffer = __qeth_get_buffer(channel);
796 spin_unlock_irqrestore(&channel->iob_lock, flags);
797 return buffer;
798}
799
800struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
801{
802 struct qeth_cmd_buffer *buffer;
803 wait_event(channel->wait_q,
804 ((buffer = qeth_get_buffer(channel)) != NULL));
805 return buffer;
806}
807EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
808
809void qeth_clear_cmd_buffers(struct qeth_channel *channel)
810{
811 int cnt;
812
813 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
814 qeth_release_buffer(channel, &channel->iob[cnt]);
815 channel->buf_no = 0;
816 channel->io_buf_no = 0;
817}
818EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
819
820static void qeth_send_control_data_cb(struct qeth_channel *channel,
821 struct qeth_cmd_buffer *iob)
822{
823 struct qeth_card *card;
824 struct qeth_reply *reply, *r;
825 struct qeth_ipa_cmd *cmd;
826 unsigned long flags;
827 int keep_reply;
5113fec0 828 int rc = 0;
4a71df50 829
4a71df50 830 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 831 QETH_CARD_TEXT(card, 4, "sndctlcb");
5113fec0
UB		 832 rc = qeth_check_idx_response(card, iob->data);
833 switch (rc) {
834 case 0:
835 break;
836 case -EIO:
4a71df50 837 qeth_clear_ipacmd_list(card);
5113fec0 838 qeth_schedule_recovery(card);
01fc3e86 839 /* fall through */
5113fec0 840 default:
4a71df50
FB		 841 goto out;
842 }
843
844 cmd = qeth_check_ipa_data(card, iob);
845 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
846 goto out;
847 /*in case of OSN : check if cmd is set */
848 if (card->info.type == QETH_CARD_TYPE_OSN &&
849 cmd &&
850 cmd->hdr.command != IPA_CMD_STARTLAN &&
851 card->osn_info.assist_cb != NULL) {
852 card->osn_info.assist_cb(card->dev, cmd);
853 goto out;
854 }
855
856 spin_lock_irqsave(&card->lock, flags);
857 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
858 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
859 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
860 qeth_get_reply(reply);
861 list_del_init(&reply->list);
862 spin_unlock_irqrestore(&card->lock, flags);
863 keep_reply = 0;
864 if (reply->callback != NULL) {
865 if (cmd) {
866 reply->offset = (__u16)((char *)cmd -
867 (char *)iob->data);
868 keep_reply = reply->callback(card,
869 reply,
870 (unsigned long)cmd);
871 } else
872 keep_reply = reply->callback(card,
873 reply,
874 (unsigned long)iob);
875 }
876 if (cmd)
877 reply->rc = (u16) cmd->hdr.return_code;
878 else if (iob->rc)
879 reply->rc = iob->rc;
880 if (keep_reply) {
881 spin_lock_irqsave(&card->lock, flags);
882 list_add_tail(&reply->list,
883 &card->cmd_waiter_list);
884 spin_unlock_irqrestore(&card->lock, flags);
885 } else {
886 atomic_inc(&reply->received);
887 wake_up(&reply->wait_q);
888 }
889 qeth_put_reply(reply);
890 goto out;
891 }
892 }
893 spin_unlock_irqrestore(&card->lock, flags);
894out:
895 memcpy(&card->seqno.pdu_hdr_ack,
896 QETH_PDU_HEADER_SEQ_NO(iob->data),
897 QETH_SEQ_NO_LENGTH);
898 qeth_release_buffer(channel, iob);
899}
900
901static int qeth_setup_channel(struct qeth_channel *channel)
902{
903 int cnt;
904
d11ba0c4 905 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50 906 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
ae57b20a 907 channel->iob[cnt].data =
b3332930 908 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
4a71df50
FB		 909 if (channel->iob[cnt].data == NULL)
910 break;
911 channel->iob[cnt].state = BUF_STATE_FREE;
912 channel->iob[cnt].channel = channel;
913 channel->iob[cnt].callback = qeth_send_control_data_cb;
914 channel->iob[cnt].rc = 0;
915 }
916 if (cnt < QETH_CMD_BUFFER_NO) {
917 while (cnt-- > 0)
918 kfree(channel->iob[cnt].data);
919 return -ENOMEM;
920 }
921 channel->buf_no = 0;
922 channel->io_buf_no = 0;
923 atomic_set(&channel->irq_pending, 0);
924 spin_lock_init(&channel->iob_lock);
925
926 init_waitqueue_head(&channel->wait_q);
927 return 0;
928}
929
930static int qeth_set_thread_start_bit(struct qeth_card *card,
931 unsigned long thread)
932{
933 unsigned long flags;
934
935 spin_lock_irqsave(&card->thread_mask_lock, flags);
936 if (!(card->thread_allowed_mask & thread) ||
937 (card->thread_start_mask & thread)) {
938 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
939 return -EPERM;
940 }
941 card->thread_start_mask |= thread;
942 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
943 return 0;
944}
945
946void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
947{
948 unsigned long flags;
949
950 spin_lock_irqsave(&card->thread_mask_lock, flags);
951 card->thread_start_mask &= ~thread;
952 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
953 wake_up(&card->wait_q);
954}
955EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
956
957void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
958{
959 unsigned long flags;
960
961 spin_lock_irqsave(&card->thread_mask_lock, flags);
962 card->thread_running_mask &= ~thread;
963 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
964 wake_up(&card->wait_q);
965}
966EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
967
968static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
969{
970 unsigned long flags;
971 int rc = 0;
972
973 spin_lock_irqsave(&card->thread_mask_lock, flags);
974 if (card->thread_start_mask & thread) {
975 if ((card->thread_allowed_mask & thread) &&
976 !(card->thread_running_mask & thread)) {
977 rc = 1;
978 card->thread_start_mask &= ~thread;
979 card->thread_running_mask |= thread;
980 } else
981 rc = -EPERM;
982 }
983 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
984 return rc;
985}
986
987int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
988{
989 int rc = 0;
990
991 wait_event(card->wait_q,
992 (rc = __qeth_do_run_thread(card, thread)) >= 0);
993 return rc;
994}
995EXPORT_SYMBOL_GPL(qeth_do_run_thread);
996
997void qeth_schedule_recovery(struct qeth_card *card)
998{
847a50fd 999 QETH_CARD_TEXT(card, 2, "startrec");
4a71df50
FB		 1000 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
1001 schedule_work(&card->kernel_thread_starter);
1002}
1003EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
1004
1005static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
1006{
1007 int dstat, cstat;
1008 char *sense;
847a50fd 1009 struct qeth_card *card;
4a71df50
FB		 1010
1011 sense = (char *) irb->ecw;
23d805b6
PO		 1012 cstat = irb->scsw.cmd.cstat;
1013 dstat = irb->scsw.cmd.dstat;
847a50fd 1014 card = CARD_FROM_CDEV(cdev);
4a71df50
FB		 1015
1016 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1017 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1018 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
847a50fd 1019 QETH_CARD_TEXT(card, 2, "CGENCHK");
74eacdb9
FB		 1020 dev_warn(&cdev->dev, "The qeth device driver "
1021 "failed to recover an error on the device\n");
5113fec0 1022 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
74eacdb9 1023 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 1024 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1025 16, 1, irb, 64, 1);
1026 return 1;
1027 }
1028
1029 if (dstat & DEV_STAT_UNIT_CHECK) {
1030 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1031 SENSE_RESETTING_EVENT_FLAG) {
847a50fd 1032 QETH_CARD_TEXT(card, 2, "REVIND");
4a71df50
FB		 1033 return 1;
1034 }
1035 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1036 SENSE_COMMAND_REJECT_FLAG) {
847a50fd 1037 QETH_CARD_TEXT(card, 2, "CMDREJi");
28a7e4c9 1038 return 1;
4a71df50
FB		 1039 }
1040 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
847a50fd 1041 QETH_CARD_TEXT(card, 2, "AFFE");
4a71df50
FB		 1042 return 1;
1043 }
1044 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
847a50fd 1045 QETH_CARD_TEXT(card, 2, "ZEROSEN");
4a71df50
FB		 1046 return 0;
1047 }
847a50fd 1048 QETH_CARD_TEXT(card, 2, "DGENCHK");
4a71df50
FB		 1049 return 1;
1050 }
1051 return 0;
1052}
1053
1054static long __qeth_check_irb_error(struct ccw_device *cdev,
1055 unsigned long intparm, struct irb *irb)
1056{
847a50fd
CO		 1057 struct qeth_card *card;
1058
1059 card = CARD_FROM_CDEV(cdev);
1060
e95051ff 1061 if (!card || !IS_ERR(irb))
4a71df50
FB		 1062 return 0;
1063
1064 switch (PTR_ERR(irb)) {
1065 case -EIO:
74eacdb9
FB		 1066 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1067 dev_name(&cdev->dev));
847a50fd
CO		 1068 QETH_CARD_TEXT(card, 2, "ckirberr");
1069 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
4a71df50
FB		 1070 break;
1071 case -ETIMEDOUT:
74eacdb9
FB		 1072 dev_warn(&cdev->dev, "A hardware operation timed out"
1073 " on the device\n");
847a50fd
CO		 1074 QETH_CARD_TEXT(card, 2, "ckirberr");
1075 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
4a71df50 1076 if (intparm == QETH_RCD_PARM) {
e95051ff 1077 if (card->data.ccwdev == cdev) {
4a71df50
FB		 1078 card->data.state = CH_STATE_DOWN;
1079 wake_up(&card->wait_q);
1080 }
1081 }
1082 break;
1083 default:
74eacdb9
FB		 1084 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1085 dev_name(&cdev->dev), PTR_ERR(irb));
847a50fd
CO		 1086 QETH_CARD_TEXT(card, 2, "ckirberr");
1087 QETH_CARD_TEXT(card, 2, " rc???");
4a71df50
FB		 1088 }
1089 return PTR_ERR(irb);
1090}
1091
1092static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1093 struct irb *irb)
1094{
1095 int rc;
1096 int cstat, dstat;
1097 struct qeth_cmd_buffer *buffer;
1098 struct qeth_channel *channel;
1099 struct qeth_card *card;
1100 struct qeth_cmd_buffer *iob;
1101 __u8 index;
1102
4a71df50
FB		 1103 if (__qeth_check_irb_error(cdev, intparm, irb))
1104 return;
23d805b6
PO		 1105 cstat = irb->scsw.cmd.cstat;
1106 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 1107
1108 card = CARD_FROM_CDEV(cdev);
1109 if (!card)
1110 return;
1111
847a50fd
CO		 1112 QETH_CARD_TEXT(card, 5, "irq");
1113
4a71df50
FB		 1114 if (card->read.ccwdev == cdev) {
1115 channel = &card->read;
847a50fd 1116 QETH_CARD_TEXT(card, 5, "read");
4a71df50
FB		 1117 } else if (card->write.ccwdev == cdev) {
1118 channel = &card->write;
847a50fd 1119 QETH_CARD_TEXT(card, 5, "write");
4a71df50
FB		 1120 } else {
1121 channel = &card->data;
847a50fd 1122 QETH_CARD_TEXT(card, 5, "data");
4a71df50
FB		 1123 }
1124 atomic_set(&channel->irq_pending, 0);
1125
23d805b6 1126 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 1127 channel->state = CH_STATE_STOPPED;
1128
23d805b6 1129 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 1130 channel->state = CH_STATE_HALTED;
1131
1132 /*let's wake up immediately on data channel*/
1133 if ((channel == &card->data) && (intparm != 0) &&
1134 (intparm != QETH_RCD_PARM))
1135 goto out;
1136
1137 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
847a50fd 1138 QETH_CARD_TEXT(card, 6, "clrchpar");
4a71df50
FB		 1139 /* we don't have to handle this further */
1140 intparm = 0;
1141 }
1142 if (intparm == QETH_HALT_CHANNEL_PARM) {
847a50fd 1143 QETH_CARD_TEXT(card, 6, "hltchpar");
4a71df50
FB		 1144 /* we don't have to handle this further */
1145 intparm = 0;
1146 }
1147 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1148 (dstat & DEV_STAT_UNIT_CHECK) ||
1149 (cstat)) {
1150 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 1151 dev_warn(&channel->ccwdev->dev,
1152 "The qeth device driver failed to recover "
1153 "an error on the device\n");
1154 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1155 "0x%X dstat 0x%X\n",
1156 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 1157 print_hex_dump(KERN_WARNING, "qeth: irb ",
1158 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1159 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1160 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1161 }
1162 if (intparm == QETH_RCD_PARM) {
1163 channel->state = CH_STATE_DOWN;
1164 goto out;
1165 }
1166 rc = qeth_get_problem(cdev, irb);
1167 if (rc) {
28a7e4c9 1168 qeth_clear_ipacmd_list(card);
4a71df50
FB		 1169 qeth_schedule_recovery(card);
1170 goto out;
1171 }
1172 }
1173
1174 if (intparm == QETH_RCD_PARM) {
1175 channel->state = CH_STATE_RCD_DONE;
1176 goto out;
1177 }
1178 if (intparm) {
1179 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1180 buffer->state = BUF_STATE_PROCESSED;
1181 }
1182 if (channel == &card->data)
1183 return;
1184 if (channel == &card->read &&
1185 channel->state == CH_STATE_UP)
1186 qeth_issue_next_read(card);
1187
1188 iob = channel->iob;
1189 index = channel->buf_no;
1190 while (iob[index].state == BUF_STATE_PROCESSED) {
1191 if (iob[index].callback != NULL)
1192 iob[index].callback(channel, iob + index);
1193
1194 index = (index + 1) % QETH_CMD_BUFFER_NO;
1195 }
1196 channel->buf_no = index;
1197out:
1198 wake_up(&card->wait_q);
1199 return;
1200}
1201
b3332930 1202static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
0da9581d 1203 struct qeth_qdio_out_buffer *buf,
b3332930 1204 enum iucv_tx_notify notification)
4a71df50 1205{
4a71df50
FB		 1206 struct sk_buff *skb;
1207
b3332930
FB		 1208 if (skb_queue_empty(&buf->skb_list))
1209 goto out;
1210 skb = skb_peek(&buf->skb_list);
1211 while (skb) {
1212 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1213 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
6bee4e26 1214 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
b3332930
FB		 1215 if (skb->sk) {
1216 struct iucv_sock *iucv = iucv_sk(skb->sk);
1217 iucv->sk_txnotify(skb, notification);
1218 }
1219 }
1220 if (skb_queue_is_last(&buf->skb_list, skb))
1221 skb = NULL;
1222 else
1223 skb = skb_queue_next(&buf->skb_list, skb);
1224 }
1225out:
1226 return;
1227}
1228
1229static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1230{
1231 struct sk_buff *skb;
72861ae7
EL		 1232 struct iucv_sock *iucv;
1233 int notify_general_error = 0;
1234
1235 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1236 notify_general_error = 1;
1237
1238 /* release may never happen from within CQ tasklet scope */
18af5c17 1239 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
4a71df50 1240
b67d801f
UB		 1241 skb = skb_dequeue(&buf->skb_list);
1242 while (skb) {
b3332930
FB		 1243 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1244 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
6bee4e26
HW		 1245 if (notify_general_error &&
1246 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
72861ae7
EL		 1247 if (skb->sk) {
1248 iucv = iucv_sk(skb->sk);
1249 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1250 }
1251 }
63354797 1252 refcount_dec(&skb->users);
b67d801f 1253 dev_kfree_skb_any(skb);
4a71df50
FB		 1254 skb = skb_dequeue(&buf->skb_list);
1255 }
b3332930
FB		 1256}
1257
1258static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1259 struct qeth_qdio_out_buffer *buf,
1260 enum qeth_qdio_buffer_states newbufstate)
1261{
1262 int i;
1263
1264 /* is PCI flag set on buffer? */
1265 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1266 atomic_dec(&queue->set_pci_flags_count);
1267
1268 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1269 qeth_release_skbs(buf);
1270 }
4a71df50 1271 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 1272 if (buf->buffer->element[i].addr && buf->is_header[i])
1273 kmem_cache_free(qeth_core_header_cache,
1274 buf->buffer->element[i].addr);
1275 buf->is_header[i] = 0;
4a71df50
FB		 1276 buf->buffer->element[i].length = 0;
1277 buf->buffer->element[i].addr = NULL;
3ec90878
JG		 1278 buf->buffer->element[i].eflags = 0;
1279 buf->buffer->element[i].sflags = 0;
4a71df50 1280 }
3ec90878
JG		 1281 buf->buffer->element[15].eflags = 0;
1282 buf->buffer->element[15].sflags = 0;
4a71df50 1283 buf->next_element_to_fill = 0;
0da9581d
EL		 1284 atomic_set(&buf->state, newbufstate);
1285}
1286
1287static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1288{
1289 int j;
1290
1291 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1292 if (!q->bufs[j])
1293 continue;
72861ae7 1294 qeth_cleanup_handled_pending(q, j, 1);
0da9581d
EL		 1295 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1296 if (free) {
1297 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1298 q->bufs[j] = NULL;
1299 }
1300 }
4a71df50
FB		 1301}
1302
1303void qeth_clear_qdio_buffers(struct qeth_card *card)
1304{
0da9581d 1305 int i;
4a71df50 1306
847a50fd 1307 QETH_CARD_TEXT(card, 2, "clearqdbf");
4a71df50 1308 /* clear outbound buffers to free skbs */
0da9581d 1309 for (i = 0; i < card->qdio.no_out_queues; ++i) {
4a71df50 1310 if (card->qdio.out_qs[i]) {
0da9581d 1311 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
4a71df50 1312 }
0da9581d 1313 }
4a71df50
FB		 1314}
1315EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1316
1317static void qeth_free_buffer_pool(struct qeth_card *card)
1318{
1319 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1320 int i = 0;
4a71df50
FB		 1321 list_for_each_entry_safe(pool_entry, tmp,
1322 &card->qdio.init_pool.entry_list, init_list){
1323 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1324 free_page((unsigned long)pool_entry->elements[i]);
1325 list_del(&pool_entry->init_list);
1326 kfree(pool_entry);
1327 }
1328}
1329
4a71df50
FB		 1330static void qeth_clean_channel(struct qeth_channel *channel)
1331{
1332 int cnt;
1333
d11ba0c4 1334 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1335 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1336 kfree(channel->iob[cnt].data);
1337}
1338
725b9c04
SO		 1339static void qeth_set_single_write_queues(struct qeth_card *card)
1340{
1341 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1342 (card->qdio.no_out_queues == 4))
1343 qeth_free_qdio_buffers(card);
1344
1345 card->qdio.no_out_queues = 1;
1346 if (card->qdio.default_out_queue != 0)
1347 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1348
1349 card->qdio.default_out_queue = 0;
1350}
1351
1352static void qeth_set_multiple_write_queues(struct qeth_card *card)
1353{
1354 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1355 (card->qdio.no_out_queues == 1)) {
1356 qeth_free_qdio_buffers(card);
1357 card->qdio.default_out_queue = 2;
1358 }
1359 card->qdio.no_out_queues = 4;
1360}
1361
1362static void qeth_update_from_chp_desc(struct qeth_card *card)
4a71df50 1363{
4a71df50 1364 struct ccw_device *ccwdev;
2bf29df7 1365 struct channel_path_desc *chp_dsc;
4a71df50 1366
5113fec0 1367 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
4a71df50
FB		 1368
1369 ccwdev = card->data.ccwdev;
725b9c04
SO		 1370 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1371 if (!chp_dsc)
1372 goto out;
1373
1374 card->info.func_level = 0x4100 + chp_dsc->desc;
1375 if (card->info.type == QETH_CARD_TYPE_IQD)
1376 goto out;
1377
1378 /* CHPP field bit 6 == 1 -> single queue */
1379 if ((chp_dsc->chpp & 0x02) == 0x02)
1380 qeth_set_single_write_queues(card);
1381 else
1382 qeth_set_multiple_write_queues(card);
1383out:
1384 kfree(chp_dsc);
5113fec0
UB		 1385 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1386 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
4a71df50
FB		 1387}
1388
1389static void qeth_init_qdio_info(struct qeth_card *card)
1390{
d11ba0c4 1391 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1392 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1393 /* inbound */
ed2e93ef 1394 card->qdio.no_in_queues = 1;
4a71df50 1395 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
dcf4ae2d
FB		 1396 if (card->info.type == QETH_CARD_TYPE_IQD)
1397 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1398 else
1399 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
4a71df50
FB		 1400 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1401 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1402 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1403}
1404
1405static void qeth_set_intial_options(struct qeth_card *card)
1406{
1407 card->options.route4.type = NO_ROUTER;
1408 card->options.route6.type = NO_ROUTER;
4a71df50 1409 card->options.fake_broadcast = 0;
4a71df50
FB		 1410 card->options.performance_stats = 0;
1411 card->options.rx_sg_cb = QETH_RX_SG_CB;
d64ecc22 1412 card->options.isolation = ISOLATION_MODE_NONE;
0da9581d 1413 card->options.cq = QETH_CQ_DISABLED;
4a71df50
FB		 1414}
1415
1416static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1417{
1418 unsigned long flags;
1419 int rc = 0;
1420
1421 spin_lock_irqsave(&card->thread_mask_lock, flags);
847a50fd 1422 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
4a71df50
FB		 1423 (u8) card->thread_start_mask,
1424 (u8) card->thread_allowed_mask,
1425 (u8) card->thread_running_mask);
1426 rc = (card->thread_start_mask & thread);
1427 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1428 return rc;
1429}
1430
1431static void qeth_start_kernel_thread(struct work_struct *work)
1432{
3f36b890 1433 struct task_struct *ts;
4a71df50
FB		 1434 struct qeth_card *card = container_of(work, struct qeth_card,
1435 kernel_thread_starter);
847a50fd 1436 QETH_CARD_TEXT(card , 2, "strthrd");
4a71df50
FB		 1437
1438 if (card->read.state != CH_STATE_UP &&
1439 card->write.state != CH_STATE_UP)
1440 return;
3f36b890 1441 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
c041f2d4 1442 ts = kthread_run(card->discipline->recover, (void *)card,
4a71df50 1443 "qeth_recover");
3f36b890
FB		 1444 if (IS_ERR(ts)) {
1445 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1446 qeth_clear_thread_running_bit(card,
1447 QETH_RECOVER_THREAD);
1448 }
1449 }
4a71df50
FB		 1450}
1451
bca51650 1452static void qeth_buffer_reclaim_work(struct work_struct *);
4a71df50
FB		 1453static int qeth_setup_card(struct qeth_card *card)
1454{
1455
d11ba0c4
PT		 1456 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1457 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1458
1459 card->read.state = CH_STATE_DOWN;
1460 card->write.state = CH_STATE_DOWN;
1461 card->data.state = CH_STATE_DOWN;
1462 card->state = CARD_STATE_DOWN;
1463 card->lan_online = 0;
908abbb5 1464 card->read_or_write_problem = 0;
4a71df50
FB		 1465 card->dev = NULL;
1466 spin_lock_init(&card->vlanlock);
1467 spin_lock_init(&card->mclock);
4a71df50
FB		 1468 spin_lock_init(&card->lock);
1469 spin_lock_init(&card->ip_lock);
1470 spin_lock_init(&card->thread_mask_lock);
c4949f07 1471 mutex_init(&card->conf_mutex);
9dc48ccc 1472 mutex_init(&card->discipline_mutex);
4a71df50
FB		 1473 card->thread_start_mask = 0;
1474 card->thread_allowed_mask = 0;
1475 card->thread_running_mask = 0;
1476 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
4a71df50
FB		 1477 INIT_LIST_HEAD(&card->cmd_waiter_list);
1478 init_waitqueue_head(&card->wait_q);
25985edc 1479 /* initial options */
4a71df50
FB		 1480 qeth_set_intial_options(card);
1481 /* IP address takeover */
1482 INIT_LIST_HEAD(&card->ipato.entries);
7fbd9493 1483 card->ipato.enabled = false;
4a71df50
FB		 1484 card->ipato.invert4 = 0;
1485 card->ipato.invert6 = 0;
1486 /* init QDIO stuff */
1487 qeth_init_qdio_info(card);
b3332930 1488 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
0f54761d 1489 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
4a71df50
FB		 1490 return 0;
1491}
1492
6bcac508
MS		 1493static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1494{
1495 struct qeth_card *card = container_of(slr, struct qeth_card,
1496 qeth_service_level);
0d788c7d
KDW		 1497 if (card->info.mcl_level[0])
1498 seq_printf(m, "qeth: %s firmware level %s\n",
1499 CARD_BUS_ID(card), card->info.mcl_level);
6bcac508
MS		 1500}
1501
4a71df50
FB		 1502static struct qeth_card *qeth_alloc_card(void)
1503{
1504 struct qeth_card *card;
1505
d11ba0c4 1506 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1507 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1508 if (!card)
76b11f8e 1509 goto out;
d11ba0c4 1510 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
76b11f8e
UB		 1511 if (qeth_setup_channel(&card->read))
1512 goto out_ip;
1513 if (qeth_setup_channel(&card->write))
1514 goto out_channel;
4a71df50 1515 card->options.layer2 = -1;
6bcac508
MS		 1516 card->qeth_service_level.seq_print = qeth_core_sl_print;
1517 register_service_level(&card->qeth_service_level);
4a71df50 1518 return card;
76b11f8e
UB		 1519
1520out_channel:
1521 qeth_clean_channel(&card->read);
1522out_ip:
76b11f8e
UB		 1523 kfree(card);
1524out:
1525 return NULL;
4a71df50
FB		 1526}
1527
ed2e93ef 1528static void qeth_determine_card_type(struct qeth_card *card)
4a71df50 1529{
d11ba0c4 1530 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1531
1532 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1533 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
ed2e93ef
JW		 1534 card->info.type = CARD_RDEV(card)->id.driver_info;
1535 card->qdio.no_out_queues = QETH_MAX_QUEUES;
1536 if (card->info.type == QETH_CARD_TYPE_IQD)
1537 card->info.is_multicast_different = 0x0103;
1538 qeth_update_from_chp_desc(card);
4a71df50
FB		 1539}
1540
1541static int qeth_clear_channel(struct qeth_channel *channel)
1542{
1543 unsigned long flags;
1544 struct qeth_card *card;
1545 int rc;
1546
4a71df50 1547 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1548 QETH_CARD_TEXT(card, 3, "clearch");
4a71df50
FB		 1549 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1550 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1551 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1552
1553 if (rc)
1554 return rc;
1555 rc = wait_event_interruptible_timeout(card->wait_q,
1556 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1557 if (rc == -ERESTARTSYS)
1558 return rc;
1559 if (channel->state != CH_STATE_STOPPED)
1560 return -ETIME;
1561 channel->state = CH_STATE_DOWN;
1562 return 0;
1563}
1564
1565static int qeth_halt_channel(struct qeth_channel *channel)
1566{
1567 unsigned long flags;
1568 struct qeth_card *card;
1569 int rc;
1570
4a71df50 1571 card = CARD_FROM_CDEV(channel->ccwdev);
847a50fd 1572 QETH_CARD_TEXT(card, 3, "haltch");
4a71df50
FB		 1573 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1574 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1575 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1576
1577 if (rc)
1578 return rc;
1579 rc = wait_event_interruptible_timeout(card->wait_q,
1580 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1581 if (rc == -ERESTARTSYS)
1582 return rc;
1583 if (channel->state != CH_STATE_HALTED)
1584 return -ETIME;
1585 return 0;
1586}
1587
1588static int qeth_halt_channels(struct qeth_card *card)
1589{
1590 int rc1 = 0, rc2 = 0, rc3 = 0;
1591
847a50fd 1592 QETH_CARD_TEXT(card, 3, "haltchs");
4a71df50
FB		 1593 rc1 = qeth_halt_channel(&card->read);
1594 rc2 = qeth_halt_channel(&card->write);
1595 rc3 = qeth_halt_channel(&card->data);
1596 if (rc1)
1597 return rc1;
1598 if (rc2)
1599 return rc2;
1600 return rc3;
1601}
1602
1603static int qeth_clear_channels(struct qeth_card *card)
1604{
1605 int rc1 = 0, rc2 = 0, rc3 = 0;
1606
847a50fd 1607 QETH_CARD_TEXT(card, 3, "clearchs");
4a71df50
FB		 1608 rc1 = qeth_clear_channel(&card->read);
1609 rc2 = qeth_clear_channel(&card->write);
1610 rc3 = qeth_clear_channel(&card->data);
1611 if (rc1)
1612 return rc1;
1613 if (rc2)
1614 return rc2;
1615 return rc3;
1616}
1617
1618static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1619{
1620 int rc = 0;
1621
847a50fd 1622 QETH_CARD_TEXT(card, 3, "clhacrd");
4a71df50
FB		 1623
1624 if (halt)
1625 rc = qeth_halt_channels(card);
1626 if (rc)
1627 return rc;
1628 return qeth_clear_channels(card);
1629}
1630
1631int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1632{
1633 int rc = 0;
1634
847a50fd 1635 QETH_CARD_TEXT(card, 3, "qdioclr");
4a71df50
FB		 1636 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1637 QETH_QDIO_CLEANING)) {
1638 case QETH_QDIO_ESTABLISHED:
1639 if (card->info.type == QETH_CARD_TYPE_IQD)
cc961d40 1640 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1641 QDIO_FLAG_CLEANUP_USING_HALT);
1642 else
cc961d40 1643 rc = qdio_shutdown(CARD_DDEV(card),
4a71df50
FB		 1644 QDIO_FLAG_CLEANUP_USING_CLEAR);
1645 if (rc)
847a50fd 1646 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
4a71df50
FB		 1647 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1648 break;
1649 case QETH_QDIO_CLEANING:
1650 return rc;
1651 default:
1652 break;
1653 }
1654 rc = qeth_clear_halt_card(card, use_halt);
1655 if (rc)
847a50fd 1656 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
4a71df50
FB		 1657 card->state = CARD_STATE_DOWN;
1658 return rc;
1659}
1660EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1661
1662static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1663 int *length)
1664{
1665 struct ciw *ciw;
1666 char *rcd_buf;
1667 int ret;
1668 struct qeth_channel *channel = &card->data;
1669 unsigned long flags;
1670
1671 /*
1672 * scan for RCD command in extended SenseID data
1673 */
1674 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1675 if (!ciw || ciw->cmd == 0)
1676 return -EOPNOTSUPP;
1677 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1678 if (!rcd_buf)
1679 return -ENOMEM;
1680
1681 channel->ccw.cmd_code = ciw->cmd;
1682 channel->ccw.cda = (__u32) __pa(rcd_buf);
1683 channel->ccw.count = ciw->count;
1684 channel->ccw.flags = CCW_FLAG_SLI;
1685 channel->state = CH_STATE_RCD;
1686 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1687 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1688 QETH_RCD_PARM, LPM_ANYPATH, 0,
1689 QETH_RCD_TIMEOUT);
1690 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1691 if (!ret)
1692 wait_event(card->wait_q,
1693 (channel->state == CH_STATE_RCD_DONE ||
1694 channel->state == CH_STATE_DOWN));
1695 if (channel->state == CH_STATE_DOWN)
1696 ret = -EIO;
1697 else
1698 channel->state = CH_STATE_DOWN;
1699 if (ret) {
1700 kfree(rcd_buf);
1701 *buffer = NULL;
1702 *length = 0;
1703 } else {
1704 *length = ciw->count;
1705 *buffer = rcd_buf;
1706 }
1707 return ret;
1708}
1709
a60389ab 1710static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
4a71df50 1711{
a60389ab 1712 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
4a71df50
FB		 1713 card->info.chpid = prcd[30];
1714 card->info.unit_addr2 = prcd[31];
1715 card->info.cula = prcd[63];
1716 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1717 (prcd[0x11] == _ascebc['M']));
a60389ab
EL		 1718}
1719
c70eb09d
JW		 1720/* Determine whether the device requires a specific layer discipline */
1721static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
1722{
1723 if (card->info.type == QETH_CARD_TYPE_OSM ||
1724 card->info.type == QETH_CARD_TYPE_OSN) {
1725 QETH_DBF_TEXT(SETUP, 3, "force l2");
1726 return QETH_DISCIPLINE_LAYER2;
1727 }
1728
1729 /* virtual HiperSocket is L3 only: */
1730 if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) {
1731 QETH_DBF_TEXT(SETUP, 3, "force l3");
1732 return QETH_DISCIPLINE_LAYER3;
1733 }
1734
1735 QETH_DBF_TEXT(SETUP, 3, "force no");
1736 return QETH_DISCIPLINE_UNDETERMINED;
1737}
1738
a60389ab
EL		 1739static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1740{
1741 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1742
e6e056ba 1743 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
a0c98523 1744 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
a60389ab
EL		 1745 card->info.blkt.time_total = 0;
1746 card->info.blkt.inter_packet = 0;
1747 card->info.blkt.inter_packet_jumbo = 0;
a0c98523
UB		 1748 } else {
1749 card->info.blkt.time_total = 250;
1750 card->info.blkt.inter_packet = 5;
1751 card->info.blkt.inter_packet_jumbo = 15;
a60389ab 1752 }
4a71df50
FB		 1753}
1754
1755static void qeth_init_tokens(struct qeth_card *card)
1756{
1757 card->token.issuer_rm_w = 0x00010103UL;
1758 card->token.cm_filter_w = 0x00010108UL;
1759 card->token.cm_connection_w = 0x0001010aUL;
1760 card->token.ulp_filter_w = 0x0001010bUL;
1761 card->token.ulp_connection_w = 0x0001010dUL;
1762}
1763
1764static void qeth_init_func_level(struct qeth_card *card)
1765{
5113fec0
UB		 1766 switch (card->info.type) {
1767 case QETH_CARD_TYPE_IQD:
6298263a 1768 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
5113fec0
UB		 1769 break;
1770 case QETH_CARD_TYPE_OSD:
0132951e 1771 case QETH_CARD_TYPE_OSN:
5113fec0
UB		 1772 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1773 break;
1774 default:
1775 break;
4a71df50
FB		 1776 }
1777}
1778
4a71df50
FB		 1779static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1780 void (*idx_reply_cb)(struct qeth_channel *,
1781 struct qeth_cmd_buffer *))
1782{
1783 struct qeth_cmd_buffer *iob;
1784 unsigned long flags;
1785 int rc;
1786 struct qeth_card *card;
1787
d11ba0c4 1788 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1789 card = CARD_FROM_CDEV(channel->ccwdev);
1790 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1791 if (!iob)
1792 return -ENOMEM;
4a71df50
FB		 1793 iob->callback = idx_reply_cb;
1794 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1795 channel->ccw.count = QETH_BUFSIZE;
1796 channel->ccw.cda = (__u32) __pa(iob->data);
1797
1798 wait_event(card->wait_q,
1799 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1800 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1801 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1802 rc = ccw_device_start(channel->ccwdev,
1803 &channel->ccw, (addr_t) iob, 0, 0);
1804 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1805
1806 if (rc) {
14cc21b6 1807 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1808 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1809 atomic_set(&channel->irq_pending, 0);
1810 wake_up(&card->wait_q);
1811 return rc;
1812 }
1813 rc = wait_event_interruptible_timeout(card->wait_q,
1814 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1815 if (rc == -ERESTARTSYS)
1816 return rc;
1817 if (channel->state != CH_STATE_UP) {
1818 rc = -ETIME;
d11ba0c4 1819 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1820 qeth_clear_cmd_buffers(channel);
1821 } else
1822 rc = 0;
1823 return rc;
1824}
1825
1826static int qeth_idx_activate_channel(struct qeth_channel *channel,
1827 void (*idx_reply_cb)(struct qeth_channel *,
1828 struct qeth_cmd_buffer *))
1829{
1830 struct qeth_card *card;
1831 struct qeth_cmd_buffer *iob;
1832 unsigned long flags;
1833 __u16 temp;
1834 __u8 tmp;
1835 int rc;
f06f6f32 1836 struct ccw_dev_id temp_devid;
4a71df50
FB		 1837
1838 card = CARD_FROM_CDEV(channel->ccwdev);
1839
d11ba0c4 1840 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1841
1842 iob = qeth_get_buffer(channel);
1aec42bc
TR		 1843 if (!iob)
1844 return -ENOMEM;
4a71df50
FB		 1845 iob->callback = idx_reply_cb;
1846 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1847 channel->ccw.count = IDX_ACTIVATE_SIZE;
1848 channel->ccw.cda = (__u32) __pa(iob->data);
1849 if (channel == &card->write) {
1850 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1851 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1852 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1853 card->seqno.trans_hdr++;
1854 } else {
1855 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1856 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1857 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1858 }
1859 tmp = ((__u8)card->info.portno) | 0x80;
1860 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1861 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1862 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1863 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1864 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1865 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1866 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1867 temp = (card->info.cula << 8) + card->info.unit_addr2;
1868 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1869
1870 wait_event(card->wait_q,
1871 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1872 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1873 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1874 rc = ccw_device_start(channel->ccwdev,
1875 &channel->ccw, (addr_t) iob, 0, 0);
1876 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1877
1878 if (rc) {
14cc21b6
FB		 1879 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1880 rc);
d11ba0c4 1881 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1882 atomic_set(&channel->irq_pending, 0);
1883 wake_up(&card->wait_q);
1884 return rc;
1885 }
1886 rc = wait_event_interruptible_timeout(card->wait_q,
1887 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1888 if (rc == -ERESTARTSYS)
1889 return rc;
1890 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1891 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1892 " failed to recover an error on the device\n");
1893 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1894 dev_name(&channel->ccwdev->dev));
d11ba0c4 1895 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1896 qeth_clear_cmd_buffers(channel);
1897 return -ETIME;
1898 }
1899 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1900}
1901
1902static int qeth_peer_func_level(int level)
1903{
1904 if ((level & 0xff) == 8)
1905 return (level & 0xff) + 0x400;
1906 if (((level >> 8) & 3) == 1)
1907 return (level & 0xff) + 0x200;
1908 return level;
1909}
1910
1911static void qeth_idx_write_cb(struct qeth_channel *channel,
1912 struct qeth_cmd_buffer *iob)
1913{
1914 struct qeth_card *card;
1915 __u16 temp;
1916
d11ba0c4 1917 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1918
1919 if (channel->state == CH_STATE_DOWN) {
1920 channel->state = CH_STATE_ACTIVATING;
1921 goto out;
1922 }
1923 card = CARD_FROM_CDEV(channel->ccwdev);
1924
1925 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0 1926 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
74eacdb9
FB		 1927 dev_err(&card->write.ccwdev->dev,
1928 "The adapter is used exclusively by another "
1929 "host\n");
4a71df50 1930 else
74eacdb9
FB		 1931 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1932 " negative reply\n",
1933 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1934 goto out;
1935 }
1936 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1937 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1938 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1939 "function level mismatch (sent: 0x%x, received: "
1940 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1941 card->info.func_level, temp);
4a71df50
FB		 1942 goto out;
1943 }
1944 channel->state = CH_STATE_UP;
1945out:
1946 qeth_release_buffer(channel, iob);
1947}
1948
1949static void qeth_idx_read_cb(struct qeth_channel *channel,
1950 struct qeth_cmd_buffer *iob)
1951{
1952 struct qeth_card *card;
1953 __u16 temp;
1954
d11ba0c4 1955 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1956 if (channel->state == CH_STATE_DOWN) {
1957 channel->state = CH_STATE_ACTIVATING;
1958 goto out;
1959 }
1960
1961 card = CARD_FROM_CDEV(channel->ccwdev);
5113fec0 1962 if (qeth_check_idx_response(card, iob->data))
4a71df50
FB		 1963 goto out;
1964
1965 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
5113fec0
UB		 1966 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1967 case QETH_IDX_ACT_ERR_EXCL:
74eacdb9
FB		 1968 dev_err(&card->write.ccwdev->dev,
1969 "The adapter is used exclusively by another "
1970 "host\n");
5113fec0
UB		 1971 break;
1972 case QETH_IDX_ACT_ERR_AUTH:
01fc3e86 1973 case QETH_IDX_ACT_ERR_AUTH_USER:
5113fec0
UB		 1974 dev_err(&card->read.ccwdev->dev,
1975 "Setting the device online failed because of "
01fc3e86 1976 "insufficient authorization\n");
5113fec0
UB		 1977 break;
1978 default:
74eacdb9
FB		 1979 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1980 " negative reply\n",
1981 dev_name(&card->read.ccwdev->dev));
5113fec0 1982 }
01fc3e86
UB		 1983 QETH_CARD_TEXT_(card, 2, "idxread%c",
1984 QETH_IDX_ACT_CAUSE_CODE(iob->data));
4a71df50
FB		 1985 goto out;
1986 }
1987
4a71df50
FB		 1988 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1989 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1990 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1991 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1992 dev_name(&card->read.ccwdev->dev),
1993 card->info.func_level, temp);
4a71df50
FB		 1994 goto out;
1995 }
1996 memcpy(&card->token.issuer_rm_r,
1997 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1998 QETH_MPC_TOKEN_LENGTH);
1999 memcpy(&card->info.mcl_level[0],
2000 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2001 channel->state = CH_STATE_UP;
2002out:
2003 qeth_release_buffer(channel, iob);
2004}
2005
2006void qeth_prepare_control_data(struct qeth_card *card, int len,
2007 struct qeth_cmd_buffer *iob)
2008{
2009 qeth_setup_ccw(&card->write, iob->data, len);
2010 iob->callback = qeth_release_buffer;
2011
2012 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2013 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2014 card->seqno.trans_hdr++;
2015 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2016 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2017 card->seqno.pdu_hdr++;
2018 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2019 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 2020 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 2021}
2022EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2023
efbbc1d5
EC		 2024/**
2025 * qeth_send_control_data() - send control command to the card
2026 * @card: qeth_card structure pointer
2027 * @len: size of the command buffer
2028 * @iob: qeth_cmd_buffer pointer
2029 * @reply_cb: callback function pointer
2030 * @cb_card: pointer to the qeth_card structure
2031 * @cb_reply: pointer to the qeth_reply structure
2032 * @cb_cmd: pointer to the original iob for non-IPA
2033 * commands, or to the qeth_ipa_cmd structure
2034 * for the IPA commands.
2035 * @reply_param: private pointer passed to the callback
2036 *
2037 * Returns the value of the `return_code' field of the response
2038 * block returned from the hardware, or other error indication.
2039 * Value of zero indicates successful execution of the command.
2040 *
2041 * Callback function gets called one or more times, with cb_cmd
2042 * pointing to the response returned by the hardware. Callback
2043 * function must return non-zero if more reply blocks are expected,
2044 * and zero if the last or only reply block is received. Callback
2045 * function can get the value of the reply_param pointer from the
2046 * field 'param' of the structure qeth_reply.
2047 */
2048
4a71df50
FB		 2049int qeth_send_control_data(struct qeth_card *card, int len,
2050 struct qeth_cmd_buffer *iob,
efbbc1d5
EC		 2051 int (*reply_cb)(struct qeth_card *cb_card,
2052 struct qeth_reply *cb_reply,
2053 unsigned long cb_cmd),
4a71df50
FB		 2054 void *reply_param)
2055{
2056 int rc;
2057 unsigned long flags;
2058 struct qeth_reply *reply = NULL;
7834cd5a 2059 unsigned long timeout, event_timeout;
5b54e16f 2060 struct qeth_ipa_cmd *cmd;
4a71df50 2061
847a50fd 2062 QETH_CARD_TEXT(card, 2, "sendctl");
4a71df50 2063
908abbb5
UB		 2064 if (card->read_or_write_problem) {
2065 qeth_release_buffer(iob->channel, iob);
2066 return -EIO;
2067 }
4a71df50
FB		 2068 reply = qeth_alloc_reply(card);
2069 if (!reply) {
4a71df50
FB		 2070 return -ENOMEM;
2071 }
2072 reply->callback = reply_cb;
2073 reply->param = reply_param;
2074 if (card->state == CARD_STATE_DOWN)
2075 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2076 else
2077 reply->seqno = card->seqno.ipa++;
2078 init_waitqueue_head(&reply->wait_q);
2079 spin_lock_irqsave(&card->lock, flags);
2080 list_add_tail(&reply->list, &card->cmd_waiter_list);
2081 spin_unlock_irqrestore(&card->lock, flags);
4a71df50
FB		 2082
2083 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2084 qeth_prepare_control_data(card, len, iob);
2085
2086 if (IS_IPA(iob->data))
7834cd5a 2087 event_timeout = QETH_IPA_TIMEOUT;
4a71df50 2088 else
7834cd5a
HC		 2089 event_timeout = QETH_TIMEOUT;
2090 timeout = jiffies + event_timeout;
4a71df50 2091
847a50fd 2092 QETH_CARD_TEXT(card, 6, "noirqpnd");
4a71df50
FB		 2093 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2094 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2095 (addr_t) iob, 0, 0);
2096 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2097 if (rc) {
74eacdb9
FB		 2098 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2099 "ccw_device_start rc = %i\n",
2100 dev_name(&card->write.ccwdev->dev), rc);
847a50fd 2101 QETH_CARD_TEXT_(card, 2, " err%d", rc);
4a71df50
FB		 2102 spin_lock_irqsave(&card->lock, flags);
2103 list_del_init(&reply->list);
2104 qeth_put_reply(reply);
2105 spin_unlock_irqrestore(&card->lock, flags);
2106 qeth_release_buffer(iob->channel, iob);
2107 atomic_set(&card->write.irq_pending, 0);
2108 wake_up(&card->wait_q);
2109 return rc;
2110 }
5b54e16f
FB		 2111
2112 /* we have only one long running ipassist, since we can ensure
2113 process context of this command we can sleep */
2114 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2115 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2116 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2117 if (!wait_event_timeout(reply->wait_q,
7834cd5a 2118 atomic_read(&reply->received), event_timeout))
5b54e16f
FB		 2119 goto time_err;
2120 } else {
2121 while (!atomic_read(&reply->received)) {
2122 if (time_after(jiffies, timeout))
2123 goto time_err;
2124 cpu_relax();
6531084c 2125 }
5b54e16f
FB		 2126 }
2127
70919e23
UB		 2128 if (reply->rc == -EIO)
2129 goto error;
5b54e16f
FB		 2130 rc = reply->rc;
2131 qeth_put_reply(reply);
2132 return rc;
2133
2134time_err:
70919e23 2135 reply->rc = -ETIME;
5b54e16f
FB		 2136 spin_lock_irqsave(&reply->card->lock, flags);
2137 list_del_init(&reply->list);
2138 spin_unlock_irqrestore(&reply->card->lock, flags);
5b54e16f 2139 atomic_inc(&reply->received);
70919e23 2140error:
908abbb5
UB		 2141 atomic_set(&card->write.irq_pending, 0);
2142 qeth_release_buffer(iob->channel, iob);
2143 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
4a71df50
FB		 2144 rc = reply->rc;
2145 qeth_put_reply(reply);
2146 return rc;
2147}
2148EXPORT_SYMBOL_GPL(qeth_send_control_data);
2149
2150static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2151 unsigned long data)
2152{
2153 struct qeth_cmd_buffer *iob;
2154
d11ba0c4 2155 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 2156
2157 iob = (struct qeth_cmd_buffer *) data;
2158 memcpy(&card->token.cm_filter_r,
2159 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2160 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2161 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2162 return 0;
2163}
2164
2165static int qeth_cm_enable(struct qeth_card *card)
2166{
2167 int rc;
2168 struct qeth_cmd_buffer *iob;
2169
d11ba0c4 2170 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 2171
2172 iob = qeth_wait_for_buffer(&card->write);
2173 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2174 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2175 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2176 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2177 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2178
2179 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2180 qeth_cm_enable_cb, NULL);
2181 return rc;
2182}
2183
2184static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2185 unsigned long data)
2186{
2187
2188 struct qeth_cmd_buffer *iob;
2189
d11ba0c4 2190 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 2191
2192 iob = (struct qeth_cmd_buffer *) data;
2193 memcpy(&card->token.cm_connection_r,
2194 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2195 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2196 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2197 return 0;
2198}
2199
2200static int qeth_cm_setup(struct qeth_card *card)
2201{
2202 int rc;
2203 struct qeth_cmd_buffer *iob;
2204
d11ba0c4 2205 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 2206
2207 iob = qeth_wait_for_buffer(&card->write);
2208 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2209 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2210 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2211 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2212 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2213 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2214 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2215 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2216 qeth_cm_setup_cb, NULL);
2217 return rc;
2218
2219}
2220
cef6ff22 2221static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
4a71df50
FB		 2222{
2223 switch (card->info.type) {
4a71df50
FB		 2224 case QETH_CARD_TYPE_IQD:
2225 return card->info.max_mtu;
5113fec0 2226 case QETH_CARD_TYPE_OSD:
5113fec0 2227 case QETH_CARD_TYPE_OSX:
6e6f472d
JW		 2228 if (!card->options.layer2)
2229 return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */
2230 /* fall through */
4a71df50 2231 default:
6e6f472d 2232 return ETH_DATA_LEN;
4a71df50
FB		 2233 }
2234}
2235
cef6ff22 2236static int qeth_get_mtu_outof_framesize(int framesize)
4a71df50
FB		 2237{
2238 switch (framesize) {
2239 case 0x4000:
2240 return 8192;
2241 case 0x6000:
2242 return 16384;
2243 case 0xa000:
2244 return 32768;
2245 case 0xffff:
2246 return 57344;
2247 default:
2248 return 0;
2249 }
2250}
2251
cef6ff22 2252static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
4a71df50
FB		 2253{
2254 switch (card->info.type) {
5113fec0
UB		 2255 case QETH_CARD_TYPE_OSD:
2256 case QETH_CARD_TYPE_OSM:
2257 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2258 case QETH_CARD_TYPE_IQD:
2259 return ((mtu >= 576) &&
9853b97b 2260 (mtu <= card->info.max_mtu));
4a71df50 2261 case QETH_CARD_TYPE_OSN:
4a71df50
FB		 2262 default:
2263 return 1;
2264 }
2265}
2266
2267static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2268 unsigned long data)
2269{
2270
2271 __u16 mtu, framesize;
2272 __u16 len;
2273 __u8 link_type;
2274 struct qeth_cmd_buffer *iob;
2275
d11ba0c4 2276 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 2277
2278 iob = (struct qeth_cmd_buffer *) data;
2279 memcpy(&card->token.ulp_filter_r,
2280 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2281 QETH_MPC_TOKEN_LENGTH);
9853b97b 2282 if (card->info.type == QETH_CARD_TYPE_IQD) {
4a71df50
FB		 2283 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2284 mtu = qeth_get_mtu_outof_framesize(framesize);
2285 if (!mtu) {
2286 iob->rc = -EINVAL;
d11ba0c4 2287 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2288 return 0;
2289 }
8b2e18f6
UB		 2290 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2291 /* frame size has changed */
2292 if (card->dev &&
2293 ((card->dev->mtu == card->info.initial_mtu) ||
2294 (card->dev->mtu > mtu)))
2295 card->dev->mtu = mtu;
2296 qeth_free_qdio_buffers(card);
2297 }
4a71df50 2298 card->info.initial_mtu = mtu;
8b2e18f6 2299 card->info.max_mtu = mtu;
4a71df50
FB		 2300 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2301 } else {
9853b97b
FB		 2302 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2303 iob->data);
fe44014a
SR		 2304 card->info.initial_mtu = min(card->info.max_mtu,
2305 qeth_get_initial_mtu_for_card(card));
4a71df50
FB		 2306 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2307 }
2308
2309 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2310 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2311 memcpy(&link_type,
2312 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2313 card->info.link_type = link_type;
2314 } else
2315 card->info.link_type = 0;
01fc3e86 2316 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
d11ba0c4 2317 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2318 return 0;
2319}
2320
2321static int qeth_ulp_enable(struct qeth_card *card)
2322{
2323 int rc;
2324 char prot_type;
2325 struct qeth_cmd_buffer *iob;
2326
2327 /*FIXME: trace view callbacks*/
d11ba0c4 2328 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 2329
2330 iob = qeth_wait_for_buffer(&card->write);
2331 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2332
2333 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2334 (__u8) card->info.portno;
2335 if (card->options.layer2)
2336 if (card->info.type == QETH_CARD_TYPE_OSN)
2337 prot_type = QETH_PROT_OSN2;
2338 else
2339 prot_type = QETH_PROT_LAYER2;
2340 else
2341 prot_type = QETH_PROT_TCPIP;
2342
2343 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2344 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2345 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2346 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2347 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
4a71df50
FB		 2348 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2349 qeth_ulp_enable_cb, NULL);
2350 return rc;
2351
2352}
2353
2354static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2355 unsigned long data)
2356{
2357 struct qeth_cmd_buffer *iob;
2358
d11ba0c4 2359 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2360
2361 iob = (struct qeth_cmd_buffer *) data;
2362 memcpy(&card->token.ulp_connection_r,
2363 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2364 QETH_MPC_TOKEN_LENGTH);
65a1f898
UB		 2365 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2366 3)) {
2367 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2368 dev_err(&card->gdev->dev, "A connection could not be "
2369 "established because of an OLM limit\n");
bbb822a8 2370 iob->rc = -EMLINK;
65a1f898 2371 }
d11ba0c4 2372 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
7bf9bcff 2373 return 0;
4a71df50
FB		 2374}
2375
2376static int qeth_ulp_setup(struct qeth_card *card)
2377{
2378 int rc;
2379 __u16 temp;
2380 struct qeth_cmd_buffer *iob;
2381 struct ccw_dev_id dev_id;
2382
d11ba0c4 2383 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2384
2385 iob = qeth_wait_for_buffer(&card->write);
2386 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2387
2388 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2389 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2390 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2391 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2392 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2393 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2394
2395 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2396 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2397 temp = (card->info.cula << 8) + card->info.unit_addr2;
2398 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2399 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2400 qeth_ulp_setup_cb, NULL);
2401 return rc;
2402}
2403
0da9581d
EL		 2404static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2405{
2406 int rc;
2407 struct qeth_qdio_out_buffer *newbuf;
2408
2409 rc = 0;
2410 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2411 if (!newbuf) {
2412 rc = -ENOMEM;
2413 goto out;
2414 }
d445a4e2 2415 newbuf->buffer = q->qdio_bufs[bidx];
0da9581d
EL		 2416 skb_queue_head_init(&newbuf->skb_list);
2417 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2418 newbuf->q = q;
2419 newbuf->aob = NULL;
2420 newbuf->next_pending = q->bufs[bidx];
2421 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2422 q->bufs[bidx] = newbuf;
2423 if (q->bufstates) {
2424 q->bufstates[bidx].user = newbuf;
2425 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2426 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2427 QETH_CARD_TEXT_(q->card, 2, "%lx",
2428 (long) newbuf->next_pending);
2429 }
2430out:
2431 return rc;
2432}
2433
d445a4e2
SO		 2434static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2435{
2436 if (!q)
2437 return;
2438
2439 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2440 kfree(q);
2441}
2442
2443static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2444{
2445 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2446
2447 if (!q)
2448 return NULL;
2449
2450 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2451 kfree(q);
2452 return NULL;
2453 }
2454 return q;
2455}
0da9581d 2456
4a71df50
FB		 2457static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2458{
2459 int i, j;
2460
d11ba0c4 2461 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2462
2463 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2464 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2465 return 0;
2466
4601ba6c
SO		 2467 QETH_DBF_TEXT(SETUP, 2, "inq");
2468 card->qdio.in_q = qeth_alloc_qdio_queue();
4a71df50
FB		 2469 if (!card->qdio.in_q)
2470 goto out_nomem;
4601ba6c 2471
4a71df50
FB		 2472 /* inbound buffer pool */
2473 if (qeth_alloc_buffer_pool(card))
2474 goto out_freeinq;
0da9581d 2475
4a71df50
FB		 2476 /* outbound */
2477 card->qdio.out_qs =
b3332930 2478 kzalloc(card->qdio.no_out_queues *
4a71df50
FB		 2479 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2480 if (!card->qdio.out_qs)
2481 goto out_freepool;
2482 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2 2483 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
4a71df50
FB		 2484 if (!card->qdio.out_qs[i])
2485 goto out_freeoutq;
d11ba0c4
PT		 2486 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2487 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2488 card->qdio.out_qs[i]->queue_no = i;
2489 /* give outbound qeth_qdio_buffers their qdio_buffers */
2490 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
18af5c17 2491 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
0da9581d
EL		 2492 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2493 goto out_freeoutqbufs;
4a71df50
FB		 2494 }
2495 }
0da9581d
EL		 2496
2497 /* completion */
2498 if (qeth_alloc_cq(card))
2499 goto out_freeoutq;
2500
4a71df50
FB		 2501 return 0;
2502
0da9581d
EL		 2503out_freeoutqbufs:
2504 while (j > 0) {
2505 --j;
2506 kmem_cache_free(qeth_qdio_outbuf_cache,
2507 card->qdio.out_qs[i]->bufs[j]);
2508 card->qdio.out_qs[i]->bufs[j] = NULL;
2509 }
4a71df50 2510out_freeoutq:
0da9581d 2511 while (i > 0) {
d445a4e2 2512 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
0da9581d
EL		 2513 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2514 }
4a71df50
FB		 2515 kfree(card->qdio.out_qs);
2516 card->qdio.out_qs = NULL;
2517out_freepool:
2518 qeth_free_buffer_pool(card);
2519out_freeinq:
4601ba6c 2520 qeth_free_qdio_queue(card->qdio.in_q);
4a71df50
FB		 2521 card->qdio.in_q = NULL;
2522out_nomem:
2523 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2524 return -ENOMEM;
2525}
2526
d445a4e2
SO		 2527static void qeth_free_qdio_buffers(struct qeth_card *card)
2528{
2529 int i, j;
2530
2531 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2532 QETH_QDIO_UNINITIALIZED)
2533 return;
2534
2535 qeth_free_cq(card);
2536 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2537 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2538 if (card->qdio.in_q->bufs[j].rx_skb)
2539 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2540 }
2541 qeth_free_qdio_queue(card->qdio.in_q);
2542 card->qdio.in_q = NULL;
2543 /* inbound buffer pool */
2544 qeth_free_buffer_pool(card);
2545 /* free outbound qdio_qs */
2546 if (card->qdio.out_qs) {
2547 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2548 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2549 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2550 }
2551 kfree(card->qdio.out_qs);
2552 card->qdio.out_qs = NULL;
2553 }
2554}
2555
4a71df50
FB		 2556static void qeth_create_qib_param_field(struct qeth_card *card,
2557 char *param_field)
2558{
2559
2560 param_field[0] = _ascebc['P'];
2561 param_field[1] = _ascebc['C'];
2562 param_field[2] = _ascebc['I'];
2563 param_field[3] = _ascebc['T'];
2564 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2565 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2566 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2567}
2568
2569static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2570 char *param_field)
2571{
2572 param_field[16] = _ascebc['B'];
2573 param_field[17] = _ascebc['L'];
2574 param_field[18] = _ascebc['K'];
2575 param_field[19] = _ascebc['T'];
2576 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2577 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2578 *((unsigned int *) (&param_field[28])) =
2579 card->info.blkt.inter_packet_jumbo;
2580}
2581
2582static int qeth_qdio_activate(struct qeth_card *card)
2583{
d11ba0c4 2584 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2585 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2586}
2587
2588static int qeth_dm_act(struct qeth_card *card)
2589{
2590 int rc;
2591 struct qeth_cmd_buffer *iob;
2592
d11ba0c4 2593 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2594
2595 iob = qeth_wait_for_buffer(&card->write);
2596 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2597
2598 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2599 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2600 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2601 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2602 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2603 return rc;
2604}
2605
2606static int qeth_mpc_initialize(struct qeth_card *card)
2607{
2608 int rc;
2609
d11ba0c4 2610 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2611
2612 rc = qeth_issue_next_read(card);
2613 if (rc) {
d11ba0c4 2614 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2615 return rc;
2616 }
2617 rc = qeth_cm_enable(card);
2618 if (rc) {
d11ba0c4 2619 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2620 goto out_qdio;
2621 }
2622 rc = qeth_cm_setup(card);
2623 if (rc) {
d11ba0c4 2624 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2625 goto out_qdio;
2626 }
2627 rc = qeth_ulp_enable(card);
2628 if (rc) {
d11ba0c4 2629 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2630 goto out_qdio;
2631 }
2632 rc = qeth_ulp_setup(card);
2633 if (rc) {
d11ba0c4 2634 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2635 goto out_qdio;
2636 }
2637 rc = qeth_alloc_qdio_buffers(card);
2638 if (rc) {
d11ba0c4 2639 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2640 goto out_qdio;
2641 }
2642 rc = qeth_qdio_establish(card);
2643 if (rc) {
d11ba0c4 2644 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2645 qeth_free_qdio_buffers(card);
2646 goto out_qdio;
2647 }
2648 rc = qeth_qdio_activate(card);
2649 if (rc) {
d11ba0c4 2650 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2651 goto out_qdio;
2652 }
2653 rc = qeth_dm_act(card);
2654 if (rc) {
d11ba0c4 2655 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2656 goto out_qdio;
2657 }
2658
2659 return 0;
2660out_qdio:
2661 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
22ae2790 2662 qdio_free(CARD_DDEV(card));
4a71df50
FB		 2663 return rc;
2664}
2665
4a71df50
FB		 2666void qeth_print_status_message(struct qeth_card *card)
2667{
2668 switch (card->info.type) {
5113fec0
UB		 2669 case QETH_CARD_TYPE_OSD:
2670 case QETH_CARD_TYPE_OSM:
2671 case QETH_CARD_TYPE_OSX:
4a71df50
FB		 2672 /* VM will use a non-zero first character
2673 * to indicate a HiperSockets like reporting
2674 * of the level OSA sets the first character to zero
2675 * */
2676 if (!card->info.mcl_level[0]) {
2677 sprintf(card->info.mcl_level, "%02x%02x",
2678 card->info.mcl_level[2],
2679 card->info.mcl_level[3]);
4a71df50
FB		 2680 break;
2681 }
2682 /* fallthrough */
2683 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2684 if ((card->info.guestlan) ||
2685 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2686 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2687 card->info.mcl_level[0]];
2688 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2689 card->info.mcl_level[1]];
2690 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2691 card->info.mcl_level[2]];
2692 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2693 card->info.mcl_level[3]];
2694 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2695 }
2696 break;
2697 default:
2698 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2699 }
239ff408
UB		 2700 dev_info(&card->gdev->dev,
2701 "Device is a%s card%s%s%s\nwith link type %s.\n",
2702 qeth_get_cardname(card),
2703 (card->info.mcl_level[0]) ? " (level: " : "",
2704 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2705 (card->info.mcl_level[0]) ? ")" : "",
2706 qeth_get_cardname_short(card));
4a71df50
FB		 2707}
2708EXPORT_SYMBOL_GPL(qeth_print_status_message);
2709
4a71df50
FB		 2710static void qeth_initialize_working_pool_list(struct qeth_card *card)
2711{
2712 struct qeth_buffer_pool_entry *entry;
2713
847a50fd 2714 QETH_CARD_TEXT(card, 5, "inwrklst");
4a71df50
FB		 2715
2716 list_for_each_entry(entry,
2717 &card->qdio.init_pool.entry_list, init_list) {
2718 qeth_put_buffer_pool_entry(card, entry);
2719 }
2720}
2721
cef6ff22
JW		 2722static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2723 struct qeth_card *card)
4a71df50
FB		 2724{
2725 struct list_head *plh;
2726 struct qeth_buffer_pool_entry *entry;
2727 int i, free;
2728 struct page *page;
2729
2730 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2731 return NULL;
2732
2733 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2734 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2735 free = 1;
2736 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2737 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2738 free = 0;
2739 break;
2740 }
2741 }
2742 if (free) {
2743 list_del_init(&entry->list);
2744 return entry;
2745 }
2746 }
2747
2748 /* no free buffer in pool so take first one and swap pages */
2749 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2750 struct qeth_buffer_pool_entry, list);
2751 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2752 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2753 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2754 if (!page) {
2755 return NULL;
2756 } else {
2757 free_page((unsigned long)entry->elements[i]);
2758 entry->elements[i] = page_address(page);
2759 if (card->options.performance_stats)
2760 card->perf_stats.sg_alloc_page_rx++;
2761 }
2762 }
2763 }
2764 list_del_init(&entry->list);
2765 return entry;
2766}
2767
2768static int qeth_init_input_buffer(struct qeth_card *card,
2769 struct qeth_qdio_buffer *buf)
2770{
2771 struct qeth_buffer_pool_entry *pool_entry;
2772 int i;
2773
b3332930
FB		 2774 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2775 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2776 if (!buf->rx_skb)
2777 return 1;
2778 }
2779
4a71df50
FB		 2780 pool_entry = qeth_find_free_buffer_pool_entry(card);
2781 if (!pool_entry)
2782 return 1;
2783
2784 /*
2785 * since the buffer is accessed only from the input_tasklet
2786 * there shouldn't be a need to synchronize; also, since we use
2787 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2788 * buffers
2789 */
4a71df50
FB		 2790
2791 buf->pool_entry = pool_entry;
2792 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2793 buf->buffer->element[i].length = PAGE_SIZE;
2794 buf->buffer->element[i].addr = pool_entry->elements[i];
2795 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
3ec90878 2796 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
4a71df50 2797 else
3ec90878
JG		 2798 buf->buffer->element[i].eflags = 0;
2799 buf->buffer->element[i].sflags = 0;
4a71df50
FB		 2800 }
2801 return 0;
2802}
2803
2804int qeth_init_qdio_queues(struct qeth_card *card)
2805{
2806 int i, j;
2807 int rc;
2808
d11ba0c4 2809 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2810
2811 /* inbound queue */
6d284bde
SO		 2812 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2813 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2814 qeth_initialize_working_pool_list(card);
2815 /*give only as many buffers to hardware as we have buffer pool entries*/
2816 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2817 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2818 card->qdio.in_q->next_buf_to_init =
2819 card->qdio.in_buf_pool.buf_count - 1;
2820 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2821 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2822 if (rc) {
d11ba0c4 2823 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2824 return rc;
2825 }
0da9581d
EL		 2826
2827 /* completion */
2828 rc = qeth_cq_init(card);
2829 if (rc) {
2830 return rc;
2831 }
2832
4a71df50
FB		 2833 /* outbound queue */
2834 for (i = 0; i < card->qdio.no_out_queues; ++i) {
d445a4e2
SO		 2835 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2836 QDIO_MAX_BUFFERS_PER_Q);
4a71df50
FB		 2837 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2838 qeth_clear_output_buffer(card->qdio.out_qs[i],
0da9581d
EL		 2839 card->qdio.out_qs[i]->bufs[j],
2840 QETH_QDIO_BUF_EMPTY);
4a71df50
FB		 2841 }
2842 card->qdio.out_qs[i]->card = card;
2843 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2844 card->qdio.out_qs[i]->do_pack = 0;
2845 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2846 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2847 atomic_set(&card->qdio.out_qs[i]->state,
2848 QETH_OUT_Q_UNLOCKED);
2849 }
2850 return 0;
2851}
2852EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2853
cef6ff22 2854static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
4a71df50
FB		 2855{
2856 switch (link_type) {
2857 case QETH_LINK_TYPE_HSTR:
2858 return 2;
2859 default:
2860 return 1;
2861 }
2862}
2863
2864static void qeth_fill_ipacmd_header(struct qeth_card *card,
2865 struct qeth_ipa_cmd *cmd, __u8 command,
2866 enum qeth_prot_versions prot)
2867{
2868 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2869 cmd->hdr.command = command;
2870 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2871 cmd->hdr.seqno = card->seqno.ipa;
2872 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2873 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2874 if (card->options.layer2)
2875 cmd->hdr.prim_version_no = 2;
2876 else
2877 cmd->hdr.prim_version_no = 1;
2878 cmd->hdr.param_count = 1;
2879 cmd->hdr.prot_version = prot;
2880 cmd->hdr.ipa_supported = 0;
2881 cmd->hdr.ipa_enabled = 0;
2882}
2883
2884struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2885 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2886{
2887 struct qeth_cmd_buffer *iob;
2888 struct qeth_ipa_cmd *cmd;
2889
1aec42bc
TR		 2890 iob = qeth_get_buffer(&card->write);
2891 if (iob) {
2892 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2893 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2894 } else {
2895 dev_warn(&card->gdev->dev,
2896 "The qeth driver ran out of channel command buffers\n");
2897 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2898 dev_name(&card->gdev->dev));
2899 }
4a71df50
FB		 2900
2901 return iob;
2902}
2903EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2904
2905void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2906 char prot_type)
2907{
2908 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2909 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2910 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2911 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2912}
2913EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2914
efbbc1d5
EC		 2915/**
2916 * qeth_send_ipa_cmd() - send an IPA command
2917 *
2918 * See qeth_send_control_data() for explanation of the arguments.
2919 */
2920
4a71df50
FB		 2921int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2922 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2923 unsigned long),
2924 void *reply_param)
2925{
2926 int rc;
2927 char prot_type;
4a71df50 2928
847a50fd 2929 QETH_CARD_TEXT(card, 4, "sendipa");
4a71df50
FB		 2930
2931 if (card->options.layer2)
2932 if (card->info.type == QETH_CARD_TYPE_OSN)
2933 prot_type = QETH_PROT_OSN2;
2934 else
2935 prot_type = QETH_PROT_LAYER2;
2936 else
2937 prot_type = QETH_PROT_TCPIP;
2938 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2939 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2940 iob, reply_cb, reply_param);
908abbb5
UB		 2941 if (rc == -ETIME) {
2942 qeth_clear_ipacmd_list(card);
2943 qeth_schedule_recovery(card);
2944 }
4a71df50
FB		 2945 return rc;
2946}
2947EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2948
10340510 2949static int qeth_send_startlan(struct qeth_card *card)
4a71df50
FB		 2950{
2951 int rc;
70919e23 2952 struct qeth_cmd_buffer *iob;
4a71df50 2953
d11ba0c4 2954 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50 2955
70919e23 2956 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
1aec42bc
TR		 2957 if (!iob)
2958 return -ENOMEM;
70919e23 2959 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
4a71df50
FB		 2960 return rc;
2961}
4a71df50 2962
eb3fb0ba 2963static int qeth_default_setadapterparms_cb(struct qeth_card *card,
4a71df50
FB		 2964 struct qeth_reply *reply, unsigned long data)
2965{
2966 struct qeth_ipa_cmd *cmd;
2967
847a50fd 2968 QETH_CARD_TEXT(card, 4, "defadpcb");
4a71df50
FB		 2969
2970 cmd = (struct qeth_ipa_cmd *) data;
2971 if (cmd->hdr.return_code == 0)
2972 cmd->hdr.return_code =
2973 cmd->data.setadapterparms.hdr.return_code;
2974 return 0;
2975}
4a71df50
FB		 2976
2977static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2978 struct qeth_reply *reply, unsigned long data)
2979{
2980 struct qeth_ipa_cmd *cmd;
2981
847a50fd 2982 QETH_CARD_TEXT(card, 3, "quyadpcb");
4a71df50
FB		 2983
2984 cmd = (struct qeth_ipa_cmd *) data;
5113fec0 2985 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
4a71df50
FB		 2986 card->info.link_type =
2987 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
5113fec0
UB		 2988 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
2989 }
4a71df50
FB		 2990 card->options.adp.supported_funcs =
2991 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2992 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2993}
2994
eb3fb0ba 2995static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
4a71df50
FB		 2996 __u32 command, __u32 cmdlen)
2997{
2998 struct qeth_cmd_buffer *iob;
2999 struct qeth_ipa_cmd *cmd;
3000
3001 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3002 QETH_PROT_IPV4);
1aec42bc
TR		 3003 if (iob) {
3004 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3005 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3006 cmd->data.setadapterparms.hdr.command_code = command;
3007 cmd->data.setadapterparms.hdr.used_total = 1;
3008 cmd->data.setadapterparms.hdr.seq_no = 1;
3009 }
4a71df50
FB		 3010
3011 return iob;
3012}
4a71df50
FB		 3013
3014int qeth_query_setadapterparms(struct qeth_card *card)
3015{
3016 int rc;
3017 struct qeth_cmd_buffer *iob;
3018
847a50fd 3019 QETH_CARD_TEXT(card, 3, "queryadp");
4a71df50
FB		 3020 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3021 sizeof(struct qeth_ipacmd_setadpparms));
1aec42bc
TR		 3022 if (!iob)
3023 return -ENOMEM;
4a71df50
FB		 3024 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3025 return rc;
3026}
3027EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3028
1da74b1c
FB		 3029static int qeth_query_ipassists_cb(struct qeth_card *card,
3030 struct qeth_reply *reply, unsigned long data)
3031{
3032 struct qeth_ipa_cmd *cmd;
3033
3034 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3035
3036 cmd = (struct qeth_ipa_cmd *) data;
a134884a
SR		 3037
3038 switch (cmd->hdr.return_code) {
3039 case IPA_RC_NOTSUPP:
3040 case IPA_RC_L2_UNSUPPORTED_CMD:
3041 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3042 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3043 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3044 return -0;
3045 default:
3046 if (cmd->hdr.return_code) {
3047 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3048 "rc=%d\n",
3049 dev_name(&card->gdev->dev),
3050 cmd->hdr.return_code);
3051 return 0;
3052 }
3053 }
3054
1da74b1c
FB		 3055 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3056 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3057 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a 3058 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
1da74b1c
FB		 3059 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3060 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
a134884a
SR		 3061 } else
3062 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3063 "\n", dev_name(&card->gdev->dev));
1da74b1c
FB		 3064 return 0;
3065}
3066
3067int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3068{
3069 int rc;
3070 struct qeth_cmd_buffer *iob;
3071
3072 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3073 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
1aec42bc
TR		 3074 if (!iob)
3075 return -ENOMEM;
1da74b1c
FB		 3076 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3077 return rc;
3078}
3079EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3080
45cbb2e4
SR		 3081static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3082 struct qeth_reply *reply, unsigned long data)
3083{
3084 struct qeth_ipa_cmd *cmd;
3085 struct qeth_switch_info *sw_info;
3086 struct qeth_query_switch_attributes *attrs;
3087
3088 QETH_CARD_TEXT(card, 2, "qswiatcb");
3089 cmd = (struct qeth_ipa_cmd *) data;
3090 sw_info = (struct qeth_switch_info *)reply->param;
3091 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3092 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3093 sw_info->capabilities = attrs->capabilities;
3094 sw_info->settings = attrs->settings;
3095 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3096 sw_info->settings);
3097 }
3098 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3099
3100 return 0;
3101}
3102
3103int qeth_query_switch_attributes(struct qeth_card *card,
3104 struct qeth_switch_info *sw_info)
3105{
3106 struct qeth_cmd_buffer *iob;
3107
3108 QETH_CARD_TEXT(card, 2, "qswiattr");
3109 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3110 return -EOPNOTSUPP;
3111 if (!netif_carrier_ok(card->dev))
3112 return -ENOMEDIUM;
3113 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3114 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 3115 if (!iob)
3116 return -ENOMEM;
45cbb2e4
SR		 3117 return qeth_send_ipa_cmd(card, iob,
3118 qeth_query_switch_attributes_cb, sw_info);
3119}
3120EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3121
1da74b1c
FB		 3122static int qeth_query_setdiagass_cb(struct qeth_card *card,
3123 struct qeth_reply *reply, unsigned long data)
3124{
3125 struct qeth_ipa_cmd *cmd;
3126 __u16 rc;
3127
3128 cmd = (struct qeth_ipa_cmd *)data;
3129 rc = cmd->hdr.return_code;
3130 if (rc)
3131 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3132 else
3133 card->info.diagass_support = cmd->data.diagass.ext;
3134 return 0;
3135}
3136
3137static int qeth_query_setdiagass(struct qeth_card *card)
3138{
3139 struct qeth_cmd_buffer *iob;
3140 struct qeth_ipa_cmd *cmd;
3141
3142 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3143 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3144 if (!iob)
3145 return -ENOMEM;
1da74b1c
FB		 3146 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3147 cmd->data.diagass.subcmd_len = 16;
3148 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3149 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3150}
3151
3152static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3153{
3154 unsigned long info = get_zeroed_page(GFP_KERNEL);
3155 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3156 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3157 struct ccw_dev_id ccwid;
caf757c6 3158 int level;
1da74b1c
FB		 3159
3160 tid->chpid = card->info.chpid;
3161 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3162 tid->ssid = ccwid.ssid;
3163 tid->devno = ccwid.devno;
3164 if (!info)
3165 return;
caf757c6
HC		 3166 level = stsi(NULL, 0, 0, 0);
3167 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
1da74b1c 3168 tid->lparnr = info222->lpar_number;
caf757c6 3169 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
1da74b1c
FB		 3170 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3171 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3172 }
3173 free_page(info);
3174 return;
3175}
3176
3177static int qeth_hw_trap_cb(struct qeth_card *card,
3178 struct qeth_reply *reply, unsigned long data)
3179{
3180 struct qeth_ipa_cmd *cmd;
3181 __u16 rc;
3182
3183 cmd = (struct qeth_ipa_cmd *)data;
3184 rc = cmd->hdr.return_code;
3185 if (rc)
3186 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3187 return 0;
3188}
3189
3190int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3191{
3192 struct qeth_cmd_buffer *iob;
3193 struct qeth_ipa_cmd *cmd;
3194
3195 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3196 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
1aec42bc
TR		 3197 if (!iob)
3198 return -ENOMEM;
1da74b1c
FB		 3199 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3200 cmd->data.diagass.subcmd_len = 80;
3201 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3202 cmd->data.diagass.type = 1;
3203 cmd->data.diagass.action = action;
3204 switch (action) {
3205 case QETH_DIAGS_TRAP_ARM:
3206 cmd->data.diagass.options = 0x0003;
3207 cmd->data.diagass.ext = 0x00010000 +
3208 sizeof(struct qeth_trap_id);
3209 qeth_get_trap_id(card,
3210 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3211 break;
3212 case QETH_DIAGS_TRAP_DISARM:
3213 cmd->data.diagass.options = 0x0001;
3214 break;
3215 case QETH_DIAGS_TRAP_CAPTURE:
3216 break;
3217 }
3218 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3219}
3220EXPORT_SYMBOL_GPL(qeth_hw_trap);
3221
d73ef324
JW		 3222static int qeth_check_qdio_errors(struct qeth_card *card,
3223 struct qdio_buffer *buf,
3224 unsigned int qdio_error,
3225 const char *dbftext)
4a71df50 3226{
779e6e1c 3227 if (qdio_error) {
847a50fd 3228 QETH_CARD_TEXT(card, 2, dbftext);
38593d01 3229 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3ec90878 3230 buf->element[15].sflags);
38593d01 3231 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3ec90878 3232 buf->element[14].sflags);
38593d01 3233 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3ec90878 3234 if ((buf->element[15].sflags) == 0x12) {
76b11f8e
UB		 3235 card->stats.rx_dropped++;
3236 return 0;
3237 } else
3238 return 1;
4a71df50
FB		 3239 }
3240 return 0;
3241}
4a71df50 3242
d73ef324 3243static void qeth_queue_input_buffer(struct qeth_card *card, int index)
4a71df50
FB		 3244{
3245 struct qeth_qdio_q *queue = card->qdio.in_q;
b3332930 3246 struct list_head *lh;
4a71df50
FB		 3247 int count;
3248 int i;
3249 int rc;
3250 int newcount = 0;
3251
4a71df50
FB		 3252 count = (index < queue->next_buf_to_init)?
3253 card->qdio.in_buf_pool.buf_count -
3254 (queue->next_buf_to_init - index) :
3255 card->qdio.in_buf_pool.buf_count -
3256 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3257 /* only requeue at a certain threshold to avoid SIGAs */
3258 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3259 for (i = queue->next_buf_to_init;
3260 i < queue->next_buf_to_init + count; ++i) {
3261 if (qeth_init_input_buffer(card,
3262 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3263 break;
3264 } else {
3265 newcount++;
3266 }
3267 }
3268
3269 if (newcount < count) {
3270 /* we are in memory shortage so we switch back to
3271 traditional skb allocation and drop packages */
4a71df50
FB		 3272 atomic_set(&card->force_alloc_skb, 3);
3273 count = newcount;
3274 } else {
4a71df50
FB		 3275 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3276 }
3277
b3332930
FB		 3278 if (!count) {
3279 i = 0;
3280 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3281 i++;
3282 if (i == card->qdio.in_buf_pool.buf_count) {
3283 QETH_CARD_TEXT(card, 2, "qsarbw");
3284 card->reclaim_index = index;
3285 schedule_delayed_work(
3286 &card->buffer_reclaim_work,
3287 QETH_RECLAIM_WORK_TIME);
3288 }
3289 return;
3290 }
3291
4a71df50
FB		 3292 /*
3293 * according to old code it should be avoided to requeue all
3294 * 128 buffers in order to benefit from PCI avoidance.
3295 * this function keeps at least one buffer (the buffer at
3296 * 'index') un-requeued -> this buffer is the first buffer that
3297 * will be requeued the next time
3298 */
3299 if (card->options.performance_stats) {
3300 card->perf_stats.inbound_do_qdio_cnt++;
3301 card->perf_stats.inbound_do_qdio_start_time =
3302 qeth_get_micros();
3303 }
779e6e1c
JG		 3304 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3305 queue->next_buf_to_init, count);
4a71df50
FB		 3306 if (card->options.performance_stats)
3307 card->perf_stats.inbound_do_qdio_time +=
3308 qeth_get_micros() -
3309 card->perf_stats.inbound_do_qdio_start_time;
3310 if (rc) {
847a50fd 3311 QETH_CARD_TEXT(card, 2, "qinberr");
4a71df50
FB		 3312 }
3313 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3314 QDIO_MAX_BUFFERS_PER_Q;
3315 }
3316}
d73ef324
JW		 3317
3318static void qeth_buffer_reclaim_work(struct work_struct *work)
3319{
3320 struct qeth_card *card = container_of(work, struct qeth_card,
3321 buffer_reclaim_work.work);
3322
3323 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3324 qeth_queue_input_buffer(card, card->reclaim_index);
3325}
4a71df50 3326
d7a39937 3327static void qeth_handle_send_error(struct qeth_card *card,
779e6e1c 3328 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50 3329{
3ec90878 3330 int sbalf15 = buffer->buffer->element[15].sflags;
4a71df50 3331
847a50fd 3332 QETH_CARD_TEXT(card, 6, "hdsnderr");
58490f18
KDW		 3333 if (card->info.type == QETH_CARD_TYPE_IQD) {
3334 if (sbalf15 == 0) {
3335 qdio_err = 0;
3336 } else {
3337 qdio_err = 1;
3338 }
3339 }
76b11f8e 3340 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
d303b6fd
JG		 3341
3342 if (!qdio_err)
d7a39937 3343 return;
d303b6fd
JG		 3344
3345 if ((sbalf15 >= 15) && (sbalf15 <= 31))
d7a39937 3346 return;
d303b6fd 3347
847a50fd
CO		 3348 QETH_CARD_TEXT(card, 1, "lnkfail");
3349 QETH_CARD_TEXT_(card, 1, "%04x %02x",
d303b6fd 3350 (u16)qdio_err, (u8)sbalf15);
4a71df50
FB		 3351}
3352
664e42ac
JW		 3353/**
3354 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
3355 * @queue: queue to check for packing buffer
3356 *
3357 * Returns number of buffers that were prepared for flush.
3358 */
3359static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
3360{
3361 struct qeth_qdio_out_buffer *buffer;
3362
3363 buffer = queue->bufs[queue->next_buf_to_fill];
3364 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3365 (buffer->next_element_to_fill > 0)) {
3366 /* it's a packing buffer */
3367 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3368 queue->next_buf_to_fill =
3369 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3370 return 1;
3371 }
3372 return 0;
3373}
3374
4a71df50
FB		 3375/*
3376 * Switched to packing state if the number of used buffers on a queue
3377 * reaches a certain limit.
3378 */
3379static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3380{
3381 if (!queue->do_pack) {
3382 if (atomic_read(&queue->used_buffers)
3383 >= QETH_HIGH_WATERMARK_PACK){
3384 /* switch non-PACKING -> PACKING */
847a50fd 3385 QETH_CARD_TEXT(queue->card, 6, "np->pack");
4a71df50
FB		 3386 if (queue->card->options.performance_stats)
3387 queue->card->perf_stats.sc_dp_p++;
3388 queue->do_pack = 1;
3389 }
3390 }
3391}
3392
3393/*
3394 * Switches from packing to non-packing mode. If there is a packing
3395 * buffer on the queue this buffer will be prepared to be flushed.
3396 * In that case 1 is returned to inform the caller. If no buffer
3397 * has to be flushed, zero is returned.
3398 */
3399static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3400{
4a71df50
FB		 3401 if (queue->do_pack) {
3402 if (atomic_read(&queue->used_buffers)
3403 <= QETH_LOW_WATERMARK_PACK) {
3404 /* switch PACKING -> non-PACKING */
847a50fd 3405 QETH_CARD_TEXT(queue->card, 6, "pack->np");
4a71df50
FB		 3406 if (queue->card->options.performance_stats)
3407 queue->card->perf_stats.sc_p_dp++;
3408 queue->do_pack = 0;
664e42ac 3409 return qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3410 }
3411 }
4a71df50
FB		 3412 return 0;
3413}
3414
779e6e1c
JG		 3415static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3416 int count)
4a71df50
FB		 3417{
3418 struct qeth_qdio_out_buffer *buf;
3419 int rc;
3420 int i;
3421 unsigned int qdio_flags;
3422
4a71df50 3423 for (i = index; i < index + count; ++i) {
0da9581d
EL		 3424 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3425 buf = queue->bufs[bidx];
3ec90878
JG		 3426 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3427 SBAL_EFLAGS_LAST_ENTRY;
4a71df50 3428
0da9581d
EL		 3429 if (queue->bufstates)
3430 queue->bufstates[bidx].user = buf;
3431
4a71df50
FB		 3432 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3433 continue;
3434
3435 if (!queue->do_pack) {
3436 if ((atomic_read(&queue->used_buffers) >=
3437 (QETH_HIGH_WATERMARK_PACK -
3438 QETH_WATERMARK_PACK_FUZZ)) &&
3439 !atomic_read(&queue->set_pci_flags_count)) {
3440 /* it's likely that we'll go to packing
3441 * mode soon */
3442 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3443 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3444 }
3445 } else {
3446 if (!atomic_read(&queue->set_pci_flags_count)) {
3447 /*
3448 * there's no outstanding PCI any more, so we
3449 * have to request a PCI to be sure the the PCI
3450 * will wake at some time in the future then we
3451 * can flush packed buffers that might still be
3452 * hanging around, which can happen if no
3453 * further send was requested by the stack
3454 */
3455 atomic_inc(&queue->set_pci_flags_count);
3ec90878 3456 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
4a71df50
FB		 3457 }
3458 }
3459 }
3460
3e66bab3 3461 netif_trans_update(queue->card->dev);
4a71df50
FB		 3462 if (queue->card->options.performance_stats) {
3463 queue->card->perf_stats.outbound_do_qdio_cnt++;
3464 queue->card->perf_stats.outbound_do_qdio_start_time =
3465 qeth_get_micros();
3466 }
3467 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 3468 if (atomic_read(&queue->set_pci_flags_count))
3469 qdio_flags |= QDIO_FLAG_PCI_OUT;
3470 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 3471 queue->queue_no, index, count);
4a71df50
FB		 3472 if (queue->card->options.performance_stats)
3473 queue->card->perf_stats.outbound_do_qdio_time +=
3474 qeth_get_micros() -
3475 queue->card->perf_stats.outbound_do_qdio_start_time;
aa3a41d0 3476 atomic_add(count, &queue->used_buffers);
4a71df50 3477 if (rc) {
d303b6fd
JG		 3478 queue->card->stats.tx_errors += count;
3479 /* ignore temporary SIGA errors without busy condition */
1549d13f 3480 if (rc == -ENOBUFS)
d303b6fd 3481 return;
847a50fd 3482 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
0da9581d
EL		 3483 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3484 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3485 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
847a50fd 3486 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
d303b6fd 3487
4a71df50
FB		 3488 /* this must not happen under normal circumstances. if it
3489 * happens something is really wrong -> recover */
3490 qeth_schedule_recovery(queue->card);
3491 return;
3492 }
4a71df50
FB		 3493 if (queue->card->options.performance_stats)
3494 queue->card->perf_stats.bufs_sent += count;
3495}
3496
3497static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3498{
3499 int index;
3500 int flush_cnt = 0;
3501 int q_was_packing = 0;
3502
3503 /*
3504 * check if weed have to switch to non-packing mode or if
3505 * we have to get a pci flag out on the queue
3506 */
3507 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3508 !atomic_read(&queue->set_pci_flags_count)) {
3509 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3510 QETH_OUT_Q_UNLOCKED) {
3511 /*
3512 * If we get in here, there was no action in
3513 * do_send_packet. So, we check if there is a
3514 * packing buffer to be flushed here.
3515 */
3516 netif_stop_queue(queue->card->dev);
3517 index = queue->next_buf_to_fill;
3518 q_was_packing = queue->do_pack;
3519 /* queue->do_pack may change */
3520 barrier();
3521 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3522 if (!flush_cnt &&
3523 !atomic_read(&queue->set_pci_flags_count))
664e42ac 3524 flush_cnt += qeth_prep_flush_pack_buffer(queue);
4a71df50
FB		 3525 if (queue->card->options.performance_stats &&
3526 q_was_packing)
3527 queue->card->perf_stats.bufs_sent_pack +=
3528 flush_cnt;
3529 if (flush_cnt)
779e6e1c 3530 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3531 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3532 }
3533 }
3534}
3535
a1c3ed4c
FB		 3536void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3537 unsigned long card_ptr)
3538{
3539 struct qeth_card *card = (struct qeth_card *)card_ptr;
3540
0cffef48 3541 if (card->dev && (card->dev->flags & IFF_UP))
a1c3ed4c
FB		 3542 napi_schedule(&card->napi);
3543}
3544EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3545
0da9581d
EL		 3546int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3547{
3548 int rc;
3549
3550 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3551 rc = -1;
3552 goto out;
3553 } else {
3554 if (card->options.cq == cq) {
3555 rc = 0;
3556 goto out;
3557 }
3558
3559 if (card->state != CARD_STATE_DOWN &&
3560 card->state != CARD_STATE_RECOVER) {
3561 rc = -1;
3562 goto out;
3563 }
3564
3565 qeth_free_qdio_buffers(card);
3566 card->options.cq = cq;
3567 rc = 0;
3568 }
3569out:
3570 return rc;
3571
3572}
3573EXPORT_SYMBOL_GPL(qeth_configure_cq);
3574
3575
3576static void qeth_qdio_cq_handler(struct qeth_card *card,
3577 unsigned int qdio_err,
3578 unsigned int queue, int first_element, int count) {
3579 struct qeth_qdio_q *cq = card->qdio.c_q;
3580 int i;
3581 int rc;
3582
3583 if (!qeth_is_cq(card, queue))
3584 goto out;
3585
3586 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3587 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3588 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3589
3590 if (qdio_err) {
3591 netif_stop_queue(card->dev);
3592 qeth_schedule_recovery(card);
3593 goto out;
3594 }
3595
3596 if (card->options.performance_stats) {
3597 card->perf_stats.cq_cnt++;
3598 card->perf_stats.cq_start_time = qeth_get_micros();
3599 }
3600
3601 for (i = first_element; i < first_element + count; ++i) {
3602 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
6d284bde 3603 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
0da9581d
EL		 3604 int e;
3605
3606 e = 0;
903e4853
UB		 3607 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
3608 buffer->element[e].addr) {
0da9581d
EL		 3609 unsigned long phys_aob_addr;
3610
3611 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3612 qeth_qdio_handle_aob(card, phys_aob_addr);
3613 buffer->element[e].addr = NULL;
3614 buffer->element[e].eflags = 0;
3615 buffer->element[e].sflags = 0;
3616 buffer->element[e].length = 0;
3617
3618 ++e;
3619 }
3620
3621 buffer->element[15].eflags = 0;
3622 buffer->element[15].sflags = 0;
3623 }
3624 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3625 card->qdio.c_q->next_buf_to_init,
3626 count);
3627 if (rc) {
3628 dev_warn(&card->gdev->dev,
3629 "QDIO reported an error, rc=%i\n", rc);
3630 QETH_CARD_TEXT(card, 2, "qcqherr");
3631 }
3632 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3633 + count) % QDIO_MAX_BUFFERS_PER_Q;
3634
3635 netif_wake_queue(card->dev);
3636
3637 if (card->options.performance_stats) {
3638 int delta_t = qeth_get_micros();
3639 delta_t -= card->perf_stats.cq_start_time;
3640 card->perf_stats.cq_time += delta_t;
3641 }
3642out:
3643 return;
3644}
3645
a1c3ed4c 3646void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
0da9581d 3647 unsigned int queue, int first_elem, int count,
a1c3ed4c
FB		 3648 unsigned long card_ptr)
3649{
3650 struct qeth_card *card = (struct qeth_card *)card_ptr;
3651
0da9581d
EL		 3652 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3653 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3654
3655 if (qeth_is_cq(card, queue))
3656 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3657 else if (qdio_err)
a1c3ed4c 3658 qeth_schedule_recovery(card);
0da9581d
EL		 3659
3660
a1c3ed4c
FB		 3661}
3662EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3663
779e6e1c
JG		 3664void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3665 unsigned int qdio_error, int __queue, int first_element,
3666 int count, unsigned long card_ptr)
4a71df50
FB		 3667{
3668 struct qeth_card *card = (struct qeth_card *) card_ptr;
3669 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3670 struct qeth_qdio_out_buffer *buffer;
3671 int i;
3672
847a50fd 3673 QETH_CARD_TEXT(card, 6, "qdouhdl");
1549d13f 3674 if (qdio_error & QDIO_ERROR_FATAL) {
847a50fd 3675 QETH_CARD_TEXT(card, 2, "achkcond");
779e6e1c
JG		 3676 netif_stop_queue(card->dev);
3677 qeth_schedule_recovery(card);
3678 return;
4a71df50
FB		 3679 }
3680 if (card->options.performance_stats) {
3681 card->perf_stats.outbound_handler_cnt++;
3682 card->perf_stats.outbound_handler_start_time =
3683 qeth_get_micros();
3684 }
3685 for (i = first_element; i < (first_element + count); ++i) {
0da9581d
EL		 3686 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3687 buffer = queue->bufs[bidx];
b67d801f 3688 qeth_handle_send_error(card, buffer, qdio_error);
0da9581d
EL		 3689
3690 if (queue->bufstates &&
3691 (queue->bufstates[bidx].flags &
3692 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
18af5c17 3693 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
b3332930
FB		 3694
3695 if (atomic_cmpxchg(&buffer->state,
3696 QETH_QDIO_BUF_PRIMED,
3697 QETH_QDIO_BUF_PENDING) ==
3698 QETH_QDIO_BUF_PRIMED) {
3699 qeth_notify_skbs(queue, buffer,
3700 TX_NOTIFY_PENDING);
3701 }
0da9581d
EL		 3702 buffer->aob = queue->bufstates[bidx].aob;
3703 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
b3332930 3704 QETH_CARD_TEXT(queue->card, 5, "aob");
0da9581d
EL		 3705 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3706 virt_to_phys(buffer->aob));
b3332930
FB		 3707 if (qeth_init_qdio_out_buf(queue, bidx)) {
3708 QETH_CARD_TEXT(card, 2, "outofbuf");
0da9581d 3709 qeth_schedule_recovery(card);
b3332930 3710 }
0da9581d 3711 } else {
b3332930
FB		 3712 if (card->options.cq == QETH_CQ_ENABLED) {
3713 enum iucv_tx_notify n;
3714
3715 n = qeth_compute_cq_notification(
3716 buffer->buffer->element[15].sflags, 0);
3717 qeth_notify_skbs(queue, buffer, n);
3718 }
3719
0da9581d
EL		 3720 qeth_clear_output_buffer(queue, buffer,
3721 QETH_QDIO_BUF_EMPTY);
3722 }
3723 qeth_cleanup_handled_pending(queue, bidx, 0);
4a71df50
FB		 3724 }
3725 atomic_sub(count, &queue->used_buffers);
3726 /* check if we need to do something on this outbound queue */
3727 if (card->info.type != QETH_CARD_TYPE_IQD)
3728 qeth_check_outbound_queue(queue);
3729
3730 netif_wake_queue(queue->card->dev);
3731 if (card->options.performance_stats)
3732 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3733 card->perf_stats.outbound_handler_start_time;
3734}
3735EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3736
70deb016
HW		 3737/* We cannot use outbound queue 3 for unicast packets on HiperSockets */
3738static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
3739{
3740 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
3741 return 2;
3742 return queue_num;
3743}
3744
290b8348
SR		 3745/**
3746 * Note: Function assumes that we have 4 outbound queues.
3747 */
4a71df50
FB		 3748int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3749 int ipv, int cast_type)
3750{
d66cb37e 3751 __be16 *tci;
290b8348
SR		 3752 u8 tos;
3753
290b8348
SR		 3754 if (cast_type && card->info.is_multicast_different)
3755 return card->info.is_multicast_different &
3756 (card->qdio.no_out_queues - 1);
3757
3758 switch (card->qdio.do_prio_queueing) {
3759 case QETH_PRIO_Q_ING_TOS:
3760 case QETH_PRIO_Q_ING_PREC:
3761 switch (ipv) {
3762 case 4:
3763 tos = ipv4_get_dsfield(ip_hdr(skb));
3764 break;
3765 case 6:
3766 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3767 break;
3768 default:
3769 return card->qdio.default_out_queue;
4a71df50 3770 }
290b8348 3771 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
70deb016 3772 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
290b8348 3773 if (tos & IPTOS_MINCOST)
70deb016 3774 return qeth_cut_iqd_prio(card, 3);
290b8348
SR		 3775 if (tos & IPTOS_RELIABILITY)
3776 return 2;
3777 if (tos & IPTOS_THROUGHPUT)
3778 return 1;
3779 if (tos & IPTOS_LOWDELAY)
3780 return 0;
d66cb37e
SR		 3781 break;
3782 case QETH_PRIO_Q_ING_SKB:
3783 if (skb->priority > 5)
3784 return 0;
70deb016 3785 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
d66cb37e
SR		 3786 case QETH_PRIO_Q_ING_VLAN:
3787 tci = &((struct ethhdr *)skb->data)->h_proto;
6bee4e26
HW		 3788 if (be16_to_cpu(*tci) == ETH_P_8021Q)
3789 return qeth_cut_iqd_prio(card,
3790 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
d66cb37e 3791 break;
4a71df50 3792 default:
290b8348 3793 break;
4a71df50 3794 }
290b8348 3795 return card->qdio.default_out_queue;
4a71df50
FB		 3796}
3797EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3798
2863c613
EC		 3799/**
3800 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
3801 * @skb: SKB address
3802 *
3803 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3804 * fragmented part of the SKB. Returns zero for linear SKB.
3805 */
271648b4
FB		 3806int qeth_get_elements_for_frags(struct sk_buff *skb)
3807{
2863c613 3808 int cnt, elements = 0;
271648b4
FB		 3809
3810 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
2863c613
EC		 3811 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
3812
3813 elements += qeth_get_elements_for_range(
3814 (addr_t)skb_frag_address(frag),
3815 (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
271648b4
FB		 3816 }
3817 return elements;
3818}
3819EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3820
2863c613
EC		 3821/**
3822 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
3823 * @card: qeth card structure, to check max. elems.
3824 * @skb: SKB address
3825 * @extra_elems: extra elems needed, to check against max.
7d969d2e 3826 * @data_offset: range starts at skb->data + data_offset
2863c613
EC		 3827 *
3828 * Returns the number of pages, and thus QDIO buffer elements, needed to cover
3829 * skb data, including linear part and fragments. Checks if the result plus
3830 * extra_elems fits under the limit for the card. Returns 0 if it does not.
3831 * Note: extra_elems is not included in the returned result.
3832 */
065cc782 3833int qeth_get_elements_no(struct qeth_card *card,
7d969d2e 3834 struct sk_buff *skb, int extra_elems, int data_offset)
4a71df50 3835{
2863c613 3836 int elements = qeth_get_elements_for_range(
7d969d2e 3837 (addr_t)skb->data + data_offset,
2863c613
EC		 3838 (addr_t)skb->data + skb_headlen(skb)) +
3839 qeth_get_elements_for_frags(skb);
4a71df50 3840
2863c613 3841 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3842 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50 3843 "(Number=%d / Length=%d). Discarded.\n",
2863c613 3844 elements + extra_elems, skb->len);
4a71df50
FB		 3845 return 0;
3846 }
2863c613 3847 return elements;
4a71df50
FB		 3848}
3849EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3850
d4ae1f5e 3851int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
51aa165c
FB		 3852{
3853 int hroom, inpage, rest;
3854
3855 if (((unsigned long)skb->data & PAGE_MASK) !=
3856 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3857 hroom = skb_headroom(skb);
3858 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3859 rest = len - inpage;
3860 if (rest > hroom)
3861 return 1;
2863c613 3862 memmove(skb->data - rest, skb->data, skb_headlen(skb));
51aa165c 3863 skb->data -= rest;
d4ae1f5e
SR		 3864 skb->tail -= rest;
3865 *hdr = (struct qeth_hdr *)skb->data;
51aa165c
FB		 3866 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3867 }
3868 return 0;
3869}
3870EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3871
0d6f02d3
JW		 3872/**
3873 * qeth_push_hdr() - push a qeth_hdr onto an skb.
3874 * @skb: skb that the qeth_hdr should be pushed onto.
3875 * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
3876 * it contains a valid pointer to a qeth_hdr.
3877 * @len: length of the hdr that needs to be pushed on.
3878 *
3879 * Returns the pushed length. If the header can't be pushed on
3880 * (eg. because it would cross a page boundary), it is allocated from
3881 * the cache instead and 0 is returned.
3882 * Error to create the hdr is indicated by returning with < 0.
3883 */
3884int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
3885{
3886 if (skb_headroom(skb) >= len &&
3887 qeth_get_elements_for_range((addr_t)skb->data - len,
3888 (addr_t)skb->data) == 1) {
3889 *hdr = skb_push(skb, len);
3890 return len;
3891 }
3892 /* fall back */
3893 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
3894 if (!*hdr)
3895 return -ENOMEM;
3896 return 0;
3897}
3898EXPORT_SYMBOL_GPL(qeth_push_hdr);
3899
cef6ff22
JW		 3900static void __qeth_fill_buffer(struct sk_buff *skb,
3901 struct qeth_qdio_out_buffer *buf,
3902 bool is_first_elem, unsigned int offset)
4a71df50 3903{
384d2ef1
JW		 3904 struct qdio_buffer *buffer = buf->buffer;
3905 int element = buf->next_element_to_fill;
cc309f83
JW		 3906 int length = skb_headlen(skb) - offset;
3907 char *data = skb->data + offset;
384d2ef1 3908 int length_here, cnt;
4a71df50 3909
cc309f83 3910 /* map linear part into buffer element(s) */
4a71df50
FB		 3911 while (length > 0) {
3912 /* length_here is the remaining amount of data in this page */
3913 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3914 if (length < length_here)
3915 length_here = length;
3916
3917 buffer->element[element].addr = data;
3918 buffer->element[element].length = length_here;
3919 length -= length_here;
384d2ef1
JW		 3920 if (is_first_elem) {
3921 is_first_elem = false;
5258830b
JW		 3922 if (length || skb_is_nonlinear(skb))
3923 /* skb needs additional elements */
3ec90878 3924 buffer->element[element].eflags =
5258830b 3925 SBAL_EFLAGS_FIRST_FRAG;
4a71df50 3926 else
5258830b
JW		 3927 buffer->element[element].eflags = 0;
3928 } else {
3929 buffer->element[element].eflags =
3930 SBAL_EFLAGS_MIDDLE_FRAG;
4a71df50
FB		 3931 }
3932 data += length_here;
3933 element++;
4a71df50 3934 }
51aa165c 3935
cc309f83 3936 /* map page frags into buffer element(s) */
51aa165c 3937 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
f8eb4930
JW		 3938 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
3939
3940 data = skb_frag_address(frag);
3941 length = skb_frag_size(frag);
271648b4
FB		 3942 while (length > 0) {
3943 length_here = PAGE_SIZE -
3944 ((unsigned long) data % PAGE_SIZE);
3945 if (length < length_here)
3946 length_here = length;
3947
3948 buffer->element[element].addr = data;
3949 buffer->element[element].length = length_here;
3950 buffer->element[element].eflags =
3951 SBAL_EFLAGS_MIDDLE_FRAG;
3952 length -= length_here;
3953 data += length_here;
3954 element++;
3955 }
51aa165c
FB		 3956 }
3957
3ec90878
JG		 3958 if (buffer->element[element - 1].eflags)
3959 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
384d2ef1 3960 buf->next_element_to_fill = element;
4a71df50
FB		 3961}
3962
eaf3cc08
JW		 3963/**
3964 * qeth_fill_buffer() - map skb into an output buffer
3965 * @queue: QDIO queue to submit the buffer on
3966 * @buf: buffer to transport the skb
3967 * @skb: skb to map into the buffer
3968 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
3969 * from qeth_core_header_cache.
3970 * @offset: when mapping the skb, start at skb->data + offset
3971 * @hd_len: if > 0, build a dedicated header element of this size
3972 */
cef6ff22
JW		 3973static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3974 struct qeth_qdio_out_buffer *buf,
3975 struct sk_buff *skb, struct qeth_hdr *hdr,
13ddacb5 3976 unsigned int offset, unsigned int hd_len)
4a71df50 3977{
eaf3cc08 3978 struct qdio_buffer *buffer = buf->buffer;
384d2ef1 3979 bool is_first_elem = true;
13ddacb5 3980 int flush_cnt = 0;
4a71df50 3981
63354797 3982 refcount_inc(&skb->users);
4a71df50
FB		 3983 skb_queue_tail(&buf->skb_list, skb);
3984
eaf3cc08
JW		 3985 /* build dedicated header element */
3986 if (hd_len) {
683d718a 3987 int element = buf->next_element_to_fill;
384d2ef1
JW		 3988 is_first_elem = false;
3989
683d718a 3990 buffer->element[element].addr = hdr;
f1588177 3991 buffer->element[element].length = hd_len;
3ec90878 3992 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
eaf3cc08
JW		 3993 /* remember to free cache-allocated qeth_hdr: */
3994 buf->is_header[element] = ((void *)hdr != skb->data);
683d718a
FB		 3995 buf->next_element_to_fill++;
3996 }
3997
384d2ef1 3998 __qeth_fill_buffer(skb, buf, is_first_elem, offset);
4a71df50
FB		 3999
4000 if (!queue->do_pack) {
847a50fd 4001 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4a71df50
FB		 4002 /* set state to PRIMED -> will be flushed */
4003 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4004 flush_cnt = 1;
4005 } else {
847a50fd 4006 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4a71df50
FB		 4007 if (queue->card->options.performance_stats)
4008 queue->card->perf_stats.skbs_sent_pack++;
4009 if (buf->next_element_to_fill >=
4010 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4011 /*
4012 * packed buffer if full -> set state PRIMED
4013 * -> will be flushed
4014 */
4015 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4016 flush_cnt = 1;
4017 }
4018 }
4019 return flush_cnt;
4020}
4021
7c2e9ba3 4022int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
cc309f83 4023 struct qeth_hdr *hdr, unsigned int offset,
13ddacb5 4024 unsigned int hd_len)
4a71df50 4025{
7c2e9ba3
JW		 4026 int index = queue->next_buf_to_fill;
4027 struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
4a71df50 4028
4a71df50
FB		 4029 /*
4030 * check if buffer is empty to make sure that we do not 'overtake'
4031 * ourselves and try to fill a buffer that is already primed
4032 */
4033 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
7c2e9ba3
JW		 4034 return -EBUSY;
4035 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
64ef8957
FB		 4036 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4037 qeth_flush_buffers(queue, index, 1);
4a71df50 4038 return 0;
4a71df50
FB		 4039}
4040EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4041
4042int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
13ddacb5 4043 struct sk_buff *skb, struct qeth_hdr *hdr,
9c3bfda9
JW		 4044 unsigned int offset, unsigned int hd_len,
4045 int elements_needed)
4a71df50
FB		 4046{
4047 struct qeth_qdio_out_buffer *buffer;
4048 int start_index;
4049 int flush_count = 0;
4050 int do_pack = 0;
4051 int tmp;
4052 int rc = 0;
4053
4a71df50
FB		 4054 /* spin until we get the queue ... */
4055 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4056 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4057 start_index = queue->next_buf_to_fill;
0da9581d 4058 buffer = queue->bufs[queue->next_buf_to_fill];
4a71df50
FB		 4059 /*
4060 * check if buffer is empty to make sure that we do not 'overtake'
4061 * ourselves and try to fill a buffer that is already primed
4062 */
4063 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4064 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4065 return -EBUSY;
4066 }
4067 /* check if we need to switch packing state of this queue */
4068 qeth_switch_to_packing_if_needed(queue);
4069 if (queue->do_pack) {
4070 do_pack = 1;
64ef8957
FB		 4071 /* does packet fit in current buffer? */
4072 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4073 buffer->next_element_to_fill) < elements_needed) {
4074 /* ... no -> set state PRIMED */
4075 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4076 flush_count++;
4077 queue->next_buf_to_fill =
4078 (queue->next_buf_to_fill + 1) %
4079 QDIO_MAX_BUFFERS_PER_Q;
0da9581d 4080 buffer = queue->bufs[queue->next_buf_to_fill];
64ef8957
FB		 4081 /* we did a step forward, so check buffer state
4082 * again */
4083 if (atomic_read(&buffer->state) !=
4084 QETH_QDIO_BUF_EMPTY) {
4085 qeth_flush_buffers(queue, start_index,
779e6e1c 4086 flush_count);
64ef8957 4087 atomic_set(&queue->state,
4a71df50 4088 QETH_OUT_Q_UNLOCKED);
3cdc8a25
JW		 4089 rc = -EBUSY;
4090 goto out;
4a71df50
FB		 4091 }
4092 }
4093 }
9c3bfda9 4094 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4a71df50
FB		 4095 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4096 QDIO_MAX_BUFFERS_PER_Q;
4097 flush_count += tmp;
4a71df50 4098 if (flush_count)
779e6e1c 4099 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 4100 else if (!atomic_read(&queue->set_pci_flags_count))
4101 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4102 /*
4103 * queue->state will go from LOCKED -> UNLOCKED or from
4104 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
4105 * (switch packing state or flush buffer to get another pci flag out).
4106 * In that case we will enter this loop
4107 */
4108 while (atomic_dec_return(&queue->state)) {
4a71df50
FB		 4109 start_index = queue->next_buf_to_fill;
4110 /* check if we can go back to non-packing state */
3cdc8a25 4111 tmp = qeth_switch_to_nonpacking_if_needed(queue);
4a71df50
FB		 4112 /*
4113 * check if we need to flush a packing buffer to get a pci
4114 * flag out on the queue
4115 */
3cdc8a25
JW		 4116 if (!tmp && !atomic_read(&queue->set_pci_flags_count))
4117 tmp = qeth_prep_flush_pack_buffer(queue);
4118 if (tmp) {
4119 qeth_flush_buffers(queue, start_index, tmp);
4120 flush_count += tmp;
4121 }
4a71df50 4122 }
3cdc8a25 4123out:
4a71df50
FB		 4124 /* at this point the queue is UNLOCKED again */
4125 if (queue->card->options.performance_stats && do_pack)
4126 queue->card->perf_stats.bufs_sent_pack += flush_count;
4127
4128 return rc;
4129}
4130EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4131
4132static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4133 struct qeth_reply *reply, unsigned long data)
4134{
4135 struct qeth_ipa_cmd *cmd;
4136 struct qeth_ipacmd_setadpparms *setparms;
4137
847a50fd 4138 QETH_CARD_TEXT(card, 4, "prmadpcb");
4a71df50
FB		 4139
4140 cmd = (struct qeth_ipa_cmd *) data;
4141 setparms = &(cmd->data.setadapterparms);
4142
4143 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4144 if (cmd->hdr.return_code) {
8a593148 4145 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4a71df50
FB		 4146 setparms->data.mode = SET_PROMISC_MODE_OFF;
4147 }
4148 card->info.promisc_mode = setparms->data.mode;
4149 return 0;
4150}
4151
4152void qeth_setadp_promisc_mode(struct qeth_card *card)
4153{
4154 enum qeth_ipa_promisc_modes mode;
4155 struct net_device *dev = card->dev;
4156 struct qeth_cmd_buffer *iob;
4157 struct qeth_ipa_cmd *cmd;
4158
847a50fd 4159 QETH_CARD_TEXT(card, 4, "setprom");
4a71df50
FB		 4160
4161 if (((dev->flags & IFF_PROMISC) &&
4162 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4163 (!(dev->flags & IFF_PROMISC) &&
4164 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4165 return;
4166 mode = SET_PROMISC_MODE_OFF;
4167 if (dev->flags & IFF_PROMISC)
4168 mode = SET_PROMISC_MODE_ON;
847a50fd 4169 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4a71df50
FB		 4170
4171 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
ca5b20ac 4172 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
1aec42bc
TR		 4173 if (!iob)
4174 return;
4a71df50
FB		 4175 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4176 cmd->data.setadapterparms.data.mode = mode;
4177 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4178}
4179EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4180
4181int qeth_change_mtu(struct net_device *dev, int new_mtu)
4182{
4183 struct qeth_card *card;
4184 char dbf_text[15];
4185
509e2562 4186 card = dev->ml_priv;
4a71df50 4187
847a50fd 4188 QETH_CARD_TEXT(card, 4, "chgmtu");
4a71df50 4189 sprintf(dbf_text, "%8x", new_mtu);
847a50fd 4190 QETH_CARD_TEXT(card, 4, dbf_text);
4a71df50 4191
4845b93f 4192 if (!qeth_mtu_is_valid(card, new_mtu))
4a71df50
FB		 4193 return -EINVAL;
4194 dev->mtu = new_mtu;
4195 return 0;
4196}
4197EXPORT_SYMBOL_GPL(qeth_change_mtu);
4198
4199struct net_device_stats *qeth_get_stats(struct net_device *dev)
4200{
4201 struct qeth_card *card;
4202
509e2562 4203 card = dev->ml_priv;
4a71df50 4204
847a50fd 4205 QETH_CARD_TEXT(card, 5, "getstat");
4a71df50
FB		 4206
4207 return &card->stats;
4208}
4209EXPORT_SYMBOL_GPL(qeth_get_stats);
4210
4211static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4212 struct qeth_reply *reply, unsigned long data)
4213{
4214 struct qeth_ipa_cmd *cmd;
4215
847a50fd 4216 QETH_CARD_TEXT(card, 4, "chgmaccb");
4a71df50
FB		 4217
4218 cmd = (struct qeth_ipa_cmd *) data;
4219 if (!card->options.layer2 ||
4220 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4221 memcpy(card->dev->dev_addr,
4222 &cmd->data.setadapterparms.data.change_addr.addr,
4223 OSA_ADDR_LEN);
4224 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4225 }
4226 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4227 return 0;
4228}
4229
4230int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4231{
4232 int rc;
4233 struct qeth_cmd_buffer *iob;
4234 struct qeth_ipa_cmd *cmd;
4235
847a50fd 4236 QETH_CARD_TEXT(card, 4, "chgmac");
4a71df50
FB		 4237
4238 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
ca5b20ac
SR		 4239 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4240 sizeof(struct qeth_change_addr));
1aec42bc
TR		 4241 if (!iob)
4242 return -ENOMEM;
4a71df50
FB		 4243 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4244 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4245 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4246 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4247 card->dev->dev_addr, OSA_ADDR_LEN);
4248 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4249 NULL);
4250 return rc;
4251}
4252EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4253
d64ecc22
EL		 4254static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4255 struct qeth_reply *reply, unsigned long data)
4256{
4257 struct qeth_ipa_cmd *cmd;
4258 struct qeth_set_access_ctrl *access_ctrl_req;
0f54761d 4259 int fallback = *(int *)reply->param;
d64ecc22 4260
847a50fd 4261 QETH_CARD_TEXT(card, 4, "setaccb");
d64ecc22
EL		 4262
4263 cmd = (struct qeth_ipa_cmd *) data;
4264 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4265 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4266 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4267 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4268 cmd->data.setadapterparms.hdr.return_code);
0f54761d
SR		 4269 if (cmd->data.setadapterparms.hdr.return_code !=
4270 SET_ACCESS_CTRL_RC_SUCCESS)
4271 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4272 card->gdev->dev.kobj.name,
4273 access_ctrl_req->subcmd_code,
4274 cmd->data.setadapterparms.hdr.return_code);
d64ecc22
EL		 4275 switch (cmd->data.setadapterparms.hdr.return_code) {
4276 case SET_ACCESS_CTRL_RC_SUCCESS:
d64ecc22
EL		 4277 if (card->options.isolation == ISOLATION_MODE_NONE) {
4278 dev_info(&card->gdev->dev,
4279 "QDIO data connection isolation is deactivated\n");
4280 } else {
4281 dev_info(&card->gdev->dev,
4282 "QDIO data connection isolation is activated\n");
4283 }
d64ecc22 4284 break;
0f54761d
SR		 4285 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4286 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4287 "deactivated\n", dev_name(&card->gdev->dev));
4288 if (fallback)
4289 card->options.isolation = card->options.prev_isolation;
4290 break;
4291 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4292 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4293 " activated\n", dev_name(&card->gdev->dev));
4294 if (fallback)
4295 card->options.isolation = card->options.prev_isolation;
4296 break;
d64ecc22 4297 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
d64ecc22
EL		 4298 dev_err(&card->gdev->dev, "Adapter does not "
4299 "support QDIO data connection isolation\n");
d64ecc22 4300 break;
d64ecc22 4301 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
d64ecc22
EL		 4302 dev_err(&card->gdev->dev,
4303 "Adapter is dedicated. "
4304 "QDIO data connection isolation not supported\n");
0f54761d
SR		 4305 if (fallback)
4306 card->options.isolation = card->options.prev_isolation;
d64ecc22 4307 break;
d64ecc22 4308 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
d64ecc22
EL		 4309 dev_err(&card->gdev->dev,
4310 "TSO does not permit QDIO data connection isolation\n");
0f54761d
SR		 4311 if (fallback)
4312 card->options.isolation = card->options.prev_isolation;
4313 break;
4314 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4315 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4316 "support reflective relay mode\n");
4317 if (fallback)
4318 card->options.isolation = card->options.prev_isolation;
4319 break;
4320 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4321 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4322 "enabled at the adjacent switch port");
4323 if (fallback)
4324 card->options.isolation = card->options.prev_isolation;
4325 break;
4326 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4327 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4328 "at the adjacent switch failed\n");
d64ecc22 4329 break;
d64ecc22 4330 default:
d64ecc22 4331 /* this should never happen */
0f54761d
SR		 4332 if (fallback)
4333 card->options.isolation = card->options.prev_isolation;
d64ecc22
EL		 4334 break;
4335 }
d64ecc22 4336 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
bbb822a8 4337 return 0;
d64ecc22
EL		 4338}
4339
4340static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
0f54761d 4341 enum qeth_ipa_isolation_modes isolation, int fallback)
d64ecc22
EL		 4342{
4343 int rc;
4344 struct qeth_cmd_buffer *iob;
4345 struct qeth_ipa_cmd *cmd;
4346 struct qeth_set_access_ctrl *access_ctrl_req;
4347
847a50fd 4348 QETH_CARD_TEXT(card, 4, "setacctl");
d64ecc22
EL		 4349
4350 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4351 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4352
4353 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4354 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4355 sizeof(struct qeth_set_access_ctrl));
1aec42bc
TR		 4356 if (!iob)
4357 return -ENOMEM;
d64ecc22
EL		 4358 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4359 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4360 access_ctrl_req->subcmd_code = isolation;
4361
4362 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
0f54761d 4363 &fallback);
d64ecc22
EL		 4364 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4365 return rc;
4366}
4367
0f54761d 4368int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
d64ecc22
EL		 4369{
4370 int rc = 0;
4371
847a50fd 4372 QETH_CARD_TEXT(card, 4, "setactlo");
d64ecc22 4373
5113fec0
UB		 4374 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4375 card->info.type == QETH_CARD_TYPE_OSX) &&
4376 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
d64ecc22 4377 rc = qeth_setadpparms_set_access_ctrl(card,
0f54761d 4378 card->options.isolation, fallback);
d64ecc22
EL		 4379 if (rc) {
4380 QETH_DBF_MESSAGE(3,
5113fec0 4381 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
d64ecc22
EL		 4382 card->gdev->dev.kobj.name,
4383 rc);
0f54761d 4384 rc = -EOPNOTSUPP;
d64ecc22
EL		 4385 }
4386 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4387 card->options.isolation = ISOLATION_MODE_NONE;
4388
4389 dev_err(&card->gdev->dev, "Adapter does not "
4390 "support QDIO data connection isolation\n");
4391 rc = -EOPNOTSUPP;
4392 }
4393 return rc;
4394}
4395EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4396
4a71df50
FB		 4397void qeth_tx_timeout(struct net_device *dev)
4398{
4399 struct qeth_card *card;
4400
509e2562 4401 card = dev->ml_priv;
847a50fd 4402 QETH_CARD_TEXT(card, 4, "txtimeo");
4a71df50
FB		 4403 card->stats.tx_errors++;
4404 qeth_schedule_recovery(card);
4405}
4406EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4407
942d6984 4408static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4a71df50 4409{
509e2562 4410 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4411 int rc = 0;
4412
4413 switch (regnum) {
4414 case MII_BMCR: /* Basic mode control register */
4415 rc = BMCR_FULLDPLX;
4416 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4417 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4418 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4419 rc |= BMCR_SPEED100;
4420 break;
4421 case MII_BMSR: /* Basic mode status register */
4422 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4423 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4424 BMSR_100BASE4;
4425 break;
4426 case MII_PHYSID1: /* PHYS ID 1 */
4427 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4428 dev->dev_addr[2];
4429 rc = (rc >> 5) & 0xFFFF;
4430 break;
4431 case MII_PHYSID2: /* PHYS ID 2 */
4432 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4433 break;
4434 case MII_ADVERTISE: /* Advertisement control reg */
4435 rc = ADVERTISE_ALL;
4436 break;
4437 case MII_LPA: /* Link partner ability reg */
4438 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4439 LPA_100BASE4 | LPA_LPACK;
4440 break;
4441 case MII_EXPANSION: /* Expansion register */
4442 break;
4443 case MII_DCOUNTER: /* disconnect counter */
4444 break;
4445 case MII_FCSCOUNTER: /* false carrier counter */
4446 break;
4447 case MII_NWAYTEST: /* N-way auto-neg test register */
4448 break;
4449 case MII_RERRCOUNTER: /* rx error counter */
4450 rc = card->stats.rx_errors;
4451 break;
4452 case MII_SREVISION: /* silicon revision */
4453 break;
4454 case MII_RESV1: /* reserved 1 */
4455 break;
4456 case MII_LBRERROR: /* loopback, rx, bypass error */
4457 break;
4458 case MII_PHYADDR: /* physical address */
4459 break;
4460 case MII_RESV2: /* reserved 2 */
4461 break;
4462 case MII_TPISTATUS: /* TPI status for 10mbps */
4463 break;
4464 case MII_NCONFIG: /* network interface config */
4465 break;
4466 default:
4467 break;
4468 }
4469 return rc;
4470}
4a71df50
FB		 4471
4472static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4473 struct qeth_cmd_buffer *iob, int len,
4474 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4475 unsigned long),
4476 void *reply_param)
4477{
4478 u16 s1, s2;
4479
847a50fd 4480 QETH_CARD_TEXT(card, 4, "sendsnmp");
4a71df50
FB		 4481
4482 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4483 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4484 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4485 /* adjust PDU length fields in IPA_PDU_HEADER */
4486 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4487 s2 = (u32) len;
4488 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4489 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4490 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4491 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4492 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4493 reply_cb, reply_param);
4494}
4495
4496static int qeth_snmp_command_cb(struct qeth_card *card,
4497 struct qeth_reply *reply, unsigned long sdata)
4498{
4499 struct qeth_ipa_cmd *cmd;
4500 struct qeth_arp_query_info *qinfo;
4501 struct qeth_snmp_cmd *snmp;
4502 unsigned char *data;
4503 __u16 data_len;
4504
847a50fd 4505 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4a71df50
FB		 4506
4507 cmd = (struct qeth_ipa_cmd *) sdata;
4508 data = (unsigned char *)((char *)cmd - reply->offset);
4509 qinfo = (struct qeth_arp_query_info *) reply->param;
4510 snmp = &cmd->data.setadapterparms.data.snmp;
4511
4512 if (cmd->hdr.return_code) {
8a593148 4513 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4a71df50
FB		 4514 return 0;
4515 }
4516 if (cmd->data.setadapterparms.hdr.return_code) {
4517 cmd->hdr.return_code =
4518 cmd->data.setadapterparms.hdr.return_code;
8a593148 4519 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4a71df50
FB		 4520 return 0;
4521 }
4522 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4523 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4524 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4525 else
4526 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4527
4528 /* check if there is enough room in userspace */
4529 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
847a50fd 4530 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
e0a8114c 4531 cmd->hdr.return_code = IPA_RC_ENOMEM;
4a71df50
FB		 4532 return 0;
4533 }
847a50fd 4534 QETH_CARD_TEXT_(card, 4, "snore%i",
4a71df50 4535 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4536 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4a71df50
FB		 4537 cmd->data.setadapterparms.hdr.seq_no);
4538 /*copy entries to user buffer*/
4539 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4540 memcpy(qinfo->udata + qinfo->udata_offset,
4541 (char *)snmp,
4542 data_len + offsetof(struct qeth_snmp_cmd, data));
4543 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4544 } else {
4545 memcpy(qinfo->udata + qinfo->udata_offset,
4546 (char *)&snmp->request, data_len);
4547 }
4548 qinfo->udata_offset += data_len;
4549 /* check if all replies received ... */
847a50fd 4550 QETH_CARD_TEXT_(card, 4, "srtot%i",
4a71df50 4551 cmd->data.setadapterparms.hdr.used_total);
847a50fd 4552 QETH_CARD_TEXT_(card, 4, "srseq%i",
4a71df50
FB		 4553 cmd->data.setadapterparms.hdr.seq_no);
4554 if (cmd->data.setadapterparms.hdr.seq_no <
4555 cmd->data.setadapterparms.hdr.used_total)
4556 return 1;
4557 return 0;
4558}
4559
942d6984 4560static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4a71df50
FB		 4561{
4562 struct qeth_cmd_buffer *iob;
4563 struct qeth_ipa_cmd *cmd;
4564 struct qeth_snmp_ureq *ureq;
6fb392b1 4565 unsigned int req_len;
4a71df50
FB		 4566 struct qeth_arp_query_info qinfo = {0, };
4567 int rc = 0;
4568
847a50fd 4569 QETH_CARD_TEXT(card, 3, "snmpcmd");
4a71df50
FB		 4570
4571 if (card->info.guestlan)
4572 return -EOPNOTSUPP;
4573
4574 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4575 (!card->options.layer2)) {
4a71df50
FB		 4576 return -EOPNOTSUPP;
4577 }
4578 /* skip 4 bytes (data_len struct member) to get req_len */
4579 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4580 return -EFAULT;
6fb392b1
UB		 4581 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4582 sizeof(struct qeth_ipacmd_hdr) -
4583 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4584 return -EINVAL;
4986f3f0
JL		 4585 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4586 if (IS_ERR(ureq)) {
847a50fd 4587 QETH_CARD_TEXT(card, 2, "snmpnome");
4986f3f0 4588 return PTR_ERR(ureq);
4a71df50
FB		 4589 }
4590 qinfo.udata_len = ureq->hdr.data_len;
4591 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4592 if (!qinfo.udata) {
4593 kfree(ureq);
4594 return -ENOMEM;
4595 }
4596 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4597
4598 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4599 QETH_SNMP_SETADP_CMDLENGTH + req_len);
1aec42bc
TR		 4600 if (!iob) {
4601 rc = -ENOMEM;
4602 goto out;
4603 }
4a71df50
FB		 4604 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4605 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4606 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4607 qeth_snmp_command_cb, (void *)&qinfo);
4608 if (rc)
14cc21b6 4609 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 4610 QETH_CARD_IFNAME(card), rc);
4611 else {
4612 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4613 rc = -EFAULT;
4614 }
1aec42bc 4615out:
4a71df50
FB		 4616 kfree(ureq);
4617 kfree(qinfo.udata);
4618 return rc;
4619}
4a71df50 4620
c3ab96f3
FB		 4621static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4622 struct qeth_reply *reply, unsigned long data)
4623{
4624 struct qeth_ipa_cmd *cmd;
4625 struct qeth_qoat_priv *priv;
4626 char *resdata;
4627 int resdatalen;
4628
4629 QETH_CARD_TEXT(card, 3, "qoatcb");
4630
4631 cmd = (struct qeth_ipa_cmd *)data;
4632 priv = (struct qeth_qoat_priv *)reply->param;
4633 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4634 resdata = (char *)data + 28;
4635
4636 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4637 cmd->hdr.return_code = IPA_RC_FFFF;
4638 return 0;
4639 }
4640
4641 memcpy((priv->buffer + priv->response_len), resdata,
4642 resdatalen);
4643 priv->response_len += resdatalen;
4644
4645 if (cmd->data.setadapterparms.hdr.seq_no <
4646 cmd->data.setadapterparms.hdr.used_total)
4647 return 1;
4648 return 0;
4649}
4650
942d6984 4651static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
c3ab96f3
FB		 4652{
4653 int rc = 0;
4654 struct qeth_cmd_buffer *iob;
4655 struct qeth_ipa_cmd *cmd;
4656 struct qeth_query_oat *oat_req;
4657 struct qeth_query_oat_data oat_data;
4658 struct qeth_qoat_priv priv;
4659 void __user *tmp;
4660
4661 QETH_CARD_TEXT(card, 3, "qoatcmd");
4662
4663 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4664 rc = -EOPNOTSUPP;
4665 goto out;
4666 }
4667
4668 if (copy_from_user(&oat_data, udata,
4669 sizeof(struct qeth_query_oat_data))) {
4670 rc = -EFAULT;
4671 goto out;
4672 }
4673
4674 priv.buffer_len = oat_data.buffer_len;
4675 priv.response_len = 0;
4676 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4677 if (!priv.buffer) {
4678 rc = -ENOMEM;
4679 goto out;
4680 }
4681
4682 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4683 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4684 sizeof(struct qeth_query_oat));
1aec42bc
TR		 4685 if (!iob) {
4686 rc = -ENOMEM;
4687 goto out_free;
4688 }
c3ab96f3
FB		 4689 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4690 oat_req = &cmd->data.setadapterparms.data.query_oat;
4691 oat_req->subcmd_code = oat_data.command;
4692
4693 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4694 &priv);
4695 if (!rc) {
4696 if (is_compat_task())
4697 tmp = compat_ptr(oat_data.ptr);
4698 else
4699 tmp = (void __user *)(unsigned long)oat_data.ptr;
4700
4701 if (copy_to_user(tmp, priv.buffer,
4702 priv.response_len)) {
4703 rc = -EFAULT;
4704 goto out_free;
4705 }
4706
4707 oat_data.response_len = priv.response_len;
4708
4709 if (copy_to_user(udata, &oat_data,
4710 sizeof(struct qeth_query_oat_data)))
4711 rc = -EFAULT;
4712 } else
4713 if (rc == IPA_RC_FFFF)
4714 rc = -EFAULT;
4715
4716out_free:
4717 kfree(priv.buffer);
4718out:
4719 return rc;
4720}
c3ab96f3 4721
e71e4072
HC		 4722static int qeth_query_card_info_cb(struct qeth_card *card,
4723 struct qeth_reply *reply, unsigned long data)
02d5cb5b
EC		 4724{
4725 struct qeth_ipa_cmd *cmd;
4726 struct qeth_query_card_info *card_info;
4727 struct carrier_info *carrier_info;
4728
4729 QETH_CARD_TEXT(card, 2, "qcrdincb");
4730 carrier_info = (struct carrier_info *)reply->param;
4731 cmd = (struct qeth_ipa_cmd *)data;
4732 card_info = &cmd->data.setadapterparms.data.card_info;
4733 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4734 carrier_info->card_type = card_info->card_type;
4735 carrier_info->port_mode = card_info->port_mode;
4736 carrier_info->port_speed = card_info->port_speed;
4737 }
4738
4739 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4740 return 0;
4741}
4742
bca51650 4743static int qeth_query_card_info(struct qeth_card *card,
02d5cb5b
EC		 4744 struct carrier_info *carrier_info)
4745{
4746 struct qeth_cmd_buffer *iob;
4747
4748 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4749 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4750 return -EOPNOTSUPP;
4751 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4752 sizeof(struct qeth_ipacmd_setadpparms_hdr));
1aec42bc
TR		 4753 if (!iob)
4754 return -ENOMEM;
02d5cb5b
EC		 4755 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4756 (void *)carrier_info);
4757}
02d5cb5b 4758
ec61bd2f
JW		 4759/**
4760 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
4761 * @card: pointer to a qeth_card
4762 *
4763 * Returns
4764 * 0, if a MAC address has been set for the card's netdevice
4765 * a return code, for various error conditions
4766 */
4767int qeth_vm_request_mac(struct qeth_card *card)
4768{
4769 struct diag26c_mac_resp *response;
4770 struct diag26c_mac_req *request;
4771 struct ccw_dev_id id;
4772 int rc;
4773
4774 QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
4775
4776 if (!card->dev)
4777 return -ENODEV;
4778
4779 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
4780 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
4781 if (!request || !response) {
4782 rc = -ENOMEM;
4783 goto out;
4784 }
4785
4786 ccw_device_get_id(CARD_DDEV(card), &id);
4787 request->resp_buf_len = sizeof(*response);
4788 request->resp_version = DIAG26C_VERSION2;
4789 request->op_code = DIAG26C_GET_MAC;
4790 request->devno = id.devno;
4791
4792 rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
4793 if (rc)
4794 goto out;
4795
4796 if (request->resp_buf_len < sizeof(*response) ||
4797 response->version != request->resp_version) {
4798 rc = -EIO;
4799 QETH_DBF_TEXT(SETUP, 2, "badresp");
4800 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
4801 sizeof(request->resp_buf_len));
4802 } else if (!is_valid_ether_addr(response->mac)) {
4803 rc = -EINVAL;
4804 QETH_DBF_TEXT(SETUP, 2, "badmac");
4805 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
4806 } else {
4807 ether_addr_copy(card->dev->dev_addr, response->mac);
4808 }
4809
4810out:
4811 kfree(response);
4812 kfree(request);
4813 return rc;
4814}
4815EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
4816
cef6ff22 4817static int qeth_get_qdio_q_format(struct qeth_card *card)
4a71df50 4818{
aa59004b
JW		 4819 if (card->info.type == QETH_CARD_TYPE_IQD)
4820 return QDIO_IQDIO_QFMT;
4821 else
4822 return QDIO_QETH_QFMT;
4a71df50
FB		 4823}
4824
d0ff1f52
UB		 4825static void qeth_determine_capabilities(struct qeth_card *card)
4826{
4827 int rc;
4828 int length;
4829 char *prcd;
4830 struct ccw_device *ddev;
4831 int ddev_offline = 0;
4832
4833 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4834 ddev = CARD_DDEV(card);
4835 if (!ddev->online) {
4836 ddev_offline = 1;
4837 rc = ccw_device_set_online(ddev);
4838 if (rc) {
4839 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4840 goto out;
4841 }
4842 }
4843
4844 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4845 if (rc) {
4846 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4847 dev_name(&card->gdev->dev), rc);
4848 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4849 goto out_offline;
4850 }
4851 qeth_configure_unitaddr(card, prcd);
7e665afb
UB		 4852 if (ddev_offline)
4853 qeth_configure_blkt_default(card, prcd);
d0ff1f52
UB		 4854 kfree(prcd);
4855
4856 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4857 if (rc)
4858 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4859
0da9581d 4860 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
bbeb2414
JW		 4861 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
4862 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
4863 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
0da9581d
EL		 4864 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4865 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4866 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4867 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4868 dev_info(&card->gdev->dev,
4869 "Completion Queueing supported\n");
4870 } else {
4871 card->options.cq = QETH_CQ_NOTAVAILABLE;
4872 }
4873
4874
d0ff1f52
UB		 4875out_offline:
4876 if (ddev_offline == 1)
4877 ccw_device_set_offline(ddev);
4878out:
4879 return;
4880}
4881
cef6ff22
JW		 4882static void qeth_qdio_establish_cq(struct qeth_card *card,
4883 struct qdio_buffer **in_sbal_ptrs,
4884 void (**queue_start_poll)
4885 (struct ccw_device *, int,
4886 unsigned long))
4887{
0da9581d
EL		 4888 int i;
4889
4890 if (card->options.cq == QETH_CQ_ENABLED) {
4891 int offset = QDIO_MAX_BUFFERS_PER_Q *
4892 (card->qdio.no_in_queues - 1);
0da9581d
EL		 4893 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4894 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4895 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4896 }
4897
4898 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4899 }
4900}
4901
4a71df50
FB		 4902static int qeth_qdio_establish(struct qeth_card *card)
4903{
4904 struct qdio_initialize init_data;
4905 char *qib_param_field;
4906 struct qdio_buffer **in_sbal_ptrs;
104ea556 4907 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4a71df50
FB		 4908 struct qdio_buffer **out_sbal_ptrs;
4909 int i, j, k;
4910 int rc = 0;
4911
d11ba0c4 4912 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 4913
4914 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4915 GFP_KERNEL);
104ea556 4916 if (!qib_param_field) {
4917 rc = -ENOMEM;
4918 goto out_free_nothing;
4919 }
4a71df50
FB		 4920
4921 qeth_create_qib_param_field(card, qib_param_field);
4922 qeth_create_qib_param_field_blkt(card, qib_param_field);
4923
b3332930 4924 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
0da9581d 4925 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4a71df50
FB		 4926 GFP_KERNEL);
4927 if (!in_sbal_ptrs) {
104ea556 4928 rc = -ENOMEM;
4929 goto out_free_qib_param;
4a71df50 4930 }
0da9581d 4931 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4a71df50
FB		 4932 in_sbal_ptrs[i] = (struct qdio_buffer *)
4933 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
0da9581d 4934 }
4a71df50 4935
0da9581d
EL		 4936 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4937 GFP_KERNEL);
104ea556 4938 if (!queue_start_poll) {
4939 rc = -ENOMEM;
4940 goto out_free_in_sbals;
4941 }
0da9581d 4942 for (i = 0; i < card->qdio.no_in_queues; ++i)
c041f2d4 4943 queue_start_poll[i] = card->discipline->start_poll;
0da9581d
EL		 4944
4945 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
104ea556 4946
4a71df50 4947 out_sbal_ptrs =
b3332930 4948 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4a71df50
FB		 4949 sizeof(void *), GFP_KERNEL);
4950 if (!out_sbal_ptrs) {
104ea556 4951 rc = -ENOMEM;
4952 goto out_free_queue_start_poll;
4a71df50
FB		 4953 }
4954 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4955 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4956 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
0da9581d 4957 card->qdio.out_qs[i]->bufs[j]->buffer);
4a71df50
FB		 4958 }
4959
4960 memset(&init_data, 0, sizeof(struct qdio_initialize));
4961 init_data.cdev = CARD_DDEV(card);
4962 init_data.q_format = qeth_get_qdio_q_format(card);
4963 init_data.qib_param_field_format = 0;
4964 init_data.qib_param_field = qib_param_field;
0da9581d 4965 init_data.no_input_qs = card->qdio.no_in_queues;
4a71df50 4966 init_data.no_output_qs = card->qdio.no_out_queues;
c041f2d4
SO		 4967 init_data.input_handler = card->discipline->input_handler;
4968 init_data.output_handler = card->discipline->output_handler;
e58b0d90 4969 init_data.queue_start_poll_array = queue_start_poll;
4a71df50 4970 init_data.int_parm = (unsigned long) card;
4a71df50
FB		 4971 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4972 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
0da9581d 4973 init_data.output_sbal_state_array = card->qdio.out_bufstates;
3d6c76ff 4974 init_data.scan_threshold =
0fa81cd4 4975 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4a71df50
FB		 4976
4977 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4978 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
cc961d40
JG		 4979 rc = qdio_allocate(&init_data);
4980 if (rc) {
4981 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4982 goto out;
4983 }
4984 rc = qdio_establish(&init_data);
4985 if (rc) {
4a71df50 4986 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
cc961d40
JG		 4987 qdio_free(CARD_DDEV(card));
4988 }
4a71df50 4989 }
0da9581d
EL		 4990
4991 switch (card->options.cq) {
4992 case QETH_CQ_ENABLED:
4993 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4994 break;
4995 case QETH_CQ_DISABLED:
4996 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4997 break;
4998 default:
4999 break;
5000 }
cc961d40 5001out:
4a71df50 5002 kfree(out_sbal_ptrs);
104ea556 5003out_free_queue_start_poll:
5004 kfree(queue_start_poll);
5005out_free_in_sbals:
4a71df50 5006 kfree(in_sbal_ptrs);
104ea556 5007out_free_qib_param:
4a71df50 5008 kfree(qib_param_field);
104ea556 5009out_free_nothing:
4a71df50
FB		 5010 return rc;
5011}
5012
5013static void qeth_core_free_card(struct qeth_card *card)
5014{
5015
d11ba0c4
PT		 5016 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5017 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 5018 qeth_clean_channel(&card->read);
5019 qeth_clean_channel(&card->write);
5020 if (card->dev)
5021 free_netdev(card->dev);
4a71df50 5022 qeth_free_qdio_buffers(card);
6bcac508 5023 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 5024 kfree(card);
5025}
5026
395672e0
SR		 5027void qeth_trace_features(struct qeth_card *card)
5028{
5029 QETH_CARD_TEXT(card, 2, "features");
4d7def2a
TR		 5030 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
5031 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
5032 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
5033 QETH_CARD_HEX(card, 2, &card->info.diagass_support,
5034 sizeof(card->info.diagass_support));
395672e0
SR		 5035}
5036EXPORT_SYMBOL_GPL(qeth_trace_features);
5037
4a71df50 5038static struct ccw_device_id qeth_ids[] = {
5113fec0
UB		 5039 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5040 .driver_info = QETH_CARD_TYPE_OSD},
5041 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5042 .driver_info = QETH_CARD_TYPE_IQD},
5043 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5044 .driver_info = QETH_CARD_TYPE_OSN},
5045 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5046 .driver_info = QETH_CARD_TYPE_OSM},
5047 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5048 .driver_info = QETH_CARD_TYPE_OSX},
4a71df50
FB		 5049 {},
5050};
5051MODULE_DEVICE_TABLE(ccw, qeth_ids);
5052
5053static struct ccw_driver qeth_ccw_driver = {
3bda058b 5054 .driver = {
3e70b3b8 5055 .owner = THIS_MODULE,
3bda058b
SO		 5056 .name = "qeth",
5057 },
4a71df50
FB		 5058 .ids = qeth_ids,
5059 .probe = ccwgroup_probe_ccwdev,
5060 .remove = ccwgroup_remove_ccwdev,
5061};
5062
4a71df50
FB		 5063int qeth_core_hardsetup_card(struct qeth_card *card)
5064{
6ebb7f8d 5065 int retries = 3;
4a71df50
FB		 5066 int rc;
5067
d11ba0c4 5068 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50 5069 atomic_set(&card->force_alloc_skb, 0);
725b9c04 5070 qeth_update_from_chp_desc(card);
4a71df50 5071retry:
6ebb7f8d 5072 if (retries < 3)
74eacdb9
FB		 5073 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5074 dev_name(&card->gdev->dev));
22ae2790 5075 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
aa909224
UB		 5076 ccw_device_set_offline(CARD_DDEV(card));
5077 ccw_device_set_offline(CARD_WDEV(card));
5078 ccw_device_set_offline(CARD_RDEV(card));
22ae2790 5079 qdio_free(CARD_DDEV(card));
aa909224
UB		 5080 rc = ccw_device_set_online(CARD_RDEV(card));
5081 if (rc)
5082 goto retriable;
5083 rc = ccw_device_set_online(CARD_WDEV(card));
5084 if (rc)
5085 goto retriable;
5086 rc = ccw_device_set_online(CARD_DDEV(card));
5087 if (rc)
5088 goto retriable;
aa909224 5089retriable:
4a71df50 5090 if (rc == -ERESTARTSYS) {
d11ba0c4 5091 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 5092 return rc;
5093 } else if (rc) {
d11ba0c4 5094 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
6ebb7f8d 5095 if (--retries < 0)
4a71df50
FB		 5096 goto out;
5097 else
5098 goto retry;
5099 }
d0ff1f52 5100 qeth_determine_capabilities(card);
4a71df50
FB		 5101 qeth_init_tokens(card);
5102 qeth_init_func_level(card);
5103 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5104 if (rc == -ERESTARTSYS) {
d11ba0c4 5105 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 5106 return rc;
5107 } else if (rc) {
d11ba0c4 5108 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 5109 if (--retries < 0)
5110 goto out;
5111 else
5112 goto retry;
5113 }
5114 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5115 if (rc == -ERESTARTSYS) {
d11ba0c4 5116 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 5117 return rc;
5118 } else if (rc) {
d11ba0c4 5119 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 5120 if (--retries < 0)
5121 goto out;
5122 else
5123 goto retry;
5124 }
908abbb5 5125 card->read_or_write_problem = 0;
4a71df50
FB		 5126 rc = qeth_mpc_initialize(card);
5127 if (rc) {
d11ba0c4 5128 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 5129 goto out;
5130 }
1da74b1c 5131
10340510
JW		 5132 rc = qeth_send_startlan(card);
5133 if (rc) {
5134 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5135 if (rc == IPA_RC_LAN_OFFLINE) {
5136 dev_warn(&card->gdev->dev,
5137 "The LAN is offline\n");
5138 card->lan_online = 0;
5139 } else {
5140 rc = -ENODEV;
5141 goto out;
5142 }
5143 } else
5144 card->lan_online = 1;
5145
1da74b1c 5146 card->options.ipa4.supported_funcs = 0;
4d7def2a 5147 card->options.ipa6.supported_funcs = 0;
1da74b1c 5148 card->options.adp.supported_funcs = 0;
b4d72c08 5149 card->options.sbp.supported_funcs = 0;
1da74b1c 5150 card->info.diagass_support = 0;
1aec42bc
TR		 5151 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5152 if (rc == -ENOMEM)
5153 goto out;
5154 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5155 rc = qeth_query_setadapterparms(card);
5156 if (rc < 0) {
10340510 5157 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
1aec42bc
TR		 5158 goto out;
5159 }
5160 }
5161 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5162 rc = qeth_query_setdiagass(card);
5163 if (rc < 0) {
10340510 5164 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
1aec42bc
TR		 5165 goto out;
5166 }
5167 }
4a71df50
FB		 5168 return 0;
5169out:
74eacdb9
FB		 5170 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5171 "an error on the device\n");
5172 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5173 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 5174 return rc;
5175}
5176EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5177
8d68af6a
JW		 5178static void qeth_create_skb_frag(struct qdio_buffer_element *element,
5179 struct sk_buff *skb, int offset, int data_len)
4a71df50
FB		 5180{
5181 struct page *page = virt_to_page(element->addr);
b6f72f96 5182 unsigned int next_frag;
b3332930 5183
8d68af6a
JW		 5184 /* first fill the linear space */
5185 if (!skb->len) {
5186 unsigned int linear = min(data_len, skb_tailroom(skb));
0da9581d 5187
8d68af6a
JW		 5188 skb_put_data(skb, element->addr + offset, linear);
5189 data_len -= linear;
5190 if (!data_len)
5191 return;
5192 offset += linear;
5193 /* fall through to add page frag for remaining data */
4a71df50 5194 }
0da9581d 5195
8d68af6a 5196 next_frag = skb_shinfo(skb)->nr_frags;
b6f72f96 5197 get_page(page);
8d68af6a 5198 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
4a71df50
FB		 5199}
5200
bca51650
TR		 5201static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5202{
5203 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5204}
5205
4a71df50 5206struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
b3332930 5207 struct qeth_qdio_buffer *qethbuffer,
4a71df50
FB		 5208 struct qdio_buffer_element **__element, int *__offset,
5209 struct qeth_hdr **hdr)
5210{
5211 struct qdio_buffer_element *element = *__element;
b3332930 5212 struct qdio_buffer *buffer = qethbuffer->buffer;
4a71df50 5213 int offset = *__offset;
8d68af6a 5214 struct sk_buff *skb;
76b11f8e 5215 int skb_len = 0;
4a71df50
FB		 5216 void *data_ptr;
5217 int data_len;
5218 int headroom = 0;
5219 int use_rx_sg = 0;
4a71df50 5220
4a71df50 5221 /* qeth_hdr must not cross element boundaries */
864c17c3 5222 while (element->length < offset + sizeof(struct qeth_hdr)) {
4a71df50
FB		 5223 if (qeth_is_last_sbale(element))
5224 return NULL;
5225 element++;
5226 offset = 0;
4a71df50
FB		 5227 }
5228 *hdr = element->addr + offset;
5229
5230 offset += sizeof(struct qeth_hdr);
76b11f8e
UB		 5231 switch ((*hdr)->hdr.l2.id) {
5232 case QETH_HEADER_TYPE_LAYER2:
5233 skb_len = (*hdr)->hdr.l2.pkt_length;
5234 break;
5235 case QETH_HEADER_TYPE_LAYER3:
4a71df50 5236 skb_len = (*hdr)->hdr.l3.length;
1abd2296 5237 headroom = ETH_HLEN;
76b11f8e
UB		 5238 break;
5239 case QETH_HEADER_TYPE_OSN:
5240 skb_len = (*hdr)->hdr.osn.pdu_length;
5241 headroom = sizeof(struct qeth_hdr);
5242 break;
5243 default:
5244 break;
4a71df50
FB		 5245 }
5246
5247 if (!skb_len)
5248 return NULL;
5249
b3332930
FB		 5250 if (((skb_len >= card->options.rx_sg_cb) &&
5251 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5252 (!atomic_read(&card->force_alloc_skb))) ||
8d68af6a 5253 (card->options.cq == QETH_CQ_ENABLED))
4a71df50 5254 use_rx_sg = 1;
8d68af6a
JW		 5255
5256 if (use_rx_sg && qethbuffer->rx_skb) {
5257 /* QETH_CQ_ENABLED only: */
5258 skb = qethbuffer->rx_skb;
5259 qethbuffer->rx_skb = NULL;
4a71df50 5260 } else {
8d68af6a
JW		 5261 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
5262
5263 skb = dev_alloc_skb(linear + headroom);
4a71df50 5264 }
8d68af6a
JW		 5265 if (!skb)
5266 goto no_mem;
5267 if (headroom)
5268 skb_reserve(skb, headroom);
4a71df50
FB		 5269
5270 data_ptr = element->addr + offset;
5271 while (skb_len) {
5272 data_len = min(skb_len, (int)(element->length - offset));
5273 if (data_len) {
8d68af6a
JW		 5274 if (use_rx_sg)
5275 qeth_create_skb_frag(element, skb, offset,
5276 data_len);
5277 else
59ae1d12 5278 skb_put_data(skb, data_ptr, data_len);
4a71df50
FB		 5279 }
5280 skb_len -= data_len;
5281 if (skb_len) {
5282 if (qeth_is_last_sbale(element)) {
847a50fd 5283 QETH_CARD_TEXT(card, 4, "unexeob");
efd5d9a4 5284 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
4a71df50
FB		 5285 dev_kfree_skb_any(skb);
5286 card->stats.rx_errors++;
5287 return NULL;
5288 }
5289 element++;
5290 offset = 0;
5291 data_ptr = element->addr;
5292 } else {
5293 offset += data_len;
5294 }
5295 }
5296 *__element = element;
5297 *__offset = offset;
5298 if (use_rx_sg && card->options.performance_stats) {
5299 card->perf_stats.sg_skbs_rx++;
5300 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5301 }
5302 return skb;
5303no_mem:
5304 if (net_ratelimit()) {
847a50fd 5305 QETH_CARD_TEXT(card, 2, "noskbmem");
4a71df50
FB		 5306 }
5307 card->stats.rx_dropped++;
5308 return NULL;
5309}
5310EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5311
d73ef324
JW		 5312int qeth_poll(struct napi_struct *napi, int budget)
5313{
5314 struct qeth_card *card = container_of(napi, struct qeth_card, napi);
5315 int work_done = 0;
5316 struct qeth_qdio_buffer *buffer;
5317 int done;
5318 int new_budget = budget;
5319
5320 if (card->options.performance_stats) {
5321 card->perf_stats.inbound_cnt++;
5322 card->perf_stats.inbound_start_time = qeth_get_micros();
5323 }
5324
5325 while (1) {
5326 if (!card->rx.b_count) {
5327 card->rx.qdio_err = 0;
5328 card->rx.b_count = qdio_get_next_buffers(
5329 card->data.ccwdev, 0, &card->rx.b_index,
5330 &card->rx.qdio_err);
5331 if (card->rx.b_count <= 0) {
5332 card->rx.b_count = 0;
5333 break;
5334 }
5335 card->rx.b_element =
5336 &card->qdio.in_q->bufs[card->rx.b_index]
5337 .buffer->element[0];
5338 card->rx.e_offset = 0;
5339 }
5340
5341 while (card->rx.b_count) {
5342 buffer = &card->qdio.in_q->bufs[card->rx.b_index];
5343 if (!(card->rx.qdio_err &&
5344 qeth_check_qdio_errors(card, buffer->buffer,
5345 card->rx.qdio_err, "qinerr")))
5346 work_done +=
5347 card->discipline->process_rx_buffer(
5348 card, new_budget, &done);
5349 else
5350 done = 1;
5351
5352 if (done) {
5353 if (card->options.performance_stats)
5354 card->perf_stats.bufs_rec++;
5355 qeth_put_buffer_pool_entry(card,
5356 buffer->pool_entry);
5357 qeth_queue_input_buffer(card, card->rx.b_index);
5358 card->rx.b_count--;
5359 if (card->rx.b_count) {
5360 card->rx.b_index =
5361 (card->rx.b_index + 1) %
5362 QDIO_MAX_BUFFERS_PER_Q;
5363 card->rx.b_element =
5364 &card->qdio.in_q
5365 ->bufs[card->rx.b_index]
5366 .buffer->element[0];
5367 card->rx.e_offset = 0;
5368 }
5369 }
5370
5371 if (work_done >= budget)
5372 goto out;
5373 else
5374 new_budget = budget - work_done;
5375 }
5376 }
5377
978759e8 5378 napi_complete_done(napi, work_done);
d73ef324
JW		 5379 if (qdio_start_irq(card->data.ccwdev, 0))
5380 napi_schedule(&card->napi);
5381out:
5382 if (card->options.performance_stats)
5383 card->perf_stats.inbound_time += qeth_get_micros() -
5384 card->perf_stats.inbound_start_time;
5385 return work_done;
5386}
5387EXPORT_SYMBOL_GPL(qeth_poll);
5388
8f43fb00
TR		 5389int qeth_setassparms_cb(struct qeth_card *card,
5390 struct qeth_reply *reply, unsigned long data)
4d7def2a
TR		 5391{
5392 struct qeth_ipa_cmd *cmd;
5393
5394 QETH_CARD_TEXT(card, 4, "defadpcb");
5395
5396 cmd = (struct qeth_ipa_cmd *) data;
5397 if (cmd->hdr.return_code == 0) {
5398 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
5399 if (cmd->hdr.prot_version == QETH_PROT_IPV4)
5400 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
5401 if (cmd->hdr.prot_version == QETH_PROT_IPV6)
5402 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
5403 }
4d7def2a
TR		 5404 return 0;
5405}
8f43fb00 5406EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
4d7def2a 5407
b475e316
TR		 5408struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
5409 enum qeth_ipa_funcs ipa_func,
5410 __u16 cmd_code, __u16 len,
5411 enum qeth_prot_versions prot)
4d7def2a
TR		 5412{
5413 struct qeth_cmd_buffer *iob;
5414 struct qeth_ipa_cmd *cmd;
5415
5416 QETH_CARD_TEXT(card, 4, "getasscm");
5417 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
5418
5419 if (iob) {
5420 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5421 cmd->data.setassparms.hdr.assist_no = ipa_func;
5422 cmd->data.setassparms.hdr.length = 8 + len;
5423 cmd->data.setassparms.hdr.command_code = cmd_code;
5424 cmd->data.setassparms.hdr.return_code = 0;
5425 cmd->data.setassparms.hdr.seq_no = 0;
5426 }
5427
5428 return iob;
5429}
b475e316 5430EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
4d7def2a
TR		 5431
5432int qeth_send_setassparms(struct qeth_card *card,
5433 struct qeth_cmd_buffer *iob, __u16 len, long data,
5434 int (*reply_cb)(struct qeth_card *,
5435 struct qeth_reply *, unsigned long),
5436 void *reply_param)
5437{
5438 int rc;
5439 struct qeth_ipa_cmd *cmd;
5440
5441 QETH_CARD_TEXT(card, 4, "sendassp");
5442
5443 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
5444 if (len <= sizeof(__u32))
5445 cmd->data.setassparms.data.flags_32bit = (__u32) data;
5446 else /* (len > sizeof(__u32)) */
5447 memcpy(&cmd->data.setassparms.data, (void *) data, len);
5448
5449 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
5450 return rc;
5451}
5452EXPORT_SYMBOL_GPL(qeth_send_setassparms);
5453
5454int qeth_send_simple_setassparms(struct qeth_card *card,
5455 enum qeth_ipa_funcs ipa_func,
5456 __u16 cmd_code, long data)
5457{
5458 int rc;
5459 int length = 0;
5460 struct qeth_cmd_buffer *iob;
5461
5462 QETH_CARD_TEXT(card, 4, "simassp4");
5463 if (data)
5464 length = sizeof(__u32);
5465 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
5466 length, QETH_PROT_IPV4);
5467 if (!iob)
5468 return -ENOMEM;
5469 rc = qeth_send_setassparms(card, iob, length, data,
5470 qeth_setassparms_cb, NULL);
5471 return rc;
5472}
5473EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
5474
4a71df50
FB		 5475static void qeth_unregister_dbf_views(void)
5476{
d11ba0c4
PT		 5477 int x;
5478 for (x = 0; x < QETH_DBF_INFOS; x++) {
5479 debug_unregister(qeth_dbf[x].id);
5480 qeth_dbf[x].id = NULL;
5481 }
4a71df50
FB		 5482}
5483
8e96c51c 5484void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
cd023216
PT		 5485{
5486 char dbf_txt_buf[32];
345aa66e 5487 va_list args;
cd023216 5488
8e6a8285 5489 if (!debug_level_enabled(id, level))
cd023216 5490 return;
345aa66e
PT		 5491 va_start(args, fmt);
5492 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5493 va_end(args);
8e96c51c 5494 debug_text_event(id, level, dbf_txt_buf);
cd023216
PT		 5495}
5496EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5497
4a71df50
FB		 5498static int qeth_register_dbf_views(void)
5499{
d11ba0c4
PT		 5500 int ret;
5501 int x;
5502
5503 for (x = 0; x < QETH_DBF_INFOS; x++) {
5504 /* register the areas */
5505 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5506 qeth_dbf[x].pages,
5507 qeth_dbf[x].areas,
5508 qeth_dbf[x].len);
5509 if (qeth_dbf[x].id == NULL) {
5510 qeth_unregister_dbf_views();
5511 return -ENOMEM;
5512 }
4a71df50 5513
d11ba0c4
PT		 5514 /* register a view */
5515 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5516 if (ret) {
5517 qeth_unregister_dbf_views();
5518 return ret;
5519 }
4a71df50 5520
d11ba0c4
PT		 5521 /* set a passing level */
5522 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5523 }
4a71df50
FB		 5524
5525 return 0;
5526}
5527
5528int qeth_core_load_discipline(struct qeth_card *card,
5529 enum qeth_discipline_id discipline)
5530{
5531 int rc = 0;
c70eb09d 5532
2022e00c 5533 mutex_lock(&qeth_mod_mutex);
4a71df50
FB		 5534 switch (discipline) {
5535 case QETH_DISCIPLINE_LAYER3:
c041f2d4
SO		 5536 card->discipline = try_then_request_module(
5537 symbol_get(qeth_l3_discipline), "qeth_l3");
4a71df50
FB		 5538 break;
5539 case QETH_DISCIPLINE_LAYER2:
c041f2d4
SO		 5540 card->discipline = try_then_request_module(
5541 symbol_get(qeth_l2_discipline), "qeth_l2");
4a71df50 5542 break;
c70eb09d
JW		 5543 default:
5544 break;
4a71df50 5545 }
c70eb09d 5546
c041f2d4 5547 if (!card->discipline) {
74eacdb9
FB		 5548 dev_err(&card->gdev->dev, "There is no kernel module to "
5549 "support discipline %d\n", discipline);
4a71df50
FB		 5550 rc = -EINVAL;
5551 }
2022e00c 5552 mutex_unlock(&qeth_mod_mutex);
4a71df50
FB		 5553 return rc;
5554}
5555
5556void qeth_core_free_discipline(struct qeth_card *card)
5557{
5558 if (card->options.layer2)
c041f2d4 5559 symbol_put(qeth_l2_discipline);
4a71df50 5560 else
c041f2d4
SO		 5561 symbol_put(qeth_l3_discipline);
5562 card->discipline = NULL;
4a71df50
FB		 5563}
5564
2d2ebb3e 5565const struct device_type qeth_generic_devtype = {
b7169c51
SO		 5566 .name = "qeth_generic",
5567 .groups = qeth_generic_attr_groups,
5568};
2d2ebb3e
JW		 5569EXPORT_SYMBOL_GPL(qeth_generic_devtype);
5570
b7169c51
SO		 5571static const struct device_type qeth_osn_devtype = {
5572 .name = "qeth_osn",
5573 .groups = qeth_osn_attr_groups,
5574};
5575
819dc537
SR		 5576#define DBF_NAME_LEN 20
5577
5578struct qeth_dbf_entry {
5579 char dbf_name[DBF_NAME_LEN];
5580 debug_info_t *dbf_info;
5581 struct list_head dbf_list;
5582};
5583
5584static LIST_HEAD(qeth_dbf_list);
5585static DEFINE_MUTEX(qeth_dbf_list_mutex);
5586
5587static debug_info_t *qeth_get_dbf_entry(char *name)
5588{
5589 struct qeth_dbf_entry *entry;
5590 debug_info_t *rc = NULL;
5591
5592 mutex_lock(&qeth_dbf_list_mutex);
5593 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5594 if (strcmp(entry->dbf_name, name) == 0) {
5595 rc = entry->dbf_info;
5596 break;
5597 }
5598 }
5599 mutex_unlock(&qeth_dbf_list_mutex);
5600 return rc;
5601}
5602
5603static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5604{
5605 struct qeth_dbf_entry *new_entry;
5606
5607 card->debug = debug_register(name, 2, 1, 8);
5608 if (!card->debug) {
5609 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5610 goto err;
5611 }
5612 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5613 goto err_dbg;
5614 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5615 if (!new_entry)
5616 goto err_dbg;
5617 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5618 new_entry->dbf_info = card->debug;
5619 mutex_lock(&qeth_dbf_list_mutex);
5620 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5621 mutex_unlock(&qeth_dbf_list_mutex);
5622
5623 return 0;
5624
5625err_dbg:
5626 debug_unregister(card->debug);
5627err:
5628 return -ENOMEM;
5629}
5630
5631static void qeth_clear_dbf_list(void)
5632{
5633 struct qeth_dbf_entry *entry, *tmp;
5634
5635 mutex_lock(&qeth_dbf_list_mutex);
5636 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5637 list_del(&entry->dbf_list);
5638 debug_unregister(entry->dbf_info);
5639 kfree(entry);
5640 }
5641 mutex_unlock(&qeth_dbf_list_mutex);
5642}
5643
4a71df50
FB		 5644static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5645{
5646 struct qeth_card *card;
5647 struct device *dev;
5648 int rc;
c70eb09d 5649 enum qeth_discipline_id enforced_disc;
4a71df50 5650 unsigned long flags;
819dc537 5651 char dbf_name[DBF_NAME_LEN];
4a71df50 5652
d11ba0c4 5653 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 5654
5655 dev = &gdev->dev;
5656 if (!get_device(dev))
5657 return -ENODEV;
5658
2a0217d5 5659 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 5660
5661 card = qeth_alloc_card();
5662 if (!card) {
d11ba0c4 5663 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 5664 rc = -ENOMEM;
5665 goto err_dev;
5666 }
af039068
CO		 5667
5668 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5669 dev_name(&gdev->dev));
819dc537 5670 card->debug = qeth_get_dbf_entry(dbf_name);
af039068 5671 if (!card->debug) {
819dc537
SR		 5672 rc = qeth_add_dbf_entry(card, dbf_name);
5673 if (rc)
5674 goto err_card;
af039068 5675 }
af039068 5676
4a71df50
FB		 5677 card->read.ccwdev = gdev->cdev[0];
5678 card->write.ccwdev = gdev->cdev[1];
5679 card->data.ccwdev = gdev->cdev[2];
5680 dev_set_drvdata(&gdev->dev, card);
5681 card->gdev = gdev;
5682 gdev->cdev[0]->handler = qeth_irq;
5683 gdev->cdev[1]->handler = qeth_irq;
5684 gdev->cdev[2]->handler = qeth_irq;
5685
ed2e93ef 5686 qeth_determine_card_type(card);
4a71df50
FB		 5687 rc = qeth_setup_card(card);
5688 if (rc) {
d11ba0c4 5689 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
819dc537 5690 goto err_card;
4a71df50
FB		 5691 }
5692
c70eb09d
JW		 5693 qeth_determine_capabilities(card);
5694 enforced_disc = qeth_enforce_discipline(card);
5695 switch (enforced_disc) {
5696 case QETH_DISCIPLINE_UNDETERMINED:
5697 gdev->dev.type = &qeth_generic_devtype;
5698 break;
5699 default:
5700 card->info.layer_enforced = true;
5701 rc = qeth_core_load_discipline(card, enforced_disc);
5113fec0 5702 if (rc)
819dc537 5703 goto err_card;
2d2ebb3e
JW		 5704
5705 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
5706 ? card->discipline->devtype
5707 : &qeth_osn_devtype;
c041f2d4 5708 rc = card->discipline->setup(card->gdev);
4a71df50 5709 if (rc)
5113fec0 5710 goto err_disc;
2d2ebb3e 5711 break;
4a71df50
FB		 5712 }
5713
5714 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5715 list_add_tail(&card->list, &qeth_core_card_list.list);
5716 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5717 return 0;
5718
5113fec0
UB		 5719err_disc:
5720 qeth_core_free_discipline(card);
4a71df50
FB		 5721err_card:
5722 qeth_core_free_card(card);
5723err_dev:
5724 put_device(dev);
5725 return rc;
5726}
5727
5728static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5729{
5730 unsigned long flags;
5731 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5732
28a7e4c9 5733 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50 5734
c041f2d4
SO		 5735 if (card->discipline) {
5736 card->discipline->remove(gdev);
9dc48ccc
UB		 5737 qeth_core_free_discipline(card);
5738 }
5739
4a71df50
FB		 5740 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5741 list_del(&card->list);
5742 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5743 qeth_core_free_card(card);
5744 dev_set_drvdata(&gdev->dev, NULL);
5745 put_device(&gdev->dev);
5746 return;
5747}
5748
5749static int qeth_core_set_online(struct ccwgroup_device *gdev)
5750{
5751 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5752 int rc = 0;
c70eb09d 5753 enum qeth_discipline_id def_discipline;
4a71df50 5754
c041f2d4 5755 if (!card->discipline) {
4a71df50
FB		 5756 if (card->info.type == QETH_CARD_TYPE_IQD)
5757 def_discipline = QETH_DISCIPLINE_LAYER3;
5758 else
5759 def_discipline = QETH_DISCIPLINE_LAYER2;
5760 rc = qeth_core_load_discipline(card, def_discipline);
5761 if (rc)
5762 goto err;
c041f2d4 5763 rc = card->discipline->setup(card->gdev);
9111e788
UB		 5764 if (rc) {
5765 qeth_core_free_discipline(card);
4a71df50 5766 goto err;
9111e788 5767 }
4a71df50 5768 }
c041f2d4 5769 rc = card->discipline->set_online(gdev);
4a71df50
FB		 5770err:
5771 return rc;
5772}
5773
5774static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5775{
5776 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4 5777 return card->discipline->set_offline(gdev);
4a71df50
FB		 5778}
5779
5780static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5781{
5782 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
96d1bb53
JW		 5783 qeth_set_allowed_threads(card, 0, 1);
5784 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
5785 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
5786 qeth_qdio_clear_card(card, 0);
5787 qeth_clear_qdio_buffers(card);
5788 qdio_free(CARD_DDEV(card));
4a71df50
FB		 5789}
5790
bbcfcdc8
FB		 5791static int qeth_core_freeze(struct ccwgroup_device *gdev)
5792{
5793 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5794 if (card->discipline && card->discipline->freeze)
5795 return card->discipline->freeze(gdev);
bbcfcdc8
FB		 5796 return 0;
5797}
5798
5799static int qeth_core_thaw(struct ccwgroup_device *gdev)
5800{
5801 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5802 if (card->discipline && card->discipline->thaw)
5803 return card->discipline->thaw(gdev);
bbcfcdc8
FB		 5804 return 0;
5805}
5806
5807static int qeth_core_restore(struct ccwgroup_device *gdev)
5808{
5809 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
c041f2d4
SO		 5810 if (card->discipline && card->discipline->restore)
5811 return card->discipline->restore(gdev);
bbcfcdc8
FB		 5812 return 0;
5813}
5814
4a71df50 5815static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
3c190c51
SO		 5816 .driver = {
5817 .owner = THIS_MODULE,
5818 .name = "qeth",
5819 },
f9a5d70c 5820 .ccw_driver = &qeth_ccw_driver,
b7169c51 5821 .setup = qeth_core_probe_device,
4a71df50
FB		 5822 .remove = qeth_core_remove_device,
5823 .set_online = qeth_core_set_online,
5824 .set_offline = qeth_core_set_offline,
5825 .shutdown = qeth_core_shutdown,
6ffa4d1b
JW		 5826 .prepare = NULL,
5827 .complete = NULL,
bbcfcdc8
FB		 5828 .freeze = qeth_core_freeze,
5829 .thaw = qeth_core_thaw,
5830 .restore = qeth_core_restore,
4a71df50
FB		 5831};
5832
36369569
GKH		 5833static ssize_t group_store(struct device_driver *ddrv, const char *buf,
5834 size_t count)
4a71df50
FB		 5835{
5836 int err;
4a71df50 5837
b7169c51 5838 err = ccwgroup_create_dev(qeth_core_root_dev,
b7169c51
SO		 5839 &qeth_core_ccwgroup_driver, 3, buf);
5840
5841 return err ? err : count;
5842}
36369569 5843static DRIVER_ATTR_WO(group);
4a71df50 5844
f47e2256
SO		 5845static struct attribute *qeth_drv_attrs[] = {
5846 &driver_attr_group.attr,
5847 NULL,
5848};
5849static struct attribute_group qeth_drv_attr_group = {
5850 .attrs = qeth_drv_attrs,
5851};
5852static const struct attribute_group *qeth_drv_attr_groups[] = {
5853 &qeth_drv_attr_group,
5854 NULL,
5855};
5856
942d6984
JW		 5857int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
5858{
5859 struct qeth_card *card = dev->ml_priv;
5860 struct mii_ioctl_data *mii_data;
5861 int rc = 0;
5862
5863 if (!card)
5864 return -ENODEV;
5865
5866 if (!qeth_card_hw_is_reachable(card))
5867 return -ENODEV;
5868
5869 if (card->info.type == QETH_CARD_TYPE_OSN)
5870 return -EPERM;
5871
5872 switch (cmd) {
5873 case SIOC_QETH_ADP_SET_SNMP_CONTROL:
5874 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
5875 break;
5876 case SIOC_QETH_GET_CARD_TYPE:
5877 if ((card->info.type == QETH_CARD_TYPE_OSD ||
5878 card->info.type == QETH_CARD_TYPE_OSM ||
5879 card->info.type == QETH_CARD_TYPE_OSX) &&
5880 !card->info.guestlan)
5881 return 1;
5882 else
5883 return 0;
5884 case SIOCGMIIPHY:
5885 mii_data = if_mii(rq);
5886 mii_data->phy_id = 0;
5887 break;
5888 case SIOCGMIIREG:
5889 mii_data = if_mii(rq);
5890 if (mii_data->phy_id != 0)
5891 rc = -EINVAL;
5892 else
5893 mii_data->val_out = qeth_mdio_read(dev,
5894 mii_data->phy_id, mii_data->reg_num);
5895 break;
5896 case SIOC_QETH_QUERY_OAT:
5897 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
5898 break;
5899 default:
5900 if (card->discipline->do_ioctl)
5901 rc = card->discipline->do_ioctl(dev, rq, cmd);
5902 else
5903 rc = -EOPNOTSUPP;
5904 }
5905 if (rc)
5906 QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
5907 return rc;
5908}
5909EXPORT_SYMBOL_GPL(qeth_do_ioctl);
5910
4a71df50
FB		 5911static struct {
5912 const char str[ETH_GSTRING_LEN];
5913} qeth_ethtool_stats_keys[] = {
5914/* 0 */{"rx skbs"},
5915 {"rx buffers"},
5916 {"tx skbs"},
5917 {"tx buffers"},
5918 {"tx skbs no packing"},
5919 {"tx buffers no packing"},
5920 {"tx skbs packing"},
5921 {"tx buffers packing"},
5922 {"tx sg skbs"},
5923 {"tx sg frags"},
5924/* 10 */{"rx sg skbs"},
5925 {"rx sg frags"},
5926 {"rx sg page allocs"},
5927 {"tx large kbytes"},
5928 {"tx large count"},
5929 {"tx pk state ch n->p"},
5930 {"tx pk state ch p->n"},
5931 {"tx pk watermark low"},
5932 {"tx pk watermark high"},
5933 {"queue 0 buffer usage"},
5934/* 20 */{"queue 1 buffer usage"},
5935 {"queue 2 buffer usage"},
5936 {"queue 3 buffer usage"},
a1c3ed4c
FB		 5937 {"rx poll time"},
5938 {"rx poll count"},
4a71df50
FB		 5939 {"rx do_QDIO time"},
5940 {"rx do_QDIO count"},
5941 {"tx handler time"},
5942 {"tx handler count"},
5943 {"tx time"},
5944/* 30 */{"tx count"},
5945 {"tx do_QDIO time"},
5946 {"tx do_QDIO count"},
f61a0d05 5947 {"tx csum"},
c3b4a740 5948 {"tx lin"},
6059c905 5949 {"tx linfail"},
0da9581d
EL		 5950 {"cq handler count"},
5951 {"cq handler time"}
4a71df50
FB		 5952};
5953
df8b4ec8 5954int qeth_core_get_sset_count(struct net_device *dev, int stringset)
4a71df50 5955{
df8b4ec8
BH		 5956 switch (stringset) {
5957 case ETH_SS_STATS:
5958 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5959 default:
5960 return -EINVAL;
5961 }
4a71df50 5962}
df8b4ec8 5963EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
4a71df50
FB		 5964
5965void qeth_core_get_ethtool_stats(struct net_device *dev,
5966 struct ethtool_stats *stats, u64 *data)
5967{
509e2562 5968 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 5969 data[0] = card->stats.rx_packets -
5970 card->perf_stats.initial_rx_packets;
5971 data[1] = card->perf_stats.bufs_rec;
5972 data[2] = card->stats.tx_packets -
5973 card->perf_stats.initial_tx_packets;
5974 data[3] = card->perf_stats.bufs_sent;
5975 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5976 - card->perf_stats.skbs_sent_pack;
5977 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5978 data[6] = card->perf_stats.skbs_sent_pack;
5979 data[7] = card->perf_stats.bufs_sent_pack;
5980 data[8] = card->perf_stats.sg_skbs_sent;
5981 data[9] = card->perf_stats.sg_frags_sent;
5982 data[10] = card->perf_stats.sg_skbs_rx;
5983 data[11] = card->perf_stats.sg_frags_rx;
5984 data[12] = card->perf_stats.sg_alloc_page_rx;
5985 data[13] = (card->perf_stats.large_send_bytes >> 10);
5986 data[14] = card->perf_stats.large_send_cnt;
5987 data[15] = card->perf_stats.sc_dp_p;
5988 data[16] = card->perf_stats.sc_p_dp;
5989 data[17] = QETH_LOW_WATERMARK_PACK;
5990 data[18] = QETH_HIGH_WATERMARK_PACK;
5991 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5992 data[20] = (card->qdio.no_out_queues > 1) ?
5993 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5994 data[21] = (card->qdio.no_out_queues > 2) ?
5995 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5996 data[22] = (card->qdio.no_out_queues > 3) ?
5997 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5998 data[23] = card->perf_stats.inbound_time;
5999 data[24] = card->perf_stats.inbound_cnt;
6000 data[25] = card->perf_stats.inbound_do_qdio_time;
6001 data[26] = card->perf_stats.inbound_do_qdio_cnt;
6002 data[27] = card->perf_stats.outbound_handler_time;
6003 data[28] = card->perf_stats.outbound_handler_cnt;
6004 data[29] = card->perf_stats.outbound_time;
6005 data[30] = card->perf_stats.outbound_cnt;
6006 data[31] = card->perf_stats.outbound_do_qdio_time;
6007 data[32] = card->perf_stats.outbound_do_qdio_cnt;
f61a0d05 6008 data[33] = card->perf_stats.tx_csum;
c3b4a740 6009 data[34] = card->perf_stats.tx_lin;
6059c905
EC		 6010 data[35] = card->perf_stats.tx_linfail;
6011 data[36] = card->perf_stats.cq_cnt;
6012 data[37] = card->perf_stats.cq_time;
4a71df50
FB		 6013}
6014EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
6015
6016void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
6017{
6018 switch (stringset) {
6019 case ETH_SS_STATS:
6020 memcpy(data, &qeth_ethtool_stats_keys,
6021 sizeof(qeth_ethtool_stats_keys));
6022 break;
6023 default:
6024 WARN_ON(1);
6025 break;
6026 }
6027}
6028EXPORT_SYMBOL_GPL(qeth_core_get_strings);
6029
6030void qeth_core_get_drvinfo(struct net_device *dev,
6031 struct ethtool_drvinfo *info)
6032{
509e2562 6033 struct qeth_card *card = dev->ml_priv;
7826d43f
JP		 6034
6035 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
6036 sizeof(info->driver));
6037 strlcpy(info->version, "1.0", sizeof(info->version));
6038 strlcpy(info->fw_version, card->info.mcl_level,
6039 sizeof(info->fw_version));
6040 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
6041 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
4a71df50
FB		 6042}
6043EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
6044
774afb8e
JW		 6045/* Helper function to fill 'advertising' and 'supported' which are the same. */
6046/* Autoneg and full-duplex are supported and advertised unconditionally. */
6047/* Always advertise and support all speeds up to specified, and only one */
02d5cb5b 6048/* specified port type. */
993e19c0 6049static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
02d5cb5b
EC		 6050 int maxspeed, int porttype)
6051{
41fc3b65
JW		 6052 ethtool_link_ksettings_zero_link_mode(cmd, supported);
6053 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
6054 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
774afb8e 6055
41fc3b65
JW		 6056 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
6057 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
02d5cb5b
EC		 6058
6059 switch (porttype) {
6060 case PORT_TP:
41fc3b65
JW		 6061 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6062 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6063 break;
6064 case PORT_FIBRE:
41fc3b65
JW		 6065 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
6066 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
02d5cb5b
EC		 6067 break;
6068 default:
41fc3b65
JW		 6069 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
6070 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
02d5cb5b
EC		 6071 WARN_ON_ONCE(1);
6072 }
6073
774afb8e 6074 /* fallthrough from high to low, to select all legal speeds: */
02d5cb5b
EC		 6075 switch (maxspeed) {
6076 case SPEED_10000:
41fc3b65
JW		 6077 ethtool_link_ksettings_add_link_mode(cmd, supported,
6078 10000baseT_Full);
6079 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6080 10000baseT_Full);
02d5cb5b 6081 case SPEED_1000:
41fc3b65
JW		 6082 ethtool_link_ksettings_add_link_mode(cmd, supported,
6083 1000baseT_Full);
6084 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6085 1000baseT_Full);
6086 ethtool_link_ksettings_add_link_mode(cmd, supported,
6087 1000baseT_Half);
6088 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6089 1000baseT_Half);
02d5cb5b 6090 case SPEED_100:
41fc3b65
JW		 6091 ethtool_link_ksettings_add_link_mode(cmd, supported,
6092 100baseT_Full);
6093 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6094 100baseT_Full);
6095 ethtool_link_ksettings_add_link_mode(cmd, supported,
6096 100baseT_Half);
6097 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6098 100baseT_Half);
02d5cb5b 6099 case SPEED_10:
41fc3b65
JW		 6100 ethtool_link_ksettings_add_link_mode(cmd, supported,
6101 10baseT_Full);
6102 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6103 10baseT_Full);
6104 ethtool_link_ksettings_add_link_mode(cmd, supported,
6105 10baseT_Half);
6106 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6107 10baseT_Half);
774afb8e
JW		 6108 /* end fallthrough */
6109 break;
02d5cb5b 6110 default:
41fc3b65
JW		 6111 ethtool_link_ksettings_add_link_mode(cmd, supported,
6112 10baseT_Full);
6113 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6114 10baseT_Full);
6115 ethtool_link_ksettings_add_link_mode(cmd, supported,
6116 10baseT_Half);
6117 ethtool_link_ksettings_add_link_mode(cmd, advertising,
6118 10baseT_Half);
02d5cb5b
EC		 6119 WARN_ON_ONCE(1);
6120 }
02d5cb5b
EC		 6121}
6122
993e19c0
JW		 6123int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
6124 struct ethtool_link_ksettings *cmd)
3f9975aa 6125{
509e2562 6126 struct qeth_card *card = netdev->ml_priv;
3f9975aa 6127 enum qeth_link_types link_type;
02d5cb5b 6128 struct carrier_info carrier_info;
511c2445 6129 int rc;
3f9975aa
FB		 6130
6131 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
6132 link_type = QETH_LINK_TYPE_10GBIT_ETH;
6133 else
6134 link_type = card->info.link_type;
6135
993e19c0
JW		 6136 cmd->base.duplex = DUPLEX_FULL;
6137 cmd->base.autoneg = AUTONEG_ENABLE;
6138 cmd->base.phy_address = 0;
6139 cmd->base.mdio_support = 0;
6140 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
6141 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
3f9975aa
FB		 6142
6143 switch (link_type) {
6144 case QETH_LINK_TYPE_FAST_ETH:
6145 case QETH_LINK_TYPE_LANE_ETH100:
993e19c0
JW		 6146 cmd->base.speed = SPEED_100;
6147 cmd->base.port = PORT_TP;
3f9975aa 6148 break;
3f9975aa
FB		 6149 case QETH_LINK_TYPE_GBIT_ETH:
6150 case QETH_LINK_TYPE_LANE_ETH1000:
993e19c0
JW		 6151 cmd->base.speed = SPEED_1000;
6152 cmd->base.port = PORT_FIBRE;
3f9975aa 6153 break;
3f9975aa 6154 case QETH_LINK_TYPE_10GBIT_ETH:
993e19c0
JW		 6155 cmd->base.speed = SPEED_10000;
6156 cmd->base.port = PORT_FIBRE;
3f9975aa 6157 break;
3f9975aa 6158 default:
993e19c0
JW		 6159 cmd->base.speed = SPEED_10;
6160 cmd->base.port = PORT_TP;
3f9975aa 6161 }
993e19c0 6162 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
3f9975aa 6163
02d5cb5b
EC		 6164 /* Check if we can obtain more accurate information. */
6165 /* If QUERY_CARD_INFO command is not supported or fails, */
6166 /* just return the heuristics that was filled above. */
511c2445
EC		 6167 if (!qeth_card_hw_is_reachable(card))
6168 return -ENODEV;
6169 rc = qeth_query_card_info(card, &carrier_info);
6170 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
02d5cb5b 6171 return 0;
511c2445
EC		 6172 if (rc) /* report error from the hardware operation */
6173 return rc;
6174 /* on success, fill in the information got from the hardware */
02d5cb5b
EC		 6175
6176 netdev_dbg(netdev,
6177 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
6178 carrier_info.card_type,
6179 carrier_info.port_mode,
6180 carrier_info.port_speed);
6181
6182 /* Update attributes for which we've obtained more authoritative */
6183 /* information, leave the rest the way they where filled above. */
6184 switch (carrier_info.card_type) {
6185 case CARD_INFO_TYPE_1G_COPPER_A:
6186 case CARD_INFO_TYPE_1G_COPPER_B:
993e19c0
JW		 6187 cmd->base.port = PORT_TP;
6188 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6189 break;
6190 case CARD_INFO_TYPE_1G_FIBRE_A:
6191 case CARD_INFO_TYPE_1G_FIBRE_B:
993e19c0
JW		 6192 cmd->base.port = PORT_FIBRE;
6193 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
02d5cb5b
EC		 6194 break;
6195 case CARD_INFO_TYPE_10G_FIBRE_A:
6196 case CARD_INFO_TYPE_10G_FIBRE_B:
993e19c0
JW		 6197 cmd->base.port = PORT_FIBRE;
6198 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
02d5cb5b
EC		 6199 break;
6200 }
6201
6202 switch (carrier_info.port_mode) {
6203 case CARD_INFO_PORTM_FULLDUPLEX:
993e19c0 6204 cmd->base.duplex = DUPLEX_FULL;
02d5cb5b
EC		 6205 break;
6206 case CARD_INFO_PORTM_HALFDUPLEX:
993e19c0 6207 cmd->base.duplex = DUPLEX_HALF;
02d5cb5b
EC		 6208 break;
6209 }
6210
6211 switch (carrier_info.port_speed) {
6212 case CARD_INFO_PORTS_10M:
993e19c0 6213 cmd->base.speed = SPEED_10;
02d5cb5b
EC		 6214 break;
6215 case CARD_INFO_PORTS_100M:
993e19c0 6216 cmd->base.speed = SPEED_100;
02d5cb5b
EC		 6217 break;
6218 case CARD_INFO_PORTS_1G:
993e19c0 6219 cmd->base.speed = SPEED_1000;
02d5cb5b
EC		 6220 break;
6221 case CARD_INFO_PORTS_10G:
993e19c0 6222 cmd->base.speed = SPEED_10000;
02d5cb5b
EC		 6223 break;
6224 }
6225
3f9975aa
FB		 6226 return 0;
6227}
993e19c0 6228EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
3f9975aa 6229
c9475369
TR		 6230/* Callback to handle checksum offload command reply from OSA card.
6231 * Verify that required features have been enabled on the card.
6232 * Return error in hdr->return_code as this value is checked by caller.
6233 *
6234 * Always returns zero to indicate no further messages from the OSA card.
6235 */
6236static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
6237 struct qeth_reply *reply,
6238 unsigned long data)
6239{
6240 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
6241 struct qeth_checksum_cmd *chksum_cb =
6242 (struct qeth_checksum_cmd *)reply->param;
6243
6244 QETH_CARD_TEXT(card, 4, "chkdoccb");
6245 if (cmd->hdr.return_code)
6246 return 0;
6247
6248 memset(chksum_cb, 0, sizeof(*chksum_cb));
6249 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
6250 chksum_cb->supported =
6251 cmd->data.setassparms.data.chksum.supported;
6252 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
6253 }
6254 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
6255 chksum_cb->supported =
6256 cmd->data.setassparms.data.chksum.supported;
6257 chksum_cb->enabled =
6258 cmd->data.setassparms.data.chksum.enabled;
6259 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
6260 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
6261 }
6262 return 0;
6263}
6264
6265/* Send command to OSA card and check results. */
6266static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
6267 enum qeth_ipa_funcs ipa_func,
6268 __u16 cmd_code, long data,
6269 struct qeth_checksum_cmd *chksum_cb)
6270{
6271 struct qeth_cmd_buffer *iob;
6272 int rc = -ENOMEM;
6273
6274 QETH_CARD_TEXT(card, 4, "chkdocmd");
6275 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
6276 sizeof(__u32), QETH_PROT_IPV4);
6277 if (iob)
6278 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
6279 qeth_ipa_checksum_run_cmd_cb,
6280 chksum_cb);
6281 return rc;
6282}
6283
8f43fb00 6284static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
4d7def2a 6285{
f9d8e6dc
TR		 6286 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
6287 QETH_IPA_CHECKSUM_UDP |
6288 QETH_IPA_CHECKSUM_TCP;
c9475369 6289 struct qeth_checksum_cmd chksum_cb;
4d7def2a
TR		 6290 int rc;
6291
c9475369
TR		 6292 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
6293 &chksum_cb);
f9d8e6dc
TR		 6294 if (!rc) {
6295 if ((required_features & chksum_cb.supported) !=
6296 required_features)
6297 rc = -EIO;
dae84c8e
TR		 6298 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
6299 cstype == IPA_INBOUND_CHECKSUM)
6300 dev_warn(&card->gdev->dev,
6301 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
6302 QETH_CARD_IFNAME(card));
f9d8e6dc 6303 }
4d7def2a 6304 if (rc) {
c9475369 6305 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6306 dev_warn(&card->gdev->dev,
6307 "Starting HW checksumming for %s failed, using SW checksumming\n",
6308 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6309 return rc;
6310 }
c9475369
TR		 6311 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
6312 chksum_cb.supported, &chksum_cb);
f9d8e6dc
TR		 6313 if (!rc) {
6314 if ((required_features & chksum_cb.enabled) !=
6315 required_features)
6316 rc = -EIO;
6317 }
4d7def2a 6318 if (rc) {
c9475369 6319 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
8f43fb00
TR		 6320 dev_warn(&card->gdev->dev,
6321 "Enabling HW checksumming for %s failed, using SW checksumming\n",
6322 QETH_CARD_IFNAME(card));
4d7def2a
TR		 6323 return rc;
6324 }
8f43fb00
TR		 6325
6326 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
6327 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
4d7def2a
TR		 6328 return 0;
6329}
6330
8f43fb00 6331static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
4d7def2a 6332{
c9475369
TR		 6333 int rc = (on) ? qeth_send_checksum_on(card, cstype)
6334 : qeth_send_simple_setassparms(card, cstype,
6335 IPA_CMD_ASS_STOP, 0);
6336 return rc ? -EIO : 0;
4d7def2a 6337}
4d7def2a 6338
8f43fb00 6339static int qeth_set_ipa_tso(struct qeth_card *card, int on)
4d7def2a 6340{
8f43fb00 6341 int rc;
4d7def2a 6342
8f43fb00 6343 QETH_CARD_TEXT(card, 3, "sttso");
4d7def2a 6344
8f43fb00
TR		 6345 if (on) {
6346 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6347 IPA_CMD_ASS_START, 0);
6348 if (rc) {
6349 dev_warn(&card->gdev->dev,
6350 "Starting outbound TCP segmentation offload for %s failed\n",
6351 QETH_CARD_IFNAME(card));
6352 return -EIO;
6353 }
6354 dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
6355 } else {
6356 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
6357 IPA_CMD_ASS_STOP, 0);
6358 }
4d7def2a
TR		 6359 return rc;
6360}
8f43fb00 6361
ce344356
JW		 6362#define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO)
6363
6364/**
6365 * qeth_recover_features() - Restore device features after recovery
6366 * @dev: the recovering net_device
6367 *
6368 * Caller must hold rtnl lock.
6369 */
6370void qeth_recover_features(struct net_device *dev)
e830baa9 6371{
ce344356 6372 netdev_features_t features = dev->features;
e830baa9 6373 struct qeth_card *card = dev->ml_priv;
e830baa9 6374
ce344356
JW		 6375 /* force-off any feature that needs an IPA sequence.
6376 * netdev_update_features() will restart them.
6377 */
6378 dev->features &= ~QETH_HW_FEATURES;
6379 netdev_update_features(dev);
e830baa9 6380
ce344356
JW		 6381 if (features == dev->features)
6382 return;
e830baa9
HW		 6383 dev_warn(&card->gdev->dev,
6384 "Device recovery failed to restore all offload features\n");
e830baa9
HW		 6385}
6386EXPORT_SYMBOL_GPL(qeth_recover_features);
6387
8f43fb00
TR		 6388int qeth_set_features(struct net_device *dev, netdev_features_t features)
6389{
6390 struct qeth_card *card = dev->ml_priv;
6c7cd712 6391 netdev_features_t changed = dev->features ^ features;
8f43fb00
TR		 6392 int rc = 0;
6393
6394 QETH_DBF_TEXT(SETUP, 2, "setfeat");
6395 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6396
6c7cd712 6397 if ((changed & NETIF_F_IP_CSUM)) {
8f43fb00
TR		 6398 rc = qeth_set_ipa_csum(card,
6399 features & NETIF_F_IP_CSUM ? 1 : 0,
6400 IPA_OUTBOUND_CHECKSUM);
6c7cd712
HW		 6401 if (rc)
6402 changed ^= NETIF_F_IP_CSUM;
6403 }
6404 if ((changed & NETIF_F_RXCSUM)) {
6405 rc = qeth_set_ipa_csum(card,
8f43fb00
TR		 6406 features & NETIF_F_RXCSUM ? 1 : 0,
6407 IPA_INBOUND_CHECKSUM);
6c7cd712
HW		 6408 if (rc)
6409 changed ^= NETIF_F_RXCSUM;
6410 }
6411 if ((changed & NETIF_F_TSO)) {
6412 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
6413 if (rc)
6414 changed ^= NETIF_F_TSO;
6415 }
6416
6417 /* everything changed successfully? */
6418 if ((dev->features ^ features) == changed)
6419 return 0;
6420 /* something went wrong. save changed features and return error */
6421 dev->features ^= changed;
6422 return -EIO;
8f43fb00
TR		 6423}
6424EXPORT_SYMBOL_GPL(qeth_set_features);
6425
6426netdev_features_t qeth_fix_features(struct net_device *dev,
6427 netdev_features_t features)
6428{
6429 struct qeth_card *card = dev->ml_priv;
6430
6431 QETH_DBF_TEXT(SETUP, 2, "fixfeat");
6432 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
6433 features &= ~NETIF_F_IP_CSUM;
6434 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
6435 features &= ~NETIF_F_RXCSUM;
cf536ffe 6436 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
8f43fb00 6437 features &= ~NETIF_F_TSO;
6c7cd712
HW		 6438 /* if the card isn't up, remove features that require hw changes */
6439 if (card->state == CARD_STATE_DOWN ||
6440 card->state == CARD_STATE_RECOVER)
ce344356 6441 features &= ~QETH_HW_FEATURES;
8f43fb00
TR		 6442 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
6443 return features;
6444}
6445EXPORT_SYMBOL_GPL(qeth_fix_features);
4d7def2a 6446
6d69b1f1
JW		 6447netdev_features_t qeth_features_check(struct sk_buff *skb,
6448 struct net_device *dev,
6449 netdev_features_t features)
6450{
6451 /* GSO segmentation builds skbs with
6452 * a (small) linear part for the headers, and
6453 * page frags for the data.
6454 * Compared to a linear skb, the header-only part consumes an
6455 * additional buffer element. This reduces buffer utilization, and
6456 * hurts throughput. So compress small segments into one element.
6457 */
6458 if (netif_needs_gso(skb, features)) {
6459 /* match skb_segment(): */
6460 unsigned int doffset = skb->data - skb_mac_header(skb);
6461 unsigned int hsize = skb_shinfo(skb)->gso_size;
6462 unsigned int hroom = skb_headroom(skb);
6463
6464 /* linearize only if resulting skb allocations are order-0: */
6465 if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
6466 features &= ~NETIF_F_SG;
6467 }
6468
6469 return vlan_features_check(skb, features);
6470}
6471EXPORT_SYMBOL_GPL(qeth_features_check);
6472
4a71df50
FB		 6473static int __init qeth_core_init(void)
6474{
6475 int rc;
6476
74eacdb9 6477 pr_info("loading core functions\n");
4a71df50 6478 INIT_LIST_HEAD(&qeth_core_card_list.list);
819dc537 6479 INIT_LIST_HEAD(&qeth_dbf_list);
4a71df50 6480 rwlock_init(&qeth_core_card_list.rwlock);
2022e00c 6481 mutex_init(&qeth_mod_mutex);
4a71df50 6482
0f54761d
SR		 6483 qeth_wq = create_singlethread_workqueue("qeth_wq");
6484
4a71df50
FB		 6485 rc = qeth_register_dbf_views();
6486 if (rc)
6487 goto out_err;
035da16f 6488 qeth_core_root_dev = root_device_register("qeth");
9262c6c2 6489 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
4a71df50
FB		 6490 if (rc)
6491 goto register_err;
683d718a
FB		 6492 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6493 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6494 if (!qeth_core_header_cache) {
6495 rc = -ENOMEM;
6496 goto slab_err;
6497 }
0da9581d
EL		 6498 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6499 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6500 if (!qeth_qdio_outbuf_cache) {
6501 rc = -ENOMEM;
6502 goto cqslab_err;
6503 }
afb6ac59
SO		 6504 rc = ccw_driver_register(&qeth_ccw_driver);
6505 if (rc)
6506 goto ccw_err;
6507 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6508 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6509 if (rc)
6510 goto ccwgroup_err;
0da9581d 6511
683d718a 6512 return 0;
afb6ac59
SO		 6513
6514ccwgroup_err:
6515 ccw_driver_unregister(&qeth_ccw_driver);
6516ccw_err:
6517 kmem_cache_destroy(qeth_qdio_outbuf_cache);
0da9581d
EL		 6518cqslab_err:
6519 kmem_cache_destroy(qeth_core_header_cache);
683d718a 6520slab_err:
035da16f 6521 root_device_unregister(qeth_core_root_dev);
4a71df50 6522register_err:
4a71df50
FB		 6523 qeth_unregister_dbf_views();
6524out_err:
74eacdb9 6525 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 6526 return rc;
6527}
6528
6529static void __exit qeth_core_exit(void)
6530{
819dc537 6531 qeth_clear_dbf_list();
0f54761d 6532 destroy_workqueue(qeth_wq);
4a71df50
FB		 6533 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6534 ccw_driver_unregister(&qeth_ccw_driver);
0da9581d 6535 kmem_cache_destroy(qeth_qdio_outbuf_cache);
683d718a 6536 kmem_cache_destroy(qeth_core_header_cache);
afb6ac59 6537 root_device_unregister(qeth_core_root_dev);
4a71df50 6538 qeth_unregister_dbf_views();
74eacdb9 6539 pr_info("core functions removed\n");
4a71df50
FB		 6540}
6541
6542module_init(qeth_core_init);
6543module_exit(qeth_core_exit);
6544MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6545MODULE_DESCRIPTION("qeth core functions");
6546MODULE_LICENSE("GPL");
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