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qeth: avoid crash in case of layer mismatch for VSWITCH
[mirror_ubuntu-hirsute-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
20#include <linux/ipv6.h>
21#include <linux/tcp.h>
22#include <linux/mii.h>
23#include <linux/kthread.h>
24
ab4227cb
MS		 25#include <asm/ebcdic.h>
26#include <asm/io.h>
4a71df50
FB		 27#include <asm/s390_rdev.h>
28
29#include "qeth_core.h"
30#include "qeth_core_offl.h"
31
d11ba0c4
PT		 32struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_QERR] = {"qeth_qerr",
38 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_TRACE] = {"qeth_trace",
40 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
41 [QETH_DBF_MSG] = {"qeth_msg",
42 8, 1, 128, 3, &debug_sprintf_view, NULL},
43 [QETH_DBF_SENSE] = {"qeth_sense",
44 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_MISC] = {"qeth_misc",
46 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
47 [QETH_DBF_CTRL] = {"qeth_control",
48 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
49};
50EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 51
52struct qeth_card_list_struct qeth_core_card_list;
53EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 54struct kmem_cache *qeth_core_header_cache;
55EXPORT_SYMBOL_GPL(qeth_core_header_cache);
4a71df50
FB		 56
57static struct device *qeth_core_root_dev;
58static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
59static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 60
61static void qeth_send_control_data_cb(struct qeth_channel *,
62 struct qeth_cmd_buffer *);
63static int qeth_issue_next_read(struct qeth_card *);
64static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
65static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
66static void qeth_free_buffer_pool(struct qeth_card *);
67static int qeth_qdio_establish(struct qeth_card *);
68
69
70static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
71 struct qdio_buffer *buffer, int is_tso,
72 int *next_element_to_fill)
73{
74 struct skb_frag_struct *frag;
75 int fragno;
76 unsigned long addr;
77 int element, cnt, dlen;
78
79 fragno = skb_shinfo(skb)->nr_frags;
80 element = *next_element_to_fill;
81 dlen = 0;
82
83 if (is_tso)
84 buffer->element[element].flags =
85 SBAL_FLAGS_MIDDLE_FRAG;
86 else
87 buffer->element[element].flags =
88 SBAL_FLAGS_FIRST_FRAG;
89 dlen = skb->len - skb->data_len;
90 if (dlen) {
91 buffer->element[element].addr = skb->data;
92 buffer->element[element].length = dlen;
93 element++;
94 }
95 for (cnt = 0; cnt < fragno; cnt++) {
96 frag = &skb_shinfo(skb)->frags[cnt];
97 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
98 frag->page_offset;
99 buffer->element[element].addr = (char *)addr;
100 buffer->element[element].length = frag->size;
101 if (cnt < (fragno - 1))
102 buffer->element[element].flags =
103 SBAL_FLAGS_MIDDLE_FRAG;
104 else
105 buffer->element[element].flags =
106 SBAL_FLAGS_LAST_FRAG;
107 element++;
108 }
109 *next_element_to_fill = element;
110}
111
112static inline const char *qeth_get_cardname(struct qeth_card *card)
113{
114 if (card->info.guestlan) {
115 switch (card->info.type) {
116 case QETH_CARD_TYPE_OSAE:
117 return " Guest LAN QDIO";
118 case QETH_CARD_TYPE_IQD:
119 return " Guest LAN Hiper";
120 default:
121 return " unknown";
122 }
123 } else {
124 switch (card->info.type) {
125 case QETH_CARD_TYPE_OSAE:
126 return " OSD Express";
127 case QETH_CARD_TYPE_IQD:
128 return " HiperSockets";
129 case QETH_CARD_TYPE_OSN:
130 return " OSN QDIO";
131 default:
132 return " unknown";
133 }
134 }
135 return " n/a";
136}
137
138/* max length to be returned: 14 */
139const char *qeth_get_cardname_short(struct qeth_card *card)
140{
141 if (card->info.guestlan) {
142 switch (card->info.type) {
143 case QETH_CARD_TYPE_OSAE:
144 return "GuestLAN QDIO";
145 case QETH_CARD_TYPE_IQD:
146 return "GuestLAN Hiper";
147 default:
148 return "unknown";
149 }
150 } else {
151 switch (card->info.type) {
152 case QETH_CARD_TYPE_OSAE:
153 switch (card->info.link_type) {
154 case QETH_LINK_TYPE_FAST_ETH:
155 return "OSD_100";
156 case QETH_LINK_TYPE_HSTR:
157 return "HSTR";
158 case QETH_LINK_TYPE_GBIT_ETH:
159 return "OSD_1000";
160 case QETH_LINK_TYPE_10GBIT_ETH:
161 return "OSD_10GIG";
162 case QETH_LINK_TYPE_LANE_ETH100:
163 return "OSD_FE_LANE";
164 case QETH_LINK_TYPE_LANE_TR:
165 return "OSD_TR_LANE";
166 case QETH_LINK_TYPE_LANE_ETH1000:
167 return "OSD_GbE_LANE";
168 case QETH_LINK_TYPE_LANE:
169 return "OSD_ATM_LANE";
170 default:
171 return "OSD_Express";
172 }
173 case QETH_CARD_TYPE_IQD:
174 return "HiperSockets";
175 case QETH_CARD_TYPE_OSN:
176 return "OSN";
177 default:
178 return "unknown";
179 }
180 }
181 return "n/a";
182}
183
184void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
185 int clear_start_mask)
186{
187 unsigned long flags;
188
189 spin_lock_irqsave(&card->thread_mask_lock, flags);
190 card->thread_allowed_mask = threads;
191 if (clear_start_mask)
192 card->thread_start_mask &= threads;
193 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
194 wake_up(&card->wait_q);
195}
196EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
197
198int qeth_threads_running(struct qeth_card *card, unsigned long threads)
199{
200 unsigned long flags;
201 int rc = 0;
202
203 spin_lock_irqsave(&card->thread_mask_lock, flags);
204 rc = (card->thread_running_mask & threads);
205 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
206 return rc;
207}
208EXPORT_SYMBOL_GPL(qeth_threads_running);
209
210int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
211{
212 return wait_event_interruptible(card->wait_q,
213 qeth_threads_running(card, threads) == 0);
214}
215EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
216
217void qeth_clear_working_pool_list(struct qeth_card *card)
218{
219 struct qeth_buffer_pool_entry *pool_entry, *tmp;
220
d11ba0c4 221 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
4a71df50
FB		 222 list_for_each_entry_safe(pool_entry, tmp,
223 &card->qdio.in_buf_pool.entry_list, list){
224 list_del(&pool_entry->list);
225 }
226}
227EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
228
229static int qeth_alloc_buffer_pool(struct qeth_card *card)
230{
231 struct qeth_buffer_pool_entry *pool_entry;
232 void *ptr;
233 int i, j;
234
d11ba0c4 235 QETH_DBF_TEXT(TRACE, 5, "alocpool");
4a71df50
FB		 236 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
237 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
238 if (!pool_entry) {
239 qeth_free_buffer_pool(card);
240 return -ENOMEM;
241 }
242 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 243 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 244 if (!ptr) {
245 while (j > 0)
246 free_page((unsigned long)
247 pool_entry->elements[--j]);
248 kfree(pool_entry);
249 qeth_free_buffer_pool(card);
250 return -ENOMEM;
251 }
252 pool_entry->elements[j] = ptr;
253 }
254 list_add(&pool_entry->init_list,
255 &card->qdio.init_pool.entry_list);
256 }
257 return 0;
258}
259
260int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
261{
d11ba0c4 262 QETH_DBF_TEXT(TRACE, 2, "realcbp");
4a71df50
FB		 263
264 if ((card->state != CARD_STATE_DOWN) &&
265 (card->state != CARD_STATE_RECOVER))
266 return -EPERM;
267
268 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
269 qeth_clear_working_pool_list(card);
270 qeth_free_buffer_pool(card);
271 card->qdio.in_buf_pool.buf_count = bufcnt;
272 card->qdio.init_pool.buf_count = bufcnt;
273 return qeth_alloc_buffer_pool(card);
274}
275
276int qeth_set_large_send(struct qeth_card *card,
277 enum qeth_large_send_types type)
278{
279 int rc = 0;
280
281 if (card->dev == NULL) {
282 card->options.large_send = type;
283 return 0;
284 }
285 if (card->state == CARD_STATE_UP)
286 netif_tx_disable(card->dev);
287 card->options.large_send = type;
288 switch (card->options.large_send) {
289 case QETH_LARGE_SEND_EDDP:
290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
291 NETIF_F_HW_CSUM;
292 break;
293 case QETH_LARGE_SEND_TSO:
294 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
295 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
296 NETIF_F_HW_CSUM;
297 } else {
4a71df50
FB		 298 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
299 NETIF_F_HW_CSUM);
300 card->options.large_send = QETH_LARGE_SEND_NO;
301 rc = -EOPNOTSUPP;
302 }
303 break;
304 default: /* includes QETH_LARGE_SEND_NO */
305 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
306 NETIF_F_HW_CSUM);
307 break;
308 }
309 if (card->state == CARD_STATE_UP)
310 netif_wake_queue(card->dev);
311 return rc;
312}
313EXPORT_SYMBOL_GPL(qeth_set_large_send);
314
315static int qeth_issue_next_read(struct qeth_card *card)
316{
317 int rc;
318 struct qeth_cmd_buffer *iob;
319
d11ba0c4 320 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
4a71df50
FB		 321 if (card->read.state != CH_STATE_UP)
322 return -EIO;
323 iob = qeth_get_buffer(&card->read);
324 if (!iob) {
74eacdb9
FB		 325 dev_warn(&card->gdev->dev, "The qeth device driver "
326 "failed to recover an error on the device\n");
327 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
328 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 329 return -ENOMEM;
330 }
331 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
d11ba0c4 332 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 333 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
334 (addr_t) iob, 0, 0);
335 if (rc) {
74eacdb9
FB		 336 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
337 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50
FB		 338 atomic_set(&card->read.irq_pending, 0);
339 qeth_schedule_recovery(card);
340 wake_up(&card->wait_q);
341 }
342 return rc;
343}
344
345static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
346{
347 struct qeth_reply *reply;
348
349 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
350 if (reply) {
351 atomic_set(&reply->refcnt, 1);
352 atomic_set(&reply->received, 0);
353 reply->card = card;
354 };
355 return reply;
356}
357
358static void qeth_get_reply(struct qeth_reply *reply)
359{
360 WARN_ON(atomic_read(&reply->refcnt) <= 0);
361 atomic_inc(&reply->refcnt);
362}
363
364static void qeth_put_reply(struct qeth_reply *reply)
365{
366 WARN_ON(atomic_read(&reply->refcnt) <= 0);
367 if (atomic_dec_and_test(&reply->refcnt))
368 kfree(reply);
369}
370
d11ba0c4 371static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 372 struct qeth_card *card)
373{
4a71df50 374 char *ipa_name;
d11ba0c4 375 int com = cmd->hdr.command;
4a71df50 376 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 377 if (rc)
378 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
379 ipa_name, com, QETH_CARD_IFNAME(card),
380 rc, qeth_get_ipa_msg(rc));
381 else
382 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
383 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 384}
385
386static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
387 struct qeth_cmd_buffer *iob)
388{
389 struct qeth_ipa_cmd *cmd = NULL;
390
d11ba0c4 391 QETH_DBF_TEXT(TRACE, 5, "chkipad");
4a71df50
FB		 392 if (IS_IPA(iob->data)) {
393 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
394 if (IS_IPA_REPLY(cmd)) {
d11ba0c4
PT		 395 if (cmd->hdr.command < IPA_CMD_SETCCID ||
396 cmd->hdr.command > IPA_CMD_MODCCID)
397 qeth_issue_ipa_msg(cmd,
398 cmd->hdr.return_code, card);
4a71df50
FB		 399 return cmd;
400 } else {
401 switch (cmd->hdr.command) {
402 case IPA_CMD_STOPLAN:
74eacdb9
FB		 403 dev_warn(&card->gdev->dev,
404 "The link for interface %s on CHPID"
405 " 0x%X failed\n",
4a71df50
FB		 406 QETH_CARD_IFNAME(card),
407 card->info.chpid);
408 card->lan_online = 0;
409 if (card->dev && netif_carrier_ok(card->dev))
410 netif_carrier_off(card->dev);
411 return NULL;
412 case IPA_CMD_STARTLAN:
74eacdb9
FB		 413 dev_info(&card->gdev->dev,
414 "The link for %s on CHPID 0x%X has"
415 " been restored\n",
4a71df50
FB		 416 QETH_CARD_IFNAME(card),
417 card->info.chpid);
418 netif_carrier_on(card->dev);
922dc062 419 card->lan_online = 1;
4a71df50
FB		 420 qeth_schedule_recovery(card);
421 return NULL;
422 case IPA_CMD_MODCCID:
423 return cmd;
424 case IPA_CMD_REGISTER_LOCAL_ADDR:
d11ba0c4 425 QETH_DBF_TEXT(TRACE, 3, "irla");
4a71df50
FB		 426 break;
427 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
d11ba0c4 428 QETH_DBF_TEXT(TRACE, 3, "urla");
4a71df50
FB		 429 break;
430 default:
c4cef07c 431 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 432 "but not a reply!\n");
433 break;
434 }
435 }
436 }
437 return cmd;
438}
439
440void qeth_clear_ipacmd_list(struct qeth_card *card)
441{
442 struct qeth_reply *reply, *r;
443 unsigned long flags;
444
d11ba0c4 445 QETH_DBF_TEXT(TRACE, 4, "clipalst");
4a71df50
FB		 446
447 spin_lock_irqsave(&card->lock, flags);
448 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
449 qeth_get_reply(reply);
450 reply->rc = -EIO;
451 atomic_inc(&reply->received);
452 list_del_init(&reply->list);
453 wake_up(&reply->wait_q);
454 qeth_put_reply(reply);
455 }
456 spin_unlock_irqrestore(&card->lock, flags);
457}
458EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
459
460static int qeth_check_idx_response(unsigned char *buffer)
461{
462 if (!buffer)
463 return 0;
464
d11ba0c4 465 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 466 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 467 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 468 "with cause code 0x%02x%s\n",
469 buffer[4],
470 ((buffer[4] == 0x22) ?
471 " -- try another portname" : ""));
d11ba0c4
PT		 472 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
473 QETH_DBF_TEXT(TRACE, 2, " idxterm");
474 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 475 return -EIO;
476 }
477 return 0;
478}
479
480static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
481 __u32 len)
482{
483 struct qeth_card *card;
484
d11ba0c4 485 QETH_DBF_TEXT(TRACE, 4, "setupccw");
4a71df50
FB		 486 card = CARD_FROM_CDEV(channel->ccwdev);
487 if (channel == &card->read)
488 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
489 else
490 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
491 channel->ccw.count = len;
492 channel->ccw.cda = (__u32) __pa(iob);
493}
494
495static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
496{
497 __u8 index;
498
d11ba0c4 499 QETH_DBF_TEXT(TRACE, 6, "getbuff");
4a71df50
FB		 500 index = channel->io_buf_no;
501 do {
502 if (channel->iob[index].state == BUF_STATE_FREE) {
503 channel->iob[index].state = BUF_STATE_LOCKED;
504 channel->io_buf_no = (channel->io_buf_no + 1) %
505 QETH_CMD_BUFFER_NO;
506 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
507 return channel->iob + index;
508 }
509 index = (index + 1) % QETH_CMD_BUFFER_NO;
510 } while (index != channel->io_buf_no);
511
512 return NULL;
513}
514
515void qeth_release_buffer(struct qeth_channel *channel,
516 struct qeth_cmd_buffer *iob)
517{
518 unsigned long flags;
519
d11ba0c4 520 QETH_DBF_TEXT(TRACE, 6, "relbuff");
4a71df50
FB		 521 spin_lock_irqsave(&channel->iob_lock, flags);
522 memset(iob->data, 0, QETH_BUFSIZE);
523 iob->state = BUF_STATE_FREE;
524 iob->callback = qeth_send_control_data_cb;
525 iob->rc = 0;
526 spin_unlock_irqrestore(&channel->iob_lock, flags);
527}
528EXPORT_SYMBOL_GPL(qeth_release_buffer);
529
530static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
531{
532 struct qeth_cmd_buffer *buffer = NULL;
533 unsigned long flags;
534
535 spin_lock_irqsave(&channel->iob_lock, flags);
536 buffer = __qeth_get_buffer(channel);
537 spin_unlock_irqrestore(&channel->iob_lock, flags);
538 return buffer;
539}
540
541struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
542{
543 struct qeth_cmd_buffer *buffer;
544 wait_event(channel->wait_q,
545 ((buffer = qeth_get_buffer(channel)) != NULL));
546 return buffer;
547}
548EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
549
550void qeth_clear_cmd_buffers(struct qeth_channel *channel)
551{
552 int cnt;
553
554 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
555 qeth_release_buffer(channel, &channel->iob[cnt]);
556 channel->buf_no = 0;
557 channel->io_buf_no = 0;
558}
559EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
560
561static void qeth_send_control_data_cb(struct qeth_channel *channel,
562 struct qeth_cmd_buffer *iob)
563{
564 struct qeth_card *card;
565 struct qeth_reply *reply, *r;
566 struct qeth_ipa_cmd *cmd;
567 unsigned long flags;
568 int keep_reply;
569
d11ba0c4 570 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
4a71df50
FB		 571
572 card = CARD_FROM_CDEV(channel->ccwdev);
573 if (qeth_check_idx_response(iob->data)) {
574 qeth_clear_ipacmd_list(card);
fc9c2460
UB		 575 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
576 dev_err(&card->gdev->dev,
577 "The qeth device is not configured "
578 "for the OSI layer required by z/VM\n");
4a71df50
FB		 579 qeth_schedule_recovery(card);
580 goto out;
581 }
582
583 cmd = qeth_check_ipa_data(card, iob);
584 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
585 goto out;
586 /*in case of OSN : check if cmd is set */
587 if (card->info.type == QETH_CARD_TYPE_OSN &&
588 cmd &&
589 cmd->hdr.command != IPA_CMD_STARTLAN &&
590 card->osn_info.assist_cb != NULL) {
591 card->osn_info.assist_cb(card->dev, cmd);
592 goto out;
593 }
594
595 spin_lock_irqsave(&card->lock, flags);
596 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
597 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
598 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
599 qeth_get_reply(reply);
600 list_del_init(&reply->list);
601 spin_unlock_irqrestore(&card->lock, flags);
602 keep_reply = 0;
603 if (reply->callback != NULL) {
604 if (cmd) {
605 reply->offset = (__u16)((char *)cmd -
606 (char *)iob->data);
607 keep_reply = reply->callback(card,
608 reply,
609 (unsigned long)cmd);
610 } else
611 keep_reply = reply->callback(card,
612 reply,
613 (unsigned long)iob);
614 }
615 if (cmd)
616 reply->rc = (u16) cmd->hdr.return_code;
617 else if (iob->rc)
618 reply->rc = iob->rc;
619 if (keep_reply) {
620 spin_lock_irqsave(&card->lock, flags);
621 list_add_tail(&reply->list,
622 &card->cmd_waiter_list);
623 spin_unlock_irqrestore(&card->lock, flags);
624 } else {
625 atomic_inc(&reply->received);
626 wake_up(&reply->wait_q);
627 }
628 qeth_put_reply(reply);
629 goto out;
630 }
631 }
632 spin_unlock_irqrestore(&card->lock, flags);
633out:
634 memcpy(&card->seqno.pdu_hdr_ack,
635 QETH_PDU_HEADER_SEQ_NO(iob->data),
636 QETH_SEQ_NO_LENGTH);
637 qeth_release_buffer(channel, iob);
638}
639
640static int qeth_setup_channel(struct qeth_channel *channel)
641{
642 int cnt;
643
d11ba0c4 644 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50
FB		 645 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
646 channel->iob[cnt].data = (char *)
647 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
648 if (channel->iob[cnt].data == NULL)
649 break;
650 channel->iob[cnt].state = BUF_STATE_FREE;
651 channel->iob[cnt].channel = channel;
652 channel->iob[cnt].callback = qeth_send_control_data_cb;
653 channel->iob[cnt].rc = 0;
654 }
655 if (cnt < QETH_CMD_BUFFER_NO) {
656 while (cnt-- > 0)
657 kfree(channel->iob[cnt].data);
658 return -ENOMEM;
659 }
660 channel->buf_no = 0;
661 channel->io_buf_no = 0;
662 atomic_set(&channel->irq_pending, 0);
663 spin_lock_init(&channel->iob_lock);
664
665 init_waitqueue_head(&channel->wait_q);
666 return 0;
667}
668
669static int qeth_set_thread_start_bit(struct qeth_card *card,
670 unsigned long thread)
671{
672 unsigned long flags;
673
674 spin_lock_irqsave(&card->thread_mask_lock, flags);
675 if (!(card->thread_allowed_mask & thread) ||
676 (card->thread_start_mask & thread)) {
677 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
678 return -EPERM;
679 }
680 card->thread_start_mask |= thread;
681 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
682 return 0;
683}
684
685void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
686{
687 unsigned long flags;
688
689 spin_lock_irqsave(&card->thread_mask_lock, flags);
690 card->thread_start_mask &= ~thread;
691 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
692 wake_up(&card->wait_q);
693}
694EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
695
696void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
697{
698 unsigned long flags;
699
700 spin_lock_irqsave(&card->thread_mask_lock, flags);
701 card->thread_running_mask &= ~thread;
702 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
703 wake_up(&card->wait_q);
704}
705EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
706
707static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
708{
709 unsigned long flags;
710 int rc = 0;
711
712 spin_lock_irqsave(&card->thread_mask_lock, flags);
713 if (card->thread_start_mask & thread) {
714 if ((card->thread_allowed_mask & thread) &&
715 !(card->thread_running_mask & thread)) {
716 rc = 1;
717 card->thread_start_mask &= ~thread;
718 card->thread_running_mask |= thread;
719 } else
720 rc = -EPERM;
721 }
722 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
723 return rc;
724}
725
726int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
727{
728 int rc = 0;
729
730 wait_event(card->wait_q,
731 (rc = __qeth_do_run_thread(card, thread)) >= 0);
732 return rc;
733}
734EXPORT_SYMBOL_GPL(qeth_do_run_thread);
735
736void qeth_schedule_recovery(struct qeth_card *card)
737{
d11ba0c4 738 QETH_DBF_TEXT(TRACE, 2, "startrec");
4a71df50
FB		 739 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
740 schedule_work(&card->kernel_thread_starter);
741}
742EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
743
744static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
745{
746 int dstat, cstat;
747 char *sense;
748
749 sense = (char *) irb->ecw;
23d805b6
PO		 750 cstat = irb->scsw.cmd.cstat;
751 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 752
753 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
754 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
755 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
d11ba0c4 756 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
74eacdb9
FB		 757 dev_warn(&cdev->dev, "The qeth device driver "
758 "failed to recover an error on the device\n");
759 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
760 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 761 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
762 16, 1, irb, 64, 1);
763 return 1;
764 }
765
766 if (dstat & DEV_STAT_UNIT_CHECK) {
767 if (sense[SENSE_RESETTING_EVENT_BYTE] &
768 SENSE_RESETTING_EVENT_FLAG) {
d11ba0c4 769 QETH_DBF_TEXT(TRACE, 2, "REVIND");
4a71df50
FB		 770 return 1;
771 }
772 if (sense[SENSE_COMMAND_REJECT_BYTE] &
773 SENSE_COMMAND_REJECT_FLAG) {
d11ba0c4 774 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
28a7e4c9 775 return 1;
4a71df50
FB		 776 }
777 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
d11ba0c4 778 QETH_DBF_TEXT(TRACE, 2, "AFFE");
4a71df50
FB		 779 return 1;
780 }
781 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
d11ba0c4 782 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
4a71df50
FB		 783 return 0;
784 }
d11ba0c4 785 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
4a71df50
FB		 786 return 1;
787 }
788 return 0;
789}
790
791static long __qeth_check_irb_error(struct ccw_device *cdev,
792 unsigned long intparm, struct irb *irb)
793{
794 if (!IS_ERR(irb))
795 return 0;
796
797 switch (PTR_ERR(irb)) {
798 case -EIO:
74eacdb9
FB		 799 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
800 dev_name(&cdev->dev));
d11ba0c4
PT		 801 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
802 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 803 break;
804 case -ETIMEDOUT:
74eacdb9
FB		 805 dev_warn(&cdev->dev, "A hardware operation timed out"
806 " on the device\n");
d11ba0c4
PT		 807 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
808 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
4a71df50
FB		 809 if (intparm == QETH_RCD_PARM) {
810 struct qeth_card *card = CARD_FROM_CDEV(cdev);
811
812 if (card && (card->data.ccwdev == cdev)) {
813 card->data.state = CH_STATE_DOWN;
814 wake_up(&card->wait_q);
815 }
816 }
817 break;
818 default:
74eacdb9
FB		 819 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
820 dev_name(&cdev->dev), PTR_ERR(irb));
d11ba0c4
PT		 821 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
822 QETH_DBF_TEXT(TRACE, 2, " rc???");
4a71df50
FB		 823 }
824 return PTR_ERR(irb);
825}
826
827static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
828 struct irb *irb)
829{
830 int rc;
831 int cstat, dstat;
832 struct qeth_cmd_buffer *buffer;
833 struct qeth_channel *channel;
834 struct qeth_card *card;
835 struct qeth_cmd_buffer *iob;
836 __u8 index;
837
d11ba0c4 838 QETH_DBF_TEXT(TRACE, 5, "irq");
4a71df50
FB		 839
840 if (__qeth_check_irb_error(cdev, intparm, irb))
841 return;
23d805b6
PO		 842 cstat = irb->scsw.cmd.cstat;
843 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 844
845 card = CARD_FROM_CDEV(cdev);
846 if (!card)
847 return;
848
849 if (card->read.ccwdev == cdev) {
850 channel = &card->read;
d11ba0c4 851 QETH_DBF_TEXT(TRACE, 5, "read");
4a71df50
FB		 852 } else if (card->write.ccwdev == cdev) {
853 channel = &card->write;
d11ba0c4 854 QETH_DBF_TEXT(TRACE, 5, "write");
4a71df50
FB		 855 } else {
856 channel = &card->data;
d11ba0c4 857 QETH_DBF_TEXT(TRACE, 5, "data");
4a71df50
FB		 858 }
859 atomic_set(&channel->irq_pending, 0);
860
23d805b6 861 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 862 channel->state = CH_STATE_STOPPED;
863
23d805b6 864 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 865 channel->state = CH_STATE_HALTED;
866
867 /*let's wake up immediately on data channel*/
868 if ((channel == &card->data) && (intparm != 0) &&
869 (intparm != QETH_RCD_PARM))
870 goto out;
871
872 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
d11ba0c4 873 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
4a71df50
FB		 874 /* we don't have to handle this further */
875 intparm = 0;
876 }
877 if (intparm == QETH_HALT_CHANNEL_PARM) {
d11ba0c4 878 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
4a71df50
FB		 879 /* we don't have to handle this further */
880 intparm = 0;
881 }
882 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
883 (dstat & DEV_STAT_UNIT_CHECK) ||
884 (cstat)) {
885 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 886 dev_warn(&channel->ccwdev->dev,
887 "The qeth device driver failed to recover "
888 "an error on the device\n");
889 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
890 "0x%X dstat 0x%X\n",
891 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 892 print_hex_dump(KERN_WARNING, "qeth: irb ",
893 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
894 print_hex_dump(KERN_WARNING, "qeth: sense data ",
895 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
896 }
897 if (intparm == QETH_RCD_PARM) {
898 channel->state = CH_STATE_DOWN;
899 goto out;
900 }
901 rc = qeth_get_problem(cdev, irb);
902 if (rc) {
28a7e4c9 903 qeth_clear_ipacmd_list(card);
4a71df50
FB		 904 qeth_schedule_recovery(card);
905 goto out;
906 }
907 }
908
909 if (intparm == QETH_RCD_PARM) {
910 channel->state = CH_STATE_RCD_DONE;
911 goto out;
912 }
913 if (intparm) {
914 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
915 buffer->state = BUF_STATE_PROCESSED;
916 }
917 if (channel == &card->data)
918 return;
919 if (channel == &card->read &&
920 channel->state == CH_STATE_UP)
921 qeth_issue_next_read(card);
922
923 iob = channel->iob;
924 index = channel->buf_no;
925 while (iob[index].state == BUF_STATE_PROCESSED) {
926 if (iob[index].callback != NULL)
927 iob[index].callback(channel, iob + index);
928
929 index = (index + 1) % QETH_CMD_BUFFER_NO;
930 }
931 channel->buf_no = index;
932out:
933 wake_up(&card->wait_q);
934 return;
935}
936
937static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
938 struct qeth_qdio_out_buffer *buf)
939{
940 int i;
941 struct sk_buff *skb;
942
943 /* is PCI flag set on buffer? */
944 if (buf->buffer->element[0].flags & 0x40)
945 atomic_dec(&queue->set_pci_flags_count);
946
947 skb = skb_dequeue(&buf->skb_list);
948 while (skb) {
949 atomic_dec(&skb->users);
950 dev_kfree_skb_any(skb);
951 skb = skb_dequeue(&buf->skb_list);
952 }
953 qeth_eddp_buf_release_contexts(buf);
954 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 955 if (buf->buffer->element[i].addr && buf->is_header[i])
956 kmem_cache_free(qeth_core_header_cache,
957 buf->buffer->element[i].addr);
958 buf->is_header[i] = 0;
4a71df50
FB		 959 buf->buffer->element[i].length = 0;
960 buf->buffer->element[i].addr = NULL;
961 buf->buffer->element[i].flags = 0;
962 }
963 buf->next_element_to_fill = 0;
964 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
965}
966
967void qeth_clear_qdio_buffers(struct qeth_card *card)
968{
969 int i, j;
970
d11ba0c4 971 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
4a71df50
FB		 972 /* clear outbound buffers to free skbs */
973 for (i = 0; i < card->qdio.no_out_queues; ++i)
974 if (card->qdio.out_qs[i]) {
975 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
976 qeth_clear_output_buffer(card->qdio.out_qs[i],
977 &card->qdio.out_qs[i]->bufs[j]);
978 }
979}
980EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
981
982static void qeth_free_buffer_pool(struct qeth_card *card)
983{
984 struct qeth_buffer_pool_entry *pool_entry, *tmp;
985 int i = 0;
d11ba0c4 986 QETH_DBF_TEXT(TRACE, 5, "freepool");
4a71df50
FB		 987 list_for_each_entry_safe(pool_entry, tmp,
988 &card->qdio.init_pool.entry_list, init_list){
989 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
990 free_page((unsigned long)pool_entry->elements[i]);
991 list_del(&pool_entry->init_list);
992 kfree(pool_entry);
993 }
994}
995
996static void qeth_free_qdio_buffers(struct qeth_card *card)
997{
998 int i, j;
999
d11ba0c4 1000 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
4a71df50
FB		 1001 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1002 QETH_QDIO_UNINITIALIZED)
1003 return;
1004 kfree(card->qdio.in_q);
1005 card->qdio.in_q = NULL;
1006 /* inbound buffer pool */
1007 qeth_free_buffer_pool(card);
1008 /* free outbound qdio_qs */
1009 if (card->qdio.out_qs) {
1010 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1011 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1012 qeth_clear_output_buffer(card->qdio.out_qs[i],
1013 &card->qdio.out_qs[i]->bufs[j]);
1014 kfree(card->qdio.out_qs[i]);
1015 }
1016 kfree(card->qdio.out_qs);
1017 card->qdio.out_qs = NULL;
1018 }
1019}
1020
1021static void qeth_clean_channel(struct qeth_channel *channel)
1022{
1023 int cnt;
1024
d11ba0c4 1025 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1026 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1027 kfree(channel->iob[cnt].data);
1028}
1029
1030static int qeth_is_1920_device(struct qeth_card *card)
1031{
1032 int single_queue = 0;
1033 struct ccw_device *ccwdev;
1034 struct channelPath_dsc {
1035 u8 flags;
1036 u8 lsn;
1037 u8 desc;
1038 u8 chpid;
1039 u8 swla;
1040 u8 zeroes;
1041 u8 chla;
1042 u8 chpp;
1043 } *chp_dsc;
1044
d11ba0c4 1045 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
4a71df50
FB		 1046
1047 ccwdev = card->data.ccwdev;
1048 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1049 if (chp_dsc != NULL) {
1050 /* CHPP field bit 6 == 1 -> single queue */
1051 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1052 kfree(chp_dsc);
1053 }
d11ba0c4 1054 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
4a71df50
FB		 1055 return single_queue;
1056}
1057
1058static void qeth_init_qdio_info(struct qeth_card *card)
1059{
d11ba0c4 1060 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1061 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1062 /* inbound */
1063 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1064 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1065 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1066 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1067 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1068}
1069
1070static void qeth_set_intial_options(struct qeth_card *card)
1071{
1072 card->options.route4.type = NO_ROUTER;
1073 card->options.route6.type = NO_ROUTER;
1074 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1075 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1076 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1077 card->options.fake_broadcast = 0;
1078 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1079 card->options.performance_stats = 0;
1080 card->options.rx_sg_cb = QETH_RX_SG_CB;
1081}
1082
1083static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1084{
1085 unsigned long flags;
1086 int rc = 0;
1087
1088 spin_lock_irqsave(&card->thread_mask_lock, flags);
d11ba0c4 1089 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
4a71df50
FB		 1090 (u8) card->thread_start_mask,
1091 (u8) card->thread_allowed_mask,
1092 (u8) card->thread_running_mask);
1093 rc = (card->thread_start_mask & thread);
1094 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1095 return rc;
1096}
1097
1098static void qeth_start_kernel_thread(struct work_struct *work)
1099{
1100 struct qeth_card *card = container_of(work, struct qeth_card,
1101 kernel_thread_starter);
d11ba0c4 1102 QETH_DBF_TEXT(TRACE , 2, "strthrd");
4a71df50
FB		 1103
1104 if (card->read.state != CH_STATE_UP &&
1105 card->write.state != CH_STATE_UP)
1106 return;
1107 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1108 kthread_run(card->discipline.recover, (void *) card,
1109 "qeth_recover");
1110}
1111
1112static int qeth_setup_card(struct qeth_card *card)
1113{
1114
d11ba0c4
PT		 1115 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1116 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1117
1118 card->read.state = CH_STATE_DOWN;
1119 card->write.state = CH_STATE_DOWN;
1120 card->data.state = CH_STATE_DOWN;
1121 card->state = CARD_STATE_DOWN;
1122 card->lan_online = 0;
1123 card->use_hard_stop = 0;
1124 card->dev = NULL;
1125 spin_lock_init(&card->vlanlock);
1126 spin_lock_init(&card->mclock);
1127 card->vlangrp = NULL;
1128 spin_lock_init(&card->lock);
1129 spin_lock_init(&card->ip_lock);
1130 spin_lock_init(&card->thread_mask_lock);
1131 card->thread_start_mask = 0;
1132 card->thread_allowed_mask = 0;
1133 card->thread_running_mask = 0;
1134 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1135 INIT_LIST_HEAD(&card->ip_list);
1136 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1137 if (!card->ip_tbd_list) {
d11ba0c4 1138 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
4a71df50
FB		 1139 return -ENOMEM;
1140 }
1141 INIT_LIST_HEAD(card->ip_tbd_list);
1142 INIT_LIST_HEAD(&card->cmd_waiter_list);
1143 init_waitqueue_head(&card->wait_q);
1144 /* intial options */
1145 qeth_set_intial_options(card);
1146 /* IP address takeover */
1147 INIT_LIST_HEAD(&card->ipato.entries);
1148 card->ipato.enabled = 0;
1149 card->ipato.invert4 = 0;
1150 card->ipato.invert6 = 0;
1151 /* init QDIO stuff */
1152 qeth_init_qdio_info(card);
1153 return 0;
1154}
1155
6bcac508
MS		 1156static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1157{
1158 struct qeth_card *card = container_of(slr, struct qeth_card,
1159 qeth_service_level);
1160 seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card),
1161 card->info.mcl_level);
1162}
1163
4a71df50
FB		 1164static struct qeth_card *qeth_alloc_card(void)
1165{
1166 struct qeth_card *card;
1167
d11ba0c4 1168 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1169 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1170 if (!card)
1171 return NULL;
d11ba0c4 1172 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1173 if (qeth_setup_channel(&card->read)) {
1174 kfree(card);
1175 return NULL;
1176 }
1177 if (qeth_setup_channel(&card->write)) {
1178 qeth_clean_channel(&card->read);
1179 kfree(card);
1180 return NULL;
1181 }
1182 card->options.layer2 = -1;
6bcac508
MS		 1183 card->qeth_service_level.seq_print = qeth_core_sl_print;
1184 register_service_level(&card->qeth_service_level);
4a71df50
FB		 1185 return card;
1186}
1187
1188static int qeth_determine_card_type(struct qeth_card *card)
1189{
1190 int i = 0;
1191
d11ba0c4 1192 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1193
1194 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1195 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1196 while (known_devices[i][4]) {
1197 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1198 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1199 card->info.type = known_devices[i][4];
1200 card->qdio.no_out_queues = known_devices[i][8];
1201 card->info.is_multicast_different = known_devices[i][9];
1202 if (qeth_is_1920_device(card)) {
74eacdb9
FB		 1203 dev_info(&card->gdev->dev,
1204 "Priority Queueing not supported\n");
4a71df50
FB		 1205 card->qdio.no_out_queues = 1;
1206 card->qdio.default_out_queue = 0;
1207 }
1208 return 0;
1209 }
1210 i++;
1211 }
1212 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1213 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1214 "unknown type\n");
4a71df50
FB		 1215 return -ENOENT;
1216}
1217
1218static int qeth_clear_channel(struct qeth_channel *channel)
1219{
1220 unsigned long flags;
1221 struct qeth_card *card;
1222 int rc;
1223
d11ba0c4 1224 QETH_DBF_TEXT(TRACE, 3, "clearch");
4a71df50
FB		 1225 card = CARD_FROM_CDEV(channel->ccwdev);
1226 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1227 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1228 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1229
1230 if (rc)
1231 return rc;
1232 rc = wait_event_interruptible_timeout(card->wait_q,
1233 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1234 if (rc == -ERESTARTSYS)
1235 return rc;
1236 if (channel->state != CH_STATE_STOPPED)
1237 return -ETIME;
1238 channel->state = CH_STATE_DOWN;
1239 return 0;
1240}
1241
1242static int qeth_halt_channel(struct qeth_channel *channel)
1243{
1244 unsigned long flags;
1245 struct qeth_card *card;
1246 int rc;
1247
d11ba0c4 1248 QETH_DBF_TEXT(TRACE, 3, "haltch");
4a71df50
FB		 1249 card = CARD_FROM_CDEV(channel->ccwdev);
1250 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1251 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1252 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1253
1254 if (rc)
1255 return rc;
1256 rc = wait_event_interruptible_timeout(card->wait_q,
1257 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1258 if (rc == -ERESTARTSYS)
1259 return rc;
1260 if (channel->state != CH_STATE_HALTED)
1261 return -ETIME;
1262 return 0;
1263}
1264
1265static int qeth_halt_channels(struct qeth_card *card)
1266{
1267 int rc1 = 0, rc2 = 0, rc3 = 0;
1268
d11ba0c4 1269 QETH_DBF_TEXT(TRACE, 3, "haltchs");
4a71df50
FB		 1270 rc1 = qeth_halt_channel(&card->read);
1271 rc2 = qeth_halt_channel(&card->write);
1272 rc3 = qeth_halt_channel(&card->data);
1273 if (rc1)
1274 return rc1;
1275 if (rc2)
1276 return rc2;
1277 return rc3;
1278}
1279
1280static int qeth_clear_channels(struct qeth_card *card)
1281{
1282 int rc1 = 0, rc2 = 0, rc3 = 0;
1283
d11ba0c4 1284 QETH_DBF_TEXT(TRACE, 3, "clearchs");
4a71df50
FB		 1285 rc1 = qeth_clear_channel(&card->read);
1286 rc2 = qeth_clear_channel(&card->write);
1287 rc3 = qeth_clear_channel(&card->data);
1288 if (rc1)
1289 return rc1;
1290 if (rc2)
1291 return rc2;
1292 return rc3;
1293}
1294
1295static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1296{
1297 int rc = 0;
1298
d11ba0c4
PT		 1299 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1300 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
4a71df50
FB		 1301
1302 if (halt)
1303 rc = qeth_halt_channels(card);
1304 if (rc)
1305 return rc;
1306 return qeth_clear_channels(card);
1307}
1308
1309int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1310{
1311 int rc = 0;
1312
d11ba0c4 1313 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
4a71df50
FB		 1314 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1315 QETH_QDIO_CLEANING)) {
1316 case QETH_QDIO_ESTABLISHED:
1317 if (card->info.type == QETH_CARD_TYPE_IQD)
1318 rc = qdio_cleanup(CARD_DDEV(card),
1319 QDIO_FLAG_CLEANUP_USING_HALT);
1320 else
1321 rc = qdio_cleanup(CARD_DDEV(card),
1322 QDIO_FLAG_CLEANUP_USING_CLEAR);
1323 if (rc)
d11ba0c4 1324 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
4a71df50
FB		 1325 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1326 break;
1327 case QETH_QDIO_CLEANING:
1328 return rc;
1329 default:
1330 break;
1331 }
1332 rc = qeth_clear_halt_card(card, use_halt);
1333 if (rc)
d11ba0c4 1334 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
4a71df50
FB		 1335 card->state = CARD_STATE_DOWN;
1336 return rc;
1337}
1338EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1339
1340static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1341 int *length)
1342{
1343 struct ciw *ciw;
1344 char *rcd_buf;
1345 int ret;
1346 struct qeth_channel *channel = &card->data;
1347 unsigned long flags;
1348
1349 /*
1350 * scan for RCD command in extended SenseID data
1351 */
1352 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1353 if (!ciw || ciw->cmd == 0)
1354 return -EOPNOTSUPP;
1355 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1356 if (!rcd_buf)
1357 return -ENOMEM;
1358
1359 channel->ccw.cmd_code = ciw->cmd;
1360 channel->ccw.cda = (__u32) __pa(rcd_buf);
1361 channel->ccw.count = ciw->count;
1362 channel->ccw.flags = CCW_FLAG_SLI;
1363 channel->state = CH_STATE_RCD;
1364 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1365 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1366 QETH_RCD_PARM, LPM_ANYPATH, 0,
1367 QETH_RCD_TIMEOUT);
1368 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1369 if (!ret)
1370 wait_event(card->wait_q,
1371 (channel->state == CH_STATE_RCD_DONE ||
1372 channel->state == CH_STATE_DOWN));
1373 if (channel->state == CH_STATE_DOWN)
1374 ret = -EIO;
1375 else
1376 channel->state = CH_STATE_DOWN;
1377 if (ret) {
1378 kfree(rcd_buf);
1379 *buffer = NULL;
1380 *length = 0;
1381 } else {
1382 *length = ciw->count;
1383 *buffer = rcd_buf;
1384 }
1385 return ret;
1386}
1387
1388static int qeth_get_unitaddr(struct qeth_card *card)
1389{
1390 int length;
1391 char *prcd;
1392 int rc;
1393
d11ba0c4 1394 QETH_DBF_TEXT(SETUP, 2, "getunit");
4a71df50
FB		 1395 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1396 if (rc) {
74eacdb9
FB		 1397 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
1398 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 1399 return rc;
1400 }
1401 card->info.chpid = prcd[30];
1402 card->info.unit_addr2 = prcd[31];
1403 card->info.cula = prcd[63];
1404 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1405 (prcd[0x11] == _ascebc['M']));
1406 kfree(prcd);
1407 return 0;
1408}
1409
1410static void qeth_init_tokens(struct qeth_card *card)
1411{
1412 card->token.issuer_rm_w = 0x00010103UL;
1413 card->token.cm_filter_w = 0x00010108UL;
1414 card->token.cm_connection_w = 0x0001010aUL;
1415 card->token.ulp_filter_w = 0x0001010bUL;
1416 card->token.ulp_connection_w = 0x0001010dUL;
1417}
1418
1419static void qeth_init_func_level(struct qeth_card *card)
1420{
1421 if (card->ipato.enabled) {
1422 if (card->info.type == QETH_CARD_TYPE_IQD)
1423 card->info.func_level =
1424 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1425 else
1426 card->info.func_level =
1427 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1428 } else {
1429 if (card->info.type == QETH_CARD_TYPE_IQD)
1430 /*FIXME:why do we have same values for dis and ena for
1431 osae??? */
1432 card->info.func_level =
1433 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1434 else
1435 card->info.func_level =
1436 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1437 }
1438}
1439
4a71df50
FB		 1440static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1441 void (*idx_reply_cb)(struct qeth_channel *,
1442 struct qeth_cmd_buffer *))
1443{
1444 struct qeth_cmd_buffer *iob;
1445 unsigned long flags;
1446 int rc;
1447 struct qeth_card *card;
1448
d11ba0c4 1449 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1450 card = CARD_FROM_CDEV(channel->ccwdev);
1451 iob = qeth_get_buffer(channel);
1452 iob->callback = idx_reply_cb;
1453 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1454 channel->ccw.count = QETH_BUFSIZE;
1455 channel->ccw.cda = (__u32) __pa(iob->data);
1456
1457 wait_event(card->wait_q,
1458 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1459 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1460 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1461 rc = ccw_device_start(channel->ccwdev,
1462 &channel->ccw, (addr_t) iob, 0, 0);
1463 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1464
1465 if (rc) {
14cc21b6 1466 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1467 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1468 atomic_set(&channel->irq_pending, 0);
1469 wake_up(&card->wait_q);
1470 return rc;
1471 }
1472 rc = wait_event_interruptible_timeout(card->wait_q,
1473 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1474 if (rc == -ERESTARTSYS)
1475 return rc;
1476 if (channel->state != CH_STATE_UP) {
1477 rc = -ETIME;
d11ba0c4 1478 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1479 qeth_clear_cmd_buffers(channel);
1480 } else
1481 rc = 0;
1482 return rc;
1483}
1484
1485static int qeth_idx_activate_channel(struct qeth_channel *channel,
1486 void (*idx_reply_cb)(struct qeth_channel *,
1487 struct qeth_cmd_buffer *))
1488{
1489 struct qeth_card *card;
1490 struct qeth_cmd_buffer *iob;
1491 unsigned long flags;
1492 __u16 temp;
1493 __u8 tmp;
1494 int rc;
f06f6f32 1495 struct ccw_dev_id temp_devid;
4a71df50
FB		 1496
1497 card = CARD_FROM_CDEV(channel->ccwdev);
1498
d11ba0c4 1499 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1500
1501 iob = qeth_get_buffer(channel);
1502 iob->callback = idx_reply_cb;
1503 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1504 channel->ccw.count = IDX_ACTIVATE_SIZE;
1505 channel->ccw.cda = (__u32) __pa(iob->data);
1506 if (channel == &card->write) {
1507 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1508 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1509 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1510 card->seqno.trans_hdr++;
1511 } else {
1512 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1513 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1514 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1515 }
1516 tmp = ((__u8)card->info.portno) | 0x80;
1517 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1518 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1519 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1520 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1521 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1522 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1523 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1524 temp = (card->info.cula << 8) + card->info.unit_addr2;
1525 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1526
1527 wait_event(card->wait_q,
1528 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1529 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1530 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1531 rc = ccw_device_start(channel->ccwdev,
1532 &channel->ccw, (addr_t) iob, 0, 0);
1533 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1534
1535 if (rc) {
14cc21b6
FB		 1536 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1537 rc);
d11ba0c4 1538 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1539 atomic_set(&channel->irq_pending, 0);
1540 wake_up(&card->wait_q);
1541 return rc;
1542 }
1543 rc = wait_event_interruptible_timeout(card->wait_q,
1544 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1545 if (rc == -ERESTARTSYS)
1546 return rc;
1547 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1548 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1549 " failed to recover an error on the device\n");
1550 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1551 dev_name(&channel->ccwdev->dev));
d11ba0c4 1552 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1553 qeth_clear_cmd_buffers(channel);
1554 return -ETIME;
1555 }
1556 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1557}
1558
1559static int qeth_peer_func_level(int level)
1560{
1561 if ((level & 0xff) == 8)
1562 return (level & 0xff) + 0x400;
1563 if (((level >> 8) & 3) == 1)
1564 return (level & 0xff) + 0x200;
1565 return level;
1566}
1567
1568static void qeth_idx_write_cb(struct qeth_channel *channel,
1569 struct qeth_cmd_buffer *iob)
1570{
1571 struct qeth_card *card;
1572 __u16 temp;
1573
d11ba0c4 1574 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1575
1576 if (channel->state == CH_STATE_DOWN) {
1577 channel->state = CH_STATE_ACTIVATING;
1578 goto out;
1579 }
1580 card = CARD_FROM_CDEV(channel->ccwdev);
1581
1582 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1583 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1584 dev_err(&card->write.ccwdev->dev,
1585 "The adapter is used exclusively by another "
1586 "host\n");
4a71df50 1587 else
74eacdb9
FB		 1588 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1589 " negative reply\n",
1590 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1591 goto out;
1592 }
1593 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1594 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1595 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1596 "function level mismatch (sent: 0x%x, received: "
1597 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1598 card->info.func_level, temp);
4a71df50
FB		 1599 goto out;
1600 }
1601 channel->state = CH_STATE_UP;
1602out:
1603 qeth_release_buffer(channel, iob);
1604}
1605
1606static void qeth_idx_read_cb(struct qeth_channel *channel,
1607 struct qeth_cmd_buffer *iob)
1608{
1609 struct qeth_card *card;
1610 __u16 temp;
1611
d11ba0c4 1612 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1613 if (channel->state == CH_STATE_DOWN) {
1614 channel->state = CH_STATE_ACTIVATING;
1615 goto out;
1616 }
1617
1618 card = CARD_FROM_CDEV(channel->ccwdev);
1619 if (qeth_check_idx_response(iob->data))
1620 goto out;
1621
1622 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1623 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1624 dev_err(&card->write.ccwdev->dev,
1625 "The adapter is used exclusively by another "
1626 "host\n");
4a71df50 1627 else
74eacdb9
FB		 1628 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1629 " negative reply\n",
1630 dev_name(&card->read.ccwdev->dev));
4a71df50
FB		 1631 goto out;
1632 }
1633
1634/**
1635 * temporary fix for microcode bug
1636 * to revert it,replace OR by AND
1637 */
1638 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1639 (card->info.type == QETH_CARD_TYPE_OSAE))
1640 card->info.portname_required = 1;
1641
1642 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1643 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1644 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1645 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1646 dev_name(&card->read.ccwdev->dev),
1647 card->info.func_level, temp);
4a71df50
FB		 1648 goto out;
1649 }
1650 memcpy(&card->token.issuer_rm_r,
1651 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1652 QETH_MPC_TOKEN_LENGTH);
1653 memcpy(&card->info.mcl_level[0],
1654 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1655 channel->state = CH_STATE_UP;
1656out:
1657 qeth_release_buffer(channel, iob);
1658}
1659
1660void qeth_prepare_control_data(struct qeth_card *card, int len,
1661 struct qeth_cmd_buffer *iob)
1662{
1663 qeth_setup_ccw(&card->write, iob->data, len);
1664 iob->callback = qeth_release_buffer;
1665
1666 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1667 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1668 card->seqno.trans_hdr++;
1669 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1670 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1671 card->seqno.pdu_hdr++;
1672 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1673 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1674 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1675}
1676EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1677
1678int qeth_send_control_data(struct qeth_card *card, int len,
1679 struct qeth_cmd_buffer *iob,
1680 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1681 unsigned long),
1682 void *reply_param)
1683{
1684 int rc;
1685 unsigned long flags;
1686 struct qeth_reply *reply = NULL;
1687 unsigned long timeout;
1688
d11ba0c4 1689 QETH_DBF_TEXT(TRACE, 2, "sendctl");
4a71df50
FB		 1690
1691 reply = qeth_alloc_reply(card);
1692 if (!reply) {
4a71df50
FB		 1693 return -ENOMEM;
1694 }
1695 reply->callback = reply_cb;
1696 reply->param = reply_param;
1697 if (card->state == CARD_STATE_DOWN)
1698 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1699 else
1700 reply->seqno = card->seqno.ipa++;
1701 init_waitqueue_head(&reply->wait_q);
1702 spin_lock_irqsave(&card->lock, flags);
1703 list_add_tail(&reply->list, &card->cmd_waiter_list);
1704 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1705 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1706
1707 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1708 qeth_prepare_control_data(card, len, iob);
1709
1710 if (IS_IPA(iob->data))
1711 timeout = jiffies + QETH_IPA_TIMEOUT;
1712 else
1713 timeout = jiffies + QETH_TIMEOUT;
1714
d11ba0c4 1715 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 1716 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1717 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1718 (addr_t) iob, 0, 0);
1719 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1720 if (rc) {
74eacdb9
FB		 1721 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1722 "ccw_device_start rc = %i\n",
1723 dev_name(&card->write.ccwdev->dev), rc);
d11ba0c4 1724 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
4a71df50
FB		 1725 spin_lock_irqsave(&card->lock, flags);
1726 list_del_init(&reply->list);
1727 qeth_put_reply(reply);
1728 spin_unlock_irqrestore(&card->lock, flags);
1729 qeth_release_buffer(iob->channel, iob);
1730 atomic_set(&card->write.irq_pending, 0);
1731 wake_up(&card->wait_q);
1732 return rc;
1733 }
1734 while (!atomic_read(&reply->received)) {
1735 if (time_after(jiffies, timeout)) {
1736 spin_lock_irqsave(&reply->card->lock, flags);
1737 list_del_init(&reply->list);
1738 spin_unlock_irqrestore(&reply->card->lock, flags);
1739 reply->rc = -ETIME;
1740 atomic_inc(&reply->received);
1741 wake_up(&reply->wait_q);
1742 }
1743 cpu_relax();
1744 };
1745 rc = reply->rc;
1746 qeth_put_reply(reply);
1747 return rc;
1748}
1749EXPORT_SYMBOL_GPL(qeth_send_control_data);
1750
1751static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1752 unsigned long data)
1753{
1754 struct qeth_cmd_buffer *iob;
1755
d11ba0c4 1756 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1757
1758 iob = (struct qeth_cmd_buffer *) data;
1759 memcpy(&card->token.cm_filter_r,
1760 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1761 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1762 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1763 return 0;
1764}
1765
1766static int qeth_cm_enable(struct qeth_card *card)
1767{
1768 int rc;
1769 struct qeth_cmd_buffer *iob;
1770
d11ba0c4 1771 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1772
1773 iob = qeth_wait_for_buffer(&card->write);
1774 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1775 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1776 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1777 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1778 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1779
1780 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1781 qeth_cm_enable_cb, NULL);
1782 return rc;
1783}
1784
1785static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1786 unsigned long data)
1787{
1788
1789 struct qeth_cmd_buffer *iob;
1790
d11ba0c4 1791 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1792
1793 iob = (struct qeth_cmd_buffer *) data;
1794 memcpy(&card->token.cm_connection_r,
1795 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1796 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1797 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1798 return 0;
1799}
1800
1801static int qeth_cm_setup(struct qeth_card *card)
1802{
1803 int rc;
1804 struct qeth_cmd_buffer *iob;
1805
d11ba0c4 1806 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1807
1808 iob = qeth_wait_for_buffer(&card->write);
1809 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1810 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1811 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1812 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1813 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1814 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1815 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1816 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1817 qeth_cm_setup_cb, NULL);
1818 return rc;
1819
1820}
1821
1822static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1823{
1824 switch (card->info.type) {
1825 case QETH_CARD_TYPE_UNKNOWN:
1826 return 1500;
1827 case QETH_CARD_TYPE_IQD:
1828 return card->info.max_mtu;
1829 case QETH_CARD_TYPE_OSAE:
1830 switch (card->info.link_type) {
1831 case QETH_LINK_TYPE_HSTR:
1832 case QETH_LINK_TYPE_LANE_TR:
1833 return 2000;
1834 default:
1835 return 1492;
1836 }
1837 default:
1838 return 1500;
1839 }
1840}
1841
1842static inline int qeth_get_max_mtu_for_card(int cardtype)
1843{
1844 switch (cardtype) {
1845
1846 case QETH_CARD_TYPE_UNKNOWN:
1847 case QETH_CARD_TYPE_OSAE:
1848 case QETH_CARD_TYPE_OSN:
1849 return 61440;
1850 case QETH_CARD_TYPE_IQD:
1851 return 57344;
1852 default:
1853 return 1500;
1854 }
1855}
1856
1857static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1858{
1859 switch (cardtype) {
1860 case QETH_CARD_TYPE_IQD:
1861 return 1;
1862 default:
1863 return 0;
1864 }
1865}
1866
1867static inline int qeth_get_mtu_outof_framesize(int framesize)
1868{
1869 switch (framesize) {
1870 case 0x4000:
1871 return 8192;
1872 case 0x6000:
1873 return 16384;
1874 case 0xa000:
1875 return 32768;
1876 case 0xffff:
1877 return 57344;
1878 default:
1879 return 0;
1880 }
1881}
1882
1883static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1884{
1885 switch (card->info.type) {
1886 case QETH_CARD_TYPE_OSAE:
1887 return ((mtu >= 576) && (mtu <= 61440));
1888 case QETH_CARD_TYPE_IQD:
1889 return ((mtu >= 576) &&
1890 (mtu <= card->info.max_mtu + 4096 - 32));
1891 case QETH_CARD_TYPE_OSN:
1892 case QETH_CARD_TYPE_UNKNOWN:
1893 default:
1894 return 1;
1895 }
1896}
1897
1898static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1899 unsigned long data)
1900{
1901
1902 __u16 mtu, framesize;
1903 __u16 len;
1904 __u8 link_type;
1905 struct qeth_cmd_buffer *iob;
1906
d11ba0c4 1907 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1908
1909 iob = (struct qeth_cmd_buffer *) data;
1910 memcpy(&card->token.ulp_filter_r,
1911 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1912 QETH_MPC_TOKEN_LENGTH);
1913 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1914 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1915 mtu = qeth_get_mtu_outof_framesize(framesize);
1916 if (!mtu) {
1917 iob->rc = -EINVAL;
d11ba0c4 1918 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1919 return 0;
1920 }
1921 card->info.max_mtu = mtu;
1922 card->info.initial_mtu = mtu;
1923 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1924 } else {
1925 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1926 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1927 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1928 }
1929
1930 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1931 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1932 memcpy(&link_type,
1933 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1934 card->info.link_type = link_type;
1935 } else
1936 card->info.link_type = 0;
d11ba0c4 1937 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1938 return 0;
1939}
1940
1941static int qeth_ulp_enable(struct qeth_card *card)
1942{
1943 int rc;
1944 char prot_type;
1945 struct qeth_cmd_buffer *iob;
1946
1947 /*FIXME: trace view callbacks*/
d11ba0c4 1948 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1949
1950 iob = qeth_wait_for_buffer(&card->write);
1951 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1952
1953 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1954 (__u8) card->info.portno;
1955 if (card->options.layer2)
1956 if (card->info.type == QETH_CARD_TYPE_OSN)
1957 prot_type = QETH_PROT_OSN2;
1958 else
1959 prot_type = QETH_PROT_LAYER2;
1960 else
1961 prot_type = QETH_PROT_TCPIP;
1962
1963 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1964 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1965 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1966 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1967 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1968 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1969 card->info.portname, 9);
1970 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1971 qeth_ulp_enable_cb, NULL);
1972 return rc;
1973
1974}
1975
1976static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1977 unsigned long data)
1978{
1979 struct qeth_cmd_buffer *iob;
1980
d11ba0c4 1981 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 1982
1983 iob = (struct qeth_cmd_buffer *) data;
1984 memcpy(&card->token.ulp_connection_r,
1985 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1986 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1987 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1988 return 0;
1989}
1990
1991static int qeth_ulp_setup(struct qeth_card *card)
1992{
1993 int rc;
1994 __u16 temp;
1995 struct qeth_cmd_buffer *iob;
1996 struct ccw_dev_id dev_id;
1997
d11ba0c4 1998 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 1999
2000 iob = qeth_wait_for_buffer(&card->write);
2001 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2002
2003 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2004 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2005 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2006 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2007 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2008 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2009
2010 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2011 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2012 temp = (card->info.cula << 8) + card->info.unit_addr2;
2013 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2014 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2015 qeth_ulp_setup_cb, NULL);
2016 return rc;
2017}
2018
2019static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2020{
2021 int i, j;
2022
d11ba0c4 2023 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2024
2025 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2026 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2027 return 0;
2028
2029 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 2030 GFP_KERNEL);
4a71df50
FB		 2031 if (!card->qdio.in_q)
2032 goto out_nomem;
d11ba0c4
PT		 2033 QETH_DBF_TEXT(SETUP, 2, "inq");
2034 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2035 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2036 /* give inbound qeth_qdio_buffers their qdio_buffers */
2037 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2038 card->qdio.in_q->bufs[i].buffer =
2039 &card->qdio.in_q->qdio_bufs[i];
2040 /* inbound buffer pool */
2041 if (qeth_alloc_buffer_pool(card))
2042 goto out_freeinq;
2043 /* outbound */
2044 card->qdio.out_qs =
2045 kmalloc(card->qdio.no_out_queues *
2046 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2047 if (!card->qdio.out_qs)
2048 goto out_freepool;
2049 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2050 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2051 GFP_KERNEL);
4a71df50
FB		 2052 if (!card->qdio.out_qs[i])
2053 goto out_freeoutq;
d11ba0c4
PT		 2054 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2055 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2056 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2057 card->qdio.out_qs[i]->queue_no = i;
2058 /* give outbound qeth_qdio_buffers their qdio_buffers */
2059 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2060 card->qdio.out_qs[i]->bufs[j].buffer =
2061 &card->qdio.out_qs[i]->qdio_bufs[j];
2062 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2063 skb_list);
2064 lockdep_set_class(
2065 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2066 &qdio_out_skb_queue_key);
2067 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2068 }
2069 }
2070 return 0;
2071
2072out_freeoutq:
2073 while (i > 0)
2074 kfree(card->qdio.out_qs[--i]);
2075 kfree(card->qdio.out_qs);
2076 card->qdio.out_qs = NULL;
2077out_freepool:
2078 qeth_free_buffer_pool(card);
2079out_freeinq:
2080 kfree(card->qdio.in_q);
2081 card->qdio.in_q = NULL;
2082out_nomem:
2083 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2084 return -ENOMEM;
2085}
2086
2087static void qeth_create_qib_param_field(struct qeth_card *card,
2088 char *param_field)
2089{
2090
2091 param_field[0] = _ascebc['P'];
2092 param_field[1] = _ascebc['C'];
2093 param_field[2] = _ascebc['I'];
2094 param_field[3] = _ascebc['T'];
2095 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2096 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2097 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2098}
2099
2100static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2101 char *param_field)
2102{
2103 param_field[16] = _ascebc['B'];
2104 param_field[17] = _ascebc['L'];
2105 param_field[18] = _ascebc['K'];
2106 param_field[19] = _ascebc['T'];
2107 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2108 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2109 *((unsigned int *) (&param_field[28])) =
2110 card->info.blkt.inter_packet_jumbo;
2111}
2112
2113static int qeth_qdio_activate(struct qeth_card *card)
2114{
d11ba0c4 2115 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2116 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2117}
2118
2119static int qeth_dm_act(struct qeth_card *card)
2120{
2121 int rc;
2122 struct qeth_cmd_buffer *iob;
2123
d11ba0c4 2124 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2125
2126 iob = qeth_wait_for_buffer(&card->write);
2127 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2128
2129 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2130 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2131 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2132 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2133 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2134 return rc;
2135}
2136
2137static int qeth_mpc_initialize(struct qeth_card *card)
2138{
2139 int rc;
2140
d11ba0c4 2141 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2142
2143 rc = qeth_issue_next_read(card);
2144 if (rc) {
d11ba0c4 2145 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2146 return rc;
2147 }
2148 rc = qeth_cm_enable(card);
2149 if (rc) {
d11ba0c4 2150 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2151 goto out_qdio;
2152 }
2153 rc = qeth_cm_setup(card);
2154 if (rc) {
d11ba0c4 2155 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2156 goto out_qdio;
2157 }
2158 rc = qeth_ulp_enable(card);
2159 if (rc) {
d11ba0c4 2160 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2161 goto out_qdio;
2162 }
2163 rc = qeth_ulp_setup(card);
2164 if (rc) {
d11ba0c4 2165 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2166 goto out_qdio;
2167 }
2168 rc = qeth_alloc_qdio_buffers(card);
2169 if (rc) {
d11ba0c4 2170 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2171 goto out_qdio;
2172 }
2173 rc = qeth_qdio_establish(card);
2174 if (rc) {
d11ba0c4 2175 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2176 qeth_free_qdio_buffers(card);
2177 goto out_qdio;
2178 }
2179 rc = qeth_qdio_activate(card);
2180 if (rc) {
d11ba0c4 2181 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2182 goto out_qdio;
2183 }
2184 rc = qeth_dm_act(card);
2185 if (rc) {
d11ba0c4 2186 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2187 goto out_qdio;
2188 }
2189
2190 return 0;
2191out_qdio:
2192 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2193 return rc;
2194}
2195
2196static void qeth_print_status_with_portname(struct qeth_card *card)
2197{
2198 char dbf_text[15];
2199 int i;
2200
2201 sprintf(dbf_text, "%s", card->info.portname + 1);
2202 for (i = 0; i < 8; i++)
2203 dbf_text[i] =
2204 (char) _ebcasc[(__u8) dbf_text[i]];
2205 dbf_text[8] = 0;
74eacdb9 2206 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2207 "with link type %s (portname: %s)\n",
4a71df50
FB		 2208 qeth_get_cardname(card),
2209 (card->info.mcl_level[0]) ? " (level: " : "",
2210 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2211 (card->info.mcl_level[0]) ? ")" : "",
2212 qeth_get_cardname_short(card),
2213 dbf_text);
2214
2215}
2216
2217static void qeth_print_status_no_portname(struct qeth_card *card)
2218{
2219 if (card->info.portname[0])
74eacdb9 2220 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2221 "card%s%s%s\nwith link type %s "
2222 "(no portname needed by interface).\n",
4a71df50
FB		 2223 qeth_get_cardname(card),
2224 (card->info.mcl_level[0]) ? " (level: " : "",
2225 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2226 (card->info.mcl_level[0]) ? ")" : "",
2227 qeth_get_cardname_short(card));
2228 else
74eacdb9 2229 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2230 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2231 qeth_get_cardname(card),
2232 (card->info.mcl_level[0]) ? " (level: " : "",
2233 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2234 (card->info.mcl_level[0]) ? ")" : "",
2235 qeth_get_cardname_short(card));
2236}
2237
2238void qeth_print_status_message(struct qeth_card *card)
2239{
2240 switch (card->info.type) {
2241 case QETH_CARD_TYPE_OSAE:
2242 /* VM will use a non-zero first character
2243 * to indicate a HiperSockets like reporting
2244 * of the level OSA sets the first character to zero
2245 * */
2246 if (!card->info.mcl_level[0]) {
2247 sprintf(card->info.mcl_level, "%02x%02x",
2248 card->info.mcl_level[2],
2249 card->info.mcl_level[3]);
2250
2251 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2252 break;
2253 }
2254 /* fallthrough */
2255 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2256 if ((card->info.guestlan) ||
2257 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2258 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2259 card->info.mcl_level[0]];
2260 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2261 card->info.mcl_level[1]];
2262 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2263 card->info.mcl_level[2]];
2264 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2265 card->info.mcl_level[3]];
2266 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2267 }
2268 break;
2269 default:
2270 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2271 }
2272 if (card->info.portname_required)
2273 qeth_print_status_with_portname(card);
2274 else
2275 qeth_print_status_no_portname(card);
2276}
2277EXPORT_SYMBOL_GPL(qeth_print_status_message);
2278
4a71df50
FB		 2279static void qeth_initialize_working_pool_list(struct qeth_card *card)
2280{
2281 struct qeth_buffer_pool_entry *entry;
2282
d11ba0c4 2283 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
4a71df50
FB		 2284
2285 list_for_each_entry(entry,
2286 &card->qdio.init_pool.entry_list, init_list) {
2287 qeth_put_buffer_pool_entry(card, entry);
2288 }
2289}
2290
2291static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2292 struct qeth_card *card)
2293{
2294 struct list_head *plh;
2295 struct qeth_buffer_pool_entry *entry;
2296 int i, free;
2297 struct page *page;
2298
2299 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2300 return NULL;
2301
2302 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2303 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2304 free = 1;
2305 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2306 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2307 free = 0;
2308 break;
2309 }
2310 }
2311 if (free) {
2312 list_del_init(&entry->list);
2313 return entry;
2314 }
2315 }
2316
2317 /* no free buffer in pool so take first one and swap pages */
2318 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2319 struct qeth_buffer_pool_entry, list);
2320 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2321 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2322 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2323 if (!page) {
2324 return NULL;
2325 } else {
2326 free_page((unsigned long)entry->elements[i]);
2327 entry->elements[i] = page_address(page);
2328 if (card->options.performance_stats)
2329 card->perf_stats.sg_alloc_page_rx++;
2330 }
2331 }
2332 }
2333 list_del_init(&entry->list);
2334 return entry;
2335}
2336
2337static int qeth_init_input_buffer(struct qeth_card *card,
2338 struct qeth_qdio_buffer *buf)
2339{
2340 struct qeth_buffer_pool_entry *pool_entry;
2341 int i;
2342
2343 pool_entry = qeth_find_free_buffer_pool_entry(card);
2344 if (!pool_entry)
2345 return 1;
2346
2347 /*
2348 * since the buffer is accessed only from the input_tasklet
2349 * there shouldn't be a need to synchronize; also, since we use
2350 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2351 * buffers
2352 */
4a71df50
FB		 2353
2354 buf->pool_entry = pool_entry;
2355 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2356 buf->buffer->element[i].length = PAGE_SIZE;
2357 buf->buffer->element[i].addr = pool_entry->elements[i];
2358 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2359 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2360 else
2361 buf->buffer->element[i].flags = 0;
2362 }
2363 return 0;
2364}
2365
2366int qeth_init_qdio_queues(struct qeth_card *card)
2367{
2368 int i, j;
2369 int rc;
2370
d11ba0c4 2371 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2372
2373 /* inbound queue */
2374 memset(card->qdio.in_q->qdio_bufs, 0,
2375 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2376 qeth_initialize_working_pool_list(card);
2377 /*give only as many buffers to hardware as we have buffer pool entries*/
2378 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2379 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2380 card->qdio.in_q->next_buf_to_init =
2381 card->qdio.in_buf_pool.buf_count - 1;
2382 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2383 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2384 if (rc) {
d11ba0c4 2385 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2386 return rc;
2387 }
4a71df50
FB		 2388 /* outbound queue */
2389 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2390 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2391 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2392 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2393 qeth_clear_output_buffer(card->qdio.out_qs[i],
2394 &card->qdio.out_qs[i]->bufs[j]);
2395 }
2396 card->qdio.out_qs[i]->card = card;
2397 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2398 card->qdio.out_qs[i]->do_pack = 0;
2399 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2400 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2401 atomic_set(&card->qdio.out_qs[i]->state,
2402 QETH_OUT_Q_UNLOCKED);
2403 }
2404 return 0;
2405}
2406EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2407
2408static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2409{
2410 switch (link_type) {
2411 case QETH_LINK_TYPE_HSTR:
2412 return 2;
2413 default:
2414 return 1;
2415 }
2416}
2417
2418static void qeth_fill_ipacmd_header(struct qeth_card *card,
2419 struct qeth_ipa_cmd *cmd, __u8 command,
2420 enum qeth_prot_versions prot)
2421{
2422 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2423 cmd->hdr.command = command;
2424 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2425 cmd->hdr.seqno = card->seqno.ipa;
2426 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2427 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2428 if (card->options.layer2)
2429 cmd->hdr.prim_version_no = 2;
2430 else
2431 cmd->hdr.prim_version_no = 1;
2432 cmd->hdr.param_count = 1;
2433 cmd->hdr.prot_version = prot;
2434 cmd->hdr.ipa_supported = 0;
2435 cmd->hdr.ipa_enabled = 0;
2436}
2437
2438struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2439 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2440{
2441 struct qeth_cmd_buffer *iob;
2442 struct qeth_ipa_cmd *cmd;
2443
2444 iob = qeth_wait_for_buffer(&card->write);
2445 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2446 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2447
2448 return iob;
2449}
2450EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2451
2452void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2453 char prot_type)
2454{
2455 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2456 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2457 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2458 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2459}
2460EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2461
2462int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2463 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2464 unsigned long),
2465 void *reply_param)
2466{
2467 int rc;
2468 char prot_type;
4a71df50 2469
d11ba0c4 2470 QETH_DBF_TEXT(TRACE, 4, "sendipa");
4a71df50
FB		 2471
2472 if (card->options.layer2)
2473 if (card->info.type == QETH_CARD_TYPE_OSN)
2474 prot_type = QETH_PROT_OSN2;
2475 else
2476 prot_type = QETH_PROT_LAYER2;
2477 else
2478 prot_type = QETH_PROT_TCPIP;
2479 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2480 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2481 iob, reply_cb, reply_param);
4a71df50
FB		 2482 return rc;
2483}
2484EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2485
2486static int qeth_send_startstoplan(struct qeth_card *card,
2487 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2488{
2489 int rc;
2490 struct qeth_cmd_buffer *iob;
2491
2492 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2493 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2494
2495 return rc;
2496}
2497
2498int qeth_send_startlan(struct qeth_card *card)
2499{
2500 int rc;
2501
d11ba0c4 2502 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2503
2504 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2505 return rc;
2506}
2507EXPORT_SYMBOL_GPL(qeth_send_startlan);
2508
2509int qeth_send_stoplan(struct qeth_card *card)
2510{
2511 int rc = 0;
2512
2513 /*
2514 * TODO: according to the IPA format document page 14,
2515 * TCP/IP (we!) never issue a STOPLAN
2516 * is this right ?!?
2517 */
d11ba0c4 2518 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2519
2520 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2521 return rc;
2522}
2523EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2524
2525int qeth_default_setadapterparms_cb(struct qeth_card *card,
2526 struct qeth_reply *reply, unsigned long data)
2527{
2528 struct qeth_ipa_cmd *cmd;
2529
d11ba0c4 2530 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
4a71df50
FB		 2531
2532 cmd = (struct qeth_ipa_cmd *) data;
2533 if (cmd->hdr.return_code == 0)
2534 cmd->hdr.return_code =
2535 cmd->data.setadapterparms.hdr.return_code;
2536 return 0;
2537}
2538EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2539
2540static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2541 struct qeth_reply *reply, unsigned long data)
2542{
2543 struct qeth_ipa_cmd *cmd;
2544
d11ba0c4 2545 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
4a71df50
FB		 2546
2547 cmd = (struct qeth_ipa_cmd *) data;
2548 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2549 card->info.link_type =
2550 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2551 card->options.adp.supported_funcs =
2552 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2553 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2554}
2555
2556struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2557 __u32 command, __u32 cmdlen)
2558{
2559 struct qeth_cmd_buffer *iob;
2560 struct qeth_ipa_cmd *cmd;
2561
2562 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2563 QETH_PROT_IPV4);
2564 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2565 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2566 cmd->data.setadapterparms.hdr.command_code = command;
2567 cmd->data.setadapterparms.hdr.used_total = 1;
2568 cmd->data.setadapterparms.hdr.seq_no = 1;
2569
2570 return iob;
2571}
2572EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2573
2574int qeth_query_setadapterparms(struct qeth_card *card)
2575{
2576 int rc;
2577 struct qeth_cmd_buffer *iob;
2578
d11ba0c4 2579 QETH_DBF_TEXT(TRACE, 3, "queryadp");
4a71df50
FB		 2580 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2581 sizeof(struct qeth_ipacmd_setadpparms));
2582 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2583 return rc;
2584}
2585EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2586
2587int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
779e6e1c 2588 const char *dbftext)
4a71df50 2589{
779e6e1c 2590 if (qdio_error) {
d11ba0c4
PT		 2591 QETH_DBF_TEXT(TRACE, 2, dbftext);
2592 QETH_DBF_TEXT(QERR, 2, dbftext);
2593 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
4a71df50 2594 buf->element[15].flags & 0xff);
d11ba0c4 2595 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
4a71df50 2596 buf->element[14].flags & 0xff);
d11ba0c4 2597 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
4a71df50
FB		 2598 return 1;
2599 }
2600 return 0;
2601}
2602EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2603
2604void qeth_queue_input_buffer(struct qeth_card *card, int index)
2605{
2606 struct qeth_qdio_q *queue = card->qdio.in_q;
2607 int count;
2608 int i;
2609 int rc;
2610 int newcount = 0;
2611
4a71df50
FB		 2612 count = (index < queue->next_buf_to_init)?
2613 card->qdio.in_buf_pool.buf_count -
2614 (queue->next_buf_to_init - index) :
2615 card->qdio.in_buf_pool.buf_count -
2616 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2617 /* only requeue at a certain threshold to avoid SIGAs */
2618 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2619 for (i = queue->next_buf_to_init;
2620 i < queue->next_buf_to_init + count; ++i) {
2621 if (qeth_init_input_buffer(card,
2622 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2623 break;
2624 } else {
2625 newcount++;
2626 }
2627 }
2628
2629 if (newcount < count) {
2630 /* we are in memory shortage so we switch back to
2631 traditional skb allocation and drop packages */
4a71df50
FB		 2632 atomic_set(&card->force_alloc_skb, 3);
2633 count = newcount;
2634 } else {
4a71df50
FB		 2635 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2636 }
2637
2638 /*
2639 * according to old code it should be avoided to requeue all
2640 * 128 buffers in order to benefit from PCI avoidance.
2641 * this function keeps at least one buffer (the buffer at
2642 * 'index') un-requeued -> this buffer is the first buffer that
2643 * will be requeued the next time
2644 */
2645 if (card->options.performance_stats) {
2646 card->perf_stats.inbound_do_qdio_cnt++;
2647 card->perf_stats.inbound_do_qdio_start_time =
2648 qeth_get_micros();
2649 }
779e6e1c
JG		 2650 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2651 queue->next_buf_to_init, count);
4a71df50
FB		 2652 if (card->options.performance_stats)
2653 card->perf_stats.inbound_do_qdio_time +=
2654 qeth_get_micros() -
2655 card->perf_stats.inbound_do_qdio_start_time;
2656 if (rc) {
74eacdb9
FB		 2657 dev_warn(&card->gdev->dev,
2658 "QDIO reported an error, rc=%i\n", rc);
d11ba0c4
PT		 2659 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2660 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2661 }
2662 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2663 QDIO_MAX_BUFFERS_PER_Q;
2664 }
2665}
2666EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2667
2668static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 2669 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50
FB		 2670{
2671 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
779e6e1c 2672 int cc = qdio_err & 3;
4a71df50 2673
d11ba0c4 2674 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
779e6e1c 2675 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
4a71df50
FB		 2676 switch (cc) {
2677 case 0:
2678 if (qdio_err) {
d11ba0c4
PT		 2679 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2680 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2681 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
4a71df50
FB		 2682 (u16)qdio_err, (u8)sbalf15);
2683 return QETH_SEND_ERROR_LINK_FAILURE;
2684 }
2685 return QETH_SEND_ERROR_NONE;
2686 case 2:
779e6e1c 2687 if (qdio_err & QDIO_ERROR_SIGA_BUSY) {
d11ba0c4
PT		 2688 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2689 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2690 return QETH_SEND_ERROR_KICK_IT;
2691 }
2692 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2693 return QETH_SEND_ERROR_RETRY;
2694 return QETH_SEND_ERROR_LINK_FAILURE;
2695 /* look at qdio_error and sbalf 15 */
2696 case 1:
d11ba0c4
PT		 2697 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2698 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2699 return QETH_SEND_ERROR_LINK_FAILURE;
2700 case 3:
2701 default:
d11ba0c4
PT		 2702 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2703 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2704 return QETH_SEND_ERROR_KICK_IT;
2705 }
2706}
2707
2708/*
2709 * Switched to packing state if the number of used buffers on a queue
2710 * reaches a certain limit.
2711 */
2712static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2713{
2714 if (!queue->do_pack) {
2715 if (atomic_read(&queue->used_buffers)
2716 >= QETH_HIGH_WATERMARK_PACK){
2717 /* switch non-PACKING -> PACKING */
d11ba0c4 2718 QETH_DBF_TEXT(TRACE, 6, "np->pack");
4a71df50
FB		 2719 if (queue->card->options.performance_stats)
2720 queue->card->perf_stats.sc_dp_p++;
2721 queue->do_pack = 1;
2722 }
2723 }
2724}
2725
2726/*
2727 * Switches from packing to non-packing mode. If there is a packing
2728 * buffer on the queue this buffer will be prepared to be flushed.
2729 * In that case 1 is returned to inform the caller. If no buffer
2730 * has to be flushed, zero is returned.
2731 */
2732static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2733{
2734 struct qeth_qdio_out_buffer *buffer;
2735 int flush_count = 0;
2736
2737 if (queue->do_pack) {
2738 if (atomic_read(&queue->used_buffers)
2739 <= QETH_LOW_WATERMARK_PACK) {
2740 /* switch PACKING -> non-PACKING */
d11ba0c4 2741 QETH_DBF_TEXT(TRACE, 6, "pack->np");
4a71df50
FB		 2742 if (queue->card->options.performance_stats)
2743 queue->card->perf_stats.sc_p_dp++;
2744 queue->do_pack = 0;
2745 /* flush packing buffers */
2746 buffer = &queue->bufs[queue->next_buf_to_fill];
2747 if ((atomic_read(&buffer->state) ==
2748 QETH_QDIO_BUF_EMPTY) &&
2749 (buffer->next_element_to_fill > 0)) {
2750 atomic_set(&buffer->state,
2751 QETH_QDIO_BUF_PRIMED);
2752 flush_count++;
2753 queue->next_buf_to_fill =
2754 (queue->next_buf_to_fill + 1) %
2755 QDIO_MAX_BUFFERS_PER_Q;
2756 }
2757 }
2758 }
2759 return flush_count;
2760}
2761
2762/*
2763 * Called to flush a packing buffer if no more pci flags are on the queue.
2764 * Checks if there is a packing buffer and prepares it to be flushed.
2765 * In that case returns 1, otherwise zero.
2766 */
2767static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2768{
2769 struct qeth_qdio_out_buffer *buffer;
2770
2771 buffer = &queue->bufs[queue->next_buf_to_fill];
2772 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2773 (buffer->next_element_to_fill > 0)) {
2774 /* it's a packing buffer */
2775 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2776 queue->next_buf_to_fill =
2777 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2778 return 1;
2779 }
2780 return 0;
2781}
2782
779e6e1c
JG		 2783static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2784 int count)
4a71df50
FB		 2785{
2786 struct qeth_qdio_out_buffer *buf;
2787 int rc;
2788 int i;
2789 unsigned int qdio_flags;
2790
4a71df50
FB		 2791 for (i = index; i < index + count; ++i) {
2792 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2793 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2794 SBAL_FLAGS_LAST_ENTRY;
2795
2796 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2797 continue;
2798
2799 if (!queue->do_pack) {
2800 if ((atomic_read(&queue->used_buffers) >=
2801 (QETH_HIGH_WATERMARK_PACK -
2802 QETH_WATERMARK_PACK_FUZZ)) &&
2803 !atomic_read(&queue->set_pci_flags_count)) {
2804 /* it's likely that we'll go to packing
2805 * mode soon */
2806 atomic_inc(&queue->set_pci_flags_count);
2807 buf->buffer->element[0].flags |= 0x40;
2808 }
2809 } else {
2810 if (!atomic_read(&queue->set_pci_flags_count)) {
2811 /*
2812 * there's no outstanding PCI any more, so we
2813 * have to request a PCI to be sure the the PCI
2814 * will wake at some time in the future then we
2815 * can flush packed buffers that might still be
2816 * hanging around, which can happen if no
2817 * further send was requested by the stack
2818 */
2819 atomic_inc(&queue->set_pci_flags_count);
2820 buf->buffer->element[0].flags |= 0x40;
2821 }
2822 }
2823 }
2824
2825 queue->card->dev->trans_start = jiffies;
2826 if (queue->card->options.performance_stats) {
2827 queue->card->perf_stats.outbound_do_qdio_cnt++;
2828 queue->card->perf_stats.outbound_do_qdio_start_time =
2829 qeth_get_micros();
2830 }
2831 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 2832 if (atomic_read(&queue->set_pci_flags_count))
2833 qdio_flags |= QDIO_FLAG_PCI_OUT;
2834 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 2835 queue->queue_no, index, count);
4a71df50
FB		 2836 if (queue->card->options.performance_stats)
2837 queue->card->perf_stats.outbound_do_qdio_time +=
2838 qeth_get_micros() -
2839 queue->card->perf_stats.outbound_do_qdio_start_time;
2840 if (rc) {
d11ba0c4
PT		 2841 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2842 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2843 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
4a71df50
FB		 2844 queue->card->stats.tx_errors += count;
2845 /* this must not happen under normal circumstances. if it
2846 * happens something is really wrong -> recover */
2847 qeth_schedule_recovery(queue->card);
2848 return;
2849 }
2850 atomic_add(count, &queue->used_buffers);
2851 if (queue->card->options.performance_stats)
2852 queue->card->perf_stats.bufs_sent += count;
2853}
2854
2855static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2856{
2857 int index;
2858 int flush_cnt = 0;
2859 int q_was_packing = 0;
2860
2861 /*
2862 * check if weed have to switch to non-packing mode or if
2863 * we have to get a pci flag out on the queue
2864 */
2865 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2866 !atomic_read(&queue->set_pci_flags_count)) {
2867 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2868 QETH_OUT_Q_UNLOCKED) {
2869 /*
2870 * If we get in here, there was no action in
2871 * do_send_packet. So, we check if there is a
2872 * packing buffer to be flushed here.
2873 */
2874 netif_stop_queue(queue->card->dev);
2875 index = queue->next_buf_to_fill;
2876 q_was_packing = queue->do_pack;
2877 /* queue->do_pack may change */
2878 barrier();
2879 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2880 if (!flush_cnt &&
2881 !atomic_read(&queue->set_pci_flags_count))
2882 flush_cnt +=
2883 qeth_flush_buffers_on_no_pci(queue);
2884 if (queue->card->options.performance_stats &&
2885 q_was_packing)
2886 queue->card->perf_stats.bufs_sent_pack +=
2887 flush_cnt;
2888 if (flush_cnt)
779e6e1c 2889 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 2890 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2891 }
2892 }
2893}
2894
779e6e1c
JG		 2895void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2896 unsigned int qdio_error, int __queue, int first_element,
2897 int count, unsigned long card_ptr)
4a71df50
FB		 2898{
2899 struct qeth_card *card = (struct qeth_card *) card_ptr;
2900 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2901 struct qeth_qdio_out_buffer *buffer;
2902 int i;
2903
d11ba0c4 2904 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
779e6e1c
JG		 2905 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2906 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2907 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2908 netif_stop_queue(card->dev);
2909 qeth_schedule_recovery(card);
2910 return;
4a71df50
FB		 2911 }
2912 if (card->options.performance_stats) {
2913 card->perf_stats.outbound_handler_cnt++;
2914 card->perf_stats.outbound_handler_start_time =
2915 qeth_get_micros();
2916 }
2917 for (i = first_element; i < (first_element + count); ++i) {
2918 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2919 /*we only handle the KICK_IT error by doing a recovery */
779e6e1c 2920 if (qeth_handle_send_error(card, buffer, qdio_error)
4a71df50
FB		 2921 == QETH_SEND_ERROR_KICK_IT){
2922 netif_stop_queue(card->dev);
2923 qeth_schedule_recovery(card);
2924 return;
2925 }
2926 qeth_clear_output_buffer(queue, buffer);
2927 }
2928 atomic_sub(count, &queue->used_buffers);
2929 /* check if we need to do something on this outbound queue */
2930 if (card->info.type != QETH_CARD_TYPE_IQD)
2931 qeth_check_outbound_queue(queue);
2932
2933 netif_wake_queue(queue->card->dev);
2934 if (card->options.performance_stats)
2935 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2936 card->perf_stats.outbound_handler_start_time;
2937}
2938EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2939
2940int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2941{
2942 int cast_type = RTN_UNSPEC;
2943
2944 if (card->info.type == QETH_CARD_TYPE_OSN)
2945 return cast_type;
2946
2947 if (skb->dst && skb->dst->neighbour) {
2948 cast_type = skb->dst->neighbour->type;
2949 if ((cast_type == RTN_BROADCAST) ||
2950 (cast_type == RTN_MULTICAST) ||
2951 (cast_type == RTN_ANYCAST))
2952 return cast_type;
2953 else
2954 return RTN_UNSPEC;
2955 }
2956 /* try something else */
2957 if (skb->protocol == ETH_P_IPV6)
2958 return (skb_network_header(skb)[24] == 0xff) ?
2959 RTN_MULTICAST : 0;
2960 else if (skb->protocol == ETH_P_IP)
2961 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2962 RTN_MULTICAST : 0;
2963 /* ... */
2964 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2965 return RTN_BROADCAST;
2966 else {
2967 u16 hdr_mac;
2968
2969 hdr_mac = *((u16 *)skb->data);
2970 /* tr multicast? */
2971 switch (card->info.link_type) {
2972 case QETH_LINK_TYPE_HSTR:
2973 case QETH_LINK_TYPE_LANE_TR:
2974 if ((hdr_mac == QETH_TR_MAC_NC) ||
2975 (hdr_mac == QETH_TR_MAC_C))
2976 return RTN_MULTICAST;
2977 break;
2978 /* eth or so multicast? */
2979 default:
2980 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2981 (hdr_mac == QETH_ETH_MAC_V6))
2982 return RTN_MULTICAST;
2983 }
2984 }
2985 return cast_type;
2986}
2987EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2988
2989int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2990 int ipv, int cast_type)
2991{
2992 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2993 return card->qdio.default_out_queue;
2994 switch (card->qdio.no_out_queues) {
2995 case 4:
2996 if (cast_type && card->info.is_multicast_different)
2997 return card->info.is_multicast_different &
2998 (card->qdio.no_out_queues - 1);
2999 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3000 const u8 tos = ip_hdr(skb)->tos;
3001
3002 if (card->qdio.do_prio_queueing ==
3003 QETH_PRIO_Q_ING_TOS) {
3004 if (tos & IP_TOS_NOTIMPORTANT)
3005 return 3;
3006 if (tos & IP_TOS_HIGHRELIABILITY)
3007 return 2;
3008 if (tos & IP_TOS_HIGHTHROUGHPUT)
3009 return 1;
3010 if (tos & IP_TOS_LOWDELAY)
3011 return 0;
3012 }
3013 if (card->qdio.do_prio_queueing ==
3014 QETH_PRIO_Q_ING_PREC)
3015 return 3 - (tos >> 6);
3016 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3017 /* TODO: IPv6!!! */
3018 }
3019 return card->qdio.default_out_queue;
3020 case 1: /* fallthrough for single-out-queue 1920-device */
3021 default:
3022 return card->qdio.default_out_queue;
3023 }
3024}
3025EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3026
4a71df50
FB		 3027int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3028 struct sk_buff *skb, int elems)
3029{
3030 int elements_needed = 0;
3031
3032 if (skb_shinfo(skb)->nr_frags > 0)
3033 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3034 if (elements_needed == 0)
683d718a
FB		 3035 elements_needed = 1 + (((((unsigned long) skb->data) %
3036 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
4a71df50 3037 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3038 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3039 "(Number=%d / Length=%d). Discarded.\n",
3040 (elements_needed+elems), skb->len);
3041 return 0;
3042 }
3043 return elements_needed;
3044}
3045EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3046
f90b744e 3047static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3048 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3049 int offset)
4a71df50 3050{
e1f03ae8 3051 int length = skb->len;
4a71df50
FB		 3052 int length_here;
3053 int element;
3054 char *data;
3055 int first_lap ;
3056
3057 element = *next_element_to_fill;
3058 data = skb->data;
3059 first_lap = (is_tso == 0 ? 1 : 0);
3060
683d718a
FB		 3061 if (offset >= 0) {
3062 data = skb->data + offset;
e1f03ae8 3063 length -= offset;
683d718a
FB		 3064 first_lap = 0;
3065 }
3066
4a71df50
FB		 3067 while (length > 0) {
3068 /* length_here is the remaining amount of data in this page */
3069 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3070 if (length < length_here)
3071 length_here = length;
3072
3073 buffer->element[element].addr = data;
3074 buffer->element[element].length = length_here;
3075 length -= length_here;
3076 if (!length) {
3077 if (first_lap)
3078 buffer->element[element].flags = 0;
3079 else
3080 buffer->element[element].flags =
3081 SBAL_FLAGS_LAST_FRAG;
3082 } else {
3083 if (first_lap)
3084 buffer->element[element].flags =
3085 SBAL_FLAGS_FIRST_FRAG;
3086 else
3087 buffer->element[element].flags =
3088 SBAL_FLAGS_MIDDLE_FRAG;
3089 }
3090 data += length_here;
3091 element++;
3092 first_lap = 0;
3093 }
3094 *next_element_to_fill = element;
3095}
3096
f90b744e 3097static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3098 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3099 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3100{
3101 struct qdio_buffer *buffer;
4a71df50
FB		 3102 int flush_cnt = 0, hdr_len, large_send = 0;
3103
4a71df50
FB		 3104 buffer = buf->buffer;
3105 atomic_inc(&skb->users);
3106 skb_queue_tail(&buf->skb_list, skb);
3107
4a71df50 3108 /*check first on TSO ....*/
683d718a 3109 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3110 int element = buf->next_element_to_fill;
3111
683d718a
FB		 3112 hdr_len = sizeof(struct qeth_hdr_tso) +
3113 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3114 /*fill first buffer entry only with header information */
3115 buffer->element[element].addr = skb->data;
3116 buffer->element[element].length = hdr_len;
3117 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3118 buf->next_element_to_fill++;
3119 skb->data += hdr_len;
3120 skb->len -= hdr_len;
3121 large_send = 1;
3122 }
683d718a
FB		 3123
3124 if (offset >= 0) {
3125 int element = buf->next_element_to_fill;
3126 buffer->element[element].addr = hdr;
3127 buffer->element[element].length = sizeof(struct qeth_hdr) +
3128 hd_len;
3129 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3130 buf->is_header[element] = 1;
3131 buf->next_element_to_fill++;
3132 }
3133
4a71df50
FB		 3134 if (skb_shinfo(skb)->nr_frags == 0)
3135 __qeth_fill_buffer(skb, buffer, large_send,
683d718a 3136 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3137 else
3138 __qeth_fill_buffer_frag(skb, buffer, large_send,
3139 (int *)&buf->next_element_to_fill);
3140
3141 if (!queue->do_pack) {
d11ba0c4 3142 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
4a71df50
FB		 3143 /* set state to PRIMED -> will be flushed */
3144 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3145 flush_cnt = 1;
3146 } else {
d11ba0c4 3147 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
4a71df50
FB		 3148 if (queue->card->options.performance_stats)
3149 queue->card->perf_stats.skbs_sent_pack++;
3150 if (buf->next_element_to_fill >=
3151 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3152 /*
3153 * packed buffer if full -> set state PRIMED
3154 * -> will be flushed
3155 */
3156 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3157 flush_cnt = 1;
3158 }
3159 }
3160 return flush_cnt;
3161}
3162
3163int qeth_do_send_packet_fast(struct qeth_card *card,
3164 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3165 struct qeth_hdr *hdr, int elements_needed,
683d718a 3166 struct qeth_eddp_context *ctx, int offset, int hd_len)
4a71df50
FB		 3167{
3168 struct qeth_qdio_out_buffer *buffer;
3169 int buffers_needed = 0;
3170 int flush_cnt = 0;
3171 int index;
3172
4a71df50
FB		 3173 /* spin until we get the queue ... */
3174 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3175 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3176 /* ... now we've got the queue */
3177 index = queue->next_buf_to_fill;
3178 buffer = &queue->bufs[queue->next_buf_to_fill];
3179 /*
3180 * check if buffer is empty to make sure that we do not 'overtake'
3181 * ourselves and try to fill a buffer that is already primed
3182 */
3183 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3184 goto out;
3185 if (ctx == NULL)
3186 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3187 QDIO_MAX_BUFFERS_PER_Q;
3188 else {
3189 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3190 ctx);
3191 if (buffers_needed < 0)
3192 goto out;
3193 queue->next_buf_to_fill =
3194 (queue->next_buf_to_fill + buffers_needed) %
3195 QDIO_MAX_BUFFERS_PER_Q;
3196 }
3197 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3198 if (ctx == NULL) {
683d718a 3199 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
779e6e1c 3200 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3201 } else {
3202 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3203 WARN_ON(buffers_needed != flush_cnt);
779e6e1c 3204 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3205 }
3206 return 0;
3207out:
3208 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3209 return -EBUSY;
3210}
3211EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3212
3213int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3214 struct sk_buff *skb, struct qeth_hdr *hdr,
3215 int elements_needed, struct qeth_eddp_context *ctx)
3216{
3217 struct qeth_qdio_out_buffer *buffer;
3218 int start_index;
3219 int flush_count = 0;
3220 int do_pack = 0;
3221 int tmp;
3222 int rc = 0;
3223
4a71df50
FB		 3224 /* spin until we get the queue ... */
3225 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3226 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3227 start_index = queue->next_buf_to_fill;
3228 buffer = &queue->bufs[queue->next_buf_to_fill];
3229 /*
3230 * check if buffer is empty to make sure that we do not 'overtake'
3231 * ourselves and try to fill a buffer that is already primed
3232 */
3233 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3234 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3235 return -EBUSY;
3236 }
3237 /* check if we need to switch packing state of this queue */
3238 qeth_switch_to_packing_if_needed(queue);
3239 if (queue->do_pack) {
3240 do_pack = 1;
3241 if (ctx == NULL) {
3242 /* does packet fit in current buffer? */
3243 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3244 buffer->next_element_to_fill) < elements_needed) {
3245 /* ... no -> set state PRIMED */
3246 atomic_set(&buffer->state,
3247 QETH_QDIO_BUF_PRIMED);
3248 flush_count++;
3249 queue->next_buf_to_fill =
3250 (queue->next_buf_to_fill + 1) %
3251 QDIO_MAX_BUFFERS_PER_Q;
3252 buffer = &queue->bufs[queue->next_buf_to_fill];
3253 /* we did a step forward, so check buffer state
3254 * again */
3255 if (atomic_read(&buffer->state) !=
3256 QETH_QDIO_BUF_EMPTY){
779e6e1c
JG		 3257 qeth_flush_buffers(queue, start_index,
3258 flush_count);
4a71df50
FB		 3259 atomic_set(&queue->state,
3260 QETH_OUT_Q_UNLOCKED);
3261 return -EBUSY;
3262 }
3263 }
3264 } else {
3265 /* check if we have enough elements (including following
3266 * free buffers) to handle eddp context */
3267 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3268 < 0) {
4a71df50
FB		 3269 rc = -EBUSY;
3270 goto out;
3271 }
3272 }
3273 }
3274 if (ctx == NULL)
683d718a 3275 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3276 else {
3277 tmp = qeth_eddp_fill_buffer(queue, ctx,
3278 queue->next_buf_to_fill);
3279 if (tmp < 0) {
4a71df50
FB		 3280 rc = -EBUSY;
3281 goto out;
3282 }
3283 }
3284 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3285 QDIO_MAX_BUFFERS_PER_Q;
3286 flush_count += tmp;
3287out:
3288 if (flush_count)
779e6e1c 3289 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3290 else if (!atomic_read(&queue->set_pci_flags_count))
3291 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3292 /*
3293 * queue->state will go from LOCKED -> UNLOCKED or from
3294 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3295 * (switch packing state or flush buffer to get another pci flag out).
3296 * In that case we will enter this loop
3297 */
3298 while (atomic_dec_return(&queue->state)) {
3299 flush_count = 0;
3300 start_index = queue->next_buf_to_fill;
3301 /* check if we can go back to non-packing state */
3302 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3303 /*
3304 * check if we need to flush a packing buffer to get a pci
3305 * flag out on the queue
3306 */
3307 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3308 flush_count += qeth_flush_buffers_on_no_pci(queue);
3309 if (flush_count)
779e6e1c 3310 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3311 }
3312 /* at this point the queue is UNLOCKED again */
3313 if (queue->card->options.performance_stats && do_pack)
3314 queue->card->perf_stats.bufs_sent_pack += flush_count;
3315
3316 return rc;
3317}
3318EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3319
3320static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3321 struct qeth_reply *reply, unsigned long data)
3322{
3323 struct qeth_ipa_cmd *cmd;
3324 struct qeth_ipacmd_setadpparms *setparms;
3325
d11ba0c4 3326 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
4a71df50
FB		 3327
3328 cmd = (struct qeth_ipa_cmd *) data;
3329 setparms = &(cmd->data.setadapterparms);
3330
3331 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3332 if (cmd->hdr.return_code) {
d11ba0c4 3333 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3334 setparms->data.mode = SET_PROMISC_MODE_OFF;
3335 }
3336 card->info.promisc_mode = setparms->data.mode;
3337 return 0;
3338}
3339
3340void qeth_setadp_promisc_mode(struct qeth_card *card)
3341{
3342 enum qeth_ipa_promisc_modes mode;
3343 struct net_device *dev = card->dev;
3344 struct qeth_cmd_buffer *iob;
3345 struct qeth_ipa_cmd *cmd;
3346
d11ba0c4 3347 QETH_DBF_TEXT(TRACE, 4, "setprom");
4a71df50
FB		 3348
3349 if (((dev->flags & IFF_PROMISC) &&
3350 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3351 (!(dev->flags & IFF_PROMISC) &&
3352 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3353 return;
3354 mode = SET_PROMISC_MODE_OFF;
3355 if (dev->flags & IFF_PROMISC)
3356 mode = SET_PROMISC_MODE_ON;
d11ba0c4 3357 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
4a71df50
FB		 3358
3359 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3360 sizeof(struct qeth_ipacmd_setadpparms));
3361 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3362 cmd->data.setadapterparms.data.mode = mode;
3363 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3364}
3365EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3366
3367int qeth_change_mtu(struct net_device *dev, int new_mtu)
3368{
3369 struct qeth_card *card;
3370 char dbf_text[15];
3371
509e2562 3372 card = dev->ml_priv;
4a71df50 3373
d11ba0c4 3374 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
4a71df50 3375 sprintf(dbf_text, "%8x", new_mtu);
d11ba0c4 3376 QETH_DBF_TEXT(TRACE, 4, dbf_text);
4a71df50
FB		 3377
3378 if (new_mtu < 64)
3379 return -EINVAL;
3380 if (new_mtu > 65535)
3381 return -EINVAL;
3382 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3383 (!qeth_mtu_is_valid(card, new_mtu)))
3384 return -EINVAL;
3385 dev->mtu = new_mtu;
3386 return 0;
3387}
3388EXPORT_SYMBOL_GPL(qeth_change_mtu);
3389
3390struct net_device_stats *qeth_get_stats(struct net_device *dev)
3391{
3392 struct qeth_card *card;
3393
509e2562 3394 card = dev->ml_priv;
4a71df50 3395
d11ba0c4 3396 QETH_DBF_TEXT(TRACE, 5, "getstat");
4a71df50
FB		 3397
3398 return &card->stats;
3399}
3400EXPORT_SYMBOL_GPL(qeth_get_stats);
3401
3402static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3403 struct qeth_reply *reply, unsigned long data)
3404{
3405 struct qeth_ipa_cmd *cmd;
3406
d11ba0c4 3407 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
4a71df50
FB		 3408
3409 cmd = (struct qeth_ipa_cmd *) data;
3410 if (!card->options.layer2 ||
3411 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3412 memcpy(card->dev->dev_addr,
3413 &cmd->data.setadapterparms.data.change_addr.addr,
3414 OSA_ADDR_LEN);
3415 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3416 }
3417 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3418 return 0;
3419}
3420
3421int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3422{
3423 int rc;
3424 struct qeth_cmd_buffer *iob;
3425 struct qeth_ipa_cmd *cmd;
3426
d11ba0c4 3427 QETH_DBF_TEXT(TRACE, 4, "chgmac");
4a71df50
FB		 3428
3429 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3430 sizeof(struct qeth_ipacmd_setadpparms));
3431 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3432 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3433 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3434 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3435 card->dev->dev_addr, OSA_ADDR_LEN);
3436 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3437 NULL);
3438 return rc;
3439}
3440EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3441
3442void qeth_tx_timeout(struct net_device *dev)
3443{
3444 struct qeth_card *card;
3445
509e2562 3446 card = dev->ml_priv;
4a71df50
FB		 3447 card->stats.tx_errors++;
3448 qeth_schedule_recovery(card);
3449}
3450EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3451
3452int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3453{
509e2562 3454 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 3455 int rc = 0;
3456
3457 switch (regnum) {
3458 case MII_BMCR: /* Basic mode control register */
3459 rc = BMCR_FULLDPLX;
3460 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3461 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3462 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3463 rc |= BMCR_SPEED100;
3464 break;
3465 case MII_BMSR: /* Basic mode status register */
3466 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3467 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3468 BMSR_100BASE4;
3469 break;
3470 case MII_PHYSID1: /* PHYS ID 1 */
3471 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3472 dev->dev_addr[2];
3473 rc = (rc >> 5) & 0xFFFF;
3474 break;
3475 case MII_PHYSID2: /* PHYS ID 2 */
3476 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3477 break;
3478 case MII_ADVERTISE: /* Advertisement control reg */
3479 rc = ADVERTISE_ALL;
3480 break;
3481 case MII_LPA: /* Link partner ability reg */
3482 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3483 LPA_100BASE4 | LPA_LPACK;
3484 break;
3485 case MII_EXPANSION: /* Expansion register */
3486 break;
3487 case MII_DCOUNTER: /* disconnect counter */
3488 break;
3489 case MII_FCSCOUNTER: /* false carrier counter */
3490 break;
3491 case MII_NWAYTEST: /* N-way auto-neg test register */
3492 break;
3493 case MII_RERRCOUNTER: /* rx error counter */
3494 rc = card->stats.rx_errors;
3495 break;
3496 case MII_SREVISION: /* silicon revision */
3497 break;
3498 case MII_RESV1: /* reserved 1 */
3499 break;
3500 case MII_LBRERROR: /* loopback, rx, bypass error */
3501 break;
3502 case MII_PHYADDR: /* physical address */
3503 break;
3504 case MII_RESV2: /* reserved 2 */
3505 break;
3506 case MII_TPISTATUS: /* TPI status for 10mbps */
3507 break;
3508 case MII_NCONFIG: /* network interface config */
3509 break;
3510 default:
3511 break;
3512 }
3513 return rc;
3514}
3515EXPORT_SYMBOL_GPL(qeth_mdio_read);
3516
3517static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3518 struct qeth_cmd_buffer *iob, int len,
3519 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3520 unsigned long),
3521 void *reply_param)
3522{
3523 u16 s1, s2;
3524
d11ba0c4 3525 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
4a71df50
FB		 3526
3527 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3528 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3529 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3530 /* adjust PDU length fields in IPA_PDU_HEADER */
3531 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3532 s2 = (u32) len;
3533 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3534 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3535 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3536 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3537 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3538 reply_cb, reply_param);
3539}
3540
3541static int qeth_snmp_command_cb(struct qeth_card *card,
3542 struct qeth_reply *reply, unsigned long sdata)
3543{
3544 struct qeth_ipa_cmd *cmd;
3545 struct qeth_arp_query_info *qinfo;
3546 struct qeth_snmp_cmd *snmp;
3547 unsigned char *data;
3548 __u16 data_len;
3549
d11ba0c4 3550 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
4a71df50
FB		 3551
3552 cmd = (struct qeth_ipa_cmd *) sdata;
3553 data = (unsigned char *)((char *)cmd - reply->offset);
3554 qinfo = (struct qeth_arp_query_info *) reply->param;
3555 snmp = &cmd->data.setadapterparms.data.snmp;
3556
3557 if (cmd->hdr.return_code) {
d11ba0c4 3558 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3559 return 0;
3560 }
3561 if (cmd->data.setadapterparms.hdr.return_code) {
3562 cmd->hdr.return_code =
3563 cmd->data.setadapterparms.hdr.return_code;
d11ba0c4 3564 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3565 return 0;
3566 }
3567 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3568 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3569 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3570 else
3571 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3572
3573 /* check if there is enough room in userspace */
3574 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
d11ba0c4 3575 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3576 cmd->hdr.return_code = -ENOMEM;
3577 return 0;
3578 }
d11ba0c4 3579 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
4a71df50 3580 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3581 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
4a71df50
FB		 3582 cmd->data.setadapterparms.hdr.seq_no);
3583 /*copy entries to user buffer*/
3584 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3585 memcpy(qinfo->udata + qinfo->udata_offset,
3586 (char *)snmp,
3587 data_len + offsetof(struct qeth_snmp_cmd, data));
3588 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3589 } else {
3590 memcpy(qinfo->udata + qinfo->udata_offset,
3591 (char *)&snmp->request, data_len);
3592 }
3593 qinfo->udata_offset += data_len;
3594 /* check if all replies received ... */
d11ba0c4 3595 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
4a71df50 3596 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3597 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
4a71df50
FB		 3598 cmd->data.setadapterparms.hdr.seq_no);
3599 if (cmd->data.setadapterparms.hdr.seq_no <
3600 cmd->data.setadapterparms.hdr.used_total)
3601 return 1;
3602 return 0;
3603}
3604
3605int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3606{
3607 struct qeth_cmd_buffer *iob;
3608 struct qeth_ipa_cmd *cmd;
3609 struct qeth_snmp_ureq *ureq;
3610 int req_len;
3611 struct qeth_arp_query_info qinfo = {0, };
3612 int rc = 0;
3613
d11ba0c4 3614 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
4a71df50
FB		 3615
3616 if (card->info.guestlan)
3617 return -EOPNOTSUPP;
3618
3619 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3620 (!card->options.layer2)) {
4a71df50
FB		 3621 return -EOPNOTSUPP;
3622 }
3623 /* skip 4 bytes (data_len struct member) to get req_len */
3624 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3625 return -EFAULT;
3626 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3627 if (!ureq) {
d11ba0c4 3628 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
4a71df50
FB		 3629 return -ENOMEM;
3630 }
3631 if (copy_from_user(ureq, udata,
3632 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3633 kfree(ureq);
3634 return -EFAULT;
3635 }
3636 qinfo.udata_len = ureq->hdr.data_len;
3637 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3638 if (!qinfo.udata) {
3639 kfree(ureq);
3640 return -ENOMEM;
3641 }
3642 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3643
3644 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3645 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3646 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3647 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3648 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3649 qeth_snmp_command_cb, (void *)&qinfo);
3650 if (rc)
14cc21b6 3651 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 3652 QETH_CARD_IFNAME(card), rc);
3653 else {
3654 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3655 rc = -EFAULT;
3656 }
3657
3658 kfree(ureq);
3659 kfree(qinfo.udata);
3660 return rc;
3661}
3662EXPORT_SYMBOL_GPL(qeth_snmp_command);
3663
3664static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3665{
3666 switch (card->info.type) {
3667 case QETH_CARD_TYPE_IQD:
3668 return 2;
3669 default:
3670 return 0;
3671 }
3672}
3673
3674static int qeth_qdio_establish(struct qeth_card *card)
3675{
3676 struct qdio_initialize init_data;
3677 char *qib_param_field;
3678 struct qdio_buffer **in_sbal_ptrs;
3679 struct qdio_buffer **out_sbal_ptrs;
3680 int i, j, k;
3681 int rc = 0;
3682
d11ba0c4 3683 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3684
3685 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3686 GFP_KERNEL);
3687 if (!qib_param_field)
3688 return -ENOMEM;
3689
3690 qeth_create_qib_param_field(card, qib_param_field);
3691 qeth_create_qib_param_field_blkt(card, qib_param_field);
3692
3693 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3694 GFP_KERNEL);
3695 if (!in_sbal_ptrs) {
3696 kfree(qib_param_field);
3697 return -ENOMEM;
3698 }
3699 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3700 in_sbal_ptrs[i] = (struct qdio_buffer *)
3701 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3702
3703 out_sbal_ptrs =
3704 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3705 sizeof(void *), GFP_KERNEL);
3706 if (!out_sbal_ptrs) {
3707 kfree(in_sbal_ptrs);
3708 kfree(qib_param_field);
3709 return -ENOMEM;
3710 }
3711 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3712 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3713 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3714 card->qdio.out_qs[i]->bufs[j].buffer);
3715 }
3716
3717 memset(&init_data, 0, sizeof(struct qdio_initialize));
3718 init_data.cdev = CARD_DDEV(card);
3719 init_data.q_format = qeth_get_qdio_q_format(card);
3720 init_data.qib_param_field_format = 0;
3721 init_data.qib_param_field = qib_param_field;
4a71df50
FB		 3722 init_data.no_input_qs = 1;
3723 init_data.no_output_qs = card->qdio.no_out_queues;
3724 init_data.input_handler = card->discipline.input_handler;
3725 init_data.output_handler = card->discipline.output_handler;
3726 init_data.int_parm = (unsigned long) card;
3727 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3728 QDIO_OUTBOUND_0COPY_SBALS |
3729 QDIO_USE_OUTBOUND_PCIS;
3730 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3731 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3732
3733 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3734 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3735 rc = qdio_initialize(&init_data);
3736 if (rc)
3737 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3738 }
3739 kfree(out_sbal_ptrs);
3740 kfree(in_sbal_ptrs);
3741 kfree(qib_param_field);
3742 return rc;
3743}
3744
3745static void qeth_core_free_card(struct qeth_card *card)
3746{
3747
d11ba0c4
PT		 3748 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3749 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3750 qeth_clean_channel(&card->read);
3751 qeth_clean_channel(&card->write);
3752 if (card->dev)
3753 free_netdev(card->dev);
3754 kfree(card->ip_tbd_list);
3755 qeth_free_qdio_buffers(card);
6bcac508 3756 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 3757 kfree(card);
3758}
3759
3760static struct ccw_device_id qeth_ids[] = {
3761 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3762 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3763 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3764 {},
3765};
3766MODULE_DEVICE_TABLE(ccw, qeth_ids);
3767
3768static struct ccw_driver qeth_ccw_driver = {
3769 .name = "qeth",
3770 .ids = qeth_ids,
3771 .probe = ccwgroup_probe_ccwdev,
3772 .remove = ccwgroup_remove_ccwdev,
3773};
3774
3775static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3776 unsigned long driver_id)
3777{
022b660a
UB		 3778 return ccwgroup_create_from_string(root_dev, driver_id,
3779 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 3780}
3781
3782int qeth_core_hardsetup_card(struct qeth_card *card)
3783{
bbd50e17 3784 struct qdio_ssqd_desc *ssqd;
4a71df50 3785 int retries = 3;
779e6e1c 3786 int mpno = 0;
4a71df50
FB		 3787 int rc;
3788
d11ba0c4 3789 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3790 atomic_set(&card->force_alloc_skb, 0);
3791retry:
3792 if (retries < 3) {
74eacdb9
FB		 3793 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3794 dev_name(&card->gdev->dev));
4a71df50
FB		 3795 ccw_device_set_offline(CARD_DDEV(card));
3796 ccw_device_set_offline(CARD_WDEV(card));
3797 ccw_device_set_offline(CARD_RDEV(card));
3798 ccw_device_set_online(CARD_RDEV(card));
3799 ccw_device_set_online(CARD_WDEV(card));
3800 ccw_device_set_online(CARD_DDEV(card));
3801 }
3802 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3803 if (rc == -ERESTARTSYS) {
d11ba0c4 3804 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3805 return rc;
3806 } else if (rc) {
d11ba0c4 3807 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 3808 if (--retries < 0)
3809 goto out;
3810 else
3811 goto retry;
3812 }
3813
3814 rc = qeth_get_unitaddr(card);
3815 if (rc) {
d11ba0c4 3816 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 3817 return rc;
3818 }
779e6e1c 3819
bbd50e17
JG		 3820 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3821 if (!ssqd) {
3822 rc = -ENOMEM;
3823 goto out;
3824 }
3825 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3826 if (rc == 0)
3827 mpno = ssqd->pcnt;
3828 kfree(ssqd);
3829
a74b08c7
UB		 3830 if (mpno)
3831 mpno = min(mpno - 1, QETH_MAX_PORTNO);
4a71df50 3832 if (card->info.portno > mpno) {
14cc21b6
FB		 3833 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3834 "\n.", CARD_BUS_ID(card), card->info.portno);
4a71df50
FB		 3835 rc = -ENODEV;
3836 goto out;
3837 }
3838 qeth_init_tokens(card);
3839 qeth_init_func_level(card);
3840 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3841 if (rc == -ERESTARTSYS) {
d11ba0c4 3842 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3843 return rc;
3844 } else if (rc) {
d11ba0c4 3845 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3846 if (--retries < 0)
3847 goto out;
3848 else
3849 goto retry;
3850 }
3851 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3852 if (rc == -ERESTARTSYS) {
d11ba0c4 3853 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3854 return rc;
3855 } else if (rc) {
d11ba0c4 3856 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3857 if (--retries < 0)
3858 goto out;
3859 else
3860 goto retry;
3861 }
3862 rc = qeth_mpc_initialize(card);
3863 if (rc) {
d11ba0c4 3864 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3865 goto out;
3866 }
3867 return 0;
3868out:
74eacdb9
FB		 3869 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3870 "an error on the device\n");
3871 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3872 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 3873 return rc;
3874}
3875EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3876
3877static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3878 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3879{
3880 struct page *page = virt_to_page(element->addr);
3881 if (*pskb == NULL) {
3882 /* the upper protocol layers assume that there is data in the
3883 * skb itself. Copy a small amount (64 bytes) to make them
3884 * happy. */
3885 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3886 if (!(*pskb))
3887 return -ENOMEM;
3888 skb_reserve(*pskb, ETH_HLEN);
3889 if (data_len <= 64) {
3890 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3891 data_len);
3892 } else {
3893 get_page(page);
3894 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3895 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3896 data_len - 64);
3897 (*pskb)->data_len += data_len - 64;
3898 (*pskb)->len += data_len - 64;
3899 (*pskb)->truesize += data_len - 64;
3900 (*pfrag)++;
3901 }
3902 } else {
3903 get_page(page);
3904 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3905 (*pskb)->data_len += data_len;
3906 (*pskb)->len += data_len;
3907 (*pskb)->truesize += data_len;
3908 (*pfrag)++;
3909 }
3910 return 0;
3911}
3912
3913struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3914 struct qdio_buffer *buffer,
3915 struct qdio_buffer_element **__element, int *__offset,
3916 struct qeth_hdr **hdr)
3917{
3918 struct qdio_buffer_element *element = *__element;
3919 int offset = *__offset;
3920 struct sk_buff *skb = NULL;
3921 int skb_len;
3922 void *data_ptr;
3923 int data_len;
3924 int headroom = 0;
3925 int use_rx_sg = 0;
3926 int frag = 0;
3927
4a71df50
FB		 3928 /* qeth_hdr must not cross element boundaries */
3929 if (element->length < offset + sizeof(struct qeth_hdr)) {
3930 if (qeth_is_last_sbale(element))
3931 return NULL;
3932 element++;
3933 offset = 0;
3934 if (element->length < sizeof(struct qeth_hdr))
3935 return NULL;
3936 }
3937 *hdr = element->addr + offset;
3938
3939 offset += sizeof(struct qeth_hdr);
3940 if (card->options.layer2) {
3941 if (card->info.type == QETH_CARD_TYPE_OSN) {
3942 skb_len = (*hdr)->hdr.osn.pdu_length;
3943 headroom = sizeof(struct qeth_hdr);
3944 } else {
3945 skb_len = (*hdr)->hdr.l2.pkt_length;
3946 }
3947 } else {
3948 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 3949 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3950 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3951 headroom = TR_HLEN;
3952 else
3953 headroom = ETH_HLEN;
4a71df50
FB		 3954 }
3955
3956 if (!skb_len)
3957 return NULL;
3958
3959 if ((skb_len >= card->options.rx_sg_cb) &&
3960 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3961 (!atomic_read(&card->force_alloc_skb))) {
3962 use_rx_sg = 1;
3963 } else {
3964 skb = dev_alloc_skb(skb_len + headroom);
3965 if (!skb)
3966 goto no_mem;
3967 if (headroom)
3968 skb_reserve(skb, headroom);
3969 }
3970
3971 data_ptr = element->addr + offset;
3972 while (skb_len) {
3973 data_len = min(skb_len, (int)(element->length - offset));
3974 if (data_len) {
3975 if (use_rx_sg) {
3976 if (qeth_create_skb_frag(element, &skb, offset,
3977 &frag, data_len))
3978 goto no_mem;
3979 } else {
3980 memcpy(skb_put(skb, data_len), data_ptr,
3981 data_len);
3982 }
3983 }
3984 skb_len -= data_len;
3985 if (skb_len) {
3986 if (qeth_is_last_sbale(element)) {
d11ba0c4
PT		 3987 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3988 QETH_DBF_TEXT_(TRACE, 4, "%s",
4a71df50 3989 CARD_BUS_ID(card));
d11ba0c4
PT		 3990 QETH_DBF_TEXT(QERR, 2, "unexeob");
3991 QETH_DBF_TEXT_(QERR, 2, "%s",
4a71df50 3992 CARD_BUS_ID(card));
d11ba0c4 3993 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4a71df50
FB		 3994 dev_kfree_skb_any(skb);
3995 card->stats.rx_errors++;
3996 return NULL;
3997 }
3998 element++;
3999 offset = 0;
4000 data_ptr = element->addr;
4001 } else {
4002 offset += data_len;
4003 }
4004 }
4005 *__element = element;
4006 *__offset = offset;
4007 if (use_rx_sg && card->options.performance_stats) {
4008 card->perf_stats.sg_skbs_rx++;
4009 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4010 }
4011 return skb;
4012no_mem:
4013 if (net_ratelimit()) {
d11ba0c4
PT		 4014 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4015 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 4016 }
4017 card->stats.rx_dropped++;
4018 return NULL;
4019}
4020EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4021
4022static void qeth_unregister_dbf_views(void)
4023{
d11ba0c4
PT		 4024 int x;
4025 for (x = 0; x < QETH_DBF_INFOS; x++) {
4026 debug_unregister(qeth_dbf[x].id);
4027 qeth_dbf[x].id = NULL;
4028 }
4a71df50
FB		 4029}
4030
345aa66e 4031void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
cd023216
PT		 4032{
4033 char dbf_txt_buf[32];
345aa66e 4034 va_list args;
cd023216
PT		 4035
4036 if (level > (qeth_dbf[dbf_nix].id)->level)
4037 return;
345aa66e
PT		 4038 va_start(args, fmt);
4039 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4040 va_end(args);
cd023216 4041 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
cd023216
PT		 4042}
4043EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4044
4a71df50
FB		 4045static int qeth_register_dbf_views(void)
4046{
d11ba0c4
PT		 4047 int ret;
4048 int x;
4049
4050 for (x = 0; x < QETH_DBF_INFOS; x++) {
4051 /* register the areas */
4052 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4053 qeth_dbf[x].pages,
4054 qeth_dbf[x].areas,
4055 qeth_dbf[x].len);
4056 if (qeth_dbf[x].id == NULL) {
4057 qeth_unregister_dbf_views();
4058 return -ENOMEM;
4059 }
4a71df50 4060
d11ba0c4
PT		 4061 /* register a view */
4062 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4063 if (ret) {
4064 qeth_unregister_dbf_views();
4065 return ret;
4066 }
4a71df50 4067
d11ba0c4
PT		 4068 /* set a passing level */
4069 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4070 }
4a71df50
FB		 4071
4072 return 0;
4073}
4074
4075int qeth_core_load_discipline(struct qeth_card *card,
4076 enum qeth_discipline_id discipline)
4077{
4078 int rc = 0;
4079 switch (discipline) {
4080 case QETH_DISCIPLINE_LAYER3:
4081 card->discipline.ccwgdriver = try_then_request_module(
4082 symbol_get(qeth_l3_ccwgroup_driver),
4083 "qeth_l3");
4084 break;
4085 case QETH_DISCIPLINE_LAYER2:
4086 card->discipline.ccwgdriver = try_then_request_module(
4087 symbol_get(qeth_l2_ccwgroup_driver),
4088 "qeth_l2");
4089 break;
4090 }
4091 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4092 dev_err(&card->gdev->dev, "There is no kernel module to "
4093 "support discipline %d\n", discipline);
4a71df50
FB		 4094 rc = -EINVAL;
4095 }
4096 return rc;
4097}
4098
4099void qeth_core_free_discipline(struct qeth_card *card)
4100{
4101 if (card->options.layer2)
4102 symbol_put(qeth_l2_ccwgroup_driver);
4103 else
4104 symbol_put(qeth_l3_ccwgroup_driver);
4105 card->discipline.ccwgdriver = NULL;
4106}
4107
4108static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4109{
4110 struct qeth_card *card;
4111 struct device *dev;
4112 int rc;
4113 unsigned long flags;
4114
d11ba0c4 4115 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4116
4117 dev = &gdev->dev;
4118 if (!get_device(dev))
4119 return -ENODEV;
4120
2a0217d5 4121 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4122
4123 card = qeth_alloc_card();
4124 if (!card) {
d11ba0c4 4125 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4126 rc = -ENOMEM;
4127 goto err_dev;
4128 }
4129 card->read.ccwdev = gdev->cdev[0];
4130 card->write.ccwdev = gdev->cdev[1];
4131 card->data.ccwdev = gdev->cdev[2];
4132 dev_set_drvdata(&gdev->dev, card);
4133 card->gdev = gdev;
4134 gdev->cdev[0]->handler = qeth_irq;
4135 gdev->cdev[1]->handler = qeth_irq;
4136 gdev->cdev[2]->handler = qeth_irq;
4137
4138 rc = qeth_determine_card_type(card);
4139 if (rc) {
d11ba0c4 4140 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4141 goto err_card;
4142 }
4143 rc = qeth_setup_card(card);
4144 if (rc) {
d11ba0c4 4145 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 4146 goto err_card;
4147 }
4148
4149 if (card->info.type == QETH_CARD_TYPE_OSN) {
4150 rc = qeth_core_create_osn_attributes(dev);
4151 if (rc)
4152 goto err_card;
4153 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4154 if (rc) {
4155 qeth_core_remove_osn_attributes(dev);
4156 goto err_card;
4157 }
4158 rc = card->discipline.ccwgdriver->probe(card->gdev);
4159 if (rc) {
4160 qeth_core_free_discipline(card);
4161 qeth_core_remove_osn_attributes(dev);
4162 goto err_card;
4163 }
4164 } else {
4165 rc = qeth_core_create_device_attributes(dev);
4166 if (rc)
4167 goto err_card;
4168 }
4169
4170 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4171 list_add_tail(&card->list, &qeth_core_card_list.list);
4172 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4173 return 0;
4174
4175err_card:
4176 qeth_core_free_card(card);
4177err_dev:
4178 put_device(dev);
4179 return rc;
4180}
4181
4182static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4183{
4184 unsigned long flags;
4185 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4186
28a7e4c9 4187 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 4188 if (card->discipline.ccwgdriver) {
4189 card->discipline.ccwgdriver->remove(gdev);
4190 qeth_core_free_discipline(card);
4191 }
4192
4193 if (card->info.type == QETH_CARD_TYPE_OSN) {
4194 qeth_core_remove_osn_attributes(&gdev->dev);
4195 } else {
4196 qeth_core_remove_device_attributes(&gdev->dev);
4197 }
4198 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4199 list_del(&card->list);
4200 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4201 qeth_core_free_card(card);
4202 dev_set_drvdata(&gdev->dev, NULL);
4203 put_device(&gdev->dev);
4204 return;
4205}
4206
4207static int qeth_core_set_online(struct ccwgroup_device *gdev)
4208{
4209 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4210 int rc = 0;
4211 int def_discipline;
4212
4213 if (!card->discipline.ccwgdriver) {
4214 if (card->info.type == QETH_CARD_TYPE_IQD)
4215 def_discipline = QETH_DISCIPLINE_LAYER3;
4216 else
4217 def_discipline = QETH_DISCIPLINE_LAYER2;
4218 rc = qeth_core_load_discipline(card, def_discipline);
4219 if (rc)
4220 goto err;
4221 rc = card->discipline.ccwgdriver->probe(card->gdev);
4222 if (rc)
4223 goto err;
4224 }
4225 rc = card->discipline.ccwgdriver->set_online(gdev);
4226err:
4227 return rc;
4228}
4229
4230static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4231{
4232 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4233 return card->discipline.ccwgdriver->set_offline(gdev);
4234}
4235
4236static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4237{
4238 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4239 if (card->discipline.ccwgdriver &&
4240 card->discipline.ccwgdriver->shutdown)
4241 card->discipline.ccwgdriver->shutdown(gdev);
4242}
4243
4244static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4245 .owner = THIS_MODULE,
4246 .name = "qeth",
4247 .driver_id = 0xD8C5E3C8,
4248 .probe = qeth_core_probe_device,
4249 .remove = qeth_core_remove_device,
4250 .set_online = qeth_core_set_online,
4251 .set_offline = qeth_core_set_offline,
4252 .shutdown = qeth_core_shutdown,
4253};
4254
4255static ssize_t
4256qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4257 size_t count)
4258{
4259 int err;
4260 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4261 qeth_core_ccwgroup_driver.driver_id);
4262 if (err)
4263 return err;
4264 else
4265 return count;
4266}
4267
4268static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4269
4270static struct {
4271 const char str[ETH_GSTRING_LEN];
4272} qeth_ethtool_stats_keys[] = {
4273/* 0 */{"rx skbs"},
4274 {"rx buffers"},
4275 {"tx skbs"},
4276 {"tx buffers"},
4277 {"tx skbs no packing"},
4278 {"tx buffers no packing"},
4279 {"tx skbs packing"},
4280 {"tx buffers packing"},
4281 {"tx sg skbs"},
4282 {"tx sg frags"},
4283/* 10 */{"rx sg skbs"},
4284 {"rx sg frags"},
4285 {"rx sg page allocs"},
4286 {"tx large kbytes"},
4287 {"tx large count"},
4288 {"tx pk state ch n->p"},
4289 {"tx pk state ch p->n"},
4290 {"tx pk watermark low"},
4291 {"tx pk watermark high"},
4292 {"queue 0 buffer usage"},
4293/* 20 */{"queue 1 buffer usage"},
4294 {"queue 2 buffer usage"},
4295 {"queue 3 buffer usage"},
4296 {"rx handler time"},
4297 {"rx handler count"},
4298 {"rx do_QDIO time"},
4299 {"rx do_QDIO count"},
4300 {"tx handler time"},
4301 {"tx handler count"},
4302 {"tx time"},
4303/* 30 */{"tx count"},
4304 {"tx do_QDIO time"},
4305 {"tx do_QDIO count"},
4306};
4307
4308int qeth_core_get_stats_count(struct net_device *dev)
4309{
4310 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4311}
4312EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4313
4314void qeth_core_get_ethtool_stats(struct net_device *dev,
4315 struct ethtool_stats *stats, u64 *data)
4316{
509e2562 4317 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4318 data[0] = card->stats.rx_packets -
4319 card->perf_stats.initial_rx_packets;
4320 data[1] = card->perf_stats.bufs_rec;
4321 data[2] = card->stats.tx_packets -
4322 card->perf_stats.initial_tx_packets;
4323 data[3] = card->perf_stats.bufs_sent;
4324 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4325 - card->perf_stats.skbs_sent_pack;
4326 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4327 data[6] = card->perf_stats.skbs_sent_pack;
4328 data[7] = card->perf_stats.bufs_sent_pack;
4329 data[8] = card->perf_stats.sg_skbs_sent;
4330 data[9] = card->perf_stats.sg_frags_sent;
4331 data[10] = card->perf_stats.sg_skbs_rx;
4332 data[11] = card->perf_stats.sg_frags_rx;
4333 data[12] = card->perf_stats.sg_alloc_page_rx;
4334 data[13] = (card->perf_stats.large_send_bytes >> 10);
4335 data[14] = card->perf_stats.large_send_cnt;
4336 data[15] = card->perf_stats.sc_dp_p;
4337 data[16] = card->perf_stats.sc_p_dp;
4338 data[17] = QETH_LOW_WATERMARK_PACK;
4339 data[18] = QETH_HIGH_WATERMARK_PACK;
4340 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4341 data[20] = (card->qdio.no_out_queues > 1) ?
4342 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4343 data[21] = (card->qdio.no_out_queues > 2) ?
4344 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4345 data[22] = (card->qdio.no_out_queues > 3) ?
4346 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4347 data[23] = card->perf_stats.inbound_time;
4348 data[24] = card->perf_stats.inbound_cnt;
4349 data[25] = card->perf_stats.inbound_do_qdio_time;
4350 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4351 data[27] = card->perf_stats.outbound_handler_time;
4352 data[28] = card->perf_stats.outbound_handler_cnt;
4353 data[29] = card->perf_stats.outbound_time;
4354 data[30] = card->perf_stats.outbound_cnt;
4355 data[31] = card->perf_stats.outbound_do_qdio_time;
4356 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4357}
4358EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4359
4360void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4361{
4362 switch (stringset) {
4363 case ETH_SS_STATS:
4364 memcpy(data, &qeth_ethtool_stats_keys,
4365 sizeof(qeth_ethtool_stats_keys));
4366 break;
4367 default:
4368 WARN_ON(1);
4369 break;
4370 }
4371}
4372EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4373
4374void qeth_core_get_drvinfo(struct net_device *dev,
4375 struct ethtool_drvinfo *info)
4376{
509e2562 4377 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4378 if (card->options.layer2)
4379 strcpy(info->driver, "qeth_l2");
4380 else
4381 strcpy(info->driver, "qeth_l3");
4382
4383 strcpy(info->version, "1.0");
4384 strcpy(info->fw_version, card->info.mcl_level);
4385 sprintf(info->bus_info, "%s/%s/%s",
4386 CARD_RDEV_ID(card),
4387 CARD_WDEV_ID(card),
4388 CARD_DDEV_ID(card));
4389}
4390EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4391
3f9975aa
FB		 4392int qeth_core_ethtool_get_settings(struct net_device *netdev,
4393 struct ethtool_cmd *ecmd)
4394{
509e2562 4395 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 4396 enum qeth_link_types link_type;
4397
4398 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4399 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4400 else
4401 link_type = card->info.link_type;
4402
4403 ecmd->transceiver = XCVR_INTERNAL;
4404 ecmd->supported = SUPPORTED_Autoneg;
4405 ecmd->advertising = ADVERTISED_Autoneg;
4406 ecmd->duplex = DUPLEX_FULL;
4407 ecmd->autoneg = AUTONEG_ENABLE;
4408
4409 switch (link_type) {
4410 case QETH_LINK_TYPE_FAST_ETH:
4411 case QETH_LINK_TYPE_LANE_ETH100:
4412 ecmd->supported |= SUPPORTED_10baseT_Half |
4413 SUPPORTED_10baseT_Full |
4414 SUPPORTED_100baseT_Half |
4415 SUPPORTED_100baseT_Full |
4416 SUPPORTED_TP;
4417 ecmd->advertising |= ADVERTISED_10baseT_Half |
4418 ADVERTISED_10baseT_Full |
4419 ADVERTISED_100baseT_Half |
4420 ADVERTISED_100baseT_Full |
4421 ADVERTISED_TP;
4422 ecmd->speed = SPEED_100;
4423 ecmd->port = PORT_TP;
4424 break;
4425
4426 case QETH_LINK_TYPE_GBIT_ETH:
4427 case QETH_LINK_TYPE_LANE_ETH1000:
4428 ecmd->supported |= SUPPORTED_10baseT_Half |
4429 SUPPORTED_10baseT_Full |
4430 SUPPORTED_100baseT_Half |
4431 SUPPORTED_100baseT_Full |
4432 SUPPORTED_1000baseT_Half |
4433 SUPPORTED_1000baseT_Full |
4434 SUPPORTED_FIBRE;
4435 ecmd->advertising |= ADVERTISED_10baseT_Half |
4436 ADVERTISED_10baseT_Full |
4437 ADVERTISED_100baseT_Half |
4438 ADVERTISED_100baseT_Full |
4439 ADVERTISED_1000baseT_Half |
4440 ADVERTISED_1000baseT_Full |
4441 ADVERTISED_FIBRE;
4442 ecmd->speed = SPEED_1000;
4443 ecmd->port = PORT_FIBRE;
4444 break;
4445
4446 case QETH_LINK_TYPE_10GBIT_ETH:
4447 ecmd->supported |= SUPPORTED_10baseT_Half |
4448 SUPPORTED_10baseT_Full |
4449 SUPPORTED_100baseT_Half |
4450 SUPPORTED_100baseT_Full |
4451 SUPPORTED_1000baseT_Half |
4452 SUPPORTED_1000baseT_Full |
4453 SUPPORTED_10000baseT_Full |
4454 SUPPORTED_FIBRE;
4455 ecmd->advertising |= ADVERTISED_10baseT_Half |
4456 ADVERTISED_10baseT_Full |
4457 ADVERTISED_100baseT_Half |
4458 ADVERTISED_100baseT_Full |
4459 ADVERTISED_1000baseT_Half |
4460 ADVERTISED_1000baseT_Full |
4461 ADVERTISED_10000baseT_Full |
4462 ADVERTISED_FIBRE;
4463 ecmd->speed = SPEED_10000;
4464 ecmd->port = PORT_FIBRE;
4465 break;
4466
4467 default:
4468 ecmd->supported |= SUPPORTED_10baseT_Half |
4469 SUPPORTED_10baseT_Full |
4470 SUPPORTED_TP;
4471 ecmd->advertising |= ADVERTISED_10baseT_Half |
4472 ADVERTISED_10baseT_Full |
4473 ADVERTISED_TP;
4474 ecmd->speed = SPEED_10;
4475 ecmd->port = PORT_TP;
4476 }
4477
4478 return 0;
4479}
4480EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4481
4a71df50
FB		 4482static int __init qeth_core_init(void)
4483{
4484 int rc;
4485
74eacdb9 4486 pr_info("loading core functions\n");
4a71df50
FB		 4487 INIT_LIST_HEAD(&qeth_core_card_list.list);
4488 rwlock_init(&qeth_core_card_list.rwlock);
4489
4490 rc = qeth_register_dbf_views();
4491 if (rc)
4492 goto out_err;
4493 rc = ccw_driver_register(&qeth_ccw_driver);
4494 if (rc)
4495 goto ccw_err;
4496 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4497 if (rc)
4498 goto ccwgroup_err;
4499 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4500 &driver_attr_group);
4501 if (rc)
4502 goto driver_err;
4503 qeth_core_root_dev = s390_root_dev_register("qeth");
4504 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4505 if (rc)
4506 goto register_err;
4a71df50 4507
683d718a
FB		 4508 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4509 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4510 if (!qeth_core_header_cache) {
4511 rc = -ENOMEM;
4512 goto slab_err;
4513 }
4514
4515 return 0;
4516slab_err:
4517 s390_root_dev_unregister(qeth_core_root_dev);
4a71df50
FB		 4518register_err:
4519 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4520 &driver_attr_group);
4521driver_err:
4522 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4523ccwgroup_err:
4524 ccw_driver_unregister(&qeth_ccw_driver);
4525ccw_err:
74eacdb9 4526 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 4527 qeth_unregister_dbf_views();
4528out_err:
74eacdb9 4529 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 4530 return rc;
4531}
4532
4533static void __exit qeth_core_exit(void)
4534{
4535 s390_root_dev_unregister(qeth_core_root_dev);
4536 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4537 &driver_attr_group);
4538 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4539 ccw_driver_unregister(&qeth_ccw_driver);
683d718a 4540 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 4541 qeth_unregister_dbf_views();
74eacdb9 4542 pr_info("core functions removed\n");
4a71df50
FB		 4543}
4544
4545module_init(qeth_core_init);
4546module_exit(qeth_core_exit);
4547MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4548MODULE_DESCRIPTION("qeth core functions");
4549MODULE_LICENSE("GPL");
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