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[mirror_ubuntu-eoan-kernel.git] / drivers / s390 / net / qeth_core_main.c
CommitLineData
4a71df50
FB		 1/*
2 * drivers/s390/net/qeth_core_main.c
3 *
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
9 */
10
74eacdb9
FB		 11#define KMSG_COMPONENT "qeth"
12#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
13
4a71df50
FB		 14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/string.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/ip.h>
20#include <linux/ipv6.h>
21#include <linux/tcp.h>
22#include <linux/mii.h>
23#include <linux/kthread.h>
24
ab4227cb
MS		 25#include <asm/ebcdic.h>
26#include <asm/io.h>
4a71df50
FB		 27#include <asm/s390_rdev.h>
28
29#include "qeth_core.h"
30#include "qeth_core_offl.h"
31
d11ba0c4
PT		 32struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 /* N P A M L V H */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_QERR] = {"qeth_qerr",
38 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_TRACE] = {"qeth_trace",
40 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
41 [QETH_DBF_MSG] = {"qeth_msg",
42 8, 1, 128, 3, &debug_sprintf_view, NULL},
43 [QETH_DBF_SENSE] = {"qeth_sense",
44 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_MISC] = {"qeth_misc",
46 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
47 [QETH_DBF_CTRL] = {"qeth_control",
48 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
49};
50EXPORT_SYMBOL_GPL(qeth_dbf);
4a71df50
FB		 51
52struct qeth_card_list_struct qeth_core_card_list;
53EXPORT_SYMBOL_GPL(qeth_core_card_list);
683d718a
FB		 54struct kmem_cache *qeth_core_header_cache;
55EXPORT_SYMBOL_GPL(qeth_core_header_cache);
4a71df50
FB		 56
57static struct device *qeth_core_root_dev;
58static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
59static struct lock_class_key qdio_out_skb_queue_key;
4a71df50
FB		 60
61static void qeth_send_control_data_cb(struct qeth_channel *,
62 struct qeth_cmd_buffer *);
63static int qeth_issue_next_read(struct qeth_card *);
64static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
65static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
66static void qeth_free_buffer_pool(struct qeth_card *);
67static int qeth_qdio_establish(struct qeth_card *);
68
69
70static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
71 struct qdio_buffer *buffer, int is_tso,
72 int *next_element_to_fill)
73{
74 struct skb_frag_struct *frag;
75 int fragno;
76 unsigned long addr;
77 int element, cnt, dlen;
78
79 fragno = skb_shinfo(skb)->nr_frags;
80 element = *next_element_to_fill;
81 dlen = 0;
82
83 if (is_tso)
84 buffer->element[element].flags =
85 SBAL_FLAGS_MIDDLE_FRAG;
86 else
87 buffer->element[element].flags =
88 SBAL_FLAGS_FIRST_FRAG;
89 dlen = skb->len - skb->data_len;
90 if (dlen) {
91 buffer->element[element].addr = skb->data;
92 buffer->element[element].length = dlen;
93 element++;
94 }
95 for (cnt = 0; cnt < fragno; cnt++) {
96 frag = &skb_shinfo(skb)->frags[cnt];
97 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
98 frag->page_offset;
99 buffer->element[element].addr = (char *)addr;
100 buffer->element[element].length = frag->size;
101 if (cnt < (fragno - 1))
102 buffer->element[element].flags =
103 SBAL_FLAGS_MIDDLE_FRAG;
104 else
105 buffer->element[element].flags =
106 SBAL_FLAGS_LAST_FRAG;
107 element++;
108 }
109 *next_element_to_fill = element;
110}
111
112static inline const char *qeth_get_cardname(struct qeth_card *card)
113{
114 if (card->info.guestlan) {
115 switch (card->info.type) {
116 case QETH_CARD_TYPE_OSAE:
117 return " Guest LAN QDIO";
118 case QETH_CARD_TYPE_IQD:
119 return " Guest LAN Hiper";
120 default:
121 return " unknown";
122 }
123 } else {
124 switch (card->info.type) {
125 case QETH_CARD_TYPE_OSAE:
126 return " OSD Express";
127 case QETH_CARD_TYPE_IQD:
128 return " HiperSockets";
129 case QETH_CARD_TYPE_OSN:
130 return " OSN QDIO";
131 default:
132 return " unknown";
133 }
134 }
135 return " n/a";
136}
137
138/* max length to be returned: 14 */
139const char *qeth_get_cardname_short(struct qeth_card *card)
140{
141 if (card->info.guestlan) {
142 switch (card->info.type) {
143 case QETH_CARD_TYPE_OSAE:
144 return "GuestLAN QDIO";
145 case QETH_CARD_TYPE_IQD:
146 return "GuestLAN Hiper";
147 default:
148 return "unknown";
149 }
150 } else {
151 switch (card->info.type) {
152 case QETH_CARD_TYPE_OSAE:
153 switch (card->info.link_type) {
154 case QETH_LINK_TYPE_FAST_ETH:
155 return "OSD_100";
156 case QETH_LINK_TYPE_HSTR:
157 return "HSTR";
158 case QETH_LINK_TYPE_GBIT_ETH:
159 return "OSD_1000";
160 case QETH_LINK_TYPE_10GBIT_ETH:
161 return "OSD_10GIG";
162 case QETH_LINK_TYPE_LANE_ETH100:
163 return "OSD_FE_LANE";
164 case QETH_LINK_TYPE_LANE_TR:
165 return "OSD_TR_LANE";
166 case QETH_LINK_TYPE_LANE_ETH1000:
167 return "OSD_GbE_LANE";
168 case QETH_LINK_TYPE_LANE:
169 return "OSD_ATM_LANE";
170 default:
171 return "OSD_Express";
172 }
173 case QETH_CARD_TYPE_IQD:
174 return "HiperSockets";
175 case QETH_CARD_TYPE_OSN:
176 return "OSN";
177 default:
178 return "unknown";
179 }
180 }
181 return "n/a";
182}
183
184void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
185 int clear_start_mask)
186{
187 unsigned long flags;
188
189 spin_lock_irqsave(&card->thread_mask_lock, flags);
190 card->thread_allowed_mask = threads;
191 if (clear_start_mask)
192 card->thread_start_mask &= threads;
193 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
194 wake_up(&card->wait_q);
195}
196EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
197
198int qeth_threads_running(struct qeth_card *card, unsigned long threads)
199{
200 unsigned long flags;
201 int rc = 0;
202
203 spin_lock_irqsave(&card->thread_mask_lock, flags);
204 rc = (card->thread_running_mask & threads);
205 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
206 return rc;
207}
208EXPORT_SYMBOL_GPL(qeth_threads_running);
209
210int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
211{
212 return wait_event_interruptible(card->wait_q,
213 qeth_threads_running(card, threads) == 0);
214}
215EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
216
217void qeth_clear_working_pool_list(struct qeth_card *card)
218{
219 struct qeth_buffer_pool_entry *pool_entry, *tmp;
220
d11ba0c4 221 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
4a71df50
FB		 222 list_for_each_entry_safe(pool_entry, tmp,
223 &card->qdio.in_buf_pool.entry_list, list){
224 list_del(&pool_entry->list);
225 }
226}
227EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
228
229static int qeth_alloc_buffer_pool(struct qeth_card *card)
230{
231 struct qeth_buffer_pool_entry *pool_entry;
232 void *ptr;
233 int i, j;
234
d11ba0c4 235 QETH_DBF_TEXT(TRACE, 5, "alocpool");
4a71df50
FB		 236 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
237 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
238 if (!pool_entry) {
239 qeth_free_buffer_pool(card);
240 return -ENOMEM;
241 }
242 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
508b3c4f 243 ptr = (void *) __get_free_page(GFP_KERNEL);
4a71df50
FB		 244 if (!ptr) {
245 while (j > 0)
246 free_page((unsigned long)
247 pool_entry->elements[--j]);
248 kfree(pool_entry);
249 qeth_free_buffer_pool(card);
250 return -ENOMEM;
251 }
252 pool_entry->elements[j] = ptr;
253 }
254 list_add(&pool_entry->init_list,
255 &card->qdio.init_pool.entry_list);
256 }
257 return 0;
258}
259
260int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
261{
d11ba0c4 262 QETH_DBF_TEXT(TRACE, 2, "realcbp");
4a71df50
FB		 263
264 if ((card->state != CARD_STATE_DOWN) &&
265 (card->state != CARD_STATE_RECOVER))
266 return -EPERM;
267
268 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
269 qeth_clear_working_pool_list(card);
270 qeth_free_buffer_pool(card);
271 card->qdio.in_buf_pool.buf_count = bufcnt;
272 card->qdio.init_pool.buf_count = bufcnt;
273 return qeth_alloc_buffer_pool(card);
274}
275
276int qeth_set_large_send(struct qeth_card *card,
277 enum qeth_large_send_types type)
278{
279 int rc = 0;
280
281 if (card->dev == NULL) {
282 card->options.large_send = type;
283 return 0;
284 }
285 if (card->state == CARD_STATE_UP)
286 netif_tx_disable(card->dev);
287 card->options.large_send = type;
288 switch (card->options.large_send) {
289 case QETH_LARGE_SEND_EDDP:
015e691c
KDW		 290 if (card->info.type != QETH_CARD_TYPE_IQD) {
291 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
4a71df50 292 NETIF_F_HW_CSUM;
015e691c
KDW		 293 } else {
294 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
295 NETIF_F_HW_CSUM);
296 card->options.large_send = QETH_LARGE_SEND_NO;
297 rc = -EOPNOTSUPP;
298 }
4a71df50
FB		 299 break;
300 case QETH_LARGE_SEND_TSO:
301 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
302 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
303 NETIF_F_HW_CSUM;
304 } else {
4a71df50
FB		 305 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
306 NETIF_F_HW_CSUM);
307 card->options.large_send = QETH_LARGE_SEND_NO;
308 rc = -EOPNOTSUPP;
309 }
310 break;
311 default: /* includes QETH_LARGE_SEND_NO */
312 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
313 NETIF_F_HW_CSUM);
314 break;
315 }
316 if (card->state == CARD_STATE_UP)
317 netif_wake_queue(card->dev);
318 return rc;
319}
320EXPORT_SYMBOL_GPL(qeth_set_large_send);
321
322static int qeth_issue_next_read(struct qeth_card *card)
323{
324 int rc;
325 struct qeth_cmd_buffer *iob;
326
d11ba0c4 327 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
4a71df50
FB		 328 if (card->read.state != CH_STATE_UP)
329 return -EIO;
330 iob = qeth_get_buffer(&card->read);
331 if (!iob) {
74eacdb9
FB		 332 dev_warn(&card->gdev->dev, "The qeth device driver "
333 "failed to recover an error on the device\n");
334 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
335 "available\n", dev_name(&card->gdev->dev));
4a71df50
FB		 336 return -ENOMEM;
337 }
338 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
d11ba0c4 339 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 340 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
341 (addr_t) iob, 0, 0);
342 if (rc) {
74eacdb9
FB		 343 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
344 "rc=%i\n", dev_name(&card->gdev->dev), rc);
4a71df50
FB		 345 atomic_set(&card->read.irq_pending, 0);
346 qeth_schedule_recovery(card);
347 wake_up(&card->wait_q);
348 }
349 return rc;
350}
351
352static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
353{
354 struct qeth_reply *reply;
355
356 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
357 if (reply) {
358 atomic_set(&reply->refcnt, 1);
359 atomic_set(&reply->received, 0);
360 reply->card = card;
361 };
362 return reply;
363}
364
365static void qeth_get_reply(struct qeth_reply *reply)
366{
367 WARN_ON(atomic_read(&reply->refcnt) <= 0);
368 atomic_inc(&reply->refcnt);
369}
370
371static void qeth_put_reply(struct qeth_reply *reply)
372{
373 WARN_ON(atomic_read(&reply->refcnt) <= 0);
374 if (atomic_dec_and_test(&reply->refcnt))
375 kfree(reply);
376}
377
d11ba0c4 378static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
4a71df50
FB		 379 struct qeth_card *card)
380{
4a71df50 381 char *ipa_name;
d11ba0c4 382 int com = cmd->hdr.command;
4a71df50 383 ipa_name = qeth_get_ipa_cmd_name(com);
d11ba0c4
PT		 384 if (rc)
385 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
386 ipa_name, com, QETH_CARD_IFNAME(card),
387 rc, qeth_get_ipa_msg(rc));
388 else
389 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
390 ipa_name, com, QETH_CARD_IFNAME(card));
4a71df50
FB		 391}
392
393static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
394 struct qeth_cmd_buffer *iob)
395{
396 struct qeth_ipa_cmd *cmd = NULL;
397
d11ba0c4 398 QETH_DBF_TEXT(TRACE, 5, "chkipad");
4a71df50
FB		 399 if (IS_IPA(iob->data)) {
400 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
401 if (IS_IPA_REPLY(cmd)) {
d11ba0c4
PT		 402 if (cmd->hdr.command < IPA_CMD_SETCCID ||
403 cmd->hdr.command > IPA_CMD_MODCCID)
404 qeth_issue_ipa_msg(cmd,
405 cmd->hdr.return_code, card);
4a71df50
FB		 406 return cmd;
407 } else {
408 switch (cmd->hdr.command) {
409 case IPA_CMD_STOPLAN:
74eacdb9
FB		 410 dev_warn(&card->gdev->dev,
411 "The link for interface %s on CHPID"
412 " 0x%X failed\n",
4a71df50
FB		 413 QETH_CARD_IFNAME(card),
414 card->info.chpid);
415 card->lan_online = 0;
416 if (card->dev && netif_carrier_ok(card->dev))
417 netif_carrier_off(card->dev);
418 return NULL;
419 case IPA_CMD_STARTLAN:
74eacdb9
FB		 420 dev_info(&card->gdev->dev,
421 "The link for %s on CHPID 0x%X has"
422 " been restored\n",
4a71df50
FB		 423 QETH_CARD_IFNAME(card),
424 card->info.chpid);
425 netif_carrier_on(card->dev);
922dc062 426 card->lan_online = 1;
4a71df50
FB		 427 qeth_schedule_recovery(card);
428 return NULL;
429 case IPA_CMD_MODCCID:
430 return cmd;
431 case IPA_CMD_REGISTER_LOCAL_ADDR:
d11ba0c4 432 QETH_DBF_TEXT(TRACE, 3, "irla");
4a71df50
FB		 433 break;
434 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
d11ba0c4 435 QETH_DBF_TEXT(TRACE, 3, "urla");
4a71df50
FB		 436 break;
437 default:
c4cef07c 438 QETH_DBF_MESSAGE(2, "Received data is IPA "
4a71df50
FB		 439 "but not a reply!\n");
440 break;
441 }
442 }
443 }
444 return cmd;
445}
446
447void qeth_clear_ipacmd_list(struct qeth_card *card)
448{
449 struct qeth_reply *reply, *r;
450 unsigned long flags;
451
d11ba0c4 452 QETH_DBF_TEXT(TRACE, 4, "clipalst");
4a71df50
FB		 453
454 spin_lock_irqsave(&card->lock, flags);
455 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
456 qeth_get_reply(reply);
457 reply->rc = -EIO;
458 atomic_inc(&reply->received);
459 list_del_init(&reply->list);
460 wake_up(&reply->wait_q);
461 qeth_put_reply(reply);
462 }
463 spin_unlock_irqrestore(&card->lock, flags);
464}
465EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
466
467static int qeth_check_idx_response(unsigned char *buffer)
468{
469 if (!buffer)
470 return 0;
471
d11ba0c4 472 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
4a71df50 473 if ((buffer[2] & 0xc0) == 0xc0) {
74eacdb9 474 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
4a71df50
FB		 475 "with cause code 0x%02x%s\n",
476 buffer[4],
477 ((buffer[4] == 0x22) ?
478 " -- try another portname" : ""));
d11ba0c4
PT		 479 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
480 QETH_DBF_TEXT(TRACE, 2, " idxterm");
481 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 482 return -EIO;
483 }
484 return 0;
485}
486
487static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
488 __u32 len)
489{
490 struct qeth_card *card;
491
d11ba0c4 492 QETH_DBF_TEXT(TRACE, 4, "setupccw");
4a71df50
FB		 493 card = CARD_FROM_CDEV(channel->ccwdev);
494 if (channel == &card->read)
495 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
496 else
497 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
498 channel->ccw.count = len;
499 channel->ccw.cda = (__u32) __pa(iob);
500}
501
502static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
503{
504 __u8 index;
505
d11ba0c4 506 QETH_DBF_TEXT(TRACE, 6, "getbuff");
4a71df50
FB		 507 index = channel->io_buf_no;
508 do {
509 if (channel->iob[index].state == BUF_STATE_FREE) {
510 channel->iob[index].state = BUF_STATE_LOCKED;
511 channel->io_buf_no = (channel->io_buf_no + 1) %
512 QETH_CMD_BUFFER_NO;
513 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
514 return channel->iob + index;
515 }
516 index = (index + 1) % QETH_CMD_BUFFER_NO;
517 } while (index != channel->io_buf_no);
518
519 return NULL;
520}
521
522void qeth_release_buffer(struct qeth_channel *channel,
523 struct qeth_cmd_buffer *iob)
524{
525 unsigned long flags;
526
d11ba0c4 527 QETH_DBF_TEXT(TRACE, 6, "relbuff");
4a71df50
FB		 528 spin_lock_irqsave(&channel->iob_lock, flags);
529 memset(iob->data, 0, QETH_BUFSIZE);
530 iob->state = BUF_STATE_FREE;
531 iob->callback = qeth_send_control_data_cb;
532 iob->rc = 0;
533 spin_unlock_irqrestore(&channel->iob_lock, flags);
534}
535EXPORT_SYMBOL_GPL(qeth_release_buffer);
536
537static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
538{
539 struct qeth_cmd_buffer *buffer = NULL;
540 unsigned long flags;
541
542 spin_lock_irqsave(&channel->iob_lock, flags);
543 buffer = __qeth_get_buffer(channel);
544 spin_unlock_irqrestore(&channel->iob_lock, flags);
545 return buffer;
546}
547
548struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
549{
550 struct qeth_cmd_buffer *buffer;
551 wait_event(channel->wait_q,
552 ((buffer = qeth_get_buffer(channel)) != NULL));
553 return buffer;
554}
555EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
556
557void qeth_clear_cmd_buffers(struct qeth_channel *channel)
558{
559 int cnt;
560
561 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
562 qeth_release_buffer(channel, &channel->iob[cnt]);
563 channel->buf_no = 0;
564 channel->io_buf_no = 0;
565}
566EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
567
568static void qeth_send_control_data_cb(struct qeth_channel *channel,
569 struct qeth_cmd_buffer *iob)
570{
571 struct qeth_card *card;
572 struct qeth_reply *reply, *r;
573 struct qeth_ipa_cmd *cmd;
574 unsigned long flags;
575 int keep_reply;
576
d11ba0c4 577 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
4a71df50
FB		 578
579 card = CARD_FROM_CDEV(channel->ccwdev);
580 if (qeth_check_idx_response(iob->data)) {
581 qeth_clear_ipacmd_list(card);
fc9c2460
UB		 582 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
583 dev_err(&card->gdev->dev,
584 "The qeth device is not configured "
585 "for the OSI layer required by z/VM\n");
4a71df50
FB		 586 qeth_schedule_recovery(card);
587 goto out;
588 }
589
590 cmd = qeth_check_ipa_data(card, iob);
591 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
592 goto out;
593 /*in case of OSN : check if cmd is set */
594 if (card->info.type == QETH_CARD_TYPE_OSN &&
595 cmd &&
596 cmd->hdr.command != IPA_CMD_STARTLAN &&
597 card->osn_info.assist_cb != NULL) {
598 card->osn_info.assist_cb(card->dev, cmd);
599 goto out;
600 }
601
602 spin_lock_irqsave(&card->lock, flags);
603 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
604 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
605 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
606 qeth_get_reply(reply);
607 list_del_init(&reply->list);
608 spin_unlock_irqrestore(&card->lock, flags);
609 keep_reply = 0;
610 if (reply->callback != NULL) {
611 if (cmd) {
612 reply->offset = (__u16)((char *)cmd -
613 (char *)iob->data);
614 keep_reply = reply->callback(card,
615 reply,
616 (unsigned long)cmd);
617 } else
618 keep_reply = reply->callback(card,
619 reply,
620 (unsigned long)iob);
621 }
622 if (cmd)
623 reply->rc = (u16) cmd->hdr.return_code;
624 else if (iob->rc)
625 reply->rc = iob->rc;
626 if (keep_reply) {
627 spin_lock_irqsave(&card->lock, flags);
628 list_add_tail(&reply->list,
629 &card->cmd_waiter_list);
630 spin_unlock_irqrestore(&card->lock, flags);
631 } else {
632 atomic_inc(&reply->received);
633 wake_up(&reply->wait_q);
634 }
635 qeth_put_reply(reply);
636 goto out;
637 }
638 }
639 spin_unlock_irqrestore(&card->lock, flags);
640out:
641 memcpy(&card->seqno.pdu_hdr_ack,
642 QETH_PDU_HEADER_SEQ_NO(iob->data),
643 QETH_SEQ_NO_LENGTH);
644 qeth_release_buffer(channel, iob);
645}
646
647static int qeth_setup_channel(struct qeth_channel *channel)
648{
649 int cnt;
650
d11ba0c4 651 QETH_DBF_TEXT(SETUP, 2, "setupch");
4a71df50
FB		 652 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
653 channel->iob[cnt].data = (char *)
654 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
655 if (channel->iob[cnt].data == NULL)
656 break;
657 channel->iob[cnt].state = BUF_STATE_FREE;
658 channel->iob[cnt].channel = channel;
659 channel->iob[cnt].callback = qeth_send_control_data_cb;
660 channel->iob[cnt].rc = 0;
661 }
662 if (cnt < QETH_CMD_BUFFER_NO) {
663 while (cnt-- > 0)
664 kfree(channel->iob[cnt].data);
665 return -ENOMEM;
666 }
667 channel->buf_no = 0;
668 channel->io_buf_no = 0;
669 atomic_set(&channel->irq_pending, 0);
670 spin_lock_init(&channel->iob_lock);
671
672 init_waitqueue_head(&channel->wait_q);
673 return 0;
674}
675
676static int qeth_set_thread_start_bit(struct qeth_card *card,
677 unsigned long thread)
678{
679 unsigned long flags;
680
681 spin_lock_irqsave(&card->thread_mask_lock, flags);
682 if (!(card->thread_allowed_mask & thread) ||
683 (card->thread_start_mask & thread)) {
684 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
685 return -EPERM;
686 }
687 card->thread_start_mask |= thread;
688 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
689 return 0;
690}
691
692void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
693{
694 unsigned long flags;
695
696 spin_lock_irqsave(&card->thread_mask_lock, flags);
697 card->thread_start_mask &= ~thread;
698 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
699 wake_up(&card->wait_q);
700}
701EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
702
703void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
704{
705 unsigned long flags;
706
707 spin_lock_irqsave(&card->thread_mask_lock, flags);
708 card->thread_running_mask &= ~thread;
709 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
710 wake_up(&card->wait_q);
711}
712EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
713
714static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
715{
716 unsigned long flags;
717 int rc = 0;
718
719 spin_lock_irqsave(&card->thread_mask_lock, flags);
720 if (card->thread_start_mask & thread) {
721 if ((card->thread_allowed_mask & thread) &&
722 !(card->thread_running_mask & thread)) {
723 rc = 1;
724 card->thread_start_mask &= ~thread;
725 card->thread_running_mask |= thread;
726 } else
727 rc = -EPERM;
728 }
729 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
730 return rc;
731}
732
733int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
734{
735 int rc = 0;
736
737 wait_event(card->wait_q,
738 (rc = __qeth_do_run_thread(card, thread)) >= 0);
739 return rc;
740}
741EXPORT_SYMBOL_GPL(qeth_do_run_thread);
742
743void qeth_schedule_recovery(struct qeth_card *card)
744{
d11ba0c4 745 QETH_DBF_TEXT(TRACE, 2, "startrec");
4a71df50
FB		 746 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
747 schedule_work(&card->kernel_thread_starter);
748}
749EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
750
751static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
752{
753 int dstat, cstat;
754 char *sense;
755
756 sense = (char *) irb->ecw;
23d805b6
PO		 757 cstat = irb->scsw.cmd.cstat;
758 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 759
760 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
761 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
762 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
d11ba0c4 763 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
74eacdb9
FB		 764 dev_warn(&cdev->dev, "The qeth device driver "
765 "failed to recover an error on the device\n");
766 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
767 dev_name(&cdev->dev), dstat, cstat);
4a71df50
FB		 768 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
769 16, 1, irb, 64, 1);
770 return 1;
771 }
772
773 if (dstat & DEV_STAT_UNIT_CHECK) {
774 if (sense[SENSE_RESETTING_EVENT_BYTE] &
775 SENSE_RESETTING_EVENT_FLAG) {
d11ba0c4 776 QETH_DBF_TEXT(TRACE, 2, "REVIND");
4a71df50
FB		 777 return 1;
778 }
779 if (sense[SENSE_COMMAND_REJECT_BYTE] &
780 SENSE_COMMAND_REJECT_FLAG) {
d11ba0c4 781 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
28a7e4c9 782 return 1;
4a71df50
FB		 783 }
784 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
d11ba0c4 785 QETH_DBF_TEXT(TRACE, 2, "AFFE");
4a71df50
FB		 786 return 1;
787 }
788 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
d11ba0c4 789 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
4a71df50
FB		 790 return 0;
791 }
d11ba0c4 792 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
4a71df50
FB		 793 return 1;
794 }
795 return 0;
796}
797
798static long __qeth_check_irb_error(struct ccw_device *cdev,
799 unsigned long intparm, struct irb *irb)
800{
801 if (!IS_ERR(irb))
802 return 0;
803
804 switch (PTR_ERR(irb)) {
805 case -EIO:
74eacdb9
FB		 806 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
807 dev_name(&cdev->dev));
d11ba0c4
PT		 808 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
809 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
4a71df50
FB		 810 break;
811 case -ETIMEDOUT:
74eacdb9
FB		 812 dev_warn(&cdev->dev, "A hardware operation timed out"
813 " on the device\n");
d11ba0c4
PT		 814 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
815 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
4a71df50
FB		 816 if (intparm == QETH_RCD_PARM) {
817 struct qeth_card *card = CARD_FROM_CDEV(cdev);
818
819 if (card && (card->data.ccwdev == cdev)) {
820 card->data.state = CH_STATE_DOWN;
821 wake_up(&card->wait_q);
822 }
823 }
824 break;
825 default:
74eacdb9
FB		 826 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
827 dev_name(&cdev->dev), PTR_ERR(irb));
d11ba0c4
PT		 828 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
829 QETH_DBF_TEXT(TRACE, 2, " rc???");
4a71df50
FB		 830 }
831 return PTR_ERR(irb);
832}
833
834static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
835 struct irb *irb)
836{
837 int rc;
838 int cstat, dstat;
839 struct qeth_cmd_buffer *buffer;
840 struct qeth_channel *channel;
841 struct qeth_card *card;
842 struct qeth_cmd_buffer *iob;
843 __u8 index;
844
d11ba0c4 845 QETH_DBF_TEXT(TRACE, 5, "irq");
4a71df50
FB		 846
847 if (__qeth_check_irb_error(cdev, intparm, irb))
848 return;
23d805b6
PO		 849 cstat = irb->scsw.cmd.cstat;
850 dstat = irb->scsw.cmd.dstat;
4a71df50
FB		 851
852 card = CARD_FROM_CDEV(cdev);
853 if (!card)
854 return;
855
856 if (card->read.ccwdev == cdev) {
857 channel = &card->read;
d11ba0c4 858 QETH_DBF_TEXT(TRACE, 5, "read");
4a71df50
FB		 859 } else if (card->write.ccwdev == cdev) {
860 channel = &card->write;
d11ba0c4 861 QETH_DBF_TEXT(TRACE, 5, "write");
4a71df50
FB		 862 } else {
863 channel = &card->data;
d11ba0c4 864 QETH_DBF_TEXT(TRACE, 5, "data");
4a71df50
FB		 865 }
866 atomic_set(&channel->irq_pending, 0);
867
23d805b6 868 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
4a71df50
FB		 869 channel->state = CH_STATE_STOPPED;
870
23d805b6 871 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
4a71df50
FB		 872 channel->state = CH_STATE_HALTED;
873
874 /*let's wake up immediately on data channel*/
875 if ((channel == &card->data) && (intparm != 0) &&
876 (intparm != QETH_RCD_PARM))
877 goto out;
878
879 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
d11ba0c4 880 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
4a71df50
FB		 881 /* we don't have to handle this further */
882 intparm = 0;
883 }
884 if (intparm == QETH_HALT_CHANNEL_PARM) {
d11ba0c4 885 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
4a71df50
FB		 886 /* we don't have to handle this further */
887 intparm = 0;
888 }
889 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
890 (dstat & DEV_STAT_UNIT_CHECK) ||
891 (cstat)) {
892 if (irb->esw.esw0.erw.cons) {
74eacdb9
FB		 893 dev_warn(&channel->ccwdev->dev,
894 "The qeth device driver failed to recover "
895 "an error on the device\n");
896 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
897 "0x%X dstat 0x%X\n",
898 dev_name(&channel->ccwdev->dev), cstat, dstat);
4a71df50
FB		 899 print_hex_dump(KERN_WARNING, "qeth: irb ",
900 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
901 print_hex_dump(KERN_WARNING, "qeth: sense data ",
902 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
903 }
904 if (intparm == QETH_RCD_PARM) {
905 channel->state = CH_STATE_DOWN;
906 goto out;
907 }
908 rc = qeth_get_problem(cdev, irb);
909 if (rc) {
28a7e4c9 910 qeth_clear_ipacmd_list(card);
4a71df50
FB		 911 qeth_schedule_recovery(card);
912 goto out;
913 }
914 }
915
916 if (intparm == QETH_RCD_PARM) {
917 channel->state = CH_STATE_RCD_DONE;
918 goto out;
919 }
920 if (intparm) {
921 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
922 buffer->state = BUF_STATE_PROCESSED;
923 }
924 if (channel == &card->data)
925 return;
926 if (channel == &card->read &&
927 channel->state == CH_STATE_UP)
928 qeth_issue_next_read(card);
929
930 iob = channel->iob;
931 index = channel->buf_no;
932 while (iob[index].state == BUF_STATE_PROCESSED) {
933 if (iob[index].callback != NULL)
934 iob[index].callback(channel, iob + index);
935
936 index = (index + 1) % QETH_CMD_BUFFER_NO;
937 }
938 channel->buf_no = index;
939out:
940 wake_up(&card->wait_q);
941 return;
942}
943
944static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
945 struct qeth_qdio_out_buffer *buf)
946{
947 int i;
948 struct sk_buff *skb;
949
950 /* is PCI flag set on buffer? */
951 if (buf->buffer->element[0].flags & 0x40)
952 atomic_dec(&queue->set_pci_flags_count);
953
954 skb = skb_dequeue(&buf->skb_list);
955 while (skb) {
956 atomic_dec(&skb->users);
957 dev_kfree_skb_any(skb);
958 skb = skb_dequeue(&buf->skb_list);
959 }
960 qeth_eddp_buf_release_contexts(buf);
961 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
683d718a
FB		 962 if (buf->buffer->element[i].addr && buf->is_header[i])
963 kmem_cache_free(qeth_core_header_cache,
964 buf->buffer->element[i].addr);
965 buf->is_header[i] = 0;
4a71df50
FB		 966 buf->buffer->element[i].length = 0;
967 buf->buffer->element[i].addr = NULL;
968 buf->buffer->element[i].flags = 0;
969 }
970 buf->next_element_to_fill = 0;
971 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
972}
973
974void qeth_clear_qdio_buffers(struct qeth_card *card)
975{
976 int i, j;
977
d11ba0c4 978 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
4a71df50
FB		 979 /* clear outbound buffers to free skbs */
980 for (i = 0; i < card->qdio.no_out_queues; ++i)
981 if (card->qdio.out_qs[i]) {
982 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
983 qeth_clear_output_buffer(card->qdio.out_qs[i],
984 &card->qdio.out_qs[i]->bufs[j]);
985 }
986}
987EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
988
989static void qeth_free_buffer_pool(struct qeth_card *card)
990{
991 struct qeth_buffer_pool_entry *pool_entry, *tmp;
992 int i = 0;
d11ba0c4 993 QETH_DBF_TEXT(TRACE, 5, "freepool");
4a71df50
FB		 994 list_for_each_entry_safe(pool_entry, tmp,
995 &card->qdio.init_pool.entry_list, init_list){
996 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
997 free_page((unsigned long)pool_entry->elements[i]);
998 list_del(&pool_entry->init_list);
999 kfree(pool_entry);
1000 }
1001}
1002
1003static void qeth_free_qdio_buffers(struct qeth_card *card)
1004{
1005 int i, j;
1006
d11ba0c4 1007 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
4a71df50
FB		 1008 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1009 QETH_QDIO_UNINITIALIZED)
1010 return;
1011 kfree(card->qdio.in_q);
1012 card->qdio.in_q = NULL;
1013 /* inbound buffer pool */
1014 qeth_free_buffer_pool(card);
1015 /* free outbound qdio_qs */
1016 if (card->qdio.out_qs) {
1017 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1018 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1019 qeth_clear_output_buffer(card->qdio.out_qs[i],
1020 &card->qdio.out_qs[i]->bufs[j]);
1021 kfree(card->qdio.out_qs[i]);
1022 }
1023 kfree(card->qdio.out_qs);
1024 card->qdio.out_qs = NULL;
1025 }
1026}
1027
1028static void qeth_clean_channel(struct qeth_channel *channel)
1029{
1030 int cnt;
1031
d11ba0c4 1032 QETH_DBF_TEXT(SETUP, 2, "freech");
4a71df50
FB		 1033 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1034 kfree(channel->iob[cnt].data);
1035}
1036
1037static int qeth_is_1920_device(struct qeth_card *card)
1038{
1039 int single_queue = 0;
1040 struct ccw_device *ccwdev;
1041 struct channelPath_dsc {
1042 u8 flags;
1043 u8 lsn;
1044 u8 desc;
1045 u8 chpid;
1046 u8 swla;
1047 u8 zeroes;
1048 u8 chla;
1049 u8 chpp;
1050 } *chp_dsc;
1051
d11ba0c4 1052 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
4a71df50
FB		 1053
1054 ccwdev = card->data.ccwdev;
1055 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1056 if (chp_dsc != NULL) {
1057 /* CHPP field bit 6 == 1 -> single queue */
1058 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1059 kfree(chp_dsc);
1060 }
d11ba0c4 1061 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
4a71df50
FB		 1062 return single_queue;
1063}
1064
1065static void qeth_init_qdio_info(struct qeth_card *card)
1066{
d11ba0c4 1067 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
4a71df50
FB		 1068 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1069 /* inbound */
1070 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1071 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1072 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1073 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1074 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1075}
1076
1077static void qeth_set_intial_options(struct qeth_card *card)
1078{
1079 card->options.route4.type = NO_ROUTER;
1080 card->options.route6.type = NO_ROUTER;
1081 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1082 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1083 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1084 card->options.fake_broadcast = 0;
1085 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
4a71df50
FB		 1086 card->options.performance_stats = 0;
1087 card->options.rx_sg_cb = QETH_RX_SG_CB;
1088}
1089
1090static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1091{
1092 unsigned long flags;
1093 int rc = 0;
1094
1095 spin_lock_irqsave(&card->thread_mask_lock, flags);
d11ba0c4 1096 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
4a71df50
FB		 1097 (u8) card->thread_start_mask,
1098 (u8) card->thread_allowed_mask,
1099 (u8) card->thread_running_mask);
1100 rc = (card->thread_start_mask & thread);
1101 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1102 return rc;
1103}
1104
1105static void qeth_start_kernel_thread(struct work_struct *work)
1106{
1107 struct qeth_card *card = container_of(work, struct qeth_card,
1108 kernel_thread_starter);
d11ba0c4 1109 QETH_DBF_TEXT(TRACE , 2, "strthrd");
4a71df50
FB		 1110
1111 if (card->read.state != CH_STATE_UP &&
1112 card->write.state != CH_STATE_UP)
1113 return;
1114 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1115 kthread_run(card->discipline.recover, (void *) card,
1116 "qeth_recover");
1117}
1118
1119static int qeth_setup_card(struct qeth_card *card)
1120{
1121
d11ba0c4
PT		 1122 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1123 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1124
1125 card->read.state = CH_STATE_DOWN;
1126 card->write.state = CH_STATE_DOWN;
1127 card->data.state = CH_STATE_DOWN;
1128 card->state = CARD_STATE_DOWN;
1129 card->lan_online = 0;
1130 card->use_hard_stop = 0;
1131 card->dev = NULL;
1132 spin_lock_init(&card->vlanlock);
1133 spin_lock_init(&card->mclock);
1134 card->vlangrp = NULL;
1135 spin_lock_init(&card->lock);
1136 spin_lock_init(&card->ip_lock);
1137 spin_lock_init(&card->thread_mask_lock);
1138 card->thread_start_mask = 0;
1139 card->thread_allowed_mask = 0;
1140 card->thread_running_mask = 0;
1141 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1142 INIT_LIST_HEAD(&card->ip_list);
1143 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1144 if (!card->ip_tbd_list) {
d11ba0c4 1145 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
4a71df50
FB		 1146 return -ENOMEM;
1147 }
1148 INIT_LIST_HEAD(card->ip_tbd_list);
1149 INIT_LIST_HEAD(&card->cmd_waiter_list);
1150 init_waitqueue_head(&card->wait_q);
1151 /* intial options */
1152 qeth_set_intial_options(card);
1153 /* IP address takeover */
1154 INIT_LIST_HEAD(&card->ipato.entries);
1155 card->ipato.enabled = 0;
1156 card->ipato.invert4 = 0;
1157 card->ipato.invert6 = 0;
1158 /* init QDIO stuff */
1159 qeth_init_qdio_info(card);
1160 return 0;
1161}
1162
6bcac508
MS		 1163static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1164{
1165 struct qeth_card *card = container_of(slr, struct qeth_card,
1166 qeth_service_level);
1167 seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card),
1168 card->info.mcl_level);
1169}
1170
4a71df50
FB		 1171static struct qeth_card *qeth_alloc_card(void)
1172{
1173 struct qeth_card *card;
1174
d11ba0c4 1175 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
4a71df50
FB		 1176 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1177 if (!card)
1178 return NULL;
d11ba0c4 1179 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 1180 if (qeth_setup_channel(&card->read)) {
1181 kfree(card);
1182 return NULL;
1183 }
1184 if (qeth_setup_channel(&card->write)) {
1185 qeth_clean_channel(&card->read);
1186 kfree(card);
1187 return NULL;
1188 }
1189 card->options.layer2 = -1;
6bcac508
MS		 1190 card->qeth_service_level.seq_print = qeth_core_sl_print;
1191 register_service_level(&card->qeth_service_level);
4a71df50
FB		 1192 return card;
1193}
1194
1195static int qeth_determine_card_type(struct qeth_card *card)
1196{
1197 int i = 0;
1198
d11ba0c4 1199 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
4a71df50
FB		 1200
1201 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1202 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1203 while (known_devices[i][4]) {
1204 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1205 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1206 card->info.type = known_devices[i][4];
1207 card->qdio.no_out_queues = known_devices[i][8];
1208 card->info.is_multicast_different = known_devices[i][9];
1209 if (qeth_is_1920_device(card)) {
74eacdb9
FB		 1210 dev_info(&card->gdev->dev,
1211 "Priority Queueing not supported\n");
4a71df50
FB		 1212 card->qdio.no_out_queues = 1;
1213 card->qdio.default_out_queue = 0;
1214 }
1215 return 0;
1216 }
1217 i++;
1218 }
1219 card->info.type = QETH_CARD_TYPE_UNKNOWN;
74eacdb9
FB		 1220 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1221 "unknown type\n");
4a71df50
FB		 1222 return -ENOENT;
1223}
1224
1225static int qeth_clear_channel(struct qeth_channel *channel)
1226{
1227 unsigned long flags;
1228 struct qeth_card *card;
1229 int rc;
1230
d11ba0c4 1231 QETH_DBF_TEXT(TRACE, 3, "clearch");
4a71df50
FB		 1232 card = CARD_FROM_CDEV(channel->ccwdev);
1233 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1234 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1235 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1236
1237 if (rc)
1238 return rc;
1239 rc = wait_event_interruptible_timeout(card->wait_q,
1240 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1241 if (rc == -ERESTARTSYS)
1242 return rc;
1243 if (channel->state != CH_STATE_STOPPED)
1244 return -ETIME;
1245 channel->state = CH_STATE_DOWN;
1246 return 0;
1247}
1248
1249static int qeth_halt_channel(struct qeth_channel *channel)
1250{
1251 unsigned long flags;
1252 struct qeth_card *card;
1253 int rc;
1254
d11ba0c4 1255 QETH_DBF_TEXT(TRACE, 3, "haltch");
4a71df50
FB		 1256 card = CARD_FROM_CDEV(channel->ccwdev);
1257 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1258 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1259 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1260
1261 if (rc)
1262 return rc;
1263 rc = wait_event_interruptible_timeout(card->wait_q,
1264 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1265 if (rc == -ERESTARTSYS)
1266 return rc;
1267 if (channel->state != CH_STATE_HALTED)
1268 return -ETIME;
1269 return 0;
1270}
1271
1272static int qeth_halt_channels(struct qeth_card *card)
1273{
1274 int rc1 = 0, rc2 = 0, rc3 = 0;
1275
d11ba0c4 1276 QETH_DBF_TEXT(TRACE, 3, "haltchs");
4a71df50
FB		 1277 rc1 = qeth_halt_channel(&card->read);
1278 rc2 = qeth_halt_channel(&card->write);
1279 rc3 = qeth_halt_channel(&card->data);
1280 if (rc1)
1281 return rc1;
1282 if (rc2)
1283 return rc2;
1284 return rc3;
1285}
1286
1287static int qeth_clear_channels(struct qeth_card *card)
1288{
1289 int rc1 = 0, rc2 = 0, rc3 = 0;
1290
d11ba0c4 1291 QETH_DBF_TEXT(TRACE, 3, "clearchs");
4a71df50
FB		 1292 rc1 = qeth_clear_channel(&card->read);
1293 rc2 = qeth_clear_channel(&card->write);
1294 rc3 = qeth_clear_channel(&card->data);
1295 if (rc1)
1296 return rc1;
1297 if (rc2)
1298 return rc2;
1299 return rc3;
1300}
1301
1302static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1303{
1304 int rc = 0;
1305
d11ba0c4
PT		 1306 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1307 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
4a71df50
FB		 1308
1309 if (halt)
1310 rc = qeth_halt_channels(card);
1311 if (rc)
1312 return rc;
1313 return qeth_clear_channels(card);
1314}
1315
1316int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1317{
1318 int rc = 0;
1319
d11ba0c4 1320 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
4a71df50
FB		 1321 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1322 QETH_QDIO_CLEANING)) {
1323 case QETH_QDIO_ESTABLISHED:
1324 if (card->info.type == QETH_CARD_TYPE_IQD)
1325 rc = qdio_cleanup(CARD_DDEV(card),
1326 QDIO_FLAG_CLEANUP_USING_HALT);
1327 else
1328 rc = qdio_cleanup(CARD_DDEV(card),
1329 QDIO_FLAG_CLEANUP_USING_CLEAR);
1330 if (rc)
d11ba0c4 1331 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
4a71df50
FB		 1332 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1333 break;
1334 case QETH_QDIO_CLEANING:
1335 return rc;
1336 default:
1337 break;
1338 }
1339 rc = qeth_clear_halt_card(card, use_halt);
1340 if (rc)
d11ba0c4 1341 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
4a71df50
FB		 1342 card->state = CARD_STATE_DOWN;
1343 return rc;
1344}
1345EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1346
1347static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1348 int *length)
1349{
1350 struct ciw *ciw;
1351 char *rcd_buf;
1352 int ret;
1353 struct qeth_channel *channel = &card->data;
1354 unsigned long flags;
1355
1356 /*
1357 * scan for RCD command in extended SenseID data
1358 */
1359 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1360 if (!ciw || ciw->cmd == 0)
1361 return -EOPNOTSUPP;
1362 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1363 if (!rcd_buf)
1364 return -ENOMEM;
1365
1366 channel->ccw.cmd_code = ciw->cmd;
1367 channel->ccw.cda = (__u32) __pa(rcd_buf);
1368 channel->ccw.count = ciw->count;
1369 channel->ccw.flags = CCW_FLAG_SLI;
1370 channel->state = CH_STATE_RCD;
1371 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1372 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1373 QETH_RCD_PARM, LPM_ANYPATH, 0,
1374 QETH_RCD_TIMEOUT);
1375 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1376 if (!ret)
1377 wait_event(card->wait_q,
1378 (channel->state == CH_STATE_RCD_DONE ||
1379 channel->state == CH_STATE_DOWN));
1380 if (channel->state == CH_STATE_DOWN)
1381 ret = -EIO;
1382 else
1383 channel->state = CH_STATE_DOWN;
1384 if (ret) {
1385 kfree(rcd_buf);
1386 *buffer = NULL;
1387 *length = 0;
1388 } else {
1389 *length = ciw->count;
1390 *buffer = rcd_buf;
1391 }
1392 return ret;
1393}
1394
1395static int qeth_get_unitaddr(struct qeth_card *card)
1396{
1397 int length;
1398 char *prcd;
1399 int rc;
1400
d11ba0c4 1401 QETH_DBF_TEXT(SETUP, 2, "getunit");
4a71df50
FB		 1402 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1403 if (rc) {
74eacdb9
FB		 1404 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
1405 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 1406 return rc;
1407 }
1408 card->info.chpid = prcd[30];
1409 card->info.unit_addr2 = prcd[31];
1410 card->info.cula = prcd[63];
1411 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1412 (prcd[0x11] == _ascebc['M']));
1413 kfree(prcd);
1414 return 0;
1415}
1416
1417static void qeth_init_tokens(struct qeth_card *card)
1418{
1419 card->token.issuer_rm_w = 0x00010103UL;
1420 card->token.cm_filter_w = 0x00010108UL;
1421 card->token.cm_connection_w = 0x0001010aUL;
1422 card->token.ulp_filter_w = 0x0001010bUL;
1423 card->token.ulp_connection_w = 0x0001010dUL;
1424}
1425
1426static void qeth_init_func_level(struct qeth_card *card)
1427{
1428 if (card->ipato.enabled) {
1429 if (card->info.type == QETH_CARD_TYPE_IQD)
1430 card->info.func_level =
1431 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1432 else
1433 card->info.func_level =
1434 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1435 } else {
1436 if (card->info.type == QETH_CARD_TYPE_IQD)
1437 /*FIXME:why do we have same values for dis and ena for
1438 osae??? */
1439 card->info.func_level =
1440 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1441 else
1442 card->info.func_level =
1443 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1444 }
1445}
1446
4a71df50
FB		 1447static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1448 void (*idx_reply_cb)(struct qeth_channel *,
1449 struct qeth_cmd_buffer *))
1450{
1451 struct qeth_cmd_buffer *iob;
1452 unsigned long flags;
1453 int rc;
1454 struct qeth_card *card;
1455
d11ba0c4 1456 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
4a71df50
FB		 1457 card = CARD_FROM_CDEV(channel->ccwdev);
1458 iob = qeth_get_buffer(channel);
1459 iob->callback = idx_reply_cb;
1460 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1461 channel->ccw.count = QETH_BUFSIZE;
1462 channel->ccw.cda = (__u32) __pa(iob->data);
1463
1464 wait_event(card->wait_q,
1465 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1466 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1467 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1468 rc = ccw_device_start(channel->ccwdev,
1469 &channel->ccw, (addr_t) iob, 0, 0);
1470 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1471
1472 if (rc) {
14cc21b6 1473 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
d11ba0c4 1474 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 1475 atomic_set(&channel->irq_pending, 0);
1476 wake_up(&card->wait_q);
1477 return rc;
1478 }
1479 rc = wait_event_interruptible_timeout(card->wait_q,
1480 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1481 if (rc == -ERESTARTSYS)
1482 return rc;
1483 if (channel->state != CH_STATE_UP) {
1484 rc = -ETIME;
d11ba0c4 1485 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 1486 qeth_clear_cmd_buffers(channel);
1487 } else
1488 rc = 0;
1489 return rc;
1490}
1491
1492static int qeth_idx_activate_channel(struct qeth_channel *channel,
1493 void (*idx_reply_cb)(struct qeth_channel *,
1494 struct qeth_cmd_buffer *))
1495{
1496 struct qeth_card *card;
1497 struct qeth_cmd_buffer *iob;
1498 unsigned long flags;
1499 __u16 temp;
1500 __u8 tmp;
1501 int rc;
f06f6f32 1502 struct ccw_dev_id temp_devid;
4a71df50
FB		 1503
1504 card = CARD_FROM_CDEV(channel->ccwdev);
1505
d11ba0c4 1506 QETH_DBF_TEXT(SETUP, 2, "idxactch");
4a71df50
FB		 1507
1508 iob = qeth_get_buffer(channel);
1509 iob->callback = idx_reply_cb;
1510 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1511 channel->ccw.count = IDX_ACTIVATE_SIZE;
1512 channel->ccw.cda = (__u32) __pa(iob->data);
1513 if (channel == &card->write) {
1514 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1515 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1516 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1517 card->seqno.trans_hdr++;
1518 } else {
1519 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1520 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1521 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1522 }
1523 tmp = ((__u8)card->info.portno) | 0x80;
1524 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1525 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1526 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1527 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1528 &card->info.func_level, sizeof(__u16));
f06f6f32
CH		 1529 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1530 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
4a71df50
FB		 1531 temp = (card->info.cula << 8) + card->info.unit_addr2;
1532 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1533
1534 wait_event(card->wait_q,
1535 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
d11ba0c4 1536 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
4a71df50
FB		 1537 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1538 rc = ccw_device_start(channel->ccwdev,
1539 &channel->ccw, (addr_t) iob, 0, 0);
1540 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1541
1542 if (rc) {
14cc21b6
FB		 1543 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1544 rc);
d11ba0c4 1545 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 1546 atomic_set(&channel->irq_pending, 0);
1547 wake_up(&card->wait_q);
1548 return rc;
1549 }
1550 rc = wait_event_interruptible_timeout(card->wait_q,
1551 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1552 if (rc == -ERESTARTSYS)
1553 return rc;
1554 if (channel->state != CH_STATE_ACTIVATING) {
74eacdb9
FB		 1555 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1556 " failed to recover an error on the device\n");
1557 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1558 dev_name(&channel->ccwdev->dev));
d11ba0c4 1559 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
4a71df50
FB		 1560 qeth_clear_cmd_buffers(channel);
1561 return -ETIME;
1562 }
1563 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1564}
1565
1566static int qeth_peer_func_level(int level)
1567{
1568 if ((level & 0xff) == 8)
1569 return (level & 0xff) + 0x400;
1570 if (((level >> 8) & 3) == 1)
1571 return (level & 0xff) + 0x200;
1572 return level;
1573}
1574
1575static void qeth_idx_write_cb(struct qeth_channel *channel,
1576 struct qeth_cmd_buffer *iob)
1577{
1578 struct qeth_card *card;
1579 __u16 temp;
1580
d11ba0c4 1581 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
4a71df50
FB		 1582
1583 if (channel->state == CH_STATE_DOWN) {
1584 channel->state = CH_STATE_ACTIVATING;
1585 goto out;
1586 }
1587 card = CARD_FROM_CDEV(channel->ccwdev);
1588
1589 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1590 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1591 dev_err(&card->write.ccwdev->dev,
1592 "The adapter is used exclusively by another "
1593 "host\n");
4a71df50 1594 else
74eacdb9
FB		 1595 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1596 " negative reply\n",
1597 dev_name(&card->write.ccwdev->dev));
4a71df50
FB		 1598 goto out;
1599 }
1600 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1601 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1602 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1603 "function level mismatch (sent: 0x%x, received: "
1604 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1605 card->info.func_level, temp);
4a71df50
FB		 1606 goto out;
1607 }
1608 channel->state = CH_STATE_UP;
1609out:
1610 qeth_release_buffer(channel, iob);
1611}
1612
1613static void qeth_idx_read_cb(struct qeth_channel *channel,
1614 struct qeth_cmd_buffer *iob)
1615{
1616 struct qeth_card *card;
1617 __u16 temp;
1618
d11ba0c4 1619 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
4a71df50
FB		 1620 if (channel->state == CH_STATE_DOWN) {
1621 channel->state = CH_STATE_ACTIVATING;
1622 goto out;
1623 }
1624
1625 card = CARD_FROM_CDEV(channel->ccwdev);
1626 if (qeth_check_idx_response(iob->data))
1627 goto out;
1628
1629 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1630 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
74eacdb9
FB		 1631 dev_err(&card->write.ccwdev->dev,
1632 "The adapter is used exclusively by another "
1633 "host\n");
4a71df50 1634 else
74eacdb9
FB		 1635 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1636 " negative reply\n",
1637 dev_name(&card->read.ccwdev->dev));
4a71df50
FB		 1638 goto out;
1639 }
1640
1641/**
1642 * temporary fix for microcode bug
1643 * to revert it,replace OR by AND
1644 */
1645 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1646 (card->info.type == QETH_CARD_TYPE_OSAE))
1647 card->info.portname_required = 1;
1648
1649 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1650 if (temp != qeth_peer_func_level(card->info.func_level)) {
74eacdb9
FB		 1651 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1652 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1653 dev_name(&card->read.ccwdev->dev),
1654 card->info.func_level, temp);
4a71df50
FB		 1655 goto out;
1656 }
1657 memcpy(&card->token.issuer_rm_r,
1658 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1659 QETH_MPC_TOKEN_LENGTH);
1660 memcpy(&card->info.mcl_level[0],
1661 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1662 channel->state = CH_STATE_UP;
1663out:
1664 qeth_release_buffer(channel, iob);
1665}
1666
1667void qeth_prepare_control_data(struct qeth_card *card, int len,
1668 struct qeth_cmd_buffer *iob)
1669{
1670 qeth_setup_ccw(&card->write, iob->data, len);
1671 iob->callback = qeth_release_buffer;
1672
1673 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1674 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1675 card->seqno.trans_hdr++;
1676 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1677 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1678 card->seqno.pdu_hdr++;
1679 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1680 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
d11ba0c4 1681 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1682}
1683EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1684
1685int qeth_send_control_data(struct qeth_card *card, int len,
1686 struct qeth_cmd_buffer *iob,
1687 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1688 unsigned long),
1689 void *reply_param)
1690{
1691 int rc;
1692 unsigned long flags;
1693 struct qeth_reply *reply = NULL;
1694 unsigned long timeout;
5b54e16f 1695 struct qeth_ipa_cmd *cmd;
4a71df50 1696
d11ba0c4 1697 QETH_DBF_TEXT(TRACE, 2, "sendctl");
4a71df50
FB		 1698
1699 reply = qeth_alloc_reply(card);
1700 if (!reply) {
4a71df50
FB		 1701 return -ENOMEM;
1702 }
1703 reply->callback = reply_cb;
1704 reply->param = reply_param;
1705 if (card->state == CARD_STATE_DOWN)
1706 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1707 else
1708 reply->seqno = card->seqno.ipa++;
1709 init_waitqueue_head(&reply->wait_q);
1710 spin_lock_irqsave(&card->lock, flags);
1711 list_add_tail(&reply->list, &card->cmd_waiter_list);
1712 spin_unlock_irqrestore(&card->lock, flags);
d11ba0c4 1713 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
4a71df50
FB		 1714
1715 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1716 qeth_prepare_control_data(card, len, iob);
1717
1718 if (IS_IPA(iob->data))
1719 timeout = jiffies + QETH_IPA_TIMEOUT;
1720 else
1721 timeout = jiffies + QETH_TIMEOUT;
1722
d11ba0c4 1723 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
4a71df50
FB		 1724 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1725 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1726 (addr_t) iob, 0, 0);
1727 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1728 if (rc) {
74eacdb9
FB		 1729 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1730 "ccw_device_start rc = %i\n",
1731 dev_name(&card->write.ccwdev->dev), rc);
d11ba0c4 1732 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
4a71df50
FB		 1733 spin_lock_irqsave(&card->lock, flags);
1734 list_del_init(&reply->list);
1735 qeth_put_reply(reply);
1736 spin_unlock_irqrestore(&card->lock, flags);
1737 qeth_release_buffer(iob->channel, iob);
1738 atomic_set(&card->write.irq_pending, 0);
1739 wake_up(&card->wait_q);
1740 return rc;
1741 }
5b54e16f
FB		 1742
1743 /* we have only one long running ipassist, since we can ensure
1744 process context of this command we can sleep */
1745 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1746 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1747 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1748 if (!wait_event_timeout(reply->wait_q,
1749 atomic_read(&reply->received), timeout))
1750 goto time_err;
1751 } else {
1752 while (!atomic_read(&reply->received)) {
1753 if (time_after(jiffies, timeout))
1754 goto time_err;
1755 cpu_relax();
1756 };
1757 }
1758
1759 rc = reply->rc;
1760 qeth_put_reply(reply);
1761 return rc;
1762
1763time_err:
1764 spin_lock_irqsave(&reply->card->lock, flags);
1765 list_del_init(&reply->list);
1766 spin_unlock_irqrestore(&reply->card->lock, flags);
1767 reply->rc = -ETIME;
1768 atomic_inc(&reply->received);
1769 wake_up(&reply->wait_q);
4a71df50
FB		 1770 rc = reply->rc;
1771 qeth_put_reply(reply);
1772 return rc;
1773}
1774EXPORT_SYMBOL_GPL(qeth_send_control_data);
1775
1776static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1777 unsigned long data)
1778{
1779 struct qeth_cmd_buffer *iob;
1780
d11ba0c4 1781 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
4a71df50
FB		 1782
1783 iob = (struct qeth_cmd_buffer *) data;
1784 memcpy(&card->token.cm_filter_r,
1785 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1786 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1787 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1788 return 0;
1789}
1790
1791static int qeth_cm_enable(struct qeth_card *card)
1792{
1793 int rc;
1794 struct qeth_cmd_buffer *iob;
1795
d11ba0c4 1796 QETH_DBF_TEXT(SETUP, 2, "cmenable");
4a71df50
FB		 1797
1798 iob = qeth_wait_for_buffer(&card->write);
1799 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1800 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1801 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1802 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1803 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1804
1805 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1806 qeth_cm_enable_cb, NULL);
1807 return rc;
1808}
1809
1810static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1811 unsigned long data)
1812{
1813
1814 struct qeth_cmd_buffer *iob;
1815
d11ba0c4 1816 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
4a71df50
FB		 1817
1818 iob = (struct qeth_cmd_buffer *) data;
1819 memcpy(&card->token.cm_connection_r,
1820 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1821 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 1822 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1823 return 0;
1824}
1825
1826static int qeth_cm_setup(struct qeth_card *card)
1827{
1828 int rc;
1829 struct qeth_cmd_buffer *iob;
1830
d11ba0c4 1831 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
4a71df50
FB		 1832
1833 iob = qeth_wait_for_buffer(&card->write);
1834 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1835 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1836 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1837 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1838 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1839 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1840 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1841 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1842 qeth_cm_setup_cb, NULL);
1843 return rc;
1844
1845}
1846
1847static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1848{
1849 switch (card->info.type) {
1850 case QETH_CARD_TYPE_UNKNOWN:
1851 return 1500;
1852 case QETH_CARD_TYPE_IQD:
1853 return card->info.max_mtu;
1854 case QETH_CARD_TYPE_OSAE:
1855 switch (card->info.link_type) {
1856 case QETH_LINK_TYPE_HSTR:
1857 case QETH_LINK_TYPE_LANE_TR:
1858 return 2000;
1859 default:
1860 return 1492;
1861 }
1862 default:
1863 return 1500;
1864 }
1865}
1866
1867static inline int qeth_get_max_mtu_for_card(int cardtype)
1868{
1869 switch (cardtype) {
1870
1871 case QETH_CARD_TYPE_UNKNOWN:
1872 case QETH_CARD_TYPE_OSAE:
1873 case QETH_CARD_TYPE_OSN:
1874 return 61440;
1875 case QETH_CARD_TYPE_IQD:
1876 return 57344;
1877 default:
1878 return 1500;
1879 }
1880}
1881
1882static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1883{
1884 switch (cardtype) {
1885 case QETH_CARD_TYPE_IQD:
1886 return 1;
1887 default:
1888 return 0;
1889 }
1890}
1891
1892static inline int qeth_get_mtu_outof_framesize(int framesize)
1893{
1894 switch (framesize) {
1895 case 0x4000:
1896 return 8192;
1897 case 0x6000:
1898 return 16384;
1899 case 0xa000:
1900 return 32768;
1901 case 0xffff:
1902 return 57344;
1903 default:
1904 return 0;
1905 }
1906}
1907
1908static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1909{
1910 switch (card->info.type) {
1911 case QETH_CARD_TYPE_OSAE:
1912 return ((mtu >= 576) && (mtu <= 61440));
1913 case QETH_CARD_TYPE_IQD:
1914 return ((mtu >= 576) &&
1915 (mtu <= card->info.max_mtu + 4096 - 32));
1916 case QETH_CARD_TYPE_OSN:
1917 case QETH_CARD_TYPE_UNKNOWN:
1918 default:
1919 return 1;
1920 }
1921}
1922
1923static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1924 unsigned long data)
1925{
1926
1927 __u16 mtu, framesize;
1928 __u16 len;
1929 __u8 link_type;
1930 struct qeth_cmd_buffer *iob;
1931
d11ba0c4 1932 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
4a71df50
FB		 1933
1934 iob = (struct qeth_cmd_buffer *) data;
1935 memcpy(&card->token.ulp_filter_r,
1936 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1937 QETH_MPC_TOKEN_LENGTH);
1938 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1939 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1940 mtu = qeth_get_mtu_outof_framesize(framesize);
1941 if (!mtu) {
1942 iob->rc = -EINVAL;
d11ba0c4 1943 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1944 return 0;
1945 }
1946 card->info.max_mtu = mtu;
1947 card->info.initial_mtu = mtu;
1948 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1949 } else {
1950 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1951 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1952 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1953 }
1954
1955 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1956 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1957 memcpy(&link_type,
1958 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1959 card->info.link_type = link_type;
1960 } else
1961 card->info.link_type = 0;
d11ba0c4 1962 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 1963 return 0;
1964}
1965
1966static int qeth_ulp_enable(struct qeth_card *card)
1967{
1968 int rc;
1969 char prot_type;
1970 struct qeth_cmd_buffer *iob;
1971
1972 /*FIXME: trace view callbacks*/
d11ba0c4 1973 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
4a71df50
FB		 1974
1975 iob = qeth_wait_for_buffer(&card->write);
1976 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1977
1978 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1979 (__u8) card->info.portno;
1980 if (card->options.layer2)
1981 if (card->info.type == QETH_CARD_TYPE_OSN)
1982 prot_type = QETH_PROT_OSN2;
1983 else
1984 prot_type = QETH_PROT_LAYER2;
1985 else
1986 prot_type = QETH_PROT_TCPIP;
1987
1988 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1989 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1990 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1991 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1992 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1993 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1994 card->info.portname, 9);
1995 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1996 qeth_ulp_enable_cb, NULL);
1997 return rc;
1998
1999}
2000
2001static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2002 unsigned long data)
2003{
2004 struct qeth_cmd_buffer *iob;
2005
d11ba0c4 2006 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
4a71df50
FB		 2007
2008 iob = (struct qeth_cmd_buffer *) data;
2009 memcpy(&card->token.ulp_connection_r,
2010 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2011 QETH_MPC_TOKEN_LENGTH);
d11ba0c4 2012 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
4a71df50
FB		 2013 return 0;
2014}
2015
2016static int qeth_ulp_setup(struct qeth_card *card)
2017{
2018 int rc;
2019 __u16 temp;
2020 struct qeth_cmd_buffer *iob;
2021 struct ccw_dev_id dev_id;
2022
d11ba0c4 2023 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
4a71df50
FB		 2024
2025 iob = qeth_wait_for_buffer(&card->write);
2026 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2027
2028 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2029 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2030 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2031 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2032 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2033 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2034
2035 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2036 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2037 temp = (card->info.cula << 8) + card->info.unit_addr2;
2038 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2039 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2040 qeth_ulp_setup_cb, NULL);
2041 return rc;
2042}
2043
2044static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2045{
2046 int i, j;
2047
d11ba0c4 2048 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
4a71df50
FB		 2049
2050 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2051 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2052 return 0;
2053
2054 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
508b3c4f 2055 GFP_KERNEL);
4a71df50
FB		 2056 if (!card->qdio.in_q)
2057 goto out_nomem;
d11ba0c4
PT		 2058 QETH_DBF_TEXT(SETUP, 2, "inq");
2059 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
4a71df50
FB		 2060 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2061 /* give inbound qeth_qdio_buffers their qdio_buffers */
2062 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2063 card->qdio.in_q->bufs[i].buffer =
2064 &card->qdio.in_q->qdio_bufs[i];
2065 /* inbound buffer pool */
2066 if (qeth_alloc_buffer_pool(card))
2067 goto out_freeinq;
2068 /* outbound */
2069 card->qdio.out_qs =
2070 kmalloc(card->qdio.no_out_queues *
2071 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2072 if (!card->qdio.out_qs)
2073 goto out_freepool;
2074 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2075 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
508b3c4f 2076 GFP_KERNEL);
4a71df50
FB		 2077 if (!card->qdio.out_qs[i])
2078 goto out_freeoutq;
d11ba0c4
PT		 2079 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2080 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
4a71df50
FB		 2081 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2082 card->qdio.out_qs[i]->queue_no = i;
2083 /* give outbound qeth_qdio_buffers their qdio_buffers */
2084 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2085 card->qdio.out_qs[i]->bufs[j].buffer =
2086 &card->qdio.out_qs[i]->qdio_bufs[j];
2087 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2088 skb_list);
2089 lockdep_set_class(
2090 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2091 &qdio_out_skb_queue_key);
2092 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2093 }
2094 }
2095 return 0;
2096
2097out_freeoutq:
2098 while (i > 0)
2099 kfree(card->qdio.out_qs[--i]);
2100 kfree(card->qdio.out_qs);
2101 card->qdio.out_qs = NULL;
2102out_freepool:
2103 qeth_free_buffer_pool(card);
2104out_freeinq:
2105 kfree(card->qdio.in_q);
2106 card->qdio.in_q = NULL;
2107out_nomem:
2108 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2109 return -ENOMEM;
2110}
2111
2112static void qeth_create_qib_param_field(struct qeth_card *card,
2113 char *param_field)
2114{
2115
2116 param_field[0] = _ascebc['P'];
2117 param_field[1] = _ascebc['C'];
2118 param_field[2] = _ascebc['I'];
2119 param_field[3] = _ascebc['T'];
2120 *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
2121 *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
2122 *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
2123}
2124
2125static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2126 char *param_field)
2127{
2128 param_field[16] = _ascebc['B'];
2129 param_field[17] = _ascebc['L'];
2130 param_field[18] = _ascebc['K'];
2131 param_field[19] = _ascebc['T'];
2132 *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
2133 *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
2134 *((unsigned int *) (&param_field[28])) =
2135 card->info.blkt.inter_packet_jumbo;
2136}
2137
2138static int qeth_qdio_activate(struct qeth_card *card)
2139{
d11ba0c4 2140 QETH_DBF_TEXT(SETUP, 3, "qdioact");
779e6e1c 2141 return qdio_activate(CARD_DDEV(card));
4a71df50
FB		 2142}
2143
2144static int qeth_dm_act(struct qeth_card *card)
2145{
2146 int rc;
2147 struct qeth_cmd_buffer *iob;
2148
d11ba0c4 2149 QETH_DBF_TEXT(SETUP, 2, "dmact");
4a71df50
FB		 2150
2151 iob = qeth_wait_for_buffer(&card->write);
2152 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2153
2154 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2155 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2156 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2157 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2158 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2159 return rc;
2160}
2161
2162static int qeth_mpc_initialize(struct qeth_card *card)
2163{
2164 int rc;
2165
d11ba0c4 2166 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
4a71df50
FB		 2167
2168 rc = qeth_issue_next_read(card);
2169 if (rc) {
d11ba0c4 2170 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2171 return rc;
2172 }
2173 rc = qeth_cm_enable(card);
2174 if (rc) {
d11ba0c4 2175 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 2176 goto out_qdio;
2177 }
2178 rc = qeth_cm_setup(card);
2179 if (rc) {
d11ba0c4 2180 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 2181 goto out_qdio;
2182 }
2183 rc = qeth_ulp_enable(card);
2184 if (rc) {
d11ba0c4 2185 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 2186 goto out_qdio;
2187 }
2188 rc = qeth_ulp_setup(card);
2189 if (rc) {
d11ba0c4 2190 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2191 goto out_qdio;
2192 }
2193 rc = qeth_alloc_qdio_buffers(card);
2194 if (rc) {
d11ba0c4 2195 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 2196 goto out_qdio;
2197 }
2198 rc = qeth_qdio_establish(card);
2199 if (rc) {
d11ba0c4 2200 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4a71df50
FB		 2201 qeth_free_qdio_buffers(card);
2202 goto out_qdio;
2203 }
2204 rc = qeth_qdio_activate(card);
2205 if (rc) {
d11ba0c4 2206 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
4a71df50
FB		 2207 goto out_qdio;
2208 }
2209 rc = qeth_dm_act(card);
2210 if (rc) {
d11ba0c4 2211 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
4a71df50
FB		 2212 goto out_qdio;
2213 }
2214
2215 return 0;
2216out_qdio:
2217 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2218 return rc;
2219}
2220
2221static void qeth_print_status_with_portname(struct qeth_card *card)
2222{
2223 char dbf_text[15];
2224 int i;
2225
2226 sprintf(dbf_text, "%s", card->info.portname + 1);
2227 for (i = 0; i < 8; i++)
2228 dbf_text[i] =
2229 (char) _ebcasc[(__u8) dbf_text[i]];
2230 dbf_text[8] = 0;
74eacdb9 2231 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
4a71df50 2232 "with link type %s (portname: %s)\n",
4a71df50
FB		 2233 qeth_get_cardname(card),
2234 (card->info.mcl_level[0]) ? " (level: " : "",
2235 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2236 (card->info.mcl_level[0]) ? ")" : "",
2237 qeth_get_cardname_short(card),
2238 dbf_text);
2239
2240}
2241
2242static void qeth_print_status_no_portname(struct qeth_card *card)
2243{
2244 if (card->info.portname[0])
74eacdb9 2245 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50
FB		 2246 "card%s%s%s\nwith link type %s "
2247 "(no portname needed by interface).\n",
4a71df50
FB		 2248 qeth_get_cardname(card),
2249 (card->info.mcl_level[0]) ? " (level: " : "",
2250 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2251 (card->info.mcl_level[0]) ? ")" : "",
2252 qeth_get_cardname_short(card));
2253 else
74eacdb9 2254 dev_info(&card->gdev->dev, "Device is a%s "
4a71df50 2255 "card%s%s%s\nwith link type %s.\n",
4a71df50
FB		 2256 qeth_get_cardname(card),
2257 (card->info.mcl_level[0]) ? " (level: " : "",
2258 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2259 (card->info.mcl_level[0]) ? ")" : "",
2260 qeth_get_cardname_short(card));
2261}
2262
2263void qeth_print_status_message(struct qeth_card *card)
2264{
2265 switch (card->info.type) {
2266 case QETH_CARD_TYPE_OSAE:
2267 /* VM will use a non-zero first character
2268 * to indicate a HiperSockets like reporting
2269 * of the level OSA sets the first character to zero
2270 * */
2271 if (!card->info.mcl_level[0]) {
2272 sprintf(card->info.mcl_level, "%02x%02x",
2273 card->info.mcl_level[2],
2274 card->info.mcl_level[3]);
2275
2276 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2277 break;
2278 }
2279 /* fallthrough */
2280 case QETH_CARD_TYPE_IQD:
906f1f07
KDW		 2281 if ((card->info.guestlan) ||
2282 (card->info.mcl_level[0] & 0x80)) {
4a71df50
FB		 2283 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2284 card->info.mcl_level[0]];
2285 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2286 card->info.mcl_level[1]];
2287 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2288 card->info.mcl_level[2]];
2289 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2290 card->info.mcl_level[3]];
2291 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2292 }
2293 break;
2294 default:
2295 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2296 }
2297 if (card->info.portname_required)
2298 qeth_print_status_with_portname(card);
2299 else
2300 qeth_print_status_no_portname(card);
2301}
2302EXPORT_SYMBOL_GPL(qeth_print_status_message);
2303
4a71df50
FB		 2304static void qeth_initialize_working_pool_list(struct qeth_card *card)
2305{
2306 struct qeth_buffer_pool_entry *entry;
2307
d11ba0c4 2308 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
4a71df50
FB		 2309
2310 list_for_each_entry(entry,
2311 &card->qdio.init_pool.entry_list, init_list) {
2312 qeth_put_buffer_pool_entry(card, entry);
2313 }
2314}
2315
2316static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2317 struct qeth_card *card)
2318{
2319 struct list_head *plh;
2320 struct qeth_buffer_pool_entry *entry;
2321 int i, free;
2322 struct page *page;
2323
2324 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2325 return NULL;
2326
2327 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2328 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2329 free = 1;
2330 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2331 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2332 free = 0;
2333 break;
2334 }
2335 }
2336 if (free) {
2337 list_del_init(&entry->list);
2338 return entry;
2339 }
2340 }
2341
2342 /* no free buffer in pool so take first one and swap pages */
2343 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2344 struct qeth_buffer_pool_entry, list);
2345 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2346 if (page_count(virt_to_page(entry->elements[i])) > 1) {
508b3c4f 2347 page = alloc_page(GFP_ATOMIC);
4a71df50
FB		 2348 if (!page) {
2349 return NULL;
2350 } else {
2351 free_page((unsigned long)entry->elements[i]);
2352 entry->elements[i] = page_address(page);
2353 if (card->options.performance_stats)
2354 card->perf_stats.sg_alloc_page_rx++;
2355 }
2356 }
2357 }
2358 list_del_init(&entry->list);
2359 return entry;
2360}
2361
2362static int qeth_init_input_buffer(struct qeth_card *card,
2363 struct qeth_qdio_buffer *buf)
2364{
2365 struct qeth_buffer_pool_entry *pool_entry;
2366 int i;
2367
2368 pool_entry = qeth_find_free_buffer_pool_entry(card);
2369 if (!pool_entry)
2370 return 1;
2371
2372 /*
2373 * since the buffer is accessed only from the input_tasklet
2374 * there shouldn't be a need to synchronize; also, since we use
2375 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2376 * buffers
2377 */
4a71df50
FB		 2378
2379 buf->pool_entry = pool_entry;
2380 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2381 buf->buffer->element[i].length = PAGE_SIZE;
2382 buf->buffer->element[i].addr = pool_entry->elements[i];
2383 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2384 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2385 else
2386 buf->buffer->element[i].flags = 0;
2387 }
2388 return 0;
2389}
2390
2391int qeth_init_qdio_queues(struct qeth_card *card)
2392{
2393 int i, j;
2394 int rc;
2395
d11ba0c4 2396 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
4a71df50
FB		 2397
2398 /* inbound queue */
2399 memset(card->qdio.in_q->qdio_bufs, 0,
2400 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2401 qeth_initialize_working_pool_list(card);
2402 /*give only as many buffers to hardware as we have buffer pool entries*/
2403 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2404 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2405 card->qdio.in_q->next_buf_to_init =
2406 card->qdio.in_buf_pool.buf_count - 1;
2407 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
779e6e1c 2408 card->qdio.in_buf_pool.buf_count - 1);
4a71df50 2409 if (rc) {
d11ba0c4 2410 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 2411 return rc;
2412 }
4a71df50
FB		 2413 /* outbound queue */
2414 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2415 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2416 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2417 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2418 qeth_clear_output_buffer(card->qdio.out_qs[i],
2419 &card->qdio.out_qs[i]->bufs[j]);
2420 }
2421 card->qdio.out_qs[i]->card = card;
2422 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2423 card->qdio.out_qs[i]->do_pack = 0;
2424 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2425 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2426 atomic_set(&card->qdio.out_qs[i]->state,
2427 QETH_OUT_Q_UNLOCKED);
2428 }
2429 return 0;
2430}
2431EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2432
2433static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2434{
2435 switch (link_type) {
2436 case QETH_LINK_TYPE_HSTR:
2437 return 2;
2438 default:
2439 return 1;
2440 }
2441}
2442
2443static void qeth_fill_ipacmd_header(struct qeth_card *card,
2444 struct qeth_ipa_cmd *cmd, __u8 command,
2445 enum qeth_prot_versions prot)
2446{
2447 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2448 cmd->hdr.command = command;
2449 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2450 cmd->hdr.seqno = card->seqno.ipa;
2451 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2452 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2453 if (card->options.layer2)
2454 cmd->hdr.prim_version_no = 2;
2455 else
2456 cmd->hdr.prim_version_no = 1;
2457 cmd->hdr.param_count = 1;
2458 cmd->hdr.prot_version = prot;
2459 cmd->hdr.ipa_supported = 0;
2460 cmd->hdr.ipa_enabled = 0;
2461}
2462
2463struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2464 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2465{
2466 struct qeth_cmd_buffer *iob;
2467 struct qeth_ipa_cmd *cmd;
2468
2469 iob = qeth_wait_for_buffer(&card->write);
2470 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2471 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2472
2473 return iob;
2474}
2475EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2476
2477void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2478 char prot_type)
2479{
2480 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2481 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2482 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2483 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2484}
2485EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2486
2487int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2488 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2489 unsigned long),
2490 void *reply_param)
2491{
2492 int rc;
2493 char prot_type;
4a71df50 2494
d11ba0c4 2495 QETH_DBF_TEXT(TRACE, 4, "sendipa");
4a71df50
FB		 2496
2497 if (card->options.layer2)
2498 if (card->info.type == QETH_CARD_TYPE_OSN)
2499 prot_type = QETH_PROT_OSN2;
2500 else
2501 prot_type = QETH_PROT_LAYER2;
2502 else
2503 prot_type = QETH_PROT_TCPIP;
2504 qeth_prepare_ipa_cmd(card, iob, prot_type);
d11ba0c4
PT		 2505 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2506 iob, reply_cb, reply_param);
4a71df50
FB		 2507 return rc;
2508}
2509EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2510
2511static int qeth_send_startstoplan(struct qeth_card *card,
2512 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2513{
2514 int rc;
2515 struct qeth_cmd_buffer *iob;
2516
2517 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2518 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2519
2520 return rc;
2521}
2522
2523int qeth_send_startlan(struct qeth_card *card)
2524{
2525 int rc;
2526
d11ba0c4 2527 QETH_DBF_TEXT(SETUP, 2, "strtlan");
4a71df50
FB		 2528
2529 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2530 return rc;
2531}
2532EXPORT_SYMBOL_GPL(qeth_send_startlan);
2533
2534int qeth_send_stoplan(struct qeth_card *card)
2535{
2536 int rc = 0;
2537
2538 /*
2539 * TODO: according to the IPA format document page 14,
2540 * TCP/IP (we!) never issue a STOPLAN
2541 * is this right ?!?
2542 */
d11ba0c4 2543 QETH_DBF_TEXT(SETUP, 2, "stoplan");
4a71df50
FB		 2544
2545 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2546 return rc;
2547}
2548EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2549
2550int qeth_default_setadapterparms_cb(struct qeth_card *card,
2551 struct qeth_reply *reply, unsigned long data)
2552{
2553 struct qeth_ipa_cmd *cmd;
2554
d11ba0c4 2555 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
4a71df50
FB		 2556
2557 cmd = (struct qeth_ipa_cmd *) data;
2558 if (cmd->hdr.return_code == 0)
2559 cmd->hdr.return_code =
2560 cmd->data.setadapterparms.hdr.return_code;
2561 return 0;
2562}
2563EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2564
2565static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2566 struct qeth_reply *reply, unsigned long data)
2567{
2568 struct qeth_ipa_cmd *cmd;
2569
d11ba0c4 2570 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
4a71df50
FB		 2571
2572 cmd = (struct qeth_ipa_cmd *) data;
2573 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2574 card->info.link_type =
2575 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2576 card->options.adp.supported_funcs =
2577 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2578 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2579}
2580
2581struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2582 __u32 command, __u32 cmdlen)
2583{
2584 struct qeth_cmd_buffer *iob;
2585 struct qeth_ipa_cmd *cmd;
2586
2587 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2588 QETH_PROT_IPV4);
2589 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2590 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2591 cmd->data.setadapterparms.hdr.command_code = command;
2592 cmd->data.setadapterparms.hdr.used_total = 1;
2593 cmd->data.setadapterparms.hdr.seq_no = 1;
2594
2595 return iob;
2596}
2597EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2598
2599int qeth_query_setadapterparms(struct qeth_card *card)
2600{
2601 int rc;
2602 struct qeth_cmd_buffer *iob;
2603
d11ba0c4 2604 QETH_DBF_TEXT(TRACE, 3, "queryadp");
4a71df50
FB		 2605 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2606 sizeof(struct qeth_ipacmd_setadpparms));
2607 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2608 return rc;
2609}
2610EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2611
2612int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
779e6e1c 2613 const char *dbftext)
4a71df50 2614{
779e6e1c 2615 if (qdio_error) {
d11ba0c4
PT		 2616 QETH_DBF_TEXT(TRACE, 2, dbftext);
2617 QETH_DBF_TEXT(QERR, 2, dbftext);
2618 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
4a71df50 2619 buf->element[15].flags & 0xff);
d11ba0c4 2620 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
4a71df50 2621 buf->element[14].flags & 0xff);
d11ba0c4 2622 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
4a71df50
FB		 2623 return 1;
2624 }
2625 return 0;
2626}
2627EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2628
2629void qeth_queue_input_buffer(struct qeth_card *card, int index)
2630{
2631 struct qeth_qdio_q *queue = card->qdio.in_q;
2632 int count;
2633 int i;
2634 int rc;
2635 int newcount = 0;
2636
4a71df50
FB		 2637 count = (index < queue->next_buf_to_init)?
2638 card->qdio.in_buf_pool.buf_count -
2639 (queue->next_buf_to_init - index) :
2640 card->qdio.in_buf_pool.buf_count -
2641 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2642 /* only requeue at a certain threshold to avoid SIGAs */
2643 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2644 for (i = queue->next_buf_to_init;
2645 i < queue->next_buf_to_init + count; ++i) {
2646 if (qeth_init_input_buffer(card,
2647 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2648 break;
2649 } else {
2650 newcount++;
2651 }
2652 }
2653
2654 if (newcount < count) {
2655 /* we are in memory shortage so we switch back to
2656 traditional skb allocation and drop packages */
4a71df50
FB		 2657 atomic_set(&card->force_alloc_skb, 3);
2658 count = newcount;
2659 } else {
4a71df50
FB		 2660 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2661 }
2662
2663 /*
2664 * according to old code it should be avoided to requeue all
2665 * 128 buffers in order to benefit from PCI avoidance.
2666 * this function keeps at least one buffer (the buffer at
2667 * 'index') un-requeued -> this buffer is the first buffer that
2668 * will be requeued the next time
2669 */
2670 if (card->options.performance_stats) {
2671 card->perf_stats.inbound_do_qdio_cnt++;
2672 card->perf_stats.inbound_do_qdio_start_time =
2673 qeth_get_micros();
2674 }
779e6e1c
JG		 2675 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2676 queue->next_buf_to_init, count);
4a71df50
FB		 2677 if (card->options.performance_stats)
2678 card->perf_stats.inbound_do_qdio_time +=
2679 qeth_get_micros() -
2680 card->perf_stats.inbound_do_qdio_start_time;
2681 if (rc) {
74eacdb9
FB		 2682 dev_warn(&card->gdev->dev,
2683 "QDIO reported an error, rc=%i\n", rc);
d11ba0c4
PT		 2684 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2685 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2686 }
2687 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2688 QDIO_MAX_BUFFERS_PER_Q;
2689 }
2690}
2691EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2692
2693static int qeth_handle_send_error(struct qeth_card *card,
779e6e1c 2694 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
4a71df50
FB		 2695{
2696 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
779e6e1c 2697 int cc = qdio_err & 3;
4a71df50 2698
d11ba0c4 2699 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
779e6e1c 2700 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
4a71df50
FB		 2701 switch (cc) {
2702 case 0:
2703 if (qdio_err) {
d11ba0c4
PT		 2704 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2705 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2706 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
4a71df50
FB		 2707 (u16)qdio_err, (u8)sbalf15);
2708 return QETH_SEND_ERROR_LINK_FAILURE;
2709 }
2710 return QETH_SEND_ERROR_NONE;
2711 case 2:
779e6e1c 2712 if (qdio_err & QDIO_ERROR_SIGA_BUSY) {
d11ba0c4
PT		 2713 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2714 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2715 return QETH_SEND_ERROR_KICK_IT;
2716 }
2717 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2718 return QETH_SEND_ERROR_RETRY;
2719 return QETH_SEND_ERROR_LINK_FAILURE;
2720 /* look at qdio_error and sbalf 15 */
2721 case 1:
d11ba0c4
PT		 2722 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2723 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2724 return QETH_SEND_ERROR_LINK_FAILURE;
2725 case 3:
2726 default:
d11ba0c4
PT		 2727 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2728 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
4a71df50
FB		 2729 return QETH_SEND_ERROR_KICK_IT;
2730 }
2731}
2732
2733/*
2734 * Switched to packing state if the number of used buffers on a queue
2735 * reaches a certain limit.
2736 */
2737static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2738{
2739 if (!queue->do_pack) {
2740 if (atomic_read(&queue->used_buffers)
2741 >= QETH_HIGH_WATERMARK_PACK){
2742 /* switch non-PACKING -> PACKING */
d11ba0c4 2743 QETH_DBF_TEXT(TRACE, 6, "np->pack");
4a71df50
FB		 2744 if (queue->card->options.performance_stats)
2745 queue->card->perf_stats.sc_dp_p++;
2746 queue->do_pack = 1;
2747 }
2748 }
2749}
2750
2751/*
2752 * Switches from packing to non-packing mode. If there is a packing
2753 * buffer on the queue this buffer will be prepared to be flushed.
2754 * In that case 1 is returned to inform the caller. If no buffer
2755 * has to be flushed, zero is returned.
2756 */
2757static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2758{
2759 struct qeth_qdio_out_buffer *buffer;
2760 int flush_count = 0;
2761
2762 if (queue->do_pack) {
2763 if (atomic_read(&queue->used_buffers)
2764 <= QETH_LOW_WATERMARK_PACK) {
2765 /* switch PACKING -> non-PACKING */
d11ba0c4 2766 QETH_DBF_TEXT(TRACE, 6, "pack->np");
4a71df50
FB		 2767 if (queue->card->options.performance_stats)
2768 queue->card->perf_stats.sc_p_dp++;
2769 queue->do_pack = 0;
2770 /* flush packing buffers */
2771 buffer = &queue->bufs[queue->next_buf_to_fill];
2772 if ((atomic_read(&buffer->state) ==
2773 QETH_QDIO_BUF_EMPTY) &&
2774 (buffer->next_element_to_fill > 0)) {
2775 atomic_set(&buffer->state,
2776 QETH_QDIO_BUF_PRIMED);
2777 flush_count++;
2778 queue->next_buf_to_fill =
2779 (queue->next_buf_to_fill + 1) %
2780 QDIO_MAX_BUFFERS_PER_Q;
2781 }
2782 }
2783 }
2784 return flush_count;
2785}
2786
2787/*
2788 * Called to flush a packing buffer if no more pci flags are on the queue.
2789 * Checks if there is a packing buffer and prepares it to be flushed.
2790 * In that case returns 1, otherwise zero.
2791 */
2792static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2793{
2794 struct qeth_qdio_out_buffer *buffer;
2795
2796 buffer = &queue->bufs[queue->next_buf_to_fill];
2797 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2798 (buffer->next_element_to_fill > 0)) {
2799 /* it's a packing buffer */
2800 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2801 queue->next_buf_to_fill =
2802 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2803 return 1;
2804 }
2805 return 0;
2806}
2807
779e6e1c
JG		 2808static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2809 int count)
4a71df50
FB		 2810{
2811 struct qeth_qdio_out_buffer *buf;
2812 int rc;
2813 int i;
2814 unsigned int qdio_flags;
2815
4a71df50
FB		 2816 for (i = index; i < index + count; ++i) {
2817 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2818 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2819 SBAL_FLAGS_LAST_ENTRY;
2820
2821 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2822 continue;
2823
2824 if (!queue->do_pack) {
2825 if ((atomic_read(&queue->used_buffers) >=
2826 (QETH_HIGH_WATERMARK_PACK -
2827 QETH_WATERMARK_PACK_FUZZ)) &&
2828 !atomic_read(&queue->set_pci_flags_count)) {
2829 /* it's likely that we'll go to packing
2830 * mode soon */
2831 atomic_inc(&queue->set_pci_flags_count);
2832 buf->buffer->element[0].flags |= 0x40;
2833 }
2834 } else {
2835 if (!atomic_read(&queue->set_pci_flags_count)) {
2836 /*
2837 * there's no outstanding PCI any more, so we
2838 * have to request a PCI to be sure the the PCI
2839 * will wake at some time in the future then we
2840 * can flush packed buffers that might still be
2841 * hanging around, which can happen if no
2842 * further send was requested by the stack
2843 */
2844 atomic_inc(&queue->set_pci_flags_count);
2845 buf->buffer->element[0].flags |= 0x40;
2846 }
2847 }
2848 }
2849
2850 queue->card->dev->trans_start = jiffies;
2851 if (queue->card->options.performance_stats) {
2852 queue->card->perf_stats.outbound_do_qdio_cnt++;
2853 queue->card->perf_stats.outbound_do_qdio_start_time =
2854 qeth_get_micros();
2855 }
2856 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
4a71df50
FB		 2857 if (atomic_read(&queue->set_pci_flags_count))
2858 qdio_flags |= QDIO_FLAG_PCI_OUT;
2859 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
779e6e1c 2860 queue->queue_no, index, count);
4a71df50
FB		 2861 if (queue->card->options.performance_stats)
2862 queue->card->perf_stats.outbound_do_qdio_time +=
2863 qeth_get_micros() -
2864 queue->card->perf_stats.outbound_do_qdio_start_time;
2865 if (rc) {
d11ba0c4
PT		 2866 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2867 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2868 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
4a71df50
FB		 2869 queue->card->stats.tx_errors += count;
2870 /* this must not happen under normal circumstances. if it
2871 * happens something is really wrong -> recover */
2872 qeth_schedule_recovery(queue->card);
2873 return;
2874 }
2875 atomic_add(count, &queue->used_buffers);
2876 if (queue->card->options.performance_stats)
2877 queue->card->perf_stats.bufs_sent += count;
2878}
2879
2880static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2881{
2882 int index;
2883 int flush_cnt = 0;
2884 int q_was_packing = 0;
2885
2886 /*
2887 * check if weed have to switch to non-packing mode or if
2888 * we have to get a pci flag out on the queue
2889 */
2890 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2891 !atomic_read(&queue->set_pci_flags_count)) {
2892 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2893 QETH_OUT_Q_UNLOCKED) {
2894 /*
2895 * If we get in here, there was no action in
2896 * do_send_packet. So, we check if there is a
2897 * packing buffer to be flushed here.
2898 */
2899 netif_stop_queue(queue->card->dev);
2900 index = queue->next_buf_to_fill;
2901 q_was_packing = queue->do_pack;
2902 /* queue->do_pack may change */
2903 barrier();
2904 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2905 if (!flush_cnt &&
2906 !atomic_read(&queue->set_pci_flags_count))
2907 flush_cnt +=
2908 qeth_flush_buffers_on_no_pci(queue);
2909 if (queue->card->options.performance_stats &&
2910 q_was_packing)
2911 queue->card->perf_stats.bufs_sent_pack +=
2912 flush_cnt;
2913 if (flush_cnt)
779e6e1c 2914 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 2915 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2916 }
2917 }
2918}
2919
779e6e1c
JG		 2920void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2921 unsigned int qdio_error, int __queue, int first_element,
2922 int count, unsigned long card_ptr)
4a71df50
FB		 2923{
2924 struct qeth_card *card = (struct qeth_card *) card_ptr;
2925 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2926 struct qeth_qdio_out_buffer *buffer;
2927 int i;
2928
d11ba0c4 2929 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
779e6e1c
JG		 2930 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2931 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2932 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2933 netif_stop_queue(card->dev);
2934 qeth_schedule_recovery(card);
2935 return;
4a71df50
FB		 2936 }
2937 if (card->options.performance_stats) {
2938 card->perf_stats.outbound_handler_cnt++;
2939 card->perf_stats.outbound_handler_start_time =
2940 qeth_get_micros();
2941 }
2942 for (i = first_element; i < (first_element + count); ++i) {
2943 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2944 /*we only handle the KICK_IT error by doing a recovery */
779e6e1c 2945 if (qeth_handle_send_error(card, buffer, qdio_error)
4a71df50
FB		 2946 == QETH_SEND_ERROR_KICK_IT){
2947 netif_stop_queue(card->dev);
2948 qeth_schedule_recovery(card);
2949 return;
2950 }
2951 qeth_clear_output_buffer(queue, buffer);
2952 }
2953 atomic_sub(count, &queue->used_buffers);
2954 /* check if we need to do something on this outbound queue */
2955 if (card->info.type != QETH_CARD_TYPE_IQD)
2956 qeth_check_outbound_queue(queue);
2957
2958 netif_wake_queue(queue->card->dev);
2959 if (card->options.performance_stats)
2960 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2961 card->perf_stats.outbound_handler_start_time;
2962}
2963EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2964
2965int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2966{
2967 int cast_type = RTN_UNSPEC;
2968
2969 if (card->info.type == QETH_CARD_TYPE_OSN)
2970 return cast_type;
2971
2972 if (skb->dst && skb->dst->neighbour) {
2973 cast_type = skb->dst->neighbour->type;
2974 if ((cast_type == RTN_BROADCAST) ||
2975 (cast_type == RTN_MULTICAST) ||
2976 (cast_type == RTN_ANYCAST))
2977 return cast_type;
2978 else
2979 return RTN_UNSPEC;
2980 }
2981 /* try something else */
2982 if (skb->protocol == ETH_P_IPV6)
2983 return (skb_network_header(skb)[24] == 0xff) ?
2984 RTN_MULTICAST : 0;
2985 else if (skb->protocol == ETH_P_IP)
2986 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2987 RTN_MULTICAST : 0;
2988 /* ... */
2989 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2990 return RTN_BROADCAST;
2991 else {
2992 u16 hdr_mac;
2993
2994 hdr_mac = *((u16 *)skb->data);
2995 /* tr multicast? */
2996 switch (card->info.link_type) {
2997 case QETH_LINK_TYPE_HSTR:
2998 case QETH_LINK_TYPE_LANE_TR:
2999 if ((hdr_mac == QETH_TR_MAC_NC) ||
3000 (hdr_mac == QETH_TR_MAC_C))
3001 return RTN_MULTICAST;
3002 break;
3003 /* eth or so multicast? */
3004 default:
3005 if ((hdr_mac == QETH_ETH_MAC_V4) ||
3006 (hdr_mac == QETH_ETH_MAC_V6))
3007 return RTN_MULTICAST;
3008 }
3009 }
3010 return cast_type;
3011}
3012EXPORT_SYMBOL_GPL(qeth_get_cast_type);
3013
3014int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3015 int ipv, int cast_type)
3016{
3017 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
3018 return card->qdio.default_out_queue;
3019 switch (card->qdio.no_out_queues) {
3020 case 4:
3021 if (cast_type && card->info.is_multicast_different)
3022 return card->info.is_multicast_different &
3023 (card->qdio.no_out_queues - 1);
3024 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3025 const u8 tos = ip_hdr(skb)->tos;
3026
3027 if (card->qdio.do_prio_queueing ==
3028 QETH_PRIO_Q_ING_TOS) {
3029 if (tos & IP_TOS_NOTIMPORTANT)
3030 return 3;
3031 if (tos & IP_TOS_HIGHRELIABILITY)
3032 return 2;
3033 if (tos & IP_TOS_HIGHTHROUGHPUT)
3034 return 1;
3035 if (tos & IP_TOS_LOWDELAY)
3036 return 0;
3037 }
3038 if (card->qdio.do_prio_queueing ==
3039 QETH_PRIO_Q_ING_PREC)
3040 return 3 - (tos >> 6);
3041 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3042 /* TODO: IPv6!!! */
3043 }
3044 return card->qdio.default_out_queue;
3045 case 1: /* fallthrough for single-out-queue 1920-device */
3046 default:
3047 return card->qdio.default_out_queue;
3048 }
3049}
3050EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3051
4a71df50
FB		 3052int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3053 struct sk_buff *skb, int elems)
3054{
3055 int elements_needed = 0;
3056
3057 if (skb_shinfo(skb)->nr_frags > 0)
3058 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3059 if (elements_needed == 0)
683d718a
FB		 3060 elements_needed = 1 + (((((unsigned long) skb->data) %
3061 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
4a71df50 3062 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
14cc21b6 3063 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
4a71df50
FB		 3064 "(Number=%d / Length=%d). Discarded.\n",
3065 (elements_needed+elems), skb->len);
3066 return 0;
3067 }
3068 return elements_needed;
3069}
3070EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3071
f90b744e 3072static inline void __qeth_fill_buffer(struct sk_buff *skb,
683d718a
FB		 3073 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3074 int offset)
4a71df50 3075{
e1f03ae8 3076 int length = skb->len;
4a71df50
FB		 3077 int length_here;
3078 int element;
3079 char *data;
3080 int first_lap ;
3081
3082 element = *next_element_to_fill;
3083 data = skb->data;
3084 first_lap = (is_tso == 0 ? 1 : 0);
3085
683d718a
FB		 3086 if (offset >= 0) {
3087 data = skb->data + offset;
e1f03ae8 3088 length -= offset;
683d718a
FB		 3089 first_lap = 0;
3090 }
3091
4a71df50
FB		 3092 while (length > 0) {
3093 /* length_here is the remaining amount of data in this page */
3094 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3095 if (length < length_here)
3096 length_here = length;
3097
3098 buffer->element[element].addr = data;
3099 buffer->element[element].length = length_here;
3100 length -= length_here;
3101 if (!length) {
3102 if (first_lap)
3103 buffer->element[element].flags = 0;
3104 else
3105 buffer->element[element].flags =
3106 SBAL_FLAGS_LAST_FRAG;
3107 } else {
3108 if (first_lap)
3109 buffer->element[element].flags =
3110 SBAL_FLAGS_FIRST_FRAG;
3111 else
3112 buffer->element[element].flags =
3113 SBAL_FLAGS_MIDDLE_FRAG;
3114 }
3115 data += length_here;
3116 element++;
3117 first_lap = 0;
3118 }
3119 *next_element_to_fill = element;
3120}
3121
f90b744e 3122static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
683d718a
FB		 3123 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3124 struct qeth_hdr *hdr, int offset, int hd_len)
4a71df50
FB		 3125{
3126 struct qdio_buffer *buffer;
4a71df50
FB		 3127 int flush_cnt = 0, hdr_len, large_send = 0;
3128
4a71df50
FB		 3129 buffer = buf->buffer;
3130 atomic_inc(&skb->users);
3131 skb_queue_tail(&buf->skb_list, skb);
3132
4a71df50 3133 /*check first on TSO ....*/
683d718a 3134 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4a71df50
FB		 3135 int element = buf->next_element_to_fill;
3136
683d718a
FB		 3137 hdr_len = sizeof(struct qeth_hdr_tso) +
3138 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4a71df50
FB		 3139 /*fill first buffer entry only with header information */
3140 buffer->element[element].addr = skb->data;
3141 buffer->element[element].length = hdr_len;
3142 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3143 buf->next_element_to_fill++;
3144 skb->data += hdr_len;
3145 skb->len -= hdr_len;
3146 large_send = 1;
3147 }
683d718a
FB		 3148
3149 if (offset >= 0) {
3150 int element = buf->next_element_to_fill;
3151 buffer->element[element].addr = hdr;
3152 buffer->element[element].length = sizeof(struct qeth_hdr) +
3153 hd_len;
3154 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3155 buf->is_header[element] = 1;
3156 buf->next_element_to_fill++;
3157 }
3158
4a71df50
FB		 3159 if (skb_shinfo(skb)->nr_frags == 0)
3160 __qeth_fill_buffer(skb, buffer, large_send,
683d718a 3161 (int *)&buf->next_element_to_fill, offset);
4a71df50
FB		 3162 else
3163 __qeth_fill_buffer_frag(skb, buffer, large_send,
3164 (int *)&buf->next_element_to_fill);
3165
3166 if (!queue->do_pack) {
d11ba0c4 3167 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
4a71df50
FB		 3168 /* set state to PRIMED -> will be flushed */
3169 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3170 flush_cnt = 1;
3171 } else {
d11ba0c4 3172 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
4a71df50
FB		 3173 if (queue->card->options.performance_stats)
3174 queue->card->perf_stats.skbs_sent_pack++;
3175 if (buf->next_element_to_fill >=
3176 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3177 /*
3178 * packed buffer if full -> set state PRIMED
3179 * -> will be flushed
3180 */
3181 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3182 flush_cnt = 1;
3183 }
3184 }
3185 return flush_cnt;
3186}
3187
3188int qeth_do_send_packet_fast(struct qeth_card *card,
3189 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3190 struct qeth_hdr *hdr, int elements_needed,
683d718a 3191 struct qeth_eddp_context *ctx, int offset, int hd_len)
4a71df50
FB		 3192{
3193 struct qeth_qdio_out_buffer *buffer;
3194 int buffers_needed = 0;
3195 int flush_cnt = 0;
3196 int index;
3197
4a71df50
FB		 3198 /* spin until we get the queue ... */
3199 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3200 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3201 /* ... now we've got the queue */
3202 index = queue->next_buf_to_fill;
3203 buffer = &queue->bufs[queue->next_buf_to_fill];
3204 /*
3205 * check if buffer is empty to make sure that we do not 'overtake'
3206 * ourselves and try to fill a buffer that is already primed
3207 */
3208 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3209 goto out;
3210 if (ctx == NULL)
3211 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3212 QDIO_MAX_BUFFERS_PER_Q;
3213 else {
3214 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3215 ctx);
3216 if (buffers_needed < 0)
3217 goto out;
3218 queue->next_buf_to_fill =
3219 (queue->next_buf_to_fill + buffers_needed) %
3220 QDIO_MAX_BUFFERS_PER_Q;
3221 }
3222 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3223 if (ctx == NULL) {
683d718a 3224 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
779e6e1c 3225 qeth_flush_buffers(queue, index, 1);
4a71df50
FB		 3226 } else {
3227 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3228 WARN_ON(buffers_needed != flush_cnt);
779e6e1c 3229 qeth_flush_buffers(queue, index, flush_cnt);
4a71df50
FB		 3230 }
3231 return 0;
3232out:
3233 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3234 return -EBUSY;
3235}
3236EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3237
3238int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3239 struct sk_buff *skb, struct qeth_hdr *hdr,
3240 int elements_needed, struct qeth_eddp_context *ctx)
3241{
3242 struct qeth_qdio_out_buffer *buffer;
3243 int start_index;
3244 int flush_count = 0;
3245 int do_pack = 0;
3246 int tmp;
3247 int rc = 0;
3248
4a71df50
FB		 3249 /* spin until we get the queue ... */
3250 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3251 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3252 start_index = queue->next_buf_to_fill;
3253 buffer = &queue->bufs[queue->next_buf_to_fill];
3254 /*
3255 * check if buffer is empty to make sure that we do not 'overtake'
3256 * ourselves and try to fill a buffer that is already primed
3257 */
3258 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3259 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3260 return -EBUSY;
3261 }
3262 /* check if we need to switch packing state of this queue */
3263 qeth_switch_to_packing_if_needed(queue);
3264 if (queue->do_pack) {
3265 do_pack = 1;
3266 if (ctx == NULL) {
3267 /* does packet fit in current buffer? */
3268 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3269 buffer->next_element_to_fill) < elements_needed) {
3270 /* ... no -> set state PRIMED */
3271 atomic_set(&buffer->state,
3272 QETH_QDIO_BUF_PRIMED);
3273 flush_count++;
3274 queue->next_buf_to_fill =
3275 (queue->next_buf_to_fill + 1) %
3276 QDIO_MAX_BUFFERS_PER_Q;
3277 buffer = &queue->bufs[queue->next_buf_to_fill];
3278 /* we did a step forward, so check buffer state
3279 * again */
3280 if (atomic_read(&buffer->state) !=
3281 QETH_QDIO_BUF_EMPTY){
779e6e1c
JG		 3282 qeth_flush_buffers(queue, start_index,
3283 flush_count);
4a71df50
FB		 3284 atomic_set(&queue->state,
3285 QETH_OUT_Q_UNLOCKED);
3286 return -EBUSY;
3287 }
3288 }
3289 } else {
3290 /* check if we have enough elements (including following
3291 * free buffers) to handle eddp context */
3292 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3293 < 0) {
4a71df50
FB		 3294 rc = -EBUSY;
3295 goto out;
3296 }
3297 }
3298 }
3299 if (ctx == NULL)
683d718a 3300 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4a71df50
FB		 3301 else {
3302 tmp = qeth_eddp_fill_buffer(queue, ctx,
3303 queue->next_buf_to_fill);
3304 if (tmp < 0) {
4a71df50
FB		 3305 rc = -EBUSY;
3306 goto out;
3307 }
3308 }
3309 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3310 QDIO_MAX_BUFFERS_PER_Q;
3311 flush_count += tmp;
3312out:
3313 if (flush_count)
779e6e1c 3314 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3315 else if (!atomic_read(&queue->set_pci_flags_count))
3316 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3317 /*
3318 * queue->state will go from LOCKED -> UNLOCKED or from
3319 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3320 * (switch packing state or flush buffer to get another pci flag out).
3321 * In that case we will enter this loop
3322 */
3323 while (atomic_dec_return(&queue->state)) {
3324 flush_count = 0;
3325 start_index = queue->next_buf_to_fill;
3326 /* check if we can go back to non-packing state */
3327 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3328 /*
3329 * check if we need to flush a packing buffer to get a pci
3330 * flag out on the queue
3331 */
3332 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3333 flush_count += qeth_flush_buffers_on_no_pci(queue);
3334 if (flush_count)
779e6e1c 3335 qeth_flush_buffers(queue, start_index, flush_count);
4a71df50
FB		 3336 }
3337 /* at this point the queue is UNLOCKED again */
3338 if (queue->card->options.performance_stats && do_pack)
3339 queue->card->perf_stats.bufs_sent_pack += flush_count;
3340
3341 return rc;
3342}
3343EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3344
3345static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3346 struct qeth_reply *reply, unsigned long data)
3347{
3348 struct qeth_ipa_cmd *cmd;
3349 struct qeth_ipacmd_setadpparms *setparms;
3350
d11ba0c4 3351 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
4a71df50
FB		 3352
3353 cmd = (struct qeth_ipa_cmd *) data;
3354 setparms = &(cmd->data.setadapterparms);
3355
3356 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3357 if (cmd->hdr.return_code) {
d11ba0c4 3358 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
4a71df50
FB		 3359 setparms->data.mode = SET_PROMISC_MODE_OFF;
3360 }
3361 card->info.promisc_mode = setparms->data.mode;
3362 return 0;
3363}
3364
3365void qeth_setadp_promisc_mode(struct qeth_card *card)
3366{
3367 enum qeth_ipa_promisc_modes mode;
3368 struct net_device *dev = card->dev;
3369 struct qeth_cmd_buffer *iob;
3370 struct qeth_ipa_cmd *cmd;
3371
d11ba0c4 3372 QETH_DBF_TEXT(TRACE, 4, "setprom");
4a71df50
FB		 3373
3374 if (((dev->flags & IFF_PROMISC) &&
3375 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3376 (!(dev->flags & IFF_PROMISC) &&
3377 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3378 return;
3379 mode = SET_PROMISC_MODE_OFF;
3380 if (dev->flags & IFF_PROMISC)
3381 mode = SET_PROMISC_MODE_ON;
d11ba0c4 3382 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
4a71df50
FB		 3383
3384 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3385 sizeof(struct qeth_ipacmd_setadpparms));
3386 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3387 cmd->data.setadapterparms.data.mode = mode;
3388 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3389}
3390EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3391
3392int qeth_change_mtu(struct net_device *dev, int new_mtu)
3393{
3394 struct qeth_card *card;
3395 char dbf_text[15];
3396
509e2562 3397 card = dev->ml_priv;
4a71df50 3398
d11ba0c4 3399 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
4a71df50 3400 sprintf(dbf_text, "%8x", new_mtu);
d11ba0c4 3401 QETH_DBF_TEXT(TRACE, 4, dbf_text);
4a71df50
FB		 3402
3403 if (new_mtu < 64)
3404 return -EINVAL;
3405 if (new_mtu > 65535)
3406 return -EINVAL;
3407 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3408 (!qeth_mtu_is_valid(card, new_mtu)))
3409 return -EINVAL;
3410 dev->mtu = new_mtu;
3411 return 0;
3412}
3413EXPORT_SYMBOL_GPL(qeth_change_mtu);
3414
3415struct net_device_stats *qeth_get_stats(struct net_device *dev)
3416{
3417 struct qeth_card *card;
3418
509e2562 3419 card = dev->ml_priv;
4a71df50 3420
d11ba0c4 3421 QETH_DBF_TEXT(TRACE, 5, "getstat");
4a71df50
FB		 3422
3423 return &card->stats;
3424}
3425EXPORT_SYMBOL_GPL(qeth_get_stats);
3426
3427static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3428 struct qeth_reply *reply, unsigned long data)
3429{
3430 struct qeth_ipa_cmd *cmd;
3431
d11ba0c4 3432 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
4a71df50
FB		 3433
3434 cmd = (struct qeth_ipa_cmd *) data;
3435 if (!card->options.layer2 ||
3436 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3437 memcpy(card->dev->dev_addr,
3438 &cmd->data.setadapterparms.data.change_addr.addr,
3439 OSA_ADDR_LEN);
3440 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3441 }
3442 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3443 return 0;
3444}
3445
3446int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3447{
3448 int rc;
3449 struct qeth_cmd_buffer *iob;
3450 struct qeth_ipa_cmd *cmd;
3451
d11ba0c4 3452 QETH_DBF_TEXT(TRACE, 4, "chgmac");
4a71df50
FB		 3453
3454 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3455 sizeof(struct qeth_ipacmd_setadpparms));
3456 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3457 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3458 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3459 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3460 card->dev->dev_addr, OSA_ADDR_LEN);
3461 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3462 NULL);
3463 return rc;
3464}
3465EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3466
3467void qeth_tx_timeout(struct net_device *dev)
3468{
3469 struct qeth_card *card;
3470
509e2562 3471 card = dev->ml_priv;
4a71df50
FB		 3472 card->stats.tx_errors++;
3473 qeth_schedule_recovery(card);
3474}
3475EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3476
3477int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3478{
509e2562 3479 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 3480 int rc = 0;
3481
3482 switch (regnum) {
3483 case MII_BMCR: /* Basic mode control register */
3484 rc = BMCR_FULLDPLX;
3485 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3486 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3487 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3488 rc |= BMCR_SPEED100;
3489 break;
3490 case MII_BMSR: /* Basic mode status register */
3491 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3492 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3493 BMSR_100BASE4;
3494 break;
3495 case MII_PHYSID1: /* PHYS ID 1 */
3496 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3497 dev->dev_addr[2];
3498 rc = (rc >> 5) & 0xFFFF;
3499 break;
3500 case MII_PHYSID2: /* PHYS ID 2 */
3501 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3502 break;
3503 case MII_ADVERTISE: /* Advertisement control reg */
3504 rc = ADVERTISE_ALL;
3505 break;
3506 case MII_LPA: /* Link partner ability reg */
3507 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3508 LPA_100BASE4 | LPA_LPACK;
3509 break;
3510 case MII_EXPANSION: /* Expansion register */
3511 break;
3512 case MII_DCOUNTER: /* disconnect counter */
3513 break;
3514 case MII_FCSCOUNTER: /* false carrier counter */
3515 break;
3516 case MII_NWAYTEST: /* N-way auto-neg test register */
3517 break;
3518 case MII_RERRCOUNTER: /* rx error counter */
3519 rc = card->stats.rx_errors;
3520 break;
3521 case MII_SREVISION: /* silicon revision */
3522 break;
3523 case MII_RESV1: /* reserved 1 */
3524 break;
3525 case MII_LBRERROR: /* loopback, rx, bypass error */
3526 break;
3527 case MII_PHYADDR: /* physical address */
3528 break;
3529 case MII_RESV2: /* reserved 2 */
3530 break;
3531 case MII_TPISTATUS: /* TPI status for 10mbps */
3532 break;
3533 case MII_NCONFIG: /* network interface config */
3534 break;
3535 default:
3536 break;
3537 }
3538 return rc;
3539}
3540EXPORT_SYMBOL_GPL(qeth_mdio_read);
3541
3542static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3543 struct qeth_cmd_buffer *iob, int len,
3544 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3545 unsigned long),
3546 void *reply_param)
3547{
3548 u16 s1, s2;
3549
d11ba0c4 3550 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
4a71df50
FB		 3551
3552 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3553 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3554 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3555 /* adjust PDU length fields in IPA_PDU_HEADER */
3556 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3557 s2 = (u32) len;
3558 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3559 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3560 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3561 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3562 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3563 reply_cb, reply_param);
3564}
3565
3566static int qeth_snmp_command_cb(struct qeth_card *card,
3567 struct qeth_reply *reply, unsigned long sdata)
3568{
3569 struct qeth_ipa_cmd *cmd;
3570 struct qeth_arp_query_info *qinfo;
3571 struct qeth_snmp_cmd *snmp;
3572 unsigned char *data;
3573 __u16 data_len;
3574
d11ba0c4 3575 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
4a71df50
FB		 3576
3577 cmd = (struct qeth_ipa_cmd *) sdata;
3578 data = (unsigned char *)((char *)cmd - reply->offset);
3579 qinfo = (struct qeth_arp_query_info *) reply->param;
3580 snmp = &cmd->data.setadapterparms.data.snmp;
3581
3582 if (cmd->hdr.return_code) {
d11ba0c4 3583 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
4a71df50
FB		 3584 return 0;
3585 }
3586 if (cmd->data.setadapterparms.hdr.return_code) {
3587 cmd->hdr.return_code =
3588 cmd->data.setadapterparms.hdr.return_code;
d11ba0c4 3589 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
4a71df50
FB		 3590 return 0;
3591 }
3592 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3593 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3594 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3595 else
3596 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3597
3598 /* check if there is enough room in userspace */
3599 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
d11ba0c4 3600 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
4a71df50
FB		 3601 cmd->hdr.return_code = -ENOMEM;
3602 return 0;
3603 }
d11ba0c4 3604 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
4a71df50 3605 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3606 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
4a71df50
FB		 3607 cmd->data.setadapterparms.hdr.seq_no);
3608 /*copy entries to user buffer*/
3609 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3610 memcpy(qinfo->udata + qinfo->udata_offset,
3611 (char *)snmp,
3612 data_len + offsetof(struct qeth_snmp_cmd, data));
3613 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3614 } else {
3615 memcpy(qinfo->udata + qinfo->udata_offset,
3616 (char *)&snmp->request, data_len);
3617 }
3618 qinfo->udata_offset += data_len;
3619 /* check if all replies received ... */
d11ba0c4 3620 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
4a71df50 3621 cmd->data.setadapterparms.hdr.used_total);
d11ba0c4 3622 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
4a71df50
FB		 3623 cmd->data.setadapterparms.hdr.seq_no);
3624 if (cmd->data.setadapterparms.hdr.seq_no <
3625 cmd->data.setadapterparms.hdr.used_total)
3626 return 1;
3627 return 0;
3628}
3629
3630int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3631{
3632 struct qeth_cmd_buffer *iob;
3633 struct qeth_ipa_cmd *cmd;
3634 struct qeth_snmp_ureq *ureq;
3635 int req_len;
3636 struct qeth_arp_query_info qinfo = {0, };
3637 int rc = 0;
3638
d11ba0c4 3639 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
4a71df50
FB		 3640
3641 if (card->info.guestlan)
3642 return -EOPNOTSUPP;
3643
3644 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3645 (!card->options.layer2)) {
4a71df50
FB		 3646 return -EOPNOTSUPP;
3647 }
3648 /* skip 4 bytes (data_len struct member) to get req_len */
3649 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3650 return -EFAULT;
3651 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3652 if (!ureq) {
d11ba0c4 3653 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
4a71df50
FB		 3654 return -ENOMEM;
3655 }
3656 if (copy_from_user(ureq, udata,
3657 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3658 kfree(ureq);
3659 return -EFAULT;
3660 }
3661 qinfo.udata_len = ureq->hdr.data_len;
3662 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3663 if (!qinfo.udata) {
3664 kfree(ureq);
3665 return -ENOMEM;
3666 }
3667 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3668
3669 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3670 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3671 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3672 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3673 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3674 qeth_snmp_command_cb, (void *)&qinfo);
3675 if (rc)
14cc21b6 3676 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4a71df50
FB		 3677 QETH_CARD_IFNAME(card), rc);
3678 else {
3679 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3680 rc = -EFAULT;
3681 }
3682
3683 kfree(ureq);
3684 kfree(qinfo.udata);
3685 return rc;
3686}
3687EXPORT_SYMBOL_GPL(qeth_snmp_command);
3688
3689static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3690{
3691 switch (card->info.type) {
3692 case QETH_CARD_TYPE_IQD:
3693 return 2;
3694 default:
3695 return 0;
3696 }
3697}
3698
3699static int qeth_qdio_establish(struct qeth_card *card)
3700{
3701 struct qdio_initialize init_data;
3702 char *qib_param_field;
3703 struct qdio_buffer **in_sbal_ptrs;
3704 struct qdio_buffer **out_sbal_ptrs;
3705 int i, j, k;
3706 int rc = 0;
3707
d11ba0c4 3708 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4a71df50
FB		 3709
3710 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3711 GFP_KERNEL);
3712 if (!qib_param_field)
3713 return -ENOMEM;
3714
3715 qeth_create_qib_param_field(card, qib_param_field);
3716 qeth_create_qib_param_field_blkt(card, qib_param_field);
3717
3718 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3719 GFP_KERNEL);
3720 if (!in_sbal_ptrs) {
3721 kfree(qib_param_field);
3722 return -ENOMEM;
3723 }
3724 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3725 in_sbal_ptrs[i] = (struct qdio_buffer *)
3726 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3727
3728 out_sbal_ptrs =
3729 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3730 sizeof(void *), GFP_KERNEL);
3731 if (!out_sbal_ptrs) {
3732 kfree(in_sbal_ptrs);
3733 kfree(qib_param_field);
3734 return -ENOMEM;
3735 }
3736 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3737 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3738 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3739 card->qdio.out_qs[i]->bufs[j].buffer);
3740 }
3741
3742 memset(&init_data, 0, sizeof(struct qdio_initialize));
3743 init_data.cdev = CARD_DDEV(card);
3744 init_data.q_format = qeth_get_qdio_q_format(card);
3745 init_data.qib_param_field_format = 0;
3746 init_data.qib_param_field = qib_param_field;
4a71df50
FB		 3747 init_data.no_input_qs = 1;
3748 init_data.no_output_qs = card->qdio.no_out_queues;
3749 init_data.input_handler = card->discipline.input_handler;
3750 init_data.output_handler = card->discipline.output_handler;
3751 init_data.int_parm = (unsigned long) card;
3752 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3753 QDIO_OUTBOUND_0COPY_SBALS |
3754 QDIO_USE_OUTBOUND_PCIS;
3755 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3756 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3757
3758 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3759 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3760 rc = qdio_initialize(&init_data);
3761 if (rc)
3762 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3763 }
3764 kfree(out_sbal_ptrs);
3765 kfree(in_sbal_ptrs);
3766 kfree(qib_param_field);
3767 return rc;
3768}
3769
3770static void qeth_core_free_card(struct qeth_card *card)
3771{
3772
d11ba0c4
PT		 3773 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3774 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
4a71df50
FB		 3775 qeth_clean_channel(&card->read);
3776 qeth_clean_channel(&card->write);
3777 if (card->dev)
3778 free_netdev(card->dev);
3779 kfree(card->ip_tbd_list);
3780 qeth_free_qdio_buffers(card);
6bcac508 3781 unregister_service_level(&card->qeth_service_level);
4a71df50
FB		 3782 kfree(card);
3783}
3784
3785static struct ccw_device_id qeth_ids[] = {
3786 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3787 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3788 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3789 {},
3790};
3791MODULE_DEVICE_TABLE(ccw, qeth_ids);
3792
3793static struct ccw_driver qeth_ccw_driver = {
3794 .name = "qeth",
3795 .ids = qeth_ids,
3796 .probe = ccwgroup_probe_ccwdev,
3797 .remove = ccwgroup_remove_ccwdev,
3798};
3799
3800static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3801 unsigned long driver_id)
3802{
022b660a
UB		 3803 return ccwgroup_create_from_string(root_dev, driver_id,
3804 &qeth_ccw_driver, 3, buf);
4a71df50
FB		 3805}
3806
3807int qeth_core_hardsetup_card(struct qeth_card *card)
3808{
bbd50e17 3809 struct qdio_ssqd_desc *ssqd;
4a71df50 3810 int retries = 3;
779e6e1c 3811 int mpno = 0;
4a71df50
FB		 3812 int rc;
3813
d11ba0c4 3814 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
4a71df50
FB		 3815 atomic_set(&card->force_alloc_skb, 0);
3816retry:
3817 if (retries < 3) {
74eacdb9
FB		 3818 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3819 dev_name(&card->gdev->dev));
4a71df50
FB		 3820 ccw_device_set_offline(CARD_DDEV(card));
3821 ccw_device_set_offline(CARD_WDEV(card));
3822 ccw_device_set_offline(CARD_RDEV(card));
3823 ccw_device_set_online(CARD_RDEV(card));
3824 ccw_device_set_online(CARD_WDEV(card));
3825 ccw_device_set_online(CARD_DDEV(card));
3826 }
3827 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3828 if (rc == -ERESTARTSYS) {
d11ba0c4 3829 QETH_DBF_TEXT(SETUP, 2, "break1");
4a71df50
FB		 3830 return rc;
3831 } else if (rc) {
d11ba0c4 3832 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
4a71df50
FB		 3833 if (--retries < 0)
3834 goto out;
3835 else
3836 goto retry;
3837 }
3838
3839 rc = qeth_get_unitaddr(card);
3840 if (rc) {
d11ba0c4 3841 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 3842 return rc;
3843 }
779e6e1c 3844
bbd50e17
JG		 3845 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3846 if (!ssqd) {
3847 rc = -ENOMEM;
3848 goto out;
3849 }
3850 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3851 if (rc == 0)
3852 mpno = ssqd->pcnt;
3853 kfree(ssqd);
3854
a74b08c7
UB		 3855 if (mpno)
3856 mpno = min(mpno - 1, QETH_MAX_PORTNO);
4a71df50 3857 if (card->info.portno > mpno) {
14cc21b6
FB		 3858 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3859 "\n.", CARD_BUS_ID(card), card->info.portno);
4a71df50
FB		 3860 rc = -ENODEV;
3861 goto out;
3862 }
3863 qeth_init_tokens(card);
3864 qeth_init_func_level(card);
3865 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3866 if (rc == -ERESTARTSYS) {
d11ba0c4 3867 QETH_DBF_TEXT(SETUP, 2, "break2");
4a71df50
FB		 3868 return rc;
3869 } else if (rc) {
d11ba0c4 3870 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 3871 if (--retries < 0)
3872 goto out;
3873 else
3874 goto retry;
3875 }
3876 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3877 if (rc == -ERESTARTSYS) {
d11ba0c4 3878 QETH_DBF_TEXT(SETUP, 2, "break3");
4a71df50
FB		 3879 return rc;
3880 } else if (rc) {
d11ba0c4 3881 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
4a71df50
FB		 3882 if (--retries < 0)
3883 goto out;
3884 else
3885 goto retry;
3886 }
3887 rc = qeth_mpc_initialize(card);
3888 if (rc) {
d11ba0c4 3889 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4a71df50
FB		 3890 goto out;
3891 }
3892 return 0;
3893out:
74eacdb9
FB		 3894 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3895 "an error on the device\n");
3896 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3897 dev_name(&card->gdev->dev), rc);
4a71df50
FB		 3898 return rc;
3899}
3900EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3901
3902static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3903 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3904{
3905 struct page *page = virt_to_page(element->addr);
3906 if (*pskb == NULL) {
3907 /* the upper protocol layers assume that there is data in the
3908 * skb itself. Copy a small amount (64 bytes) to make them
3909 * happy. */
3910 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3911 if (!(*pskb))
3912 return -ENOMEM;
3913 skb_reserve(*pskb, ETH_HLEN);
3914 if (data_len <= 64) {
3915 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3916 data_len);
3917 } else {
3918 get_page(page);
3919 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3920 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3921 data_len - 64);
3922 (*pskb)->data_len += data_len - 64;
3923 (*pskb)->len += data_len - 64;
3924 (*pskb)->truesize += data_len - 64;
3925 (*pfrag)++;
3926 }
3927 } else {
3928 get_page(page);
3929 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3930 (*pskb)->data_len += data_len;
3931 (*pskb)->len += data_len;
3932 (*pskb)->truesize += data_len;
3933 (*pfrag)++;
3934 }
3935 return 0;
3936}
3937
3938struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3939 struct qdio_buffer *buffer,
3940 struct qdio_buffer_element **__element, int *__offset,
3941 struct qeth_hdr **hdr)
3942{
3943 struct qdio_buffer_element *element = *__element;
3944 int offset = *__offset;
3945 struct sk_buff *skb = NULL;
3946 int skb_len;
3947 void *data_ptr;
3948 int data_len;
3949 int headroom = 0;
3950 int use_rx_sg = 0;
3951 int frag = 0;
3952
4a71df50
FB		 3953 /* qeth_hdr must not cross element boundaries */
3954 if (element->length < offset + sizeof(struct qeth_hdr)) {
3955 if (qeth_is_last_sbale(element))
3956 return NULL;
3957 element++;
3958 offset = 0;
3959 if (element->length < sizeof(struct qeth_hdr))
3960 return NULL;
3961 }
3962 *hdr = element->addr + offset;
3963
3964 offset += sizeof(struct qeth_hdr);
3965 if (card->options.layer2) {
3966 if (card->info.type == QETH_CARD_TYPE_OSN) {
3967 skb_len = (*hdr)->hdr.osn.pdu_length;
3968 headroom = sizeof(struct qeth_hdr);
3969 } else {
3970 skb_len = (*hdr)->hdr.l2.pkt_length;
3971 }
3972 } else {
3973 skb_len = (*hdr)->hdr.l3.length;
b403e685
FB		 3974 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3975 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3976 headroom = TR_HLEN;
3977 else
3978 headroom = ETH_HLEN;
4a71df50
FB		 3979 }
3980
3981 if (!skb_len)
3982 return NULL;
3983
3984 if ((skb_len >= card->options.rx_sg_cb) &&
3985 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3986 (!atomic_read(&card->force_alloc_skb))) {
3987 use_rx_sg = 1;
3988 } else {
3989 skb = dev_alloc_skb(skb_len + headroom);
3990 if (!skb)
3991 goto no_mem;
3992 if (headroom)
3993 skb_reserve(skb, headroom);
3994 }
3995
3996 data_ptr = element->addr + offset;
3997 while (skb_len) {
3998 data_len = min(skb_len, (int)(element->length - offset));
3999 if (data_len) {
4000 if (use_rx_sg) {
4001 if (qeth_create_skb_frag(element, &skb, offset,
4002 &frag, data_len))
4003 goto no_mem;
4004 } else {
4005 memcpy(skb_put(skb, data_len), data_ptr,
4006 data_len);
4007 }
4008 }
4009 skb_len -= data_len;
4010 if (skb_len) {
4011 if (qeth_is_last_sbale(element)) {
d11ba0c4
PT		 4012 QETH_DBF_TEXT(TRACE, 4, "unexeob");
4013 QETH_DBF_TEXT_(TRACE, 4, "%s",
4a71df50 4014 CARD_BUS_ID(card));
d11ba0c4
PT		 4015 QETH_DBF_TEXT(QERR, 2, "unexeob");
4016 QETH_DBF_TEXT_(QERR, 2, "%s",
4a71df50 4017 CARD_BUS_ID(card));
d11ba0c4 4018 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
4a71df50
FB		 4019 dev_kfree_skb_any(skb);
4020 card->stats.rx_errors++;
4021 return NULL;
4022 }
4023 element++;
4024 offset = 0;
4025 data_ptr = element->addr;
4026 } else {
4027 offset += data_len;
4028 }
4029 }
4030 *__element = element;
4031 *__offset = offset;
4032 if (use_rx_sg && card->options.performance_stats) {
4033 card->perf_stats.sg_skbs_rx++;
4034 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4035 }
4036 return skb;
4037no_mem:
4038 if (net_ratelimit()) {
d11ba0c4
PT		 4039 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4040 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4a71df50
FB		 4041 }
4042 card->stats.rx_dropped++;
4043 return NULL;
4044}
4045EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4046
4047static void qeth_unregister_dbf_views(void)
4048{
d11ba0c4
PT		 4049 int x;
4050 for (x = 0; x < QETH_DBF_INFOS; x++) {
4051 debug_unregister(qeth_dbf[x].id);
4052 qeth_dbf[x].id = NULL;
4053 }
4a71df50
FB		 4054}
4055
345aa66e 4056void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
cd023216
PT		 4057{
4058 char dbf_txt_buf[32];
345aa66e 4059 va_list args;
cd023216
PT		 4060
4061 if (level > (qeth_dbf[dbf_nix].id)->level)
4062 return;
345aa66e
PT		 4063 va_start(args, fmt);
4064 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4065 va_end(args);
cd023216 4066 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
cd023216
PT		 4067}
4068EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4069
4a71df50
FB		 4070static int qeth_register_dbf_views(void)
4071{
d11ba0c4
PT		 4072 int ret;
4073 int x;
4074
4075 for (x = 0; x < QETH_DBF_INFOS; x++) {
4076 /* register the areas */
4077 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4078 qeth_dbf[x].pages,
4079 qeth_dbf[x].areas,
4080 qeth_dbf[x].len);
4081 if (qeth_dbf[x].id == NULL) {
4082 qeth_unregister_dbf_views();
4083 return -ENOMEM;
4084 }
4a71df50 4085
d11ba0c4
PT		 4086 /* register a view */
4087 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4088 if (ret) {
4089 qeth_unregister_dbf_views();
4090 return ret;
4091 }
4a71df50 4092
d11ba0c4
PT		 4093 /* set a passing level */
4094 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4095 }
4a71df50
FB		 4096
4097 return 0;
4098}
4099
4100int qeth_core_load_discipline(struct qeth_card *card,
4101 enum qeth_discipline_id discipline)
4102{
4103 int rc = 0;
4104 switch (discipline) {
4105 case QETH_DISCIPLINE_LAYER3:
4106 card->discipline.ccwgdriver = try_then_request_module(
4107 symbol_get(qeth_l3_ccwgroup_driver),
4108 "qeth_l3");
4109 break;
4110 case QETH_DISCIPLINE_LAYER2:
4111 card->discipline.ccwgdriver = try_then_request_module(
4112 symbol_get(qeth_l2_ccwgroup_driver),
4113 "qeth_l2");
4114 break;
4115 }
4116 if (!card->discipline.ccwgdriver) {
74eacdb9
FB		 4117 dev_err(&card->gdev->dev, "There is no kernel module to "
4118 "support discipline %d\n", discipline);
4a71df50
FB		 4119 rc = -EINVAL;
4120 }
4121 return rc;
4122}
4123
4124void qeth_core_free_discipline(struct qeth_card *card)
4125{
4126 if (card->options.layer2)
4127 symbol_put(qeth_l2_ccwgroup_driver);
4128 else
4129 symbol_put(qeth_l3_ccwgroup_driver);
4130 card->discipline.ccwgdriver = NULL;
4131}
4132
4133static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4134{
4135 struct qeth_card *card;
4136 struct device *dev;
4137 int rc;
4138 unsigned long flags;
4139
d11ba0c4 4140 QETH_DBF_TEXT(SETUP, 2, "probedev");
4a71df50
FB		 4141
4142 dev = &gdev->dev;
4143 if (!get_device(dev))
4144 return -ENODEV;
4145
2a0217d5 4146 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4a71df50
FB		 4147
4148 card = qeth_alloc_card();
4149 if (!card) {
d11ba0c4 4150 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4a71df50
FB		 4151 rc = -ENOMEM;
4152 goto err_dev;
4153 }
4154 card->read.ccwdev = gdev->cdev[0];
4155 card->write.ccwdev = gdev->cdev[1];
4156 card->data.ccwdev = gdev->cdev[2];
4157 dev_set_drvdata(&gdev->dev, card);
4158 card->gdev = gdev;
4159 gdev->cdev[0]->handler = qeth_irq;
4160 gdev->cdev[1]->handler = qeth_irq;
4161 gdev->cdev[2]->handler = qeth_irq;
4162
4163 rc = qeth_determine_card_type(card);
4164 if (rc) {
d11ba0c4 4165 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4a71df50
FB		 4166 goto err_card;
4167 }
4168 rc = qeth_setup_card(card);
4169 if (rc) {
d11ba0c4 4170 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4a71df50
FB		 4171 goto err_card;
4172 }
4173
4174 if (card->info.type == QETH_CARD_TYPE_OSN) {
4175 rc = qeth_core_create_osn_attributes(dev);
4176 if (rc)
4177 goto err_card;
4178 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4179 if (rc) {
4180 qeth_core_remove_osn_attributes(dev);
4181 goto err_card;
4182 }
4183 rc = card->discipline.ccwgdriver->probe(card->gdev);
4184 if (rc) {
4185 qeth_core_free_discipline(card);
4186 qeth_core_remove_osn_attributes(dev);
4187 goto err_card;
4188 }
4189 } else {
4190 rc = qeth_core_create_device_attributes(dev);
4191 if (rc)
4192 goto err_card;
4193 }
4194
4195 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4196 list_add_tail(&card->list, &qeth_core_card_list.list);
4197 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4198 return 0;
4199
4200err_card:
4201 qeth_core_free_card(card);
4202err_dev:
4203 put_device(dev);
4204 return rc;
4205}
4206
4207static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4208{
4209 unsigned long flags;
4210 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4211
28a7e4c9 4212 QETH_DBF_TEXT(SETUP, 2, "removedv");
4a71df50
FB		 4213 if (card->discipline.ccwgdriver) {
4214 card->discipline.ccwgdriver->remove(gdev);
4215 qeth_core_free_discipline(card);
4216 }
4217
4218 if (card->info.type == QETH_CARD_TYPE_OSN) {
4219 qeth_core_remove_osn_attributes(&gdev->dev);
4220 } else {
4221 qeth_core_remove_device_attributes(&gdev->dev);
4222 }
4223 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4224 list_del(&card->list);
4225 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4226 qeth_core_free_card(card);
4227 dev_set_drvdata(&gdev->dev, NULL);
4228 put_device(&gdev->dev);
4229 return;
4230}
4231
4232static int qeth_core_set_online(struct ccwgroup_device *gdev)
4233{
4234 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4235 int rc = 0;
4236 int def_discipline;
4237
4238 if (!card->discipline.ccwgdriver) {
4239 if (card->info.type == QETH_CARD_TYPE_IQD)
4240 def_discipline = QETH_DISCIPLINE_LAYER3;
4241 else
4242 def_discipline = QETH_DISCIPLINE_LAYER2;
4243 rc = qeth_core_load_discipline(card, def_discipline);
4244 if (rc)
4245 goto err;
4246 rc = card->discipline.ccwgdriver->probe(card->gdev);
4247 if (rc)
4248 goto err;
4249 }
4250 rc = card->discipline.ccwgdriver->set_online(gdev);
4251err:
4252 return rc;
4253}
4254
4255static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4256{
4257 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4258 return card->discipline.ccwgdriver->set_offline(gdev);
4259}
4260
4261static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4262{
4263 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4264 if (card->discipline.ccwgdriver &&
4265 card->discipline.ccwgdriver->shutdown)
4266 card->discipline.ccwgdriver->shutdown(gdev);
4267}
4268
4269static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4270 .owner = THIS_MODULE,
4271 .name = "qeth",
4272 .driver_id = 0xD8C5E3C8,
4273 .probe = qeth_core_probe_device,
4274 .remove = qeth_core_remove_device,
4275 .set_online = qeth_core_set_online,
4276 .set_offline = qeth_core_set_offline,
4277 .shutdown = qeth_core_shutdown,
4278};
4279
4280static ssize_t
4281qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4282 size_t count)
4283{
4284 int err;
4285 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4286 qeth_core_ccwgroup_driver.driver_id);
4287 if (err)
4288 return err;
4289 else
4290 return count;
4291}
4292
4293static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4294
4295static struct {
4296 const char str[ETH_GSTRING_LEN];
4297} qeth_ethtool_stats_keys[] = {
4298/* 0 */{"rx skbs"},
4299 {"rx buffers"},
4300 {"tx skbs"},
4301 {"tx buffers"},
4302 {"tx skbs no packing"},
4303 {"tx buffers no packing"},
4304 {"tx skbs packing"},
4305 {"tx buffers packing"},
4306 {"tx sg skbs"},
4307 {"tx sg frags"},
4308/* 10 */{"rx sg skbs"},
4309 {"rx sg frags"},
4310 {"rx sg page allocs"},
4311 {"tx large kbytes"},
4312 {"tx large count"},
4313 {"tx pk state ch n->p"},
4314 {"tx pk state ch p->n"},
4315 {"tx pk watermark low"},
4316 {"tx pk watermark high"},
4317 {"queue 0 buffer usage"},
4318/* 20 */{"queue 1 buffer usage"},
4319 {"queue 2 buffer usage"},
4320 {"queue 3 buffer usage"},
4321 {"rx handler time"},
4322 {"rx handler count"},
4323 {"rx do_QDIO time"},
4324 {"rx do_QDIO count"},
4325 {"tx handler time"},
4326 {"tx handler count"},
4327 {"tx time"},
4328/* 30 */{"tx count"},
4329 {"tx do_QDIO time"},
4330 {"tx do_QDIO count"},
4331};
4332
4333int qeth_core_get_stats_count(struct net_device *dev)
4334{
4335 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4336}
4337EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4338
4339void qeth_core_get_ethtool_stats(struct net_device *dev,
4340 struct ethtool_stats *stats, u64 *data)
4341{
509e2562 4342 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4343 data[0] = card->stats.rx_packets -
4344 card->perf_stats.initial_rx_packets;
4345 data[1] = card->perf_stats.bufs_rec;
4346 data[2] = card->stats.tx_packets -
4347 card->perf_stats.initial_tx_packets;
4348 data[3] = card->perf_stats.bufs_sent;
4349 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4350 - card->perf_stats.skbs_sent_pack;
4351 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4352 data[6] = card->perf_stats.skbs_sent_pack;
4353 data[7] = card->perf_stats.bufs_sent_pack;
4354 data[8] = card->perf_stats.sg_skbs_sent;
4355 data[9] = card->perf_stats.sg_frags_sent;
4356 data[10] = card->perf_stats.sg_skbs_rx;
4357 data[11] = card->perf_stats.sg_frags_rx;
4358 data[12] = card->perf_stats.sg_alloc_page_rx;
4359 data[13] = (card->perf_stats.large_send_bytes >> 10);
4360 data[14] = card->perf_stats.large_send_cnt;
4361 data[15] = card->perf_stats.sc_dp_p;
4362 data[16] = card->perf_stats.sc_p_dp;
4363 data[17] = QETH_LOW_WATERMARK_PACK;
4364 data[18] = QETH_HIGH_WATERMARK_PACK;
4365 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4366 data[20] = (card->qdio.no_out_queues > 1) ?
4367 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4368 data[21] = (card->qdio.no_out_queues > 2) ?
4369 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4370 data[22] = (card->qdio.no_out_queues > 3) ?
4371 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4372 data[23] = card->perf_stats.inbound_time;
4373 data[24] = card->perf_stats.inbound_cnt;
4374 data[25] = card->perf_stats.inbound_do_qdio_time;
4375 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4376 data[27] = card->perf_stats.outbound_handler_time;
4377 data[28] = card->perf_stats.outbound_handler_cnt;
4378 data[29] = card->perf_stats.outbound_time;
4379 data[30] = card->perf_stats.outbound_cnt;
4380 data[31] = card->perf_stats.outbound_do_qdio_time;
4381 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4382}
4383EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4384
4385void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4386{
4387 switch (stringset) {
4388 case ETH_SS_STATS:
4389 memcpy(data, &qeth_ethtool_stats_keys,
4390 sizeof(qeth_ethtool_stats_keys));
4391 break;
4392 default:
4393 WARN_ON(1);
4394 break;
4395 }
4396}
4397EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4398
4399void qeth_core_get_drvinfo(struct net_device *dev,
4400 struct ethtool_drvinfo *info)
4401{
509e2562 4402 struct qeth_card *card = dev->ml_priv;
4a71df50
FB		 4403 if (card->options.layer2)
4404 strcpy(info->driver, "qeth_l2");
4405 else
4406 strcpy(info->driver, "qeth_l3");
4407
4408 strcpy(info->version, "1.0");
4409 strcpy(info->fw_version, card->info.mcl_level);
4410 sprintf(info->bus_info, "%s/%s/%s",
4411 CARD_RDEV_ID(card),
4412 CARD_WDEV_ID(card),
4413 CARD_DDEV_ID(card));
4414}
4415EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4416
3f9975aa
FB		 4417int qeth_core_ethtool_get_settings(struct net_device *netdev,
4418 struct ethtool_cmd *ecmd)
4419{
509e2562 4420 struct qeth_card *card = netdev->ml_priv;
3f9975aa
FB		 4421 enum qeth_link_types link_type;
4422
4423 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4424 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4425 else
4426 link_type = card->info.link_type;
4427
4428 ecmd->transceiver = XCVR_INTERNAL;
4429 ecmd->supported = SUPPORTED_Autoneg;
4430 ecmd->advertising = ADVERTISED_Autoneg;
4431 ecmd->duplex = DUPLEX_FULL;
4432 ecmd->autoneg = AUTONEG_ENABLE;
4433
4434 switch (link_type) {
4435 case QETH_LINK_TYPE_FAST_ETH:
4436 case QETH_LINK_TYPE_LANE_ETH100:
4437 ecmd->supported |= SUPPORTED_10baseT_Half |
4438 SUPPORTED_10baseT_Full |
4439 SUPPORTED_100baseT_Half |
4440 SUPPORTED_100baseT_Full |
4441 SUPPORTED_TP;
4442 ecmd->advertising |= ADVERTISED_10baseT_Half |
4443 ADVERTISED_10baseT_Full |
4444 ADVERTISED_100baseT_Half |
4445 ADVERTISED_100baseT_Full |
4446 ADVERTISED_TP;
4447 ecmd->speed = SPEED_100;
4448 ecmd->port = PORT_TP;
4449 break;
4450
4451 case QETH_LINK_TYPE_GBIT_ETH:
4452 case QETH_LINK_TYPE_LANE_ETH1000:
4453 ecmd->supported |= SUPPORTED_10baseT_Half |
4454 SUPPORTED_10baseT_Full |
4455 SUPPORTED_100baseT_Half |
4456 SUPPORTED_100baseT_Full |
4457 SUPPORTED_1000baseT_Half |
4458 SUPPORTED_1000baseT_Full |
4459 SUPPORTED_FIBRE;
4460 ecmd->advertising |= ADVERTISED_10baseT_Half |
4461 ADVERTISED_10baseT_Full |
4462 ADVERTISED_100baseT_Half |
4463 ADVERTISED_100baseT_Full |
4464 ADVERTISED_1000baseT_Half |
4465 ADVERTISED_1000baseT_Full |
4466 ADVERTISED_FIBRE;
4467 ecmd->speed = SPEED_1000;
4468 ecmd->port = PORT_FIBRE;
4469 break;
4470
4471 case QETH_LINK_TYPE_10GBIT_ETH:
4472 ecmd->supported |= SUPPORTED_10baseT_Half |
4473 SUPPORTED_10baseT_Full |
4474 SUPPORTED_100baseT_Half |
4475 SUPPORTED_100baseT_Full |
4476 SUPPORTED_1000baseT_Half |
4477 SUPPORTED_1000baseT_Full |
4478 SUPPORTED_10000baseT_Full |
4479 SUPPORTED_FIBRE;
4480 ecmd->advertising |= ADVERTISED_10baseT_Half |
4481 ADVERTISED_10baseT_Full |
4482 ADVERTISED_100baseT_Half |
4483 ADVERTISED_100baseT_Full |
4484 ADVERTISED_1000baseT_Half |
4485 ADVERTISED_1000baseT_Full |
4486 ADVERTISED_10000baseT_Full |
4487 ADVERTISED_FIBRE;
4488 ecmd->speed = SPEED_10000;
4489 ecmd->port = PORT_FIBRE;
4490 break;
4491
4492 default:
4493 ecmd->supported |= SUPPORTED_10baseT_Half |
4494 SUPPORTED_10baseT_Full |
4495 SUPPORTED_TP;
4496 ecmd->advertising |= ADVERTISED_10baseT_Half |
4497 ADVERTISED_10baseT_Full |
4498 ADVERTISED_TP;
4499 ecmd->speed = SPEED_10;
4500 ecmd->port = PORT_TP;
4501 }
4502
4503 return 0;
4504}
4505EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4506
4a71df50
FB		 4507static int __init qeth_core_init(void)
4508{
4509 int rc;
4510
74eacdb9 4511 pr_info("loading core functions\n");
4a71df50
FB		 4512 INIT_LIST_HEAD(&qeth_core_card_list.list);
4513 rwlock_init(&qeth_core_card_list.rwlock);
4514
4515 rc = qeth_register_dbf_views();
4516 if (rc)
4517 goto out_err;
4518 rc = ccw_driver_register(&qeth_ccw_driver);
4519 if (rc)
4520 goto ccw_err;
4521 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4522 if (rc)
4523 goto ccwgroup_err;
4524 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4525 &driver_attr_group);
4526 if (rc)
4527 goto driver_err;
4528 qeth_core_root_dev = s390_root_dev_register("qeth");
4529 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4530 if (rc)
4531 goto register_err;
4a71df50 4532
683d718a
FB		 4533 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4534 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4535 if (!qeth_core_header_cache) {
4536 rc = -ENOMEM;
4537 goto slab_err;
4538 }
4539
4540 return 0;
4541slab_err:
4542 s390_root_dev_unregister(qeth_core_root_dev);
4a71df50
FB		 4543register_err:
4544 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4545 &driver_attr_group);
4546driver_err:
4547 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4548ccwgroup_err:
4549 ccw_driver_unregister(&qeth_ccw_driver);
4550ccw_err:
74eacdb9 4551 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4a71df50
FB		 4552 qeth_unregister_dbf_views();
4553out_err:
74eacdb9 4554 pr_err("Initializing the qeth device driver failed\n");
4a71df50
FB		 4555 return rc;
4556}
4557
4558static void __exit qeth_core_exit(void)
4559{
4560 s390_root_dev_unregister(qeth_core_root_dev);
4561 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4562 &driver_attr_group);
4563 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4564 ccw_driver_unregister(&qeth_ccw_driver);
683d718a 4565 kmem_cache_destroy(qeth_core_header_cache);
4a71df50 4566 qeth_unregister_dbf_views();
74eacdb9 4567 pr_info("core functions removed\n");
4a71df50
FB		 4568}
4569
4570module_init(qeth_core_init);
4571module_exit(qeth_core_exit);
4572MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4573MODULE_DESCRIPTION("qeth core functions");
4574MODULE_LICENSE("GPL");
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