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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/s390/s390mach.c | |
3 | * S/390 machine check handler | |
4 | * | |
5 | * S390 version | |
6 | * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
7 | * Author(s): Ingo Adlung (adlung@de.ibm.com) | |
8 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
9 | */ | |
10 | ||
1da177e4 LT |
11 | #include <linux/init.h> |
12 | #include <linux/sched.h> | |
13 | #include <linux/errno.h> | |
14 | #include <linux/workqueue.h> | |
022e4fc0 | 15 | #include <linux/time.h> |
2b67fc46 | 16 | #include <linux/device.h> |
84d11c5d | 17 | #include <linux/kthread.h> |
d54853ef | 18 | #include <asm/etr.h> |
1da177e4 | 19 | #include <asm/lowcore.h> |
2b67fc46 HC |
20 | #include <asm/cio.h> |
21 | #include "cio/cio.h" | |
22 | #include "cio/chsc.h" | |
23 | #include "cio/css.h" | |
e6b6e10a | 24 | #include "cio/chp.h" |
1da177e4 LT |
25 | #include "s390mach.h" |
26 | ||
1da177e4 LT |
27 | static struct semaphore m_sem; |
28 | ||
77fa2245 | 29 | static NORET_TYPE void |
1da177e4 LT |
30 | s390_handle_damage(char *msg) |
31 | { | |
1da177e4 LT |
32 | #ifdef CONFIG_SMP |
33 | smp_send_stop(); | |
34 | #endif | |
35 | disabled_wait((unsigned long) __builtin_return_address(0)); | |
77fa2245 | 36 | for(;;); |
1da177e4 LT |
37 | } |
38 | ||
39 | /* | |
40 | * Retrieve CRWs and call function to handle event. | |
41 | * | |
42 | * Note : we currently process CRWs for io and chsc subchannels only | |
43 | */ | |
44 | static int | |
45 | s390_collect_crw_info(void *param) | |
46 | { | |
fb6958a5 | 47 | struct crw crw[2]; |
1da177e4 LT |
48 | int ccode, ret, slow; |
49 | struct semaphore *sem; | |
fb6958a5 | 50 | unsigned int chain; |
1da177e4 LT |
51 | |
52 | sem = (struct semaphore *)param; | |
1da177e4 LT |
53 | repeat: |
54 | down_interruptible(sem); | |
55 | slow = 0; | |
fb6958a5 | 56 | chain = 0; |
1da177e4 | 57 | while (1) { |
fb6958a5 CH |
58 | if (unlikely(chain > 1)) { |
59 | struct crw tmp_crw; | |
60 | ||
61 | printk(KERN_WARNING"%s: Code does not support more " | |
62 | "than two chained crws; please report to " | |
63 | "linux390@de.ibm.com!\n", __FUNCTION__); | |
64 | ccode = stcrw(&tmp_crw); | |
65 | printk(KERN_WARNING"%s: crw reports slct=%d, oflw=%d, " | |
66 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
67 | __FUNCTION__, tmp_crw.slct, tmp_crw.oflw, | |
68 | tmp_crw.chn, tmp_crw.rsc, tmp_crw.anc, | |
69 | tmp_crw.erc, tmp_crw.rsid); | |
70 | printk(KERN_WARNING"%s: This was crw number %x in the " | |
71 | "chain\n", __FUNCTION__, chain); | |
72 | if (ccode != 0) | |
73 | break; | |
74 | chain = tmp_crw.chn ? chain + 1 : 0; | |
75 | continue; | |
76 | } | |
77 | ccode = stcrw(&crw[chain]); | |
1da177e4 LT |
78 | if (ccode != 0) |
79 | break; | |
250b2dc8 CH |
80 | printk(KERN_DEBUG "crw_info : CRW reports slct=%d, oflw=%d, " |
81 | "chn=%d, rsc=%X, anc=%d, erc=%X, rsid=%X\n", | |
82 | crw[chain].slct, crw[chain].oflw, crw[chain].chn, | |
83 | crw[chain].rsc, crw[chain].anc, crw[chain].erc, | |
84 | crw[chain].rsid); | |
1da177e4 | 85 | /* Check for overflows. */ |
fb6958a5 | 86 | if (crw[chain].oflw) { |
1da177e4 LT |
87 | pr_debug("%s: crw overflow detected!\n", __FUNCTION__); |
88 | css_reiterate_subchannels(); | |
fb6958a5 | 89 | chain = 0; |
1da177e4 LT |
90 | slow = 1; |
91 | continue; | |
92 | } | |
fb6958a5 | 93 | switch (crw[chain].rsc) { |
1da177e4 | 94 | case CRW_RSC_SCH: |
fb6958a5 CH |
95 | if (crw[0].chn && !chain) |
96 | break; | |
97 | pr_debug("source is subchannel %04X\n", crw[0].rsid); | |
98 | ret = css_process_crw (crw[0].rsid, | |
99 | chain ? crw[1].rsid : 0); | |
1da177e4 LT |
100 | if (ret == -EAGAIN) |
101 | slow = 1; | |
102 | break; | |
103 | case CRW_RSC_MONITOR: | |
104 | pr_debug("source is monitoring facility\n"); | |
105 | break; | |
106 | case CRW_RSC_CPATH: | |
fb6958a5 | 107 | pr_debug("source is channel path %02X\n", crw[0].rsid); |
7e560814 CH |
108 | /* |
109 | * Check for solicited machine checks. These are | |
110 | * created by reset channel path and need not be | |
111 | * reported to the common I/O layer. | |
112 | */ | |
113 | if (crw[chain].slct) { | |
250b2dc8 CH |
114 | pr_debug("solicited machine check for " |
115 | "channel path %02X\n", crw[0].rsid); | |
7e560814 CH |
116 | break; |
117 | } | |
fb6958a5 | 118 | switch (crw[0].erc) { |
1da177e4 | 119 | case CRW_ERC_IPARM: /* Path has come. */ |
fb6958a5 | 120 | ret = chp_process_crw(crw[0].rsid, 1); |
1da177e4 LT |
121 | break; |
122 | case CRW_ERC_PERRI: /* Path has gone. */ | |
123 | case CRW_ERC_PERRN: | |
fb6958a5 | 124 | ret = chp_process_crw(crw[0].rsid, 0); |
1da177e4 LT |
125 | break; |
126 | default: | |
127 | pr_debug("Don't know how to handle erc=%x\n", | |
fb6958a5 | 128 | crw[0].erc); |
1da177e4 LT |
129 | ret = 0; |
130 | } | |
131 | if (ret == -EAGAIN) | |
132 | slow = 1; | |
133 | break; | |
134 | case CRW_RSC_CONFIG: | |
135 | pr_debug("source is configuration-alert facility\n"); | |
136 | break; | |
137 | case CRW_RSC_CSS: | |
138 | pr_debug("source is channel subsystem\n"); | |
139 | ret = chsc_process_crw(); | |
140 | if (ret == -EAGAIN) | |
141 | slow = 1; | |
142 | break; | |
143 | default: | |
144 | pr_debug("unknown source\n"); | |
145 | break; | |
146 | } | |
fb6958a5 CH |
147 | /* chain is always 0 or 1 here. */ |
148 | chain = crw[chain].chn ? chain + 1 : 0; | |
1da177e4 LT |
149 | } |
150 | if (slow) | |
151 | queue_work(slow_path_wq, &slow_path_work); | |
152 | goto repeat; | |
153 | return 0; | |
154 | } | |
155 | ||
77fa2245 HC |
156 | struct mcck_struct { |
157 | int kill_task; | |
158 | int channel_report; | |
159 | int warning; | |
160 | unsigned long long mcck_code; | |
161 | }; | |
162 | ||
163 | static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck); | |
164 | ||
1da177e4 | 165 | /* |
77fa2245 HC |
166 | * Main machine check handler function. Will be called with interrupts enabled |
167 | * or disabled and machine checks enabled or disabled. | |
1da177e4 LT |
168 | */ |
169 | void | |
77fa2245 | 170 | s390_handle_mcck(void) |
1da177e4 | 171 | { |
77fa2245 HC |
172 | unsigned long flags; |
173 | struct mcck_struct mcck; | |
1da177e4 | 174 | |
77fa2245 HC |
175 | /* |
176 | * Disable machine checks and get the current state of accumulated | |
177 | * machine checks. Afterwards delete the old state and enable machine | |
178 | * checks again. | |
179 | */ | |
180 | local_irq_save(flags); | |
181 | local_mcck_disable(); | |
182 | mcck = __get_cpu_var(cpu_mcck); | |
183 | memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct)); | |
184 | clear_thread_flag(TIF_MCCK_PENDING); | |
185 | local_mcck_enable(); | |
186 | local_irq_restore(flags); | |
1da177e4 | 187 | |
77fa2245 | 188 | if (mcck.channel_report) |
1da177e4 LT |
189 | up(&m_sem); |
190 | ||
191 | #ifdef CONFIG_MACHCHK_WARNING | |
192 | /* | |
193 | * The warning may remain for a prolonged period on the bare iron. | |
194 | * (actually till the machine is powered off, or until the problem is gone) | |
195 | * So we just stop listening for the WARNING MCH and prevent continuously | |
196 | * being interrupted. One caveat is however, that we must do this per | |
197 | * processor and cannot use the smp version of ctl_clear_bit(). | |
198 | * On VM we only get one interrupt per virtally presented machinecheck. | |
199 | * Though one suffices, we may get one interrupt per (virtual) processor. | |
200 | */ | |
77fa2245 | 201 | if (mcck.warning) { /* WARNING pending ? */ |
1da177e4 LT |
202 | static int mchchk_wng_posted = 0; |
203 | /* | |
204 | * Use single machine clear, as we cannot handle smp right now | |
205 | */ | |
206 | __ctl_clear_bit(14, 24); /* Disable WARNING MCH */ | |
207 | if (xchg(&mchchk_wng_posted, 1) == 0) | |
9ec52099 | 208 | kill_cad_pid(SIGPWR, 1); |
1da177e4 LT |
209 | } |
210 | #endif | |
77fa2245 HC |
211 | |
212 | if (mcck.kill_task) { | |
213 | local_irq_enable(); | |
214 | printk(KERN_EMERG "mcck: Terminating task because of machine " | |
215 | "malfunction (code 0x%016llx).\n", mcck.mcck_code); | |
216 | printk(KERN_EMERG "mcck: task: %s, pid: %d.\n", | |
217 | current->comm, current->pid); | |
218 | do_exit(SIGSEGV); | |
219 | } | |
220 | } | |
221 | ||
222 | /* | |
223 | * returns 0 if all registers could be validated | |
224 | * returns 1 otherwise | |
225 | */ | |
226 | static int | |
227 | s390_revalidate_registers(struct mci *mci) | |
228 | { | |
229 | int kill_task; | |
230 | u64 tmpclock; | |
231 | u64 zero; | |
232 | void *fpt_save_area, *fpt_creg_save_area; | |
233 | ||
234 | kill_task = 0; | |
235 | zero = 0; | |
236 | /* General purpose registers */ | |
237 | if (!mci->gr) | |
238 | /* | |
239 | * General purpose registers couldn't be restored and have | |
240 | * unknown contents. Process needs to be terminated. | |
241 | */ | |
242 | kill_task = 1; | |
243 | ||
244 | /* Revalidate floating point registers */ | |
245 | if (!mci->fp) | |
246 | /* | |
247 | * Floating point registers can't be restored and | |
248 | * therefore the process needs to be terminated. | |
249 | */ | |
250 | kill_task = 1; | |
251 | ||
347a8dc3 | 252 | #ifndef CONFIG_64BIT |
94c12cc7 MS |
253 | asm volatile( |
254 | " ld 0,0(%0)\n" | |
255 | " ld 2,8(%0)\n" | |
256 | " ld 4,16(%0)\n" | |
257 | " ld 6,24(%0)" | |
258 | : : "a" (&S390_lowcore.floating_pt_save_area)); | |
77fa2245 HC |
259 | #endif |
260 | ||
261 | if (MACHINE_HAS_IEEE) { | |
347a8dc3 | 262 | #ifdef CONFIG_64BIT |
77fa2245 HC |
263 | fpt_save_area = &S390_lowcore.floating_pt_save_area; |
264 | fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area; | |
265 | #else | |
266 | fpt_save_area = (void *) S390_lowcore.extended_save_area_addr; | |
267 | fpt_creg_save_area = fpt_save_area+128; | |
268 | #endif | |
269 | /* Floating point control register */ | |
270 | if (!mci->fc) { | |
271 | /* | |
272 | * Floating point control register can't be restored. | |
273 | * Task will be terminated. | |
274 | */ | |
94c12cc7 | 275 | asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero)); |
77fa2245 HC |
276 | kill_task = 1; |
277 | ||
94c12cc7 MS |
278 | } else |
279 | asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area)); | |
77fa2245 | 280 | |
94c12cc7 MS |
281 | asm volatile( |
282 | " ld 0,0(%0)\n" | |
283 | " ld 1,8(%0)\n" | |
284 | " ld 2,16(%0)\n" | |
285 | " ld 3,24(%0)\n" | |
286 | " ld 4,32(%0)\n" | |
287 | " ld 5,40(%0)\n" | |
288 | " ld 6,48(%0)\n" | |
289 | " ld 7,56(%0)\n" | |
290 | " ld 8,64(%0)\n" | |
291 | " ld 9,72(%0)\n" | |
292 | " ld 10,80(%0)\n" | |
293 | " ld 11,88(%0)\n" | |
294 | " ld 12,96(%0)\n" | |
295 | " ld 13,104(%0)\n" | |
296 | " ld 14,112(%0)\n" | |
297 | " ld 15,120(%0)\n" | |
298 | : : "a" (fpt_save_area)); | |
77fa2245 HC |
299 | } |
300 | ||
301 | /* Revalidate access registers */ | |
94c12cc7 MS |
302 | asm volatile( |
303 | " lam 0,15,0(%0)" | |
304 | : : "a" (&S390_lowcore.access_regs_save_area)); | |
77fa2245 HC |
305 | if (!mci->ar) |
306 | /* | |
307 | * Access registers have unknown contents. | |
308 | * Terminating task. | |
309 | */ | |
310 | kill_task = 1; | |
311 | ||
312 | /* Revalidate control registers */ | |
313 | if (!mci->cr) | |
314 | /* | |
315 | * Control registers have unknown contents. | |
316 | * Can't recover and therefore stopping machine. | |
317 | */ | |
318 | s390_handle_damage("invalid control registers."); | |
319 | else | |
347a8dc3 | 320 | #ifdef CONFIG_64BIT |
94c12cc7 MS |
321 | asm volatile( |
322 | " lctlg 0,15,0(%0)" | |
323 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 | 324 | #else |
94c12cc7 MS |
325 | asm volatile( |
326 | " lctl 0,15,0(%0)" | |
327 | : : "a" (&S390_lowcore.cregs_save_area)); | |
77fa2245 HC |
328 | #endif |
329 | ||
330 | /* | |
331 | * We don't even try to revalidate the TOD register, since we simply | |
332 | * can't write something sensible into that register. | |
333 | */ | |
334 | ||
347a8dc3 | 335 | #ifdef CONFIG_64BIT |
77fa2245 HC |
336 | /* |
337 | * See if we can revalidate the TOD programmable register with its | |
338 | * old contents (should be zero) otherwise set it to zero. | |
339 | */ | |
340 | if (!mci->pr) | |
94c12cc7 MS |
341 | asm volatile( |
342 | " sr 0,0\n" | |
343 | " sckpf" | |
344 | : : : "0", "cc"); | |
77fa2245 HC |
345 | else |
346 | asm volatile( | |
94c12cc7 MS |
347 | " l 0,0(%0)\n" |
348 | " sckpf" | |
349 | : : "a" (&S390_lowcore.tod_progreg_save_area) | |
350 | : "0", "cc"); | |
77fa2245 HC |
351 | #endif |
352 | ||
353 | /* Revalidate clock comparator register */ | |
94c12cc7 MS |
354 | asm volatile( |
355 | " stck 0(%1)\n" | |
356 | " sckc 0(%1)" | |
357 | : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory"); | |
77fa2245 HC |
358 | |
359 | /* Check if old PSW is valid */ | |
360 | if (!mci->wp) | |
361 | /* | |
362 | * Can't tell if we come from user or kernel mode | |
363 | * -> stopping machine. | |
364 | */ | |
365 | s390_handle_damage("old psw invalid."); | |
366 | ||
367 | if (!mci->ms || !mci->pm || !mci->ia) | |
368 | kill_task = 1; | |
369 | ||
370 | return kill_task; | |
371 | } | |
372 | ||
b73d40c6 | 373 | #define MAX_IPD_COUNT 29 |
022e4fc0 | 374 | #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */ |
b73d40c6 | 375 | |
77fa2245 HC |
376 | /* |
377 | * machine check handler. | |
378 | */ | |
379 | void | |
380 | s390_do_machine_check(struct pt_regs *regs) | |
381 | { | |
b73d40c6 HC |
382 | static DEFINE_SPINLOCK(ipd_lock); |
383 | static unsigned long long last_ipd; | |
384 | static int ipd_count; | |
385 | unsigned long long tmp; | |
77fa2245 HC |
386 | struct mci *mci; |
387 | struct mcck_struct *mcck; | |
388 | int umode; | |
389 | ||
8e9ccae6 HC |
390 | lockdep_off(); |
391 | ||
77fa2245 HC |
392 | mci = (struct mci *) &S390_lowcore.mcck_interruption_code; |
393 | mcck = &__get_cpu_var(cpu_mcck); | |
394 | umode = user_mode(regs); | |
395 | ||
396 | if (mci->sd) | |
397 | /* System damage -> stopping machine */ | |
398 | s390_handle_damage("received system damage machine check."); | |
399 | ||
400 | if (mci->pd) { | |
401 | if (mci->b) { | |
402 | /* Processing backup -> verify if we can survive this */ | |
403 | u64 z_mcic, o_mcic, t_mcic; | |
347a8dc3 | 404 | #ifdef CONFIG_64BIT |
77fa2245 HC |
405 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29); |
406 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
407 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
408 | 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 | | |
409 | 1ULL<<16); | |
410 | #else | |
411 | z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 | | |
412 | 1ULL<<29); | |
413 | o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 | | |
414 | 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 | | |
415 | 1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16); | |
416 | #endif | |
417 | t_mcic = *(u64 *)mci; | |
418 | ||
419 | if (((t_mcic & z_mcic) != 0) || | |
420 | ((t_mcic & o_mcic) != o_mcic)) { | |
421 | s390_handle_damage("processing backup machine " | |
422 | "check with damage."); | |
423 | } | |
b73d40c6 HC |
424 | |
425 | /* | |
426 | * Nullifying exigent condition, therefore we might | |
427 | * retry this instruction. | |
428 | */ | |
429 | ||
430 | spin_lock(&ipd_lock); | |
431 | ||
432 | tmp = get_clock(); | |
433 | ||
434 | if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME) | |
435 | ipd_count++; | |
436 | else | |
437 | ipd_count = 1; | |
438 | ||
439 | last_ipd = tmp; | |
440 | ||
441 | if (ipd_count == MAX_IPD_COUNT) | |
442 | s390_handle_damage("too many ipd retries."); | |
443 | ||
444 | spin_unlock(&ipd_lock); | |
77fa2245 HC |
445 | } |
446 | else { | |
447 | /* Processing damage -> stopping machine */ | |
448 | s390_handle_damage("received instruction processing " | |
449 | "damage machine check."); | |
450 | } | |
451 | } | |
452 | if (s390_revalidate_registers(mci)) { | |
453 | if (umode) { | |
454 | /* | |
455 | * Couldn't restore all register contents while in | |
456 | * user mode -> mark task for termination. | |
457 | */ | |
458 | mcck->kill_task = 1; | |
459 | mcck->mcck_code = *(unsigned long long *) mci; | |
460 | set_thread_flag(TIF_MCCK_PENDING); | |
461 | } | |
462 | else | |
463 | /* | |
464 | * Couldn't restore all register contents while in | |
465 | * kernel mode -> stopping machine. | |
466 | */ | |
467 | s390_handle_damage("unable to revalidate registers."); | |
468 | } | |
469 | ||
d54853ef MS |
470 | if (mci->cd) { |
471 | /* Timing facility damage */ | |
472 | s390_handle_damage("TOD clock damaged"); | |
473 | } | |
474 | ||
475 | if (mci->ed && mci->ec) { | |
476 | /* External damage */ | |
477 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC)) | |
478 | etr_sync_check(); | |
479 | if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH)) | |
480 | etr_switch_to_local(); | |
481 | } | |
482 | ||
77fa2245 HC |
483 | if (mci->se) |
484 | /* Storage error uncorrected */ | |
485 | s390_handle_damage("received storage error uncorrected " | |
486 | "machine check."); | |
487 | ||
488 | if (mci->ke) | |
489 | /* Storage key-error uncorrected */ | |
490 | s390_handle_damage("received storage key-error uncorrected " | |
491 | "machine check."); | |
492 | ||
493 | if (mci->ds && mci->fa) | |
494 | /* Storage degradation */ | |
495 | s390_handle_damage("received storage degradation machine " | |
496 | "check."); | |
497 | ||
498 | if (mci->cp) { | |
499 | /* Channel report word pending */ | |
500 | mcck->channel_report = 1; | |
501 | set_thread_flag(TIF_MCCK_PENDING); | |
502 | } | |
503 | ||
504 | if (mci->w) { | |
505 | /* Warning pending */ | |
506 | mcck->warning = 1; | |
507 | set_thread_flag(TIF_MCCK_PENDING); | |
508 | } | |
8e9ccae6 | 509 | lockdep_on(); |
1da177e4 LT |
510 | } |
511 | ||
512 | /* | |
513 | * s390_init_machine_check | |
514 | * | |
515 | * initialize machine check handling | |
516 | */ | |
517 | static int | |
518 | machine_check_init(void) | |
519 | { | |
520 | init_MUTEX_LOCKED(&m_sem); | |
d54853ef | 521 | ctl_set_bit(14, 25); /* enable external damage MCH */ |
77fa2245 | 522 | ctl_set_bit(14, 27); /* enable system recovery MCH */ |
1da177e4 LT |
523 | #ifdef CONFIG_MACHCHK_WARNING |
524 | ctl_set_bit(14, 24); /* enable warning MCH */ | |
525 | #endif | |
526 | return 0; | |
527 | } | |
528 | ||
529 | /* | |
530 | * Initialize the machine check handler really early to be able to | |
531 | * catch all machine checks that happen during boot | |
532 | */ | |
533 | arch_initcall(machine_check_init); | |
534 | ||
535 | /* | |
536 | * Machine checks for the channel subsystem must be enabled | |
537 | * after the channel subsystem is initialized | |
538 | */ | |
539 | static int __init | |
540 | machine_check_crw_init (void) | |
541 | { | |
b0f1779a AM |
542 | struct task_struct *task; |
543 | ||
544 | task = kthread_run(s390_collect_crw_info, &m_sem, "kmcheck"); | |
545 | if (IS_ERR(task)) | |
546 | return PTR_ERR(task); | |
1da177e4 LT |
547 | ctl_set_bit(14, 28); /* enable channel report MCH */ |
548 | return 0; | |
549 | } | |
550 | ||
551 | device_initcall (machine_check_crw_init); |