]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/s390/s390mach.h | |
3 | * S/390 data definitions for machine check processing | |
4 | * | |
5 | * S390 version | |
6 | * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
7 | * Author(s): Ingo Adlung (adlung@de.ibm.com) | |
8 | */ | |
9 | ||
10 | #ifndef __s390mach_h | |
11 | #define __s390mach_h | |
12 | ||
13 | #include <asm/types.h> | |
14 | ||
15 | struct mci { | |
16 | __u32 sd : 1; /* 00 system damage */ | |
17 | __u32 pd : 1; /* 01 instruction-processing damage */ | |
18 | __u32 sr : 1; /* 02 system recovery */ | |
77fa2245 HC |
19 | __u32 to_be_defined_1 : 1; /* 03 */ |
20 | __u32 cd : 1; /* 04 timing-facility damage */ | |
21 | __u32 ed : 1; /* 05 external damage */ | |
22 | __u32 to_be_defined_2 : 1; /* 06 */ | |
1da177e4 LT |
23 | __u32 dg : 1; /* 07 degradation */ |
24 | __u32 w : 1; /* 08 warning pending */ | |
25 | __u32 cp : 1; /* 09 channel-report pending */ | |
77fa2245 HC |
26 | __u32 sp : 1; /* 10 service-processor damage */ |
27 | __u32 ck : 1; /* 11 channel-subsystem damage */ | |
28 | __u32 to_be_defined_3 : 2; /* 12-13 */ | |
29 | __u32 b : 1; /* 14 backed up */ | |
30 | __u32 to_be_defined_4 : 1; /* 15 */ | |
1da177e4 LT |
31 | __u32 se : 1; /* 16 storage error uncorrected */ |
32 | __u32 sc : 1; /* 17 storage error corrected */ | |
33 | __u32 ke : 1; /* 18 storage-key error uncorrected */ | |
34 | __u32 ds : 1; /* 19 storage degradation */ | |
77fa2245 HC |
35 | __u32 wp : 1; /* 20 psw mwp validity */ |
36 | __u32 ms : 1; /* 21 psw mask and key validity */ | |
37 | __u32 pm : 1; /* 22 psw program mask and cc validity */ | |
38 | __u32 ia : 1; /* 23 psw instruction address validity */ | |
1da177e4 | 39 | __u32 fa : 1; /* 24 failing storage address validity */ |
77fa2245 HC |
40 | __u32 to_be_defined_5 : 1; /* 25 */ |
41 | __u32 ec : 1; /* 26 external damage code validity */ | |
42 | __u32 fp : 1; /* 27 floating point register validity */ | |
43 | __u32 gr : 1; /* 28 general register validity */ | |
44 | __u32 cr : 1; /* 29 control register validity */ | |
45 | __u32 to_be_defined_6 : 1; /* 30 */ | |
46 | __u32 st : 1; /* 31 storage logical validity */ | |
1da177e4 | 47 | __u32 ie : 1; /* 32 indirect storage error */ |
77fa2245 HC |
48 | __u32 ar : 1; /* 33 access register validity */ |
49 | __u32 da : 1; /* 34 delayed access exception */ | |
50 | __u32 to_be_defined_7 : 7; /* 35-41 */ | |
51 | __u32 pr : 1; /* 42 tod programmable register validity */ | |
52 | __u32 fc : 1; /* 43 fp control register validity */ | |
53 | __u32 ap : 1; /* 44 ancillary report */ | |
54 | __u32 to_be_defined_8 : 1; /* 45 */ | |
55 | __u32 ct : 1; /* 46 cpu timer validity */ | |
56 | __u32 cc : 1; /* 47 clock comparator validity */ | |
57 | __u32 to_be_defined_9 : 16; /* 47-63 */ | |
1da177e4 LT |
58 | }; |
59 | ||
60 | /* | |
61 | * Channel Report Word | |
62 | */ | |
63 | struct crw { | |
64 | __u32 res1 : 1; /* reserved zero */ | |
65 | __u32 slct : 1; /* solicited */ | |
66 | __u32 oflw : 1; /* overflow */ | |
67 | __u32 chn : 1; /* chained */ | |
68 | __u32 rsc : 4; /* reporting source code */ | |
69 | __u32 anc : 1; /* ancillary report */ | |
70 | __u32 res2 : 1; /* reserved zero */ | |
71 | __u32 erc : 6; /* error-recovery code */ | |
72 | __u32 rsid : 16; /* reporting-source ID */ | |
73 | } __attribute__ ((packed)); | |
74 | ||
c1156189 CH |
75 | typedef void (*crw_handler_t)(struct crw *, struct crw *, int); |
76 | ||
77 | extern int s390_register_crw_handler(int rsc, crw_handler_t handler); | |
78 | extern void s390_unregister_crw_handler(int rsc); | |
79 | ||
80 | #define NR_RSCS 16 | |
81 | ||
1da177e4 LT |
82 | #define CRW_RSC_MONITOR 0x2 /* monitoring facility */ |
83 | #define CRW_RSC_SCH 0x3 /* subchannel */ | |
84 | #define CRW_RSC_CPATH 0x4 /* channel path */ | |
85 | #define CRW_RSC_CONFIG 0x9 /* configuration-alert facility */ | |
86 | #define CRW_RSC_CSS 0xB /* channel subsystem */ | |
87 | ||
88 | #define CRW_ERC_EVENT 0x00 /* event information pending */ | |
89 | #define CRW_ERC_AVAIL 0x01 /* available */ | |
90 | #define CRW_ERC_INIT 0x02 /* initialized */ | |
91 | #define CRW_ERC_TERROR 0x03 /* temporary error */ | |
92 | #define CRW_ERC_IPARM 0x04 /* installed parm initialized */ | |
93 | #define CRW_ERC_TERM 0x05 /* terminal */ | |
94 | #define CRW_ERC_PERRN 0x06 /* perm. error, fac. not init */ | |
95 | #define CRW_ERC_PERRI 0x07 /* perm. error, facility init */ | |
96 | #define CRW_ERC_PMOD 0x08 /* installed parameters modified */ | |
97 | ||
4448aaf0 | 98 | static inline int stcrw(struct crw *pcrw ) |
1da177e4 | 99 | { |
46d0d2c8 | 100 | int ccode; |
1da177e4 | 101 | |
46d0d2c8 PO |
102 | __asm__ __volatile__( |
103 | "stcrw 0(%2)\n\t" | |
104 | "ipm %0\n\t" | |
105 | "srl %0,28\n\t" | |
106 | : "=d" (ccode), "=m" (*pcrw) | |
107 | : "a" (pcrw) | |
108 | : "cc" ); | |
109 | return ccode; | |
1da177e4 LT |
110 | } |
111 | ||
d54853ef MS |
112 | #define ED_ETR_SYNC 12 /* External damage ETR sync check */ |
113 | #define ED_ETR_SWITCH 13 /* External damage ETR switch to local */ | |
114 | ||
d2fec595 MS |
115 | #define ED_STP_SYNC 7 /* External damage STP sync check */ |
116 | #define ED_STP_ISLAND 6 /* External damage STP island check */ | |
117 | ||
a806170e HC |
118 | struct pt_regs; |
119 | ||
120 | void s390_handle_mcck(void); | |
121 | void s390_do_machine_check(struct pt_regs *regs); | |
1da177e4 | 122 | #endif /* __s390mach */ |