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1da177e4 LT |
1 | /* |
2 | * NCR 5380 generic driver routines. These should make it *trivial* | |
3 | * to implement 5380 SCSI drivers under Linux with a non-trantor | |
4 | * architecture. | |
5 | * | |
6 | * Note that these routines also work with NR53c400 family chips. | |
7 | * | |
8 | * Copyright 1993, Drew Eckhardt | |
9 | * Visionary Computing | |
10 | * (Unix and Linux consulting and custom programming) | |
11 | * drew@colorado.edu | |
12 | * +1 (303) 666-5836 | |
13 | * | |
1da177e4 LT |
14 | * For more information, please consult |
15 | * | |
16 | * NCR 5380 Family | |
17 | * SCSI Protocol Controller | |
18 | * Databook | |
19 | * | |
20 | * NCR Microelectronics | |
21 | * 1635 Aeroplaza Drive | |
22 | * Colorado Springs, CO 80916 | |
23 | * 1+ (719) 578-3400 | |
24 | * 1+ (800) 334-5454 | |
25 | */ | |
26 | ||
27 | /* | |
1da177e4 | 28 | * Revision 1.10 1998/9/2 Alan Cox |
fa195afe | 29 | * (alan@lxorguk.ukuu.org.uk) |
1da177e4 LT |
30 | * Fixed up the timer lockups reported so far. Things still suck. Looking |
31 | * forward to 2.3 and per device request queues. Then it'll be possible to | |
32 | * SMP thread this beast and improve life no end. | |
33 | ||
34 | * Revision 1.9 1997/7/27 Ronald van Cuijlenborg | |
35 | * (ronald.van.cuijlenborg@tip.nl or nutty@dds.nl) | |
36 | * (hopefully) fixed and enhanced USLEEP | |
37 | * added support for DTC3181E card (for Mustek scanner) | |
38 | * | |
39 | ||
40 | * Revision 1.8 Ingmar Baumgart | |
41 | * (ingmar@gonzo.schwaben.de) | |
42 | * added support for NCR53C400a card | |
43 | * | |
44 | ||
45 | * Revision 1.7 1996/3/2 Ray Van Tassle (rayvt@comm.mot.com) | |
46 | * added proc_info | |
47 | * added support needed for DTC 3180/3280 | |
48 | * fixed a couple of bugs | |
49 | * | |
50 | ||
51 | * Revision 1.5 1994/01/19 09:14:57 drew | |
52 | * Fixed udelay() hack that was being used on DATAOUT phases | |
53 | * instead of a proper wait for the final handshake. | |
54 | * | |
55 | * Revision 1.4 1994/01/19 06:44:25 drew | |
56 | * *** empty log message *** | |
57 | * | |
58 | * Revision 1.3 1994/01/19 05:24:40 drew | |
59 | * Added support for TCR LAST_BYTE_SENT bit. | |
60 | * | |
61 | * Revision 1.2 1994/01/15 06:14:11 drew | |
62 | * REAL DMA support, bug fixes. | |
63 | * | |
64 | * Revision 1.1 1994/01/15 06:00:54 drew | |
65 | * Initial revision | |
66 | * | |
67 | */ | |
68 | ||
69 | /* | |
70 | * Further development / testing that should be done : | |
71 | * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete | |
72 | * code so that everything does the same thing that's done at the | |
73 | * end of a pseudo-DMA read operation. | |
74 | * | |
75 | * 2. Fix REAL_DMA (interrupt driven, polled works fine) - | |
76 | * basically, transfer size needs to be reduced by one | |
77 | * and the last byte read as is done with PSEUDO_DMA. | |
78 | * | |
79 | * 4. Test SCSI-II tagged queueing (I have no devices which support | |
80 | * tagged queueing) | |
1da177e4 LT |
81 | */ |
82 | ||
1da177e4 | 83 | #ifndef notyet |
1da177e4 LT |
84 | #undef REAL_DMA |
85 | #endif | |
86 | ||
1da177e4 LT |
87 | #ifdef BOARD_REQUIRES_NO_DELAY |
88 | #define io_recovery_delay(x) | |
89 | #else | |
90 | #define io_recovery_delay(x) udelay(x) | |
91 | #endif | |
92 | ||
93 | /* | |
94 | * Design | |
95 | * | |
96 | * This is a generic 5380 driver. To use it on a different platform, | |
97 | * one simply writes appropriate system specific macros (ie, data | |
98 | * transfer - some PC's will use the I/O bus, 68K's must use | |
99 | * memory mapped) and drops this file in their 'C' wrapper. | |
100 | * | |
101 | * (Note from hch: unfortunately it was not enough for the different | |
102 | * m68k folks and instead of improving this driver they copied it | |
103 | * and hacked it up for their needs. As a consequence they lost | |
104 | * most updates to this driver. Maybe someone will fix all these | |
105 | * drivers to use a common core one day..) | |
106 | * | |
107 | * As far as command queueing, two queues are maintained for | |
108 | * each 5380 in the system - commands that haven't been issued yet, | |
109 | * and commands that are currently executing. This means that an | |
110 | * unlimited number of commands may be queued, letting | |
111 | * more commands propagate from the higher driver levels giving higher | |
112 | * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, | |
113 | * allowing multiple commands to propagate all the way to a SCSI-II device | |
114 | * while a command is already executing. | |
115 | * | |
116 | * | |
117 | * Issues specific to the NCR5380 : | |
118 | * | |
119 | * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead | |
120 | * piece of hardware that requires you to sit in a loop polling for | |
121 | * the REQ signal as long as you are connected. Some devices are | |
122 | * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect | |
686f3990 | 123 | * while doing long seek operations. [...] These |
1da177e4 LT |
124 | * broken devices are the exception rather than the rule and I'd rather |
125 | * spend my time optimizing for the normal case. | |
126 | * | |
127 | * Architecture : | |
128 | * | |
129 | * At the heart of the design is a coroutine, NCR5380_main, | |
130 | * which is started from a workqueue for each NCR5380 host in the | |
131 | * system. It attempts to establish I_T_L or I_T_L_Q nexuses by | |
132 | * removing the commands from the issue queue and calling | |
133 | * NCR5380_select() if a nexus is not established. | |
134 | * | |
135 | * Once a nexus is established, the NCR5380_information_transfer() | |
136 | * phase goes through the various phases as instructed by the target. | |
137 | * if the target goes into MSG IN and sends a DISCONNECT message, | |
138 | * the command structure is placed into the per instance disconnected | |
139 | * queue, and NCR5380_main tries to find more work. If the target is | |
140 | * idle for too long, the system will try to sleep. | |
141 | * | |
142 | * If a command has disconnected, eventually an interrupt will trigger, | |
143 | * calling NCR5380_intr() which will in turn call NCR5380_reselect | |
144 | * to reestablish a nexus. This will run main if necessary. | |
145 | * | |
146 | * On command termination, the done function will be called as | |
147 | * appropriate. | |
148 | * | |
149 | * SCSI pointers are maintained in the SCp field of SCSI command | |
150 | * structures, being initialized after the command is connected | |
151 | * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. | |
152 | * Note that in violation of the standard, an implicit SAVE POINTERS operation | |
153 | * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. | |
154 | */ | |
155 | ||
156 | /* | |
157 | * Using this file : | |
158 | * This file a skeleton Linux SCSI driver for the NCR 5380 series | |
159 | * of chips. To use it, you write an architecture specific functions | |
160 | * and macros and include this file in your driver. | |
161 | * | |
162 | * These macros control options : | |
163 | * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be | |
164 | * defined. | |
165 | * | |
166 | * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically | |
167 | * for commands that return with a CHECK CONDITION status. | |
168 | * | |
169 | * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential | |
170 | * transceivers. | |
171 | * | |
172 | * DONT_USE_INTR - if defined, never use interrupts, even if we probe or | |
173 | * override-configure an IRQ. | |
174 | * | |
1da177e4 LT |
175 | * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases. |
176 | * | |
177 | * REAL_DMA - if defined, REAL DMA is used during the data transfer phases. | |
178 | * | |
179 | * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't | |
180 | * rely on phase mismatch and EOP interrupts to determine end | |
181 | * of phase. | |
182 | * | |
1da177e4 LT |
183 | * Defaults for these will be provided although the user may want to adjust |
184 | * these to allocate CPU resources to the SCSI driver or "real" code. | |
185 | * | |
1da177e4 | 186 | * These macros MUST be defined : |
1da177e4 LT |
187 | * |
188 | * NCR5380_read(register) - read from the specified register | |
189 | * | |
190 | * NCR5380_write(register, value) - write to the specific register | |
191 | * | |
192 | * NCR5380_implementation_fields - additional fields needed for this | |
193 | * specific implementation of the NCR5380 | |
194 | * | |
195 | * Either real DMA *or* pseudo DMA may be implemented | |
196 | * REAL functions : | |
197 | * NCR5380_REAL_DMA should be defined if real DMA is to be used. | |
198 | * Note that the DMA setup functions should return the number of bytes | |
199 | * that they were able to program the controller for. | |
200 | * | |
201 | * Also note that generic i386/PC versions of these macros are | |
202 | * available as NCR5380_i386_dma_write_setup, | |
203 | * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual. | |
204 | * | |
205 | * NCR5380_dma_write_setup(instance, src, count) - initialize | |
206 | * NCR5380_dma_read_setup(instance, dst, count) - initialize | |
207 | * NCR5380_dma_residual(instance); - residual count | |
208 | * | |
209 | * PSEUDO functions : | |
210 | * NCR5380_pwrite(instance, src, count) | |
211 | * NCR5380_pread(instance, dst, count); | |
212 | * | |
213 | * The generic driver is initialized by calling NCR5380_init(instance), | |
214 | * after setting the appropriate host specific fields and ID. If the | |
215 | * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance, | |
216 | * possible) function may be used. | |
217 | */ | |
218 | ||
54d8fe44 FT |
219 | static int do_abort(struct Scsi_Host *); |
220 | static void do_reset(struct Scsi_Host *); | |
1da177e4 LT |
221 | |
222 | /* | |
223 | * initialize_SCp - init the scsi pointer field | |
224 | * @cmd: command block to set up | |
225 | * | |
226 | * Set up the internal fields in the SCSI command. | |
227 | */ | |
228 | ||
710ddd0d | 229 | static inline void initialize_SCp(struct scsi_cmnd *cmd) |
1da177e4 LT |
230 | { |
231 | /* | |
232 | * Initialize the Scsi Pointer field so that all of the commands in the | |
233 | * various queues are valid. | |
234 | */ | |
235 | ||
9e0fe44d BH |
236 | if (scsi_bufflen(cmd)) { |
237 | cmd->SCp.buffer = scsi_sglist(cmd); | |
238 | cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; | |
45711f1a | 239 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
1da177e4 LT |
240 | cmd->SCp.this_residual = cmd->SCp.buffer->length; |
241 | } else { | |
242 | cmd->SCp.buffer = NULL; | |
243 | cmd->SCp.buffers_residual = 0; | |
9e0fe44d BH |
244 | cmd->SCp.ptr = NULL; |
245 | cmd->SCp.this_residual = 0; | |
1da177e4 | 246 | } |
f27db8eb FT |
247 | |
248 | cmd->SCp.Status = 0; | |
249 | cmd->SCp.Message = 0; | |
1da177e4 LT |
250 | } |
251 | ||
252 | /** | |
b32ade12 | 253 | * NCR5380_poll_politely2 - wait for two chip register values |
2f854b82 | 254 | * @instance: controller to poll |
b32ade12 FT |
255 | * @reg1: 5380 register to poll |
256 | * @bit1: Bitmask to check | |
257 | * @val1: Expected value | |
258 | * @reg2: Second 5380 register to poll | |
259 | * @bit2: Second bitmask to check | |
260 | * @val2: Second expected value | |
2f854b82 FT |
261 | * @wait: Time-out in jiffies |
262 | * | |
263 | * Polls the chip in a reasonably efficient manner waiting for an | |
264 | * event to occur. After a short quick poll we begin to yield the CPU | |
265 | * (if possible). In irq contexts the time-out is arbitrarily limited. | |
266 | * Callers may hold locks as long as they are held in irq mode. | |
267 | * | |
b32ade12 | 268 | * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. |
1da177e4 | 269 | */ |
2f854b82 | 270 | |
b32ade12 FT |
271 | static int NCR5380_poll_politely2(struct Scsi_Host *instance, |
272 | int reg1, int bit1, int val1, | |
273 | int reg2, int bit2, int val2, int wait) | |
1da177e4 | 274 | { |
2f854b82 FT |
275 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
276 | unsigned long deadline = jiffies + wait; | |
277 | unsigned long n; | |
278 | ||
279 | /* Busy-wait for up to 10 ms */ | |
280 | n = min(10000U, jiffies_to_usecs(wait)); | |
281 | n *= hostdata->accesses_per_ms; | |
b32ade12 | 282 | n /= 2000; |
2f854b82 | 283 | do { |
b32ade12 FT |
284 | if ((NCR5380_read(reg1) & bit1) == val1) |
285 | return 0; | |
286 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 LT |
287 | return 0; |
288 | cpu_relax(); | |
2f854b82 FT |
289 | } while (n--); |
290 | ||
291 | if (irqs_disabled() || in_interrupt()) | |
292 | return -ETIMEDOUT; | |
293 | ||
294 | /* Repeatedly sleep for 1 ms until deadline */ | |
295 | while (time_is_after_jiffies(deadline)) { | |
296 | schedule_timeout_uninterruptible(1); | |
b32ade12 FT |
297 | if ((NCR5380_read(reg1) & bit1) == val1) |
298 | return 0; | |
299 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 | 300 | return 0; |
1da177e4 | 301 | } |
2f854b82 | 302 | |
1da177e4 LT |
303 | return -ETIMEDOUT; |
304 | } | |
305 | ||
b32ade12 FT |
306 | static inline int NCR5380_poll_politely(struct Scsi_Host *instance, |
307 | int reg, int bit, int val, int wait) | |
308 | { | |
309 | return NCR5380_poll_politely2(instance, reg, bit, val, | |
310 | reg, bit, val, wait); | |
311 | } | |
312 | ||
1da177e4 LT |
313 | static struct { |
314 | unsigned char value; | |
315 | const char *name; | |
702809ce | 316 | } phases[] __maybe_unused = { |
1da177e4 LT |
317 | {PHASE_DATAOUT, "DATAOUT"}, |
318 | {PHASE_DATAIN, "DATAIN"}, | |
319 | {PHASE_CMDOUT, "CMDOUT"}, | |
320 | {PHASE_STATIN, "STATIN"}, | |
321 | {PHASE_MSGOUT, "MSGOUT"}, | |
322 | {PHASE_MSGIN, "MSGIN"}, | |
323 | {PHASE_UNKNOWN, "UNKNOWN"} | |
324 | }; | |
325 | ||
185a7a1c | 326 | #if NDEBUG |
1da177e4 LT |
327 | static struct { |
328 | unsigned char mask; | |
329 | const char *name; | |
330 | } signals[] = { | |
331 | {SR_DBP, "PARITY"}, | |
332 | {SR_RST, "RST"}, | |
333 | {SR_BSY, "BSY"}, | |
334 | {SR_REQ, "REQ"}, | |
335 | {SR_MSG, "MSG"}, | |
336 | {SR_CD, "CD"}, | |
337 | {SR_IO, "IO"}, | |
338 | {SR_SEL, "SEL"}, | |
339 | {0, NULL} | |
340 | }, | |
341 | basrs[] = { | |
342 | {BASR_ATN, "ATN"}, | |
343 | {BASR_ACK, "ACK"}, | |
344 | {0, NULL} | |
345 | }, | |
346 | icrs[] = { | |
347 | {ICR_ASSERT_RST, "ASSERT RST"}, | |
348 | {ICR_ASSERT_ACK, "ASSERT ACK"}, | |
349 | {ICR_ASSERT_BSY, "ASSERT BSY"}, | |
350 | {ICR_ASSERT_SEL, "ASSERT SEL"}, | |
351 | {ICR_ASSERT_ATN, "ASSERT ATN"}, | |
352 | {ICR_ASSERT_DATA, "ASSERT DATA"}, | |
353 | {0, NULL} | |
354 | }, | |
355 | mrs[] = { | |
356 | {MR_BLOCK_DMA_MODE, "MODE BLOCK DMA"}, | |
357 | {MR_TARGET, "MODE TARGET"}, | |
358 | {MR_ENABLE_PAR_CHECK, "MODE PARITY CHECK"}, | |
359 | {MR_ENABLE_PAR_INTR, "MODE PARITY INTR"}, | |
360 | {MR_MONITOR_BSY, "MODE MONITOR BSY"}, | |
361 | {MR_DMA_MODE, "MODE DMA"}, | |
362 | {MR_ARBITRATE, "MODE ARBITRATION"}, | |
363 | {0, NULL} | |
364 | }; | |
365 | ||
366 | /** | |
367 | * NCR5380_print - print scsi bus signals | |
368 | * @instance: adapter state to dump | |
369 | * | |
370 | * Print the SCSI bus signals for debugging purposes | |
371 | * | |
372 | * Locks: caller holds hostdata lock (not essential) | |
373 | */ | |
374 | ||
375 | static void NCR5380_print(struct Scsi_Host *instance) | |
376 | { | |
1da177e4 | 377 | unsigned char status, data, basr, mr, icr, i; |
1da177e4 LT |
378 | |
379 | data = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
380 | status = NCR5380_read(STATUS_REG); | |
381 | mr = NCR5380_read(MODE_REG); | |
382 | icr = NCR5380_read(INITIATOR_COMMAND_REG); | |
383 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
384 | ||
385 | printk("STATUS_REG: %02x ", status); | |
386 | for (i = 0; signals[i].mask; ++i) | |
387 | if (status & signals[i].mask) | |
388 | printk(",%s", signals[i].name); | |
389 | printk("\nBASR: %02x ", basr); | |
390 | for (i = 0; basrs[i].mask; ++i) | |
391 | if (basr & basrs[i].mask) | |
392 | printk(",%s", basrs[i].name); | |
393 | printk("\nICR: %02x ", icr); | |
394 | for (i = 0; icrs[i].mask; ++i) | |
395 | if (icr & icrs[i].mask) | |
396 | printk(",%s", icrs[i].name); | |
397 | printk("\nMODE: %02x ", mr); | |
398 | for (i = 0; mrs[i].mask; ++i) | |
399 | if (mr & mrs[i].mask) | |
400 | printk(",%s", mrs[i].name); | |
401 | printk("\n"); | |
402 | } | |
403 | ||
404 | ||
405 | /* | |
406 | * NCR5380_print_phase - show SCSI phase | |
407 | * @instance: adapter to dump | |
408 | * | |
409 | * Print the current SCSI phase for debugging purposes | |
410 | * | |
411 | * Locks: none | |
412 | */ | |
413 | ||
414 | static void NCR5380_print_phase(struct Scsi_Host *instance) | |
415 | { | |
1da177e4 LT |
416 | unsigned char status; |
417 | int i; | |
1da177e4 LT |
418 | |
419 | status = NCR5380_read(STATUS_REG); | |
420 | if (!(status & SR_REQ)) | |
421 | printk("scsi%d : REQ not asserted, phase unknown.\n", instance->host_no); | |
422 | else { | |
423 | for (i = 0; (phases[i].value != PHASE_UNKNOWN) && (phases[i].value != (status & PHASE_MASK)); ++i); | |
424 | printk("scsi%d : phase %s\n", instance->host_no, phases[i].name); | |
425 | } | |
426 | } | |
427 | #endif | |
428 | ||
1da177e4 | 429 | |
d5f7e65d | 430 | static int probe_irq __initdata; |
1da177e4 LT |
431 | |
432 | /** | |
433 | * probe_intr - helper for IRQ autoprobe | |
434 | * @irq: interrupt number | |
435 | * @dev_id: unused | |
436 | * @regs: unused | |
437 | * | |
438 | * Set a flag to indicate the IRQ in question was received. This is | |
439 | * used by the IRQ probe code. | |
440 | */ | |
441 | ||
7d12e780 | 442 | static irqreturn_t __init probe_intr(int irq, void *dev_id) |
1da177e4 LT |
443 | { |
444 | probe_irq = irq; | |
445 | return IRQ_HANDLED; | |
446 | } | |
447 | ||
448 | /** | |
449 | * NCR5380_probe_irq - find the IRQ of an NCR5380 | |
450 | * @instance: NCR5380 controller | |
451 | * @possible: bitmask of ISA IRQ lines | |
452 | * | |
453 | * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ | |
454 | * and then looking to see what interrupt actually turned up. | |
455 | * | |
456 | * Locks: none, irqs must be enabled on entry | |
457 | */ | |
458 | ||
702809ce AM |
459 | static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance, |
460 | int possible) | |
1da177e4 | 461 | { |
e8a60144 | 462 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
463 | unsigned long timeout; |
464 | int trying_irqs, i, mask; | |
1da177e4 | 465 | |
22f5f10d | 466 | for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
4909cc2b | 467 | if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0)) |
1da177e4 LT |
468 | trying_irqs |= mask; |
469 | ||
4e5a800c | 470 | timeout = jiffies + msecs_to_jiffies(250); |
22f5f10d | 471 | probe_irq = NO_IRQ; |
1da177e4 LT |
472 | |
473 | /* | |
474 | * A interrupt is triggered whenever BSY = false, SEL = true | |
475 | * and a bit set in the SELECT_ENABLE_REG is asserted on the | |
476 | * SCSI bus. | |
477 | * | |
478 | * Note that the bus is only driven when the phase control signals | |
479 | * (I/O, C/D, and MSG) match those in the TCR, so we must reset that | |
480 | * to zero. | |
481 | */ | |
482 | ||
483 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
484 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
485 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
486 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL); | |
487 | ||
22f5f10d | 488 | while (probe_irq == NO_IRQ && time_before(jiffies, timeout)) |
a9a3047d | 489 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
490 | |
491 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
492 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
493 | ||
22f5f10d | 494 | for (i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
1da177e4 LT |
495 | if (trying_irqs & mask) |
496 | free_irq(i, NULL); | |
497 | ||
498 | return probe_irq; | |
499 | } | |
500 | ||
501 | /** | |
8c32513b FT |
502 | * NCR58380_info - report driver and host information |
503 | * @instance: relevant scsi host instance | |
1da177e4 | 504 | * |
8c32513b | 505 | * For use as the host template info() handler. |
1da177e4 LT |
506 | * |
507 | * Locks: none | |
508 | */ | |
509 | ||
8c32513b | 510 | static const char *NCR5380_info(struct Scsi_Host *instance) |
1da177e4 | 511 | { |
8c32513b FT |
512 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
513 | ||
514 | return hostdata->info; | |
515 | } | |
516 | ||
517 | static void prepare_info(struct Scsi_Host *instance) | |
518 | { | |
519 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
520 | ||
521 | snprintf(hostdata->info, sizeof(hostdata->info), | |
522 | "%s, io_port 0x%lx, n_io_port %d, " | |
523 | "base 0x%lx, irq %d, " | |
524 | "can_queue %d, cmd_per_lun %d, " | |
525 | "sg_tablesize %d, this_id %d, " | |
be3f4121 | 526 | "flags { %s%s%s}, " |
8c32513b FT |
527 | "options { %s} ", |
528 | instance->hostt->name, instance->io_port, instance->n_io_port, | |
529 | instance->base, instance->irq, | |
530 | instance->can_queue, instance->cmd_per_lun, | |
531 | instance->sg_tablesize, instance->this_id, | |
55181be8 | 532 | hostdata->flags & FLAG_NO_DMA_FIXUP ? "NO_DMA_FIXUP " : "", |
8c32513b | 533 | hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", |
9c3f0e2b | 534 | hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "", |
1da177e4 | 535 | #ifdef AUTOPROBE_IRQ |
8c32513b | 536 | "AUTOPROBE_IRQ " |
1da177e4 | 537 | #endif |
1da177e4 | 538 | #ifdef DIFFERENTIAL |
8c32513b | 539 | "DIFFERENTIAL " |
1da177e4 LT |
540 | #endif |
541 | #ifdef REAL_DMA | |
8c32513b | 542 | "REAL_DMA " |
1da177e4 LT |
543 | #endif |
544 | #ifdef REAL_DMA_POLL | |
8c32513b | 545 | "REAL_DMA_POLL " |
1da177e4 LT |
546 | #endif |
547 | #ifdef PARITY | |
8c32513b | 548 | "PARITY " |
1da177e4 LT |
549 | #endif |
550 | #ifdef PSEUDO_DMA | |
8c32513b | 551 | "PSEUDO_DMA " |
8c32513b FT |
552 | #endif |
553 | ""); | |
1da177e4 LT |
554 | } |
555 | ||
a9c2dc43 | 556 | #ifdef PSEUDO_DMA |
1da177e4 LT |
557 | /******************************************/ |
558 | /* | |
559 | * /proc/scsi/[dtc pas16 t128 generic]/[0-ASC_NUM_BOARD_SUPPORTED] | |
560 | * | |
561 | * *buffer: I/O buffer | |
562 | * **start: if inout == FALSE pointer into buffer where user read should start | |
563 | * offset: current offset | |
564 | * length: length of buffer | |
565 | * hostno: Scsi_Host host_no | |
566 | * inout: TRUE - user is writing; FALSE - user is reading | |
567 | * | |
568 | * Return the number of bytes read from or written | |
569 | */ | |
570 | ||
dd7ab71b AV |
571 | static int __maybe_unused NCR5380_write_info(struct Scsi_Host *instance, |
572 | char *buffer, int length) | |
573 | { | |
a9c2dc43 FT |
574 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
575 | ||
576 | hostdata->spin_max_r = 0; | |
577 | hostdata->spin_max_w = 0; | |
578 | return 0; | |
dd7ab71b | 579 | } |
1da177e4 | 580 | |
dd7ab71b AV |
581 | static int __maybe_unused NCR5380_show_info(struct seq_file *m, |
582 | struct Scsi_Host *instance) | |
1da177e4 | 583 | { |
e8a60144 | 584 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 585 | |
0c3de38f | 586 | seq_printf(m, "Highwater I/O busy spin counts: write %d, read %d\n", |
a9c2dc43 | 587 | hostdata->spin_max_w, hostdata->spin_max_r); |
dd7ab71b | 588 | return 0; |
1da177e4 | 589 | } |
e5c3fddf | 590 | #endif |
1da177e4 LT |
591 | |
592 | /** | |
593 | * NCR5380_init - initialise an NCR5380 | |
594 | * @instance: adapter to configure | |
595 | * @flags: control flags | |
596 | * | |
597 | * Initializes *instance and corresponding 5380 chip, | |
598 | * with flags OR'd into the initial flags value. | |
599 | * | |
600 | * Notes : I assume that the host, hostno, and id bits have been | |
601 | * set correctly. I don't care about the irq and other fields. | |
602 | * | |
603 | * Returns 0 for success | |
604 | * | |
605 | * Locks: interrupts must be enabled when we are called | |
606 | */ | |
607 | ||
6f039790 | 608 | static int NCR5380_init(struct Scsi_Host *instance, int flags) |
1da177e4 | 609 | { |
e8a60144 | 610 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 611 | int i; |
2f854b82 | 612 | unsigned long deadline; |
1da177e4 LT |
613 | |
614 | if(in_interrupt()) | |
615 | printk(KERN_ERR "NCR5380_init called with interrupts off!\n"); | |
1da177e4 | 616 | |
1da177e4 LT |
617 | hostdata->id_mask = 1 << instance->this_id; |
618 | for (i = hostdata->id_mask; i <= 0x80; i <<= 1) | |
619 | if (i > hostdata->id_mask) | |
620 | hostdata->id_higher_mask |= i; | |
621 | for (i = 0; i < 8; ++i) | |
622 | hostdata->busy[i] = 0; | |
623 | #ifdef REAL_DMA | |
624 | hostdata->dmalen = 0; | |
625 | #endif | |
11d2f63b | 626 | spin_lock_init(&hostdata->lock); |
1da177e4 | 627 | hostdata->connected = NULL; |
f27db8eb FT |
628 | hostdata->sensing = NULL; |
629 | INIT_LIST_HEAD(&hostdata->autosense); | |
32b26a10 FT |
630 | INIT_LIST_HEAD(&hostdata->unissued); |
631 | INIT_LIST_HEAD(&hostdata->disconnected); | |
632 | ||
55181be8 | 633 | hostdata->flags = flags; |
1da177e4 | 634 | |
8d8601a7 | 635 | INIT_WORK(&hostdata->main_task, NCR5380_main); |
0ad0eff9 FT |
636 | hostdata->work_q = alloc_workqueue("ncr5380_%d", |
637 | WQ_UNBOUND | WQ_MEM_RECLAIM, | |
638 | 1, instance->host_no); | |
639 | if (!hostdata->work_q) | |
640 | return -ENOMEM; | |
641 | ||
1da177e4 | 642 | hostdata->host = instance; |
1da177e4 | 643 | |
8c32513b FT |
644 | prepare_info(instance); |
645 | ||
1da177e4 LT |
646 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
647 | NCR5380_write(MODE_REG, MR_BASE); | |
648 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
649 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2f854b82 FT |
650 | |
651 | /* Calibrate register polling loop */ | |
652 | i = 0; | |
653 | deadline = jiffies + 1; | |
654 | do { | |
655 | cpu_relax(); | |
656 | } while (time_is_after_jiffies(deadline)); | |
657 | deadline += msecs_to_jiffies(256); | |
658 | do { | |
659 | NCR5380_read(STATUS_REG); | |
660 | ++i; | |
661 | cpu_relax(); | |
662 | } while (time_is_after_jiffies(deadline)); | |
663 | hostdata->accesses_per_ms = i / 256; | |
664 | ||
b6488f97 FT |
665 | return 0; |
666 | } | |
1da177e4 | 667 | |
b6488f97 FT |
668 | /** |
669 | * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. | |
670 | * @instance: adapter to check | |
671 | * | |
672 | * If the system crashed, it may have crashed with a connected target and | |
673 | * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the | |
674 | * currently established nexus, which we know nothing about. Failing that | |
675 | * do a bus reset. | |
676 | * | |
677 | * Note that a bus reset will cause the chip to assert IRQ. | |
678 | * | |
679 | * Returns 0 if successful, otherwise -ENXIO. | |
680 | */ | |
681 | ||
682 | static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) | |
683 | { | |
9c3f0e2b | 684 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 685 | int pass; |
1da177e4 LT |
686 | |
687 | for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { | |
688 | switch (pass) { | |
689 | case 1: | |
690 | case 3: | |
691 | case 5: | |
636b1ec8 FT |
692 | shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); |
693 | NCR5380_poll_politely(instance, | |
694 | STATUS_REG, SR_BSY, 0, 5 * HZ); | |
1da177e4 LT |
695 | break; |
696 | case 2: | |
636b1ec8 | 697 | shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); |
1da177e4 LT |
698 | do_abort(instance); |
699 | break; | |
700 | case 4: | |
636b1ec8 | 701 | shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); |
1da177e4 | 702 | do_reset(instance); |
9c3f0e2b FT |
703 | /* Wait after a reset; the SCSI standard calls for |
704 | * 250ms, we wait 500ms to be on the safe side. | |
705 | * But some Toshiba CD-ROMs need ten times that. | |
706 | */ | |
707 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
708 | msleep(2500); | |
709 | else | |
710 | msleep(500); | |
1da177e4 LT |
711 | break; |
712 | case 6: | |
636b1ec8 | 713 | shost_printk(KERN_ERR, instance, "bus locked solid\n"); |
1da177e4 LT |
714 | return -ENXIO; |
715 | } | |
716 | } | |
717 | return 0; | |
718 | } | |
719 | ||
720 | /** | |
721 | * NCR5380_exit - remove an NCR5380 | |
722 | * @instance: adapter to remove | |
723 | */ | |
724 | ||
a43cf0f3 | 725 | static void NCR5380_exit(struct Scsi_Host *instance) |
1da177e4 | 726 | { |
e8a60144 | 727 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 728 | |
8d8601a7 | 729 | cancel_work_sync(&hostdata->main_task); |
0ad0eff9 | 730 | destroy_workqueue(hostdata->work_q); |
1da177e4 LT |
731 | } |
732 | ||
677e0194 FT |
733 | /** |
734 | * complete_cmd - finish processing a command and return it to the SCSI ML | |
735 | * @instance: the host instance | |
736 | * @cmd: command to complete | |
737 | */ | |
738 | ||
739 | static void complete_cmd(struct Scsi_Host *instance, | |
740 | struct scsi_cmnd *cmd) | |
741 | { | |
742 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
743 | ||
744 | dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); | |
745 | ||
f27db8eb FT |
746 | if (hostdata->sensing == cmd) { |
747 | /* Autosense processing ends here */ | |
748 | if ((cmd->result & 0xff) != SAM_STAT_GOOD) { | |
749 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
750 | set_host_byte(cmd, DID_ERROR); | |
751 | } else | |
752 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
753 | hostdata->sensing = NULL; | |
754 | } | |
755 | ||
677e0194 FT |
756 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
757 | ||
758 | cmd->scsi_done(cmd); | |
759 | } | |
760 | ||
1da177e4 | 761 | /** |
1bb40589 FT |
762 | * NCR5380_queue_command - queue a command |
763 | * @instance: the relevant SCSI adapter | |
764 | * @cmd: SCSI command | |
1da177e4 | 765 | * |
1bb40589 FT |
766 | * cmd is added to the per-instance issue queue, with minor |
767 | * twiddling done to the host specific fields of cmd. If the | |
768 | * main coroutine is not running, it is restarted. | |
1da177e4 LT |
769 | */ |
770 | ||
1bb40589 FT |
771 | static int NCR5380_queue_command(struct Scsi_Host *instance, |
772 | struct scsi_cmnd *cmd) | |
1da177e4 | 773 | { |
1bb40589 | 774 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
32b26a10 | 775 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1bb40589 | 776 | unsigned long flags; |
1da177e4 LT |
777 | |
778 | #if (NDEBUG & NDEBUG_NO_WRITE) | |
779 | switch (cmd->cmnd[0]) { | |
780 | case WRITE_6: | |
781 | case WRITE_10: | |
dbb6b350 | 782 | shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); |
1da177e4 | 783 | cmd->result = (DID_ERROR << 16); |
1bb40589 | 784 | cmd->scsi_done(cmd); |
1da177e4 LT |
785 | return 0; |
786 | } | |
787 | #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ | |
788 | ||
1da177e4 LT |
789 | cmd->result = 0; |
790 | ||
11d2f63b | 791 | spin_lock_irqsave(&hostdata->lock, flags); |
1bb40589 | 792 | |
1da177e4 LT |
793 | /* |
794 | * Insert the cmd into the issue queue. Note that REQUEST SENSE | |
795 | * commands are added to the head of the queue since any command will | |
796 | * clear the contingent allegiance condition that exists and the | |
797 | * sense data is only guaranteed to be valid while the condition exists. | |
798 | */ | |
799 | ||
32b26a10 FT |
800 | if (cmd->cmnd[0] == REQUEST_SENSE) |
801 | list_add(&ncmd->list, &hostdata->unissued); | |
802 | else | |
803 | list_add_tail(&ncmd->list, &hostdata->unissued); | |
804 | ||
11d2f63b | 805 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1bb40589 | 806 | |
dbb6b350 FT |
807 | dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", |
808 | cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); | |
1da177e4 | 809 | |
1da177e4 | 810 | /* Kick off command processing */ |
8d8601a7 | 811 | queue_work(hostdata->work_q, &hostdata->main_task); |
1da177e4 LT |
812 | return 0; |
813 | } | |
814 | ||
f27db8eb FT |
815 | /** |
816 | * dequeue_next_cmd - dequeue a command for processing | |
817 | * @instance: the scsi host instance | |
818 | * | |
819 | * Priority is given to commands on the autosense queue. These commands | |
820 | * need autosense because of a CHECK CONDITION result. | |
821 | * | |
822 | * Returns a command pointer if a command is found for a target that is | |
823 | * not already busy. Otherwise returns NULL. | |
824 | */ | |
825 | ||
826 | static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) | |
827 | { | |
828 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
829 | struct NCR5380_cmd *ncmd; | |
830 | struct scsi_cmnd *cmd; | |
831 | ||
832 | if (list_empty(&hostdata->autosense)) { | |
833 | list_for_each_entry(ncmd, &hostdata->unissued, list) { | |
834 | cmd = NCR5380_to_scmd(ncmd); | |
835 | dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", | |
836 | cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); | |
837 | ||
838 | if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { | |
839 | list_del(&ncmd->list); | |
840 | dsprintk(NDEBUG_QUEUES, instance, | |
841 | "dequeue: removed %p from issue queue\n", cmd); | |
842 | return cmd; | |
843 | } | |
844 | } | |
845 | } else { | |
846 | /* Autosense processing begins here */ | |
847 | ncmd = list_first_entry(&hostdata->autosense, | |
848 | struct NCR5380_cmd, list); | |
849 | list_del(&ncmd->list); | |
850 | cmd = NCR5380_to_scmd(ncmd); | |
851 | dsprintk(NDEBUG_QUEUES, instance, | |
852 | "dequeue: removed %p from autosense queue\n", cmd); | |
853 | scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); | |
854 | hostdata->sensing = cmd; | |
855 | return cmd; | |
856 | } | |
857 | return NULL; | |
858 | } | |
859 | ||
860 | static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
861 | { | |
862 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
863 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
864 | ||
865 | if (hostdata->sensing) { | |
866 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
867 | list_add(&ncmd->list, &hostdata->autosense); | |
868 | hostdata->sensing = NULL; | |
869 | } else | |
870 | list_add(&ncmd->list, &hostdata->unissued); | |
871 | } | |
872 | ||
1da177e4 LT |
873 | /** |
874 | * NCR5380_main - NCR state machines | |
875 | * | |
876 | * NCR5380_main is a coroutine that runs as long as more work can | |
877 | * be done on the NCR5380 host adapters in a system. Both | |
878 | * NCR5380_queue_command() and NCR5380_intr() will try to start it | |
879 | * in case it is not running. | |
880 | * | |
881 | * Locks: called as its own thread with no locks held. Takes the | |
882 | * host lock and called routines may take the isa dma lock. | |
883 | */ | |
884 | ||
c4028958 | 885 | static void NCR5380_main(struct work_struct *work) |
1da177e4 | 886 | { |
c4028958 | 887 | struct NCR5380_hostdata *hostdata = |
8d8601a7 | 888 | container_of(work, struct NCR5380_hostdata, main_task); |
1da177e4 | 889 | struct Scsi_Host *instance = hostdata->host; |
f27db8eb | 890 | struct scsi_cmnd *cmd; |
1da177e4 LT |
891 | int done; |
892 | ||
11d2f63b | 893 | spin_lock_irq(&hostdata->lock); |
1da177e4 | 894 | do { |
1da177e4 | 895 | done = 1; |
11d2f63b | 896 | |
f27db8eb FT |
897 | while (!hostdata->connected && |
898 | (cmd = dequeue_next_cmd(instance))) { | |
1da177e4 | 899 | |
f27db8eb | 900 | dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); |
76f13b93 | 901 | |
f27db8eb FT |
902 | /* |
903 | * Attempt to establish an I_T_L nexus here. | |
904 | * On success, instance->hostdata->connected is set. | |
905 | * On failure, we must add the command back to the | |
906 | * issue queue so we can keep trying. | |
907 | */ | |
908 | /* | |
909 | * REQUEST SENSE commands are issued without tagged | |
910 | * queueing, even on SCSI-II devices because the | |
911 | * contingent allegiance condition exists for the | |
912 | * entire unit. | |
913 | */ | |
11d2f63b | 914 | |
f27db8eb FT |
915 | if (!NCR5380_select(instance, cmd)) { |
916 | dsprintk(NDEBUG_MAIN, instance, "main: selected target %d for command %p\n", | |
917 | scmd_id(cmd), cmd); | |
918 | } else { | |
919 | dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, | |
920 | "main: select failed, returning %p to queue\n", cmd); | |
921 | requeue_cmd(instance, cmd); | |
922 | } | |
923 | } | |
1da177e4 LT |
924 | if (hostdata->connected |
925 | #ifdef REAL_DMA | |
926 | && !hostdata->dmalen | |
927 | #endif | |
1da177e4 | 928 | ) { |
52a6a1cb | 929 | dprintk(NDEBUG_MAIN, "scsi%d : main() : performing information transfer\n", instance->host_no); |
1da177e4 | 930 | NCR5380_information_transfer(instance); |
52a6a1cb | 931 | dprintk(NDEBUG_MAIN, "scsi%d : main() : done set false\n", instance->host_no); |
1da177e4 | 932 | done = 0; |
1d3db59d | 933 | } |
1da177e4 | 934 | } while (!done); |
11d2f63b | 935 | spin_unlock_irq(&hostdata->lock); |
1da177e4 LT |
936 | } |
937 | ||
938 | #ifndef DONT_USE_INTR | |
939 | ||
940 | /** | |
cd400825 FT |
941 | * NCR5380_intr - generic NCR5380 irq handler |
942 | * @irq: interrupt number | |
943 | * @dev_id: device info | |
944 | * | |
945 | * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses | |
946 | * from the disconnected queue, and restarting NCR5380_main() | |
947 | * as required. | |
948 | * | |
949 | * The chip can assert IRQ in any of six different conditions. The IRQ flag | |
950 | * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). | |
951 | * Three of these six conditions are latched in the Bus and Status Register: | |
952 | * - End of DMA (cleared by ending DMA Mode) | |
953 | * - Parity error (cleared by reading RPIR) | |
954 | * - Loss of BSY (cleared by reading RPIR) | |
955 | * Two conditions have flag bits that are not latched: | |
956 | * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) | |
957 | * - Bus reset (non-maskable) | |
958 | * The remaining condition has no flag bit at all: | |
959 | * - Selection/reselection | |
960 | * | |
961 | * Hence, establishing the cause(s) of any interrupt is partly guesswork. | |
962 | * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor | |
963 | * claimed that "the design of the [DP8490] interrupt logic ensures | |
964 | * interrupts will not be lost (they can be on the DP5380)." | |
965 | * The L5380/53C80 datasheet from LOGIC Devices has more details. | |
966 | * | |
967 | * Checking for bus reset by reading RST is futile because of interrupt | |
968 | * latency, but a bus reset will reset chip logic. Checking for parity error | |
969 | * is unnecessary because that interrupt is never enabled. A Loss of BSY | |
970 | * condition will clear DMA Mode. We can tell when this occurs because the | |
971 | * the Busy Monitor interrupt is enabled together with DMA Mode. | |
1da177e4 LT |
972 | */ |
973 | ||
cd400825 | 974 | static irqreturn_t NCR5380_intr(int irq, void *dev_id) |
1da177e4 | 975 | { |
baa9aac6 | 976 | struct Scsi_Host *instance = dev_id; |
cd400825 FT |
977 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
978 | int handled = 0; | |
1da177e4 LT |
979 | unsigned char basr; |
980 | unsigned long flags; | |
981 | ||
11d2f63b | 982 | spin_lock_irqsave(&hostdata->lock, flags); |
cd400825 FT |
983 | |
984 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
985 | if (basr & BASR_IRQ) { | |
986 | unsigned char mr = NCR5380_read(MODE_REG); | |
987 | unsigned char sr = NCR5380_read(STATUS_REG); | |
988 | ||
989 | dprintk(NDEBUG_INTR, "scsi%d: IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", | |
990 | instance->host_no, irq, basr, sr, mr); | |
1da177e4 | 991 | |
1da177e4 | 992 | #if defined(REAL_DMA) |
cd400825 FT |
993 | if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { |
994 | /* Probably End of DMA, Phase Mismatch or Loss of BSY. | |
995 | * We ack IRQ after clearing Mode Register. Workarounds | |
996 | * for End of DMA errata need to happen in DMA Mode. | |
997 | */ | |
1da177e4 | 998 | |
cd400825 | 999 | dprintk(NDEBUG_INTR, "scsi%d: interrupt in DMA mode\n", intance->host_no); |
1da177e4 | 1000 | |
cd400825 | 1001 | int transferred; |
1da177e4 | 1002 | |
cd400825 FT |
1003 | if (!hostdata->connected) |
1004 | panic("scsi%d : DMA interrupt with no connected cmd\n", | |
1005 | instance->hostno); | |
1da177e4 | 1006 | |
cd400825 FT |
1007 | transferred = hostdata->dmalen - NCR5380_dma_residual(instance); |
1008 | hostdata->connected->SCp.this_residual -= transferred; | |
1009 | hostdata->connected->SCp.ptr += transferred; | |
1010 | hostdata->dmalen = 0; | |
1da177e4 | 1011 | |
cd400825 FT |
1012 | /* FIXME: we need to poll briefly then defer a workqueue task ! */ |
1013 | NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2 * HZ); | |
1014 | ||
1015 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1016 | NCR5380_write(MODE_REG, MR_BASE); | |
1017 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
1018 | } else | |
1019 | #endif /* REAL_DMA */ | |
1020 | if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && | |
1021 | (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { | |
1022 | /* Probably reselected */ | |
1023 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1024 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
1025 | ||
1026 | dprintk(NDEBUG_INTR, "scsi%d: interrupt with SEL and IO\n", | |
1027 | instance->host_no); | |
1028 | ||
1029 | if (!hostdata->connected) { | |
1030 | NCR5380_reselect(instance); | |
1031 | queue_work(hostdata->work_q, &hostdata->main_task); | |
1da177e4 | 1032 | } |
cd400825 FT |
1033 | if (!hostdata->connected) |
1034 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1035 | } else { | |
1036 | /* Probably Bus Reset */ | |
1037 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
1038 | ||
1039 | dprintk(NDEBUG_INTR, "scsi%d: unknown interrupt\n", instance->host_no); | |
1040 | } | |
1041 | handled = 1; | |
1042 | } else { | |
1043 | shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n"); | |
1044 | } | |
1045 | ||
11d2f63b | 1046 | spin_unlock_irqrestore(&hostdata->lock, flags); |
cd400825 FT |
1047 | |
1048 | return IRQ_RETVAL(handled); | |
1da177e4 LT |
1049 | } |
1050 | ||
1051 | #endif | |
1052 | ||
1da177e4 | 1053 | /* |
710ddd0d FT |
1054 | * Function : int NCR5380_select(struct Scsi_Host *instance, |
1055 | * struct scsi_cmnd *cmd) | |
1da177e4 LT |
1056 | * |
1057 | * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command, | |
1058 | * including ARBITRATION, SELECTION, and initial message out for | |
1059 | * IDENTIFY and queue messages. | |
1060 | * | |
1061 | * Inputs : instance - instantiation of the 5380 driver on which this | |
76f13b93 | 1062 | * target lives, cmd - SCSI command to execute. |
1da177e4 | 1063 | * |
6323876f FT |
1064 | * Returns : -1 if selection failed but should be retried. |
1065 | * 0 if selection failed and should not be retried. | |
1066 | * 0 if selection succeeded completely (hostdata->connected == cmd). | |
1da177e4 LT |
1067 | * |
1068 | * Side effects : | |
1069 | * If bus busy, arbitration failed, etc, NCR5380_select() will exit | |
1070 | * with registers as they should have been on entry - ie | |
1071 | * SELECT_ENABLE will be set appropriately, the NCR5380 | |
1072 | * will cease to drive any SCSI bus signals. | |
1073 | * | |
1074 | * If successful : I_T_L or I_T_L_Q nexus will be established, | |
1075 | * instance->connected will be set to cmd. | |
1076 | * SELECT interrupt will be disabled. | |
1077 | * | |
1078 | * If failed (no target) : cmd->scsi_done() will be called, and the | |
1079 | * cmd->result host byte set to DID_BAD_TARGET. | |
1080 | * | |
1081 | * Locks: caller holds hostdata lock in IRQ mode | |
1082 | */ | |
1083 | ||
710ddd0d | 1084 | static int NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd) |
1da177e4 | 1085 | { |
e8a60144 | 1086 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1087 | unsigned char tmp[3], phase; |
1088 | unsigned char *data; | |
1089 | int len; | |
1da177e4 | 1090 | int err; |
1da177e4 | 1091 | |
1da177e4 | 1092 | NCR5380_dprint(NDEBUG_ARBITRATION, instance); |
52a6a1cb | 1093 | dprintk(NDEBUG_ARBITRATION, "scsi%d : starting arbitration, id = %d\n", instance->host_no, instance->this_id); |
1da177e4 LT |
1094 | |
1095 | /* | |
1096 | * Set the phase bits to 0, otherwise the NCR5380 won't drive the | |
1097 | * data bus during SELECTION. | |
1098 | */ | |
1099 | ||
1100 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1101 | ||
1102 | /* | |
1103 | * Start arbitration. | |
1104 | */ | |
1105 | ||
1106 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
1107 | NCR5380_write(MODE_REG, MR_ARBITRATE); | |
1108 | ||
55500d9b FT |
1109 | /* The chip now waits for BUS FREE phase. Then after the 800 ns |
1110 | * Bus Free Delay, arbitration will begin. | |
1111 | */ | |
1da177e4 | 1112 | |
11d2f63b | 1113 | spin_unlock_irq(&hostdata->lock); |
b32ade12 FT |
1114 | err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0, |
1115 | INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, | |
1116 | ICR_ARBITRATION_PROGRESS, HZ); | |
11d2f63b | 1117 | spin_lock_irq(&hostdata->lock); |
b32ade12 FT |
1118 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { |
1119 | /* Reselection interrupt */ | |
1120 | return -1; | |
1121 | } | |
1122 | if (err < 0) { | |
1123 | NCR5380_write(MODE_REG, MR_BASE); | |
1124 | shost_printk(KERN_ERR, instance, | |
1125 | "select: arbitration timeout\n"); | |
1126 | return -1; | |
1da177e4 | 1127 | } |
11d2f63b | 1128 | spin_unlock_irq(&hostdata->lock); |
1da177e4 | 1129 | |
55500d9b | 1130 | /* The SCSI-2 arbitration delay is 2.4 us */ |
1da177e4 LT |
1131 | udelay(3); |
1132 | ||
1133 | /* Check for lost arbitration */ | |
1134 | if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { | |
1135 | NCR5380_write(MODE_REG, MR_BASE); | |
52a6a1cb | 1136 | dprintk(NDEBUG_ARBITRATION, "scsi%d : lost arbitration, deasserting MR_ARBITRATE\n", instance->host_no); |
11d2f63b | 1137 | spin_lock_irq(&hostdata->lock); |
6323876f | 1138 | return -1; |
1da177e4 | 1139 | } |
cf13b083 FT |
1140 | |
1141 | /* After/during arbitration, BSY should be asserted. | |
1142 | * IBM DPES-31080 Version S31Q works now | |
1143 | * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) | |
1144 | */ | |
1145 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1146 | ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); | |
1da177e4 | 1147 | |
1da177e4 LT |
1148 | /* |
1149 | * Again, bus clear + bus settle time is 1.2us, however, this is | |
1150 | * a minimum so we'll udelay ceil(1.2) | |
1151 | */ | |
1152 | ||
9c3f0e2b FT |
1153 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) |
1154 | udelay(15); | |
1155 | else | |
1156 | udelay(2); | |
1da177e4 | 1157 | |
11d2f63b FT |
1158 | spin_lock_irq(&hostdata->lock); |
1159 | ||
72064a78 FT |
1160 | /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ |
1161 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) | |
1162 | return -1; | |
1163 | ||
52a6a1cb | 1164 | dprintk(NDEBUG_ARBITRATION, "scsi%d : won arbitration\n", instance->host_no); |
1da177e4 LT |
1165 | |
1166 | /* | |
1167 | * Now that we have won arbitration, start Selection process, asserting | |
1168 | * the host and target ID's on the SCSI bus. | |
1169 | */ | |
1170 | ||
422c0d61 | 1171 | NCR5380_write(OUTPUT_DATA_REG, (hostdata->id_mask | (1 << scmd_id(cmd)))); |
1da177e4 LT |
1172 | |
1173 | /* | |
1174 | * Raise ATN while SEL is true before BSY goes false from arbitration, | |
1175 | * since this is the only way to guarantee that we'll get a MESSAGE OUT | |
1176 | * phase immediately after selection. | |
1177 | */ | |
1178 | ||
1179 | NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_BSY | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL)); | |
1180 | NCR5380_write(MODE_REG, MR_BASE); | |
1181 | ||
1182 | /* | |
1183 | * Reselect interrupts must be turned off prior to the dropping of BSY, | |
1184 | * otherwise we will trigger an interrupt. | |
1185 | */ | |
1186 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1187 | ||
11d2f63b FT |
1188 | spin_unlock_irq(&hostdata->lock); |
1189 | ||
1da177e4 LT |
1190 | /* |
1191 | * The initiator shall then wait at least two deskew delays and release | |
1192 | * the BSY signal. | |
1193 | */ | |
1194 | udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ | |
1195 | ||
1196 | /* Reset BSY */ | |
1197 | NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL)); | |
1198 | ||
1199 | /* | |
1200 | * Something weird happens when we cease to drive BSY - looks | |
1201 | * like the board/chip is letting us do another read before the | |
1202 | * appropriate propagation delay has expired, and we're confusing | |
1203 | * a BSY signal from ourselves as the target's response to SELECTION. | |
1204 | * | |
1205 | * A small delay (the 'C++' frontend breaks the pipeline with an | |
1206 | * unnecessary jump, making it work on my 386-33/Trantor T128, the | |
1207 | * tighter 'C' code breaks and requires this) solves the problem - | |
1208 | * the 1 us delay is arbitrary, and only used because this delay will | |
1209 | * be the same on other platforms and since it works here, it should | |
1210 | * work there. | |
1211 | * | |
1212 | * wingel suggests that this could be due to failing to wait | |
1213 | * one deskew delay. | |
1214 | */ | |
1215 | ||
1216 | udelay(1); | |
1217 | ||
52a6a1cb | 1218 | dprintk(NDEBUG_SELECTION, "scsi%d : selecting target %d\n", instance->host_no, scmd_id(cmd)); |
1da177e4 LT |
1219 | |
1220 | /* | |
1221 | * The SCSI specification calls for a 250 ms timeout for the actual | |
1222 | * selection. | |
1223 | */ | |
1224 | ||
ae753a33 FT |
1225 | err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY, |
1226 | msecs_to_jiffies(250)); | |
1da177e4 | 1227 | |
1da177e4 | 1228 | if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { |
11d2f63b | 1229 | spin_lock_irq(&hostdata->lock); |
1da177e4 LT |
1230 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
1231 | NCR5380_reselect(instance); | |
cd400825 FT |
1232 | if (!hostdata->connected) |
1233 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1da177e4 | 1234 | printk("scsi%d : reselection after won arbitration?\n", instance->host_no); |
1da177e4 LT |
1235 | return -1; |
1236 | } | |
ae753a33 FT |
1237 | |
1238 | if (err < 0) { | |
11d2f63b | 1239 | spin_lock_irq(&hostdata->lock); |
ae753a33 FT |
1240 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
1241 | cmd->result = DID_BAD_TARGET << 16; | |
677e0194 | 1242 | complete_cmd(instance, cmd); |
ae753a33 FT |
1243 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
1244 | dprintk(NDEBUG_SELECTION, "scsi%d : target did not respond within 250ms\n", | |
1245 | instance->host_no); | |
1246 | return 0; | |
1247 | } | |
1248 | ||
1da177e4 LT |
1249 | /* |
1250 | * No less than two deskew delays after the initiator detects the | |
1251 | * BSY signal is true, it shall release the SEL signal and may | |
1252 | * change the DATA BUS. -wingel | |
1253 | */ | |
1254 | ||
1255 | udelay(1); | |
1256 | ||
1257 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1258 | ||
1da177e4 LT |
1259 | /* |
1260 | * Since we followed the SCSI spec, and raised ATN while SEL | |
1261 | * was true but before BSY was false during selection, the information | |
1262 | * transfer phase should be a MESSAGE OUT phase so that we can send the | |
1263 | * IDENTIFY message. | |
1264 | * | |
1265 | * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG | |
1266 | * message (2 bytes) with a tag ID that we increment with every command | |
1267 | * until it wraps back to 0. | |
1268 | * | |
1269 | * XXX - it turns out that there are some broken SCSI-II devices, | |
1270 | * which claim to support tagged queuing but fail when more than | |
1271 | * some number of commands are issued at once. | |
1272 | */ | |
1273 | ||
1274 | /* Wait for start of REQ/ACK handshake */ | |
1275 | ||
1da177e4 | 1276 | err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 1277 | spin_lock_irq(&hostdata->lock); |
1cc160e1 | 1278 | if (err < 0) { |
55500d9b FT |
1279 | shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); |
1280 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1da177e4 | 1281 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
6323876f | 1282 | return -1; |
1da177e4 LT |
1283 | } |
1284 | ||
52a6a1cb | 1285 | dprintk(NDEBUG_SELECTION, "scsi%d : target %d selected, going into MESSAGE OUT phase.\n", instance->host_no, cmd->device->id); |
22f5f10d | 1286 | tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun); |
1da177e4 LT |
1287 | |
1288 | len = 1; | |
1289 | cmd->tag = 0; | |
1290 | ||
1291 | /* Send message(s) */ | |
1292 | data = tmp; | |
1293 | phase = PHASE_MSGOUT; | |
1294 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
52a6a1cb | 1295 | dprintk(NDEBUG_SELECTION, "scsi%d : nexus established.\n", instance->host_no); |
1da177e4 | 1296 | /* XXX need to handle errors here */ |
11d2f63b | 1297 | |
1da177e4 | 1298 | hostdata->connected = cmd; |
9cb78c16 | 1299 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 | 1300 | |
28424d3a | 1301 | initialize_SCp(cmd); |
1da177e4 LT |
1302 | |
1303 | return 0; | |
1da177e4 LT |
1304 | } |
1305 | ||
1306 | /* | |
1307 | * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, | |
1308 | * unsigned char *phase, int *count, unsigned char **data) | |
1309 | * | |
1310 | * Purpose : transfers data in given phase using polled I/O | |
1311 | * | |
1312 | * Inputs : instance - instance of driver, *phase - pointer to | |
1313 | * what phase is expected, *count - pointer to number of | |
1314 | * bytes to transfer, **data - pointer to data pointer. | |
1315 | * | |
1316 | * Returns : -1 when different phase is entered without transferring | |
25985edc | 1317 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1da177e4 LT |
1318 | * is in same phase. |
1319 | * | |
1320 | * Also, *phase, *count, *data are modified in place. | |
1321 | * | |
1322 | * XXX Note : handling for bus free may be useful. | |
1323 | */ | |
1324 | ||
1325 | /* | |
1326 | * Note : this code is not as quick as it could be, however it | |
1327 | * IS 100% reliable, and for the actual data transfer where speed | |
1328 | * counts, we will always do a pseudo DMA or DMA transfer. | |
1329 | */ | |
1330 | ||
1331 | static int NCR5380_transfer_pio(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data) { | |
1da177e4 LT |
1332 | unsigned char p = *phase, tmp; |
1333 | int c = *count; | |
1334 | unsigned char *d = *data; | |
1da177e4 LT |
1335 | |
1336 | if (!(p & SR_IO)) | |
52a6a1cb | 1337 | dprintk(NDEBUG_PIO, "scsi%d : pio write %d bytes\n", instance->host_no, c); |
1da177e4 | 1338 | else |
52a6a1cb | 1339 | dprintk(NDEBUG_PIO, "scsi%d : pio read %d bytes\n", instance->host_no, c); |
1da177e4 LT |
1340 | |
1341 | /* | |
1342 | * The NCR5380 chip will only drive the SCSI bus when the | |
1343 | * phase specified in the appropriate bits of the TARGET COMMAND | |
1344 | * REGISTER match the STATUS REGISTER | |
1345 | */ | |
1346 | ||
1347 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); | |
1348 | ||
1da177e4 LT |
1349 | do { |
1350 | /* | |
1351 | * Wait for assertion of REQ, after which the phase bits will be | |
1352 | * valid | |
1353 | */ | |
1354 | ||
686f3990 | 1355 | if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) |
1da177e4 | 1356 | break; |
1da177e4 | 1357 | |
52a6a1cb | 1358 | dprintk(NDEBUG_HANDSHAKE, "scsi%d : REQ detected\n", instance->host_no); |
1da177e4 LT |
1359 | |
1360 | /* Check for phase mismatch */ | |
686f3990 | 1361 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { |
52a6a1cb | 1362 | dprintk(NDEBUG_HANDSHAKE, "scsi%d : phase mismatch\n", instance->host_no); |
1da177e4 LT |
1363 | NCR5380_dprint_phase(NDEBUG_HANDSHAKE, instance); |
1364 | break; | |
1365 | } | |
1366 | /* Do actual transfer from SCSI bus to / from memory */ | |
1367 | if (!(p & SR_IO)) | |
1368 | NCR5380_write(OUTPUT_DATA_REG, *d); | |
1369 | else | |
1370 | *d = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
1371 | ||
1372 | ++d; | |
1373 | ||
1374 | /* | |
1375 | * The SCSI standard suggests that in MSGOUT phase, the initiator | |
1376 | * should drop ATN on the last byte of the message phase | |
1377 | * after REQ has been asserted for the handshake but before | |
1378 | * the initiator raises ACK. | |
1379 | */ | |
1380 | ||
1381 | if (!(p & SR_IO)) { | |
1382 | if (!((p & SR_MSG) && c > 1)) { | |
1383 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1384 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1385 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ACK); | |
1386 | } else { | |
1387 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN); | |
1388 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1389 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1390 | } | |
1391 | } else { | |
1392 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1393 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
1394 | } | |
1395 | ||
a2edc4a6 FT |
1396 | if (NCR5380_poll_politely(instance, |
1397 | STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) | |
1398 | break; | |
1399 | ||
52a6a1cb | 1400 | dprintk(NDEBUG_HANDSHAKE, "scsi%d : req false, handshake complete\n", instance->host_no); |
1da177e4 LT |
1401 | |
1402 | /* | |
1403 | * We have several special cases to consider during REQ/ACK handshaking : | |
1404 | * 1. We were in MSGOUT phase, and we are on the last byte of the | |
1405 | * message. ATN must be dropped as ACK is dropped. | |
1406 | * | |
1407 | * 2. We are in a MSGIN phase, and we are on the last byte of the | |
1408 | * message. We must exit with ACK asserted, so that the calling | |
1409 | * code may raise ATN before dropping ACK to reject the message. | |
1410 | * | |
1411 | * 3. ACK and ATN are clear and the target may proceed as normal. | |
1412 | */ | |
1413 | if (!(p == PHASE_MSGIN && c == 1)) { | |
1414 | if (p == PHASE_MSGOUT && c > 1) | |
1415 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1416 | else | |
1417 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1418 | } | |
1419 | } while (--c); | |
1420 | ||
52a6a1cb | 1421 | dprintk(NDEBUG_PIO, "scsi%d : residual %d\n", instance->host_no, c); |
1da177e4 LT |
1422 | |
1423 | *count = c; | |
1424 | *data = d; | |
1425 | tmp = NCR5380_read(STATUS_REG); | |
a2edc4a6 FT |
1426 | /* The phase read from the bus is valid if either REQ is (already) |
1427 | * asserted or if ACK hasn't been released yet. The latter applies if | |
1428 | * we're in MSG IN, DATA IN or STATUS and all bytes have been received. | |
1429 | */ | |
1430 | if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) | |
1da177e4 LT |
1431 | *phase = tmp & PHASE_MASK; |
1432 | else | |
1433 | *phase = PHASE_UNKNOWN; | |
1434 | ||
1435 | if (!c || (*phase == p)) | |
1436 | return 0; | |
1437 | else | |
1438 | return -1; | |
1439 | } | |
1440 | ||
1441 | /** | |
636b1ec8 FT |
1442 | * do_reset - issue a reset command |
1443 | * @instance: adapter to reset | |
1da177e4 | 1444 | * |
636b1ec8 FT |
1445 | * Issue a reset sequence to the NCR5380 and try and get the bus |
1446 | * back into sane shape. | |
1da177e4 | 1447 | * |
636b1ec8 FT |
1448 | * This clears the reset interrupt flag because there may be no handler for |
1449 | * it. When the driver is initialized, the NCR5380_intr() handler has not yet | |
1450 | * been installed. And when in EH we may have released the ST DMA interrupt. | |
1da177e4 LT |
1451 | */ |
1452 | ||
54d8fe44 FT |
1453 | static void do_reset(struct Scsi_Host *instance) |
1454 | { | |
636b1ec8 FT |
1455 | unsigned long flags; |
1456 | ||
1457 | local_irq_save(flags); | |
1458 | NCR5380_write(TARGET_COMMAND_REG, | |
1459 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); | |
1da177e4 | 1460 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); |
636b1ec8 | 1461 | udelay(50); |
1da177e4 | 1462 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
636b1ec8 FT |
1463 | (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1464 | local_irq_restore(flags); | |
1da177e4 LT |
1465 | } |
1466 | ||
80d3eb6d FT |
1467 | /** |
1468 | * do_abort - abort the currently established nexus by going to | |
1469 | * MESSAGE OUT phase and sending an ABORT message. | |
1470 | * @instance: relevant scsi host instance | |
1da177e4 | 1471 | * |
80d3eb6d | 1472 | * Returns 0 on success, -1 on failure. |
1da177e4 LT |
1473 | */ |
1474 | ||
54d8fe44 FT |
1475 | static int do_abort(struct Scsi_Host *instance) |
1476 | { | |
1da177e4 LT |
1477 | unsigned char *msgptr, phase, tmp; |
1478 | int len; | |
1479 | int rc; | |
1da177e4 LT |
1480 | |
1481 | /* Request message out phase */ | |
1482 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1483 | ||
1484 | /* | |
1485 | * Wait for the target to indicate a valid phase by asserting | |
1486 | * REQ. Once this happens, we'll have either a MSGOUT phase | |
1487 | * and can immediately send the ABORT message, or we'll have some | |
1488 | * other phase and will have to source/sink data. | |
1489 | * | |
1490 | * We really don't care what value was on the bus or what value | |
1491 | * the target sees, so we just handshake. | |
1492 | */ | |
1493 | ||
80d3eb6d | 1494 | rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); |
1cc160e1 | 1495 | if (rc < 0) |
80d3eb6d | 1496 | goto timeout; |
1da177e4 | 1497 | |
f35d3474 | 1498 | tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; |
1da177e4 LT |
1499 | |
1500 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1501 | ||
f35d3474 | 1502 | if (tmp != PHASE_MSGOUT) { |
1da177e4 | 1503 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); |
54d8fe44 | 1504 | rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ); |
1cc160e1 | 1505 | if (rc < 0) |
80d3eb6d FT |
1506 | goto timeout; |
1507 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1da177e4 LT |
1508 | } |
1509 | tmp = ABORT; | |
1510 | msgptr = &tmp; | |
1511 | len = 1; | |
1512 | phase = PHASE_MSGOUT; | |
54d8fe44 | 1513 | NCR5380_transfer_pio(instance, &phase, &len, &msgptr); |
1da177e4 LT |
1514 | |
1515 | /* | |
1516 | * If we got here, and the command completed successfully, | |
1517 | * we're about to go into bus free state. | |
1518 | */ | |
1519 | ||
1520 | return len ? -1 : 0; | |
80d3eb6d FT |
1521 | |
1522 | timeout: | |
1523 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1524 | return -1; | |
1da177e4 LT |
1525 | } |
1526 | ||
1527 | #if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL) | |
1528 | /* | |
1529 | * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, | |
1530 | * unsigned char *phase, int *count, unsigned char **data) | |
1531 | * | |
1532 | * Purpose : transfers data in given phase using either real | |
1533 | * or pseudo DMA. | |
1534 | * | |
1535 | * Inputs : instance - instance of driver, *phase - pointer to | |
1536 | * what phase is expected, *count - pointer to number of | |
1537 | * bytes to transfer, **data - pointer to data pointer. | |
1538 | * | |
1539 | * Returns : -1 when different phase is entered without transferring | |
25985edc | 1540 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1da177e4 LT |
1541 | * is in same phase. |
1542 | * | |
1543 | * Also, *phase, *count, *data are modified in place. | |
1544 | * | |
1545 | * Locks: io_request lock held by caller | |
1546 | */ | |
1547 | ||
1548 | ||
1549 | static int NCR5380_transfer_dma(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data) { | |
1da177e4 LT |
1550 | register int c = *count; |
1551 | register unsigned char p = *phase; | |
1552 | register unsigned char *d = *data; | |
1553 | unsigned char tmp; | |
1554 | int foo; | |
1555 | #if defined(REAL_DMA_POLL) | |
1556 | int cnt, toPIO; | |
1557 | unsigned char saved_data = 0, overrun = 0, residue; | |
1558 | #endif | |
1559 | ||
e8a60144 | 1560 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 1561 | |
1da177e4 LT |
1562 | if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { |
1563 | *phase = tmp; | |
1564 | return -1; | |
1565 | } | |
1566 | #if defined(REAL_DMA) || defined(REAL_DMA_POLL) | |
1da177e4 | 1567 | if (p & SR_IO) { |
9db6024e FT |
1568 | if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) |
1569 | c -= 2; | |
1da177e4 | 1570 | } |
52a6a1cb | 1571 | dprintk(NDEBUG_DMA, "scsi%d : initializing DMA channel %d for %s, %d bytes %s %0x\n", instance->host_no, instance->dma_channel, (p & SR_IO) ? "reading" : "writing", c, (p & SR_IO) ? "to" : "from", (unsigned) d); |
1da177e4 LT |
1572 | hostdata->dma_len = (p & SR_IO) ? NCR5380_dma_read_setup(instance, d, c) : NCR5380_dma_write_setup(instance, d, c); |
1573 | #endif | |
1574 | ||
1575 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); | |
1576 | ||
1577 | #ifdef REAL_DMA | |
cd400825 FT |
1578 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | |
1579 | MR_ENABLE_EOP_INTR); | |
1da177e4 | 1580 | #elif defined(REAL_DMA_POLL) |
cd400825 | 1581 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY); |
1da177e4 LT |
1582 | #else |
1583 | /* | |
1584 | * Note : on my sample board, watch-dog timeouts occurred when interrupts | |
1585 | * were not disabled for the duration of a single DMA transfer, from | |
1586 | * before the setting of DMA mode to after transfer of the last byte. | |
1587 | */ | |
1588 | ||
55181be8 | 1589 | if (hostdata->flags & FLAG_NO_DMA_FIXUP) |
cd400825 FT |
1590 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | |
1591 | MR_ENABLE_EOP_INTR); | |
1da177e4 | 1592 | else |
cd400825 | 1593 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY); |
1da177e4 LT |
1594 | #endif /* def REAL_DMA */ |
1595 | ||
52a6a1cb | 1596 | dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG)); |
1da177e4 LT |
1597 | |
1598 | /* | |
1599 | * On the PAS16 at least I/O recovery delays are not needed here. | |
1600 | * Everyone else seems to want them. | |
1601 | */ | |
1602 | ||
1603 | if (p & SR_IO) { | |
1604 | io_recovery_delay(1); | |
1605 | NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); | |
1606 | } else { | |
1607 | io_recovery_delay(1); | |
1608 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1609 | io_recovery_delay(1); | |
1610 | NCR5380_write(START_DMA_SEND_REG, 0); | |
1611 | io_recovery_delay(1); | |
1612 | } | |
1613 | ||
1614 | #if defined(REAL_DMA_POLL) | |
1615 | do { | |
1616 | tmp = NCR5380_read(BUS_AND_STATUS_REG); | |
1617 | } while ((tmp & BASR_PHASE_MATCH) && !(tmp & (BASR_BUSY_ERROR | BASR_END_DMA_TRANSFER))); | |
1618 | ||
1619 | /* | |
1620 | At this point, either we've completed DMA, or we have a phase mismatch, | |
1621 | or we've unexpectedly lost BUSY (which is a real error). | |
1622 | ||
1623 | For write DMAs, we want to wait until the last byte has been | |
1624 | transferred out over the bus before we turn off DMA mode. Alas, there | |
1625 | seems to be no terribly good way of doing this on a 5380 under all | |
1626 | conditions. For non-scatter-gather operations, we can wait until REQ | |
1627 | and ACK both go false, or until a phase mismatch occurs. Gather-writes | |
1628 | are nastier, since the device will be expecting more data than we | |
1629 | are prepared to send it, and REQ will remain asserted. On a 53C8[01] we | |
1630 | could test LAST BIT SENT to assure transfer (I imagine this is precisely | |
1631 | why this signal was added to the newer chips) but on the older 538[01] | |
1632 | this signal does not exist. The workaround for this lack is a watchdog; | |
1633 | we bail out of the wait-loop after a modest amount of wait-time if | |
1634 | the usual exit conditions are not met. Not a terribly clean or | |
1635 | correct solution :-% | |
1636 | ||
1637 | Reads are equally tricky due to a nasty characteristic of the NCR5380. | |
1638 | If the chip is in DMA mode for an READ, it will respond to a target's | |
1639 | REQ by latching the SCSI data into the INPUT DATA register and asserting | |
1640 | ACK, even if it has _already_ been notified by the DMA controller that | |
1641 | the current DMA transfer has completed! If the NCR5380 is then taken | |
1642 | out of DMA mode, this already-acknowledged byte is lost. | |
1643 | ||
1644 | This is not a problem for "one DMA transfer per command" reads, because | |
1645 | the situation will never arise... either all of the data is DMA'ed | |
1646 | properly, or the target switches to MESSAGE IN phase to signal a | |
1647 | disconnection (either operation bringing the DMA to a clean halt). | |
1648 | However, in order to handle scatter-reads, we must work around the | |
1649 | problem. The chosen fix is to DMA N-2 bytes, then check for the | |
1650 | condition before taking the NCR5380 out of DMA mode. One or two extra | |
1651 | bytes are transferred via PIO as necessary to fill out the original | |
1652 | request. | |
1653 | */ | |
1654 | ||
1655 | if (p & SR_IO) { | |
9db6024e FT |
1656 | if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) { |
1657 | udelay(10); | |
1658 | if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == | |
1659 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
1660 | saved_data = NCR5380_read(INPUT_DATA_REGISTER); | |
1661 | overrun = 1; | |
1662 | } | |
1da177e4 | 1663 | } |
1da177e4 LT |
1664 | } else { |
1665 | int limit = 100; | |
1666 | while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) { | |
1667 | if (!(tmp & BASR_PHASE_MATCH)) | |
1668 | break; | |
1669 | if (--limit < 0) | |
1670 | break; | |
1671 | } | |
1672 | } | |
1673 | ||
52a6a1cb | 1674 | dprintk(NDEBUG_DMA, "scsi%d : polled DMA transfer complete, basr 0x%X, sr 0x%X\n", instance->host_no, tmp, NCR5380_read(STATUS_REG)); |
1da177e4 LT |
1675 | |
1676 | NCR5380_write(MODE_REG, MR_BASE); | |
1677 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1678 | ||
1679 | residue = NCR5380_dma_residual(instance); | |
1680 | c -= residue; | |
1681 | *count -= c; | |
1682 | *data += c; | |
1683 | *phase = NCR5380_read(STATUS_REG) & PHASE_MASK; | |
1684 | ||
9db6024e FT |
1685 | if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS) && |
1686 | *phase == p && (p & SR_IO) && residue == 0) { | |
1da177e4 | 1687 | if (overrun) { |
52a6a1cb | 1688 | dprintk(NDEBUG_DMA, "Got an input overrun, using saved byte\n"); |
1da177e4 LT |
1689 | **data = saved_data; |
1690 | *data += 1; | |
1691 | *count -= 1; | |
1692 | cnt = toPIO = 1; | |
1693 | } else { | |
1694 | printk("No overrun??\n"); | |
1695 | cnt = toPIO = 2; | |
1696 | } | |
52a6a1cb | 1697 | dprintk(NDEBUG_DMA, "Doing %d-byte PIO to 0x%X\n", cnt, *data); |
1da177e4 LT |
1698 | NCR5380_transfer_pio(instance, phase, &cnt, data); |
1699 | *count -= toPIO - cnt; | |
1700 | } | |
1da177e4 | 1701 | |
52a6a1cb | 1702 | dprintk(NDEBUG_DMA, "Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n", *data, *count, *(*data + *count - 1), *(*data + *count)); |
1da177e4 LT |
1703 | return 0; |
1704 | ||
1705 | #elif defined(REAL_DMA) | |
1706 | return 0; | |
1707 | #else /* defined(REAL_DMA_POLL) */ | |
1708 | if (p & SR_IO) { | |
55181be8 FT |
1709 | foo = NCR5380_pread(instance, d, |
1710 | hostdata->flags & FLAG_NO_DMA_FIXUP ? c : c - 1); | |
1711 | if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) { | |
1da177e4 LT |
1712 | /* |
1713 | * We can't disable DMA mode after successfully transferring | |
1714 | * what we plan to be the last byte, since that would open up | |
1715 | * a race condition where if the target asserted REQ before | |
1716 | * we got the DMA mode reset, the NCR5380 would have latched | |
1717 | * an additional byte into the INPUT DATA register and we'd | |
1718 | * have dropped it. | |
1719 | * | |
1720 | * The workaround was to transfer one fewer bytes than we | |
1721 | * intended to with the pseudo-DMA read function, wait for | |
1722 | * the chip to latch the last byte, read it, and then disable | |
1723 | * pseudo-DMA mode. | |
1724 | * | |
1725 | * After REQ is asserted, the NCR5380 asserts DRQ and ACK. | |
1726 | * REQ is deasserted when ACK is asserted, and not reasserted | |
1727 | * until ACK goes false. Since the NCR5380 won't lower ACK | |
1728 | * until DACK is asserted, which won't happen unless we twiddle | |
1729 | * the DMA port or we take the NCR5380 out of DMA mode, we | |
1730 | * can guarantee that we won't handshake another extra | |
1731 | * byte. | |
1732 | */ | |
1733 | ||
55181be8 FT |
1734 | if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, |
1735 | BASR_DRQ, BASR_DRQ, HZ) < 0) { | |
1736 | foo = -1; | |
1737 | shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); | |
1738 | } | |
1739 | if (NCR5380_poll_politely(instance, STATUS_REG, | |
1740 | SR_REQ, 0, HZ) < 0) { | |
1741 | foo = -1; | |
1742 | shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); | |
1da177e4 | 1743 | } |
55181be8 | 1744 | d[c - 1] = NCR5380_read(INPUT_DATA_REG); |
1da177e4 | 1745 | } |
1da177e4 | 1746 | } else { |
1da177e4 | 1747 | foo = NCR5380_pwrite(instance, d, c); |
55181be8 | 1748 | if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) { |
1da177e4 LT |
1749 | /* |
1750 | * Wait for the last byte to be sent. If REQ is being asserted for | |
1751 | * the byte we're interested, we'll ACK it and it will go false. | |
1752 | */ | |
55181be8 FT |
1753 | if (NCR5380_poll_politely2(instance, |
1754 | BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, | |
1755 | BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { | |
1756 | foo = -1; | |
1757 | shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); | |
1da177e4 LT |
1758 | } |
1759 | } | |
1da177e4 LT |
1760 | } |
1761 | NCR5380_write(MODE_REG, MR_BASE); | |
1762 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
cd400825 | 1763 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1da177e4 LT |
1764 | *data = d + c; |
1765 | *count = 0; | |
1766 | *phase = NCR5380_read(STATUS_REG) & PHASE_MASK; | |
1da177e4 LT |
1767 | return foo; |
1768 | #endif /* def REAL_DMA */ | |
1769 | } | |
1770 | #endif /* defined(REAL_DMA) | defined(PSEUDO_DMA) */ | |
1771 | ||
1772 | /* | |
1773 | * Function : NCR5380_information_transfer (struct Scsi_Host *instance) | |
1774 | * | |
1775 | * Purpose : run through the various SCSI phases and do as the target | |
1776 | * directs us to. Operates on the currently connected command, | |
1777 | * instance->connected. | |
1778 | * | |
1779 | * Inputs : instance, instance for which we are doing commands | |
1780 | * | |
1781 | * Side effects : SCSI things happen, the disconnected queue will be | |
1782 | * modified if a command disconnects, *instance->connected will | |
1783 | * change. | |
1784 | * | |
1785 | * XXX Note : we need to watch for bus free or a reset condition here | |
1786 | * to recover from an unexpected bus free condition. | |
1787 | * | |
1788 | * Locks: io_request_lock held by caller in IRQ mode | |
1789 | */ | |
1790 | ||
1791 | static void NCR5380_information_transfer(struct Scsi_Host *instance) { | |
e8a60144 | 1792 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1793 | unsigned char msgout = NOP; |
1794 | int sink = 0; | |
1795 | int len; | |
1796 | #if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) | |
1797 | int transfersize; | |
1798 | #endif | |
1799 | unsigned char *data; | |
1800 | unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; | |
11d2f63b | 1801 | struct scsi_cmnd *cmd; |
1da177e4 | 1802 | |
11d2f63b | 1803 | while ((cmd = hostdata->connected)) { |
32b26a10 FT |
1804 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1805 | ||
1da177e4 LT |
1806 | tmp = NCR5380_read(STATUS_REG); |
1807 | /* We only have a valid SCSI phase when REQ is asserted */ | |
1808 | if (tmp & SR_REQ) { | |
1809 | phase = (tmp & PHASE_MASK); | |
1810 | if (phase != old_phase) { | |
1811 | old_phase = phase; | |
1812 | NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); | |
1813 | } | |
1814 | if (sink && (phase != PHASE_MSGOUT)) { | |
1815 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1816 | ||
1817 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1818 | while (NCR5380_read(STATUS_REG) & SR_REQ); | |
1819 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1820 | sink = 0; | |
1821 | continue; | |
1822 | } | |
1823 | switch (phase) { | |
1da177e4 LT |
1824 | case PHASE_DATAOUT: |
1825 | #if (NDEBUG & NDEBUG_NO_DATAOUT) | |
1826 | printk("scsi%d : NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n", instance->host_no); | |
1827 | sink = 1; | |
1828 | do_abort(instance); | |
1829 | cmd->result = DID_ERROR << 16; | |
677e0194 | 1830 | complete_cmd(instance, cmd); |
1da177e4 LT |
1831 | return; |
1832 | #endif | |
bf1a0c6f | 1833 | case PHASE_DATAIN: |
1da177e4 LT |
1834 | /* |
1835 | * If there is no room left in the current buffer in the | |
1836 | * scatter-gather list, move onto the next one. | |
1837 | */ | |
1838 | ||
1839 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
1840 | ++cmd->SCp.buffer; | |
1841 | --cmd->SCp.buffers_residual; | |
1842 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
45711f1a | 1843 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
52a6a1cb | 1844 | dprintk(NDEBUG_INFORMATION, "scsi%d : %d bytes and %d buffers left\n", instance->host_no, cmd->SCp.this_residual, cmd->SCp.buffers_residual); |
1da177e4 LT |
1845 | } |
1846 | /* | |
1847 | * The preferred transfer method is going to be | |
1848 | * PSEUDO-DMA for systems that are strictly PIO, | |
1849 | * since we can let the hardware do the handshaking. | |
1850 | * | |
1851 | * For this to work, we need to know the transfersize | |
1852 | * ahead of time, since the pseudo-DMA code will sit | |
1853 | * in an unconditional loop. | |
1854 | */ | |
1855 | ||
1856 | #if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) | |
ff3d4578 FT |
1857 | transfersize = 0; |
1858 | if (!cmd->device->borken && | |
1859 | !(hostdata->flags & FLAG_NO_PSEUDO_DMA)) | |
1860 | transfersize = NCR5380_dma_xfer_len(instance, cmd, phase); | |
1861 | ||
1862 | if (transfersize) { | |
1da177e4 LT |
1863 | len = transfersize; |
1864 | if (NCR5380_transfer_dma(instance, &phase, &len, (unsigned char **) &cmd->SCp.ptr)) { | |
1865 | /* | |
1866 | * If the watchdog timer fires, all future accesses to this | |
1867 | * device will use the polled-IO. | |
1868 | */ | |
017560fc JG |
1869 | scmd_printk(KERN_INFO, cmd, |
1870 | "switching to slow handshake\n"); | |
1da177e4 | 1871 | cmd->device->borken = 1; |
1da177e4 LT |
1872 | sink = 1; |
1873 | do_abort(instance); | |
1874 | cmd->result = DID_ERROR << 16; | |
677e0194 | 1875 | complete_cmd(instance, cmd); |
1da177e4 LT |
1876 | /* XXX - need to source or sink data here, as appropriate */ |
1877 | } else | |
1878 | cmd->SCp.this_residual -= transfersize - len; | |
1879 | } else | |
1880 | #endif /* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */ | |
11d2f63b FT |
1881 | { |
1882 | spin_unlock_irq(&hostdata->lock); | |
1da177e4 LT |
1883 | NCR5380_transfer_pio(instance, &phase, (int *) &cmd->SCp.this_residual, (unsigned char **) |
1884 | &cmd->SCp.ptr); | |
11d2f63b FT |
1885 | spin_lock_irq(&hostdata->lock); |
1886 | } | |
1da177e4 LT |
1887 | break; |
1888 | case PHASE_MSGIN: | |
1889 | len = 1; | |
1890 | data = &tmp; | |
1891 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1892 | cmd->SCp.Message = tmp; | |
1893 | ||
1894 | switch (tmp) { | |
1da177e4 LT |
1895 | case ABORT: |
1896 | case COMMAND_COMPLETE: | |
1897 | /* Accept message by clearing ACK */ | |
1898 | sink = 1; | |
1899 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
0d3d9a42 FT |
1900 | dsprintk(NDEBUG_QUEUES, instance, |
1901 | "COMMAND COMPLETE %p target %d lun %llu\n", | |
1902 | cmd, scmd_id(cmd), cmd->device->lun); | |
1903 | ||
1da177e4 | 1904 | hostdata->connected = NULL; |
1da177e4 | 1905 | |
f27db8eb FT |
1906 | cmd->result &= ~0xffff; |
1907 | cmd->result |= cmd->SCp.Status; | |
1908 | cmd->result |= cmd->SCp.Message << 8; | |
28424d3a | 1909 | |
f27db8eb | 1910 | if (cmd->cmnd[0] == REQUEST_SENSE) |
677e0194 | 1911 | complete_cmd(instance, cmd); |
f27db8eb FT |
1912 | else { |
1913 | if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || | |
1914 | cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { | |
1915 | dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", | |
1916 | cmd); | |
1917 | list_add_tail(&ncmd->list, | |
1918 | &hostdata->autosense); | |
1919 | } else | |
1920 | complete_cmd(instance, cmd); | |
1da177e4 LT |
1921 | } |
1922 | ||
1da177e4 LT |
1923 | /* |
1924 | * Restore phase bits to 0 so an interrupted selection, | |
1925 | * arbitration can resume. | |
1926 | */ | |
1927 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
72064a78 FT |
1928 | |
1929 | /* Enable reselect interrupts */ | |
1930 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1da177e4 LT |
1931 | return; |
1932 | case MESSAGE_REJECT: | |
1933 | /* Accept message by clearing ACK */ | |
1934 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1935 | switch (hostdata->last_message) { | |
1936 | case HEAD_OF_QUEUE_TAG: | |
1937 | case ORDERED_QUEUE_TAG: | |
1938 | case SIMPLE_QUEUE_TAG: | |
1939 | cmd->device->simple_tags = 0; | |
9cb78c16 | 1940 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 LT |
1941 | break; |
1942 | default: | |
1943 | break; | |
1944 | } | |
340b9612 | 1945 | break; |
1da177e4 LT |
1946 | case DISCONNECT:{ |
1947 | /* Accept message by clearing ACK */ | |
1948 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1da177e4 | 1949 | hostdata->connected = NULL; |
32b26a10 | 1950 | list_add(&ncmd->list, &hostdata->disconnected); |
0d3d9a42 FT |
1951 | dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, |
1952 | instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", | |
1953 | cmd, scmd_id(cmd), cmd->device->lun); | |
1954 | ||
1da177e4 LT |
1955 | /* |
1956 | * Restore phase bits to 0 so an interrupted selection, | |
1957 | * arbitration can resume. | |
1958 | */ | |
1959 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1960 | ||
1961 | /* Enable reselect interrupts */ | |
1962 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1da177e4 LT |
1963 | return; |
1964 | } | |
1965 | /* | |
1966 | * The SCSI data pointer is *IMPLICITLY* saved on a disconnect | |
1967 | * operation, in violation of the SCSI spec so we can safely | |
1968 | * ignore SAVE/RESTORE pointers calls. | |
1969 | * | |
1970 | * Unfortunately, some disks violate the SCSI spec and | |
1971 | * don't issue the required SAVE_POINTERS message before | |
1972 | * disconnecting, and we have to break spec to remain | |
1973 | * compatible. | |
1974 | */ | |
1975 | case SAVE_POINTERS: | |
1976 | case RESTORE_POINTERS: | |
1977 | /* Accept message by clearing ACK */ | |
1978 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1979 | break; | |
1980 | case EXTENDED_MESSAGE: | |
1981 | /* | |
1982 | * Extended messages are sent in the following format : | |
1983 | * Byte | |
1984 | * 0 EXTENDED_MESSAGE == 1 | |
1985 | * 1 length (includes one byte for code, doesn't | |
1986 | * include first two bytes) | |
1987 | * 2 code | |
1988 | * 3..length+1 arguments | |
1989 | * | |
1990 | * Start the extended message buffer with the EXTENDED_MESSAGE | |
1abfd370 | 1991 | * byte, since spi_print_msg() wants the whole thing. |
1da177e4 LT |
1992 | */ |
1993 | extended_msg[0] = EXTENDED_MESSAGE; | |
1994 | /* Accept first byte by clearing ACK */ | |
1995 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
11d2f63b FT |
1996 | |
1997 | spin_unlock_irq(&hostdata->lock); | |
1998 | ||
52a6a1cb | 1999 | dprintk(NDEBUG_EXTENDED, "scsi%d : receiving extended message\n", instance->host_no); |
1da177e4 LT |
2000 | |
2001 | len = 2; | |
2002 | data = extended_msg + 1; | |
2003 | phase = PHASE_MSGIN; | |
2004 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2005 | ||
52a6a1cb | 2006 | dprintk(NDEBUG_EXTENDED, "scsi%d : length=%d, code=0x%02x\n", instance->host_no, (int) extended_msg[1], (int) extended_msg[2]); |
1da177e4 | 2007 | |
e0783ed3 FT |
2008 | if (!len && extended_msg[1] > 0 && |
2009 | extended_msg[1] <= sizeof(extended_msg) - 2) { | |
1da177e4 LT |
2010 | /* Accept third byte by clearing ACK */ |
2011 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2012 | len = extended_msg[1] - 1; | |
2013 | data = extended_msg + 3; | |
2014 | phase = PHASE_MSGIN; | |
2015 | ||
2016 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
52a6a1cb | 2017 | dprintk(NDEBUG_EXTENDED, "scsi%d : message received, residual %d\n", instance->host_no, len); |
1da177e4 LT |
2018 | |
2019 | switch (extended_msg[2]) { | |
2020 | case EXTENDED_SDTR: | |
2021 | case EXTENDED_WDTR: | |
2022 | case EXTENDED_MODIFY_DATA_POINTER: | |
2023 | case EXTENDED_EXTENDED_IDENTIFY: | |
2024 | tmp = 0; | |
2025 | } | |
2026 | } else if (len) { | |
2027 | printk("scsi%d: error receiving extended message\n", instance->host_no); | |
2028 | tmp = 0; | |
2029 | } else { | |
2030 | printk("scsi%d: extended message code %02x length %d is too long\n", instance->host_no, extended_msg[2], extended_msg[1]); | |
2031 | tmp = 0; | |
2032 | } | |
11d2f63b FT |
2033 | |
2034 | spin_lock_irq(&hostdata->lock); | |
2035 | if (!hostdata->connected) | |
2036 | return; | |
2037 | ||
1da177e4 LT |
2038 | /* Fall through to reject message */ |
2039 | ||
2040 | /* | |
2041 | * If we get something weird that we aren't expecting, | |
2042 | * reject it. | |
2043 | */ | |
2044 | default: | |
2045 | if (!tmp) { | |
2046 | printk("scsi%d: rejecting message ", instance->host_no); | |
1abfd370 | 2047 | spi_print_msg(extended_msg); |
1da177e4 LT |
2048 | printk("\n"); |
2049 | } else if (tmp != EXTENDED_MESSAGE) | |
017560fc JG |
2050 | scmd_printk(KERN_INFO, cmd, |
2051 | "rejecting unknown message %02x\n",tmp); | |
1da177e4 | 2052 | else |
017560fc JG |
2053 | scmd_printk(KERN_INFO, cmd, |
2054 | "rejecting unknown extended message code %02x, length %d\n", extended_msg[1], extended_msg[0]); | |
1da177e4 LT |
2055 | |
2056 | msgout = MESSAGE_REJECT; | |
2057 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
2058 | break; | |
2059 | } /* switch (tmp) */ | |
2060 | break; | |
2061 | case PHASE_MSGOUT: | |
2062 | len = 1; | |
2063 | data = &msgout; | |
2064 | hostdata->last_message = msgout; | |
2065 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2066 | if (msgout == ABORT) { | |
1da177e4 LT |
2067 | hostdata->connected = NULL; |
2068 | cmd->result = DID_ERROR << 16; | |
677e0194 | 2069 | complete_cmd(instance, cmd); |
1da177e4 LT |
2070 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
2071 | return; | |
2072 | } | |
2073 | msgout = NOP; | |
2074 | break; | |
2075 | case PHASE_CMDOUT: | |
2076 | len = cmd->cmd_len; | |
2077 | data = cmd->cmnd; | |
2078 | /* | |
2079 | * XXX for performance reasons, on machines with a | |
2080 | * PSEUDO-DMA architecture we should probably | |
2081 | * use the dma transfer function. | |
2082 | */ | |
2083 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1da177e4 LT |
2084 | break; |
2085 | case PHASE_STATIN: | |
2086 | len = 1; | |
2087 | data = &tmp; | |
2088 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2089 | cmd->SCp.Status = tmp; | |
2090 | break; | |
2091 | default: | |
2092 | printk("scsi%d : unknown phase\n", instance->host_no); | |
4dde8f7d | 2093 | NCR5380_dprint(NDEBUG_ANY, instance); |
1da177e4 | 2094 | } /* switch(phase) */ |
686f3990 | 2095 | } else { |
11d2f63b | 2096 | spin_unlock_irq(&hostdata->lock); |
686f3990 | 2097 | NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 2098 | spin_lock_irq(&hostdata->lock); |
1da177e4 | 2099 | } |
11d2f63b | 2100 | } |
1da177e4 LT |
2101 | } |
2102 | ||
2103 | /* | |
2104 | * Function : void NCR5380_reselect (struct Scsi_Host *instance) | |
2105 | * | |
2106 | * Purpose : does reselection, initializing the instance->connected | |
710ddd0d | 2107 | * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q |
1da177e4 LT |
2108 | * nexus has been reestablished, |
2109 | * | |
2110 | * Inputs : instance - this instance of the NCR5380. | |
2111 | * | |
2112 | * Locks: io_request_lock held by caller if IRQ driven | |
2113 | */ | |
2114 | ||
2115 | static void NCR5380_reselect(struct Scsi_Host *instance) { | |
e8a60144 | 2116 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
2117 | unsigned char target_mask; |
2118 | unsigned char lun, phase; | |
2119 | int len; | |
2120 | unsigned char msg[3]; | |
2121 | unsigned char *data; | |
32b26a10 FT |
2122 | struct NCR5380_cmd *ncmd; |
2123 | struct scsi_cmnd *tmp; | |
1da177e4 LT |
2124 | |
2125 | /* | |
2126 | * Disable arbitration, etc. since the host adapter obviously | |
2127 | * lost, and tell an interrupted NCR5380_select() to restart. | |
2128 | */ | |
2129 | ||
2130 | NCR5380_write(MODE_REG, MR_BASE); | |
1da177e4 LT |
2131 | |
2132 | target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); | |
72064a78 | 2133 | dprintk(NDEBUG_RESELECTION, "scsi%d : reselect\n", instance->host_no); |
1da177e4 LT |
2134 | |
2135 | /* | |
2136 | * At this point, we have detected that our SCSI ID is on the bus, | |
2137 | * SEL is true and BSY was false for at least one bus settle delay | |
2138 | * (400 ns). | |
2139 | * | |
2140 | * We must assert BSY ourselves, until the target drops the SEL | |
2141 | * signal. | |
2142 | */ | |
2143 | ||
2144 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); | |
72064a78 FT |
2145 | if (NCR5380_poll_politely(instance, |
2146 | STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { | |
2147 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2148 | return; | |
2149 | } | |
1da177e4 LT |
2150 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2151 | ||
2152 | /* | |
2153 | * Wait for target to go into MSGIN. | |
1da177e4 LT |
2154 | */ |
2155 | ||
1cc160e1 | 2156 | if (NCR5380_poll_politely(instance, |
72064a78 FT |
2157 | STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { |
2158 | do_abort(instance); | |
2159 | return; | |
2160 | } | |
1da177e4 LT |
2161 | |
2162 | len = 1; | |
2163 | data = msg; | |
2164 | phase = PHASE_MSGIN; | |
2165 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2166 | ||
72064a78 FT |
2167 | if (len) { |
2168 | do_abort(instance); | |
2169 | return; | |
2170 | } | |
2171 | ||
1da177e4 | 2172 | if (!(msg[0] & 0x80)) { |
72064a78 | 2173 | shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); |
1abfd370 | 2174 | spi_print_msg(msg); |
72064a78 FT |
2175 | printk("\n"); |
2176 | do_abort(instance); | |
2177 | return; | |
2178 | } | |
2179 | lun = msg[0] & 0x07; | |
1da177e4 | 2180 | |
72064a78 FT |
2181 | /* |
2182 | * We need to add code for SCSI-II to track which devices have | |
2183 | * I_T_L_Q nexuses established, and which have simple I_T_L | |
2184 | * nexuses so we can chose to do additional data transfer. | |
2185 | */ | |
1da177e4 | 2186 | |
72064a78 FT |
2187 | /* |
2188 | * Find the command corresponding to the I_T_L or I_T_L_Q nexus we | |
2189 | * just reestablished, and remove it from the disconnected queue. | |
2190 | */ | |
1da177e4 | 2191 | |
32b26a10 FT |
2192 | tmp = NULL; |
2193 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2194 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2195 | ||
2196 | if (target_mask == (1 << scmd_id(cmd)) && | |
2197 | lun == (u8)cmd->device->lun) { | |
2198 | list_del(&ncmd->list); | |
2199 | tmp = cmd; | |
72064a78 | 2200 | break; |
1da177e4 LT |
2201 | } |
2202 | } | |
0d3d9a42 FT |
2203 | |
2204 | if (tmp) { | |
2205 | dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, | |
2206 | "reselect: removed %p from disconnected queue\n", tmp); | |
2207 | } else { | |
72064a78 FT |
2208 | shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", |
2209 | target_mask, lun); | |
2210 | /* | |
2211 | * Since we have an established nexus that we can't do anything with, | |
2212 | * we must abort it. | |
2213 | */ | |
1da177e4 | 2214 | do_abort(instance); |
72064a78 | 2215 | return; |
1da177e4 | 2216 | } |
72064a78 FT |
2217 | |
2218 | /* Accept message by clearing ACK */ | |
2219 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2220 | ||
2221 | hostdata->connected = tmp; | |
2222 | dprintk(NDEBUG_RESELECTION, "scsi%d : nexus established, target = %d, lun = %llu, tag = %d\n", | |
2223 | instance->host_no, tmp->device->id, tmp->device->lun, tmp->tag); | |
1da177e4 LT |
2224 | } |
2225 | ||
2226 | /* | |
2227 | * Function : void NCR5380_dma_complete (struct Scsi_Host *instance) | |
2228 | * | |
2229 | * Purpose : called by interrupt handler when DMA finishes or a phase | |
2230 | * mismatch occurs (which would finish the DMA transfer). | |
2231 | * | |
2232 | * Inputs : instance - this instance of the NCR5380. | |
2233 | * | |
710ddd0d | 2234 | * Returns : pointer to the scsi_cmnd structure for which the I_T_L |
1da177e4 LT |
2235 | * nexus has been reestablished, on failure NULL is returned. |
2236 | */ | |
2237 | ||
2238 | #ifdef REAL_DMA | |
2239 | static void NCR5380_dma_complete(NCR5380_instance * instance) { | |
e8a60144 | 2240 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 2241 | int transferred; |
1da177e4 LT |
2242 | |
2243 | /* | |
2244 | * XXX this might not be right. | |
2245 | * | |
2246 | * Wait for final byte to transfer, ie wait for ACK to go false. | |
2247 | * | |
2248 | * We should use the Last Byte Sent bit, unfortunately this is | |
2249 | * not available on the 5380/5381 (only the various CMOS chips) | |
2250 | * | |
2251 | * FIXME: timeout, and need to handle long timeout/irq case | |
2252 | */ | |
2253 | ||
2254 | NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ); | |
2255 | ||
1da177e4 LT |
2256 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2257 | ||
2258 | /* | |
2259 | * The only places we should see a phase mismatch and have to send | |
2260 | * data from the same set of pointers will be the data transfer | |
2261 | * phases. So, residual, requested length are only important here. | |
2262 | */ | |
2263 | ||
2264 | if (!(hostdata->connected->SCp.phase & SR_CD)) { | |
2265 | transferred = instance->dmalen - NCR5380_dma_residual(); | |
2266 | hostdata->connected->SCp.this_residual -= transferred; | |
2267 | hostdata->connected->SCp.ptr += transferred; | |
2268 | } | |
2269 | } | |
2270 | #endif /* def REAL_DMA */ | |
2271 | ||
8b00c3d5 FT |
2272 | /** |
2273 | * list_find_cmd - test for presence of a command in a linked list | |
2274 | * @haystack: list of commands | |
2275 | * @needle: command to search for | |
2276 | */ | |
2277 | ||
2278 | static bool list_find_cmd(struct list_head *haystack, | |
2279 | struct scsi_cmnd *needle) | |
2280 | { | |
2281 | struct NCR5380_cmd *ncmd; | |
2282 | ||
2283 | list_for_each_entry(ncmd, haystack, list) | |
2284 | if (NCR5380_to_scmd(ncmd) == needle) | |
2285 | return true; | |
2286 | return false; | |
2287 | } | |
2288 | ||
2289 | /** | |
2290 | * list_remove_cmd - remove a command from linked list | |
2291 | * @haystack: list of commands | |
2292 | * @needle: command to remove | |
2293 | */ | |
2294 | ||
2295 | static bool list_del_cmd(struct list_head *haystack, | |
2296 | struct scsi_cmnd *needle) | |
2297 | { | |
2298 | if (list_find_cmd(haystack, needle)) { | |
2299 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); | |
2300 | ||
2301 | list_del(&ncmd->list); | |
2302 | return true; | |
2303 | } | |
2304 | return false; | |
2305 | } | |
2306 | ||
2307 | /** | |
2308 | * NCR5380_abort - scsi host eh_abort_handler() method | |
2309 | * @cmd: the command to be aborted | |
2310 | * | |
2311 | * Try to abort a given command by removing it from queues and/or sending | |
2312 | * the target an abort message. This may not succeed in causing a target | |
2313 | * to abort the command. Nonetheless, the low-level driver must forget about | |
2314 | * the command because the mid-layer reclaims it and it may be re-issued. | |
2315 | * | |
2316 | * The normal path taken by a command is as follows. For EH we trace this | |
2317 | * same path to locate and abort the command. | |
2318 | * | |
2319 | * unissued -> selecting -> [unissued -> selecting ->]... connected -> | |
2320 | * [disconnected -> connected ->]... | |
2321 | * [autosense -> connected ->] done | |
2322 | * | |
2323 | * If cmd is unissued then just remove it. | |
2324 | * If cmd is disconnected, try to select the target. | |
2325 | * If cmd is connected, try to send an abort message. | |
2326 | * If cmd is waiting for autosense, give it a chance to complete but check | |
2327 | * that it isn't left connected. | |
2328 | * If cmd was not found at all then presumably it has already been completed, | |
2329 | * in which case return SUCCESS to try to avoid further EH measures. | |
2330 | * If the command has not completed yet, we must not fail to find it. | |
1da177e4 LT |
2331 | */ |
2332 | ||
710ddd0d FT |
2333 | static int NCR5380_abort(struct scsi_cmnd *cmd) |
2334 | { | |
1da177e4 | 2335 | struct Scsi_Host *instance = cmd->device->host; |
e8a60144 | 2336 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
11d2f63b | 2337 | unsigned long flags; |
8b00c3d5 | 2338 | int result = SUCCESS; |
1fa6b5fb | 2339 | |
11d2f63b FT |
2340 | spin_lock_irqsave(&hostdata->lock, flags); |
2341 | ||
32b26a10 | 2342 | #if (NDEBUG & NDEBUG_ANY) |
8b00c3d5 | 2343 | scmd_printk(KERN_INFO, cmd, __func__); |
32b26a10 | 2344 | #endif |
e5c3fddf FT |
2345 | NCR5380_dprint(NDEBUG_ANY, instance); |
2346 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
1da177e4 | 2347 | |
8b00c3d5 FT |
2348 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2349 | dsprintk(NDEBUG_ABORT, instance, | |
2350 | "abort: removed %p from issue queue\n", cmd); | |
2351 | cmd->result = DID_ABORT << 16; | |
2352 | cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ | |
2353 | } | |
2354 | ||
2355 | if (list_del_cmd(&hostdata->disconnected, cmd)) { | |
2356 | dsprintk(NDEBUG_ABORT, instance, | |
2357 | "abort: removed %p from disconnected list\n", cmd); | |
2358 | cmd->result = DID_ERROR << 16; | |
2359 | if (!hostdata->connected) | |
2360 | NCR5380_select(instance, cmd); | |
2361 | if (hostdata->connected != cmd) { | |
2362 | complete_cmd(instance, cmd); | |
2363 | result = FAILED; | |
2364 | goto out; | |
2365 | } | |
2366 | } | |
2367 | ||
2368 | if (hostdata->connected == cmd) { | |
2369 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2370 | hostdata->connected = NULL; | |
2371 | if (do_abort(instance)) { | |
2372 | set_host_byte(cmd, DID_ERROR); | |
2373 | complete_cmd(instance, cmd); | |
2374 | result = FAILED; | |
2375 | goto out; | |
2376 | } | |
2377 | set_host_byte(cmd, DID_ABORT); | |
2378 | #ifdef REAL_DMA | |
2379 | hostdata->dma_len = 0; | |
2380 | #endif | |
2381 | if (cmd->cmnd[0] == REQUEST_SENSE) | |
2382 | complete_cmd(instance, cmd); | |
2383 | else { | |
2384 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
2385 | ||
2386 | /* Perform autosense for this command */ | |
2387 | list_add(&ncmd->list, &hostdata->autosense); | |
2388 | } | |
2389 | } | |
2390 | ||
2391 | if (list_find_cmd(&hostdata->autosense, cmd)) { | |
2392 | dsprintk(NDEBUG_ABORT, instance, | |
2393 | "abort: found %p on sense queue\n", cmd); | |
2394 | spin_unlock_irqrestore(&hostdata->lock, flags); | |
2395 | queue_work(hostdata->work_q, &hostdata->main_task); | |
2396 | msleep(1000); | |
2397 | spin_lock_irqsave(&hostdata->lock, flags); | |
2398 | if (list_del_cmd(&hostdata->autosense, cmd)) { | |
2399 | dsprintk(NDEBUG_ABORT, instance, | |
2400 | "abort: removed %p from sense queue\n", cmd); | |
2401 | set_host_byte(cmd, DID_ABORT); | |
2402 | complete_cmd(instance, cmd); | |
2403 | goto out; | |
2404 | } | |
2405 | } | |
2406 | ||
2407 | if (hostdata->connected == cmd) { | |
2408 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2409 | hostdata->connected = NULL; | |
2410 | if (do_abort(instance)) { | |
2411 | set_host_byte(cmd, DID_ERROR); | |
2412 | complete_cmd(instance, cmd); | |
2413 | result = FAILED; | |
2414 | goto out; | |
2415 | } | |
2416 | set_host_byte(cmd, DID_ABORT); | |
2417 | #ifdef REAL_DMA | |
2418 | hostdata->dma_len = 0; | |
2419 | #endif | |
2420 | complete_cmd(instance, cmd); | |
2421 | } | |
2422 | ||
2423 | out: | |
2424 | if (result == FAILED) | |
2425 | dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); | |
2426 | else | |
2427 | dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); | |
2428 | ||
2429 | queue_work(hostdata->work_q, &hostdata->main_task); | |
11d2f63b | 2430 | spin_unlock_irqrestore(&hostdata->lock, flags); |
32b26a10 | 2431 | |
8b00c3d5 | 2432 | return result; |
1da177e4 LT |
2433 | } |
2434 | ||
2435 | ||
3be1b3ea FT |
2436 | /** |
2437 | * NCR5380_bus_reset - reset the SCSI bus | |
2438 | * @cmd: SCSI command undergoing EH | |
1da177e4 | 2439 | * |
3be1b3ea | 2440 | * Returns SUCCESS |
1da177e4 LT |
2441 | */ |
2442 | ||
710ddd0d | 2443 | static int NCR5380_bus_reset(struct scsi_cmnd *cmd) |
68b3aa7c JG |
2444 | { |
2445 | struct Scsi_Host *instance = cmd->device->host; | |
11d2f63b FT |
2446 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
2447 | unsigned long flags; | |
68b3aa7c | 2448 | |
11d2f63b | 2449 | spin_lock_irqsave(&hostdata->lock, flags); |
3be1b3ea FT |
2450 | |
2451 | #if (NDEBUG & NDEBUG_ANY) | |
2452 | scmd_printk(KERN_INFO, cmd, "performing bus reset\n"); | |
3be1b3ea | 2453 | #endif |
e5c3fddf FT |
2454 | NCR5380_dprint(NDEBUG_ANY, instance); |
2455 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
68b3aa7c | 2456 | |
68b3aa7c | 2457 | do_reset(instance); |
3be1b3ea | 2458 | |
11d2f63b | 2459 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1da177e4 | 2460 | |
1da177e4 LT |
2461 | return SUCCESS; |
2462 | } |