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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
aff0cf9a | 2 | /* |
1da177e4 | 3 | * NCR 5380 generic driver routines. These should make it *trivial* |
594d4ba3 FT |
4 | * to implement 5380 SCSI drivers under Linux with a non-trantor |
5 | * architecture. | |
1da177e4 | 6 | * |
594d4ba3 | 7 | * Note that these routines also work with NR53c400 family chips. |
1da177e4 LT |
8 | * |
9 | * Copyright 1993, Drew Eckhardt | |
594d4ba3 FT |
10 | * Visionary Computing |
11 | * (Unix and Linux consulting and custom programming) | |
12 | * drew@colorado.edu | |
13 | * +1 (303) 666-5836 | |
1da177e4 | 14 | * |
aff0cf9a | 15 | * For more information, please consult |
1da177e4 LT |
16 | * |
17 | * NCR 5380 Family | |
18 | * SCSI Protocol Controller | |
19 | * Databook | |
20 | * | |
21 | * NCR Microelectronics | |
22 | * 1635 Aeroplaza Drive | |
23 | * Colorado Springs, CO 80916 | |
24 | * 1+ (719) 578-3400 | |
25 | * 1+ (800) 334-5454 | |
26 | */ | |
27 | ||
28 | /* | |
c16df32e FT |
29 | * With contributions from Ray Van Tassle, Ingmar Baumgart, |
30 | * Ronald van Cuijlenborg, Alan Cox and others. | |
1da177e4 LT |
31 | */ |
32 | ||
52d3e561 FT |
33 | /* Ported to Atari by Roman Hodek and others. */ |
34 | ||
e9db3198 FT |
35 | /* Adapted for the Sun 3 by Sam Creasey. */ |
36 | ||
1da177e4 LT |
37 | /* |
38 | * Design | |
39 | * | |
aff0cf9a | 40 | * This is a generic 5380 driver. To use it on a different platform, |
1da177e4 | 41 | * one simply writes appropriate system specific macros (ie, data |
aff0cf9a | 42 | * transfer - some PC's will use the I/O bus, 68K's must use |
1da177e4 LT |
43 | * memory mapped) and drops this file in their 'C' wrapper. |
44 | * | |
aff0cf9a | 45 | * As far as command queueing, two queues are maintained for |
1da177e4 | 46 | * each 5380 in the system - commands that haven't been issued yet, |
aff0cf9a FT |
47 | * and commands that are currently executing. This means that an |
48 | * unlimited number of commands may be queued, letting | |
49 | * more commands propagate from the higher driver levels giving higher | |
50 | * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, | |
51 | * allowing multiple commands to propagate all the way to a SCSI-II device | |
1da177e4 LT |
52 | * while a command is already executing. |
53 | * | |
54 | * | |
aff0cf9a | 55 | * Issues specific to the NCR5380 : |
1da177e4 | 56 | * |
aff0cf9a FT |
57 | * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead |
58 | * piece of hardware that requires you to sit in a loop polling for | |
59 | * the REQ signal as long as you are connected. Some devices are | |
60 | * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect | |
686f3990 | 61 | * while doing long seek operations. [...] These |
1da177e4 LT |
62 | * broken devices are the exception rather than the rule and I'd rather |
63 | * spend my time optimizing for the normal case. | |
64 | * | |
65 | * Architecture : | |
66 | * | |
67 | * At the heart of the design is a coroutine, NCR5380_main, | |
68 | * which is started from a workqueue for each NCR5380 host in the | |
69 | * system. It attempts to establish I_T_L or I_T_L_Q nexuses by | |
70 | * removing the commands from the issue queue and calling | |
aff0cf9a | 71 | * NCR5380_select() if a nexus is not established. |
1da177e4 LT |
72 | * |
73 | * Once a nexus is established, the NCR5380_information_transfer() | |
74 | * phase goes through the various phases as instructed by the target. | |
75 | * if the target goes into MSG IN and sends a DISCONNECT message, | |
76 | * the command structure is placed into the per instance disconnected | |
aff0cf9a | 77 | * queue, and NCR5380_main tries to find more work. If the target is |
1da177e4 LT |
78 | * idle for too long, the system will try to sleep. |
79 | * | |
80 | * If a command has disconnected, eventually an interrupt will trigger, | |
81 | * calling NCR5380_intr() which will in turn call NCR5380_reselect | |
82 | * to reestablish a nexus. This will run main if necessary. | |
83 | * | |
aff0cf9a | 84 | * On command termination, the done function will be called as |
1da177e4 LT |
85 | * appropriate. |
86 | * | |
aff0cf9a | 87 | * SCSI pointers are maintained in the SCp field of SCSI command |
1da177e4 LT |
88 | * structures, being initialized after the command is connected |
89 | * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. | |
90 | * Note that in violation of the standard, an implicit SAVE POINTERS operation | |
91 | * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. | |
92 | */ | |
93 | ||
94 | /* | |
95 | * Using this file : | |
96 | * This file a skeleton Linux SCSI driver for the NCR 5380 series | |
aff0cf9a | 97 | * of chips. To use it, you write an architecture specific functions |
1da177e4 LT |
98 | * and macros and include this file in your driver. |
99 | * | |
1da177e4 | 100 | * These macros MUST be defined : |
aff0cf9a | 101 | * |
1da177e4 LT |
102 | * NCR5380_read(register) - read from the specified register |
103 | * | |
aff0cf9a | 104 | * NCR5380_write(register, value) - write to the specific register |
1da177e4 | 105 | * |
aff0cf9a | 106 | * NCR5380_implementation_fields - additional fields needed for this |
594d4ba3 | 107 | * specific implementation of the NCR5380 |
1da177e4 LT |
108 | * |
109 | * Either real DMA *or* pseudo DMA may be implemented | |
1da177e4 | 110 | * |
4a98f896 FT |
111 | * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer |
112 | * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380 | |
113 | * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory | |
114 | * NCR5380_dma_residual - residual byte count | |
1da177e4 | 115 | * |
1da177e4 | 116 | * The generic driver is initialized by calling NCR5380_init(instance), |
906e4a3c | 117 | * after setting the appropriate host specific fields and ID. |
1da177e4 LT |
118 | */ |
119 | ||
e5d55d1a FT |
120 | #ifndef NCR5380_io_delay |
121 | #define NCR5380_io_delay(x) | |
122 | #endif | |
123 | ||
52d3e561 FT |
124 | #ifndef NCR5380_acquire_dma_irq |
125 | #define NCR5380_acquire_dma_irq(x) (1) | |
126 | #endif | |
127 | ||
128 | #ifndef NCR5380_release_dma_irq | |
129 | #define NCR5380_release_dma_irq(x) | |
130 | #endif | |
131 | ||
0b7a2235 FT |
132 | static unsigned int disconnect_mask = ~0; |
133 | module_param(disconnect_mask, int, 0444); | |
134 | ||
54d8fe44 FT |
135 | static int do_abort(struct Scsi_Host *); |
136 | static void do_reset(struct Scsi_Host *); | |
6b0e87a6 | 137 | static void bus_reset_cleanup(struct Scsi_Host *); |
1da177e4 | 138 | |
c16df32e | 139 | /** |
0d2cf867 | 140 | * initialize_SCp - init the scsi pointer field |
594d4ba3 | 141 | * @cmd: command block to set up |
1da177e4 | 142 | * |
594d4ba3 | 143 | * Set up the internal fields in the SCSI command. |
1da177e4 LT |
144 | */ |
145 | ||
710ddd0d | 146 | static inline void initialize_SCp(struct scsi_cmnd *cmd) |
1da177e4 | 147 | { |
aff0cf9a FT |
148 | /* |
149 | * Initialize the Scsi Pointer field so that all of the commands in the | |
1da177e4 LT |
150 | * various queues are valid. |
151 | */ | |
152 | ||
9e0fe44d BH |
153 | if (scsi_bufflen(cmd)) { |
154 | cmd->SCp.buffer = scsi_sglist(cmd); | |
45711f1a | 155 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
1da177e4 LT |
156 | cmd->SCp.this_residual = cmd->SCp.buffer->length; |
157 | } else { | |
158 | cmd->SCp.buffer = NULL; | |
9e0fe44d BH |
159 | cmd->SCp.ptr = NULL; |
160 | cmd->SCp.this_residual = 0; | |
1da177e4 | 161 | } |
f27db8eb FT |
162 | |
163 | cmd->SCp.Status = 0; | |
164 | cmd->SCp.Message = 0; | |
1da177e4 LT |
165 | } |
166 | ||
0e9fdd2b FT |
167 | static inline void advance_sg_buffer(struct scsi_cmnd *cmd) |
168 | { | |
169 | struct scatterlist *s = cmd->SCp.buffer; | |
170 | ||
171 | if (!cmd->SCp.this_residual && s && !sg_is_last(s)) { | |
172 | cmd->SCp.buffer = sg_next(s); | |
173 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); | |
174 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
175 | } | |
176 | } | |
177 | ||
350767f2 FT |
178 | static inline void set_resid_from_SCp(struct scsi_cmnd *cmd) |
179 | { | |
180 | int resid = cmd->SCp.this_residual; | |
181 | struct scatterlist *s = cmd->SCp.buffer; | |
182 | ||
183 | if (s) | |
184 | while (!sg_is_last(s)) { | |
185 | s = sg_next(s); | |
186 | resid += s->length; | |
187 | } | |
188 | scsi_set_resid(cmd, resid); | |
189 | } | |
190 | ||
1da177e4 | 191 | /** |
b32ade12 | 192 | * NCR5380_poll_politely2 - wait for two chip register values |
d5d37a0a | 193 | * @hostdata: host private data |
b32ade12 FT |
194 | * @reg1: 5380 register to poll |
195 | * @bit1: Bitmask to check | |
196 | * @val1: Expected value | |
197 | * @reg2: Second 5380 register to poll | |
198 | * @bit2: Second bitmask to check | |
199 | * @val2: Second expected value | |
2f854b82 FT |
200 | * @wait: Time-out in jiffies |
201 | * | |
202 | * Polls the chip in a reasonably efficient manner waiting for an | |
203 | * event to occur. After a short quick poll we begin to yield the CPU | |
204 | * (if possible). In irq contexts the time-out is arbitrarily limited. | |
205 | * Callers may hold locks as long as they are held in irq mode. | |
206 | * | |
b32ade12 | 207 | * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. |
1da177e4 | 208 | */ |
2f854b82 | 209 | |
d5d37a0a | 210 | static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata, |
61e1ce58 FT |
211 | unsigned int reg1, u8 bit1, u8 val1, |
212 | unsigned int reg2, u8 bit2, u8 val2, | |
213 | unsigned long wait) | |
1da177e4 | 214 | { |
d4408dd7 | 215 | unsigned long n = hostdata->poll_loops; |
2f854b82 | 216 | unsigned long deadline = jiffies + wait; |
2f854b82 | 217 | |
2f854b82 | 218 | do { |
b32ade12 FT |
219 | if ((NCR5380_read(reg1) & bit1) == val1) |
220 | return 0; | |
221 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 LT |
222 | return 0; |
223 | cpu_relax(); | |
2f854b82 FT |
224 | } while (n--); |
225 | ||
226 | if (irqs_disabled() || in_interrupt()) | |
227 | return -ETIMEDOUT; | |
228 | ||
229 | /* Repeatedly sleep for 1 ms until deadline */ | |
230 | while (time_is_after_jiffies(deadline)) { | |
231 | schedule_timeout_uninterruptible(1); | |
b32ade12 FT |
232 | if ((NCR5380_read(reg1) & bit1) == val1) |
233 | return 0; | |
234 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 | 235 | return 0; |
1da177e4 | 236 | } |
2f854b82 | 237 | |
1da177e4 LT |
238 | return -ETIMEDOUT; |
239 | } | |
240 | ||
185a7a1c | 241 | #if NDEBUG |
1da177e4 LT |
242 | static struct { |
243 | unsigned char mask; | |
244 | const char *name; | |
aff0cf9a FT |
245 | } signals[] = { |
246 | {SR_DBP, "PARITY"}, | |
247 | {SR_RST, "RST"}, | |
248 | {SR_BSY, "BSY"}, | |
249 | {SR_REQ, "REQ"}, | |
250 | {SR_MSG, "MSG"}, | |
251 | {SR_CD, "CD"}, | |
252 | {SR_IO, "IO"}, | |
253 | {SR_SEL, "SEL"}, | |
1da177e4 | 254 | {0, NULL} |
aff0cf9a | 255 | }, |
1da177e4 | 256 | basrs[] = { |
12866b99 FT |
257 | {BASR_END_DMA_TRANSFER, "END OF DMA"}, |
258 | {BASR_DRQ, "DRQ"}, | |
259 | {BASR_PARITY_ERROR, "PARITY ERROR"}, | |
260 | {BASR_IRQ, "IRQ"}, | |
261 | {BASR_PHASE_MATCH, "PHASE MATCH"}, | |
262 | {BASR_BUSY_ERROR, "BUSY ERROR"}, | |
aff0cf9a FT |
263 | {BASR_ATN, "ATN"}, |
264 | {BASR_ACK, "ACK"}, | |
1da177e4 | 265 | {0, NULL} |
aff0cf9a FT |
266 | }, |
267 | icrs[] = { | |
268 | {ICR_ASSERT_RST, "ASSERT RST"}, | |
12866b99 FT |
269 | {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, |
270 | {ICR_ARBITRATION_LOST, "LOST ARB."}, | |
aff0cf9a FT |
271 | {ICR_ASSERT_ACK, "ASSERT ACK"}, |
272 | {ICR_ASSERT_BSY, "ASSERT BSY"}, | |
273 | {ICR_ASSERT_SEL, "ASSERT SEL"}, | |
274 | {ICR_ASSERT_ATN, "ASSERT ATN"}, | |
275 | {ICR_ASSERT_DATA, "ASSERT DATA"}, | |
1da177e4 | 276 | {0, NULL} |
aff0cf9a FT |
277 | }, |
278 | mrs[] = { | |
12866b99 FT |
279 | {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, |
280 | {MR_TARGET, "TARGET"}, | |
281 | {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, | |
282 | {MR_ENABLE_PAR_INTR, "PARITY INTR"}, | |
283 | {MR_ENABLE_EOP_INTR, "EOP INTR"}, | |
284 | {MR_MONITOR_BSY, "MONITOR BSY"}, | |
285 | {MR_DMA_MODE, "DMA MODE"}, | |
286 | {MR_ARBITRATE, "ARBITRATE"}, | |
1da177e4 LT |
287 | {0, NULL} |
288 | }; | |
289 | ||
290 | /** | |
0d2cf867 FT |
291 | * NCR5380_print - print scsi bus signals |
292 | * @instance: adapter state to dump | |
1da177e4 | 293 | * |
594d4ba3 | 294 | * Print the SCSI bus signals for debugging purposes |
1da177e4 LT |
295 | */ |
296 | ||
297 | static void NCR5380_print(struct Scsi_Host *instance) | |
298 | { | |
61e1ce58 | 299 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
8cee3e16 | 300 | unsigned char status, basr, mr, icr, i; |
1da177e4 | 301 | |
1da177e4 LT |
302 | status = NCR5380_read(STATUS_REG); |
303 | mr = NCR5380_read(MODE_REG); | |
304 | icr = NCR5380_read(INITIATOR_COMMAND_REG); | |
305 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
306 | ||
12866b99 | 307 | printk(KERN_DEBUG "SR = 0x%02x : ", status); |
1da177e4 LT |
308 | for (i = 0; signals[i].mask; ++i) |
309 | if (status & signals[i].mask) | |
12866b99 FT |
310 | printk(KERN_CONT "%s, ", signals[i].name); |
311 | printk(KERN_CONT "\nBASR = 0x%02x : ", basr); | |
1da177e4 LT |
312 | for (i = 0; basrs[i].mask; ++i) |
313 | if (basr & basrs[i].mask) | |
12866b99 FT |
314 | printk(KERN_CONT "%s, ", basrs[i].name); |
315 | printk(KERN_CONT "\nICR = 0x%02x : ", icr); | |
1da177e4 LT |
316 | for (i = 0; icrs[i].mask; ++i) |
317 | if (icr & icrs[i].mask) | |
12866b99 FT |
318 | printk(KERN_CONT "%s, ", icrs[i].name); |
319 | printk(KERN_CONT "\nMR = 0x%02x : ", mr); | |
1da177e4 LT |
320 | for (i = 0; mrs[i].mask; ++i) |
321 | if (mr & mrs[i].mask) | |
12866b99 FT |
322 | printk(KERN_CONT "%s, ", mrs[i].name); |
323 | printk(KERN_CONT "\n"); | |
1da177e4 LT |
324 | } |
325 | ||
0d2cf867 FT |
326 | static struct { |
327 | unsigned char value; | |
328 | const char *name; | |
329 | } phases[] = { | |
330 | {PHASE_DATAOUT, "DATAOUT"}, | |
331 | {PHASE_DATAIN, "DATAIN"}, | |
332 | {PHASE_CMDOUT, "CMDOUT"}, | |
333 | {PHASE_STATIN, "STATIN"}, | |
334 | {PHASE_MSGOUT, "MSGOUT"}, | |
335 | {PHASE_MSGIN, "MSGIN"}, | |
336 | {PHASE_UNKNOWN, "UNKNOWN"} | |
337 | }; | |
1da177e4 | 338 | |
c16df32e | 339 | /** |
0d2cf867 | 340 | * NCR5380_print_phase - show SCSI phase |
594d4ba3 | 341 | * @instance: adapter to dump |
1da177e4 | 342 | * |
594d4ba3 | 343 | * Print the current SCSI phase for debugging purposes |
1da177e4 LT |
344 | */ |
345 | ||
346 | static void NCR5380_print_phase(struct Scsi_Host *instance) | |
347 | { | |
61e1ce58 | 348 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
349 | unsigned char status; |
350 | int i; | |
1da177e4 LT |
351 | |
352 | status = NCR5380_read(STATUS_REG); | |
353 | if (!(status & SR_REQ)) | |
6a6ff4ac | 354 | shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); |
1da177e4 | 355 | else { |
0d2cf867 FT |
356 | for (i = 0; (phases[i].value != PHASE_UNKNOWN) && |
357 | (phases[i].value != (status & PHASE_MASK)); ++i) | |
358 | ; | |
6a6ff4ac | 359 | shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); |
1da177e4 LT |
360 | } |
361 | } | |
362 | #endif | |
363 | ||
1da177e4 | 364 | /** |
09028461 | 365 | * NCR5380_info - report driver and host information |
594d4ba3 | 366 | * @instance: relevant scsi host instance |
1da177e4 | 367 | * |
594d4ba3 | 368 | * For use as the host template info() handler. |
1da177e4 LT |
369 | */ |
370 | ||
8c32513b | 371 | static const char *NCR5380_info(struct Scsi_Host *instance) |
1da177e4 | 372 | { |
8c32513b FT |
373 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
374 | ||
375 | return hostdata->info; | |
376 | } | |
377 | ||
1da177e4 | 378 | /** |
0d2cf867 | 379 | * NCR5380_init - initialise an NCR5380 |
594d4ba3 FT |
380 | * @instance: adapter to configure |
381 | * @flags: control flags | |
1da177e4 | 382 | * |
594d4ba3 FT |
383 | * Initializes *instance and corresponding 5380 chip, |
384 | * with flags OR'd into the initial flags value. | |
1da177e4 | 385 | * |
594d4ba3 | 386 | * Notes : I assume that the host, hostno, and id bits have been |
0d2cf867 | 387 | * set correctly. I don't care about the irq and other fields. |
1da177e4 | 388 | * |
594d4ba3 | 389 | * Returns 0 for success |
1da177e4 LT |
390 | */ |
391 | ||
6f039790 | 392 | static int NCR5380_init(struct Scsi_Host *instance, int flags) |
1da177e4 | 393 | { |
e8a60144 | 394 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 395 | int i; |
2f854b82 | 396 | unsigned long deadline; |
d4408dd7 | 397 | unsigned long accesses_per_ms; |
1da177e4 | 398 | |
ae5e33af FT |
399 | instance->max_lun = 7; |
400 | ||
0d2cf867 | 401 | hostdata->host = instance; |
1da177e4 | 402 | hostdata->id_mask = 1 << instance->this_id; |
0d2cf867 | 403 | hostdata->id_higher_mask = 0; |
1da177e4 LT |
404 | for (i = hostdata->id_mask; i <= 0x80; i <<= 1) |
405 | if (i > hostdata->id_mask) | |
406 | hostdata->id_higher_mask |= i; | |
407 | for (i = 0; i < 8; ++i) | |
408 | hostdata->busy[i] = 0; | |
e4dec680 FT |
409 | hostdata->dma_len = 0; |
410 | ||
11d2f63b | 411 | spin_lock_init(&hostdata->lock); |
1da177e4 | 412 | hostdata->connected = NULL; |
f27db8eb FT |
413 | hostdata->sensing = NULL; |
414 | INIT_LIST_HEAD(&hostdata->autosense); | |
32b26a10 FT |
415 | INIT_LIST_HEAD(&hostdata->unissued); |
416 | INIT_LIST_HEAD(&hostdata->disconnected); | |
417 | ||
55181be8 | 418 | hostdata->flags = flags; |
aff0cf9a | 419 | |
8d8601a7 | 420 | INIT_WORK(&hostdata->main_task, NCR5380_main); |
0ad0eff9 FT |
421 | hostdata->work_q = alloc_workqueue("ncr5380_%d", |
422 | WQ_UNBOUND | WQ_MEM_RECLAIM, | |
423 | 1, instance->host_no); | |
424 | if (!hostdata->work_q) | |
425 | return -ENOMEM; | |
426 | ||
09028461 FT |
427 | snprintf(hostdata->info, sizeof(hostdata->info), |
428 | "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}", | |
429 | instance->hostt->name, instance->irq, hostdata->io_port, | |
430 | hostdata->base, instance->can_queue, instance->cmd_per_lun, | |
431 | instance->sg_tablesize, instance->this_id, | |
432 | hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", | |
433 | hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", | |
434 | hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : ""); | |
8c32513b | 435 | |
1da177e4 LT |
436 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
437 | NCR5380_write(MODE_REG, MR_BASE); | |
438 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
439 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2f854b82 FT |
440 | |
441 | /* Calibrate register polling loop */ | |
442 | i = 0; | |
443 | deadline = jiffies + 1; | |
444 | do { | |
445 | cpu_relax(); | |
446 | } while (time_is_after_jiffies(deadline)); | |
447 | deadline += msecs_to_jiffies(256); | |
448 | do { | |
449 | NCR5380_read(STATUS_REG); | |
450 | ++i; | |
451 | cpu_relax(); | |
452 | } while (time_is_after_jiffies(deadline)); | |
d4408dd7 FT |
453 | accesses_per_ms = i / 256; |
454 | hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2; | |
2f854b82 | 455 | |
b6488f97 FT |
456 | return 0; |
457 | } | |
1da177e4 | 458 | |
b6488f97 FT |
459 | /** |
460 | * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. | |
461 | * @instance: adapter to check | |
462 | * | |
463 | * If the system crashed, it may have crashed with a connected target and | |
464 | * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the | |
465 | * currently established nexus, which we know nothing about. Failing that | |
466 | * do a bus reset. | |
467 | * | |
468 | * Note that a bus reset will cause the chip to assert IRQ. | |
469 | * | |
470 | * Returns 0 if successful, otherwise -ENXIO. | |
471 | */ | |
472 | ||
473 | static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) | |
474 | { | |
9c3f0e2b | 475 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 476 | int pass; |
1da177e4 LT |
477 | |
478 | for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { | |
479 | switch (pass) { | |
480 | case 1: | |
481 | case 3: | |
482 | case 5: | |
636b1ec8 | 483 | shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); |
d5d37a0a | 484 | NCR5380_poll_politely(hostdata, |
636b1ec8 | 485 | STATUS_REG, SR_BSY, 0, 5 * HZ); |
1da177e4 LT |
486 | break; |
487 | case 2: | |
636b1ec8 | 488 | shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); |
1da177e4 LT |
489 | do_abort(instance); |
490 | break; | |
491 | case 4: | |
636b1ec8 | 492 | shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); |
1da177e4 | 493 | do_reset(instance); |
9c3f0e2b FT |
494 | /* Wait after a reset; the SCSI standard calls for |
495 | * 250ms, we wait 500ms to be on the safe side. | |
496 | * But some Toshiba CD-ROMs need ten times that. | |
497 | */ | |
498 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
499 | msleep(2500); | |
500 | else | |
501 | msleep(500); | |
1da177e4 LT |
502 | break; |
503 | case 6: | |
636b1ec8 | 504 | shost_printk(KERN_ERR, instance, "bus locked solid\n"); |
1da177e4 LT |
505 | return -ENXIO; |
506 | } | |
507 | } | |
508 | return 0; | |
509 | } | |
510 | ||
511 | /** | |
0d2cf867 | 512 | * NCR5380_exit - remove an NCR5380 |
594d4ba3 | 513 | * @instance: adapter to remove |
0d2cf867 FT |
514 | * |
515 | * Assumes that no more work can be queued (e.g. by NCR5380_intr). | |
1da177e4 LT |
516 | */ |
517 | ||
a43cf0f3 | 518 | static void NCR5380_exit(struct Scsi_Host *instance) |
1da177e4 | 519 | { |
e8a60144 | 520 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 521 | |
8d8601a7 | 522 | cancel_work_sync(&hostdata->main_task); |
0ad0eff9 | 523 | destroy_workqueue(hostdata->work_q); |
1da177e4 LT |
524 | } |
525 | ||
677e0194 FT |
526 | /** |
527 | * complete_cmd - finish processing a command and return it to the SCSI ML | |
528 | * @instance: the host instance | |
529 | * @cmd: command to complete | |
530 | */ | |
531 | ||
532 | static void complete_cmd(struct Scsi_Host *instance, | |
533 | struct scsi_cmnd *cmd) | |
534 | { | |
535 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
536 | ||
537 | dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); | |
538 | ||
f27db8eb FT |
539 | if (hostdata->sensing == cmd) { |
540 | /* Autosense processing ends here */ | |
07035651 | 541 | if (status_byte(cmd->result) != GOOD) { |
f27db8eb | 542 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
07035651 | 543 | } else { |
f27db8eb | 544 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
07035651 FT |
545 | set_driver_byte(cmd, DRIVER_SENSE); |
546 | } | |
f27db8eb FT |
547 | hostdata->sensing = NULL; |
548 | } | |
549 | ||
677e0194 FT |
550 | cmd->scsi_done(cmd); |
551 | } | |
552 | ||
1da177e4 | 553 | /** |
1bb40589 FT |
554 | * NCR5380_queue_command - queue a command |
555 | * @instance: the relevant SCSI adapter | |
556 | * @cmd: SCSI command | |
1da177e4 | 557 | * |
1bb40589 FT |
558 | * cmd is added to the per-instance issue queue, with minor |
559 | * twiddling done to the host specific fields of cmd. If the | |
560 | * main coroutine is not running, it is restarted. | |
1da177e4 LT |
561 | */ |
562 | ||
1bb40589 FT |
563 | static int NCR5380_queue_command(struct Scsi_Host *instance, |
564 | struct scsi_cmnd *cmd) | |
1da177e4 | 565 | { |
1bb40589 | 566 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
32b26a10 | 567 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1bb40589 | 568 | unsigned long flags; |
1da177e4 LT |
569 | |
570 | #if (NDEBUG & NDEBUG_NO_WRITE) | |
571 | switch (cmd->cmnd[0]) { | |
572 | case WRITE_6: | |
573 | case WRITE_10: | |
dbb6b350 | 574 | shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); |
1da177e4 | 575 | cmd->result = (DID_ERROR << 16); |
1bb40589 | 576 | cmd->scsi_done(cmd); |
1da177e4 LT |
577 | return 0; |
578 | } | |
0d2cf867 | 579 | #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ |
1da177e4 | 580 | |
1da177e4 LT |
581 | cmd->result = 0; |
582 | ||
52d3e561 FT |
583 | if (!NCR5380_acquire_dma_irq(instance)) |
584 | return SCSI_MLQUEUE_HOST_BUSY; | |
585 | ||
11d2f63b | 586 | spin_lock_irqsave(&hostdata->lock, flags); |
1bb40589 | 587 | |
aff0cf9a FT |
588 | /* |
589 | * Insert the cmd into the issue queue. Note that REQUEST SENSE | |
1da177e4 | 590 | * commands are added to the head of the queue since any command will |
aff0cf9a | 591 | * clear the contingent allegiance condition that exists and the |
1da177e4 LT |
592 | * sense data is only guaranteed to be valid while the condition exists. |
593 | */ | |
594 | ||
32b26a10 FT |
595 | if (cmd->cmnd[0] == REQUEST_SENSE) |
596 | list_add(&ncmd->list, &hostdata->unissued); | |
597 | else | |
598 | list_add_tail(&ncmd->list, &hostdata->unissued); | |
599 | ||
11d2f63b | 600 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1bb40589 | 601 | |
dbb6b350 FT |
602 | dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", |
603 | cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); | |
1da177e4 | 604 | |
1da177e4 | 605 | /* Kick off command processing */ |
8d8601a7 | 606 | queue_work(hostdata->work_q, &hostdata->main_task); |
1da177e4 LT |
607 | return 0; |
608 | } | |
609 | ||
52d3e561 FT |
610 | static inline void maybe_release_dma_irq(struct Scsi_Host *instance) |
611 | { | |
612 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
613 | ||
614 | /* Caller does the locking needed to set & test these data atomically */ | |
615 | if (list_empty(&hostdata->disconnected) && | |
616 | list_empty(&hostdata->unissued) && | |
617 | list_empty(&hostdata->autosense) && | |
618 | !hostdata->connected && | |
4ab2a787 | 619 | !hostdata->selecting) { |
52d3e561 | 620 | NCR5380_release_dma_irq(instance); |
4ab2a787 | 621 | } |
52d3e561 FT |
622 | } |
623 | ||
f27db8eb FT |
624 | /** |
625 | * dequeue_next_cmd - dequeue a command for processing | |
626 | * @instance: the scsi host instance | |
627 | * | |
628 | * Priority is given to commands on the autosense queue. These commands | |
629 | * need autosense because of a CHECK CONDITION result. | |
630 | * | |
631 | * Returns a command pointer if a command is found for a target that is | |
632 | * not already busy. Otherwise returns NULL. | |
633 | */ | |
634 | ||
635 | static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) | |
636 | { | |
637 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
638 | struct NCR5380_cmd *ncmd; | |
639 | struct scsi_cmnd *cmd; | |
640 | ||
8d5dbec3 | 641 | if (hostdata->sensing || list_empty(&hostdata->autosense)) { |
f27db8eb FT |
642 | list_for_each_entry(ncmd, &hostdata->unissued, list) { |
643 | cmd = NCR5380_to_scmd(ncmd); | |
644 | dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", | |
645 | cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); | |
646 | ||
647 | if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { | |
648 | list_del(&ncmd->list); | |
649 | dsprintk(NDEBUG_QUEUES, instance, | |
650 | "dequeue: removed %p from issue queue\n", cmd); | |
651 | return cmd; | |
652 | } | |
653 | } | |
654 | } else { | |
655 | /* Autosense processing begins here */ | |
656 | ncmd = list_first_entry(&hostdata->autosense, | |
657 | struct NCR5380_cmd, list); | |
658 | list_del(&ncmd->list); | |
659 | cmd = NCR5380_to_scmd(ncmd); | |
660 | dsprintk(NDEBUG_QUEUES, instance, | |
661 | "dequeue: removed %p from autosense queue\n", cmd); | |
662 | scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); | |
663 | hostdata->sensing = cmd; | |
664 | return cmd; | |
665 | } | |
666 | return NULL; | |
667 | } | |
668 | ||
669 | static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
670 | { | |
671 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
672 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
673 | ||
8d5dbec3 | 674 | if (hostdata->sensing == cmd) { |
f27db8eb FT |
675 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
676 | list_add(&ncmd->list, &hostdata->autosense); | |
677 | hostdata->sensing = NULL; | |
678 | } else | |
679 | list_add(&ncmd->list, &hostdata->unissued); | |
680 | } | |
681 | ||
1da177e4 | 682 | /** |
0d2cf867 | 683 | * NCR5380_main - NCR state machines |
1da177e4 | 684 | * |
594d4ba3 FT |
685 | * NCR5380_main is a coroutine that runs as long as more work can |
686 | * be done on the NCR5380 host adapters in a system. Both | |
687 | * NCR5380_queue_command() and NCR5380_intr() will try to start it | |
688 | * in case it is not running. | |
1da177e4 LT |
689 | */ |
690 | ||
c4028958 | 691 | static void NCR5380_main(struct work_struct *work) |
1da177e4 | 692 | { |
c4028958 | 693 | struct NCR5380_hostdata *hostdata = |
8d8601a7 | 694 | container_of(work, struct NCR5380_hostdata, main_task); |
1da177e4 | 695 | struct Scsi_Host *instance = hostdata->host; |
1da177e4 | 696 | int done; |
aff0cf9a | 697 | |
1da177e4 | 698 | do { |
1da177e4 | 699 | done = 1; |
11d2f63b | 700 | |
0a4e3612 | 701 | spin_lock_irq(&hostdata->lock); |
ccf6efd7 FT |
702 | while (!hostdata->connected && !hostdata->selecting) { |
703 | struct scsi_cmnd *cmd = dequeue_next_cmd(instance); | |
704 | ||
705 | if (!cmd) | |
706 | break; | |
1da177e4 | 707 | |
f27db8eb | 708 | dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); |
76f13b93 | 709 | |
f27db8eb FT |
710 | /* |
711 | * Attempt to establish an I_T_L nexus here. | |
712 | * On success, instance->hostdata->connected is set. | |
713 | * On failure, we must add the command back to the | |
714 | * issue queue so we can keep trying. | |
715 | */ | |
716 | /* | |
717 | * REQUEST SENSE commands are issued without tagged | |
718 | * queueing, even on SCSI-II devices because the | |
719 | * contingent allegiance condition exists for the | |
720 | * entire unit. | |
721 | */ | |
11d2f63b | 722 | |
ccf6efd7 | 723 | if (!NCR5380_select(instance, cmd)) { |
707d62b3 | 724 | dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); |
52d3e561 | 725 | maybe_release_dma_irq(instance); |
f27db8eb FT |
726 | } else { |
727 | dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, | |
728 | "main: select failed, returning %p to queue\n", cmd); | |
729 | requeue_cmd(instance, cmd); | |
730 | } | |
731 | } | |
e4dec680 | 732 | if (hostdata->connected && !hostdata->dma_len) { |
b746545f | 733 | dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); |
1da177e4 | 734 | NCR5380_information_transfer(instance); |
1da177e4 | 735 | done = 0; |
1d3db59d | 736 | } |
57f31326 FT |
737 | if (!hostdata->connected) |
738 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
0a4e3612 FT |
739 | spin_unlock_irq(&hostdata->lock); |
740 | if (!done) | |
741 | cond_resched(); | |
1da177e4 | 742 | } while (!done); |
1da177e4 LT |
743 | } |
744 | ||
8053b0ee FT |
745 | /* |
746 | * NCR5380_dma_complete - finish DMA transfer | |
747 | * @instance: the scsi host instance | |
748 | * | |
749 | * Called by the interrupt handler when DMA finishes or a phase | |
750 | * mismatch occurs (which would end the DMA transfer). | |
751 | */ | |
752 | ||
753 | static void NCR5380_dma_complete(struct Scsi_Host *instance) | |
754 | { | |
755 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
756 | int transferred; | |
757 | unsigned char **data; | |
758 | int *count; | |
759 | int saved_data = 0, overrun = 0; | |
760 | unsigned char p; | |
761 | ||
762 | if (hostdata->read_overruns) { | |
763 | p = hostdata->connected->SCp.phase; | |
764 | if (p & SR_IO) { | |
765 | udelay(10); | |
766 | if ((NCR5380_read(BUS_AND_STATUS_REG) & | |
767 | (BASR_PHASE_MATCH | BASR_ACK)) == | |
768 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
769 | saved_data = NCR5380_read(INPUT_DATA_REG); | |
770 | overrun = 1; | |
771 | dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); | |
772 | } | |
773 | } | |
774 | } | |
775 | ||
e9db3198 FT |
776 | #ifdef CONFIG_SUN3 |
777 | if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { | |
778 | pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", | |
779 | instance->host_no); | |
780 | BUG(); | |
781 | } | |
782 | ||
783 | if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == | |
784 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
785 | pr_err("scsi%d: BASR %02x\n", instance->host_no, | |
786 | NCR5380_read(BUS_AND_STATUS_REG)); | |
787 | pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", | |
788 | instance->host_no); | |
789 | BUG(); | |
790 | } | |
791 | #endif | |
792 | ||
8053b0ee FT |
793 | NCR5380_write(MODE_REG, MR_BASE); |
794 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
795 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
796 | ||
4a98f896 | 797 | transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata); |
8053b0ee FT |
798 | hostdata->dma_len = 0; |
799 | ||
800 | data = (unsigned char **)&hostdata->connected->SCp.ptr; | |
801 | count = &hostdata->connected->SCp.this_residual; | |
802 | *data += transferred; | |
803 | *count -= transferred; | |
804 | ||
805 | if (hostdata->read_overruns) { | |
806 | int cnt, toPIO; | |
807 | ||
808 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { | |
809 | cnt = toPIO = hostdata->read_overruns; | |
810 | if (overrun) { | |
811 | dsprintk(NDEBUG_DMA, instance, | |
812 | "Got an input overrun, using saved byte\n"); | |
813 | *(*data)++ = saved_data; | |
814 | (*count)--; | |
815 | cnt--; | |
816 | toPIO--; | |
817 | } | |
818 | if (toPIO > 0) { | |
819 | dsprintk(NDEBUG_DMA, instance, | |
820 | "Doing %d byte PIO to 0x%p\n", cnt, *data); | |
821 | NCR5380_transfer_pio(instance, &p, &cnt, data); | |
822 | *count -= toPIO - cnt; | |
823 | } | |
824 | } | |
825 | } | |
826 | } | |
827 | ||
1da177e4 | 828 | /** |
cd400825 FT |
829 | * NCR5380_intr - generic NCR5380 irq handler |
830 | * @irq: interrupt number | |
831 | * @dev_id: device info | |
832 | * | |
833 | * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses | |
834 | * from the disconnected queue, and restarting NCR5380_main() | |
835 | * as required. | |
836 | * | |
837 | * The chip can assert IRQ in any of six different conditions. The IRQ flag | |
838 | * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). | |
839 | * Three of these six conditions are latched in the Bus and Status Register: | |
840 | * - End of DMA (cleared by ending DMA Mode) | |
841 | * - Parity error (cleared by reading RPIR) | |
842 | * - Loss of BSY (cleared by reading RPIR) | |
843 | * Two conditions have flag bits that are not latched: | |
844 | * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) | |
845 | * - Bus reset (non-maskable) | |
846 | * The remaining condition has no flag bit at all: | |
847 | * - Selection/reselection | |
848 | * | |
849 | * Hence, establishing the cause(s) of any interrupt is partly guesswork. | |
850 | * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor | |
851 | * claimed that "the design of the [DP8490] interrupt logic ensures | |
852 | * interrupts will not be lost (they can be on the DP5380)." | |
853 | * The L5380/53C80 datasheet from LOGIC Devices has more details. | |
854 | * | |
855 | * Checking for bus reset by reading RST is futile because of interrupt | |
856 | * latency, but a bus reset will reset chip logic. Checking for parity error | |
857 | * is unnecessary because that interrupt is never enabled. A Loss of BSY | |
858 | * condition will clear DMA Mode. We can tell when this occurs because the | |
859 | * the Busy Monitor interrupt is enabled together with DMA Mode. | |
1da177e4 LT |
860 | */ |
861 | ||
a46865dc | 862 | static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) |
1da177e4 | 863 | { |
baa9aac6 | 864 | struct Scsi_Host *instance = dev_id; |
cd400825 FT |
865 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
866 | int handled = 0; | |
1da177e4 LT |
867 | unsigned char basr; |
868 | unsigned long flags; | |
869 | ||
11d2f63b | 870 | spin_lock_irqsave(&hostdata->lock, flags); |
cd400825 FT |
871 | |
872 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
873 | if (basr & BASR_IRQ) { | |
874 | unsigned char mr = NCR5380_read(MODE_REG); | |
875 | unsigned char sr = NCR5380_read(STATUS_REG); | |
876 | ||
b746545f FT |
877 | dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", |
878 | irq, basr, sr, mr); | |
1da177e4 | 879 | |
8053b0ee FT |
880 | if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { |
881 | /* Probably End of DMA, Phase Mismatch or Loss of BSY. | |
882 | * We ack IRQ after clearing Mode Register. Workarounds | |
883 | * for End of DMA errata need to happen in DMA Mode. | |
884 | */ | |
885 | ||
886 | dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); | |
887 | ||
888 | if (hostdata->connected) { | |
889 | NCR5380_dma_complete(instance); | |
890 | queue_work(hostdata->work_q, &hostdata->main_task); | |
891 | } else { | |
892 | NCR5380_write(MODE_REG, MR_BASE); | |
893 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
894 | } | |
895 | } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && | |
cd400825 FT |
896 | (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { |
897 | /* Probably reselected */ | |
898 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
899 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
900 | ||
b746545f | 901 | dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); |
cd400825 FT |
902 | |
903 | if (!hostdata->connected) { | |
904 | NCR5380_reselect(instance); | |
905 | queue_work(hostdata->work_q, &hostdata->main_task); | |
1da177e4 | 906 | } |
cd400825 FT |
907 | if (!hostdata->connected) |
908 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
909 | } else { | |
910 | /* Probably Bus Reset */ | |
911 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
912 | ||
6b0e87a6 FT |
913 | if (sr & SR_RST) { |
914 | /* Certainly Bus Reset */ | |
915 | shost_printk(KERN_WARNING, instance, | |
916 | "bus reset interrupt\n"); | |
917 | bus_reset_cleanup(instance); | |
918 | } else { | |
919 | dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); | |
920 | } | |
e9db3198 FT |
921 | #ifdef SUN3_SCSI_VME |
922 | dregs->csr |= CSR_DMA_ENABLE; | |
923 | #endif | |
cd400825 FT |
924 | } |
925 | handled = 1; | |
926 | } else { | |
9af9fecb | 927 | dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n"); |
e9db3198 FT |
928 | #ifdef SUN3_SCSI_VME |
929 | dregs->csr |= CSR_DMA_ENABLE; | |
930 | #endif | |
cd400825 FT |
931 | } |
932 | ||
11d2f63b | 933 | spin_unlock_irqrestore(&hostdata->lock, flags); |
cd400825 FT |
934 | |
935 | return IRQ_RETVAL(handled); | |
1da177e4 LT |
936 | } |
937 | ||
dad8261e FT |
938 | /** |
939 | * NCR5380_select - attempt arbitration and selection for a given command | |
940 | * @instance: the Scsi_Host instance | |
941 | * @cmd: the scsi_cmnd to execute | |
1da177e4 | 942 | * |
dad8261e FT |
943 | * This routine establishes an I_T_L nexus for a SCSI command. This involves |
944 | * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message. | |
aff0cf9a | 945 | * |
dad8261e FT |
946 | * Returns true if the operation should be retried. |
947 | * Returns false if it should not be retried. | |
1da177e4 | 948 | * |
aff0cf9a | 949 | * Side effects : |
594d4ba3 FT |
950 | * If bus busy, arbitration failed, etc, NCR5380_select() will exit |
951 | * with registers as they should have been on entry - ie | |
952 | * SELECT_ENABLE will be set appropriately, the NCR5380 | |
953 | * will cease to drive any SCSI bus signals. | |
1da177e4 | 954 | * |
dad8261e FT |
955 | * If successful : the I_T_L nexus will be established, and |
956 | * hostdata->connected will be set to cmd. | |
594d4ba3 | 957 | * SELECT interrupt will be disabled. |
1da177e4 | 958 | * |
594d4ba3 FT |
959 | * If failed (no target) : cmd->scsi_done() will be called, and the |
960 | * cmd->result host byte set to DID_BAD_TARGET. | |
1da177e4 | 961 | */ |
aff0cf9a | 962 | |
dad8261e | 963 | static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd) |
4ab2a787 | 964 | __releases(&hostdata->lock) __acquires(&hostdata->lock) |
1da177e4 | 965 | { |
e8a60144 | 966 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
967 | unsigned char tmp[3], phase; |
968 | unsigned char *data; | |
969 | int len; | |
1da177e4 | 970 | int err; |
dad8261e | 971 | bool ret = true; |
7c8ed783 | 972 | bool can_disconnect = instance->irq != NO_IRQ && |
0b7a2235 FT |
973 | cmd->cmnd[0] != REQUEST_SENSE && |
974 | (disconnect_mask & BIT(scmd_id(cmd))); | |
1da177e4 | 975 | |
1da177e4 | 976 | NCR5380_dprint(NDEBUG_ARBITRATION, instance); |
b746545f FT |
977 | dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", |
978 | instance->this_id); | |
1da177e4 | 979 | |
707d62b3 FT |
980 | /* |
981 | * Arbitration and selection phases are slow and involve dropping the | |
982 | * lock, so we have to watch out for EH. An exception handler may | |
dad8261e | 983 | * change 'selecting' to NULL. This function will then return false |
707d62b3 FT |
984 | * so that the caller will forget about 'cmd'. (During information |
985 | * transfer phases, EH may change 'connected' to NULL.) | |
986 | */ | |
987 | hostdata->selecting = cmd; | |
988 | ||
aff0cf9a FT |
989 | /* |
990 | * Set the phase bits to 0, otherwise the NCR5380 won't drive the | |
1da177e4 LT |
991 | * data bus during SELECTION. |
992 | */ | |
993 | ||
994 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
995 | ||
aff0cf9a | 996 | /* |
1da177e4 LT |
997 | * Start arbitration. |
998 | */ | |
999 | ||
1000 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
1001 | NCR5380_write(MODE_REG, MR_ARBITRATE); | |
1002 | ||
55500d9b FT |
1003 | /* The chip now waits for BUS FREE phase. Then after the 800 ns |
1004 | * Bus Free Delay, arbitration will begin. | |
1005 | */ | |
1da177e4 | 1006 | |
11d2f63b | 1007 | spin_unlock_irq(&hostdata->lock); |
d5d37a0a | 1008 | err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0, |
b32ade12 FT |
1009 | INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, |
1010 | ICR_ARBITRATION_PROGRESS, HZ); | |
11d2f63b | 1011 | spin_lock_irq(&hostdata->lock); |
b32ade12 FT |
1012 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { |
1013 | /* Reselection interrupt */ | |
707d62b3 | 1014 | goto out; |
b32ade12 | 1015 | } |
ccf6efd7 FT |
1016 | if (!hostdata->selecting) { |
1017 | /* Command was aborted */ | |
1018 | NCR5380_write(MODE_REG, MR_BASE); | |
dad8261e | 1019 | return false; |
ccf6efd7 | 1020 | } |
b32ade12 FT |
1021 | if (err < 0) { |
1022 | NCR5380_write(MODE_REG, MR_BASE); | |
1023 | shost_printk(KERN_ERR, instance, | |
1024 | "select: arbitration timeout\n"); | |
707d62b3 | 1025 | goto out; |
1da177e4 | 1026 | } |
11d2f63b | 1027 | spin_unlock_irq(&hostdata->lock); |
1da177e4 | 1028 | |
55500d9b | 1029 | /* The SCSI-2 arbitration delay is 2.4 us */ |
1da177e4 LT |
1030 | udelay(3); |
1031 | ||
1032 | /* Check for lost arbitration */ | |
0d2cf867 FT |
1033 | if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || |
1034 | (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || | |
1035 | (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { | |
1da177e4 | 1036 | NCR5380_write(MODE_REG, MR_BASE); |
b746545f | 1037 | dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); |
11d2f63b | 1038 | spin_lock_irq(&hostdata->lock); |
707d62b3 | 1039 | goto out; |
1da177e4 | 1040 | } |
cf13b083 FT |
1041 | |
1042 | /* After/during arbitration, BSY should be asserted. | |
1043 | * IBM DPES-31080 Version S31Q works now | |
1044 | * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) | |
1045 | */ | |
1046 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1047 | ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); | |
1da177e4 | 1048 | |
aff0cf9a FT |
1049 | /* |
1050 | * Again, bus clear + bus settle time is 1.2us, however, this is | |
1da177e4 LT |
1051 | * a minimum so we'll udelay ceil(1.2) |
1052 | */ | |
1053 | ||
9c3f0e2b FT |
1054 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) |
1055 | udelay(15); | |
1056 | else | |
1057 | udelay(2); | |
1da177e4 | 1058 | |
11d2f63b FT |
1059 | spin_lock_irq(&hostdata->lock); |
1060 | ||
72064a78 FT |
1061 | /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ |
1062 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) | |
707d62b3 FT |
1063 | goto out; |
1064 | ||
1065 | if (!hostdata->selecting) { | |
1066 | NCR5380_write(MODE_REG, MR_BASE); | |
1067 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
dad8261e | 1068 | return false; |
707d62b3 | 1069 | } |
72064a78 | 1070 | |
b746545f | 1071 | dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); |
1da177e4 | 1072 | |
aff0cf9a FT |
1073 | /* |
1074 | * Now that we have won arbitration, start Selection process, asserting | |
1da177e4 LT |
1075 | * the host and target ID's on the SCSI bus. |
1076 | */ | |
1077 | ||
3d07d22b | 1078 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); |
1da177e4 | 1079 | |
aff0cf9a | 1080 | /* |
1da177e4 LT |
1081 | * Raise ATN while SEL is true before BSY goes false from arbitration, |
1082 | * since this is the only way to guarantee that we'll get a MESSAGE OUT | |
1083 | * phase immediately after selection. | |
1084 | */ | |
1085 | ||
3d07d22b FT |
1086 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | |
1087 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 LT |
1088 | NCR5380_write(MODE_REG, MR_BASE); |
1089 | ||
aff0cf9a | 1090 | /* |
1da177e4 LT |
1091 | * Reselect interrupts must be turned off prior to the dropping of BSY, |
1092 | * otherwise we will trigger an interrupt. | |
1093 | */ | |
1094 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1095 | ||
11d2f63b FT |
1096 | spin_unlock_irq(&hostdata->lock); |
1097 | ||
1da177e4 | 1098 | /* |
aff0cf9a | 1099 | * The initiator shall then wait at least two deskew delays and release |
1da177e4 LT |
1100 | * the BSY signal. |
1101 | */ | |
0d2cf867 | 1102 | udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ |
1da177e4 LT |
1103 | |
1104 | /* Reset BSY */ | |
3d07d22b FT |
1105 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | |
1106 | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 | 1107 | |
aff0cf9a | 1108 | /* |
1da177e4 | 1109 | * Something weird happens when we cease to drive BSY - looks |
aff0cf9a | 1110 | * like the board/chip is letting us do another read before the |
1da177e4 LT |
1111 | * appropriate propagation delay has expired, and we're confusing |
1112 | * a BSY signal from ourselves as the target's response to SELECTION. | |
1113 | * | |
1114 | * A small delay (the 'C++' frontend breaks the pipeline with an | |
1115 | * unnecessary jump, making it work on my 386-33/Trantor T128, the | |
aff0cf9a FT |
1116 | * tighter 'C' code breaks and requires this) solves the problem - |
1117 | * the 1 us delay is arbitrary, and only used because this delay will | |
1118 | * be the same on other platforms and since it works here, it should | |
1da177e4 LT |
1119 | * work there. |
1120 | * | |
1121 | * wingel suggests that this could be due to failing to wait | |
1122 | * one deskew delay. | |
1123 | */ | |
1124 | ||
1125 | udelay(1); | |
1126 | ||
b746545f | 1127 | dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); |
1da177e4 | 1128 | |
aff0cf9a FT |
1129 | /* |
1130 | * The SCSI specification calls for a 250 ms timeout for the actual | |
1da177e4 LT |
1131 | * selection. |
1132 | */ | |
1133 | ||
d5d37a0a | 1134 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY, |
ae753a33 | 1135 | msecs_to_jiffies(250)); |
1da177e4 | 1136 | |
1da177e4 | 1137 | if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { |
11d2f63b | 1138 | spin_lock_irq(&hostdata->lock); |
1da177e4 LT |
1139 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
1140 | NCR5380_reselect(instance); | |
6a6ff4ac | 1141 | shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); |
707d62b3 | 1142 | goto out; |
1da177e4 | 1143 | } |
ae753a33 FT |
1144 | |
1145 | if (err < 0) { | |
11d2f63b | 1146 | spin_lock_irq(&hostdata->lock); |
ae753a33 | 1147 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
6a162836 | 1148 | |
707d62b3 | 1149 | /* Can't touch cmd if it has been reclaimed by the scsi ML */ |
6a162836 | 1150 | if (!hostdata->selecting) |
dad8261e | 1151 | return false; |
6a162836 FT |
1152 | |
1153 | cmd->result = DID_BAD_TARGET << 16; | |
1154 | complete_cmd(instance, cmd); | |
1155 | dsprintk(NDEBUG_SELECTION, instance, | |
1156 | "target did not respond within 250ms\n"); | |
dad8261e | 1157 | ret = false; |
707d62b3 | 1158 | goto out; |
ae753a33 FT |
1159 | } |
1160 | ||
aff0cf9a FT |
1161 | /* |
1162 | * No less than two deskew delays after the initiator detects the | |
1163 | * BSY signal is true, it shall release the SEL signal and may | |
1da177e4 LT |
1164 | * change the DATA BUS. -wingel |
1165 | */ | |
1166 | ||
1167 | udelay(1); | |
1168 | ||
1169 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1170 | ||
1da177e4 | 1171 | /* |
aff0cf9a | 1172 | * Since we followed the SCSI spec, and raised ATN while SEL |
1da177e4 LT |
1173 | * was true but before BSY was false during selection, the information |
1174 | * transfer phase should be a MESSAGE OUT phase so that we can send the | |
1175 | * IDENTIFY message. | |
1da177e4 LT |
1176 | */ |
1177 | ||
1178 | /* Wait for start of REQ/ACK handshake */ | |
1179 | ||
d5d37a0a | 1180 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 1181 | spin_lock_irq(&hostdata->lock); |
1cc160e1 | 1182 | if (err < 0) { |
55500d9b FT |
1183 | shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); |
1184 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
707d62b3 FT |
1185 | goto out; |
1186 | } | |
1187 | if (!hostdata->selecting) { | |
1188 | do_abort(instance); | |
dad8261e | 1189 | return false; |
1da177e4 LT |
1190 | } |
1191 | ||
b746545f FT |
1192 | dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", |
1193 | scmd_id(cmd)); | |
7c8ed783 | 1194 | tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun); |
1da177e4 LT |
1195 | |
1196 | len = 1; | |
1da177e4 LT |
1197 | data = tmp; |
1198 | phase = PHASE_MSGOUT; | |
1199 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b15e791d FT |
1200 | if (len) { |
1201 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1202 | cmd->result = DID_ERROR << 16; | |
1203 | complete_cmd(instance, cmd); | |
1204 | dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n"); | |
dad8261e | 1205 | ret = false; |
b15e791d FT |
1206 | goto out; |
1207 | } | |
1208 | ||
b746545f | 1209 | dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); |
11d2f63b | 1210 | |
1da177e4 | 1211 | hostdata->connected = cmd; |
3d07d22b | 1212 | hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; |
1da177e4 | 1213 | |
e9db3198 FT |
1214 | #ifdef SUN3_SCSI_VME |
1215 | dregs->csr |= CSR_INTR; | |
1216 | #endif | |
1217 | ||
28424d3a | 1218 | initialize_SCp(cmd); |
1da177e4 | 1219 | |
dad8261e | 1220 | ret = false; |
707d62b3 FT |
1221 | |
1222 | out: | |
1223 | if (!hostdata->selecting) | |
96edebd6 | 1224 | return false; |
707d62b3 | 1225 | hostdata->selecting = NULL; |
dad8261e | 1226 | return ret; |
1da177e4 LT |
1227 | } |
1228 | ||
aff0cf9a FT |
1229 | /* |
1230 | * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, | |
594d4ba3 | 1231 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1232 | * |
1233 | * Purpose : transfers data in given phase using polled I/O | |
1234 | * | |
aff0cf9a | 1235 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1236 | * what phase is expected, *count - pointer to number of |
1237 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1238 | * |
1da177e4 | 1239 | * Returns : -1 when different phase is entered without transferring |
0d2cf867 | 1240 | * maximum number of bytes, 0 if all bytes are transferred or exit |
594d4ba3 | 1241 | * is in same phase. |
1da177e4 | 1242 | * |
594d4ba3 | 1243 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1244 | * |
1245 | * XXX Note : handling for bus free may be useful. | |
1246 | */ | |
1247 | ||
1248 | /* | |
aff0cf9a | 1249 | * Note : this code is not as quick as it could be, however it |
1da177e4 LT |
1250 | * IS 100% reliable, and for the actual data transfer where speed |
1251 | * counts, we will always do a pseudo DMA or DMA transfer. | |
1252 | */ | |
1253 | ||
0d2cf867 FT |
1254 | static int NCR5380_transfer_pio(struct Scsi_Host *instance, |
1255 | unsigned char *phase, int *count, | |
1256 | unsigned char **data) | |
1257 | { | |
61e1ce58 | 1258 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1259 | unsigned char p = *phase, tmp; |
1260 | int c = *count; | |
1261 | unsigned char *d = *data; | |
1da177e4 | 1262 | |
aff0cf9a FT |
1263 | /* |
1264 | * The NCR5380 chip will only drive the SCSI bus when the | |
1da177e4 LT |
1265 | * phase specified in the appropriate bits of the TARGET COMMAND |
1266 | * REGISTER match the STATUS REGISTER | |
1267 | */ | |
1268 | ||
0d2cf867 | 1269 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1da177e4 | 1270 | |
1da177e4 | 1271 | do { |
aff0cf9a FT |
1272 | /* |
1273 | * Wait for assertion of REQ, after which the phase bits will be | |
1274 | * valid | |
1da177e4 LT |
1275 | */ |
1276 | ||
d5d37a0a | 1277 | if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) |
1da177e4 | 1278 | break; |
1da177e4 | 1279 | |
b746545f | 1280 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); |
1da177e4 LT |
1281 | |
1282 | /* Check for phase mismatch */ | |
686f3990 | 1283 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { |
b746545f FT |
1284 | dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); |
1285 | NCR5380_dprint_phase(NDEBUG_PIO, instance); | |
1da177e4 LT |
1286 | break; |
1287 | } | |
0d2cf867 | 1288 | |
1da177e4 LT |
1289 | /* Do actual transfer from SCSI bus to / from memory */ |
1290 | if (!(p & SR_IO)) | |
1291 | NCR5380_write(OUTPUT_DATA_REG, *d); | |
1292 | else | |
1293 | *d = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
1294 | ||
1295 | ++d; | |
1296 | ||
aff0cf9a | 1297 | /* |
1da177e4 LT |
1298 | * The SCSI standard suggests that in MSGOUT phase, the initiator |
1299 | * should drop ATN on the last byte of the message phase | |
1300 | * after REQ has been asserted for the handshake but before | |
1301 | * the initiator raises ACK. | |
1302 | */ | |
1303 | ||
1304 | if (!(p & SR_IO)) { | |
1305 | if (!((p & SR_MSG) && c > 1)) { | |
1306 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1307 | NCR5380_dprint(NDEBUG_PIO, instance); | |
3d07d22b FT |
1308 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1309 | ICR_ASSERT_DATA | ICR_ASSERT_ACK); | |
1da177e4 | 1310 | } else { |
3d07d22b FT |
1311 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1312 | ICR_ASSERT_DATA | ICR_ASSERT_ATN); | |
1da177e4 | 1313 | NCR5380_dprint(NDEBUG_PIO, instance); |
3d07d22b FT |
1314 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1315 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1da177e4 LT |
1316 | } |
1317 | } else { | |
1318 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1319 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
1320 | } | |
1321 | ||
d5d37a0a | 1322 | if (NCR5380_poll_politely(hostdata, |
a2edc4a6 FT |
1323 | STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) |
1324 | break; | |
1325 | ||
b746545f | 1326 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); |
1da177e4 LT |
1327 | |
1328 | /* | |
aff0cf9a FT |
1329 | * We have several special cases to consider during REQ/ACK handshaking : |
1330 | * 1. We were in MSGOUT phase, and we are on the last byte of the | |
594d4ba3 | 1331 | * message. ATN must be dropped as ACK is dropped. |
1da177e4 | 1332 | * |
aff0cf9a | 1333 | * 2. We are in a MSGIN phase, and we are on the last byte of the |
594d4ba3 FT |
1334 | * message. We must exit with ACK asserted, so that the calling |
1335 | * code may raise ATN before dropping ACK to reject the message. | |
1da177e4 LT |
1336 | * |
1337 | * 3. ACK and ATN are clear and the target may proceed as normal. | |
1338 | */ | |
1339 | if (!(p == PHASE_MSGIN && c == 1)) { | |
1340 | if (p == PHASE_MSGOUT && c > 1) | |
1341 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1342 | else | |
1343 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1344 | } | |
1345 | } while (--c); | |
1346 | ||
b746545f | 1347 | dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); |
1da177e4 LT |
1348 | |
1349 | *count = c; | |
1350 | *data = d; | |
1351 | tmp = NCR5380_read(STATUS_REG); | |
a2edc4a6 FT |
1352 | /* The phase read from the bus is valid if either REQ is (already) |
1353 | * asserted or if ACK hasn't been released yet. The latter applies if | |
1354 | * we're in MSG IN, DATA IN or STATUS and all bytes have been received. | |
1355 | */ | |
1356 | if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) | |
1da177e4 LT |
1357 | *phase = tmp & PHASE_MASK; |
1358 | else | |
1359 | *phase = PHASE_UNKNOWN; | |
1360 | ||
1361 | if (!c || (*phase == p)) | |
1362 | return 0; | |
1363 | else | |
1364 | return -1; | |
1365 | } | |
1366 | ||
1367 | /** | |
636b1ec8 FT |
1368 | * do_reset - issue a reset command |
1369 | * @instance: adapter to reset | |
1da177e4 | 1370 | * |
636b1ec8 FT |
1371 | * Issue a reset sequence to the NCR5380 and try and get the bus |
1372 | * back into sane shape. | |
1da177e4 | 1373 | * |
636b1ec8 FT |
1374 | * This clears the reset interrupt flag because there may be no handler for |
1375 | * it. When the driver is initialized, the NCR5380_intr() handler has not yet | |
1376 | * been installed. And when in EH we may have released the ST DMA interrupt. | |
1da177e4 | 1377 | */ |
aff0cf9a | 1378 | |
54d8fe44 FT |
1379 | static void do_reset(struct Scsi_Host *instance) |
1380 | { | |
61e1ce58 | 1381 | struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance); |
636b1ec8 FT |
1382 | unsigned long flags; |
1383 | ||
1384 | local_irq_save(flags); | |
1385 | NCR5380_write(TARGET_COMMAND_REG, | |
1386 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); | |
1da177e4 | 1387 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); |
636b1ec8 | 1388 | udelay(50); |
1da177e4 | 1389 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
636b1ec8 FT |
1390 | (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1391 | local_irq_restore(flags); | |
1da177e4 LT |
1392 | } |
1393 | ||
80d3eb6d FT |
1394 | /** |
1395 | * do_abort - abort the currently established nexus by going to | |
1396 | * MESSAGE OUT phase and sending an ABORT message. | |
1397 | * @instance: relevant scsi host instance | |
1da177e4 | 1398 | * |
d04fc41a | 1399 | * Returns 0 on success, negative error code on failure. |
1da177e4 LT |
1400 | */ |
1401 | ||
54d8fe44 FT |
1402 | static int do_abort(struct Scsi_Host *instance) |
1403 | { | |
61e1ce58 | 1404 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1405 | unsigned char *msgptr, phase, tmp; |
1406 | int len; | |
1407 | int rc; | |
1da177e4 LT |
1408 | |
1409 | /* Request message out phase */ | |
1410 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1411 | ||
aff0cf9a FT |
1412 | /* |
1413 | * Wait for the target to indicate a valid phase by asserting | |
1414 | * REQ. Once this happens, we'll have either a MSGOUT phase | |
1415 | * and can immediately send the ABORT message, or we'll have some | |
1da177e4 | 1416 | * other phase and will have to source/sink data. |
aff0cf9a | 1417 | * |
1da177e4 LT |
1418 | * We really don't care what value was on the bus or what value |
1419 | * the target sees, so we just handshake. | |
1420 | */ | |
1421 | ||
d5d37a0a | 1422 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); |
1cc160e1 | 1423 | if (rc < 0) |
d04fc41a | 1424 | goto out; |
1da177e4 | 1425 | |
f35d3474 | 1426 | tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; |
aff0cf9a | 1427 | |
1da177e4 LT |
1428 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); |
1429 | ||
f35d3474 | 1430 | if (tmp != PHASE_MSGOUT) { |
0d2cf867 FT |
1431 | NCR5380_write(INITIATOR_COMMAND_REG, |
1432 | ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
d5d37a0a | 1433 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ); |
1cc160e1 | 1434 | if (rc < 0) |
d04fc41a | 1435 | goto out; |
80d3eb6d | 1436 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); |
1da177e4 | 1437 | } |
0d2cf867 | 1438 | |
1da177e4 LT |
1439 | tmp = ABORT; |
1440 | msgptr = &tmp; | |
1441 | len = 1; | |
1442 | phase = PHASE_MSGOUT; | |
54d8fe44 | 1443 | NCR5380_transfer_pio(instance, &phase, &len, &msgptr); |
d04fc41a FT |
1444 | if (len) |
1445 | rc = -ENXIO; | |
1da177e4 LT |
1446 | |
1447 | /* | |
1448 | * If we got here, and the command completed successfully, | |
1449 | * we're about to go into bus free state. | |
1450 | */ | |
1451 | ||
d04fc41a | 1452 | out: |
80d3eb6d | 1453 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
d04fc41a | 1454 | return rc; |
1da177e4 LT |
1455 | } |
1456 | ||
aff0cf9a FT |
1457 | /* |
1458 | * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, | |
594d4ba3 | 1459 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1460 | * |
1461 | * Purpose : transfers data in given phase using either real | |
594d4ba3 | 1462 | * or pseudo DMA. |
1da177e4 | 1463 | * |
aff0cf9a | 1464 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1465 | * what phase is expected, *count - pointer to number of |
1466 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1467 | * |
1da177e4 | 1468 | * Returns : -1 when different phase is entered without transferring |
594d4ba3 FT |
1469 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1470 | * is in same phase. | |
1da177e4 | 1471 | * |
594d4ba3 | 1472 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1473 | */ |
1474 | ||
1475 | ||
0d2cf867 FT |
1476 | static int NCR5380_transfer_dma(struct Scsi_Host *instance, |
1477 | unsigned char *phase, int *count, | |
1478 | unsigned char **data) | |
1479 | { | |
1480 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
f0ea73a4 FT |
1481 | int c = *count; |
1482 | unsigned char p = *phase; | |
1483 | unsigned char *d = *data; | |
1da177e4 | 1484 | unsigned char tmp; |
8053b0ee | 1485 | int result = 0; |
1da177e4 | 1486 | |
1da177e4 LT |
1487 | if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { |
1488 | *phase = tmp; | |
1489 | return -1; | |
1490 | } | |
1da177e4 | 1491 | |
8053b0ee | 1492 | hostdata->connected->SCp.phase = p; |
1da177e4 | 1493 | |
8053b0ee FT |
1494 | if (p & SR_IO) { |
1495 | if (hostdata->read_overruns) | |
1496 | c -= hostdata->read_overruns; | |
1497 | else if (hostdata->flags & FLAG_DMA_FIXUP) | |
1498 | --c; | |
1499 | } | |
1da177e4 | 1500 | |
8053b0ee FT |
1501 | dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", |
1502 | (p & SR_IO) ? "receive" : "send", c, d); | |
1da177e4 | 1503 | |
e9db3198 FT |
1504 | #ifdef CONFIG_SUN3 |
1505 | /* send start chain */ | |
1506 | sun3scsi_dma_start(c, *data); | |
1507 | #endif | |
1508 | ||
8053b0ee FT |
1509 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1510 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | | |
1511 | MR_ENABLE_EOP_INTR); | |
1512 | ||
1513 | if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { | |
1514 | /* On the Medusa, it is a must to initialize the DMA before | |
1515 | * starting the NCR. This is also the cleaner way for the TT. | |
1516 | */ | |
1517 | if (p & SR_IO) | |
4a98f896 | 1518 | result = NCR5380_dma_recv_setup(hostdata, d, c); |
8053b0ee | 1519 | else |
4a98f896 | 1520 | result = NCR5380_dma_send_setup(hostdata, d, c); |
8053b0ee | 1521 | } |
1da177e4 | 1522 | |
aff0cf9a | 1523 | /* |
594d4ba3 FT |
1524 | * On the PAS16 at least I/O recovery delays are not needed here. |
1525 | * Everyone else seems to want them. | |
1da177e4 LT |
1526 | */ |
1527 | ||
1528 | if (p & SR_IO) { | |
e9db3198 | 1529 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
e5d55d1a | 1530 | NCR5380_io_delay(1); |
1da177e4 LT |
1531 | NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); |
1532 | } else { | |
e5d55d1a | 1533 | NCR5380_io_delay(1); |
1da177e4 | 1534 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); |
e5d55d1a | 1535 | NCR5380_io_delay(1); |
1da177e4 | 1536 | NCR5380_write(START_DMA_SEND_REG, 0); |
e5d55d1a | 1537 | NCR5380_io_delay(1); |
1da177e4 LT |
1538 | } |
1539 | ||
e9db3198 FT |
1540 | #ifdef CONFIG_SUN3 |
1541 | #ifdef SUN3_SCSI_VME | |
1542 | dregs->csr |= CSR_DMA_ENABLE; | |
1543 | #endif | |
1544 | sun3_dma_active = 1; | |
1545 | #endif | |
1546 | ||
8053b0ee FT |
1547 | if (hostdata->flags & FLAG_LATE_DMA_SETUP) { |
1548 | /* On the Falcon, the DMA setup must be done after the last | |
1549 | * NCR access, else the DMA setup gets trashed! | |
1550 | */ | |
1551 | if (p & SR_IO) | |
4a98f896 | 1552 | result = NCR5380_dma_recv_setup(hostdata, d, c); |
8053b0ee | 1553 | else |
4a98f896 | 1554 | result = NCR5380_dma_send_setup(hostdata, d, c); |
8053b0ee FT |
1555 | } |
1556 | ||
1557 | /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ | |
1558 | if (result < 0) | |
1559 | return result; | |
1560 | ||
1561 | /* For real DMA, result is the byte count. DMA interrupt is expected. */ | |
1562 | if (result > 0) { | |
1563 | hostdata->dma_len = result; | |
1564 | return 0; | |
1565 | } | |
1566 | ||
1567 | /* The result is zero iff pseudo DMA send/receive was completed. */ | |
1568 | hostdata->dma_len = c; | |
1569 | ||
1da177e4 | 1570 | /* |
e4dec680 | 1571 | * A note regarding the DMA errata workarounds for early NMOS silicon. |
c16df32e FT |
1572 | * |
1573 | * For DMA sends, we want to wait until the last byte has been | |
1574 | * transferred out over the bus before we turn off DMA mode. Alas, there | |
1575 | * seems to be no terribly good way of doing this on a 5380 under all | |
1576 | * conditions. For non-scatter-gather operations, we can wait until REQ | |
1577 | * and ACK both go false, or until a phase mismatch occurs. Gather-sends | |
1578 | * are nastier, since the device will be expecting more data than we | |
1579 | * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we | |
1580 | * could test Last Byte Sent to assure transfer (I imagine this is precisely | |
1581 | * why this signal was added to the newer chips) but on the older 538[01] | |
1582 | * this signal does not exist. The workaround for this lack is a watchdog; | |
1583 | * we bail out of the wait-loop after a modest amount of wait-time if | |
1584 | * the usual exit conditions are not met. Not a terribly clean or | |
1585 | * correct solution :-% | |
1586 | * | |
1587 | * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. | |
1588 | * If the chip is in DMA receive mode, it will respond to a target's | |
1589 | * REQ by latching the SCSI data into the INPUT DATA register and asserting | |
1590 | * ACK, even if it has _already_ been notified by the DMA controller that | |
1591 | * the current DMA transfer has completed! If the NCR5380 is then taken | |
1592 | * out of DMA mode, this already-acknowledged byte is lost. This is | |
1593 | * not a problem for "one DMA transfer per READ command", because | |
1594 | * the situation will never arise... either all of the data is DMA'ed | |
1595 | * properly, or the target switches to MESSAGE IN phase to signal a | |
1596 | * disconnection (either operation bringing the DMA to a clean halt). | |
1597 | * However, in order to handle scatter-receive, we must work around the | |
e4dec680 | 1598 | * problem. The chosen fix is to DMA fewer bytes, then check for the |
c16df32e FT |
1599 | * condition before taking the NCR5380 out of DMA mode. One or two extra |
1600 | * bytes are transferred via PIO as necessary to fill out the original | |
1601 | * request. | |
1da177e4 LT |
1602 | */ |
1603 | ||
8053b0ee FT |
1604 | if (hostdata->flags & FLAG_DMA_FIXUP) { |
1605 | if (p & SR_IO) { | |
1da177e4 | 1606 | /* |
e4dec680 | 1607 | * The workaround was to transfer fewer bytes than we |
aff0cf9a | 1608 | * intended to with the pseudo-DMA read function, wait for |
1da177e4 LT |
1609 | * the chip to latch the last byte, read it, and then disable |
1610 | * pseudo-DMA mode. | |
aff0cf9a | 1611 | * |
1da177e4 LT |
1612 | * After REQ is asserted, the NCR5380 asserts DRQ and ACK. |
1613 | * REQ is deasserted when ACK is asserted, and not reasserted | |
1614 | * until ACK goes false. Since the NCR5380 won't lower ACK | |
1615 | * until DACK is asserted, which won't happen unless we twiddle | |
aff0cf9a FT |
1616 | * the DMA port or we take the NCR5380 out of DMA mode, we |
1617 | * can guarantee that we won't handshake another extra | |
1da177e4 LT |
1618 | * byte. |
1619 | */ | |
1620 | ||
d5d37a0a | 1621 | if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, |
55181be8 | 1622 | BASR_DRQ, BASR_DRQ, HZ) < 0) { |
438af51c | 1623 | result = -1; |
55181be8 FT |
1624 | shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); |
1625 | } | |
d5d37a0a | 1626 | if (NCR5380_poll_politely(hostdata, STATUS_REG, |
55181be8 | 1627 | SR_REQ, 0, HZ) < 0) { |
438af51c | 1628 | result = -1; |
55181be8 | 1629 | shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); |
1da177e4 | 1630 | } |
8053b0ee FT |
1631 | d[*count - 1] = NCR5380_read(INPUT_DATA_REG); |
1632 | } else { | |
1da177e4 | 1633 | /* |
aff0cf9a FT |
1634 | * Wait for the last byte to be sent. If REQ is being asserted for |
1635 | * the byte we're interested, we'll ACK it and it will go false. | |
1da177e4 | 1636 | */ |
d5d37a0a | 1637 | if (NCR5380_poll_politely2(hostdata, |
55181be8 FT |
1638 | BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, |
1639 | BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { | |
438af51c | 1640 | result = -1; |
55181be8 | 1641 | shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); |
1da177e4 LT |
1642 | } |
1643 | } | |
1da177e4 | 1644 | } |
8053b0ee FT |
1645 | |
1646 | NCR5380_dma_complete(instance); | |
438af51c | 1647 | return result; |
1da177e4 | 1648 | } |
1da177e4 LT |
1649 | |
1650 | /* | |
1651 | * Function : NCR5380_information_transfer (struct Scsi_Host *instance) | |
1652 | * | |
aff0cf9a | 1653 | * Purpose : run through the various SCSI phases and do as the target |
594d4ba3 FT |
1654 | * directs us to. Operates on the currently connected command, |
1655 | * instance->connected. | |
1da177e4 LT |
1656 | * |
1657 | * Inputs : instance, instance for which we are doing commands | |
1658 | * | |
aff0cf9a | 1659 | * Side effects : SCSI things happen, the disconnected queue will be |
594d4ba3 FT |
1660 | * modified if a command disconnects, *instance->connected will |
1661 | * change. | |
1da177e4 | 1662 | * |
aff0cf9a | 1663 | * XXX Note : we need to watch for bus free or a reset condition here |
594d4ba3 | 1664 | * to recover from an unexpected bus free condition. |
1da177e4 LT |
1665 | */ |
1666 | ||
0d2cf867 | 1667 | static void NCR5380_information_transfer(struct Scsi_Host *instance) |
4ab2a787 | 1668 | __releases(&hostdata->lock) __acquires(&hostdata->lock) |
0d2cf867 | 1669 | { |
e8a60144 | 1670 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1671 | unsigned char msgout = NOP; |
1672 | int sink = 0; | |
1673 | int len; | |
1da177e4 | 1674 | int transfersize; |
1da177e4 LT |
1675 | unsigned char *data; |
1676 | unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; | |
11d2f63b | 1677 | struct scsi_cmnd *cmd; |
1da177e4 | 1678 | |
e9db3198 FT |
1679 | #ifdef SUN3_SCSI_VME |
1680 | dregs->csr |= CSR_INTR; | |
1681 | #endif | |
1682 | ||
11d2f63b | 1683 | while ((cmd = hostdata->connected)) { |
32b26a10 FT |
1684 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1685 | ||
1da177e4 LT |
1686 | tmp = NCR5380_read(STATUS_REG); |
1687 | /* We only have a valid SCSI phase when REQ is asserted */ | |
1688 | if (tmp & SR_REQ) { | |
1689 | phase = (tmp & PHASE_MASK); | |
1690 | if (phase != old_phase) { | |
1691 | old_phase = phase; | |
1692 | NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); | |
1693 | } | |
e9db3198 | 1694 | #ifdef CONFIG_SUN3 |
4a98f896 FT |
1695 | if (phase == PHASE_CMDOUT && |
1696 | sun3_dma_setup_done != cmd) { | |
1697 | int count; | |
e9db3198 | 1698 | |
0e9fdd2b | 1699 | advance_sg_buffer(cmd); |
e9db3198 | 1700 | |
4a98f896 FT |
1701 | count = sun3scsi_dma_xfer_len(hostdata, cmd); |
1702 | ||
1703 | if (count > 0) { | |
1704 | if (rq_data_dir(cmd->request)) | |
1705 | sun3scsi_dma_send_setup(hostdata, | |
1706 | cmd->SCp.ptr, count); | |
1707 | else | |
1708 | sun3scsi_dma_recv_setup(hostdata, | |
1709 | cmd->SCp.ptr, count); | |
e9db3198 FT |
1710 | sun3_dma_setup_done = cmd; |
1711 | } | |
1712 | #ifdef SUN3_SCSI_VME | |
1713 | dregs->csr |= CSR_INTR; | |
1714 | #endif | |
1715 | } | |
1716 | #endif /* CONFIG_SUN3 */ | |
1717 | ||
1da177e4 LT |
1718 | if (sink && (phase != PHASE_MSGOUT)) { |
1719 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1720 | ||
3d07d22b FT |
1721 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | |
1722 | ICR_ASSERT_ACK); | |
0d2cf867 FT |
1723 | while (NCR5380_read(STATUS_REG) & SR_REQ) |
1724 | ; | |
3d07d22b FT |
1725 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1726 | ICR_ASSERT_ATN); | |
1da177e4 LT |
1727 | sink = 0; |
1728 | continue; | |
1729 | } | |
0d2cf867 | 1730 | |
1da177e4 | 1731 | switch (phase) { |
1da177e4 LT |
1732 | case PHASE_DATAOUT: |
1733 | #if (NDEBUG & NDEBUG_NO_DATAOUT) | |
6a6ff4ac | 1734 | shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); |
1da177e4 LT |
1735 | sink = 1; |
1736 | do_abort(instance); | |
1737 | cmd->result = DID_ERROR << 16; | |
677e0194 | 1738 | complete_cmd(instance, cmd); |
dc183965 | 1739 | hostdata->connected = NULL; |
45ddc1b2 | 1740 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
1da177e4 LT |
1741 | return; |
1742 | #endif | |
bf1a0c6f | 1743 | case PHASE_DATAIN: |
aff0cf9a | 1744 | /* |
1da177e4 LT |
1745 | * If there is no room left in the current buffer in the |
1746 | * scatter-gather list, move onto the next one. | |
1747 | */ | |
1748 | ||
0e9fdd2b FT |
1749 | advance_sg_buffer(cmd); |
1750 | dsprintk(NDEBUG_INFORMATION, instance, | |
1751 | "this residual %d, sg ents %d\n", | |
1752 | cmd->SCp.this_residual, | |
1753 | sg_nents(cmd->SCp.buffer)); | |
0d2cf867 | 1754 | |
1da177e4 | 1755 | /* |
aff0cf9a | 1756 | * The preferred transfer method is going to be |
1da177e4 LT |
1757 | * PSEUDO-DMA for systems that are strictly PIO, |
1758 | * since we can let the hardware do the handshaking. | |
1759 | * | |
1760 | * For this to work, we need to know the transfersize | |
1761 | * ahead of time, since the pseudo-DMA code will sit | |
1762 | * in an unconditional loop. | |
1763 | */ | |
1764 | ||
ff3d4578 | 1765 | transfersize = 0; |
7e9ec8d9 | 1766 | if (!cmd->device->borken) |
4a98f896 | 1767 | transfersize = NCR5380_dma_xfer_len(hostdata, cmd); |
ff3d4578 | 1768 | |
438af51c | 1769 | if (transfersize > 0) { |
1da177e4 | 1770 | len = transfersize; |
0d2cf867 FT |
1771 | if (NCR5380_transfer_dma(instance, &phase, |
1772 | &len, (unsigned char **)&cmd->SCp.ptr)) { | |
1da177e4 | 1773 | /* |
0d2cf867 FT |
1774 | * If the watchdog timer fires, all future |
1775 | * accesses to this device will use the | |
1776 | * polled-IO. | |
1da177e4 | 1777 | */ |
017560fc | 1778 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 | 1779 | "switching to slow handshake\n"); |
1da177e4 | 1780 | cmd->device->borken = 1; |
f9dfed1c FT |
1781 | do_reset(instance); |
1782 | bus_reset_cleanup(instance); | |
8053b0ee | 1783 | } |
f825e40b | 1784 | } else { |
08348b1c FT |
1785 | /* Transfer a small chunk so that the |
1786 | * irq mode lock is not held too long. | |
1678847e | 1787 | */ |
08348b1c FT |
1788 | transfersize = min(cmd->SCp.this_residual, |
1789 | NCR5380_PIO_CHUNK_SIZE); | |
1678847e FT |
1790 | len = transfersize; |
1791 | NCR5380_transfer_pio(instance, &phase, &len, | |
3d07d22b | 1792 | (unsigned char **)&cmd->SCp.ptr); |
1678847e | 1793 | cmd->SCp.this_residual -= transfersize - len; |
11d2f63b | 1794 | } |
e9db3198 FT |
1795 | #ifdef CONFIG_SUN3 |
1796 | if (sun3_dma_setup_done == cmd) | |
1797 | sun3_dma_setup_done = NULL; | |
1798 | #endif | |
1678847e | 1799 | return; |
1da177e4 LT |
1800 | case PHASE_MSGIN: |
1801 | len = 1; | |
1802 | data = &tmp; | |
1803 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1804 | cmd->SCp.Message = tmp; | |
1805 | ||
1806 | switch (tmp) { | |
1da177e4 LT |
1807 | case ABORT: |
1808 | case COMMAND_COMPLETE: | |
1809 | /* Accept message by clearing ACK */ | |
1810 | sink = 1; | |
1811 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
0d3d9a42 FT |
1812 | dsprintk(NDEBUG_QUEUES, instance, |
1813 | "COMMAND COMPLETE %p target %d lun %llu\n", | |
1814 | cmd, scmd_id(cmd), cmd->device->lun); | |
1815 | ||
1da177e4 | 1816 | hostdata->connected = NULL; |
45ddc1b2 | 1817 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
1da177e4 | 1818 | |
f27db8eb FT |
1819 | cmd->result &= ~0xffff; |
1820 | cmd->result |= cmd->SCp.Status; | |
1821 | cmd->result |= cmd->SCp.Message << 8; | |
28424d3a | 1822 | |
350767f2 FT |
1823 | set_resid_from_SCp(cmd); |
1824 | ||
f27db8eb | 1825 | if (cmd->cmnd[0] == REQUEST_SENSE) |
677e0194 | 1826 | complete_cmd(instance, cmd); |
f27db8eb FT |
1827 | else { |
1828 | if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || | |
1829 | cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { | |
1830 | dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", | |
1831 | cmd); | |
1832 | list_add_tail(&ncmd->list, | |
1833 | &hostdata->autosense); | |
1834 | } else | |
1835 | complete_cmd(instance, cmd); | |
1da177e4 LT |
1836 | } |
1837 | ||
aff0cf9a FT |
1838 | /* |
1839 | * Restore phase bits to 0 so an interrupted selection, | |
1da177e4 LT |
1840 | * arbitration can resume. |
1841 | */ | |
1842 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
72064a78 | 1843 | |
52d3e561 | 1844 | maybe_release_dma_irq(instance); |
1da177e4 LT |
1845 | return; |
1846 | case MESSAGE_REJECT: | |
1847 | /* Accept message by clearing ACK */ | |
1848 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1849 | switch (hostdata->last_message) { | |
1850 | case HEAD_OF_QUEUE_TAG: | |
1851 | case ORDERED_QUEUE_TAG: | |
1852 | case SIMPLE_QUEUE_TAG: | |
1853 | cmd->device->simple_tags = 0; | |
9cb78c16 | 1854 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 LT |
1855 | break; |
1856 | default: | |
1857 | break; | |
1858 | } | |
340b9612 | 1859 | break; |
0d2cf867 FT |
1860 | case DISCONNECT: |
1861 | /* Accept message by clearing ACK */ | |
1862 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1863 | hostdata->connected = NULL; | |
1864 | list_add(&ncmd->list, &hostdata->disconnected); | |
1865 | dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, | |
1866 | instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", | |
1867 | cmd, scmd_id(cmd), cmd->device->lun); | |
0d3d9a42 | 1868 | |
0d2cf867 FT |
1869 | /* |
1870 | * Restore phase bits to 0 so an interrupted selection, | |
1871 | * arbitration can resume. | |
1872 | */ | |
1873 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1da177e4 | 1874 | |
e9db3198 FT |
1875 | #ifdef SUN3_SCSI_VME |
1876 | dregs->csr |= CSR_DMA_ENABLE; | |
1877 | #endif | |
0d2cf867 | 1878 | return; |
aff0cf9a | 1879 | /* |
1da177e4 | 1880 | * The SCSI data pointer is *IMPLICITLY* saved on a disconnect |
aff0cf9a | 1881 | * operation, in violation of the SCSI spec so we can safely |
1da177e4 LT |
1882 | * ignore SAVE/RESTORE pointers calls. |
1883 | * | |
aff0cf9a | 1884 | * Unfortunately, some disks violate the SCSI spec and |
1da177e4 | 1885 | * don't issue the required SAVE_POINTERS message before |
aff0cf9a | 1886 | * disconnecting, and we have to break spec to remain |
1da177e4 LT |
1887 | * compatible. |
1888 | */ | |
1889 | case SAVE_POINTERS: | |
1890 | case RESTORE_POINTERS: | |
1891 | /* Accept message by clearing ACK */ | |
1892 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1893 | break; | |
1894 | case EXTENDED_MESSAGE: | |
c16df32e FT |
1895 | /* |
1896 | * Start the message buffer with the EXTENDED_MESSAGE | |
1897 | * byte, since spi_print_msg() wants the whole thing. | |
1898 | */ | |
1da177e4 LT |
1899 | extended_msg[0] = EXTENDED_MESSAGE; |
1900 | /* Accept first byte by clearing ACK */ | |
1901 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
11d2f63b FT |
1902 | |
1903 | spin_unlock_irq(&hostdata->lock); | |
1904 | ||
b746545f | 1905 | dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); |
1da177e4 LT |
1906 | |
1907 | len = 2; | |
1908 | data = extended_msg + 1; | |
1909 | phase = PHASE_MSGIN; | |
1910 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
1911 | dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", |
1912 | (int)extended_msg[1], | |
1913 | (int)extended_msg[2]); | |
1da177e4 | 1914 | |
e0783ed3 FT |
1915 | if (!len && extended_msg[1] > 0 && |
1916 | extended_msg[1] <= sizeof(extended_msg) - 2) { | |
1da177e4 LT |
1917 | /* Accept third byte by clearing ACK */ |
1918 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1919 | len = extended_msg[1] - 1; | |
1920 | data = extended_msg + 3; | |
1921 | phase = PHASE_MSGIN; | |
1922 | ||
1923 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
1924 | dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", |
1925 | len); | |
1da177e4 LT |
1926 | |
1927 | switch (extended_msg[2]) { | |
1928 | case EXTENDED_SDTR: | |
1929 | case EXTENDED_WDTR: | |
1da177e4 LT |
1930 | tmp = 0; |
1931 | } | |
1932 | } else if (len) { | |
6a6ff4ac | 1933 | shost_printk(KERN_ERR, instance, "error receiving extended message\n"); |
1da177e4 LT |
1934 | tmp = 0; |
1935 | } else { | |
6a6ff4ac FT |
1936 | shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", |
1937 | extended_msg[2], extended_msg[1]); | |
1da177e4 LT |
1938 | tmp = 0; |
1939 | } | |
11d2f63b FT |
1940 | |
1941 | spin_lock_irq(&hostdata->lock); | |
1942 | if (!hostdata->connected) | |
1943 | return; | |
1944 | ||
df135e32 FT |
1945 | /* Reject message */ |
1946 | /* Fall through */ | |
1947 | default: | |
aff0cf9a FT |
1948 | /* |
1949 | * If we get something weird that we aren't expecting, | |
df135e32 | 1950 | * log it. |
1da177e4 | 1951 | */ |
39bef87c | 1952 | if (tmp == EXTENDED_MESSAGE) |
017560fc | 1953 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 | 1954 | "rejecting unknown extended message code %02x, length %d\n", |
39bef87c FT |
1955 | extended_msg[2], extended_msg[1]); |
1956 | else if (tmp) | |
1957 | scmd_printk(KERN_INFO, cmd, | |
1958 | "rejecting unknown message code %02x\n", | |
1959 | tmp); | |
1da177e4 LT |
1960 | |
1961 | msgout = MESSAGE_REJECT; | |
1962 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1963 | break; | |
0d2cf867 | 1964 | } /* switch (tmp) */ |
1da177e4 LT |
1965 | break; |
1966 | case PHASE_MSGOUT: | |
1967 | len = 1; | |
1968 | data = &msgout; | |
1969 | hostdata->last_message = msgout; | |
1970 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1971 | if (msgout == ABORT) { | |
1da177e4 | 1972 | hostdata->connected = NULL; |
45ddc1b2 | 1973 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
1da177e4 | 1974 | cmd->result = DID_ERROR << 16; |
677e0194 | 1975 | complete_cmd(instance, cmd); |
52d3e561 | 1976 | maybe_release_dma_irq(instance); |
1da177e4 LT |
1977 | return; |
1978 | } | |
1979 | msgout = NOP; | |
1980 | break; | |
1981 | case PHASE_CMDOUT: | |
1982 | len = cmd->cmd_len; | |
1983 | data = cmd->cmnd; | |
aff0cf9a FT |
1984 | /* |
1985 | * XXX for performance reasons, on machines with a | |
1986 | * PSEUDO-DMA architecture we should probably | |
1987 | * use the dma transfer function. | |
1da177e4 LT |
1988 | */ |
1989 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1da177e4 LT |
1990 | break; |
1991 | case PHASE_STATIN: | |
1992 | len = 1; | |
1993 | data = &tmp; | |
1994 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1995 | cmd->SCp.Status = tmp; | |
1996 | break; | |
1997 | default: | |
6a6ff4ac | 1998 | shost_printk(KERN_ERR, instance, "unknown phase\n"); |
4dde8f7d | 1999 | NCR5380_dprint(NDEBUG_ANY, instance); |
0d2cf867 | 2000 | } /* switch(phase) */ |
686f3990 | 2001 | } else { |
11d2f63b | 2002 | spin_unlock_irq(&hostdata->lock); |
d5d37a0a | 2003 | NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 2004 | spin_lock_irq(&hostdata->lock); |
1da177e4 | 2005 | } |
11d2f63b | 2006 | } |
1da177e4 LT |
2007 | } |
2008 | ||
2009 | /* | |
2010 | * Function : void NCR5380_reselect (struct Scsi_Host *instance) | |
2011 | * | |
aff0cf9a | 2012 | * Purpose : does reselection, initializing the instance->connected |
594d4ba3 FT |
2013 | * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q |
2014 | * nexus has been reestablished, | |
aff0cf9a | 2015 | * |
1da177e4 | 2016 | * Inputs : instance - this instance of the NCR5380. |
1da177e4 LT |
2017 | */ |
2018 | ||
0d2cf867 FT |
2019 | static void NCR5380_reselect(struct Scsi_Host *instance) |
2020 | { | |
e8a60144 | 2021 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 2022 | unsigned char target_mask; |
e9db3198 | 2023 | unsigned char lun; |
1da177e4 | 2024 | unsigned char msg[3]; |
32b26a10 FT |
2025 | struct NCR5380_cmd *ncmd; |
2026 | struct scsi_cmnd *tmp; | |
1da177e4 LT |
2027 | |
2028 | /* | |
2029 | * Disable arbitration, etc. since the host adapter obviously | |
2030 | * lost, and tell an interrupted NCR5380_select() to restart. | |
2031 | */ | |
2032 | ||
2033 | NCR5380_write(MODE_REG, MR_BASE); | |
1da177e4 LT |
2034 | |
2035 | target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); | |
7ef55f67 FT |
2036 | if (!target_mask || target_mask & (target_mask - 1)) { |
2037 | shost_printk(KERN_WARNING, instance, | |
2038 | "reselect: bad target_mask 0x%02x\n", target_mask); | |
2039 | return; | |
2040 | } | |
b746545f | 2041 | |
aff0cf9a | 2042 | /* |
1da177e4 LT |
2043 | * At this point, we have detected that our SCSI ID is on the bus, |
2044 | * SEL is true and BSY was false for at least one bus settle delay | |
2045 | * (400 ns). | |
2046 | * | |
2047 | * We must assert BSY ourselves, until the target drops the SEL | |
2048 | * signal. | |
2049 | */ | |
2050 | ||
2051 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); | |
d5d37a0a | 2052 | if (NCR5380_poll_politely(hostdata, |
72064a78 | 2053 | STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { |
08267216 | 2054 | shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n"); |
72064a78 FT |
2055 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2056 | return; | |
2057 | } | |
1da177e4 LT |
2058 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2059 | ||
2060 | /* | |
2061 | * Wait for target to go into MSGIN. | |
1da177e4 LT |
2062 | */ |
2063 | ||
d5d37a0a | 2064 | if (NCR5380_poll_politely(hostdata, |
72064a78 | 2065 | STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { |
ca694afa FT |
2066 | if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0) |
2067 | /* BUS FREE phase */ | |
2068 | return; | |
08267216 | 2069 | shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n"); |
72064a78 FT |
2070 | do_abort(instance); |
2071 | return; | |
2072 | } | |
1da177e4 | 2073 | |
e9db3198 FT |
2074 | #ifdef CONFIG_SUN3 |
2075 | /* acknowledge toggle to MSGIN */ | |
2076 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); | |
1da177e4 | 2077 | |
e9db3198 FT |
2078 | /* peek at the byte without really hitting the bus */ |
2079 | msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
2080 | #else | |
2081 | { | |
2082 | int len = 1; | |
2083 | unsigned char *data = msg; | |
2084 | unsigned char phase = PHASE_MSGIN; | |
2085 | ||
2086 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2087 | ||
2088 | if (len) { | |
2089 | do_abort(instance); | |
2090 | return; | |
2091 | } | |
72064a78 | 2092 | } |
e9db3198 | 2093 | #endif /* CONFIG_SUN3 */ |
72064a78 | 2094 | |
1da177e4 | 2095 | if (!(msg[0] & 0x80)) { |
72064a78 | 2096 | shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); |
1abfd370 | 2097 | spi_print_msg(msg); |
72064a78 FT |
2098 | printk("\n"); |
2099 | do_abort(instance); | |
2100 | return; | |
2101 | } | |
2102 | lun = msg[0] & 0x07; | |
1da177e4 | 2103 | |
72064a78 FT |
2104 | /* |
2105 | * We need to add code for SCSI-II to track which devices have | |
2106 | * I_T_L_Q nexuses established, and which have simple I_T_L | |
2107 | * nexuses so we can chose to do additional data transfer. | |
2108 | */ | |
1da177e4 | 2109 | |
72064a78 FT |
2110 | /* |
2111 | * Find the command corresponding to the I_T_L or I_T_L_Q nexus we | |
2112 | * just reestablished, and remove it from the disconnected queue. | |
2113 | */ | |
1da177e4 | 2114 | |
32b26a10 FT |
2115 | tmp = NULL; |
2116 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2117 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2118 | ||
2119 | if (target_mask == (1 << scmd_id(cmd)) && | |
2120 | lun == (u8)cmd->device->lun) { | |
2121 | list_del(&ncmd->list); | |
2122 | tmp = cmd; | |
72064a78 | 2123 | break; |
1da177e4 LT |
2124 | } |
2125 | } | |
0d3d9a42 FT |
2126 | |
2127 | if (tmp) { | |
2128 | dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, | |
2129 | "reselect: removed %p from disconnected queue\n", tmp); | |
2130 | } else { | |
45ddc1b2 FT |
2131 | int target = ffs(target_mask) - 1; |
2132 | ||
72064a78 FT |
2133 | shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", |
2134 | target_mask, lun); | |
2135 | /* | |
0d2cf867 FT |
2136 | * Since we have an established nexus that we can't do anything |
2137 | * with, we must abort it. | |
72064a78 | 2138 | */ |
45ddc1b2 FT |
2139 | if (do_abort(instance) == 0) |
2140 | hostdata->busy[target] &= ~(1 << lun); | |
72064a78 | 2141 | return; |
1da177e4 | 2142 | } |
72064a78 | 2143 | |
e9db3198 | 2144 | #ifdef CONFIG_SUN3 |
4a98f896 FT |
2145 | if (sun3_dma_setup_done != tmp) { |
2146 | int count; | |
e9db3198 | 2147 | |
0e9fdd2b | 2148 | advance_sg_buffer(tmp); |
e9db3198 | 2149 | |
4a98f896 FT |
2150 | count = sun3scsi_dma_xfer_len(hostdata, tmp); |
2151 | ||
2152 | if (count > 0) { | |
2153 | if (rq_data_dir(tmp->request)) | |
2154 | sun3scsi_dma_send_setup(hostdata, | |
2155 | tmp->SCp.ptr, count); | |
2156 | else | |
2157 | sun3scsi_dma_recv_setup(hostdata, | |
2158 | tmp->SCp.ptr, count); | |
e9db3198 FT |
2159 | sun3_dma_setup_done = tmp; |
2160 | } | |
2161 | } | |
2162 | ||
2163 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
2164 | #endif /* CONFIG_SUN3 */ | |
2165 | ||
72064a78 FT |
2166 | /* Accept message by clearing ACK */ |
2167 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2168 | ||
2169 | hostdata->connected = tmp; | |
c4ec6f92 FT |
2170 | dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", |
2171 | scmd_id(tmp), tmp->device->lun); | |
1da177e4 LT |
2172 | } |
2173 | ||
8b00c3d5 FT |
2174 | /** |
2175 | * list_find_cmd - test for presence of a command in a linked list | |
2176 | * @haystack: list of commands | |
2177 | * @needle: command to search for | |
2178 | */ | |
2179 | ||
2180 | static bool list_find_cmd(struct list_head *haystack, | |
2181 | struct scsi_cmnd *needle) | |
2182 | { | |
2183 | struct NCR5380_cmd *ncmd; | |
2184 | ||
2185 | list_for_each_entry(ncmd, haystack, list) | |
2186 | if (NCR5380_to_scmd(ncmd) == needle) | |
2187 | return true; | |
2188 | return false; | |
2189 | } | |
2190 | ||
2191 | /** | |
2192 | * list_remove_cmd - remove a command from linked list | |
2193 | * @haystack: list of commands | |
2194 | * @needle: command to remove | |
2195 | */ | |
2196 | ||
2197 | static bool list_del_cmd(struct list_head *haystack, | |
2198 | struct scsi_cmnd *needle) | |
2199 | { | |
2200 | if (list_find_cmd(haystack, needle)) { | |
2201 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); | |
2202 | ||
2203 | list_del(&ncmd->list); | |
2204 | return true; | |
2205 | } | |
2206 | return false; | |
2207 | } | |
2208 | ||
2209 | /** | |
2210 | * NCR5380_abort - scsi host eh_abort_handler() method | |
2211 | * @cmd: the command to be aborted | |
2212 | * | |
2213 | * Try to abort a given command by removing it from queues and/or sending | |
2214 | * the target an abort message. This may not succeed in causing a target | |
2215 | * to abort the command. Nonetheless, the low-level driver must forget about | |
2216 | * the command because the mid-layer reclaims it and it may be re-issued. | |
2217 | * | |
2218 | * The normal path taken by a command is as follows. For EH we trace this | |
2219 | * same path to locate and abort the command. | |
2220 | * | |
2221 | * unissued -> selecting -> [unissued -> selecting ->]... connected -> | |
2222 | * [disconnected -> connected ->]... | |
2223 | * [autosense -> connected ->] done | |
2224 | * | |
8b00c3d5 FT |
2225 | * If cmd was not found at all then presumably it has already been completed, |
2226 | * in which case return SUCCESS to try to avoid further EH measures. | |
dc183965 | 2227 | * |
8b00c3d5 | 2228 | * If the command has not completed yet, we must not fail to find it. |
dc183965 FT |
2229 | * We have no option but to forget the aborted command (even if it still |
2230 | * lacks sense data). The mid-layer may re-issue a command that is in error | |
2231 | * recovery (see scsi_send_eh_cmnd), but the logic and data structures in | |
2232 | * this driver are such that a command can appear on one queue only. | |
71a00593 FT |
2233 | * |
2234 | * The lock protects driver data structures, but EH handlers also use it | |
2235 | * to serialize their own execution and prevent their own re-entry. | |
1da177e4 LT |
2236 | */ |
2237 | ||
710ddd0d FT |
2238 | static int NCR5380_abort(struct scsi_cmnd *cmd) |
2239 | { | |
1da177e4 | 2240 | struct Scsi_Host *instance = cmd->device->host; |
e8a60144 | 2241 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
11d2f63b | 2242 | unsigned long flags; |
8b00c3d5 | 2243 | int result = SUCCESS; |
1fa6b5fb | 2244 | |
11d2f63b FT |
2245 | spin_lock_irqsave(&hostdata->lock, flags); |
2246 | ||
32b26a10 | 2247 | #if (NDEBUG & NDEBUG_ANY) |
8b00c3d5 | 2248 | scmd_printk(KERN_INFO, cmd, __func__); |
32b26a10 | 2249 | #endif |
e5c3fddf FT |
2250 | NCR5380_dprint(NDEBUG_ANY, instance); |
2251 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
1da177e4 | 2252 | |
8b00c3d5 FT |
2253 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2254 | dsprintk(NDEBUG_ABORT, instance, | |
2255 | "abort: removed %p from issue queue\n", cmd); | |
2256 | cmd->result = DID_ABORT << 16; | |
2257 | cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ | |
dc183965 | 2258 | goto out; |
8b00c3d5 FT |
2259 | } |
2260 | ||
707d62b3 FT |
2261 | if (hostdata->selecting == cmd) { |
2262 | dsprintk(NDEBUG_ABORT, instance, | |
2263 | "abort: cmd %p == selecting\n", cmd); | |
2264 | hostdata->selecting = NULL; | |
2265 | cmd->result = DID_ABORT << 16; | |
2266 | complete_cmd(instance, cmd); | |
2267 | goto out; | |
2268 | } | |
2269 | ||
8b00c3d5 FT |
2270 | if (list_del_cmd(&hostdata->disconnected, cmd)) { |
2271 | dsprintk(NDEBUG_ABORT, instance, | |
2272 | "abort: removed %p from disconnected list\n", cmd); | |
71a00593 FT |
2273 | /* Can't call NCR5380_select() and send ABORT because that |
2274 | * means releasing the lock. Need a bus reset. | |
2275 | */ | |
dc183965 FT |
2276 | set_host_byte(cmd, DID_ERROR); |
2277 | complete_cmd(instance, cmd); | |
71a00593 FT |
2278 | result = FAILED; |
2279 | goto out; | |
8b00c3d5 FT |
2280 | } |
2281 | ||
2282 | if (hostdata->connected == cmd) { | |
2283 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2284 | hostdata->connected = NULL; | |
8b00c3d5 | 2285 | hostdata->dma_len = 0; |
d04fc41a | 2286 | if (do_abort(instance) < 0) { |
8b00c3d5 FT |
2287 | set_host_byte(cmd, DID_ERROR); |
2288 | complete_cmd(instance, cmd); | |
2289 | result = FAILED; | |
2290 | goto out; | |
2291 | } | |
2292 | set_host_byte(cmd, DID_ABORT); | |
dc183965 FT |
2293 | complete_cmd(instance, cmd); |
2294 | goto out; | |
2295 | } | |
2296 | ||
2297 | if (list_del_cmd(&hostdata->autosense, cmd)) { | |
2298 | dsprintk(NDEBUG_ABORT, instance, | |
2299 | "abort: removed %p from sense queue\n", cmd); | |
8b00c3d5 FT |
2300 | complete_cmd(instance, cmd); |
2301 | } | |
2302 | ||
2303 | out: | |
2304 | if (result == FAILED) | |
2305 | dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); | |
45ddc1b2 FT |
2306 | else { |
2307 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); | |
8b00c3d5 | 2308 | dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); |
45ddc1b2 | 2309 | } |
8b00c3d5 FT |
2310 | |
2311 | queue_work(hostdata->work_q, &hostdata->main_task); | |
52d3e561 | 2312 | maybe_release_dma_irq(instance); |
11d2f63b | 2313 | spin_unlock_irqrestore(&hostdata->lock, flags); |
32b26a10 | 2314 | |
8b00c3d5 | 2315 | return result; |
1da177e4 LT |
2316 | } |
2317 | ||
2318 | ||
6b0e87a6 | 2319 | static void bus_reset_cleanup(struct Scsi_Host *instance) |
68b3aa7c | 2320 | { |
11d2f63b | 2321 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
62717f53 | 2322 | int i; |
62717f53 | 2323 | struct NCR5380_cmd *ncmd; |
68b3aa7c | 2324 | |
62717f53 FT |
2325 | /* reset NCR registers */ |
2326 | NCR5380_write(MODE_REG, MR_BASE); | |
2327 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
2328 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2329 | ||
2330 | /* After the reset, there are no more connected or disconnected commands | |
2331 | * and no busy units; so clear the low-level status here to avoid | |
2332 | * conflicts when the mid-level code tries to wake up the affected | |
2333 | * commands! | |
2334 | */ | |
2335 | ||
1884c283 FT |
2336 | if (hostdata->selecting) { |
2337 | hostdata->selecting->result = DID_RESET << 16; | |
2338 | complete_cmd(instance, hostdata->selecting); | |
2339 | hostdata->selecting = NULL; | |
2340 | } | |
62717f53 FT |
2341 | |
2342 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2343 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2344 | ||
2345 | set_host_byte(cmd, DID_RESET); | |
216fad91 | 2346 | complete_cmd(instance, cmd); |
62717f53 | 2347 | } |
1884c283 | 2348 | INIT_LIST_HEAD(&hostdata->disconnected); |
62717f53 FT |
2349 | |
2350 | list_for_each_entry(ncmd, &hostdata->autosense, list) { | |
2351 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2352 | ||
62717f53 FT |
2353 | cmd->scsi_done(cmd); |
2354 | } | |
1884c283 | 2355 | INIT_LIST_HEAD(&hostdata->autosense); |
62717f53 FT |
2356 | |
2357 | if (hostdata->connected) { | |
2358 | set_host_byte(hostdata->connected, DID_RESET); | |
2359 | complete_cmd(instance, hostdata->connected); | |
2360 | hostdata->connected = NULL; | |
2361 | } | |
2362 | ||
62717f53 FT |
2363 | for (i = 0; i < 8; ++i) |
2364 | hostdata->busy[i] = 0; | |
62717f53 | 2365 | hostdata->dma_len = 0; |
62717f53 FT |
2366 | |
2367 | queue_work(hostdata->work_q, &hostdata->main_task); | |
52d3e561 | 2368 | maybe_release_dma_irq(instance); |
6b0e87a6 FT |
2369 | } |
2370 | ||
2371 | /** | |
2372 | * NCR5380_host_reset - reset the SCSI host | |
2373 | * @cmd: SCSI command undergoing EH | |
2374 | * | |
2375 | * Returns SUCCESS | |
2376 | */ | |
2377 | ||
2378 | static int NCR5380_host_reset(struct scsi_cmnd *cmd) | |
2379 | { | |
2380 | struct Scsi_Host *instance = cmd->device->host; | |
2381 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
2382 | unsigned long flags; | |
2383 | struct NCR5380_cmd *ncmd; | |
2384 | ||
2385 | spin_lock_irqsave(&hostdata->lock, flags); | |
2386 | ||
2387 | #if (NDEBUG & NDEBUG_ANY) | |
2388 | shost_printk(KERN_INFO, instance, __func__); | |
2389 | #endif | |
2390 | NCR5380_dprint(NDEBUG_ANY, instance); | |
2391 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
2392 | ||
2393 | list_for_each_entry(ncmd, &hostdata->unissued, list) { | |
2394 | struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd); | |
2395 | ||
2396 | scmd->result = DID_RESET << 16; | |
2397 | scmd->scsi_done(scmd); | |
2398 | } | |
2399 | INIT_LIST_HEAD(&hostdata->unissued); | |
2400 | ||
2401 | do_reset(instance); | |
2402 | bus_reset_cleanup(instance); | |
2403 | ||
11d2f63b | 2404 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1da177e4 | 2405 | |
1da177e4 LT |
2406 | return SUCCESS; |
2407 | } |