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Commit | Line | Data |
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aff0cf9a | 1 | /* |
1da177e4 | 2 | * NCR 5380 generic driver routines. These should make it *trivial* |
594d4ba3 FT |
3 | * to implement 5380 SCSI drivers under Linux with a non-trantor |
4 | * architecture. | |
1da177e4 | 5 | * |
594d4ba3 | 6 | * Note that these routines also work with NR53c400 family chips. |
1da177e4 LT |
7 | * |
8 | * Copyright 1993, Drew Eckhardt | |
594d4ba3 FT |
9 | * Visionary Computing |
10 | * (Unix and Linux consulting and custom programming) | |
11 | * drew@colorado.edu | |
12 | * +1 (303) 666-5836 | |
1da177e4 | 13 | * |
aff0cf9a | 14 | * For more information, please consult |
1da177e4 LT |
15 | * |
16 | * NCR 5380 Family | |
17 | * SCSI Protocol Controller | |
18 | * Databook | |
19 | * | |
20 | * NCR Microelectronics | |
21 | * 1635 Aeroplaza Drive | |
22 | * Colorado Springs, CO 80916 | |
23 | * 1+ (719) 578-3400 | |
24 | * 1+ (800) 334-5454 | |
25 | */ | |
26 | ||
27 | /* | |
c16df32e FT |
28 | * With contributions from Ray Van Tassle, Ingmar Baumgart, |
29 | * Ronald van Cuijlenborg, Alan Cox and others. | |
1da177e4 LT |
30 | */ |
31 | ||
52d3e561 FT |
32 | /* Ported to Atari by Roman Hodek and others. */ |
33 | ||
e9db3198 FT |
34 | /* Adapted for the Sun 3 by Sam Creasey. */ |
35 | ||
1da177e4 LT |
36 | /* |
37 | * Design | |
38 | * | |
aff0cf9a | 39 | * This is a generic 5380 driver. To use it on a different platform, |
1da177e4 | 40 | * one simply writes appropriate system specific macros (ie, data |
aff0cf9a | 41 | * transfer - some PC's will use the I/O bus, 68K's must use |
1da177e4 LT |
42 | * memory mapped) and drops this file in their 'C' wrapper. |
43 | * | |
aff0cf9a | 44 | * As far as command queueing, two queues are maintained for |
1da177e4 | 45 | * each 5380 in the system - commands that haven't been issued yet, |
aff0cf9a FT |
46 | * and commands that are currently executing. This means that an |
47 | * unlimited number of commands may be queued, letting | |
48 | * more commands propagate from the higher driver levels giving higher | |
49 | * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, | |
50 | * allowing multiple commands to propagate all the way to a SCSI-II device | |
1da177e4 LT |
51 | * while a command is already executing. |
52 | * | |
53 | * | |
aff0cf9a | 54 | * Issues specific to the NCR5380 : |
1da177e4 | 55 | * |
aff0cf9a FT |
56 | * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead |
57 | * piece of hardware that requires you to sit in a loop polling for | |
58 | * the REQ signal as long as you are connected. Some devices are | |
59 | * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect | |
686f3990 | 60 | * while doing long seek operations. [...] These |
1da177e4 LT |
61 | * broken devices are the exception rather than the rule and I'd rather |
62 | * spend my time optimizing for the normal case. | |
63 | * | |
64 | * Architecture : | |
65 | * | |
66 | * At the heart of the design is a coroutine, NCR5380_main, | |
67 | * which is started from a workqueue for each NCR5380 host in the | |
68 | * system. It attempts to establish I_T_L or I_T_L_Q nexuses by | |
69 | * removing the commands from the issue queue and calling | |
aff0cf9a | 70 | * NCR5380_select() if a nexus is not established. |
1da177e4 LT |
71 | * |
72 | * Once a nexus is established, the NCR5380_information_transfer() | |
73 | * phase goes through the various phases as instructed by the target. | |
74 | * if the target goes into MSG IN and sends a DISCONNECT message, | |
75 | * the command structure is placed into the per instance disconnected | |
aff0cf9a | 76 | * queue, and NCR5380_main tries to find more work. If the target is |
1da177e4 LT |
77 | * idle for too long, the system will try to sleep. |
78 | * | |
79 | * If a command has disconnected, eventually an interrupt will trigger, | |
80 | * calling NCR5380_intr() which will in turn call NCR5380_reselect | |
81 | * to reestablish a nexus. This will run main if necessary. | |
82 | * | |
aff0cf9a | 83 | * On command termination, the done function will be called as |
1da177e4 LT |
84 | * appropriate. |
85 | * | |
aff0cf9a | 86 | * SCSI pointers are maintained in the SCp field of SCSI command |
1da177e4 LT |
87 | * structures, being initialized after the command is connected |
88 | * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. | |
89 | * Note that in violation of the standard, an implicit SAVE POINTERS operation | |
90 | * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. | |
91 | */ | |
92 | ||
93 | /* | |
94 | * Using this file : | |
95 | * This file a skeleton Linux SCSI driver for the NCR 5380 series | |
aff0cf9a | 96 | * of chips. To use it, you write an architecture specific functions |
1da177e4 LT |
97 | * and macros and include this file in your driver. |
98 | * | |
aff0cf9a FT |
99 | * These macros control options : |
100 | * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be | |
594d4ba3 | 101 | * defined. |
aff0cf9a | 102 | * |
1da177e4 | 103 | * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically |
594d4ba3 | 104 | * for commands that return with a CHECK CONDITION status. |
1da177e4 LT |
105 | * |
106 | * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential | |
594d4ba3 | 107 | * transceivers. |
1da177e4 LT |
108 | * |
109 | * DONT_USE_INTR - if defined, never use interrupts, even if we probe or | |
594d4ba3 | 110 | * override-configure an IRQ. |
1da177e4 | 111 | * |
1da177e4 LT |
112 | * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases. |
113 | * | |
8053b0ee FT |
114 | * REAL_DMA - if defined, REAL DMA is used during the data transfer phases. |
115 | * | |
1da177e4 | 116 | * These macros MUST be defined : |
aff0cf9a | 117 | * |
1da177e4 LT |
118 | * NCR5380_read(register) - read from the specified register |
119 | * | |
aff0cf9a | 120 | * NCR5380_write(register, value) - write to the specific register |
1da177e4 | 121 | * |
aff0cf9a | 122 | * NCR5380_implementation_fields - additional fields needed for this |
594d4ba3 | 123 | * specific implementation of the NCR5380 |
1da177e4 LT |
124 | * |
125 | * Either real DMA *or* pseudo DMA may be implemented | |
1da177e4 | 126 | * |
1da177e4 LT |
127 | * NCR5380_dma_write_setup(instance, src, count) - initialize |
128 | * NCR5380_dma_read_setup(instance, dst, count) - initialize | |
129 | * NCR5380_dma_residual(instance); - residual count | |
130 | * | |
1da177e4 | 131 | * The generic driver is initialized by calling NCR5380_init(instance), |
aff0cf9a | 132 | * after setting the appropriate host specific fields and ID. If the |
1da177e4 LT |
133 | * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance, |
134 | * possible) function may be used. | |
135 | */ | |
136 | ||
e5d55d1a FT |
137 | #ifndef NCR5380_io_delay |
138 | #define NCR5380_io_delay(x) | |
139 | #endif | |
140 | ||
52d3e561 FT |
141 | #ifndef NCR5380_acquire_dma_irq |
142 | #define NCR5380_acquire_dma_irq(x) (1) | |
143 | #endif | |
144 | ||
145 | #ifndef NCR5380_release_dma_irq | |
146 | #define NCR5380_release_dma_irq(x) | |
147 | #endif | |
148 | ||
54d8fe44 FT |
149 | static int do_abort(struct Scsi_Host *); |
150 | static void do_reset(struct Scsi_Host *); | |
1da177e4 | 151 | |
c16df32e | 152 | /** |
0d2cf867 | 153 | * initialize_SCp - init the scsi pointer field |
594d4ba3 | 154 | * @cmd: command block to set up |
1da177e4 | 155 | * |
594d4ba3 | 156 | * Set up the internal fields in the SCSI command. |
1da177e4 LT |
157 | */ |
158 | ||
710ddd0d | 159 | static inline void initialize_SCp(struct scsi_cmnd *cmd) |
1da177e4 | 160 | { |
aff0cf9a FT |
161 | /* |
162 | * Initialize the Scsi Pointer field so that all of the commands in the | |
1da177e4 LT |
163 | * various queues are valid. |
164 | */ | |
165 | ||
9e0fe44d BH |
166 | if (scsi_bufflen(cmd)) { |
167 | cmd->SCp.buffer = scsi_sglist(cmd); | |
168 | cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; | |
45711f1a | 169 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
1da177e4 LT |
170 | cmd->SCp.this_residual = cmd->SCp.buffer->length; |
171 | } else { | |
172 | cmd->SCp.buffer = NULL; | |
173 | cmd->SCp.buffers_residual = 0; | |
9e0fe44d BH |
174 | cmd->SCp.ptr = NULL; |
175 | cmd->SCp.this_residual = 0; | |
1da177e4 | 176 | } |
f27db8eb FT |
177 | |
178 | cmd->SCp.Status = 0; | |
179 | cmd->SCp.Message = 0; | |
1da177e4 LT |
180 | } |
181 | ||
182 | /** | |
b32ade12 | 183 | * NCR5380_poll_politely2 - wait for two chip register values |
2f854b82 | 184 | * @instance: controller to poll |
b32ade12 FT |
185 | * @reg1: 5380 register to poll |
186 | * @bit1: Bitmask to check | |
187 | * @val1: Expected value | |
188 | * @reg2: Second 5380 register to poll | |
189 | * @bit2: Second bitmask to check | |
190 | * @val2: Second expected value | |
2f854b82 FT |
191 | * @wait: Time-out in jiffies |
192 | * | |
193 | * Polls the chip in a reasonably efficient manner waiting for an | |
194 | * event to occur. After a short quick poll we begin to yield the CPU | |
195 | * (if possible). In irq contexts the time-out is arbitrarily limited. | |
196 | * Callers may hold locks as long as they are held in irq mode. | |
197 | * | |
b32ade12 | 198 | * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. |
1da177e4 | 199 | */ |
2f854b82 | 200 | |
b32ade12 FT |
201 | static int NCR5380_poll_politely2(struct Scsi_Host *instance, |
202 | int reg1, int bit1, int val1, | |
203 | int reg2, int bit2, int val2, int wait) | |
1da177e4 | 204 | { |
2f854b82 FT |
205 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
206 | unsigned long deadline = jiffies + wait; | |
207 | unsigned long n; | |
208 | ||
209 | /* Busy-wait for up to 10 ms */ | |
210 | n = min(10000U, jiffies_to_usecs(wait)); | |
211 | n *= hostdata->accesses_per_ms; | |
b32ade12 | 212 | n /= 2000; |
2f854b82 | 213 | do { |
b32ade12 FT |
214 | if ((NCR5380_read(reg1) & bit1) == val1) |
215 | return 0; | |
216 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 LT |
217 | return 0; |
218 | cpu_relax(); | |
2f854b82 FT |
219 | } while (n--); |
220 | ||
221 | if (irqs_disabled() || in_interrupt()) | |
222 | return -ETIMEDOUT; | |
223 | ||
224 | /* Repeatedly sleep for 1 ms until deadline */ | |
225 | while (time_is_after_jiffies(deadline)) { | |
226 | schedule_timeout_uninterruptible(1); | |
b32ade12 FT |
227 | if ((NCR5380_read(reg1) & bit1) == val1) |
228 | return 0; | |
229 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 | 230 | return 0; |
1da177e4 | 231 | } |
2f854b82 | 232 | |
1da177e4 LT |
233 | return -ETIMEDOUT; |
234 | } | |
235 | ||
b32ade12 FT |
236 | static inline int NCR5380_poll_politely(struct Scsi_Host *instance, |
237 | int reg, int bit, int val, int wait) | |
238 | { | |
239 | return NCR5380_poll_politely2(instance, reg, bit, val, | |
240 | reg, bit, val, wait); | |
241 | } | |
242 | ||
185a7a1c | 243 | #if NDEBUG |
1da177e4 LT |
244 | static struct { |
245 | unsigned char mask; | |
246 | const char *name; | |
aff0cf9a FT |
247 | } signals[] = { |
248 | {SR_DBP, "PARITY"}, | |
249 | {SR_RST, "RST"}, | |
250 | {SR_BSY, "BSY"}, | |
251 | {SR_REQ, "REQ"}, | |
252 | {SR_MSG, "MSG"}, | |
253 | {SR_CD, "CD"}, | |
254 | {SR_IO, "IO"}, | |
255 | {SR_SEL, "SEL"}, | |
1da177e4 | 256 | {0, NULL} |
aff0cf9a | 257 | }, |
1da177e4 | 258 | basrs[] = { |
12866b99 FT |
259 | {BASR_END_DMA_TRANSFER, "END OF DMA"}, |
260 | {BASR_DRQ, "DRQ"}, | |
261 | {BASR_PARITY_ERROR, "PARITY ERROR"}, | |
262 | {BASR_IRQ, "IRQ"}, | |
263 | {BASR_PHASE_MATCH, "PHASE MATCH"}, | |
264 | {BASR_BUSY_ERROR, "BUSY ERROR"}, | |
aff0cf9a FT |
265 | {BASR_ATN, "ATN"}, |
266 | {BASR_ACK, "ACK"}, | |
1da177e4 | 267 | {0, NULL} |
aff0cf9a FT |
268 | }, |
269 | icrs[] = { | |
270 | {ICR_ASSERT_RST, "ASSERT RST"}, | |
12866b99 FT |
271 | {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, |
272 | {ICR_ARBITRATION_LOST, "LOST ARB."}, | |
aff0cf9a FT |
273 | {ICR_ASSERT_ACK, "ASSERT ACK"}, |
274 | {ICR_ASSERT_BSY, "ASSERT BSY"}, | |
275 | {ICR_ASSERT_SEL, "ASSERT SEL"}, | |
276 | {ICR_ASSERT_ATN, "ASSERT ATN"}, | |
277 | {ICR_ASSERT_DATA, "ASSERT DATA"}, | |
1da177e4 | 278 | {0, NULL} |
aff0cf9a FT |
279 | }, |
280 | mrs[] = { | |
12866b99 FT |
281 | {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, |
282 | {MR_TARGET, "TARGET"}, | |
283 | {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, | |
284 | {MR_ENABLE_PAR_INTR, "PARITY INTR"}, | |
285 | {MR_ENABLE_EOP_INTR, "EOP INTR"}, | |
286 | {MR_MONITOR_BSY, "MONITOR BSY"}, | |
287 | {MR_DMA_MODE, "DMA MODE"}, | |
288 | {MR_ARBITRATE, "ARBITRATE"}, | |
1da177e4 LT |
289 | {0, NULL} |
290 | }; | |
291 | ||
292 | /** | |
0d2cf867 FT |
293 | * NCR5380_print - print scsi bus signals |
294 | * @instance: adapter state to dump | |
1da177e4 | 295 | * |
594d4ba3 | 296 | * Print the SCSI bus signals for debugging purposes |
1da177e4 LT |
297 | */ |
298 | ||
299 | static void NCR5380_print(struct Scsi_Host *instance) | |
300 | { | |
1da177e4 | 301 | unsigned char status, data, basr, mr, icr, i; |
1da177e4 LT |
302 | |
303 | data = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
304 | status = NCR5380_read(STATUS_REG); | |
305 | mr = NCR5380_read(MODE_REG); | |
306 | icr = NCR5380_read(INITIATOR_COMMAND_REG); | |
307 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
308 | ||
12866b99 | 309 | printk(KERN_DEBUG "SR = 0x%02x : ", status); |
1da177e4 LT |
310 | for (i = 0; signals[i].mask; ++i) |
311 | if (status & signals[i].mask) | |
12866b99 FT |
312 | printk(KERN_CONT "%s, ", signals[i].name); |
313 | printk(KERN_CONT "\nBASR = 0x%02x : ", basr); | |
1da177e4 LT |
314 | for (i = 0; basrs[i].mask; ++i) |
315 | if (basr & basrs[i].mask) | |
12866b99 FT |
316 | printk(KERN_CONT "%s, ", basrs[i].name); |
317 | printk(KERN_CONT "\nICR = 0x%02x : ", icr); | |
1da177e4 LT |
318 | for (i = 0; icrs[i].mask; ++i) |
319 | if (icr & icrs[i].mask) | |
12866b99 FT |
320 | printk(KERN_CONT "%s, ", icrs[i].name); |
321 | printk(KERN_CONT "\nMR = 0x%02x : ", mr); | |
1da177e4 LT |
322 | for (i = 0; mrs[i].mask; ++i) |
323 | if (mr & mrs[i].mask) | |
12866b99 FT |
324 | printk(KERN_CONT "%s, ", mrs[i].name); |
325 | printk(KERN_CONT "\n"); | |
1da177e4 LT |
326 | } |
327 | ||
0d2cf867 FT |
328 | static struct { |
329 | unsigned char value; | |
330 | const char *name; | |
331 | } phases[] = { | |
332 | {PHASE_DATAOUT, "DATAOUT"}, | |
333 | {PHASE_DATAIN, "DATAIN"}, | |
334 | {PHASE_CMDOUT, "CMDOUT"}, | |
335 | {PHASE_STATIN, "STATIN"}, | |
336 | {PHASE_MSGOUT, "MSGOUT"}, | |
337 | {PHASE_MSGIN, "MSGIN"}, | |
338 | {PHASE_UNKNOWN, "UNKNOWN"} | |
339 | }; | |
1da177e4 | 340 | |
c16df32e | 341 | /** |
0d2cf867 | 342 | * NCR5380_print_phase - show SCSI phase |
594d4ba3 | 343 | * @instance: adapter to dump |
1da177e4 | 344 | * |
594d4ba3 | 345 | * Print the current SCSI phase for debugging purposes |
1da177e4 LT |
346 | */ |
347 | ||
348 | static void NCR5380_print_phase(struct Scsi_Host *instance) | |
349 | { | |
1da177e4 LT |
350 | unsigned char status; |
351 | int i; | |
1da177e4 LT |
352 | |
353 | status = NCR5380_read(STATUS_REG); | |
354 | if (!(status & SR_REQ)) | |
6a6ff4ac | 355 | shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); |
1da177e4 | 356 | else { |
0d2cf867 FT |
357 | for (i = 0; (phases[i].value != PHASE_UNKNOWN) && |
358 | (phases[i].value != (status & PHASE_MASK)); ++i) | |
359 | ; | |
6a6ff4ac | 360 | shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); |
1da177e4 LT |
361 | } |
362 | } | |
363 | #endif | |
364 | ||
1da177e4 | 365 | |
d5f7e65d | 366 | static int probe_irq __initdata; |
1da177e4 LT |
367 | |
368 | /** | |
594d4ba3 FT |
369 | * probe_intr - helper for IRQ autoprobe |
370 | * @irq: interrupt number | |
371 | * @dev_id: unused | |
372 | * @regs: unused | |
1da177e4 | 373 | * |
594d4ba3 FT |
374 | * Set a flag to indicate the IRQ in question was received. This is |
375 | * used by the IRQ probe code. | |
1da177e4 | 376 | */ |
aff0cf9a | 377 | |
7d12e780 | 378 | static irqreturn_t __init probe_intr(int irq, void *dev_id) |
1da177e4 LT |
379 | { |
380 | probe_irq = irq; | |
381 | return IRQ_HANDLED; | |
382 | } | |
383 | ||
384 | /** | |
594d4ba3 FT |
385 | * NCR5380_probe_irq - find the IRQ of an NCR5380 |
386 | * @instance: NCR5380 controller | |
387 | * @possible: bitmask of ISA IRQ lines | |
1da177e4 | 388 | * |
594d4ba3 FT |
389 | * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ |
390 | * and then looking to see what interrupt actually turned up. | |
1da177e4 LT |
391 | */ |
392 | ||
702809ce AM |
393 | static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance, |
394 | int possible) | |
1da177e4 | 395 | { |
e8a60144 | 396 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
397 | unsigned long timeout; |
398 | int trying_irqs, i, mask; | |
1da177e4 | 399 | |
22f5f10d | 400 | for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
4909cc2b | 401 | if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0)) |
1da177e4 LT |
402 | trying_irqs |= mask; |
403 | ||
4e5a800c | 404 | timeout = jiffies + msecs_to_jiffies(250); |
22f5f10d | 405 | probe_irq = NO_IRQ; |
1da177e4 LT |
406 | |
407 | /* | |
408 | * A interrupt is triggered whenever BSY = false, SEL = true | |
aff0cf9a | 409 | * and a bit set in the SELECT_ENABLE_REG is asserted on the |
1da177e4 LT |
410 | * SCSI bus. |
411 | * | |
412 | * Note that the bus is only driven when the phase control signals | |
413 | * (I/O, C/D, and MSG) match those in the TCR, so we must reset that | |
414 | * to zero. | |
415 | */ | |
416 | ||
417 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
418 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
419 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
420 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL); | |
421 | ||
22f5f10d | 422 | while (probe_irq == NO_IRQ && time_before(jiffies, timeout)) |
a9a3047d | 423 | schedule_timeout_uninterruptible(1); |
aff0cf9a | 424 | |
1da177e4 LT |
425 | NCR5380_write(SELECT_ENABLE_REG, 0); |
426 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
427 | ||
22f5f10d | 428 | for (i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
1da177e4 LT |
429 | if (trying_irqs & mask) |
430 | free_irq(i, NULL); | |
431 | ||
432 | return probe_irq; | |
433 | } | |
434 | ||
435 | /** | |
594d4ba3 FT |
436 | * NCR58380_info - report driver and host information |
437 | * @instance: relevant scsi host instance | |
1da177e4 | 438 | * |
594d4ba3 | 439 | * For use as the host template info() handler. |
1da177e4 LT |
440 | */ |
441 | ||
8c32513b | 442 | static const char *NCR5380_info(struct Scsi_Host *instance) |
1da177e4 | 443 | { |
8c32513b FT |
444 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
445 | ||
446 | return hostdata->info; | |
447 | } | |
448 | ||
449 | static void prepare_info(struct Scsi_Host *instance) | |
450 | { | |
451 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
452 | ||
453 | snprintf(hostdata->info, sizeof(hostdata->info), | |
454 | "%s, io_port 0x%lx, n_io_port %d, " | |
455 | "base 0x%lx, irq %d, " | |
456 | "can_queue %d, cmd_per_lun %d, " | |
457 | "sg_tablesize %d, this_id %d, " | |
be3f4121 | 458 | "flags { %s%s%s}, " |
8c32513b FT |
459 | "options { %s} ", |
460 | instance->hostt->name, instance->io_port, instance->n_io_port, | |
461 | instance->base, instance->irq, | |
462 | instance->can_queue, instance->cmd_per_lun, | |
463 | instance->sg_tablesize, instance->this_id, | |
1bb46002 | 464 | hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", |
8c32513b | 465 | hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", |
9c3f0e2b | 466 | hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "", |
1da177e4 | 467 | #ifdef AUTOPROBE_IRQ |
8c32513b | 468 | "AUTOPROBE_IRQ " |
1da177e4 | 469 | #endif |
1da177e4 | 470 | #ifdef DIFFERENTIAL |
8c32513b | 471 | "DIFFERENTIAL " |
1da177e4 | 472 | #endif |
1da177e4 | 473 | #ifdef PARITY |
8c32513b | 474 | "PARITY " |
8c32513b FT |
475 | #endif |
476 | ""); | |
1da177e4 LT |
477 | } |
478 | ||
1da177e4 | 479 | /** |
0d2cf867 | 480 | * NCR5380_init - initialise an NCR5380 |
594d4ba3 FT |
481 | * @instance: adapter to configure |
482 | * @flags: control flags | |
1da177e4 | 483 | * |
594d4ba3 FT |
484 | * Initializes *instance and corresponding 5380 chip, |
485 | * with flags OR'd into the initial flags value. | |
1da177e4 | 486 | * |
594d4ba3 | 487 | * Notes : I assume that the host, hostno, and id bits have been |
0d2cf867 | 488 | * set correctly. I don't care about the irq and other fields. |
1da177e4 | 489 | * |
594d4ba3 | 490 | * Returns 0 for success |
1da177e4 LT |
491 | */ |
492 | ||
6f039790 | 493 | static int NCR5380_init(struct Scsi_Host *instance, int flags) |
1da177e4 | 494 | { |
e8a60144 | 495 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 496 | int i; |
2f854b82 | 497 | unsigned long deadline; |
1da177e4 | 498 | |
ae5e33af FT |
499 | instance->max_lun = 7; |
500 | ||
0d2cf867 | 501 | hostdata->host = instance; |
1da177e4 | 502 | hostdata->id_mask = 1 << instance->this_id; |
0d2cf867 | 503 | hostdata->id_higher_mask = 0; |
1da177e4 LT |
504 | for (i = hostdata->id_mask; i <= 0x80; i <<= 1) |
505 | if (i > hostdata->id_mask) | |
506 | hostdata->id_higher_mask |= i; | |
507 | for (i = 0; i < 8; ++i) | |
508 | hostdata->busy[i] = 0; | |
e4dec680 FT |
509 | hostdata->dma_len = 0; |
510 | ||
11d2f63b | 511 | spin_lock_init(&hostdata->lock); |
1da177e4 | 512 | hostdata->connected = NULL; |
f27db8eb FT |
513 | hostdata->sensing = NULL; |
514 | INIT_LIST_HEAD(&hostdata->autosense); | |
32b26a10 FT |
515 | INIT_LIST_HEAD(&hostdata->unissued); |
516 | INIT_LIST_HEAD(&hostdata->disconnected); | |
517 | ||
55181be8 | 518 | hostdata->flags = flags; |
aff0cf9a | 519 | |
8d8601a7 | 520 | INIT_WORK(&hostdata->main_task, NCR5380_main); |
0ad0eff9 FT |
521 | hostdata->work_q = alloc_workqueue("ncr5380_%d", |
522 | WQ_UNBOUND | WQ_MEM_RECLAIM, | |
523 | 1, instance->host_no); | |
524 | if (!hostdata->work_q) | |
525 | return -ENOMEM; | |
526 | ||
8c32513b FT |
527 | prepare_info(instance); |
528 | ||
1da177e4 LT |
529 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
530 | NCR5380_write(MODE_REG, MR_BASE); | |
531 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
532 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2f854b82 FT |
533 | |
534 | /* Calibrate register polling loop */ | |
535 | i = 0; | |
536 | deadline = jiffies + 1; | |
537 | do { | |
538 | cpu_relax(); | |
539 | } while (time_is_after_jiffies(deadline)); | |
540 | deadline += msecs_to_jiffies(256); | |
541 | do { | |
542 | NCR5380_read(STATUS_REG); | |
543 | ++i; | |
544 | cpu_relax(); | |
545 | } while (time_is_after_jiffies(deadline)); | |
546 | hostdata->accesses_per_ms = i / 256; | |
547 | ||
b6488f97 FT |
548 | return 0; |
549 | } | |
1da177e4 | 550 | |
b6488f97 FT |
551 | /** |
552 | * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. | |
553 | * @instance: adapter to check | |
554 | * | |
555 | * If the system crashed, it may have crashed with a connected target and | |
556 | * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the | |
557 | * currently established nexus, which we know nothing about. Failing that | |
558 | * do a bus reset. | |
559 | * | |
560 | * Note that a bus reset will cause the chip to assert IRQ. | |
561 | * | |
562 | * Returns 0 if successful, otherwise -ENXIO. | |
563 | */ | |
564 | ||
565 | static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) | |
566 | { | |
9c3f0e2b | 567 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 568 | int pass; |
1da177e4 LT |
569 | |
570 | for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { | |
571 | switch (pass) { | |
572 | case 1: | |
573 | case 3: | |
574 | case 5: | |
636b1ec8 FT |
575 | shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); |
576 | NCR5380_poll_politely(instance, | |
577 | STATUS_REG, SR_BSY, 0, 5 * HZ); | |
1da177e4 LT |
578 | break; |
579 | case 2: | |
636b1ec8 | 580 | shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); |
1da177e4 LT |
581 | do_abort(instance); |
582 | break; | |
583 | case 4: | |
636b1ec8 | 584 | shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); |
1da177e4 | 585 | do_reset(instance); |
9c3f0e2b FT |
586 | /* Wait after a reset; the SCSI standard calls for |
587 | * 250ms, we wait 500ms to be on the safe side. | |
588 | * But some Toshiba CD-ROMs need ten times that. | |
589 | */ | |
590 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
591 | msleep(2500); | |
592 | else | |
593 | msleep(500); | |
1da177e4 LT |
594 | break; |
595 | case 6: | |
636b1ec8 | 596 | shost_printk(KERN_ERR, instance, "bus locked solid\n"); |
1da177e4 LT |
597 | return -ENXIO; |
598 | } | |
599 | } | |
600 | return 0; | |
601 | } | |
602 | ||
603 | /** | |
0d2cf867 | 604 | * NCR5380_exit - remove an NCR5380 |
594d4ba3 | 605 | * @instance: adapter to remove |
0d2cf867 FT |
606 | * |
607 | * Assumes that no more work can be queued (e.g. by NCR5380_intr). | |
1da177e4 LT |
608 | */ |
609 | ||
a43cf0f3 | 610 | static void NCR5380_exit(struct Scsi_Host *instance) |
1da177e4 | 611 | { |
e8a60144 | 612 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 613 | |
8d8601a7 | 614 | cancel_work_sync(&hostdata->main_task); |
0ad0eff9 | 615 | destroy_workqueue(hostdata->work_q); |
1da177e4 LT |
616 | } |
617 | ||
677e0194 FT |
618 | /** |
619 | * complete_cmd - finish processing a command and return it to the SCSI ML | |
620 | * @instance: the host instance | |
621 | * @cmd: command to complete | |
622 | */ | |
623 | ||
624 | static void complete_cmd(struct Scsi_Host *instance, | |
625 | struct scsi_cmnd *cmd) | |
626 | { | |
627 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
628 | ||
629 | dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); | |
630 | ||
f27db8eb FT |
631 | if (hostdata->sensing == cmd) { |
632 | /* Autosense processing ends here */ | |
633 | if ((cmd->result & 0xff) != SAM_STAT_GOOD) { | |
634 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
635 | set_host_byte(cmd, DID_ERROR); | |
636 | } else | |
637 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
638 | hostdata->sensing = NULL; | |
639 | } | |
640 | ||
677e0194 FT |
641 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
642 | ||
643 | cmd->scsi_done(cmd); | |
644 | } | |
645 | ||
1da177e4 | 646 | /** |
1bb40589 FT |
647 | * NCR5380_queue_command - queue a command |
648 | * @instance: the relevant SCSI adapter | |
649 | * @cmd: SCSI command | |
1da177e4 | 650 | * |
1bb40589 FT |
651 | * cmd is added to the per-instance issue queue, with minor |
652 | * twiddling done to the host specific fields of cmd. If the | |
653 | * main coroutine is not running, it is restarted. | |
1da177e4 LT |
654 | */ |
655 | ||
1bb40589 FT |
656 | static int NCR5380_queue_command(struct Scsi_Host *instance, |
657 | struct scsi_cmnd *cmd) | |
1da177e4 | 658 | { |
1bb40589 | 659 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
32b26a10 | 660 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1bb40589 | 661 | unsigned long flags; |
1da177e4 LT |
662 | |
663 | #if (NDEBUG & NDEBUG_NO_WRITE) | |
664 | switch (cmd->cmnd[0]) { | |
665 | case WRITE_6: | |
666 | case WRITE_10: | |
dbb6b350 | 667 | shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); |
1da177e4 | 668 | cmd->result = (DID_ERROR << 16); |
1bb40589 | 669 | cmd->scsi_done(cmd); |
1da177e4 LT |
670 | return 0; |
671 | } | |
0d2cf867 | 672 | #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ |
1da177e4 | 673 | |
1da177e4 LT |
674 | cmd->result = 0; |
675 | ||
52d3e561 FT |
676 | if (!NCR5380_acquire_dma_irq(instance)) |
677 | return SCSI_MLQUEUE_HOST_BUSY; | |
678 | ||
11d2f63b | 679 | spin_lock_irqsave(&hostdata->lock, flags); |
1bb40589 | 680 | |
aff0cf9a FT |
681 | /* |
682 | * Insert the cmd into the issue queue. Note that REQUEST SENSE | |
1da177e4 | 683 | * commands are added to the head of the queue since any command will |
aff0cf9a | 684 | * clear the contingent allegiance condition that exists and the |
1da177e4 LT |
685 | * sense data is only guaranteed to be valid while the condition exists. |
686 | */ | |
687 | ||
32b26a10 FT |
688 | if (cmd->cmnd[0] == REQUEST_SENSE) |
689 | list_add(&ncmd->list, &hostdata->unissued); | |
690 | else | |
691 | list_add_tail(&ncmd->list, &hostdata->unissued); | |
692 | ||
11d2f63b | 693 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1bb40589 | 694 | |
dbb6b350 FT |
695 | dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", |
696 | cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); | |
1da177e4 | 697 | |
1da177e4 | 698 | /* Kick off command processing */ |
8d8601a7 | 699 | queue_work(hostdata->work_q, &hostdata->main_task); |
1da177e4 LT |
700 | return 0; |
701 | } | |
702 | ||
52d3e561 FT |
703 | static inline void maybe_release_dma_irq(struct Scsi_Host *instance) |
704 | { | |
705 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
706 | ||
707 | /* Caller does the locking needed to set & test these data atomically */ | |
708 | if (list_empty(&hostdata->disconnected) && | |
709 | list_empty(&hostdata->unissued) && | |
710 | list_empty(&hostdata->autosense) && | |
711 | !hostdata->connected && | |
712 | !hostdata->selecting) | |
713 | NCR5380_release_dma_irq(instance); | |
714 | } | |
715 | ||
f27db8eb FT |
716 | /** |
717 | * dequeue_next_cmd - dequeue a command for processing | |
718 | * @instance: the scsi host instance | |
719 | * | |
720 | * Priority is given to commands on the autosense queue. These commands | |
721 | * need autosense because of a CHECK CONDITION result. | |
722 | * | |
723 | * Returns a command pointer if a command is found for a target that is | |
724 | * not already busy. Otherwise returns NULL. | |
725 | */ | |
726 | ||
727 | static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) | |
728 | { | |
729 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
730 | struct NCR5380_cmd *ncmd; | |
731 | struct scsi_cmnd *cmd; | |
732 | ||
8d5dbec3 | 733 | if (hostdata->sensing || list_empty(&hostdata->autosense)) { |
f27db8eb FT |
734 | list_for_each_entry(ncmd, &hostdata->unissued, list) { |
735 | cmd = NCR5380_to_scmd(ncmd); | |
736 | dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", | |
737 | cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); | |
738 | ||
739 | if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { | |
740 | list_del(&ncmd->list); | |
741 | dsprintk(NDEBUG_QUEUES, instance, | |
742 | "dequeue: removed %p from issue queue\n", cmd); | |
743 | return cmd; | |
744 | } | |
745 | } | |
746 | } else { | |
747 | /* Autosense processing begins here */ | |
748 | ncmd = list_first_entry(&hostdata->autosense, | |
749 | struct NCR5380_cmd, list); | |
750 | list_del(&ncmd->list); | |
751 | cmd = NCR5380_to_scmd(ncmd); | |
752 | dsprintk(NDEBUG_QUEUES, instance, | |
753 | "dequeue: removed %p from autosense queue\n", cmd); | |
754 | scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); | |
755 | hostdata->sensing = cmd; | |
756 | return cmd; | |
757 | } | |
758 | return NULL; | |
759 | } | |
760 | ||
761 | static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
762 | { | |
763 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
764 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
765 | ||
8d5dbec3 | 766 | if (hostdata->sensing == cmd) { |
f27db8eb FT |
767 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
768 | list_add(&ncmd->list, &hostdata->autosense); | |
769 | hostdata->sensing = NULL; | |
770 | } else | |
771 | list_add(&ncmd->list, &hostdata->unissued); | |
772 | } | |
773 | ||
1da177e4 | 774 | /** |
0d2cf867 | 775 | * NCR5380_main - NCR state machines |
1da177e4 | 776 | * |
594d4ba3 FT |
777 | * NCR5380_main is a coroutine that runs as long as more work can |
778 | * be done on the NCR5380 host adapters in a system. Both | |
779 | * NCR5380_queue_command() and NCR5380_intr() will try to start it | |
780 | * in case it is not running. | |
1da177e4 LT |
781 | */ |
782 | ||
c4028958 | 783 | static void NCR5380_main(struct work_struct *work) |
1da177e4 | 784 | { |
c4028958 | 785 | struct NCR5380_hostdata *hostdata = |
8d8601a7 | 786 | container_of(work, struct NCR5380_hostdata, main_task); |
1da177e4 | 787 | struct Scsi_Host *instance = hostdata->host; |
1da177e4 | 788 | int done; |
aff0cf9a | 789 | |
1da177e4 | 790 | do { |
1da177e4 | 791 | done = 1; |
11d2f63b | 792 | |
0a4e3612 | 793 | spin_lock_irq(&hostdata->lock); |
ccf6efd7 FT |
794 | while (!hostdata->connected && !hostdata->selecting) { |
795 | struct scsi_cmnd *cmd = dequeue_next_cmd(instance); | |
796 | ||
797 | if (!cmd) | |
798 | break; | |
1da177e4 | 799 | |
f27db8eb | 800 | dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); |
76f13b93 | 801 | |
f27db8eb FT |
802 | /* |
803 | * Attempt to establish an I_T_L nexus here. | |
804 | * On success, instance->hostdata->connected is set. | |
805 | * On failure, we must add the command back to the | |
806 | * issue queue so we can keep trying. | |
807 | */ | |
808 | /* | |
809 | * REQUEST SENSE commands are issued without tagged | |
810 | * queueing, even on SCSI-II devices because the | |
811 | * contingent allegiance condition exists for the | |
812 | * entire unit. | |
813 | */ | |
11d2f63b | 814 | |
ccf6efd7 | 815 | if (!NCR5380_select(instance, cmd)) { |
707d62b3 | 816 | dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); |
52d3e561 | 817 | maybe_release_dma_irq(instance); |
f27db8eb FT |
818 | } else { |
819 | dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, | |
820 | "main: select failed, returning %p to queue\n", cmd); | |
821 | requeue_cmd(instance, cmd); | |
822 | } | |
823 | } | |
e4dec680 | 824 | if (hostdata->connected && !hostdata->dma_len) { |
b746545f | 825 | dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); |
1da177e4 | 826 | NCR5380_information_transfer(instance); |
1da177e4 | 827 | done = 0; |
1d3db59d | 828 | } |
0a4e3612 FT |
829 | spin_unlock_irq(&hostdata->lock); |
830 | if (!done) | |
831 | cond_resched(); | |
1da177e4 | 832 | } while (!done); |
1da177e4 LT |
833 | } |
834 | ||
8053b0ee FT |
835 | /* |
836 | * NCR5380_dma_complete - finish DMA transfer | |
837 | * @instance: the scsi host instance | |
838 | * | |
839 | * Called by the interrupt handler when DMA finishes or a phase | |
840 | * mismatch occurs (which would end the DMA transfer). | |
841 | */ | |
842 | ||
843 | static void NCR5380_dma_complete(struct Scsi_Host *instance) | |
844 | { | |
845 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
846 | int transferred; | |
847 | unsigned char **data; | |
848 | int *count; | |
849 | int saved_data = 0, overrun = 0; | |
850 | unsigned char p; | |
851 | ||
852 | if (hostdata->read_overruns) { | |
853 | p = hostdata->connected->SCp.phase; | |
854 | if (p & SR_IO) { | |
855 | udelay(10); | |
856 | if ((NCR5380_read(BUS_AND_STATUS_REG) & | |
857 | (BASR_PHASE_MATCH | BASR_ACK)) == | |
858 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
859 | saved_data = NCR5380_read(INPUT_DATA_REG); | |
860 | overrun = 1; | |
861 | dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); | |
862 | } | |
863 | } | |
864 | } | |
865 | ||
e9db3198 FT |
866 | #ifdef CONFIG_SUN3 |
867 | if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { | |
868 | pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", | |
869 | instance->host_no); | |
870 | BUG(); | |
871 | } | |
872 | ||
873 | if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == | |
874 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
875 | pr_err("scsi%d: BASR %02x\n", instance->host_no, | |
876 | NCR5380_read(BUS_AND_STATUS_REG)); | |
877 | pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", | |
878 | instance->host_no); | |
879 | BUG(); | |
880 | } | |
881 | #endif | |
882 | ||
8053b0ee FT |
883 | NCR5380_write(MODE_REG, MR_BASE); |
884 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
885 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
886 | ||
887 | transferred = hostdata->dma_len - NCR5380_dma_residual(instance); | |
888 | hostdata->dma_len = 0; | |
889 | ||
890 | data = (unsigned char **)&hostdata->connected->SCp.ptr; | |
891 | count = &hostdata->connected->SCp.this_residual; | |
892 | *data += transferred; | |
893 | *count -= transferred; | |
894 | ||
895 | if (hostdata->read_overruns) { | |
896 | int cnt, toPIO; | |
897 | ||
898 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { | |
899 | cnt = toPIO = hostdata->read_overruns; | |
900 | if (overrun) { | |
901 | dsprintk(NDEBUG_DMA, instance, | |
902 | "Got an input overrun, using saved byte\n"); | |
903 | *(*data)++ = saved_data; | |
904 | (*count)--; | |
905 | cnt--; | |
906 | toPIO--; | |
907 | } | |
908 | if (toPIO > 0) { | |
909 | dsprintk(NDEBUG_DMA, instance, | |
910 | "Doing %d byte PIO to 0x%p\n", cnt, *data); | |
911 | NCR5380_transfer_pio(instance, &p, &cnt, data); | |
912 | *count -= toPIO - cnt; | |
913 | } | |
914 | } | |
915 | } | |
916 | } | |
917 | ||
1da177e4 LT |
918 | #ifndef DONT_USE_INTR |
919 | ||
920 | /** | |
cd400825 FT |
921 | * NCR5380_intr - generic NCR5380 irq handler |
922 | * @irq: interrupt number | |
923 | * @dev_id: device info | |
924 | * | |
925 | * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses | |
926 | * from the disconnected queue, and restarting NCR5380_main() | |
927 | * as required. | |
928 | * | |
929 | * The chip can assert IRQ in any of six different conditions. The IRQ flag | |
930 | * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). | |
931 | * Three of these six conditions are latched in the Bus and Status Register: | |
932 | * - End of DMA (cleared by ending DMA Mode) | |
933 | * - Parity error (cleared by reading RPIR) | |
934 | * - Loss of BSY (cleared by reading RPIR) | |
935 | * Two conditions have flag bits that are not latched: | |
936 | * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) | |
937 | * - Bus reset (non-maskable) | |
938 | * The remaining condition has no flag bit at all: | |
939 | * - Selection/reselection | |
940 | * | |
941 | * Hence, establishing the cause(s) of any interrupt is partly guesswork. | |
942 | * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor | |
943 | * claimed that "the design of the [DP8490] interrupt logic ensures | |
944 | * interrupts will not be lost (they can be on the DP5380)." | |
945 | * The L5380/53C80 datasheet from LOGIC Devices has more details. | |
946 | * | |
947 | * Checking for bus reset by reading RST is futile because of interrupt | |
948 | * latency, but a bus reset will reset chip logic. Checking for parity error | |
949 | * is unnecessary because that interrupt is never enabled. A Loss of BSY | |
950 | * condition will clear DMA Mode. We can tell when this occurs because the | |
951 | * the Busy Monitor interrupt is enabled together with DMA Mode. | |
1da177e4 LT |
952 | */ |
953 | ||
cd400825 | 954 | static irqreturn_t NCR5380_intr(int irq, void *dev_id) |
1da177e4 | 955 | { |
baa9aac6 | 956 | struct Scsi_Host *instance = dev_id; |
cd400825 FT |
957 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
958 | int handled = 0; | |
1da177e4 LT |
959 | unsigned char basr; |
960 | unsigned long flags; | |
961 | ||
11d2f63b | 962 | spin_lock_irqsave(&hostdata->lock, flags); |
cd400825 FT |
963 | |
964 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
965 | if (basr & BASR_IRQ) { | |
966 | unsigned char mr = NCR5380_read(MODE_REG); | |
967 | unsigned char sr = NCR5380_read(STATUS_REG); | |
968 | ||
b746545f FT |
969 | dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", |
970 | irq, basr, sr, mr); | |
1da177e4 | 971 | |
8053b0ee FT |
972 | if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { |
973 | /* Probably End of DMA, Phase Mismatch or Loss of BSY. | |
974 | * We ack IRQ after clearing Mode Register. Workarounds | |
975 | * for End of DMA errata need to happen in DMA Mode. | |
976 | */ | |
977 | ||
978 | dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); | |
979 | ||
980 | if (hostdata->connected) { | |
981 | NCR5380_dma_complete(instance); | |
982 | queue_work(hostdata->work_q, &hostdata->main_task); | |
983 | } else { | |
984 | NCR5380_write(MODE_REG, MR_BASE); | |
985 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
986 | } | |
987 | } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && | |
cd400825 FT |
988 | (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { |
989 | /* Probably reselected */ | |
990 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
991 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
992 | ||
b746545f | 993 | dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); |
cd400825 FT |
994 | |
995 | if (!hostdata->connected) { | |
996 | NCR5380_reselect(instance); | |
997 | queue_work(hostdata->work_q, &hostdata->main_task); | |
1da177e4 | 998 | } |
cd400825 FT |
999 | if (!hostdata->connected) |
1000 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1001 | } else { | |
1002 | /* Probably Bus Reset */ | |
1003 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
1004 | ||
b746545f | 1005 | dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); |
e9db3198 FT |
1006 | #ifdef SUN3_SCSI_VME |
1007 | dregs->csr |= CSR_DMA_ENABLE; | |
1008 | #endif | |
cd400825 FT |
1009 | } |
1010 | handled = 1; | |
1011 | } else { | |
1012 | shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n"); | |
e9db3198 FT |
1013 | #ifdef SUN3_SCSI_VME |
1014 | dregs->csr |= CSR_DMA_ENABLE; | |
1015 | #endif | |
cd400825 FT |
1016 | } |
1017 | ||
11d2f63b | 1018 | spin_unlock_irqrestore(&hostdata->lock, flags); |
cd400825 FT |
1019 | |
1020 | return IRQ_RETVAL(handled); | |
1da177e4 LT |
1021 | } |
1022 | ||
aff0cf9a | 1023 | #endif |
1da177e4 | 1024 | |
aff0cf9a | 1025 | /* |
710ddd0d | 1026 | * Function : int NCR5380_select(struct Scsi_Host *instance, |
594d4ba3 | 1027 | * struct scsi_cmnd *cmd) |
1da177e4 LT |
1028 | * |
1029 | * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command, | |
594d4ba3 FT |
1030 | * including ARBITRATION, SELECTION, and initial message out for |
1031 | * IDENTIFY and queue messages. | |
1da177e4 | 1032 | * |
aff0cf9a | 1033 | * Inputs : instance - instantiation of the 5380 driver on which this |
594d4ba3 | 1034 | * target lives, cmd - SCSI command to execute. |
aff0cf9a | 1035 | * |
707d62b3 FT |
1036 | * Returns cmd if selection failed but should be retried, |
1037 | * NULL if selection failed and should not be retried, or | |
1038 | * NULL if selection succeeded (hostdata->connected == cmd). | |
1da177e4 | 1039 | * |
aff0cf9a | 1040 | * Side effects : |
594d4ba3 FT |
1041 | * If bus busy, arbitration failed, etc, NCR5380_select() will exit |
1042 | * with registers as they should have been on entry - ie | |
1043 | * SELECT_ENABLE will be set appropriately, the NCR5380 | |
1044 | * will cease to drive any SCSI bus signals. | |
1da177e4 | 1045 | * |
594d4ba3 FT |
1046 | * If successful : I_T_L or I_T_L_Q nexus will be established, |
1047 | * instance->connected will be set to cmd. | |
1048 | * SELECT interrupt will be disabled. | |
1da177e4 | 1049 | * |
594d4ba3 FT |
1050 | * If failed (no target) : cmd->scsi_done() will be called, and the |
1051 | * cmd->result host byte set to DID_BAD_TARGET. | |
1da177e4 | 1052 | */ |
aff0cf9a | 1053 | |
707d62b3 FT |
1054 | static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance, |
1055 | struct scsi_cmnd *cmd) | |
1da177e4 | 1056 | { |
e8a60144 | 1057 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1058 | unsigned char tmp[3], phase; |
1059 | unsigned char *data; | |
1060 | int len; | |
1da177e4 | 1061 | int err; |
1da177e4 | 1062 | |
1da177e4 | 1063 | NCR5380_dprint(NDEBUG_ARBITRATION, instance); |
b746545f FT |
1064 | dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", |
1065 | instance->this_id); | |
1da177e4 | 1066 | |
707d62b3 FT |
1067 | /* |
1068 | * Arbitration and selection phases are slow and involve dropping the | |
1069 | * lock, so we have to watch out for EH. An exception handler may | |
1070 | * change 'selecting' to NULL. This function will then return NULL | |
1071 | * so that the caller will forget about 'cmd'. (During information | |
1072 | * transfer phases, EH may change 'connected' to NULL.) | |
1073 | */ | |
1074 | hostdata->selecting = cmd; | |
1075 | ||
aff0cf9a FT |
1076 | /* |
1077 | * Set the phase bits to 0, otherwise the NCR5380 won't drive the | |
1da177e4 LT |
1078 | * data bus during SELECTION. |
1079 | */ | |
1080 | ||
1081 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1082 | ||
aff0cf9a | 1083 | /* |
1da177e4 LT |
1084 | * Start arbitration. |
1085 | */ | |
1086 | ||
1087 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
1088 | NCR5380_write(MODE_REG, MR_ARBITRATE); | |
1089 | ||
55500d9b FT |
1090 | /* The chip now waits for BUS FREE phase. Then after the 800 ns |
1091 | * Bus Free Delay, arbitration will begin. | |
1092 | */ | |
1da177e4 | 1093 | |
11d2f63b | 1094 | spin_unlock_irq(&hostdata->lock); |
b32ade12 FT |
1095 | err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0, |
1096 | INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, | |
1097 | ICR_ARBITRATION_PROGRESS, HZ); | |
11d2f63b | 1098 | spin_lock_irq(&hostdata->lock); |
b32ade12 FT |
1099 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { |
1100 | /* Reselection interrupt */ | |
707d62b3 | 1101 | goto out; |
b32ade12 | 1102 | } |
ccf6efd7 FT |
1103 | if (!hostdata->selecting) { |
1104 | /* Command was aborted */ | |
1105 | NCR5380_write(MODE_REG, MR_BASE); | |
1106 | goto out; | |
1107 | } | |
b32ade12 FT |
1108 | if (err < 0) { |
1109 | NCR5380_write(MODE_REG, MR_BASE); | |
1110 | shost_printk(KERN_ERR, instance, | |
1111 | "select: arbitration timeout\n"); | |
707d62b3 | 1112 | goto out; |
1da177e4 | 1113 | } |
11d2f63b | 1114 | spin_unlock_irq(&hostdata->lock); |
1da177e4 | 1115 | |
55500d9b | 1116 | /* The SCSI-2 arbitration delay is 2.4 us */ |
1da177e4 LT |
1117 | udelay(3); |
1118 | ||
1119 | /* Check for lost arbitration */ | |
0d2cf867 FT |
1120 | if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || |
1121 | (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || | |
1122 | (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { | |
1da177e4 | 1123 | NCR5380_write(MODE_REG, MR_BASE); |
b746545f | 1124 | dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); |
11d2f63b | 1125 | spin_lock_irq(&hostdata->lock); |
707d62b3 | 1126 | goto out; |
1da177e4 | 1127 | } |
cf13b083 FT |
1128 | |
1129 | /* After/during arbitration, BSY should be asserted. | |
1130 | * IBM DPES-31080 Version S31Q works now | |
1131 | * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) | |
1132 | */ | |
1133 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1134 | ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); | |
1da177e4 | 1135 | |
aff0cf9a FT |
1136 | /* |
1137 | * Again, bus clear + bus settle time is 1.2us, however, this is | |
1da177e4 LT |
1138 | * a minimum so we'll udelay ceil(1.2) |
1139 | */ | |
1140 | ||
9c3f0e2b FT |
1141 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) |
1142 | udelay(15); | |
1143 | else | |
1144 | udelay(2); | |
1da177e4 | 1145 | |
11d2f63b FT |
1146 | spin_lock_irq(&hostdata->lock); |
1147 | ||
72064a78 FT |
1148 | /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ |
1149 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) | |
707d62b3 FT |
1150 | goto out; |
1151 | ||
1152 | if (!hostdata->selecting) { | |
1153 | NCR5380_write(MODE_REG, MR_BASE); | |
1154 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1155 | goto out; | |
1156 | } | |
72064a78 | 1157 | |
b746545f | 1158 | dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); |
1da177e4 | 1159 | |
aff0cf9a FT |
1160 | /* |
1161 | * Now that we have won arbitration, start Selection process, asserting | |
1da177e4 LT |
1162 | * the host and target ID's on the SCSI bus. |
1163 | */ | |
1164 | ||
3d07d22b | 1165 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); |
1da177e4 | 1166 | |
aff0cf9a | 1167 | /* |
1da177e4 LT |
1168 | * Raise ATN while SEL is true before BSY goes false from arbitration, |
1169 | * since this is the only way to guarantee that we'll get a MESSAGE OUT | |
1170 | * phase immediately after selection. | |
1171 | */ | |
1172 | ||
3d07d22b FT |
1173 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | |
1174 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 LT |
1175 | NCR5380_write(MODE_REG, MR_BASE); |
1176 | ||
aff0cf9a | 1177 | /* |
1da177e4 LT |
1178 | * Reselect interrupts must be turned off prior to the dropping of BSY, |
1179 | * otherwise we will trigger an interrupt. | |
1180 | */ | |
1181 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1182 | ||
11d2f63b FT |
1183 | spin_unlock_irq(&hostdata->lock); |
1184 | ||
1da177e4 | 1185 | /* |
aff0cf9a | 1186 | * The initiator shall then wait at least two deskew delays and release |
1da177e4 LT |
1187 | * the BSY signal. |
1188 | */ | |
0d2cf867 | 1189 | udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ |
1da177e4 LT |
1190 | |
1191 | /* Reset BSY */ | |
3d07d22b FT |
1192 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | |
1193 | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 | 1194 | |
aff0cf9a | 1195 | /* |
1da177e4 | 1196 | * Something weird happens when we cease to drive BSY - looks |
aff0cf9a | 1197 | * like the board/chip is letting us do another read before the |
1da177e4 LT |
1198 | * appropriate propagation delay has expired, and we're confusing |
1199 | * a BSY signal from ourselves as the target's response to SELECTION. | |
1200 | * | |
1201 | * A small delay (the 'C++' frontend breaks the pipeline with an | |
1202 | * unnecessary jump, making it work on my 386-33/Trantor T128, the | |
aff0cf9a FT |
1203 | * tighter 'C' code breaks and requires this) solves the problem - |
1204 | * the 1 us delay is arbitrary, and only used because this delay will | |
1205 | * be the same on other platforms and since it works here, it should | |
1da177e4 LT |
1206 | * work there. |
1207 | * | |
1208 | * wingel suggests that this could be due to failing to wait | |
1209 | * one deskew delay. | |
1210 | */ | |
1211 | ||
1212 | udelay(1); | |
1213 | ||
b746545f | 1214 | dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); |
1da177e4 | 1215 | |
aff0cf9a FT |
1216 | /* |
1217 | * The SCSI specification calls for a 250 ms timeout for the actual | |
1da177e4 LT |
1218 | * selection. |
1219 | */ | |
1220 | ||
ae753a33 FT |
1221 | err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY, |
1222 | msecs_to_jiffies(250)); | |
1da177e4 | 1223 | |
1da177e4 | 1224 | if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { |
11d2f63b | 1225 | spin_lock_irq(&hostdata->lock); |
1da177e4 LT |
1226 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
1227 | NCR5380_reselect(instance); | |
cd400825 FT |
1228 | if (!hostdata->connected) |
1229 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
6a6ff4ac | 1230 | shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); |
707d62b3 | 1231 | goto out; |
1da177e4 | 1232 | } |
ae753a33 FT |
1233 | |
1234 | if (err < 0) { | |
11d2f63b | 1235 | spin_lock_irq(&hostdata->lock); |
ae753a33 | 1236 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
ae753a33 | 1237 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
707d62b3 FT |
1238 | /* Can't touch cmd if it has been reclaimed by the scsi ML */ |
1239 | if (hostdata->selecting) { | |
1240 | cmd->result = DID_BAD_TARGET << 16; | |
1241 | complete_cmd(instance, cmd); | |
1242 | dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n"); | |
1243 | cmd = NULL; | |
1244 | } | |
1245 | goto out; | |
ae753a33 FT |
1246 | } |
1247 | ||
aff0cf9a FT |
1248 | /* |
1249 | * No less than two deskew delays after the initiator detects the | |
1250 | * BSY signal is true, it shall release the SEL signal and may | |
1da177e4 LT |
1251 | * change the DATA BUS. -wingel |
1252 | */ | |
1253 | ||
1254 | udelay(1); | |
1255 | ||
1256 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1257 | ||
1da177e4 | 1258 | /* |
aff0cf9a | 1259 | * Since we followed the SCSI spec, and raised ATN while SEL |
1da177e4 LT |
1260 | * was true but before BSY was false during selection, the information |
1261 | * transfer phase should be a MESSAGE OUT phase so that we can send the | |
1262 | * IDENTIFY message. | |
1da177e4 LT |
1263 | */ |
1264 | ||
1265 | /* Wait for start of REQ/ACK handshake */ | |
1266 | ||
1da177e4 | 1267 | err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 1268 | spin_lock_irq(&hostdata->lock); |
1cc160e1 | 1269 | if (err < 0) { |
55500d9b FT |
1270 | shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); |
1271 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1da177e4 | 1272 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
707d62b3 FT |
1273 | goto out; |
1274 | } | |
1275 | if (!hostdata->selecting) { | |
1276 | do_abort(instance); | |
1277 | goto out; | |
1da177e4 LT |
1278 | } |
1279 | ||
b746545f FT |
1280 | dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", |
1281 | scmd_id(cmd)); | |
22f5f10d | 1282 | tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun); |
1da177e4 LT |
1283 | |
1284 | len = 1; | |
1da177e4 LT |
1285 | data = tmp; |
1286 | phase = PHASE_MSGOUT; | |
1287 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f | 1288 | dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); |
1da177e4 | 1289 | /* XXX need to handle errors here */ |
11d2f63b | 1290 | |
1da177e4 | 1291 | hostdata->connected = cmd; |
3d07d22b | 1292 | hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; |
1da177e4 | 1293 | |
e9db3198 FT |
1294 | #ifdef SUN3_SCSI_VME |
1295 | dregs->csr |= CSR_INTR; | |
1296 | #endif | |
1297 | ||
28424d3a | 1298 | initialize_SCp(cmd); |
1da177e4 | 1299 | |
707d62b3 FT |
1300 | cmd = NULL; |
1301 | ||
1302 | out: | |
1303 | if (!hostdata->selecting) | |
1304 | return NULL; | |
1305 | hostdata->selecting = NULL; | |
1306 | return cmd; | |
1da177e4 LT |
1307 | } |
1308 | ||
aff0cf9a FT |
1309 | /* |
1310 | * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, | |
594d4ba3 | 1311 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1312 | * |
1313 | * Purpose : transfers data in given phase using polled I/O | |
1314 | * | |
aff0cf9a | 1315 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1316 | * what phase is expected, *count - pointer to number of |
1317 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1318 | * |
1da177e4 | 1319 | * Returns : -1 when different phase is entered without transferring |
0d2cf867 | 1320 | * maximum number of bytes, 0 if all bytes are transferred or exit |
594d4ba3 | 1321 | * is in same phase. |
1da177e4 | 1322 | * |
594d4ba3 | 1323 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1324 | * |
1325 | * XXX Note : handling for bus free may be useful. | |
1326 | */ | |
1327 | ||
1328 | /* | |
aff0cf9a | 1329 | * Note : this code is not as quick as it could be, however it |
1da177e4 LT |
1330 | * IS 100% reliable, and for the actual data transfer where speed |
1331 | * counts, we will always do a pseudo DMA or DMA transfer. | |
1332 | */ | |
1333 | ||
0d2cf867 FT |
1334 | static int NCR5380_transfer_pio(struct Scsi_Host *instance, |
1335 | unsigned char *phase, int *count, | |
1336 | unsigned char **data) | |
1337 | { | |
1da177e4 LT |
1338 | unsigned char p = *phase, tmp; |
1339 | int c = *count; | |
1340 | unsigned char *d = *data; | |
1da177e4 | 1341 | |
aff0cf9a FT |
1342 | /* |
1343 | * The NCR5380 chip will only drive the SCSI bus when the | |
1da177e4 LT |
1344 | * phase specified in the appropriate bits of the TARGET COMMAND |
1345 | * REGISTER match the STATUS REGISTER | |
1346 | */ | |
1347 | ||
0d2cf867 | 1348 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1da177e4 | 1349 | |
1da177e4 | 1350 | do { |
aff0cf9a FT |
1351 | /* |
1352 | * Wait for assertion of REQ, after which the phase bits will be | |
1353 | * valid | |
1da177e4 LT |
1354 | */ |
1355 | ||
686f3990 | 1356 | if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) |
1da177e4 | 1357 | break; |
1da177e4 | 1358 | |
b746545f | 1359 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); |
1da177e4 LT |
1360 | |
1361 | /* Check for phase mismatch */ | |
686f3990 | 1362 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { |
b746545f FT |
1363 | dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); |
1364 | NCR5380_dprint_phase(NDEBUG_PIO, instance); | |
1da177e4 LT |
1365 | break; |
1366 | } | |
0d2cf867 | 1367 | |
1da177e4 LT |
1368 | /* Do actual transfer from SCSI bus to / from memory */ |
1369 | if (!(p & SR_IO)) | |
1370 | NCR5380_write(OUTPUT_DATA_REG, *d); | |
1371 | else | |
1372 | *d = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
1373 | ||
1374 | ++d; | |
1375 | ||
aff0cf9a | 1376 | /* |
1da177e4 LT |
1377 | * The SCSI standard suggests that in MSGOUT phase, the initiator |
1378 | * should drop ATN on the last byte of the message phase | |
1379 | * after REQ has been asserted for the handshake but before | |
1380 | * the initiator raises ACK. | |
1381 | */ | |
1382 | ||
1383 | if (!(p & SR_IO)) { | |
1384 | if (!((p & SR_MSG) && c > 1)) { | |
1385 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1386 | NCR5380_dprint(NDEBUG_PIO, instance); | |
3d07d22b FT |
1387 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1388 | ICR_ASSERT_DATA | ICR_ASSERT_ACK); | |
1da177e4 | 1389 | } else { |
3d07d22b FT |
1390 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1391 | ICR_ASSERT_DATA | ICR_ASSERT_ATN); | |
1da177e4 | 1392 | NCR5380_dprint(NDEBUG_PIO, instance); |
3d07d22b FT |
1393 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1394 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1da177e4 LT |
1395 | } |
1396 | } else { | |
1397 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1398 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
1399 | } | |
1400 | ||
a2edc4a6 FT |
1401 | if (NCR5380_poll_politely(instance, |
1402 | STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) | |
1403 | break; | |
1404 | ||
b746545f | 1405 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); |
1da177e4 LT |
1406 | |
1407 | /* | |
aff0cf9a FT |
1408 | * We have several special cases to consider during REQ/ACK handshaking : |
1409 | * 1. We were in MSGOUT phase, and we are on the last byte of the | |
594d4ba3 | 1410 | * message. ATN must be dropped as ACK is dropped. |
1da177e4 | 1411 | * |
aff0cf9a | 1412 | * 2. We are in a MSGIN phase, and we are on the last byte of the |
594d4ba3 FT |
1413 | * message. We must exit with ACK asserted, so that the calling |
1414 | * code may raise ATN before dropping ACK to reject the message. | |
1da177e4 LT |
1415 | * |
1416 | * 3. ACK and ATN are clear and the target may proceed as normal. | |
1417 | */ | |
1418 | if (!(p == PHASE_MSGIN && c == 1)) { | |
1419 | if (p == PHASE_MSGOUT && c > 1) | |
1420 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1421 | else | |
1422 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1423 | } | |
1424 | } while (--c); | |
1425 | ||
b746545f | 1426 | dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); |
1da177e4 LT |
1427 | |
1428 | *count = c; | |
1429 | *data = d; | |
1430 | tmp = NCR5380_read(STATUS_REG); | |
a2edc4a6 FT |
1431 | /* The phase read from the bus is valid if either REQ is (already) |
1432 | * asserted or if ACK hasn't been released yet. The latter applies if | |
1433 | * we're in MSG IN, DATA IN or STATUS and all bytes have been received. | |
1434 | */ | |
1435 | if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) | |
1da177e4 LT |
1436 | *phase = tmp & PHASE_MASK; |
1437 | else | |
1438 | *phase = PHASE_UNKNOWN; | |
1439 | ||
1440 | if (!c || (*phase == p)) | |
1441 | return 0; | |
1442 | else | |
1443 | return -1; | |
1444 | } | |
1445 | ||
1446 | /** | |
636b1ec8 FT |
1447 | * do_reset - issue a reset command |
1448 | * @instance: adapter to reset | |
1da177e4 | 1449 | * |
636b1ec8 FT |
1450 | * Issue a reset sequence to the NCR5380 and try and get the bus |
1451 | * back into sane shape. | |
1da177e4 | 1452 | * |
636b1ec8 FT |
1453 | * This clears the reset interrupt flag because there may be no handler for |
1454 | * it. When the driver is initialized, the NCR5380_intr() handler has not yet | |
1455 | * been installed. And when in EH we may have released the ST DMA interrupt. | |
1da177e4 | 1456 | */ |
aff0cf9a | 1457 | |
54d8fe44 FT |
1458 | static void do_reset(struct Scsi_Host *instance) |
1459 | { | |
636b1ec8 FT |
1460 | unsigned long flags; |
1461 | ||
1462 | local_irq_save(flags); | |
1463 | NCR5380_write(TARGET_COMMAND_REG, | |
1464 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); | |
1da177e4 | 1465 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); |
636b1ec8 | 1466 | udelay(50); |
1da177e4 | 1467 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
636b1ec8 FT |
1468 | (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1469 | local_irq_restore(flags); | |
1da177e4 LT |
1470 | } |
1471 | ||
80d3eb6d FT |
1472 | /** |
1473 | * do_abort - abort the currently established nexus by going to | |
1474 | * MESSAGE OUT phase and sending an ABORT message. | |
1475 | * @instance: relevant scsi host instance | |
1da177e4 | 1476 | * |
80d3eb6d | 1477 | * Returns 0 on success, -1 on failure. |
1da177e4 LT |
1478 | */ |
1479 | ||
54d8fe44 FT |
1480 | static int do_abort(struct Scsi_Host *instance) |
1481 | { | |
1da177e4 LT |
1482 | unsigned char *msgptr, phase, tmp; |
1483 | int len; | |
1484 | int rc; | |
1da177e4 LT |
1485 | |
1486 | /* Request message out phase */ | |
1487 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1488 | ||
aff0cf9a FT |
1489 | /* |
1490 | * Wait for the target to indicate a valid phase by asserting | |
1491 | * REQ. Once this happens, we'll have either a MSGOUT phase | |
1492 | * and can immediately send the ABORT message, or we'll have some | |
1da177e4 | 1493 | * other phase and will have to source/sink data. |
aff0cf9a | 1494 | * |
1da177e4 LT |
1495 | * We really don't care what value was on the bus or what value |
1496 | * the target sees, so we just handshake. | |
1497 | */ | |
1498 | ||
80d3eb6d | 1499 | rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); |
1cc160e1 | 1500 | if (rc < 0) |
80d3eb6d | 1501 | goto timeout; |
1da177e4 | 1502 | |
f35d3474 | 1503 | tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; |
aff0cf9a | 1504 | |
1da177e4 LT |
1505 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); |
1506 | ||
f35d3474 | 1507 | if (tmp != PHASE_MSGOUT) { |
0d2cf867 FT |
1508 | NCR5380_write(INITIATOR_COMMAND_REG, |
1509 | ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
54d8fe44 | 1510 | rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ); |
1cc160e1 | 1511 | if (rc < 0) |
80d3eb6d FT |
1512 | goto timeout; |
1513 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1da177e4 | 1514 | } |
0d2cf867 | 1515 | |
1da177e4 LT |
1516 | tmp = ABORT; |
1517 | msgptr = &tmp; | |
1518 | len = 1; | |
1519 | phase = PHASE_MSGOUT; | |
54d8fe44 | 1520 | NCR5380_transfer_pio(instance, &phase, &len, &msgptr); |
1da177e4 LT |
1521 | |
1522 | /* | |
1523 | * If we got here, and the command completed successfully, | |
1524 | * we're about to go into bus free state. | |
1525 | */ | |
1526 | ||
1527 | return len ? -1 : 0; | |
80d3eb6d FT |
1528 | |
1529 | timeout: | |
1530 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1531 | return -1; | |
1da177e4 LT |
1532 | } |
1533 | ||
aff0cf9a FT |
1534 | /* |
1535 | * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, | |
594d4ba3 | 1536 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1537 | * |
1538 | * Purpose : transfers data in given phase using either real | |
594d4ba3 | 1539 | * or pseudo DMA. |
1da177e4 | 1540 | * |
aff0cf9a | 1541 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1542 | * what phase is expected, *count - pointer to number of |
1543 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1544 | * |
1da177e4 | 1545 | * Returns : -1 when different phase is entered without transferring |
594d4ba3 FT |
1546 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1547 | * is in same phase. | |
1da177e4 | 1548 | * |
594d4ba3 | 1549 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1550 | */ |
1551 | ||
1552 | ||
0d2cf867 FT |
1553 | static int NCR5380_transfer_dma(struct Scsi_Host *instance, |
1554 | unsigned char *phase, int *count, | |
1555 | unsigned char **data) | |
1556 | { | |
1557 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
1da177e4 LT |
1558 | register int c = *count; |
1559 | register unsigned char p = *phase; | |
1560 | register unsigned char *d = *data; | |
1561 | unsigned char tmp; | |
8053b0ee | 1562 | int result = 0; |
1da177e4 | 1563 | |
1da177e4 LT |
1564 | if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { |
1565 | *phase = tmp; | |
1566 | return -1; | |
1567 | } | |
1da177e4 | 1568 | |
8053b0ee | 1569 | hostdata->connected->SCp.phase = p; |
1da177e4 | 1570 | |
8053b0ee FT |
1571 | if (p & SR_IO) { |
1572 | if (hostdata->read_overruns) | |
1573 | c -= hostdata->read_overruns; | |
1574 | else if (hostdata->flags & FLAG_DMA_FIXUP) | |
1575 | --c; | |
1576 | } | |
1da177e4 | 1577 | |
8053b0ee FT |
1578 | dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", |
1579 | (p & SR_IO) ? "receive" : "send", c, d); | |
1da177e4 | 1580 | |
e9db3198 FT |
1581 | #ifdef CONFIG_SUN3 |
1582 | /* send start chain */ | |
1583 | sun3scsi_dma_start(c, *data); | |
1584 | #endif | |
1585 | ||
8053b0ee FT |
1586 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1587 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | | |
1588 | MR_ENABLE_EOP_INTR); | |
1589 | ||
1590 | if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { | |
1591 | /* On the Medusa, it is a must to initialize the DMA before | |
1592 | * starting the NCR. This is also the cleaner way for the TT. | |
1593 | */ | |
1594 | if (p & SR_IO) | |
1595 | result = NCR5380_dma_recv_setup(instance, d, c); | |
1596 | else | |
1597 | result = NCR5380_dma_send_setup(instance, d, c); | |
1598 | } | |
1da177e4 | 1599 | |
aff0cf9a | 1600 | /* |
594d4ba3 FT |
1601 | * On the PAS16 at least I/O recovery delays are not needed here. |
1602 | * Everyone else seems to want them. | |
1da177e4 LT |
1603 | */ |
1604 | ||
1605 | if (p & SR_IO) { | |
e9db3198 | 1606 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
e5d55d1a | 1607 | NCR5380_io_delay(1); |
1da177e4 LT |
1608 | NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); |
1609 | } else { | |
e5d55d1a | 1610 | NCR5380_io_delay(1); |
1da177e4 | 1611 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); |
e5d55d1a | 1612 | NCR5380_io_delay(1); |
1da177e4 | 1613 | NCR5380_write(START_DMA_SEND_REG, 0); |
e5d55d1a | 1614 | NCR5380_io_delay(1); |
1da177e4 LT |
1615 | } |
1616 | ||
e9db3198 FT |
1617 | #ifdef CONFIG_SUN3 |
1618 | #ifdef SUN3_SCSI_VME | |
1619 | dregs->csr |= CSR_DMA_ENABLE; | |
1620 | #endif | |
1621 | sun3_dma_active = 1; | |
1622 | #endif | |
1623 | ||
8053b0ee FT |
1624 | if (hostdata->flags & FLAG_LATE_DMA_SETUP) { |
1625 | /* On the Falcon, the DMA setup must be done after the last | |
1626 | * NCR access, else the DMA setup gets trashed! | |
1627 | */ | |
1628 | if (p & SR_IO) | |
1629 | result = NCR5380_dma_recv_setup(instance, d, c); | |
1630 | else | |
1631 | result = NCR5380_dma_send_setup(instance, d, c); | |
1632 | } | |
1633 | ||
1634 | /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ | |
1635 | if (result < 0) | |
1636 | return result; | |
1637 | ||
1638 | /* For real DMA, result is the byte count. DMA interrupt is expected. */ | |
1639 | if (result > 0) { | |
1640 | hostdata->dma_len = result; | |
1641 | return 0; | |
1642 | } | |
1643 | ||
1644 | /* The result is zero iff pseudo DMA send/receive was completed. */ | |
1645 | hostdata->dma_len = c; | |
1646 | ||
1da177e4 | 1647 | /* |
e4dec680 | 1648 | * A note regarding the DMA errata workarounds for early NMOS silicon. |
c16df32e FT |
1649 | * |
1650 | * For DMA sends, we want to wait until the last byte has been | |
1651 | * transferred out over the bus before we turn off DMA mode. Alas, there | |
1652 | * seems to be no terribly good way of doing this on a 5380 under all | |
1653 | * conditions. For non-scatter-gather operations, we can wait until REQ | |
1654 | * and ACK both go false, or until a phase mismatch occurs. Gather-sends | |
1655 | * are nastier, since the device will be expecting more data than we | |
1656 | * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we | |
1657 | * could test Last Byte Sent to assure transfer (I imagine this is precisely | |
1658 | * why this signal was added to the newer chips) but on the older 538[01] | |
1659 | * this signal does not exist. The workaround for this lack is a watchdog; | |
1660 | * we bail out of the wait-loop after a modest amount of wait-time if | |
1661 | * the usual exit conditions are not met. Not a terribly clean or | |
1662 | * correct solution :-% | |
1663 | * | |
1664 | * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. | |
1665 | * If the chip is in DMA receive mode, it will respond to a target's | |
1666 | * REQ by latching the SCSI data into the INPUT DATA register and asserting | |
1667 | * ACK, even if it has _already_ been notified by the DMA controller that | |
1668 | * the current DMA transfer has completed! If the NCR5380 is then taken | |
1669 | * out of DMA mode, this already-acknowledged byte is lost. This is | |
1670 | * not a problem for "one DMA transfer per READ command", because | |
1671 | * the situation will never arise... either all of the data is DMA'ed | |
1672 | * properly, or the target switches to MESSAGE IN phase to signal a | |
1673 | * disconnection (either operation bringing the DMA to a clean halt). | |
1674 | * However, in order to handle scatter-receive, we must work around the | |
e4dec680 | 1675 | * problem. The chosen fix is to DMA fewer bytes, then check for the |
c16df32e FT |
1676 | * condition before taking the NCR5380 out of DMA mode. One or two extra |
1677 | * bytes are transferred via PIO as necessary to fill out the original | |
1678 | * request. | |
1da177e4 LT |
1679 | */ |
1680 | ||
8053b0ee FT |
1681 | if (hostdata->flags & FLAG_DMA_FIXUP) { |
1682 | if (p & SR_IO) { | |
1da177e4 | 1683 | /* |
e4dec680 | 1684 | * The workaround was to transfer fewer bytes than we |
aff0cf9a | 1685 | * intended to with the pseudo-DMA read function, wait for |
1da177e4 LT |
1686 | * the chip to latch the last byte, read it, and then disable |
1687 | * pseudo-DMA mode. | |
aff0cf9a | 1688 | * |
1da177e4 LT |
1689 | * After REQ is asserted, the NCR5380 asserts DRQ and ACK. |
1690 | * REQ is deasserted when ACK is asserted, and not reasserted | |
1691 | * until ACK goes false. Since the NCR5380 won't lower ACK | |
1692 | * until DACK is asserted, which won't happen unless we twiddle | |
aff0cf9a FT |
1693 | * the DMA port or we take the NCR5380 out of DMA mode, we |
1694 | * can guarantee that we won't handshake another extra | |
1da177e4 LT |
1695 | * byte. |
1696 | */ | |
1697 | ||
55181be8 FT |
1698 | if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, |
1699 | BASR_DRQ, BASR_DRQ, HZ) < 0) { | |
438af51c | 1700 | result = -1; |
55181be8 FT |
1701 | shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); |
1702 | } | |
1703 | if (NCR5380_poll_politely(instance, STATUS_REG, | |
1704 | SR_REQ, 0, HZ) < 0) { | |
438af51c | 1705 | result = -1; |
55181be8 | 1706 | shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); |
1da177e4 | 1707 | } |
8053b0ee FT |
1708 | d[*count - 1] = NCR5380_read(INPUT_DATA_REG); |
1709 | } else { | |
1da177e4 | 1710 | /* |
aff0cf9a FT |
1711 | * Wait for the last byte to be sent. If REQ is being asserted for |
1712 | * the byte we're interested, we'll ACK it and it will go false. | |
1da177e4 | 1713 | */ |
55181be8 FT |
1714 | if (NCR5380_poll_politely2(instance, |
1715 | BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, | |
1716 | BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { | |
438af51c | 1717 | result = -1; |
55181be8 | 1718 | shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); |
1da177e4 LT |
1719 | } |
1720 | } | |
1da177e4 | 1721 | } |
8053b0ee FT |
1722 | |
1723 | NCR5380_dma_complete(instance); | |
438af51c | 1724 | return result; |
1da177e4 | 1725 | } |
1da177e4 LT |
1726 | |
1727 | /* | |
1728 | * Function : NCR5380_information_transfer (struct Scsi_Host *instance) | |
1729 | * | |
aff0cf9a | 1730 | * Purpose : run through the various SCSI phases and do as the target |
594d4ba3 FT |
1731 | * directs us to. Operates on the currently connected command, |
1732 | * instance->connected. | |
1da177e4 LT |
1733 | * |
1734 | * Inputs : instance, instance for which we are doing commands | |
1735 | * | |
aff0cf9a | 1736 | * Side effects : SCSI things happen, the disconnected queue will be |
594d4ba3 FT |
1737 | * modified if a command disconnects, *instance->connected will |
1738 | * change. | |
1da177e4 | 1739 | * |
aff0cf9a | 1740 | * XXX Note : we need to watch for bus free or a reset condition here |
594d4ba3 | 1741 | * to recover from an unexpected bus free condition. |
1da177e4 LT |
1742 | */ |
1743 | ||
0d2cf867 FT |
1744 | static void NCR5380_information_transfer(struct Scsi_Host *instance) |
1745 | { | |
e8a60144 | 1746 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1747 | unsigned char msgout = NOP; |
1748 | int sink = 0; | |
1749 | int len; | |
1da177e4 | 1750 | int transfersize; |
1da177e4 LT |
1751 | unsigned char *data; |
1752 | unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; | |
11d2f63b | 1753 | struct scsi_cmnd *cmd; |
1da177e4 | 1754 | |
e9db3198 FT |
1755 | #ifdef SUN3_SCSI_VME |
1756 | dregs->csr |= CSR_INTR; | |
1757 | #endif | |
1758 | ||
11d2f63b | 1759 | while ((cmd = hostdata->connected)) { |
32b26a10 FT |
1760 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1761 | ||
1da177e4 LT |
1762 | tmp = NCR5380_read(STATUS_REG); |
1763 | /* We only have a valid SCSI phase when REQ is asserted */ | |
1764 | if (tmp & SR_REQ) { | |
1765 | phase = (tmp & PHASE_MASK); | |
1766 | if (phase != old_phase) { | |
1767 | old_phase = phase; | |
1768 | NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); | |
1769 | } | |
e9db3198 FT |
1770 | #ifdef CONFIG_SUN3 |
1771 | if (phase == PHASE_CMDOUT) { | |
1772 | void *d; | |
1773 | unsigned long count; | |
1774 | ||
1775 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
1776 | count = cmd->SCp.buffer->length; | |
1777 | d = sg_virt(cmd->SCp.buffer); | |
1778 | } else { | |
1779 | count = cmd->SCp.this_residual; | |
1780 | d = cmd->SCp.ptr; | |
1781 | } | |
1782 | ||
1783 | if (sun3_dma_setup_done != cmd && | |
1784 | sun3scsi_dma_xfer_len(count, cmd) > 0) { | |
1785 | sun3scsi_dma_setup(instance, d, count, | |
1786 | rq_data_dir(cmd->request)); | |
1787 | sun3_dma_setup_done = cmd; | |
1788 | } | |
1789 | #ifdef SUN3_SCSI_VME | |
1790 | dregs->csr |= CSR_INTR; | |
1791 | #endif | |
1792 | } | |
1793 | #endif /* CONFIG_SUN3 */ | |
1794 | ||
1da177e4 LT |
1795 | if (sink && (phase != PHASE_MSGOUT)) { |
1796 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1797 | ||
3d07d22b FT |
1798 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | |
1799 | ICR_ASSERT_ACK); | |
0d2cf867 FT |
1800 | while (NCR5380_read(STATUS_REG) & SR_REQ) |
1801 | ; | |
3d07d22b FT |
1802 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1803 | ICR_ASSERT_ATN); | |
1da177e4 LT |
1804 | sink = 0; |
1805 | continue; | |
1806 | } | |
0d2cf867 | 1807 | |
1da177e4 | 1808 | switch (phase) { |
1da177e4 LT |
1809 | case PHASE_DATAOUT: |
1810 | #if (NDEBUG & NDEBUG_NO_DATAOUT) | |
6a6ff4ac | 1811 | shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); |
1da177e4 LT |
1812 | sink = 1; |
1813 | do_abort(instance); | |
1814 | cmd->result = DID_ERROR << 16; | |
677e0194 | 1815 | complete_cmd(instance, cmd); |
dc183965 | 1816 | hostdata->connected = NULL; |
1da177e4 LT |
1817 | return; |
1818 | #endif | |
bf1a0c6f | 1819 | case PHASE_DATAIN: |
aff0cf9a | 1820 | /* |
1da177e4 LT |
1821 | * If there is no room left in the current buffer in the |
1822 | * scatter-gather list, move onto the next one. | |
1823 | */ | |
1824 | ||
1825 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
1826 | ++cmd->SCp.buffer; | |
1827 | --cmd->SCp.buffers_residual; | |
1828 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
45711f1a | 1829 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
b746545f FT |
1830 | dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n", |
1831 | cmd->SCp.this_residual, | |
1832 | cmd->SCp.buffers_residual); | |
1da177e4 | 1833 | } |
0d2cf867 | 1834 | |
1da177e4 | 1835 | /* |
aff0cf9a | 1836 | * The preferred transfer method is going to be |
1da177e4 LT |
1837 | * PSEUDO-DMA for systems that are strictly PIO, |
1838 | * since we can let the hardware do the handshaking. | |
1839 | * | |
1840 | * For this to work, we need to know the transfersize | |
1841 | * ahead of time, since the pseudo-DMA code will sit | |
1842 | * in an unconditional loop. | |
1843 | */ | |
1844 | ||
ff3d4578 | 1845 | transfersize = 0; |
7e9ec8d9 | 1846 | if (!cmd->device->borken) |
ff3d4578 FT |
1847 | transfersize = NCR5380_dma_xfer_len(instance, cmd, phase); |
1848 | ||
438af51c | 1849 | if (transfersize > 0) { |
1da177e4 | 1850 | len = transfersize; |
0d2cf867 FT |
1851 | if (NCR5380_transfer_dma(instance, &phase, |
1852 | &len, (unsigned char **)&cmd->SCp.ptr)) { | |
1da177e4 | 1853 | /* |
0d2cf867 FT |
1854 | * If the watchdog timer fires, all future |
1855 | * accesses to this device will use the | |
1856 | * polled-IO. | |
1da177e4 | 1857 | */ |
017560fc | 1858 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 | 1859 | "switching to slow handshake\n"); |
1da177e4 | 1860 | cmd->device->borken = 1; |
1da177e4 LT |
1861 | sink = 1; |
1862 | do_abort(instance); | |
1863 | cmd->result = DID_ERROR << 16; | |
1da177e4 | 1864 | /* XXX - need to source or sink data here, as appropriate */ |
8053b0ee | 1865 | } |
f825e40b | 1866 | } else { |
1678847e FT |
1867 | /* Break up transfer into 3 ms chunks, |
1868 | * presuming 6 accesses per handshake. | |
1869 | */ | |
1870 | transfersize = min((unsigned long)cmd->SCp.this_residual, | |
1871 | hostdata->accesses_per_ms / 2); | |
1872 | len = transfersize; | |
1873 | NCR5380_transfer_pio(instance, &phase, &len, | |
3d07d22b | 1874 | (unsigned char **)&cmd->SCp.ptr); |
1678847e | 1875 | cmd->SCp.this_residual -= transfersize - len; |
11d2f63b | 1876 | } |
e9db3198 FT |
1877 | #ifdef CONFIG_SUN3 |
1878 | if (sun3_dma_setup_done == cmd) | |
1879 | sun3_dma_setup_done = NULL; | |
1880 | #endif | |
1678847e | 1881 | return; |
1da177e4 LT |
1882 | case PHASE_MSGIN: |
1883 | len = 1; | |
1884 | data = &tmp; | |
1885 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1886 | cmd->SCp.Message = tmp; | |
1887 | ||
1888 | switch (tmp) { | |
1da177e4 LT |
1889 | case ABORT: |
1890 | case COMMAND_COMPLETE: | |
1891 | /* Accept message by clearing ACK */ | |
1892 | sink = 1; | |
1893 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
0d3d9a42 FT |
1894 | dsprintk(NDEBUG_QUEUES, instance, |
1895 | "COMMAND COMPLETE %p target %d lun %llu\n", | |
1896 | cmd, scmd_id(cmd), cmd->device->lun); | |
1897 | ||
1da177e4 | 1898 | hostdata->connected = NULL; |
1da177e4 | 1899 | |
f27db8eb FT |
1900 | cmd->result &= ~0xffff; |
1901 | cmd->result |= cmd->SCp.Status; | |
1902 | cmd->result |= cmd->SCp.Message << 8; | |
28424d3a | 1903 | |
f27db8eb | 1904 | if (cmd->cmnd[0] == REQUEST_SENSE) |
677e0194 | 1905 | complete_cmd(instance, cmd); |
f27db8eb FT |
1906 | else { |
1907 | if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || | |
1908 | cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { | |
1909 | dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", | |
1910 | cmd); | |
1911 | list_add_tail(&ncmd->list, | |
1912 | &hostdata->autosense); | |
1913 | } else | |
1914 | complete_cmd(instance, cmd); | |
1da177e4 LT |
1915 | } |
1916 | ||
aff0cf9a FT |
1917 | /* |
1918 | * Restore phase bits to 0 so an interrupted selection, | |
1da177e4 LT |
1919 | * arbitration can resume. |
1920 | */ | |
1921 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
72064a78 FT |
1922 | |
1923 | /* Enable reselect interrupts */ | |
1924 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
52d3e561 FT |
1925 | |
1926 | maybe_release_dma_irq(instance); | |
1da177e4 LT |
1927 | return; |
1928 | case MESSAGE_REJECT: | |
1929 | /* Accept message by clearing ACK */ | |
1930 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1931 | switch (hostdata->last_message) { | |
1932 | case HEAD_OF_QUEUE_TAG: | |
1933 | case ORDERED_QUEUE_TAG: | |
1934 | case SIMPLE_QUEUE_TAG: | |
1935 | cmd->device->simple_tags = 0; | |
9cb78c16 | 1936 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 LT |
1937 | break; |
1938 | default: | |
1939 | break; | |
1940 | } | |
340b9612 | 1941 | break; |
0d2cf867 FT |
1942 | case DISCONNECT: |
1943 | /* Accept message by clearing ACK */ | |
1944 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1945 | hostdata->connected = NULL; | |
1946 | list_add(&ncmd->list, &hostdata->disconnected); | |
1947 | dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, | |
1948 | instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", | |
1949 | cmd, scmd_id(cmd), cmd->device->lun); | |
0d3d9a42 | 1950 | |
0d2cf867 FT |
1951 | /* |
1952 | * Restore phase bits to 0 so an interrupted selection, | |
1953 | * arbitration can resume. | |
1954 | */ | |
1955 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1da177e4 | 1956 | |
0d2cf867 FT |
1957 | /* Enable reselect interrupts */ |
1958 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
e9db3198 FT |
1959 | #ifdef SUN3_SCSI_VME |
1960 | dregs->csr |= CSR_DMA_ENABLE; | |
1961 | #endif | |
0d2cf867 | 1962 | return; |
aff0cf9a | 1963 | /* |
1da177e4 | 1964 | * The SCSI data pointer is *IMPLICITLY* saved on a disconnect |
aff0cf9a | 1965 | * operation, in violation of the SCSI spec so we can safely |
1da177e4 LT |
1966 | * ignore SAVE/RESTORE pointers calls. |
1967 | * | |
aff0cf9a | 1968 | * Unfortunately, some disks violate the SCSI spec and |
1da177e4 | 1969 | * don't issue the required SAVE_POINTERS message before |
aff0cf9a | 1970 | * disconnecting, and we have to break spec to remain |
1da177e4 LT |
1971 | * compatible. |
1972 | */ | |
1973 | case SAVE_POINTERS: | |
1974 | case RESTORE_POINTERS: | |
1975 | /* Accept message by clearing ACK */ | |
1976 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1977 | break; | |
1978 | case EXTENDED_MESSAGE: | |
c16df32e FT |
1979 | /* |
1980 | * Start the message buffer with the EXTENDED_MESSAGE | |
1981 | * byte, since spi_print_msg() wants the whole thing. | |
1982 | */ | |
1da177e4 LT |
1983 | extended_msg[0] = EXTENDED_MESSAGE; |
1984 | /* Accept first byte by clearing ACK */ | |
1985 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
11d2f63b FT |
1986 | |
1987 | spin_unlock_irq(&hostdata->lock); | |
1988 | ||
b746545f | 1989 | dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); |
1da177e4 LT |
1990 | |
1991 | len = 2; | |
1992 | data = extended_msg + 1; | |
1993 | phase = PHASE_MSGIN; | |
1994 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
1995 | dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", |
1996 | (int)extended_msg[1], | |
1997 | (int)extended_msg[2]); | |
1da177e4 | 1998 | |
e0783ed3 FT |
1999 | if (!len && extended_msg[1] > 0 && |
2000 | extended_msg[1] <= sizeof(extended_msg) - 2) { | |
1da177e4 LT |
2001 | /* Accept third byte by clearing ACK */ |
2002 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2003 | len = extended_msg[1] - 1; | |
2004 | data = extended_msg + 3; | |
2005 | phase = PHASE_MSGIN; | |
2006 | ||
2007 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
2008 | dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", |
2009 | len); | |
1da177e4 LT |
2010 | |
2011 | switch (extended_msg[2]) { | |
2012 | case EXTENDED_SDTR: | |
2013 | case EXTENDED_WDTR: | |
2014 | case EXTENDED_MODIFY_DATA_POINTER: | |
2015 | case EXTENDED_EXTENDED_IDENTIFY: | |
2016 | tmp = 0; | |
2017 | } | |
2018 | } else if (len) { | |
6a6ff4ac | 2019 | shost_printk(KERN_ERR, instance, "error receiving extended message\n"); |
1da177e4 LT |
2020 | tmp = 0; |
2021 | } else { | |
6a6ff4ac FT |
2022 | shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", |
2023 | extended_msg[2], extended_msg[1]); | |
1da177e4 LT |
2024 | tmp = 0; |
2025 | } | |
11d2f63b FT |
2026 | |
2027 | spin_lock_irq(&hostdata->lock); | |
2028 | if (!hostdata->connected) | |
2029 | return; | |
2030 | ||
1da177e4 LT |
2031 | /* Fall through to reject message */ |
2032 | ||
aff0cf9a FT |
2033 | /* |
2034 | * If we get something weird that we aren't expecting, | |
1da177e4 LT |
2035 | * reject it. |
2036 | */ | |
2037 | default: | |
2038 | if (!tmp) { | |
6a6ff4ac | 2039 | shost_printk(KERN_ERR, instance, "rejecting message "); |
1abfd370 | 2040 | spi_print_msg(extended_msg); |
1da177e4 LT |
2041 | printk("\n"); |
2042 | } else if (tmp != EXTENDED_MESSAGE) | |
017560fc | 2043 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 FT |
2044 | "rejecting unknown message %02x\n", |
2045 | tmp); | |
1da177e4 | 2046 | else |
017560fc | 2047 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 FT |
2048 | "rejecting unknown extended message code %02x, length %d\n", |
2049 | extended_msg[1], extended_msg[0]); | |
1da177e4 LT |
2050 | |
2051 | msgout = MESSAGE_REJECT; | |
2052 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
2053 | break; | |
0d2cf867 | 2054 | } /* switch (tmp) */ |
1da177e4 LT |
2055 | break; |
2056 | case PHASE_MSGOUT: | |
2057 | len = 1; | |
2058 | data = &msgout; | |
2059 | hostdata->last_message = msgout; | |
2060 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2061 | if (msgout == ABORT) { | |
1da177e4 LT |
2062 | hostdata->connected = NULL; |
2063 | cmd->result = DID_ERROR << 16; | |
677e0194 | 2064 | complete_cmd(instance, cmd); |
52d3e561 | 2065 | maybe_release_dma_irq(instance); |
1da177e4 LT |
2066 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
2067 | return; | |
2068 | } | |
2069 | msgout = NOP; | |
2070 | break; | |
2071 | case PHASE_CMDOUT: | |
2072 | len = cmd->cmd_len; | |
2073 | data = cmd->cmnd; | |
aff0cf9a FT |
2074 | /* |
2075 | * XXX for performance reasons, on machines with a | |
2076 | * PSEUDO-DMA architecture we should probably | |
2077 | * use the dma transfer function. | |
1da177e4 LT |
2078 | */ |
2079 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1da177e4 LT |
2080 | break; |
2081 | case PHASE_STATIN: | |
2082 | len = 1; | |
2083 | data = &tmp; | |
2084 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2085 | cmd->SCp.Status = tmp; | |
2086 | break; | |
2087 | default: | |
6a6ff4ac | 2088 | shost_printk(KERN_ERR, instance, "unknown phase\n"); |
4dde8f7d | 2089 | NCR5380_dprint(NDEBUG_ANY, instance); |
0d2cf867 | 2090 | } /* switch(phase) */ |
686f3990 | 2091 | } else { |
11d2f63b | 2092 | spin_unlock_irq(&hostdata->lock); |
686f3990 | 2093 | NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 2094 | spin_lock_irq(&hostdata->lock); |
1da177e4 | 2095 | } |
11d2f63b | 2096 | } |
1da177e4 LT |
2097 | } |
2098 | ||
2099 | /* | |
2100 | * Function : void NCR5380_reselect (struct Scsi_Host *instance) | |
2101 | * | |
aff0cf9a | 2102 | * Purpose : does reselection, initializing the instance->connected |
594d4ba3 FT |
2103 | * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q |
2104 | * nexus has been reestablished, | |
aff0cf9a | 2105 | * |
1da177e4 | 2106 | * Inputs : instance - this instance of the NCR5380. |
1da177e4 LT |
2107 | */ |
2108 | ||
0d2cf867 FT |
2109 | static void NCR5380_reselect(struct Scsi_Host *instance) |
2110 | { | |
e8a60144 | 2111 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 2112 | unsigned char target_mask; |
e9db3198 | 2113 | unsigned char lun; |
1da177e4 | 2114 | unsigned char msg[3]; |
32b26a10 FT |
2115 | struct NCR5380_cmd *ncmd; |
2116 | struct scsi_cmnd *tmp; | |
1da177e4 LT |
2117 | |
2118 | /* | |
2119 | * Disable arbitration, etc. since the host adapter obviously | |
2120 | * lost, and tell an interrupted NCR5380_select() to restart. | |
2121 | */ | |
2122 | ||
2123 | NCR5380_write(MODE_REG, MR_BASE); | |
1da177e4 LT |
2124 | |
2125 | target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); | |
b746545f FT |
2126 | |
2127 | dsprintk(NDEBUG_RESELECTION, instance, "reselect\n"); | |
1da177e4 | 2128 | |
aff0cf9a | 2129 | /* |
1da177e4 LT |
2130 | * At this point, we have detected that our SCSI ID is on the bus, |
2131 | * SEL is true and BSY was false for at least one bus settle delay | |
2132 | * (400 ns). | |
2133 | * | |
2134 | * We must assert BSY ourselves, until the target drops the SEL | |
2135 | * signal. | |
2136 | */ | |
2137 | ||
2138 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); | |
72064a78 FT |
2139 | if (NCR5380_poll_politely(instance, |
2140 | STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { | |
2141 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2142 | return; | |
2143 | } | |
1da177e4 LT |
2144 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2145 | ||
2146 | /* | |
2147 | * Wait for target to go into MSGIN. | |
1da177e4 LT |
2148 | */ |
2149 | ||
1cc160e1 | 2150 | if (NCR5380_poll_politely(instance, |
72064a78 FT |
2151 | STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { |
2152 | do_abort(instance); | |
2153 | return; | |
2154 | } | |
1da177e4 | 2155 | |
e9db3198 FT |
2156 | #ifdef CONFIG_SUN3 |
2157 | /* acknowledge toggle to MSGIN */ | |
2158 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); | |
1da177e4 | 2159 | |
e9db3198 FT |
2160 | /* peek at the byte without really hitting the bus */ |
2161 | msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
2162 | #else | |
2163 | { | |
2164 | int len = 1; | |
2165 | unsigned char *data = msg; | |
2166 | unsigned char phase = PHASE_MSGIN; | |
2167 | ||
2168 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2169 | ||
2170 | if (len) { | |
2171 | do_abort(instance); | |
2172 | return; | |
2173 | } | |
72064a78 | 2174 | } |
e9db3198 | 2175 | #endif /* CONFIG_SUN3 */ |
72064a78 | 2176 | |
1da177e4 | 2177 | if (!(msg[0] & 0x80)) { |
72064a78 | 2178 | shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); |
1abfd370 | 2179 | spi_print_msg(msg); |
72064a78 FT |
2180 | printk("\n"); |
2181 | do_abort(instance); | |
2182 | return; | |
2183 | } | |
2184 | lun = msg[0] & 0x07; | |
1da177e4 | 2185 | |
72064a78 FT |
2186 | /* |
2187 | * We need to add code for SCSI-II to track which devices have | |
2188 | * I_T_L_Q nexuses established, and which have simple I_T_L | |
2189 | * nexuses so we can chose to do additional data transfer. | |
2190 | */ | |
1da177e4 | 2191 | |
72064a78 FT |
2192 | /* |
2193 | * Find the command corresponding to the I_T_L or I_T_L_Q nexus we | |
2194 | * just reestablished, and remove it from the disconnected queue. | |
2195 | */ | |
1da177e4 | 2196 | |
32b26a10 FT |
2197 | tmp = NULL; |
2198 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2199 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2200 | ||
2201 | if (target_mask == (1 << scmd_id(cmd)) && | |
2202 | lun == (u8)cmd->device->lun) { | |
2203 | list_del(&ncmd->list); | |
2204 | tmp = cmd; | |
72064a78 | 2205 | break; |
1da177e4 LT |
2206 | } |
2207 | } | |
0d3d9a42 FT |
2208 | |
2209 | if (tmp) { | |
2210 | dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, | |
2211 | "reselect: removed %p from disconnected queue\n", tmp); | |
2212 | } else { | |
72064a78 FT |
2213 | shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", |
2214 | target_mask, lun); | |
2215 | /* | |
0d2cf867 FT |
2216 | * Since we have an established nexus that we can't do anything |
2217 | * with, we must abort it. | |
72064a78 | 2218 | */ |
1da177e4 | 2219 | do_abort(instance); |
72064a78 | 2220 | return; |
1da177e4 | 2221 | } |
72064a78 | 2222 | |
e9db3198 FT |
2223 | #ifdef CONFIG_SUN3 |
2224 | { | |
2225 | void *d; | |
2226 | unsigned long count; | |
2227 | ||
2228 | if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) { | |
2229 | count = tmp->SCp.buffer->length; | |
2230 | d = sg_virt(tmp->SCp.buffer); | |
2231 | } else { | |
2232 | count = tmp->SCp.this_residual; | |
2233 | d = tmp->SCp.ptr; | |
2234 | } | |
2235 | ||
2236 | if (sun3_dma_setup_done != tmp && | |
2237 | sun3scsi_dma_xfer_len(count, tmp) > 0) { | |
2238 | sun3scsi_dma_setup(instance, d, count, | |
2239 | rq_data_dir(tmp->request)); | |
2240 | sun3_dma_setup_done = tmp; | |
2241 | } | |
2242 | } | |
2243 | ||
2244 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
2245 | #endif /* CONFIG_SUN3 */ | |
2246 | ||
72064a78 FT |
2247 | /* Accept message by clearing ACK */ |
2248 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2249 | ||
2250 | hostdata->connected = tmp; | |
c4ec6f92 FT |
2251 | dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", |
2252 | scmd_id(tmp), tmp->device->lun); | |
1da177e4 LT |
2253 | } |
2254 | ||
8b00c3d5 FT |
2255 | /** |
2256 | * list_find_cmd - test for presence of a command in a linked list | |
2257 | * @haystack: list of commands | |
2258 | * @needle: command to search for | |
2259 | */ | |
2260 | ||
2261 | static bool list_find_cmd(struct list_head *haystack, | |
2262 | struct scsi_cmnd *needle) | |
2263 | { | |
2264 | struct NCR5380_cmd *ncmd; | |
2265 | ||
2266 | list_for_each_entry(ncmd, haystack, list) | |
2267 | if (NCR5380_to_scmd(ncmd) == needle) | |
2268 | return true; | |
2269 | return false; | |
2270 | } | |
2271 | ||
2272 | /** | |
2273 | * list_remove_cmd - remove a command from linked list | |
2274 | * @haystack: list of commands | |
2275 | * @needle: command to remove | |
2276 | */ | |
2277 | ||
2278 | static bool list_del_cmd(struct list_head *haystack, | |
2279 | struct scsi_cmnd *needle) | |
2280 | { | |
2281 | if (list_find_cmd(haystack, needle)) { | |
2282 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); | |
2283 | ||
2284 | list_del(&ncmd->list); | |
2285 | return true; | |
2286 | } | |
2287 | return false; | |
2288 | } | |
2289 | ||
2290 | /** | |
2291 | * NCR5380_abort - scsi host eh_abort_handler() method | |
2292 | * @cmd: the command to be aborted | |
2293 | * | |
2294 | * Try to abort a given command by removing it from queues and/or sending | |
2295 | * the target an abort message. This may not succeed in causing a target | |
2296 | * to abort the command. Nonetheless, the low-level driver must forget about | |
2297 | * the command because the mid-layer reclaims it and it may be re-issued. | |
2298 | * | |
2299 | * The normal path taken by a command is as follows. For EH we trace this | |
2300 | * same path to locate and abort the command. | |
2301 | * | |
2302 | * unissued -> selecting -> [unissued -> selecting ->]... connected -> | |
2303 | * [disconnected -> connected ->]... | |
2304 | * [autosense -> connected ->] done | |
2305 | * | |
8b00c3d5 FT |
2306 | * If cmd was not found at all then presumably it has already been completed, |
2307 | * in which case return SUCCESS to try to avoid further EH measures. | |
dc183965 | 2308 | * |
8b00c3d5 | 2309 | * If the command has not completed yet, we must not fail to find it. |
dc183965 FT |
2310 | * We have no option but to forget the aborted command (even if it still |
2311 | * lacks sense data). The mid-layer may re-issue a command that is in error | |
2312 | * recovery (see scsi_send_eh_cmnd), but the logic and data structures in | |
2313 | * this driver are such that a command can appear on one queue only. | |
71a00593 FT |
2314 | * |
2315 | * The lock protects driver data structures, but EH handlers also use it | |
2316 | * to serialize their own execution and prevent their own re-entry. | |
1da177e4 LT |
2317 | */ |
2318 | ||
710ddd0d FT |
2319 | static int NCR5380_abort(struct scsi_cmnd *cmd) |
2320 | { | |
1da177e4 | 2321 | struct Scsi_Host *instance = cmd->device->host; |
e8a60144 | 2322 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
11d2f63b | 2323 | unsigned long flags; |
8b00c3d5 | 2324 | int result = SUCCESS; |
1fa6b5fb | 2325 | |
11d2f63b FT |
2326 | spin_lock_irqsave(&hostdata->lock, flags); |
2327 | ||
32b26a10 | 2328 | #if (NDEBUG & NDEBUG_ANY) |
8b00c3d5 | 2329 | scmd_printk(KERN_INFO, cmd, __func__); |
32b26a10 | 2330 | #endif |
e5c3fddf FT |
2331 | NCR5380_dprint(NDEBUG_ANY, instance); |
2332 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
1da177e4 | 2333 | |
8b00c3d5 FT |
2334 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2335 | dsprintk(NDEBUG_ABORT, instance, | |
2336 | "abort: removed %p from issue queue\n", cmd); | |
2337 | cmd->result = DID_ABORT << 16; | |
2338 | cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ | |
dc183965 | 2339 | goto out; |
8b00c3d5 FT |
2340 | } |
2341 | ||
707d62b3 FT |
2342 | if (hostdata->selecting == cmd) { |
2343 | dsprintk(NDEBUG_ABORT, instance, | |
2344 | "abort: cmd %p == selecting\n", cmd); | |
2345 | hostdata->selecting = NULL; | |
2346 | cmd->result = DID_ABORT << 16; | |
2347 | complete_cmd(instance, cmd); | |
2348 | goto out; | |
2349 | } | |
2350 | ||
8b00c3d5 FT |
2351 | if (list_del_cmd(&hostdata->disconnected, cmd)) { |
2352 | dsprintk(NDEBUG_ABORT, instance, | |
2353 | "abort: removed %p from disconnected list\n", cmd); | |
71a00593 FT |
2354 | /* Can't call NCR5380_select() and send ABORT because that |
2355 | * means releasing the lock. Need a bus reset. | |
2356 | */ | |
dc183965 FT |
2357 | set_host_byte(cmd, DID_ERROR); |
2358 | complete_cmd(instance, cmd); | |
71a00593 FT |
2359 | result = FAILED; |
2360 | goto out; | |
8b00c3d5 FT |
2361 | } |
2362 | ||
2363 | if (hostdata->connected == cmd) { | |
2364 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2365 | hostdata->connected = NULL; | |
8b00c3d5 | 2366 | hostdata->dma_len = 0; |
8b00c3d5 FT |
2367 | if (do_abort(instance)) { |
2368 | set_host_byte(cmd, DID_ERROR); | |
2369 | complete_cmd(instance, cmd); | |
2370 | result = FAILED; | |
2371 | goto out; | |
2372 | } | |
2373 | set_host_byte(cmd, DID_ABORT); | |
dc183965 FT |
2374 | complete_cmd(instance, cmd); |
2375 | goto out; | |
2376 | } | |
2377 | ||
2378 | if (list_del_cmd(&hostdata->autosense, cmd)) { | |
2379 | dsprintk(NDEBUG_ABORT, instance, | |
2380 | "abort: removed %p from sense queue\n", cmd); | |
2381 | set_host_byte(cmd, DID_ERROR); | |
8b00c3d5 FT |
2382 | complete_cmd(instance, cmd); |
2383 | } | |
2384 | ||
2385 | out: | |
2386 | if (result == FAILED) | |
2387 | dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); | |
2388 | else | |
2389 | dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); | |
2390 | ||
2391 | queue_work(hostdata->work_q, &hostdata->main_task); | |
52d3e561 | 2392 | maybe_release_dma_irq(instance); |
11d2f63b | 2393 | spin_unlock_irqrestore(&hostdata->lock, flags); |
32b26a10 | 2394 | |
8b00c3d5 | 2395 | return result; |
1da177e4 LT |
2396 | } |
2397 | ||
2398 | ||
3be1b3ea FT |
2399 | /** |
2400 | * NCR5380_bus_reset - reset the SCSI bus | |
2401 | * @cmd: SCSI command undergoing EH | |
1da177e4 | 2402 | * |
3be1b3ea | 2403 | * Returns SUCCESS |
1da177e4 LT |
2404 | */ |
2405 | ||
710ddd0d | 2406 | static int NCR5380_bus_reset(struct scsi_cmnd *cmd) |
68b3aa7c JG |
2407 | { |
2408 | struct Scsi_Host *instance = cmd->device->host; | |
11d2f63b | 2409 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
62717f53 | 2410 | int i; |
11d2f63b | 2411 | unsigned long flags; |
62717f53 | 2412 | struct NCR5380_cmd *ncmd; |
68b3aa7c | 2413 | |
11d2f63b | 2414 | spin_lock_irqsave(&hostdata->lock, flags); |
3be1b3ea FT |
2415 | |
2416 | #if (NDEBUG & NDEBUG_ANY) | |
62717f53 | 2417 | scmd_printk(KERN_INFO, cmd, __func__); |
3be1b3ea | 2418 | #endif |
e5c3fddf FT |
2419 | NCR5380_dprint(NDEBUG_ANY, instance); |
2420 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
68b3aa7c | 2421 | |
68b3aa7c | 2422 | do_reset(instance); |
3be1b3ea | 2423 | |
62717f53 FT |
2424 | /* reset NCR registers */ |
2425 | NCR5380_write(MODE_REG, MR_BASE); | |
2426 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
2427 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2428 | ||
2429 | /* After the reset, there are no more connected or disconnected commands | |
2430 | * and no busy units; so clear the low-level status here to avoid | |
2431 | * conflicts when the mid-level code tries to wake up the affected | |
2432 | * commands! | |
2433 | */ | |
2434 | ||
1884c283 FT |
2435 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2436 | cmd->result = DID_RESET << 16; | |
2437 | cmd->scsi_done(cmd); | |
2438 | } | |
2439 | ||
2440 | if (hostdata->selecting) { | |
2441 | hostdata->selecting->result = DID_RESET << 16; | |
2442 | complete_cmd(instance, hostdata->selecting); | |
2443 | hostdata->selecting = NULL; | |
2444 | } | |
62717f53 FT |
2445 | |
2446 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2447 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2448 | ||
2449 | set_host_byte(cmd, DID_RESET); | |
2450 | cmd->scsi_done(cmd); | |
2451 | } | |
1884c283 | 2452 | INIT_LIST_HEAD(&hostdata->disconnected); |
62717f53 FT |
2453 | |
2454 | list_for_each_entry(ncmd, &hostdata->autosense, list) { | |
2455 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2456 | ||
2457 | set_host_byte(cmd, DID_RESET); | |
2458 | cmd->scsi_done(cmd); | |
2459 | } | |
1884c283 | 2460 | INIT_LIST_HEAD(&hostdata->autosense); |
62717f53 FT |
2461 | |
2462 | if (hostdata->connected) { | |
2463 | set_host_byte(hostdata->connected, DID_RESET); | |
2464 | complete_cmd(instance, hostdata->connected); | |
2465 | hostdata->connected = NULL; | |
2466 | } | |
2467 | ||
62717f53 FT |
2468 | for (i = 0; i < 8; ++i) |
2469 | hostdata->busy[i] = 0; | |
62717f53 | 2470 | hostdata->dma_len = 0; |
62717f53 FT |
2471 | |
2472 | queue_work(hostdata->work_q, &hostdata->main_task); | |
52d3e561 | 2473 | maybe_release_dma_irq(instance); |
11d2f63b | 2474 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1da177e4 | 2475 | |
1da177e4 LT |
2476 | return SUCCESS; |
2477 | } |