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aff0cf9a 1/*
1da177e4 2 * NCR 5380 generic driver routines. These should make it *trivial*
594d4ba3
FT
3 * to implement 5380 SCSI drivers under Linux with a non-trantor
4 * architecture.
1da177e4 5 *
594d4ba3 6 * Note that these routines also work with NR53c400 family chips.
1da177e4
LT
7 *
8 * Copyright 1993, Drew Eckhardt
594d4ba3
FT
9 * Visionary Computing
10 * (Unix and Linux consulting and custom programming)
11 * drew@colorado.edu
12 * +1 (303) 666-5836
1da177e4 13 *
aff0cf9a 14 * For more information, please consult
1da177e4
LT
15 *
16 * NCR 5380 Family
17 * SCSI Protocol Controller
18 * Databook
19 *
20 * NCR Microelectronics
21 * 1635 Aeroplaza Drive
22 * Colorado Springs, CO 80916
23 * 1+ (719) 578-3400
24 * 1+ (800) 334-5454
25 */
26
27/*
c16df32e
FT
28 * With contributions from Ray Van Tassle, Ingmar Baumgart,
29 * Ronald van Cuijlenborg, Alan Cox and others.
1da177e4
LT
30 */
31
52d3e561
FT
32/* Ported to Atari by Roman Hodek and others. */
33
e9db3198
FT
34/* Adapted for the Sun 3 by Sam Creasey. */
35
1da177e4
LT
36/*
37 * Design
38 *
aff0cf9a 39 * This is a generic 5380 driver. To use it on a different platform,
1da177e4 40 * one simply writes appropriate system specific macros (ie, data
aff0cf9a 41 * transfer - some PC's will use the I/O bus, 68K's must use
1da177e4
LT
42 * memory mapped) and drops this file in their 'C' wrapper.
43 *
aff0cf9a 44 * As far as command queueing, two queues are maintained for
1da177e4 45 * each 5380 in the system - commands that haven't been issued yet,
aff0cf9a
FT
46 * and commands that are currently executing. This means that an
47 * unlimited number of commands may be queued, letting
48 * more commands propagate from the higher driver levels giving higher
49 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
50 * allowing multiple commands to propagate all the way to a SCSI-II device
1da177e4
LT
51 * while a command is already executing.
52 *
53 *
aff0cf9a 54 * Issues specific to the NCR5380 :
1da177e4 55 *
aff0cf9a
FT
56 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
57 * piece of hardware that requires you to sit in a loop polling for
58 * the REQ signal as long as you are connected. Some devices are
59 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
686f3990 60 * while doing long seek operations. [...] These
1da177e4
LT
61 * broken devices are the exception rather than the rule and I'd rather
62 * spend my time optimizing for the normal case.
63 *
64 * Architecture :
65 *
66 * At the heart of the design is a coroutine, NCR5380_main,
67 * which is started from a workqueue for each NCR5380 host in the
68 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
69 * removing the commands from the issue queue and calling
aff0cf9a 70 * NCR5380_select() if a nexus is not established.
1da177e4
LT
71 *
72 * Once a nexus is established, the NCR5380_information_transfer()
73 * phase goes through the various phases as instructed by the target.
74 * if the target goes into MSG IN and sends a DISCONNECT message,
75 * the command structure is placed into the per instance disconnected
aff0cf9a 76 * queue, and NCR5380_main tries to find more work. If the target is
1da177e4
LT
77 * idle for too long, the system will try to sleep.
78 *
79 * If a command has disconnected, eventually an interrupt will trigger,
80 * calling NCR5380_intr() which will in turn call NCR5380_reselect
81 * to reestablish a nexus. This will run main if necessary.
82 *
aff0cf9a 83 * On command termination, the done function will be called as
1da177e4
LT
84 * appropriate.
85 *
aff0cf9a 86 * SCSI pointers are maintained in the SCp field of SCSI command
1da177e4
LT
87 * structures, being initialized after the command is connected
88 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
89 * Note that in violation of the standard, an implicit SAVE POINTERS operation
90 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
91 */
92
93/*
94 * Using this file :
95 * This file a skeleton Linux SCSI driver for the NCR 5380 series
aff0cf9a 96 * of chips. To use it, you write an architecture specific functions
1da177e4
LT
97 * and macros and include this file in your driver.
98 *
aff0cf9a 99 * These macros control options :
1da177e4 100 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
594d4ba3 101 * for commands that return with a CHECK CONDITION status.
1da177e4
LT
102 *
103 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
594d4ba3 104 * transceivers.
1da177e4 105 *
1da177e4
LT
106 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
107 *
8053b0ee
FT
108 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
109 *
1da177e4 110 * These macros MUST be defined :
aff0cf9a 111 *
1da177e4
LT
112 * NCR5380_read(register) - read from the specified register
113 *
aff0cf9a 114 * NCR5380_write(register, value) - write to the specific register
1da177e4 115 *
aff0cf9a 116 * NCR5380_implementation_fields - additional fields needed for this
594d4ba3 117 * specific implementation of the NCR5380
1da177e4
LT
118 *
119 * Either real DMA *or* pseudo DMA may be implemented
1da177e4 120 *
4a98f896
FT
121 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer
122 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
123 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
124 * NCR5380_dma_residual - residual byte count
1da177e4 125 *
1da177e4 126 * The generic driver is initialized by calling NCR5380_init(instance),
906e4a3c 127 * after setting the appropriate host specific fields and ID.
1da177e4
LT
128 */
129
e5d55d1a
FT
130#ifndef NCR5380_io_delay
131#define NCR5380_io_delay(x)
132#endif
133
52d3e561
FT
134#ifndef NCR5380_acquire_dma_irq
135#define NCR5380_acquire_dma_irq(x) (1)
136#endif
137
138#ifndef NCR5380_release_dma_irq
139#define NCR5380_release_dma_irq(x)
140#endif
141
54d8fe44
FT
142static int do_abort(struct Scsi_Host *);
143static void do_reset(struct Scsi_Host *);
1da177e4 144
c16df32e 145/**
0d2cf867 146 * initialize_SCp - init the scsi pointer field
594d4ba3 147 * @cmd: command block to set up
1da177e4 148 *
594d4ba3 149 * Set up the internal fields in the SCSI command.
1da177e4
LT
150 */
151
710ddd0d 152static inline void initialize_SCp(struct scsi_cmnd *cmd)
1da177e4 153{
aff0cf9a
FT
154 /*
155 * Initialize the Scsi Pointer field so that all of the commands in the
1da177e4
LT
156 * various queues are valid.
157 */
158
9e0fe44d
BH
159 if (scsi_bufflen(cmd)) {
160 cmd->SCp.buffer = scsi_sglist(cmd);
161 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
45711f1a 162 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4
LT
163 cmd->SCp.this_residual = cmd->SCp.buffer->length;
164 } else {
165 cmd->SCp.buffer = NULL;
166 cmd->SCp.buffers_residual = 0;
9e0fe44d
BH
167 cmd->SCp.ptr = NULL;
168 cmd->SCp.this_residual = 0;
1da177e4 169 }
f27db8eb
FT
170
171 cmd->SCp.Status = 0;
172 cmd->SCp.Message = 0;
1da177e4
LT
173}
174
175/**
b32ade12 176 * NCR5380_poll_politely2 - wait for two chip register values
d5d37a0a 177 * @hostdata: host private data
b32ade12
FT
178 * @reg1: 5380 register to poll
179 * @bit1: Bitmask to check
180 * @val1: Expected value
181 * @reg2: Second 5380 register to poll
182 * @bit2: Second bitmask to check
183 * @val2: Second expected value
2f854b82
FT
184 * @wait: Time-out in jiffies
185 *
186 * Polls the chip in a reasonably efficient manner waiting for an
187 * event to occur. After a short quick poll we begin to yield the CPU
188 * (if possible). In irq contexts the time-out is arbitrarily limited.
189 * Callers may hold locks as long as they are held in irq mode.
190 *
b32ade12 191 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
1da177e4 192 */
2f854b82 193
d5d37a0a 194static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
61e1ce58
FT
195 unsigned int reg1, u8 bit1, u8 val1,
196 unsigned int reg2, u8 bit2, u8 val2,
197 unsigned long wait)
1da177e4 198{
d4408dd7 199 unsigned long n = hostdata->poll_loops;
2f854b82 200 unsigned long deadline = jiffies + wait;
2f854b82 201
2f854b82 202 do {
b32ade12
FT
203 if ((NCR5380_read(reg1) & bit1) == val1)
204 return 0;
205 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4
LT
206 return 0;
207 cpu_relax();
2f854b82
FT
208 } while (n--);
209
210 if (irqs_disabled() || in_interrupt())
211 return -ETIMEDOUT;
212
213 /* Repeatedly sleep for 1 ms until deadline */
214 while (time_is_after_jiffies(deadline)) {
215 schedule_timeout_uninterruptible(1);
b32ade12
FT
216 if ((NCR5380_read(reg1) & bit1) == val1)
217 return 0;
218 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4 219 return 0;
1da177e4 220 }
2f854b82 221
1da177e4
LT
222 return -ETIMEDOUT;
223}
224
185a7a1c 225#if NDEBUG
1da177e4
LT
226static struct {
227 unsigned char mask;
228 const char *name;
aff0cf9a
FT
229} signals[] = {
230 {SR_DBP, "PARITY"},
231 {SR_RST, "RST"},
232 {SR_BSY, "BSY"},
233 {SR_REQ, "REQ"},
234 {SR_MSG, "MSG"},
235 {SR_CD, "CD"},
236 {SR_IO, "IO"},
237 {SR_SEL, "SEL"},
1da177e4 238 {0, NULL}
aff0cf9a 239},
1da177e4 240basrs[] = {
12866b99
FT
241 {BASR_END_DMA_TRANSFER, "END OF DMA"},
242 {BASR_DRQ, "DRQ"},
243 {BASR_PARITY_ERROR, "PARITY ERROR"},
244 {BASR_IRQ, "IRQ"},
245 {BASR_PHASE_MATCH, "PHASE MATCH"},
246 {BASR_BUSY_ERROR, "BUSY ERROR"},
aff0cf9a
FT
247 {BASR_ATN, "ATN"},
248 {BASR_ACK, "ACK"},
1da177e4 249 {0, NULL}
aff0cf9a
FT
250},
251icrs[] = {
252 {ICR_ASSERT_RST, "ASSERT RST"},
12866b99
FT
253 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
254 {ICR_ARBITRATION_LOST, "LOST ARB."},
aff0cf9a
FT
255 {ICR_ASSERT_ACK, "ASSERT ACK"},
256 {ICR_ASSERT_BSY, "ASSERT BSY"},
257 {ICR_ASSERT_SEL, "ASSERT SEL"},
258 {ICR_ASSERT_ATN, "ASSERT ATN"},
259 {ICR_ASSERT_DATA, "ASSERT DATA"},
1da177e4 260 {0, NULL}
aff0cf9a
FT
261},
262mrs[] = {
12866b99
FT
263 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
264 {MR_TARGET, "TARGET"},
265 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
266 {MR_ENABLE_PAR_INTR, "PARITY INTR"},
267 {MR_ENABLE_EOP_INTR, "EOP INTR"},
268 {MR_MONITOR_BSY, "MONITOR BSY"},
269 {MR_DMA_MODE, "DMA MODE"},
270 {MR_ARBITRATE, "ARBITRATE"},
1da177e4
LT
271 {0, NULL}
272};
273
274/**
0d2cf867
FT
275 * NCR5380_print - print scsi bus signals
276 * @instance: adapter state to dump
1da177e4 277 *
594d4ba3 278 * Print the SCSI bus signals for debugging purposes
1da177e4
LT
279 */
280
281static void NCR5380_print(struct Scsi_Host *instance)
282{
61e1ce58 283 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 284 unsigned char status, data, basr, mr, icr, i;
1da177e4
LT
285
286 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
287 status = NCR5380_read(STATUS_REG);
288 mr = NCR5380_read(MODE_REG);
289 icr = NCR5380_read(INITIATOR_COMMAND_REG);
290 basr = NCR5380_read(BUS_AND_STATUS_REG);
291
12866b99 292 printk(KERN_DEBUG "SR = 0x%02x : ", status);
1da177e4
LT
293 for (i = 0; signals[i].mask; ++i)
294 if (status & signals[i].mask)
12866b99
FT
295 printk(KERN_CONT "%s, ", signals[i].name);
296 printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
1da177e4
LT
297 for (i = 0; basrs[i].mask; ++i)
298 if (basr & basrs[i].mask)
12866b99
FT
299 printk(KERN_CONT "%s, ", basrs[i].name);
300 printk(KERN_CONT "\nICR = 0x%02x : ", icr);
1da177e4
LT
301 for (i = 0; icrs[i].mask; ++i)
302 if (icr & icrs[i].mask)
12866b99
FT
303 printk(KERN_CONT "%s, ", icrs[i].name);
304 printk(KERN_CONT "\nMR = 0x%02x : ", mr);
1da177e4
LT
305 for (i = 0; mrs[i].mask; ++i)
306 if (mr & mrs[i].mask)
12866b99
FT
307 printk(KERN_CONT "%s, ", mrs[i].name);
308 printk(KERN_CONT "\n");
1da177e4
LT
309}
310
0d2cf867
FT
311static struct {
312 unsigned char value;
313 const char *name;
314} phases[] = {
315 {PHASE_DATAOUT, "DATAOUT"},
316 {PHASE_DATAIN, "DATAIN"},
317 {PHASE_CMDOUT, "CMDOUT"},
318 {PHASE_STATIN, "STATIN"},
319 {PHASE_MSGOUT, "MSGOUT"},
320 {PHASE_MSGIN, "MSGIN"},
321 {PHASE_UNKNOWN, "UNKNOWN"}
322};
1da177e4 323
c16df32e 324/**
0d2cf867 325 * NCR5380_print_phase - show SCSI phase
594d4ba3 326 * @instance: adapter to dump
1da177e4 327 *
594d4ba3 328 * Print the current SCSI phase for debugging purposes
1da177e4
LT
329 */
330
331static void NCR5380_print_phase(struct Scsi_Host *instance)
332{
61e1ce58 333 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
334 unsigned char status;
335 int i;
1da177e4
LT
336
337 status = NCR5380_read(STATUS_REG);
338 if (!(status & SR_REQ))
6a6ff4ac 339 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
1da177e4 340 else {
0d2cf867
FT
341 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
342 (phases[i].value != (status & PHASE_MASK)); ++i)
343 ;
6a6ff4ac 344 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
1da177e4
LT
345 }
346}
347#endif
348
1da177e4 349/**
594d4ba3
FT
350 * NCR58380_info - report driver and host information
351 * @instance: relevant scsi host instance
1da177e4 352 *
594d4ba3 353 * For use as the host template info() handler.
1da177e4
LT
354 */
355
8c32513b 356static const char *NCR5380_info(struct Scsi_Host *instance)
1da177e4 357{
8c32513b
FT
358 struct NCR5380_hostdata *hostdata = shost_priv(instance);
359
360 return hostdata->info;
361}
362
363static void prepare_info(struct Scsi_Host *instance)
364{
365 struct NCR5380_hostdata *hostdata = shost_priv(instance);
366
367 snprintf(hostdata->info, sizeof(hostdata->info),
820682b1
FT
368 "%s, irq %d, "
369 "io_port 0x%lx, base 0x%lx, "
8c32513b
FT
370 "can_queue %d, cmd_per_lun %d, "
371 "sg_tablesize %d, this_id %d, "
be3f4121 372 "flags { %s%s%s}, "
8c32513b 373 "options { %s} ",
820682b1
FT
374 instance->hostt->name, instance->irq,
375 hostdata->io_port, hostdata->base,
8c32513b
FT
376 instance->can_queue, instance->cmd_per_lun,
377 instance->sg_tablesize, instance->this_id,
1bb46002 378 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "",
8c32513b 379 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
9c3f0e2b 380 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "",
1da177e4 381#ifdef DIFFERENTIAL
8c32513b 382 "DIFFERENTIAL "
1da177e4 383#endif
1da177e4 384#ifdef PARITY
8c32513b 385 "PARITY "
8c32513b
FT
386#endif
387 "");
1da177e4
LT
388}
389
1da177e4 390/**
0d2cf867 391 * NCR5380_init - initialise an NCR5380
594d4ba3
FT
392 * @instance: adapter to configure
393 * @flags: control flags
1da177e4 394 *
594d4ba3
FT
395 * Initializes *instance and corresponding 5380 chip,
396 * with flags OR'd into the initial flags value.
1da177e4 397 *
594d4ba3 398 * Notes : I assume that the host, hostno, and id bits have been
0d2cf867 399 * set correctly. I don't care about the irq and other fields.
1da177e4 400 *
594d4ba3 401 * Returns 0 for success
1da177e4
LT
402 */
403
6f039790 404static int NCR5380_init(struct Scsi_Host *instance, int flags)
1da177e4 405{
e8a60144 406 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 407 int i;
2f854b82 408 unsigned long deadline;
d4408dd7 409 unsigned long accesses_per_ms;
1da177e4 410
ae5e33af
FT
411 instance->max_lun = 7;
412
0d2cf867 413 hostdata->host = instance;
1da177e4 414 hostdata->id_mask = 1 << instance->this_id;
0d2cf867 415 hostdata->id_higher_mask = 0;
1da177e4
LT
416 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
417 if (i > hostdata->id_mask)
418 hostdata->id_higher_mask |= i;
419 for (i = 0; i < 8; ++i)
420 hostdata->busy[i] = 0;
e4dec680
FT
421 hostdata->dma_len = 0;
422
11d2f63b 423 spin_lock_init(&hostdata->lock);
1da177e4 424 hostdata->connected = NULL;
f27db8eb
FT
425 hostdata->sensing = NULL;
426 INIT_LIST_HEAD(&hostdata->autosense);
32b26a10
FT
427 INIT_LIST_HEAD(&hostdata->unissued);
428 INIT_LIST_HEAD(&hostdata->disconnected);
429
55181be8 430 hostdata->flags = flags;
aff0cf9a 431
8d8601a7 432 INIT_WORK(&hostdata->main_task, NCR5380_main);
0ad0eff9
FT
433 hostdata->work_q = alloc_workqueue("ncr5380_%d",
434 WQ_UNBOUND | WQ_MEM_RECLAIM,
435 1, instance->host_no);
436 if (!hostdata->work_q)
437 return -ENOMEM;
438
8c32513b
FT
439 prepare_info(instance);
440
1da177e4
LT
441 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
442 NCR5380_write(MODE_REG, MR_BASE);
443 NCR5380_write(TARGET_COMMAND_REG, 0);
444 NCR5380_write(SELECT_ENABLE_REG, 0);
2f854b82
FT
445
446 /* Calibrate register polling loop */
447 i = 0;
448 deadline = jiffies + 1;
449 do {
450 cpu_relax();
451 } while (time_is_after_jiffies(deadline));
452 deadline += msecs_to_jiffies(256);
453 do {
454 NCR5380_read(STATUS_REG);
455 ++i;
456 cpu_relax();
457 } while (time_is_after_jiffies(deadline));
d4408dd7
FT
458 accesses_per_ms = i / 256;
459 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
2f854b82 460
b6488f97
FT
461 return 0;
462}
1da177e4 463
b6488f97
FT
464/**
465 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
466 * @instance: adapter to check
467 *
468 * If the system crashed, it may have crashed with a connected target and
469 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
470 * currently established nexus, which we know nothing about. Failing that
471 * do a bus reset.
472 *
473 * Note that a bus reset will cause the chip to assert IRQ.
474 *
475 * Returns 0 if successful, otherwise -ENXIO.
476 */
477
478static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
479{
9c3f0e2b 480 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 481 int pass;
1da177e4
LT
482
483 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
484 switch (pass) {
485 case 1:
486 case 3:
487 case 5:
636b1ec8 488 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
d5d37a0a 489 NCR5380_poll_politely(hostdata,
636b1ec8 490 STATUS_REG, SR_BSY, 0, 5 * HZ);
1da177e4
LT
491 break;
492 case 2:
636b1ec8 493 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
1da177e4
LT
494 do_abort(instance);
495 break;
496 case 4:
636b1ec8 497 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
1da177e4 498 do_reset(instance);
9c3f0e2b
FT
499 /* Wait after a reset; the SCSI standard calls for
500 * 250ms, we wait 500ms to be on the safe side.
501 * But some Toshiba CD-ROMs need ten times that.
502 */
503 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
504 msleep(2500);
505 else
506 msleep(500);
1da177e4
LT
507 break;
508 case 6:
636b1ec8 509 shost_printk(KERN_ERR, instance, "bus locked solid\n");
1da177e4
LT
510 return -ENXIO;
511 }
512 }
513 return 0;
514}
515
516/**
0d2cf867 517 * NCR5380_exit - remove an NCR5380
594d4ba3 518 * @instance: adapter to remove
0d2cf867
FT
519 *
520 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
1da177e4
LT
521 */
522
a43cf0f3 523static void NCR5380_exit(struct Scsi_Host *instance)
1da177e4 524{
e8a60144 525 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 526
8d8601a7 527 cancel_work_sync(&hostdata->main_task);
0ad0eff9 528 destroy_workqueue(hostdata->work_q);
1da177e4
LT
529}
530
677e0194
FT
531/**
532 * complete_cmd - finish processing a command and return it to the SCSI ML
533 * @instance: the host instance
534 * @cmd: command to complete
535 */
536
537static void complete_cmd(struct Scsi_Host *instance,
538 struct scsi_cmnd *cmd)
539{
540 struct NCR5380_hostdata *hostdata = shost_priv(instance);
541
542 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
543
f27db8eb
FT
544 if (hostdata->sensing == cmd) {
545 /* Autosense processing ends here */
546 if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
547 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
548 set_host_byte(cmd, DID_ERROR);
549 } else
550 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
551 hostdata->sensing = NULL;
552 }
553
677e0194
FT
554 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
555
556 cmd->scsi_done(cmd);
557}
558
1da177e4 559/**
1bb40589
FT
560 * NCR5380_queue_command - queue a command
561 * @instance: the relevant SCSI adapter
562 * @cmd: SCSI command
1da177e4 563 *
1bb40589
FT
564 * cmd is added to the per-instance issue queue, with minor
565 * twiddling done to the host specific fields of cmd. If the
566 * main coroutine is not running, it is restarted.
1da177e4
LT
567 */
568
1bb40589
FT
569static int NCR5380_queue_command(struct Scsi_Host *instance,
570 struct scsi_cmnd *cmd)
1da177e4 571{
1bb40589 572 struct NCR5380_hostdata *hostdata = shost_priv(instance);
32b26a10 573 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1bb40589 574 unsigned long flags;
1da177e4
LT
575
576#if (NDEBUG & NDEBUG_NO_WRITE)
577 switch (cmd->cmnd[0]) {
578 case WRITE_6:
579 case WRITE_10:
dbb6b350 580 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
1da177e4 581 cmd->result = (DID_ERROR << 16);
1bb40589 582 cmd->scsi_done(cmd);
1da177e4
LT
583 return 0;
584 }
0d2cf867 585#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
1da177e4 586
1da177e4
LT
587 cmd->result = 0;
588
52d3e561
FT
589 if (!NCR5380_acquire_dma_irq(instance))
590 return SCSI_MLQUEUE_HOST_BUSY;
591
11d2f63b 592 spin_lock_irqsave(&hostdata->lock, flags);
1bb40589 593
aff0cf9a
FT
594 /*
595 * Insert the cmd into the issue queue. Note that REQUEST SENSE
1da177e4 596 * commands are added to the head of the queue since any command will
aff0cf9a 597 * clear the contingent allegiance condition that exists and the
1da177e4
LT
598 * sense data is only guaranteed to be valid while the condition exists.
599 */
600
32b26a10
FT
601 if (cmd->cmnd[0] == REQUEST_SENSE)
602 list_add(&ncmd->list, &hostdata->unissued);
603 else
604 list_add_tail(&ncmd->list, &hostdata->unissued);
605
11d2f63b 606 spin_unlock_irqrestore(&hostdata->lock, flags);
1bb40589 607
dbb6b350
FT
608 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
609 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
1da177e4 610
1da177e4 611 /* Kick off command processing */
8d8601a7 612 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4
LT
613 return 0;
614}
615
52d3e561
FT
616static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
617{
618 struct NCR5380_hostdata *hostdata = shost_priv(instance);
619
620 /* Caller does the locking needed to set & test these data atomically */
621 if (list_empty(&hostdata->disconnected) &&
622 list_empty(&hostdata->unissued) &&
623 list_empty(&hostdata->autosense) &&
624 !hostdata->connected &&
625 !hostdata->selecting)
626 NCR5380_release_dma_irq(instance);
627}
628
f27db8eb
FT
629/**
630 * dequeue_next_cmd - dequeue a command for processing
631 * @instance: the scsi host instance
632 *
633 * Priority is given to commands on the autosense queue. These commands
634 * need autosense because of a CHECK CONDITION result.
635 *
636 * Returns a command pointer if a command is found for a target that is
637 * not already busy. Otherwise returns NULL.
638 */
639
640static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
641{
642 struct NCR5380_hostdata *hostdata = shost_priv(instance);
643 struct NCR5380_cmd *ncmd;
644 struct scsi_cmnd *cmd;
645
8d5dbec3 646 if (hostdata->sensing || list_empty(&hostdata->autosense)) {
f27db8eb
FT
647 list_for_each_entry(ncmd, &hostdata->unissued, list) {
648 cmd = NCR5380_to_scmd(ncmd);
649 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
650 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
651
652 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
653 list_del(&ncmd->list);
654 dsprintk(NDEBUG_QUEUES, instance,
655 "dequeue: removed %p from issue queue\n", cmd);
656 return cmd;
657 }
658 }
659 } else {
660 /* Autosense processing begins here */
661 ncmd = list_first_entry(&hostdata->autosense,
662 struct NCR5380_cmd, list);
663 list_del(&ncmd->list);
664 cmd = NCR5380_to_scmd(ncmd);
665 dsprintk(NDEBUG_QUEUES, instance,
666 "dequeue: removed %p from autosense queue\n", cmd);
667 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
668 hostdata->sensing = cmd;
669 return cmd;
670 }
671 return NULL;
672}
673
674static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
675{
676 struct NCR5380_hostdata *hostdata = shost_priv(instance);
677 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
678
8d5dbec3 679 if (hostdata->sensing == cmd) {
f27db8eb
FT
680 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
681 list_add(&ncmd->list, &hostdata->autosense);
682 hostdata->sensing = NULL;
683 } else
684 list_add(&ncmd->list, &hostdata->unissued);
685}
686
1da177e4 687/**
0d2cf867 688 * NCR5380_main - NCR state machines
1da177e4 689 *
594d4ba3
FT
690 * NCR5380_main is a coroutine that runs as long as more work can
691 * be done on the NCR5380 host adapters in a system. Both
692 * NCR5380_queue_command() and NCR5380_intr() will try to start it
693 * in case it is not running.
1da177e4
LT
694 */
695
c4028958 696static void NCR5380_main(struct work_struct *work)
1da177e4 697{
c4028958 698 struct NCR5380_hostdata *hostdata =
8d8601a7 699 container_of(work, struct NCR5380_hostdata, main_task);
1da177e4 700 struct Scsi_Host *instance = hostdata->host;
1da177e4 701 int done;
aff0cf9a 702
1da177e4 703 do {
1da177e4 704 done = 1;
11d2f63b 705
0a4e3612 706 spin_lock_irq(&hostdata->lock);
ccf6efd7
FT
707 while (!hostdata->connected && !hostdata->selecting) {
708 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
709
710 if (!cmd)
711 break;
1da177e4 712
f27db8eb 713 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
76f13b93 714
f27db8eb
FT
715 /*
716 * Attempt to establish an I_T_L nexus here.
717 * On success, instance->hostdata->connected is set.
718 * On failure, we must add the command back to the
719 * issue queue so we can keep trying.
720 */
721 /*
722 * REQUEST SENSE commands are issued without tagged
723 * queueing, even on SCSI-II devices because the
724 * contingent allegiance condition exists for the
725 * entire unit.
726 */
11d2f63b 727
ccf6efd7 728 if (!NCR5380_select(instance, cmd)) {
707d62b3 729 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
52d3e561 730 maybe_release_dma_irq(instance);
f27db8eb
FT
731 } else {
732 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
733 "main: select failed, returning %p to queue\n", cmd);
734 requeue_cmd(instance, cmd);
735 }
736 }
e4dec680 737 if (hostdata->connected && !hostdata->dma_len) {
b746545f 738 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
1da177e4 739 NCR5380_information_transfer(instance);
1da177e4 740 done = 0;
1d3db59d 741 }
0a4e3612
FT
742 spin_unlock_irq(&hostdata->lock);
743 if (!done)
744 cond_resched();
1da177e4 745 } while (!done);
1da177e4
LT
746}
747
8053b0ee
FT
748/*
749 * NCR5380_dma_complete - finish DMA transfer
750 * @instance: the scsi host instance
751 *
752 * Called by the interrupt handler when DMA finishes or a phase
753 * mismatch occurs (which would end the DMA transfer).
754 */
755
756static void NCR5380_dma_complete(struct Scsi_Host *instance)
757{
758 struct NCR5380_hostdata *hostdata = shost_priv(instance);
759 int transferred;
760 unsigned char **data;
761 int *count;
762 int saved_data = 0, overrun = 0;
763 unsigned char p;
764
765 if (hostdata->read_overruns) {
766 p = hostdata->connected->SCp.phase;
767 if (p & SR_IO) {
768 udelay(10);
769 if ((NCR5380_read(BUS_AND_STATUS_REG) &
770 (BASR_PHASE_MATCH | BASR_ACK)) ==
771 (BASR_PHASE_MATCH | BASR_ACK)) {
772 saved_data = NCR5380_read(INPUT_DATA_REG);
773 overrun = 1;
774 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
775 }
776 }
777 }
778
e9db3198
FT
779#ifdef CONFIG_SUN3
780 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) {
781 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
782 instance->host_no);
783 BUG();
784 }
785
786 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
787 (BASR_PHASE_MATCH | BASR_ACK)) {
788 pr_err("scsi%d: BASR %02x\n", instance->host_no,
789 NCR5380_read(BUS_AND_STATUS_REG));
790 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
791 instance->host_no);
792 BUG();
793 }
794#endif
795
8053b0ee
FT
796 NCR5380_write(MODE_REG, MR_BASE);
797 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
798 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
799
4a98f896 800 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
8053b0ee
FT
801 hostdata->dma_len = 0;
802
803 data = (unsigned char **)&hostdata->connected->SCp.ptr;
804 count = &hostdata->connected->SCp.this_residual;
805 *data += transferred;
806 *count -= transferred;
807
808 if (hostdata->read_overruns) {
809 int cnt, toPIO;
810
811 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
812 cnt = toPIO = hostdata->read_overruns;
813 if (overrun) {
814 dsprintk(NDEBUG_DMA, instance,
815 "Got an input overrun, using saved byte\n");
816 *(*data)++ = saved_data;
817 (*count)--;
818 cnt--;
819 toPIO--;
820 }
821 if (toPIO > 0) {
822 dsprintk(NDEBUG_DMA, instance,
823 "Doing %d byte PIO to 0x%p\n", cnt, *data);
824 NCR5380_transfer_pio(instance, &p, &cnt, data);
825 *count -= toPIO - cnt;
826 }
827 }
828 }
829}
830
1da177e4 831/**
cd400825
FT
832 * NCR5380_intr - generic NCR5380 irq handler
833 * @irq: interrupt number
834 * @dev_id: device info
835 *
836 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
837 * from the disconnected queue, and restarting NCR5380_main()
838 * as required.
839 *
840 * The chip can assert IRQ in any of six different conditions. The IRQ flag
841 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
842 * Three of these six conditions are latched in the Bus and Status Register:
843 * - End of DMA (cleared by ending DMA Mode)
844 * - Parity error (cleared by reading RPIR)
845 * - Loss of BSY (cleared by reading RPIR)
846 * Two conditions have flag bits that are not latched:
847 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
848 * - Bus reset (non-maskable)
849 * The remaining condition has no flag bit at all:
850 * - Selection/reselection
851 *
852 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
853 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
854 * claimed that "the design of the [DP8490] interrupt logic ensures
855 * interrupts will not be lost (they can be on the DP5380)."
856 * The L5380/53C80 datasheet from LOGIC Devices has more details.
857 *
858 * Checking for bus reset by reading RST is futile because of interrupt
859 * latency, but a bus reset will reset chip logic. Checking for parity error
860 * is unnecessary because that interrupt is never enabled. A Loss of BSY
861 * condition will clear DMA Mode. We can tell when this occurs because the
862 * the Busy Monitor interrupt is enabled together with DMA Mode.
1da177e4
LT
863 */
864
a46865dc 865static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
1da177e4 866{
baa9aac6 867 struct Scsi_Host *instance = dev_id;
cd400825
FT
868 struct NCR5380_hostdata *hostdata = shost_priv(instance);
869 int handled = 0;
1da177e4
LT
870 unsigned char basr;
871 unsigned long flags;
872
11d2f63b 873 spin_lock_irqsave(&hostdata->lock, flags);
cd400825
FT
874
875 basr = NCR5380_read(BUS_AND_STATUS_REG);
876 if (basr & BASR_IRQ) {
877 unsigned char mr = NCR5380_read(MODE_REG);
878 unsigned char sr = NCR5380_read(STATUS_REG);
879
b746545f
FT
880 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
881 irq, basr, sr, mr);
1da177e4 882
8053b0ee
FT
883 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
884 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
885 * We ack IRQ after clearing Mode Register. Workarounds
886 * for End of DMA errata need to happen in DMA Mode.
887 */
888
889 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
890
891 if (hostdata->connected) {
892 NCR5380_dma_complete(instance);
893 queue_work(hostdata->work_q, &hostdata->main_task);
894 } else {
895 NCR5380_write(MODE_REG, MR_BASE);
896 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
897 }
898 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
cd400825
FT
899 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
900 /* Probably reselected */
901 NCR5380_write(SELECT_ENABLE_REG, 0);
902 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
903
b746545f 904 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
cd400825
FT
905
906 if (!hostdata->connected) {
907 NCR5380_reselect(instance);
908 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4 909 }
cd400825
FT
910 if (!hostdata->connected)
911 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
912 } else {
913 /* Probably Bus Reset */
914 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
915
b746545f 916 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
e9db3198
FT
917#ifdef SUN3_SCSI_VME
918 dregs->csr |= CSR_DMA_ENABLE;
919#endif
cd400825
FT
920 }
921 handled = 1;
922 } else {
9af9fecb 923 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
e9db3198
FT
924#ifdef SUN3_SCSI_VME
925 dregs->csr |= CSR_DMA_ENABLE;
926#endif
cd400825
FT
927 }
928
11d2f63b 929 spin_unlock_irqrestore(&hostdata->lock, flags);
cd400825
FT
930
931 return IRQ_RETVAL(handled);
1da177e4
LT
932}
933
aff0cf9a 934/*
710ddd0d 935 * Function : int NCR5380_select(struct Scsi_Host *instance,
594d4ba3 936 * struct scsi_cmnd *cmd)
1da177e4
LT
937 *
938 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
594d4ba3
FT
939 * including ARBITRATION, SELECTION, and initial message out for
940 * IDENTIFY and queue messages.
1da177e4 941 *
aff0cf9a 942 * Inputs : instance - instantiation of the 5380 driver on which this
594d4ba3 943 * target lives, cmd - SCSI command to execute.
aff0cf9a 944 *
707d62b3
FT
945 * Returns cmd if selection failed but should be retried,
946 * NULL if selection failed and should not be retried, or
947 * NULL if selection succeeded (hostdata->connected == cmd).
1da177e4 948 *
aff0cf9a 949 * Side effects :
594d4ba3
FT
950 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
951 * with registers as they should have been on entry - ie
952 * SELECT_ENABLE will be set appropriately, the NCR5380
953 * will cease to drive any SCSI bus signals.
1da177e4 954 *
594d4ba3
FT
955 * If successful : I_T_L or I_T_L_Q nexus will be established,
956 * instance->connected will be set to cmd.
957 * SELECT interrupt will be disabled.
1da177e4 958 *
594d4ba3
FT
959 * If failed (no target) : cmd->scsi_done() will be called, and the
960 * cmd->result host byte set to DID_BAD_TARGET.
1da177e4 961 */
aff0cf9a 962
707d62b3
FT
963static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
964 struct scsi_cmnd *cmd)
1da177e4 965{
e8a60144 966 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
967 unsigned char tmp[3], phase;
968 unsigned char *data;
969 int len;
1da177e4 970 int err;
1da177e4 971
1da177e4 972 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
b746545f
FT
973 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
974 instance->this_id);
1da177e4 975
707d62b3
FT
976 /*
977 * Arbitration and selection phases are slow and involve dropping the
978 * lock, so we have to watch out for EH. An exception handler may
979 * change 'selecting' to NULL. This function will then return NULL
980 * so that the caller will forget about 'cmd'. (During information
981 * transfer phases, EH may change 'connected' to NULL.)
982 */
983 hostdata->selecting = cmd;
984
aff0cf9a
FT
985 /*
986 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1da177e4
LT
987 * data bus during SELECTION.
988 */
989
990 NCR5380_write(TARGET_COMMAND_REG, 0);
991
aff0cf9a 992 /*
1da177e4
LT
993 * Start arbitration.
994 */
995
996 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
997 NCR5380_write(MODE_REG, MR_ARBITRATE);
998
55500d9b
FT
999 /* The chip now waits for BUS FREE phase. Then after the 800 ns
1000 * Bus Free Delay, arbitration will begin.
1001 */
1da177e4 1002
11d2f63b 1003 spin_unlock_irq(&hostdata->lock);
d5d37a0a 1004 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
b32ade12
FT
1005 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1006 ICR_ARBITRATION_PROGRESS, HZ);
11d2f63b 1007 spin_lock_irq(&hostdata->lock);
b32ade12
FT
1008 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1009 /* Reselection interrupt */
707d62b3 1010 goto out;
b32ade12 1011 }
ccf6efd7
FT
1012 if (!hostdata->selecting) {
1013 /* Command was aborted */
1014 NCR5380_write(MODE_REG, MR_BASE);
1015 goto out;
1016 }
b32ade12
FT
1017 if (err < 0) {
1018 NCR5380_write(MODE_REG, MR_BASE);
1019 shost_printk(KERN_ERR, instance,
1020 "select: arbitration timeout\n");
707d62b3 1021 goto out;
1da177e4 1022 }
11d2f63b 1023 spin_unlock_irq(&hostdata->lock);
1da177e4 1024
55500d9b 1025 /* The SCSI-2 arbitration delay is 2.4 us */
1da177e4
LT
1026 udelay(3);
1027
1028 /* Check for lost arbitration */
0d2cf867
FT
1029 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1030 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1031 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1da177e4 1032 NCR5380_write(MODE_REG, MR_BASE);
b746545f 1033 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
11d2f63b 1034 spin_lock_irq(&hostdata->lock);
707d62b3 1035 goto out;
1da177e4 1036 }
cf13b083
FT
1037
1038 /* After/during arbitration, BSY should be asserted.
1039 * IBM DPES-31080 Version S31Q works now
1040 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1041 */
1042 NCR5380_write(INITIATOR_COMMAND_REG,
1043 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1da177e4 1044
aff0cf9a
FT
1045 /*
1046 * Again, bus clear + bus settle time is 1.2us, however, this is
1da177e4
LT
1047 * a minimum so we'll udelay ceil(1.2)
1048 */
1049
9c3f0e2b
FT
1050 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1051 udelay(15);
1052 else
1053 udelay(2);
1da177e4 1054
11d2f63b
FT
1055 spin_lock_irq(&hostdata->lock);
1056
72064a78
FT
1057 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1058 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
707d62b3
FT
1059 goto out;
1060
1061 if (!hostdata->selecting) {
1062 NCR5380_write(MODE_REG, MR_BASE);
1063 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1064 goto out;
1065 }
72064a78 1066
b746545f 1067 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1da177e4 1068
aff0cf9a
FT
1069 /*
1070 * Now that we have won arbitration, start Selection process, asserting
1da177e4
LT
1071 * the host and target ID's on the SCSI bus.
1072 */
1073
3d07d22b 1074 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1da177e4 1075
aff0cf9a 1076 /*
1da177e4
LT
1077 * Raise ATN while SEL is true before BSY goes false from arbitration,
1078 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1079 * phase immediately after selection.
1080 */
1081
3d07d22b
FT
1082 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1083 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4
LT
1084 NCR5380_write(MODE_REG, MR_BASE);
1085
aff0cf9a 1086 /*
1da177e4
LT
1087 * Reselect interrupts must be turned off prior to the dropping of BSY,
1088 * otherwise we will trigger an interrupt.
1089 */
1090 NCR5380_write(SELECT_ENABLE_REG, 0);
1091
11d2f63b
FT
1092 spin_unlock_irq(&hostdata->lock);
1093
1da177e4 1094 /*
aff0cf9a 1095 * The initiator shall then wait at least two deskew delays and release
1da177e4
LT
1096 * the BSY signal.
1097 */
0d2cf867 1098 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1da177e4
LT
1099
1100 /* Reset BSY */
3d07d22b
FT
1101 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1102 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4 1103
aff0cf9a 1104 /*
1da177e4 1105 * Something weird happens when we cease to drive BSY - looks
aff0cf9a 1106 * like the board/chip is letting us do another read before the
1da177e4
LT
1107 * appropriate propagation delay has expired, and we're confusing
1108 * a BSY signal from ourselves as the target's response to SELECTION.
1109 *
1110 * A small delay (the 'C++' frontend breaks the pipeline with an
1111 * unnecessary jump, making it work on my 386-33/Trantor T128, the
aff0cf9a
FT
1112 * tighter 'C' code breaks and requires this) solves the problem -
1113 * the 1 us delay is arbitrary, and only used because this delay will
1114 * be the same on other platforms and since it works here, it should
1da177e4
LT
1115 * work there.
1116 *
1117 * wingel suggests that this could be due to failing to wait
1118 * one deskew delay.
1119 */
1120
1121 udelay(1);
1122
b746545f 1123 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1da177e4 1124
aff0cf9a
FT
1125 /*
1126 * The SCSI specification calls for a 250 ms timeout for the actual
1da177e4
LT
1127 * selection.
1128 */
1129
d5d37a0a 1130 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
ae753a33 1131 msecs_to_jiffies(250));
1da177e4 1132
1da177e4 1133 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
11d2f63b 1134 spin_lock_irq(&hostdata->lock);
1da177e4
LT
1135 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1136 NCR5380_reselect(instance);
cd400825
FT
1137 if (!hostdata->connected)
1138 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
6a6ff4ac 1139 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
707d62b3 1140 goto out;
1da177e4 1141 }
ae753a33
FT
1142
1143 if (err < 0) {
11d2f63b 1144 spin_lock_irq(&hostdata->lock);
ae753a33 1145 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
ae753a33 1146 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1147 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1148 if (hostdata->selecting) {
1149 cmd->result = DID_BAD_TARGET << 16;
1150 complete_cmd(instance, cmd);
1151 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1152 cmd = NULL;
1153 }
1154 goto out;
ae753a33
FT
1155 }
1156
aff0cf9a
FT
1157 /*
1158 * No less than two deskew delays after the initiator detects the
1159 * BSY signal is true, it shall release the SEL signal and may
1da177e4
LT
1160 * change the DATA BUS. -wingel
1161 */
1162
1163 udelay(1);
1164
1165 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1166
1da177e4 1167 /*
aff0cf9a 1168 * Since we followed the SCSI spec, and raised ATN while SEL
1da177e4
LT
1169 * was true but before BSY was false during selection, the information
1170 * transfer phase should be a MESSAGE OUT phase so that we can send the
1171 * IDENTIFY message.
1da177e4
LT
1172 */
1173
1174 /* Wait for start of REQ/ACK handshake */
1175
d5d37a0a 1176 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 1177 spin_lock_irq(&hostdata->lock);
1cc160e1 1178 if (err < 0) {
55500d9b
FT
1179 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1180 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1da177e4 1181 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1182 goto out;
1183 }
1184 if (!hostdata->selecting) {
1185 do_abort(instance);
1186 goto out;
1da177e4
LT
1187 }
1188
b746545f
FT
1189 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1190 scmd_id(cmd));
22f5f10d 1191 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1da177e4
LT
1192
1193 len = 1;
1da177e4
LT
1194 data = tmp;
1195 phase = PHASE_MSGOUT;
1196 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f 1197 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1da177e4 1198 /* XXX need to handle errors here */
11d2f63b 1199
1da177e4 1200 hostdata->connected = cmd;
3d07d22b 1201 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1da177e4 1202
e9db3198
FT
1203#ifdef SUN3_SCSI_VME
1204 dregs->csr |= CSR_INTR;
1205#endif
1206
28424d3a 1207 initialize_SCp(cmd);
1da177e4 1208
707d62b3
FT
1209 cmd = NULL;
1210
1211out:
1212 if (!hostdata->selecting)
1213 return NULL;
1214 hostdata->selecting = NULL;
1215 return cmd;
1da177e4
LT
1216}
1217
aff0cf9a
FT
1218/*
1219 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
594d4ba3 1220 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1221 *
1222 * Purpose : transfers data in given phase using polled I/O
1223 *
aff0cf9a 1224 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1225 * what phase is expected, *count - pointer to number of
1226 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1227 *
1da177e4 1228 * Returns : -1 when different phase is entered without transferring
0d2cf867 1229 * maximum number of bytes, 0 if all bytes are transferred or exit
594d4ba3 1230 * is in same phase.
1da177e4 1231 *
594d4ba3 1232 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1233 *
1234 * XXX Note : handling for bus free may be useful.
1235 */
1236
1237/*
aff0cf9a 1238 * Note : this code is not as quick as it could be, however it
1da177e4
LT
1239 * IS 100% reliable, and for the actual data transfer where speed
1240 * counts, we will always do a pseudo DMA or DMA transfer.
1241 */
1242
0d2cf867
FT
1243static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1244 unsigned char *phase, int *count,
1245 unsigned char **data)
1246{
61e1ce58 1247 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1248 unsigned char p = *phase, tmp;
1249 int c = *count;
1250 unsigned char *d = *data;
1da177e4 1251
aff0cf9a
FT
1252 /*
1253 * The NCR5380 chip will only drive the SCSI bus when the
1da177e4
LT
1254 * phase specified in the appropriate bits of the TARGET COMMAND
1255 * REGISTER match the STATUS REGISTER
1256 */
1257
0d2cf867 1258 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1da177e4 1259
1da177e4 1260 do {
aff0cf9a
FT
1261 /*
1262 * Wait for assertion of REQ, after which the phase bits will be
1263 * valid
1da177e4
LT
1264 */
1265
d5d37a0a 1266 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1da177e4 1267 break;
1da177e4 1268
b746545f 1269 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1da177e4
LT
1270
1271 /* Check for phase mismatch */
686f3990 1272 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
b746545f
FT
1273 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1274 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1da177e4
LT
1275 break;
1276 }
0d2cf867 1277
1da177e4
LT
1278 /* Do actual transfer from SCSI bus to / from memory */
1279 if (!(p & SR_IO))
1280 NCR5380_write(OUTPUT_DATA_REG, *d);
1281 else
1282 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1283
1284 ++d;
1285
aff0cf9a 1286 /*
1da177e4
LT
1287 * The SCSI standard suggests that in MSGOUT phase, the initiator
1288 * should drop ATN on the last byte of the message phase
1289 * after REQ has been asserted for the handshake but before
1290 * the initiator raises ACK.
1291 */
1292
1293 if (!(p & SR_IO)) {
1294 if (!((p & SR_MSG) && c > 1)) {
1295 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1296 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1297 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1298 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1da177e4 1299 } else {
3d07d22b
FT
1300 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1301 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1da177e4 1302 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1303 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1304 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1da177e4
LT
1305 }
1306 } else {
1307 NCR5380_dprint(NDEBUG_PIO, instance);
1308 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1309 }
1310
d5d37a0a 1311 if (NCR5380_poll_politely(hostdata,
a2edc4a6
FT
1312 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1313 break;
1314
b746545f 1315 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1da177e4
LT
1316
1317/*
aff0cf9a
FT
1318 * We have several special cases to consider during REQ/ACK handshaking :
1319 * 1. We were in MSGOUT phase, and we are on the last byte of the
594d4ba3 1320 * message. ATN must be dropped as ACK is dropped.
1da177e4 1321 *
aff0cf9a 1322 * 2. We are in a MSGIN phase, and we are on the last byte of the
594d4ba3
FT
1323 * message. We must exit with ACK asserted, so that the calling
1324 * code may raise ATN before dropping ACK to reject the message.
1da177e4
LT
1325 *
1326 * 3. ACK and ATN are clear and the target may proceed as normal.
1327 */
1328 if (!(p == PHASE_MSGIN && c == 1)) {
1329 if (p == PHASE_MSGOUT && c > 1)
1330 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1331 else
1332 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1333 }
1334 } while (--c);
1335
b746545f 1336 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1da177e4
LT
1337
1338 *count = c;
1339 *data = d;
1340 tmp = NCR5380_read(STATUS_REG);
a2edc4a6
FT
1341 /* The phase read from the bus is valid if either REQ is (already)
1342 * asserted or if ACK hasn't been released yet. The latter applies if
1343 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1344 */
1345 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1da177e4
LT
1346 *phase = tmp & PHASE_MASK;
1347 else
1348 *phase = PHASE_UNKNOWN;
1349
1350 if (!c || (*phase == p))
1351 return 0;
1352 else
1353 return -1;
1354}
1355
1356/**
636b1ec8
FT
1357 * do_reset - issue a reset command
1358 * @instance: adapter to reset
1da177e4 1359 *
636b1ec8
FT
1360 * Issue a reset sequence to the NCR5380 and try and get the bus
1361 * back into sane shape.
1da177e4 1362 *
636b1ec8
FT
1363 * This clears the reset interrupt flag because there may be no handler for
1364 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1365 * been installed. And when in EH we may have released the ST DMA interrupt.
1da177e4 1366 */
aff0cf9a 1367
54d8fe44
FT
1368static void do_reset(struct Scsi_Host *instance)
1369{
61e1ce58 1370 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
636b1ec8
FT
1371 unsigned long flags;
1372
1373 local_irq_save(flags);
1374 NCR5380_write(TARGET_COMMAND_REG,
1375 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1da177e4 1376 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
636b1ec8 1377 udelay(50);
1da177e4 1378 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
636b1ec8
FT
1379 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1380 local_irq_restore(flags);
1da177e4
LT
1381}
1382
80d3eb6d
FT
1383/**
1384 * do_abort - abort the currently established nexus by going to
1385 * MESSAGE OUT phase and sending an ABORT message.
1386 * @instance: relevant scsi host instance
1da177e4 1387 *
80d3eb6d 1388 * Returns 0 on success, -1 on failure.
1da177e4
LT
1389 */
1390
54d8fe44
FT
1391static int do_abort(struct Scsi_Host *instance)
1392{
61e1ce58 1393 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1394 unsigned char *msgptr, phase, tmp;
1395 int len;
1396 int rc;
1da177e4
LT
1397
1398 /* Request message out phase */
1399 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1400
aff0cf9a
FT
1401 /*
1402 * Wait for the target to indicate a valid phase by asserting
1403 * REQ. Once this happens, we'll have either a MSGOUT phase
1404 * and can immediately send the ABORT message, or we'll have some
1da177e4 1405 * other phase and will have to source/sink data.
aff0cf9a 1406 *
1da177e4
LT
1407 * We really don't care what value was on the bus or what value
1408 * the target sees, so we just handshake.
1409 */
1410
d5d37a0a 1411 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1cc160e1 1412 if (rc < 0)
80d3eb6d 1413 goto timeout;
1da177e4 1414
f35d3474 1415 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
aff0cf9a 1416
1da177e4
LT
1417 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1418
f35d3474 1419 if (tmp != PHASE_MSGOUT) {
0d2cf867
FT
1420 NCR5380_write(INITIATOR_COMMAND_REG,
1421 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
d5d37a0a 1422 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ);
1cc160e1 1423 if (rc < 0)
80d3eb6d
FT
1424 goto timeout;
1425 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1da177e4 1426 }
0d2cf867 1427
1da177e4
LT
1428 tmp = ABORT;
1429 msgptr = &tmp;
1430 len = 1;
1431 phase = PHASE_MSGOUT;
54d8fe44 1432 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1da177e4
LT
1433
1434 /*
1435 * If we got here, and the command completed successfully,
1436 * we're about to go into bus free state.
1437 */
1438
1439 return len ? -1 : 0;
80d3eb6d
FT
1440
1441timeout:
1442 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1443 return -1;
1da177e4
LT
1444}
1445
aff0cf9a
FT
1446/*
1447 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
594d4ba3 1448 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1449 *
1450 * Purpose : transfers data in given phase using either real
594d4ba3 1451 * or pseudo DMA.
1da177e4 1452 *
aff0cf9a 1453 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1454 * what phase is expected, *count - pointer to number of
1455 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1456 *
1da177e4 1457 * Returns : -1 when different phase is entered without transferring
594d4ba3
FT
1458 * maximum number of bytes, 0 if all bytes or transferred or exit
1459 * is in same phase.
1da177e4 1460 *
594d4ba3 1461 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1462 */
1463
1464
0d2cf867
FT
1465static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1466 unsigned char *phase, int *count,
1467 unsigned char **data)
1468{
1469 struct NCR5380_hostdata *hostdata = shost_priv(instance);
f0ea73a4
FT
1470 int c = *count;
1471 unsigned char p = *phase;
1472 unsigned char *d = *data;
1da177e4 1473 unsigned char tmp;
8053b0ee 1474 int result = 0;
1da177e4 1475
1da177e4
LT
1476 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1477 *phase = tmp;
1478 return -1;
1479 }
1da177e4 1480
8053b0ee 1481 hostdata->connected->SCp.phase = p;
1da177e4 1482
8053b0ee
FT
1483 if (p & SR_IO) {
1484 if (hostdata->read_overruns)
1485 c -= hostdata->read_overruns;
1486 else if (hostdata->flags & FLAG_DMA_FIXUP)
1487 --c;
1488 }
1da177e4 1489
8053b0ee
FT
1490 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1491 (p & SR_IO) ? "receive" : "send", c, d);
1da177e4 1492
e9db3198
FT
1493#ifdef CONFIG_SUN3
1494 /* send start chain */
1495 sun3scsi_dma_start(c, *data);
1496#endif
1497
8053b0ee
FT
1498 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1499 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1500 MR_ENABLE_EOP_INTR);
1501
1502 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1503 /* On the Medusa, it is a must to initialize the DMA before
1504 * starting the NCR. This is also the cleaner way for the TT.
1505 */
1506 if (p & SR_IO)
4a98f896 1507 result = NCR5380_dma_recv_setup(hostdata, d, c);
8053b0ee 1508 else
4a98f896 1509 result = NCR5380_dma_send_setup(hostdata, d, c);
8053b0ee 1510 }
1da177e4 1511
aff0cf9a 1512 /*
594d4ba3
FT
1513 * On the PAS16 at least I/O recovery delays are not needed here.
1514 * Everyone else seems to want them.
1da177e4
LT
1515 */
1516
1517 if (p & SR_IO) {
e9db3198 1518 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
e5d55d1a 1519 NCR5380_io_delay(1);
1da177e4
LT
1520 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1521 } else {
e5d55d1a 1522 NCR5380_io_delay(1);
1da177e4 1523 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
e5d55d1a 1524 NCR5380_io_delay(1);
1da177e4 1525 NCR5380_write(START_DMA_SEND_REG, 0);
e5d55d1a 1526 NCR5380_io_delay(1);
1da177e4
LT
1527 }
1528
e9db3198
FT
1529#ifdef CONFIG_SUN3
1530#ifdef SUN3_SCSI_VME
1531 dregs->csr |= CSR_DMA_ENABLE;
1532#endif
1533 sun3_dma_active = 1;
1534#endif
1535
8053b0ee
FT
1536 if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1537 /* On the Falcon, the DMA setup must be done after the last
1538 * NCR access, else the DMA setup gets trashed!
1539 */
1540 if (p & SR_IO)
4a98f896 1541 result = NCR5380_dma_recv_setup(hostdata, d, c);
8053b0ee 1542 else
4a98f896 1543 result = NCR5380_dma_send_setup(hostdata, d, c);
8053b0ee
FT
1544 }
1545
1546 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1547 if (result < 0)
1548 return result;
1549
1550 /* For real DMA, result is the byte count. DMA interrupt is expected. */
1551 if (result > 0) {
1552 hostdata->dma_len = result;
1553 return 0;
1554 }
1555
1556 /* The result is zero iff pseudo DMA send/receive was completed. */
1557 hostdata->dma_len = c;
1558
1da177e4 1559/*
e4dec680 1560 * A note regarding the DMA errata workarounds for early NMOS silicon.
c16df32e
FT
1561 *
1562 * For DMA sends, we want to wait until the last byte has been
1563 * transferred out over the bus before we turn off DMA mode. Alas, there
1564 * seems to be no terribly good way of doing this on a 5380 under all
1565 * conditions. For non-scatter-gather operations, we can wait until REQ
1566 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1567 * are nastier, since the device will be expecting more data than we
1568 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1569 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1570 * why this signal was added to the newer chips) but on the older 538[01]
1571 * this signal does not exist. The workaround for this lack is a watchdog;
1572 * we bail out of the wait-loop after a modest amount of wait-time if
1573 * the usual exit conditions are not met. Not a terribly clean or
1574 * correct solution :-%
1575 *
1576 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1577 * If the chip is in DMA receive mode, it will respond to a target's
1578 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1579 * ACK, even if it has _already_ been notified by the DMA controller that
1580 * the current DMA transfer has completed! If the NCR5380 is then taken
1581 * out of DMA mode, this already-acknowledged byte is lost. This is
1582 * not a problem for "one DMA transfer per READ command", because
1583 * the situation will never arise... either all of the data is DMA'ed
1584 * properly, or the target switches to MESSAGE IN phase to signal a
1585 * disconnection (either operation bringing the DMA to a clean halt).
1586 * However, in order to handle scatter-receive, we must work around the
e4dec680 1587 * problem. The chosen fix is to DMA fewer bytes, then check for the
c16df32e
FT
1588 * condition before taking the NCR5380 out of DMA mode. One or two extra
1589 * bytes are transferred via PIO as necessary to fill out the original
1590 * request.
1da177e4
LT
1591 */
1592
8053b0ee
FT
1593 if (hostdata->flags & FLAG_DMA_FIXUP) {
1594 if (p & SR_IO) {
1da177e4 1595 /*
e4dec680 1596 * The workaround was to transfer fewer bytes than we
aff0cf9a 1597 * intended to with the pseudo-DMA read function, wait for
1da177e4
LT
1598 * the chip to latch the last byte, read it, and then disable
1599 * pseudo-DMA mode.
aff0cf9a 1600 *
1da177e4
LT
1601 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1602 * REQ is deasserted when ACK is asserted, and not reasserted
1603 * until ACK goes false. Since the NCR5380 won't lower ACK
1604 * until DACK is asserted, which won't happen unless we twiddle
aff0cf9a
FT
1605 * the DMA port or we take the NCR5380 out of DMA mode, we
1606 * can guarantee that we won't handshake another extra
1da177e4
LT
1607 * byte.
1608 */
1609
d5d37a0a 1610 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
55181be8 1611 BASR_DRQ, BASR_DRQ, HZ) < 0) {
438af51c 1612 result = -1;
55181be8
FT
1613 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1614 }
d5d37a0a 1615 if (NCR5380_poll_politely(hostdata, STATUS_REG,
55181be8 1616 SR_REQ, 0, HZ) < 0) {
438af51c 1617 result = -1;
55181be8 1618 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1da177e4 1619 }
8053b0ee
FT
1620 d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1621 } else {
1da177e4 1622 /*
aff0cf9a
FT
1623 * Wait for the last byte to be sent. If REQ is being asserted for
1624 * the byte we're interested, we'll ACK it and it will go false.
1da177e4 1625 */
d5d37a0a 1626 if (NCR5380_poll_politely2(hostdata,
55181be8
FT
1627 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1628 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
438af51c 1629 result = -1;
55181be8 1630 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1da177e4
LT
1631 }
1632 }
1da177e4 1633 }
8053b0ee
FT
1634
1635 NCR5380_dma_complete(instance);
438af51c 1636 return result;
1da177e4 1637}
1da177e4
LT
1638
1639/*
1640 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1641 *
aff0cf9a 1642 * Purpose : run through the various SCSI phases and do as the target
594d4ba3
FT
1643 * directs us to. Operates on the currently connected command,
1644 * instance->connected.
1da177e4
LT
1645 *
1646 * Inputs : instance, instance for which we are doing commands
1647 *
aff0cf9a 1648 * Side effects : SCSI things happen, the disconnected queue will be
594d4ba3
FT
1649 * modified if a command disconnects, *instance->connected will
1650 * change.
1da177e4 1651 *
aff0cf9a 1652 * XXX Note : we need to watch for bus free or a reset condition here
594d4ba3 1653 * to recover from an unexpected bus free condition.
1da177e4
LT
1654 */
1655
0d2cf867
FT
1656static void NCR5380_information_transfer(struct Scsi_Host *instance)
1657{
e8a60144 1658 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1659 unsigned char msgout = NOP;
1660 int sink = 0;
1661 int len;
1da177e4 1662 int transfersize;
1da177e4
LT
1663 unsigned char *data;
1664 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
11d2f63b 1665 struct scsi_cmnd *cmd;
1da177e4 1666
e9db3198
FT
1667#ifdef SUN3_SCSI_VME
1668 dregs->csr |= CSR_INTR;
1669#endif
1670
11d2f63b 1671 while ((cmd = hostdata->connected)) {
32b26a10
FT
1672 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1673
1da177e4
LT
1674 tmp = NCR5380_read(STATUS_REG);
1675 /* We only have a valid SCSI phase when REQ is asserted */
1676 if (tmp & SR_REQ) {
1677 phase = (tmp & PHASE_MASK);
1678 if (phase != old_phase) {
1679 old_phase = phase;
1680 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1681 }
e9db3198 1682#ifdef CONFIG_SUN3
4a98f896
FT
1683 if (phase == PHASE_CMDOUT &&
1684 sun3_dma_setup_done != cmd) {
1685 int count;
e9db3198
FT
1686
1687 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
4a98f896
FT
1688 ++cmd->SCp.buffer;
1689 --cmd->SCp.buffers_residual;
1690 cmd->SCp.this_residual = cmd->SCp.buffer->length;
1691 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
e9db3198
FT
1692 }
1693
4a98f896
FT
1694 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1695
1696 if (count > 0) {
1697 if (rq_data_dir(cmd->request))
1698 sun3scsi_dma_send_setup(hostdata,
1699 cmd->SCp.ptr, count);
1700 else
1701 sun3scsi_dma_recv_setup(hostdata,
1702 cmd->SCp.ptr, count);
e9db3198
FT
1703 sun3_dma_setup_done = cmd;
1704 }
1705#ifdef SUN3_SCSI_VME
1706 dregs->csr |= CSR_INTR;
1707#endif
1708 }
1709#endif /* CONFIG_SUN3 */
1710
1da177e4
LT
1711 if (sink && (phase != PHASE_MSGOUT)) {
1712 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1713
3d07d22b
FT
1714 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1715 ICR_ASSERT_ACK);
0d2cf867
FT
1716 while (NCR5380_read(STATUS_REG) & SR_REQ)
1717 ;
3d07d22b
FT
1718 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1719 ICR_ASSERT_ATN);
1da177e4
LT
1720 sink = 0;
1721 continue;
1722 }
0d2cf867 1723
1da177e4 1724 switch (phase) {
1da177e4
LT
1725 case PHASE_DATAOUT:
1726#if (NDEBUG & NDEBUG_NO_DATAOUT)
6a6ff4ac 1727 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1da177e4
LT
1728 sink = 1;
1729 do_abort(instance);
1730 cmd->result = DID_ERROR << 16;
677e0194 1731 complete_cmd(instance, cmd);
dc183965 1732 hostdata->connected = NULL;
1da177e4
LT
1733 return;
1734#endif
bf1a0c6f 1735 case PHASE_DATAIN:
aff0cf9a 1736 /*
1da177e4
LT
1737 * If there is no room left in the current buffer in the
1738 * scatter-gather list, move onto the next one.
1739 */
1740
1741 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1742 ++cmd->SCp.buffer;
1743 --cmd->SCp.buffers_residual;
1744 cmd->SCp.this_residual = cmd->SCp.buffer->length;
45711f1a 1745 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
b746545f
FT
1746 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1747 cmd->SCp.this_residual,
1748 cmd->SCp.buffers_residual);
1da177e4 1749 }
0d2cf867 1750
1da177e4 1751 /*
aff0cf9a 1752 * The preferred transfer method is going to be
1da177e4
LT
1753 * PSEUDO-DMA for systems that are strictly PIO,
1754 * since we can let the hardware do the handshaking.
1755 *
1756 * For this to work, we need to know the transfersize
1757 * ahead of time, since the pseudo-DMA code will sit
1758 * in an unconditional loop.
1759 */
1760
ff3d4578 1761 transfersize = 0;
7e9ec8d9 1762 if (!cmd->device->borken)
4a98f896 1763 transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
ff3d4578 1764
438af51c 1765 if (transfersize > 0) {
1da177e4 1766 len = transfersize;
0d2cf867
FT
1767 if (NCR5380_transfer_dma(instance, &phase,
1768 &len, (unsigned char **)&cmd->SCp.ptr)) {
1da177e4 1769 /*
0d2cf867
FT
1770 * If the watchdog timer fires, all future
1771 * accesses to this device will use the
1772 * polled-IO.
1da177e4 1773 */
017560fc 1774 scmd_printk(KERN_INFO, cmd,
0d2cf867 1775 "switching to slow handshake\n");
1da177e4 1776 cmd->device->borken = 1;
1da177e4
LT
1777 sink = 1;
1778 do_abort(instance);
1779 cmd->result = DID_ERROR << 16;
1da177e4 1780 /* XXX - need to source or sink data here, as appropriate */
8053b0ee 1781 }
f825e40b 1782 } else {
08348b1c
FT
1783 /* Transfer a small chunk so that the
1784 * irq mode lock is not held too long.
1678847e 1785 */
08348b1c
FT
1786 transfersize = min(cmd->SCp.this_residual,
1787 NCR5380_PIO_CHUNK_SIZE);
1678847e
FT
1788 len = transfersize;
1789 NCR5380_transfer_pio(instance, &phase, &len,
3d07d22b 1790 (unsigned char **)&cmd->SCp.ptr);
1678847e 1791 cmd->SCp.this_residual -= transfersize - len;
11d2f63b 1792 }
e9db3198
FT
1793#ifdef CONFIG_SUN3
1794 if (sun3_dma_setup_done == cmd)
1795 sun3_dma_setup_done = NULL;
1796#endif
1678847e 1797 return;
1da177e4
LT
1798 case PHASE_MSGIN:
1799 len = 1;
1800 data = &tmp;
1801 NCR5380_transfer_pio(instance, &phase, &len, &data);
1802 cmd->SCp.Message = tmp;
1803
1804 switch (tmp) {
1da177e4
LT
1805 case ABORT:
1806 case COMMAND_COMPLETE:
1807 /* Accept message by clearing ACK */
1808 sink = 1;
1809 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0d3d9a42
FT
1810 dsprintk(NDEBUG_QUEUES, instance,
1811 "COMMAND COMPLETE %p target %d lun %llu\n",
1812 cmd, scmd_id(cmd), cmd->device->lun);
1813
1da177e4 1814 hostdata->connected = NULL;
1da177e4 1815
f27db8eb
FT
1816 cmd->result &= ~0xffff;
1817 cmd->result |= cmd->SCp.Status;
1818 cmd->result |= cmd->SCp.Message << 8;
28424d3a 1819
f27db8eb 1820 if (cmd->cmnd[0] == REQUEST_SENSE)
677e0194 1821 complete_cmd(instance, cmd);
f27db8eb
FT
1822 else {
1823 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1824 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1825 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1826 cmd);
1827 list_add_tail(&ncmd->list,
1828 &hostdata->autosense);
1829 } else
1830 complete_cmd(instance, cmd);
1da177e4
LT
1831 }
1832
aff0cf9a
FT
1833 /*
1834 * Restore phase bits to 0 so an interrupted selection,
1da177e4
LT
1835 * arbitration can resume.
1836 */
1837 NCR5380_write(TARGET_COMMAND_REG, 0);
72064a78
FT
1838
1839 /* Enable reselect interrupts */
1840 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
52d3e561
FT
1841
1842 maybe_release_dma_irq(instance);
1da177e4
LT
1843 return;
1844 case MESSAGE_REJECT:
1845 /* Accept message by clearing ACK */
1846 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1847 switch (hostdata->last_message) {
1848 case HEAD_OF_QUEUE_TAG:
1849 case ORDERED_QUEUE_TAG:
1850 case SIMPLE_QUEUE_TAG:
1851 cmd->device->simple_tags = 0;
9cb78c16 1852 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4
LT
1853 break;
1854 default:
1855 break;
1856 }
340b9612 1857 break;
0d2cf867
FT
1858 case DISCONNECT:
1859 /* Accept message by clearing ACK */
1860 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1861 hostdata->connected = NULL;
1862 list_add(&ncmd->list, &hostdata->disconnected);
1863 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1864 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1865 cmd, scmd_id(cmd), cmd->device->lun);
0d3d9a42 1866
0d2cf867
FT
1867 /*
1868 * Restore phase bits to 0 so an interrupted selection,
1869 * arbitration can resume.
1870 */
1871 NCR5380_write(TARGET_COMMAND_REG, 0);
1da177e4 1872
0d2cf867
FT
1873 /* Enable reselect interrupts */
1874 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
e9db3198
FT
1875#ifdef SUN3_SCSI_VME
1876 dregs->csr |= CSR_DMA_ENABLE;
1877#endif
0d2cf867 1878 return;
aff0cf9a 1879 /*
1da177e4 1880 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
aff0cf9a 1881 * operation, in violation of the SCSI spec so we can safely
1da177e4
LT
1882 * ignore SAVE/RESTORE pointers calls.
1883 *
aff0cf9a 1884 * Unfortunately, some disks violate the SCSI spec and
1da177e4 1885 * don't issue the required SAVE_POINTERS message before
aff0cf9a 1886 * disconnecting, and we have to break spec to remain
1da177e4
LT
1887 * compatible.
1888 */
1889 case SAVE_POINTERS:
1890 case RESTORE_POINTERS:
1891 /* Accept message by clearing ACK */
1892 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1893 break;
1894 case EXTENDED_MESSAGE:
c16df32e
FT
1895 /*
1896 * Start the message buffer with the EXTENDED_MESSAGE
1897 * byte, since spi_print_msg() wants the whole thing.
1898 */
1da177e4
LT
1899 extended_msg[0] = EXTENDED_MESSAGE;
1900 /* Accept first byte by clearing ACK */
1901 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
11d2f63b
FT
1902
1903 spin_unlock_irq(&hostdata->lock);
1904
b746545f 1905 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1da177e4
LT
1906
1907 len = 2;
1908 data = extended_msg + 1;
1909 phase = PHASE_MSGIN;
1910 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1911 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1912 (int)extended_msg[1],
1913 (int)extended_msg[2]);
1da177e4 1914
e0783ed3
FT
1915 if (!len && extended_msg[1] > 0 &&
1916 extended_msg[1] <= sizeof(extended_msg) - 2) {
1da177e4
LT
1917 /* Accept third byte by clearing ACK */
1918 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1919 len = extended_msg[1] - 1;
1920 data = extended_msg + 3;
1921 phase = PHASE_MSGIN;
1922
1923 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1924 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1925 len);
1da177e4
LT
1926
1927 switch (extended_msg[2]) {
1928 case EXTENDED_SDTR:
1929 case EXTENDED_WDTR:
1930 case EXTENDED_MODIFY_DATA_POINTER:
1931 case EXTENDED_EXTENDED_IDENTIFY:
1932 tmp = 0;
1933 }
1934 } else if (len) {
6a6ff4ac 1935 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1da177e4
LT
1936 tmp = 0;
1937 } else {
6a6ff4ac
FT
1938 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1939 extended_msg[2], extended_msg[1]);
1da177e4
LT
1940 tmp = 0;
1941 }
11d2f63b
FT
1942
1943 spin_lock_irq(&hostdata->lock);
1944 if (!hostdata->connected)
1945 return;
1946
1da177e4
LT
1947 /* Fall through to reject message */
1948
aff0cf9a
FT
1949 /*
1950 * If we get something weird that we aren't expecting,
1da177e4
LT
1951 * reject it.
1952 */
1953 default:
1954 if (!tmp) {
6a6ff4ac 1955 shost_printk(KERN_ERR, instance, "rejecting message ");
1abfd370 1956 spi_print_msg(extended_msg);
1da177e4
LT
1957 printk("\n");
1958 } else if (tmp != EXTENDED_MESSAGE)
017560fc 1959 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
1960 "rejecting unknown message %02x\n",
1961 tmp);
1da177e4 1962 else
017560fc 1963 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
1964 "rejecting unknown extended message code %02x, length %d\n",
1965 extended_msg[1], extended_msg[0]);
1da177e4
LT
1966
1967 msgout = MESSAGE_REJECT;
1968 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1969 break;
0d2cf867 1970 } /* switch (tmp) */
1da177e4
LT
1971 break;
1972 case PHASE_MSGOUT:
1973 len = 1;
1974 data = &msgout;
1975 hostdata->last_message = msgout;
1976 NCR5380_transfer_pio(instance, &phase, &len, &data);
1977 if (msgout == ABORT) {
1da177e4
LT
1978 hostdata->connected = NULL;
1979 cmd->result = DID_ERROR << 16;
677e0194 1980 complete_cmd(instance, cmd);
52d3e561 1981 maybe_release_dma_irq(instance);
1da177e4
LT
1982 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1983 return;
1984 }
1985 msgout = NOP;
1986 break;
1987 case PHASE_CMDOUT:
1988 len = cmd->cmd_len;
1989 data = cmd->cmnd;
aff0cf9a
FT
1990 /*
1991 * XXX for performance reasons, on machines with a
1992 * PSEUDO-DMA architecture we should probably
1993 * use the dma transfer function.
1da177e4
LT
1994 */
1995 NCR5380_transfer_pio(instance, &phase, &len, &data);
1da177e4
LT
1996 break;
1997 case PHASE_STATIN:
1998 len = 1;
1999 data = &tmp;
2000 NCR5380_transfer_pio(instance, &phase, &len, &data);
2001 cmd->SCp.Status = tmp;
2002 break;
2003 default:
6a6ff4ac 2004 shost_printk(KERN_ERR, instance, "unknown phase\n");
4dde8f7d 2005 NCR5380_dprint(NDEBUG_ANY, instance);
0d2cf867 2006 } /* switch(phase) */
686f3990 2007 } else {
11d2f63b 2008 spin_unlock_irq(&hostdata->lock);
d5d37a0a 2009 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 2010 spin_lock_irq(&hostdata->lock);
1da177e4 2011 }
11d2f63b 2012 }
1da177e4
LT
2013}
2014
2015/*
2016 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2017 *
aff0cf9a 2018 * Purpose : does reselection, initializing the instance->connected
594d4ba3
FT
2019 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2020 * nexus has been reestablished,
aff0cf9a 2021 *
1da177e4 2022 * Inputs : instance - this instance of the NCR5380.
1da177e4
LT
2023 */
2024
0d2cf867
FT
2025static void NCR5380_reselect(struct Scsi_Host *instance)
2026{
e8a60144 2027 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 2028 unsigned char target_mask;
e9db3198 2029 unsigned char lun;
1da177e4 2030 unsigned char msg[3];
32b26a10
FT
2031 struct NCR5380_cmd *ncmd;
2032 struct scsi_cmnd *tmp;
1da177e4
LT
2033
2034 /*
2035 * Disable arbitration, etc. since the host adapter obviously
2036 * lost, and tell an interrupted NCR5380_select() to restart.
2037 */
2038
2039 NCR5380_write(MODE_REG, MR_BASE);
1da177e4
LT
2040
2041 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
b746545f
FT
2042
2043 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
1da177e4 2044
aff0cf9a 2045 /*
1da177e4
LT
2046 * At this point, we have detected that our SCSI ID is on the bus,
2047 * SEL is true and BSY was false for at least one bus settle delay
2048 * (400 ns).
2049 *
2050 * We must assert BSY ourselves, until the target drops the SEL
2051 * signal.
2052 */
2053
2054 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
d5d37a0a 2055 if (NCR5380_poll_politely(hostdata,
72064a78
FT
2056 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2057 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2058 return;
2059 }
1da177e4
LT
2060 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2061
2062 /*
2063 * Wait for target to go into MSGIN.
1da177e4
LT
2064 */
2065
d5d37a0a 2066 if (NCR5380_poll_politely(hostdata,
72064a78
FT
2067 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2068 do_abort(instance);
2069 return;
2070 }
1da177e4 2071
e9db3198
FT
2072#ifdef CONFIG_SUN3
2073 /* acknowledge toggle to MSGIN */
2074 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
1da177e4 2075
e9db3198
FT
2076 /* peek at the byte without really hitting the bus */
2077 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2078#else
2079 {
2080 int len = 1;
2081 unsigned char *data = msg;
2082 unsigned char phase = PHASE_MSGIN;
2083
2084 NCR5380_transfer_pio(instance, &phase, &len, &data);
2085
2086 if (len) {
2087 do_abort(instance);
2088 return;
2089 }
72064a78 2090 }
e9db3198 2091#endif /* CONFIG_SUN3 */
72064a78 2092
1da177e4 2093 if (!(msg[0] & 0x80)) {
72064a78 2094 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
1abfd370 2095 spi_print_msg(msg);
72064a78
FT
2096 printk("\n");
2097 do_abort(instance);
2098 return;
2099 }
2100 lun = msg[0] & 0x07;
1da177e4 2101
72064a78
FT
2102 /*
2103 * We need to add code for SCSI-II to track which devices have
2104 * I_T_L_Q nexuses established, and which have simple I_T_L
2105 * nexuses so we can chose to do additional data transfer.
2106 */
1da177e4 2107
72064a78
FT
2108 /*
2109 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2110 * just reestablished, and remove it from the disconnected queue.
2111 */
1da177e4 2112
32b26a10
FT
2113 tmp = NULL;
2114 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2115 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2116
2117 if (target_mask == (1 << scmd_id(cmd)) &&
2118 lun == (u8)cmd->device->lun) {
2119 list_del(&ncmd->list);
2120 tmp = cmd;
72064a78 2121 break;
1da177e4
LT
2122 }
2123 }
0d3d9a42
FT
2124
2125 if (tmp) {
2126 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2127 "reselect: removed %p from disconnected queue\n", tmp);
2128 } else {
72064a78
FT
2129 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2130 target_mask, lun);
2131 /*
0d2cf867
FT
2132 * Since we have an established nexus that we can't do anything
2133 * with, we must abort it.
72064a78 2134 */
1da177e4 2135 do_abort(instance);
72064a78 2136 return;
1da177e4 2137 }
72064a78 2138
e9db3198 2139#ifdef CONFIG_SUN3
4a98f896
FT
2140 if (sun3_dma_setup_done != tmp) {
2141 int count;
e9db3198
FT
2142
2143 if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) {
4a98f896
FT
2144 ++tmp->SCp.buffer;
2145 --tmp->SCp.buffers_residual;
2146 tmp->SCp.this_residual = tmp->SCp.buffer->length;
2147 tmp->SCp.ptr = sg_virt(tmp->SCp.buffer);
e9db3198
FT
2148 }
2149
4a98f896
FT
2150 count = sun3scsi_dma_xfer_len(hostdata, tmp);
2151
2152 if (count > 0) {
2153 if (rq_data_dir(tmp->request))
2154 sun3scsi_dma_send_setup(hostdata,
2155 tmp->SCp.ptr, count);
2156 else
2157 sun3scsi_dma_recv_setup(hostdata,
2158 tmp->SCp.ptr, count);
e9db3198
FT
2159 sun3_dma_setup_done = tmp;
2160 }
2161 }
2162
2163 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2164#endif /* CONFIG_SUN3 */
2165
72064a78
FT
2166 /* Accept message by clearing ACK */
2167 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2168
2169 hostdata->connected = tmp;
c4ec6f92
FT
2170 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2171 scmd_id(tmp), tmp->device->lun);
1da177e4
LT
2172}
2173
8b00c3d5
FT
2174/**
2175 * list_find_cmd - test for presence of a command in a linked list
2176 * @haystack: list of commands
2177 * @needle: command to search for
2178 */
2179
2180static bool list_find_cmd(struct list_head *haystack,
2181 struct scsi_cmnd *needle)
2182{
2183 struct NCR5380_cmd *ncmd;
2184
2185 list_for_each_entry(ncmd, haystack, list)
2186 if (NCR5380_to_scmd(ncmd) == needle)
2187 return true;
2188 return false;
2189}
2190
2191/**
2192 * list_remove_cmd - remove a command from linked list
2193 * @haystack: list of commands
2194 * @needle: command to remove
2195 */
2196
2197static bool list_del_cmd(struct list_head *haystack,
2198 struct scsi_cmnd *needle)
2199{
2200 if (list_find_cmd(haystack, needle)) {
2201 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2202
2203 list_del(&ncmd->list);
2204 return true;
2205 }
2206 return false;
2207}
2208
2209/**
2210 * NCR5380_abort - scsi host eh_abort_handler() method
2211 * @cmd: the command to be aborted
2212 *
2213 * Try to abort a given command by removing it from queues and/or sending
2214 * the target an abort message. This may not succeed in causing a target
2215 * to abort the command. Nonetheless, the low-level driver must forget about
2216 * the command because the mid-layer reclaims it and it may be re-issued.
2217 *
2218 * The normal path taken by a command is as follows. For EH we trace this
2219 * same path to locate and abort the command.
2220 *
2221 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2222 * [disconnected -> connected ->]...
2223 * [autosense -> connected ->] done
2224 *
8b00c3d5
FT
2225 * If cmd was not found at all then presumably it has already been completed,
2226 * in which case return SUCCESS to try to avoid further EH measures.
dc183965 2227 *
8b00c3d5 2228 * If the command has not completed yet, we must not fail to find it.
dc183965
FT
2229 * We have no option but to forget the aborted command (even if it still
2230 * lacks sense data). The mid-layer may re-issue a command that is in error
2231 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2232 * this driver are such that a command can appear on one queue only.
71a00593
FT
2233 *
2234 * The lock protects driver data structures, but EH handlers also use it
2235 * to serialize their own execution and prevent their own re-entry.
1da177e4
LT
2236 */
2237
710ddd0d
FT
2238static int NCR5380_abort(struct scsi_cmnd *cmd)
2239{
1da177e4 2240 struct Scsi_Host *instance = cmd->device->host;
e8a60144 2241 struct NCR5380_hostdata *hostdata = shost_priv(instance);
11d2f63b 2242 unsigned long flags;
8b00c3d5 2243 int result = SUCCESS;
1fa6b5fb 2244
11d2f63b
FT
2245 spin_lock_irqsave(&hostdata->lock, flags);
2246
32b26a10 2247#if (NDEBUG & NDEBUG_ANY)
8b00c3d5 2248 scmd_printk(KERN_INFO, cmd, __func__);
32b26a10 2249#endif
e5c3fddf
FT
2250 NCR5380_dprint(NDEBUG_ANY, instance);
2251 NCR5380_dprint_phase(NDEBUG_ANY, instance);
1da177e4 2252
8b00c3d5
FT
2253 if (list_del_cmd(&hostdata->unissued, cmd)) {
2254 dsprintk(NDEBUG_ABORT, instance,
2255 "abort: removed %p from issue queue\n", cmd);
2256 cmd->result = DID_ABORT << 16;
2257 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
dc183965 2258 goto out;
8b00c3d5
FT
2259 }
2260
707d62b3
FT
2261 if (hostdata->selecting == cmd) {
2262 dsprintk(NDEBUG_ABORT, instance,
2263 "abort: cmd %p == selecting\n", cmd);
2264 hostdata->selecting = NULL;
2265 cmd->result = DID_ABORT << 16;
2266 complete_cmd(instance, cmd);
2267 goto out;
2268 }
2269
8b00c3d5
FT
2270 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2271 dsprintk(NDEBUG_ABORT, instance,
2272 "abort: removed %p from disconnected list\n", cmd);
71a00593
FT
2273 /* Can't call NCR5380_select() and send ABORT because that
2274 * means releasing the lock. Need a bus reset.
2275 */
dc183965
FT
2276 set_host_byte(cmd, DID_ERROR);
2277 complete_cmd(instance, cmd);
71a00593
FT
2278 result = FAILED;
2279 goto out;
8b00c3d5
FT
2280 }
2281
2282 if (hostdata->connected == cmd) {
2283 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2284 hostdata->connected = NULL;
8b00c3d5 2285 hostdata->dma_len = 0;
8b00c3d5
FT
2286 if (do_abort(instance)) {
2287 set_host_byte(cmd, DID_ERROR);
2288 complete_cmd(instance, cmd);
2289 result = FAILED;
2290 goto out;
2291 }
2292 set_host_byte(cmd, DID_ABORT);
dc183965
FT
2293 complete_cmd(instance, cmd);
2294 goto out;
2295 }
2296
2297 if (list_del_cmd(&hostdata->autosense, cmd)) {
2298 dsprintk(NDEBUG_ABORT, instance,
2299 "abort: removed %p from sense queue\n", cmd);
2300 set_host_byte(cmd, DID_ERROR);
8b00c3d5
FT
2301 complete_cmd(instance, cmd);
2302 }
2303
2304out:
2305 if (result == FAILED)
2306 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2307 else
2308 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2309
2310 queue_work(hostdata->work_q, &hostdata->main_task);
52d3e561 2311 maybe_release_dma_irq(instance);
11d2f63b 2312 spin_unlock_irqrestore(&hostdata->lock, flags);
32b26a10 2313
8b00c3d5 2314 return result;
1da177e4
LT
2315}
2316
2317
3be1b3ea
FT
2318/**
2319 * NCR5380_bus_reset - reset the SCSI bus
2320 * @cmd: SCSI command undergoing EH
1da177e4 2321 *
3be1b3ea 2322 * Returns SUCCESS
1da177e4
LT
2323 */
2324
710ddd0d 2325static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
68b3aa7c
JG
2326{
2327 struct Scsi_Host *instance = cmd->device->host;
11d2f63b 2328 struct NCR5380_hostdata *hostdata = shost_priv(instance);
62717f53 2329 int i;
11d2f63b 2330 unsigned long flags;
62717f53 2331 struct NCR5380_cmd *ncmd;
68b3aa7c 2332
11d2f63b 2333 spin_lock_irqsave(&hostdata->lock, flags);
3be1b3ea
FT
2334
2335#if (NDEBUG & NDEBUG_ANY)
62717f53 2336 scmd_printk(KERN_INFO, cmd, __func__);
3be1b3ea 2337#endif
e5c3fddf
FT
2338 NCR5380_dprint(NDEBUG_ANY, instance);
2339 NCR5380_dprint_phase(NDEBUG_ANY, instance);
68b3aa7c 2340
68b3aa7c 2341 do_reset(instance);
3be1b3ea 2342
62717f53
FT
2343 /* reset NCR registers */
2344 NCR5380_write(MODE_REG, MR_BASE);
2345 NCR5380_write(TARGET_COMMAND_REG, 0);
2346 NCR5380_write(SELECT_ENABLE_REG, 0);
2347
2348 /* After the reset, there are no more connected or disconnected commands
2349 * and no busy units; so clear the low-level status here to avoid
2350 * conflicts when the mid-level code tries to wake up the affected
2351 * commands!
2352 */
2353
1884c283
FT
2354 if (list_del_cmd(&hostdata->unissued, cmd)) {
2355 cmd->result = DID_RESET << 16;
2356 cmd->scsi_done(cmd);
2357 }
2358
2359 if (hostdata->selecting) {
2360 hostdata->selecting->result = DID_RESET << 16;
2361 complete_cmd(instance, hostdata->selecting);
2362 hostdata->selecting = NULL;
2363 }
62717f53
FT
2364
2365 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2366 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2367
2368 set_host_byte(cmd, DID_RESET);
216fad91 2369 complete_cmd(instance, cmd);
62717f53 2370 }
1884c283 2371 INIT_LIST_HEAD(&hostdata->disconnected);
62717f53
FT
2372
2373 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2374 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2375
2376 set_host_byte(cmd, DID_RESET);
2377 cmd->scsi_done(cmd);
2378 }
1884c283 2379 INIT_LIST_HEAD(&hostdata->autosense);
62717f53
FT
2380
2381 if (hostdata->connected) {
2382 set_host_byte(hostdata->connected, DID_RESET);
2383 complete_cmd(instance, hostdata->connected);
2384 hostdata->connected = NULL;
2385 }
2386
62717f53
FT
2387 for (i = 0; i < 8; ++i)
2388 hostdata->busy[i] = 0;
62717f53 2389 hostdata->dma_len = 0;
62717f53
FT
2390
2391 queue_work(hostdata->work_q, &hostdata->main_task);
52d3e561 2392 maybe_release_dma_irq(instance);
11d2f63b 2393 spin_unlock_irqrestore(&hostdata->lock, flags);
1da177e4 2394
1da177e4
LT
2395 return SUCCESS;
2396}