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Commit | Line | Data |
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aff0cf9a | 1 | /* |
1da177e4 | 2 | * NCR 5380 generic driver routines. These should make it *trivial* |
594d4ba3 FT |
3 | * to implement 5380 SCSI drivers under Linux with a non-trantor |
4 | * architecture. | |
1da177e4 | 5 | * |
594d4ba3 | 6 | * Note that these routines also work with NR53c400 family chips. |
1da177e4 LT |
7 | * |
8 | * Copyright 1993, Drew Eckhardt | |
594d4ba3 FT |
9 | * Visionary Computing |
10 | * (Unix and Linux consulting and custom programming) | |
11 | * drew@colorado.edu | |
12 | * +1 (303) 666-5836 | |
1da177e4 | 13 | * |
aff0cf9a | 14 | * For more information, please consult |
1da177e4 LT |
15 | * |
16 | * NCR 5380 Family | |
17 | * SCSI Protocol Controller | |
18 | * Databook | |
19 | * | |
20 | * NCR Microelectronics | |
21 | * 1635 Aeroplaza Drive | |
22 | * Colorado Springs, CO 80916 | |
23 | * 1+ (719) 578-3400 | |
24 | * 1+ (800) 334-5454 | |
25 | */ | |
26 | ||
27 | /* | |
c16df32e FT |
28 | * With contributions from Ray Van Tassle, Ingmar Baumgart, |
29 | * Ronald van Cuijlenborg, Alan Cox and others. | |
1da177e4 LT |
30 | */ |
31 | ||
32 | /* | |
aff0cf9a | 33 | * Further development / testing that should be done : |
1da177e4 | 34 | * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete |
594d4ba3 FT |
35 | * code so that everything does the same thing that's done at the |
36 | * end of a pseudo-DMA read operation. | |
1da177e4 LT |
37 | * |
38 | * 2. Fix REAL_DMA (interrupt driven, polled works fine) - | |
594d4ba3 FT |
39 | * basically, transfer size needs to be reduced by one |
40 | * and the last byte read as is done with PSEUDO_DMA. | |
aff0cf9a FT |
41 | * |
42 | * 4. Test SCSI-II tagged queueing (I have no devices which support | |
594d4ba3 | 43 | * tagged queueing) |
1da177e4 LT |
44 | */ |
45 | ||
1da177e4 | 46 | #ifndef notyet |
1da177e4 LT |
47 | #undef REAL_DMA |
48 | #endif | |
49 | ||
1da177e4 LT |
50 | #ifdef BOARD_REQUIRES_NO_DELAY |
51 | #define io_recovery_delay(x) | |
52 | #else | |
53 | #define io_recovery_delay(x) udelay(x) | |
54 | #endif | |
55 | ||
56 | /* | |
57 | * Design | |
58 | * | |
aff0cf9a | 59 | * This is a generic 5380 driver. To use it on a different platform, |
1da177e4 | 60 | * one simply writes appropriate system specific macros (ie, data |
aff0cf9a | 61 | * transfer - some PC's will use the I/O bus, 68K's must use |
1da177e4 LT |
62 | * memory mapped) and drops this file in their 'C' wrapper. |
63 | * | |
aff0cf9a | 64 | * As far as command queueing, two queues are maintained for |
1da177e4 | 65 | * each 5380 in the system - commands that haven't been issued yet, |
aff0cf9a FT |
66 | * and commands that are currently executing. This means that an |
67 | * unlimited number of commands may be queued, letting | |
68 | * more commands propagate from the higher driver levels giving higher | |
69 | * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, | |
70 | * allowing multiple commands to propagate all the way to a SCSI-II device | |
1da177e4 LT |
71 | * while a command is already executing. |
72 | * | |
73 | * | |
aff0cf9a | 74 | * Issues specific to the NCR5380 : |
1da177e4 | 75 | * |
aff0cf9a FT |
76 | * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead |
77 | * piece of hardware that requires you to sit in a loop polling for | |
78 | * the REQ signal as long as you are connected. Some devices are | |
79 | * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect | |
686f3990 | 80 | * while doing long seek operations. [...] These |
1da177e4 LT |
81 | * broken devices are the exception rather than the rule and I'd rather |
82 | * spend my time optimizing for the normal case. | |
83 | * | |
84 | * Architecture : | |
85 | * | |
86 | * At the heart of the design is a coroutine, NCR5380_main, | |
87 | * which is started from a workqueue for each NCR5380 host in the | |
88 | * system. It attempts to establish I_T_L or I_T_L_Q nexuses by | |
89 | * removing the commands from the issue queue and calling | |
aff0cf9a | 90 | * NCR5380_select() if a nexus is not established. |
1da177e4 LT |
91 | * |
92 | * Once a nexus is established, the NCR5380_information_transfer() | |
93 | * phase goes through the various phases as instructed by the target. | |
94 | * if the target goes into MSG IN and sends a DISCONNECT message, | |
95 | * the command structure is placed into the per instance disconnected | |
aff0cf9a | 96 | * queue, and NCR5380_main tries to find more work. If the target is |
1da177e4 LT |
97 | * idle for too long, the system will try to sleep. |
98 | * | |
99 | * If a command has disconnected, eventually an interrupt will trigger, | |
100 | * calling NCR5380_intr() which will in turn call NCR5380_reselect | |
101 | * to reestablish a nexus. This will run main if necessary. | |
102 | * | |
aff0cf9a | 103 | * On command termination, the done function will be called as |
1da177e4 LT |
104 | * appropriate. |
105 | * | |
aff0cf9a | 106 | * SCSI pointers are maintained in the SCp field of SCSI command |
1da177e4 LT |
107 | * structures, being initialized after the command is connected |
108 | * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. | |
109 | * Note that in violation of the standard, an implicit SAVE POINTERS operation | |
110 | * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. | |
111 | */ | |
112 | ||
113 | /* | |
114 | * Using this file : | |
115 | * This file a skeleton Linux SCSI driver for the NCR 5380 series | |
aff0cf9a | 116 | * of chips. To use it, you write an architecture specific functions |
1da177e4 LT |
117 | * and macros and include this file in your driver. |
118 | * | |
aff0cf9a FT |
119 | * These macros control options : |
120 | * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be | |
594d4ba3 | 121 | * defined. |
aff0cf9a | 122 | * |
1da177e4 | 123 | * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically |
594d4ba3 | 124 | * for commands that return with a CHECK CONDITION status. |
1da177e4 LT |
125 | * |
126 | * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential | |
594d4ba3 | 127 | * transceivers. |
1da177e4 LT |
128 | * |
129 | * DONT_USE_INTR - if defined, never use interrupts, even if we probe or | |
594d4ba3 | 130 | * override-configure an IRQ. |
1da177e4 | 131 | * |
1da177e4 LT |
132 | * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases. |
133 | * | |
134 | * REAL_DMA - if defined, REAL DMA is used during the data transfer phases. | |
135 | * | |
136 | * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't | |
594d4ba3 FT |
137 | * rely on phase mismatch and EOP interrupts to determine end |
138 | * of phase. | |
1da177e4 | 139 | * |
1da177e4 | 140 | * These macros MUST be defined : |
aff0cf9a | 141 | * |
1da177e4 LT |
142 | * NCR5380_read(register) - read from the specified register |
143 | * | |
aff0cf9a | 144 | * NCR5380_write(register, value) - write to the specific register |
1da177e4 | 145 | * |
aff0cf9a | 146 | * NCR5380_implementation_fields - additional fields needed for this |
594d4ba3 | 147 | * specific implementation of the NCR5380 |
1da177e4 LT |
148 | * |
149 | * Either real DMA *or* pseudo DMA may be implemented | |
aff0cf9a | 150 | * REAL functions : |
1da177e4 | 151 | * NCR5380_REAL_DMA should be defined if real DMA is to be used. |
aff0cf9a | 152 | * Note that the DMA setup functions should return the number of bytes |
594d4ba3 | 153 | * that they were able to program the controller for. |
1da177e4 | 154 | * |
aff0cf9a | 155 | * Also note that generic i386/PC versions of these macros are |
594d4ba3 FT |
156 | * available as NCR5380_i386_dma_write_setup, |
157 | * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual. | |
1da177e4 LT |
158 | * |
159 | * NCR5380_dma_write_setup(instance, src, count) - initialize | |
160 | * NCR5380_dma_read_setup(instance, dst, count) - initialize | |
161 | * NCR5380_dma_residual(instance); - residual count | |
162 | * | |
163 | * PSEUDO functions : | |
164 | * NCR5380_pwrite(instance, src, count) | |
165 | * NCR5380_pread(instance, dst, count); | |
166 | * | |
167 | * The generic driver is initialized by calling NCR5380_init(instance), | |
aff0cf9a | 168 | * after setting the appropriate host specific fields and ID. If the |
1da177e4 LT |
169 | * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance, |
170 | * possible) function may be used. | |
171 | */ | |
172 | ||
54d8fe44 FT |
173 | static int do_abort(struct Scsi_Host *); |
174 | static void do_reset(struct Scsi_Host *); | |
1da177e4 | 175 | |
c16df32e | 176 | /** |
594d4ba3 FT |
177 | * initialize_SCp - init the scsi pointer field |
178 | * @cmd: command block to set up | |
1da177e4 | 179 | * |
594d4ba3 | 180 | * Set up the internal fields in the SCSI command. |
1da177e4 LT |
181 | */ |
182 | ||
710ddd0d | 183 | static inline void initialize_SCp(struct scsi_cmnd *cmd) |
1da177e4 | 184 | { |
aff0cf9a FT |
185 | /* |
186 | * Initialize the Scsi Pointer field so that all of the commands in the | |
1da177e4 LT |
187 | * various queues are valid. |
188 | */ | |
189 | ||
9e0fe44d BH |
190 | if (scsi_bufflen(cmd)) { |
191 | cmd->SCp.buffer = scsi_sglist(cmd); | |
192 | cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; | |
45711f1a | 193 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
1da177e4 LT |
194 | cmd->SCp.this_residual = cmd->SCp.buffer->length; |
195 | } else { | |
196 | cmd->SCp.buffer = NULL; | |
197 | cmd->SCp.buffers_residual = 0; | |
9e0fe44d BH |
198 | cmd->SCp.ptr = NULL; |
199 | cmd->SCp.this_residual = 0; | |
1da177e4 | 200 | } |
f27db8eb FT |
201 | |
202 | cmd->SCp.Status = 0; | |
203 | cmd->SCp.Message = 0; | |
1da177e4 LT |
204 | } |
205 | ||
206 | /** | |
b32ade12 | 207 | * NCR5380_poll_politely2 - wait for two chip register values |
2f854b82 | 208 | * @instance: controller to poll |
b32ade12 FT |
209 | * @reg1: 5380 register to poll |
210 | * @bit1: Bitmask to check | |
211 | * @val1: Expected value | |
212 | * @reg2: Second 5380 register to poll | |
213 | * @bit2: Second bitmask to check | |
214 | * @val2: Second expected value | |
2f854b82 FT |
215 | * @wait: Time-out in jiffies |
216 | * | |
217 | * Polls the chip in a reasonably efficient manner waiting for an | |
218 | * event to occur. After a short quick poll we begin to yield the CPU | |
219 | * (if possible). In irq contexts the time-out is arbitrarily limited. | |
220 | * Callers may hold locks as long as they are held in irq mode. | |
221 | * | |
b32ade12 | 222 | * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. |
1da177e4 | 223 | */ |
2f854b82 | 224 | |
b32ade12 FT |
225 | static int NCR5380_poll_politely2(struct Scsi_Host *instance, |
226 | int reg1, int bit1, int val1, | |
227 | int reg2, int bit2, int val2, int wait) | |
1da177e4 | 228 | { |
2f854b82 FT |
229 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
230 | unsigned long deadline = jiffies + wait; | |
231 | unsigned long n; | |
232 | ||
233 | /* Busy-wait for up to 10 ms */ | |
234 | n = min(10000U, jiffies_to_usecs(wait)); | |
235 | n *= hostdata->accesses_per_ms; | |
b32ade12 | 236 | n /= 2000; |
2f854b82 | 237 | do { |
b32ade12 FT |
238 | if ((NCR5380_read(reg1) & bit1) == val1) |
239 | return 0; | |
240 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 LT |
241 | return 0; |
242 | cpu_relax(); | |
2f854b82 FT |
243 | } while (n--); |
244 | ||
245 | if (irqs_disabled() || in_interrupt()) | |
246 | return -ETIMEDOUT; | |
247 | ||
248 | /* Repeatedly sleep for 1 ms until deadline */ | |
249 | while (time_is_after_jiffies(deadline)) { | |
250 | schedule_timeout_uninterruptible(1); | |
b32ade12 FT |
251 | if ((NCR5380_read(reg1) & bit1) == val1) |
252 | return 0; | |
253 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 | 254 | return 0; |
1da177e4 | 255 | } |
2f854b82 | 256 | |
1da177e4 LT |
257 | return -ETIMEDOUT; |
258 | } | |
259 | ||
b32ade12 FT |
260 | static inline int NCR5380_poll_politely(struct Scsi_Host *instance, |
261 | int reg, int bit, int val, int wait) | |
262 | { | |
263 | return NCR5380_poll_politely2(instance, reg, bit, val, | |
264 | reg, bit, val, wait); | |
265 | } | |
266 | ||
1da177e4 LT |
267 | static struct { |
268 | unsigned char value; | |
269 | const char *name; | |
702809ce | 270 | } phases[] __maybe_unused = { |
aff0cf9a FT |
271 | {PHASE_DATAOUT, "DATAOUT"}, |
272 | {PHASE_DATAIN, "DATAIN"}, | |
273 | {PHASE_CMDOUT, "CMDOUT"}, | |
274 | {PHASE_STATIN, "STATIN"}, | |
275 | {PHASE_MSGOUT, "MSGOUT"}, | |
276 | {PHASE_MSGIN, "MSGIN"}, | |
1da177e4 LT |
277 | {PHASE_UNKNOWN, "UNKNOWN"} |
278 | }; | |
279 | ||
185a7a1c | 280 | #if NDEBUG |
1da177e4 LT |
281 | static struct { |
282 | unsigned char mask; | |
283 | const char *name; | |
aff0cf9a FT |
284 | } signals[] = { |
285 | {SR_DBP, "PARITY"}, | |
286 | {SR_RST, "RST"}, | |
287 | {SR_BSY, "BSY"}, | |
288 | {SR_REQ, "REQ"}, | |
289 | {SR_MSG, "MSG"}, | |
290 | {SR_CD, "CD"}, | |
291 | {SR_IO, "IO"}, | |
292 | {SR_SEL, "SEL"}, | |
1da177e4 | 293 | {0, NULL} |
aff0cf9a | 294 | }, |
1da177e4 | 295 | basrs[] = { |
aff0cf9a FT |
296 | {BASR_ATN, "ATN"}, |
297 | {BASR_ACK, "ACK"}, | |
1da177e4 | 298 | {0, NULL} |
aff0cf9a FT |
299 | }, |
300 | icrs[] = { | |
301 | {ICR_ASSERT_RST, "ASSERT RST"}, | |
302 | {ICR_ASSERT_ACK, "ASSERT ACK"}, | |
303 | {ICR_ASSERT_BSY, "ASSERT BSY"}, | |
304 | {ICR_ASSERT_SEL, "ASSERT SEL"}, | |
305 | {ICR_ASSERT_ATN, "ASSERT ATN"}, | |
306 | {ICR_ASSERT_DATA, "ASSERT DATA"}, | |
1da177e4 | 307 | {0, NULL} |
aff0cf9a FT |
308 | }, |
309 | mrs[] = { | |
310 | {MR_BLOCK_DMA_MODE, "MODE BLOCK DMA"}, | |
311 | {MR_TARGET, "MODE TARGET"}, | |
312 | {MR_ENABLE_PAR_CHECK, "MODE PARITY CHECK"}, | |
313 | {MR_ENABLE_PAR_INTR, "MODE PARITY INTR"}, | |
314 | {MR_MONITOR_BSY, "MODE MONITOR BSY"}, | |
315 | {MR_DMA_MODE, "MODE DMA"}, | |
316 | {MR_ARBITRATE, "MODE ARBITRATION"}, | |
1da177e4 LT |
317 | {0, NULL} |
318 | }; | |
319 | ||
320 | /** | |
594d4ba3 FT |
321 | * NCR5380_print - print scsi bus signals |
322 | * @instance: adapter state to dump | |
1da177e4 | 323 | * |
594d4ba3 | 324 | * Print the SCSI bus signals for debugging purposes |
1da177e4 LT |
325 | */ |
326 | ||
327 | static void NCR5380_print(struct Scsi_Host *instance) | |
328 | { | |
1da177e4 | 329 | unsigned char status, data, basr, mr, icr, i; |
1da177e4 LT |
330 | |
331 | data = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
332 | status = NCR5380_read(STATUS_REG); | |
333 | mr = NCR5380_read(MODE_REG); | |
334 | icr = NCR5380_read(INITIATOR_COMMAND_REG); | |
335 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
336 | ||
337 | printk("STATUS_REG: %02x ", status); | |
338 | for (i = 0; signals[i].mask; ++i) | |
339 | if (status & signals[i].mask) | |
340 | printk(",%s", signals[i].name); | |
341 | printk("\nBASR: %02x ", basr); | |
342 | for (i = 0; basrs[i].mask; ++i) | |
343 | if (basr & basrs[i].mask) | |
344 | printk(",%s", basrs[i].name); | |
345 | printk("\nICR: %02x ", icr); | |
346 | for (i = 0; icrs[i].mask; ++i) | |
347 | if (icr & icrs[i].mask) | |
348 | printk(",%s", icrs[i].name); | |
349 | printk("\nMODE: %02x ", mr); | |
350 | for (i = 0; mrs[i].mask; ++i) | |
351 | if (mr & mrs[i].mask) | |
352 | printk(",%s", mrs[i].name); | |
353 | printk("\n"); | |
354 | } | |
355 | ||
356 | ||
c16df32e | 357 | /** |
594d4ba3 FT |
358 | * NCR5380_print_phase - show SCSI phase |
359 | * @instance: adapter to dump | |
1da177e4 | 360 | * |
594d4ba3 | 361 | * Print the current SCSI phase for debugging purposes |
1da177e4 LT |
362 | */ |
363 | ||
364 | static void NCR5380_print_phase(struct Scsi_Host *instance) | |
365 | { | |
1da177e4 LT |
366 | unsigned char status; |
367 | int i; | |
1da177e4 LT |
368 | |
369 | status = NCR5380_read(STATUS_REG); | |
370 | if (!(status & SR_REQ)) | |
6a6ff4ac | 371 | shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); |
1da177e4 LT |
372 | else { |
373 | for (i = 0; (phases[i].value != PHASE_UNKNOWN) && (phases[i].value != (status & PHASE_MASK)); ++i); | |
6a6ff4ac | 374 | shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); |
1da177e4 LT |
375 | } |
376 | } | |
377 | #endif | |
378 | ||
1da177e4 | 379 | |
d5f7e65d | 380 | static int probe_irq __initdata; |
1da177e4 LT |
381 | |
382 | /** | |
594d4ba3 FT |
383 | * probe_intr - helper for IRQ autoprobe |
384 | * @irq: interrupt number | |
385 | * @dev_id: unused | |
386 | * @regs: unused | |
1da177e4 | 387 | * |
594d4ba3 FT |
388 | * Set a flag to indicate the IRQ in question was received. This is |
389 | * used by the IRQ probe code. | |
1da177e4 | 390 | */ |
aff0cf9a | 391 | |
7d12e780 | 392 | static irqreturn_t __init probe_intr(int irq, void *dev_id) |
1da177e4 LT |
393 | { |
394 | probe_irq = irq; | |
395 | return IRQ_HANDLED; | |
396 | } | |
397 | ||
398 | /** | |
594d4ba3 FT |
399 | * NCR5380_probe_irq - find the IRQ of an NCR5380 |
400 | * @instance: NCR5380 controller | |
401 | * @possible: bitmask of ISA IRQ lines | |
1da177e4 | 402 | * |
594d4ba3 FT |
403 | * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ |
404 | * and then looking to see what interrupt actually turned up. | |
1da177e4 LT |
405 | */ |
406 | ||
702809ce AM |
407 | static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance, |
408 | int possible) | |
1da177e4 | 409 | { |
e8a60144 | 410 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
411 | unsigned long timeout; |
412 | int trying_irqs, i, mask; | |
1da177e4 | 413 | |
22f5f10d | 414 | for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
4909cc2b | 415 | if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0)) |
1da177e4 LT |
416 | trying_irqs |= mask; |
417 | ||
4e5a800c | 418 | timeout = jiffies + msecs_to_jiffies(250); |
22f5f10d | 419 | probe_irq = NO_IRQ; |
1da177e4 LT |
420 | |
421 | /* | |
422 | * A interrupt is triggered whenever BSY = false, SEL = true | |
aff0cf9a | 423 | * and a bit set in the SELECT_ENABLE_REG is asserted on the |
1da177e4 LT |
424 | * SCSI bus. |
425 | * | |
426 | * Note that the bus is only driven when the phase control signals | |
427 | * (I/O, C/D, and MSG) match those in the TCR, so we must reset that | |
428 | * to zero. | |
429 | */ | |
430 | ||
431 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
432 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
433 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
434 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL); | |
435 | ||
22f5f10d | 436 | while (probe_irq == NO_IRQ && time_before(jiffies, timeout)) |
a9a3047d | 437 | schedule_timeout_uninterruptible(1); |
aff0cf9a | 438 | |
1da177e4 LT |
439 | NCR5380_write(SELECT_ENABLE_REG, 0); |
440 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
441 | ||
22f5f10d | 442 | for (i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
1da177e4 LT |
443 | if (trying_irqs & mask) |
444 | free_irq(i, NULL); | |
445 | ||
446 | return probe_irq; | |
447 | } | |
448 | ||
449 | /** | |
594d4ba3 FT |
450 | * NCR58380_info - report driver and host information |
451 | * @instance: relevant scsi host instance | |
1da177e4 | 452 | * |
594d4ba3 | 453 | * For use as the host template info() handler. |
1da177e4 LT |
454 | */ |
455 | ||
8c32513b | 456 | static const char *NCR5380_info(struct Scsi_Host *instance) |
1da177e4 | 457 | { |
8c32513b FT |
458 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
459 | ||
460 | return hostdata->info; | |
461 | } | |
462 | ||
463 | static void prepare_info(struct Scsi_Host *instance) | |
464 | { | |
465 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
466 | ||
467 | snprintf(hostdata->info, sizeof(hostdata->info), | |
468 | "%s, io_port 0x%lx, n_io_port %d, " | |
469 | "base 0x%lx, irq %d, " | |
470 | "can_queue %d, cmd_per_lun %d, " | |
471 | "sg_tablesize %d, this_id %d, " | |
be3f4121 | 472 | "flags { %s%s%s}, " |
8c32513b FT |
473 | "options { %s} ", |
474 | instance->hostt->name, instance->io_port, instance->n_io_port, | |
475 | instance->base, instance->irq, | |
476 | instance->can_queue, instance->cmd_per_lun, | |
477 | instance->sg_tablesize, instance->this_id, | |
55181be8 | 478 | hostdata->flags & FLAG_NO_DMA_FIXUP ? "NO_DMA_FIXUP " : "", |
8c32513b | 479 | hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", |
9c3f0e2b | 480 | hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "", |
1da177e4 | 481 | #ifdef AUTOPROBE_IRQ |
8c32513b | 482 | "AUTOPROBE_IRQ " |
1da177e4 | 483 | #endif |
1da177e4 | 484 | #ifdef DIFFERENTIAL |
8c32513b | 485 | "DIFFERENTIAL " |
1da177e4 LT |
486 | #endif |
487 | #ifdef REAL_DMA | |
8c32513b | 488 | "REAL_DMA " |
1da177e4 LT |
489 | #endif |
490 | #ifdef REAL_DMA_POLL | |
8c32513b | 491 | "REAL_DMA_POLL " |
1da177e4 LT |
492 | #endif |
493 | #ifdef PARITY | |
8c32513b | 494 | "PARITY " |
1da177e4 LT |
495 | #endif |
496 | #ifdef PSEUDO_DMA | |
8c32513b | 497 | "PSEUDO_DMA " |
8c32513b FT |
498 | #endif |
499 | ""); | |
1da177e4 LT |
500 | } |
501 | ||
a9c2dc43 | 502 | #ifdef PSEUDO_DMA |
dd7ab71b AV |
503 | static int __maybe_unused NCR5380_write_info(struct Scsi_Host *instance, |
504 | char *buffer, int length) | |
505 | { | |
a9c2dc43 FT |
506 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
507 | ||
508 | hostdata->spin_max_r = 0; | |
509 | hostdata->spin_max_w = 0; | |
510 | return 0; | |
dd7ab71b | 511 | } |
1da177e4 | 512 | |
dd7ab71b AV |
513 | static int __maybe_unused NCR5380_show_info(struct seq_file *m, |
514 | struct Scsi_Host *instance) | |
1da177e4 | 515 | { |
e8a60144 | 516 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 517 | |
0c3de38f | 518 | seq_printf(m, "Highwater I/O busy spin counts: write %d, read %d\n", |
a9c2dc43 | 519 | hostdata->spin_max_w, hostdata->spin_max_r); |
dd7ab71b | 520 | return 0; |
1da177e4 | 521 | } |
e5c3fddf | 522 | #endif |
1da177e4 LT |
523 | |
524 | /** | |
594d4ba3 FT |
525 | * NCR5380_init - initialise an NCR5380 |
526 | * @instance: adapter to configure | |
527 | * @flags: control flags | |
1da177e4 | 528 | * |
594d4ba3 FT |
529 | * Initializes *instance and corresponding 5380 chip, |
530 | * with flags OR'd into the initial flags value. | |
1da177e4 | 531 | * |
594d4ba3 FT |
532 | * Notes : I assume that the host, hostno, and id bits have been |
533 | * set correctly. I don't care about the irq and other fields. | |
1da177e4 | 534 | * |
594d4ba3 | 535 | * Returns 0 for success |
1da177e4 LT |
536 | */ |
537 | ||
6f039790 | 538 | static int NCR5380_init(struct Scsi_Host *instance, int flags) |
1da177e4 | 539 | { |
e8a60144 | 540 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 541 | int i; |
2f854b82 | 542 | unsigned long deadline; |
1da177e4 LT |
543 | |
544 | if(in_interrupt()) | |
545 | printk(KERN_ERR "NCR5380_init called with interrupts off!\n"); | |
1da177e4 | 546 | |
1da177e4 LT |
547 | hostdata->id_mask = 1 << instance->this_id; |
548 | for (i = hostdata->id_mask; i <= 0x80; i <<= 1) | |
549 | if (i > hostdata->id_mask) | |
550 | hostdata->id_higher_mask |= i; | |
551 | for (i = 0; i < 8; ++i) | |
552 | hostdata->busy[i] = 0; | |
553 | #ifdef REAL_DMA | |
554 | hostdata->dmalen = 0; | |
555 | #endif | |
11d2f63b | 556 | spin_lock_init(&hostdata->lock); |
1da177e4 | 557 | hostdata->connected = NULL; |
f27db8eb FT |
558 | hostdata->sensing = NULL; |
559 | INIT_LIST_HEAD(&hostdata->autosense); | |
32b26a10 FT |
560 | INIT_LIST_HEAD(&hostdata->unissued); |
561 | INIT_LIST_HEAD(&hostdata->disconnected); | |
562 | ||
55181be8 | 563 | hostdata->flags = flags; |
aff0cf9a | 564 | |
8d8601a7 | 565 | INIT_WORK(&hostdata->main_task, NCR5380_main); |
0ad0eff9 FT |
566 | hostdata->work_q = alloc_workqueue("ncr5380_%d", |
567 | WQ_UNBOUND | WQ_MEM_RECLAIM, | |
568 | 1, instance->host_no); | |
569 | if (!hostdata->work_q) | |
570 | return -ENOMEM; | |
571 | ||
1da177e4 | 572 | hostdata->host = instance; |
1da177e4 | 573 | |
8c32513b FT |
574 | prepare_info(instance); |
575 | ||
1da177e4 LT |
576 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
577 | NCR5380_write(MODE_REG, MR_BASE); | |
578 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
579 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2f854b82 FT |
580 | |
581 | /* Calibrate register polling loop */ | |
582 | i = 0; | |
583 | deadline = jiffies + 1; | |
584 | do { | |
585 | cpu_relax(); | |
586 | } while (time_is_after_jiffies(deadline)); | |
587 | deadline += msecs_to_jiffies(256); | |
588 | do { | |
589 | NCR5380_read(STATUS_REG); | |
590 | ++i; | |
591 | cpu_relax(); | |
592 | } while (time_is_after_jiffies(deadline)); | |
593 | hostdata->accesses_per_ms = i / 256; | |
594 | ||
b6488f97 FT |
595 | return 0; |
596 | } | |
1da177e4 | 597 | |
b6488f97 FT |
598 | /** |
599 | * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. | |
600 | * @instance: adapter to check | |
601 | * | |
602 | * If the system crashed, it may have crashed with a connected target and | |
603 | * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the | |
604 | * currently established nexus, which we know nothing about. Failing that | |
605 | * do a bus reset. | |
606 | * | |
607 | * Note that a bus reset will cause the chip to assert IRQ. | |
608 | * | |
609 | * Returns 0 if successful, otherwise -ENXIO. | |
610 | */ | |
611 | ||
612 | static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) | |
613 | { | |
9c3f0e2b | 614 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 615 | int pass; |
1da177e4 LT |
616 | |
617 | for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { | |
618 | switch (pass) { | |
619 | case 1: | |
620 | case 3: | |
621 | case 5: | |
636b1ec8 FT |
622 | shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); |
623 | NCR5380_poll_politely(instance, | |
624 | STATUS_REG, SR_BSY, 0, 5 * HZ); | |
1da177e4 LT |
625 | break; |
626 | case 2: | |
636b1ec8 | 627 | shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); |
1da177e4 LT |
628 | do_abort(instance); |
629 | break; | |
630 | case 4: | |
636b1ec8 | 631 | shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); |
1da177e4 | 632 | do_reset(instance); |
9c3f0e2b FT |
633 | /* Wait after a reset; the SCSI standard calls for |
634 | * 250ms, we wait 500ms to be on the safe side. | |
635 | * But some Toshiba CD-ROMs need ten times that. | |
636 | */ | |
637 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
638 | msleep(2500); | |
639 | else | |
640 | msleep(500); | |
1da177e4 LT |
641 | break; |
642 | case 6: | |
636b1ec8 | 643 | shost_printk(KERN_ERR, instance, "bus locked solid\n"); |
1da177e4 LT |
644 | return -ENXIO; |
645 | } | |
646 | } | |
647 | return 0; | |
648 | } | |
649 | ||
650 | /** | |
594d4ba3 FT |
651 | * NCR5380_exit - remove an NCR5380 |
652 | * @instance: adapter to remove | |
1da177e4 LT |
653 | */ |
654 | ||
a43cf0f3 | 655 | static void NCR5380_exit(struct Scsi_Host *instance) |
1da177e4 | 656 | { |
e8a60144 | 657 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 658 | |
8d8601a7 | 659 | cancel_work_sync(&hostdata->main_task); |
0ad0eff9 | 660 | destroy_workqueue(hostdata->work_q); |
1da177e4 LT |
661 | } |
662 | ||
677e0194 FT |
663 | /** |
664 | * complete_cmd - finish processing a command and return it to the SCSI ML | |
665 | * @instance: the host instance | |
666 | * @cmd: command to complete | |
667 | */ | |
668 | ||
669 | static void complete_cmd(struct Scsi_Host *instance, | |
670 | struct scsi_cmnd *cmd) | |
671 | { | |
672 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
673 | ||
674 | dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); | |
675 | ||
f27db8eb FT |
676 | if (hostdata->sensing == cmd) { |
677 | /* Autosense processing ends here */ | |
678 | if ((cmd->result & 0xff) != SAM_STAT_GOOD) { | |
679 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
680 | set_host_byte(cmd, DID_ERROR); | |
681 | } else | |
682 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
683 | hostdata->sensing = NULL; | |
684 | } | |
685 | ||
677e0194 FT |
686 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
687 | ||
688 | cmd->scsi_done(cmd); | |
689 | } | |
690 | ||
1da177e4 | 691 | /** |
1bb40589 FT |
692 | * NCR5380_queue_command - queue a command |
693 | * @instance: the relevant SCSI adapter | |
694 | * @cmd: SCSI command | |
1da177e4 | 695 | * |
1bb40589 FT |
696 | * cmd is added to the per-instance issue queue, with minor |
697 | * twiddling done to the host specific fields of cmd. If the | |
698 | * main coroutine is not running, it is restarted. | |
1da177e4 LT |
699 | */ |
700 | ||
1bb40589 FT |
701 | static int NCR5380_queue_command(struct Scsi_Host *instance, |
702 | struct scsi_cmnd *cmd) | |
1da177e4 | 703 | { |
1bb40589 | 704 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
32b26a10 | 705 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1bb40589 | 706 | unsigned long flags; |
1da177e4 LT |
707 | |
708 | #if (NDEBUG & NDEBUG_NO_WRITE) | |
709 | switch (cmd->cmnd[0]) { | |
710 | case WRITE_6: | |
711 | case WRITE_10: | |
dbb6b350 | 712 | shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); |
1da177e4 | 713 | cmd->result = (DID_ERROR << 16); |
1bb40589 | 714 | cmd->scsi_done(cmd); |
1da177e4 LT |
715 | return 0; |
716 | } | |
717 | #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ | |
718 | ||
1da177e4 LT |
719 | cmd->result = 0; |
720 | ||
11d2f63b | 721 | spin_lock_irqsave(&hostdata->lock, flags); |
1bb40589 | 722 | |
aff0cf9a FT |
723 | /* |
724 | * Insert the cmd into the issue queue. Note that REQUEST SENSE | |
1da177e4 | 725 | * commands are added to the head of the queue since any command will |
aff0cf9a | 726 | * clear the contingent allegiance condition that exists and the |
1da177e4 LT |
727 | * sense data is only guaranteed to be valid while the condition exists. |
728 | */ | |
729 | ||
32b26a10 FT |
730 | if (cmd->cmnd[0] == REQUEST_SENSE) |
731 | list_add(&ncmd->list, &hostdata->unissued); | |
732 | else | |
733 | list_add_tail(&ncmd->list, &hostdata->unissued); | |
734 | ||
11d2f63b | 735 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1bb40589 | 736 | |
dbb6b350 FT |
737 | dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", |
738 | cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); | |
1da177e4 | 739 | |
1da177e4 | 740 | /* Kick off command processing */ |
8d8601a7 | 741 | queue_work(hostdata->work_q, &hostdata->main_task); |
1da177e4 LT |
742 | return 0; |
743 | } | |
744 | ||
f27db8eb FT |
745 | /** |
746 | * dequeue_next_cmd - dequeue a command for processing | |
747 | * @instance: the scsi host instance | |
748 | * | |
749 | * Priority is given to commands on the autosense queue. These commands | |
750 | * need autosense because of a CHECK CONDITION result. | |
751 | * | |
752 | * Returns a command pointer if a command is found for a target that is | |
753 | * not already busy. Otherwise returns NULL. | |
754 | */ | |
755 | ||
756 | static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) | |
757 | { | |
758 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
759 | struct NCR5380_cmd *ncmd; | |
760 | struct scsi_cmnd *cmd; | |
761 | ||
762 | if (list_empty(&hostdata->autosense)) { | |
763 | list_for_each_entry(ncmd, &hostdata->unissued, list) { | |
764 | cmd = NCR5380_to_scmd(ncmd); | |
765 | dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", | |
766 | cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); | |
767 | ||
768 | if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { | |
769 | list_del(&ncmd->list); | |
770 | dsprintk(NDEBUG_QUEUES, instance, | |
771 | "dequeue: removed %p from issue queue\n", cmd); | |
772 | return cmd; | |
773 | } | |
774 | } | |
775 | } else { | |
776 | /* Autosense processing begins here */ | |
777 | ncmd = list_first_entry(&hostdata->autosense, | |
778 | struct NCR5380_cmd, list); | |
779 | list_del(&ncmd->list); | |
780 | cmd = NCR5380_to_scmd(ncmd); | |
781 | dsprintk(NDEBUG_QUEUES, instance, | |
782 | "dequeue: removed %p from autosense queue\n", cmd); | |
783 | scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); | |
784 | hostdata->sensing = cmd; | |
785 | return cmd; | |
786 | } | |
787 | return NULL; | |
788 | } | |
789 | ||
790 | static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
791 | { | |
792 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
793 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
794 | ||
795 | if (hostdata->sensing) { | |
796 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
797 | list_add(&ncmd->list, &hostdata->autosense); | |
798 | hostdata->sensing = NULL; | |
799 | } else | |
800 | list_add(&ncmd->list, &hostdata->unissued); | |
801 | } | |
802 | ||
1da177e4 | 803 | /** |
594d4ba3 | 804 | * NCR5380_main - NCR state machines |
1da177e4 | 805 | * |
594d4ba3 FT |
806 | * NCR5380_main is a coroutine that runs as long as more work can |
807 | * be done on the NCR5380 host adapters in a system. Both | |
808 | * NCR5380_queue_command() and NCR5380_intr() will try to start it | |
809 | * in case it is not running. | |
1da177e4 LT |
810 | */ |
811 | ||
c4028958 | 812 | static void NCR5380_main(struct work_struct *work) |
1da177e4 | 813 | { |
c4028958 | 814 | struct NCR5380_hostdata *hostdata = |
8d8601a7 | 815 | container_of(work, struct NCR5380_hostdata, main_task); |
1da177e4 | 816 | struct Scsi_Host *instance = hostdata->host; |
f27db8eb | 817 | struct scsi_cmnd *cmd; |
1da177e4 | 818 | int done; |
aff0cf9a | 819 | |
1da177e4 | 820 | do { |
1da177e4 | 821 | done = 1; |
11d2f63b | 822 | |
0a4e3612 | 823 | spin_lock_irq(&hostdata->lock); |
f27db8eb FT |
824 | while (!hostdata->connected && |
825 | (cmd = dequeue_next_cmd(instance))) { | |
1da177e4 | 826 | |
f27db8eb | 827 | dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); |
76f13b93 | 828 | |
f27db8eb FT |
829 | /* |
830 | * Attempt to establish an I_T_L nexus here. | |
831 | * On success, instance->hostdata->connected is set. | |
832 | * On failure, we must add the command back to the | |
833 | * issue queue so we can keep trying. | |
834 | */ | |
835 | /* | |
836 | * REQUEST SENSE commands are issued without tagged | |
837 | * queueing, even on SCSI-II devices because the | |
838 | * contingent allegiance condition exists for the | |
839 | * entire unit. | |
840 | */ | |
11d2f63b | 841 | |
707d62b3 FT |
842 | cmd = NCR5380_select(instance, cmd); |
843 | if (!cmd) { | |
844 | dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); | |
f27db8eb FT |
845 | } else { |
846 | dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, | |
847 | "main: select failed, returning %p to queue\n", cmd); | |
848 | requeue_cmd(instance, cmd); | |
849 | } | |
850 | } | |
1da177e4 LT |
851 | if (hostdata->connected |
852 | #ifdef REAL_DMA | |
853 | && !hostdata->dmalen | |
854 | #endif | |
1da177e4 | 855 | ) { |
b746545f | 856 | dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); |
1da177e4 | 857 | NCR5380_information_transfer(instance); |
1da177e4 | 858 | done = 0; |
1d3db59d | 859 | } |
0a4e3612 FT |
860 | spin_unlock_irq(&hostdata->lock); |
861 | if (!done) | |
862 | cond_resched(); | |
1da177e4 | 863 | } while (!done); |
1da177e4 LT |
864 | } |
865 | ||
866 | #ifndef DONT_USE_INTR | |
867 | ||
868 | /** | |
cd400825 FT |
869 | * NCR5380_intr - generic NCR5380 irq handler |
870 | * @irq: interrupt number | |
871 | * @dev_id: device info | |
872 | * | |
873 | * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses | |
874 | * from the disconnected queue, and restarting NCR5380_main() | |
875 | * as required. | |
876 | * | |
877 | * The chip can assert IRQ in any of six different conditions. The IRQ flag | |
878 | * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). | |
879 | * Three of these six conditions are latched in the Bus and Status Register: | |
880 | * - End of DMA (cleared by ending DMA Mode) | |
881 | * - Parity error (cleared by reading RPIR) | |
882 | * - Loss of BSY (cleared by reading RPIR) | |
883 | * Two conditions have flag bits that are not latched: | |
884 | * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) | |
885 | * - Bus reset (non-maskable) | |
886 | * The remaining condition has no flag bit at all: | |
887 | * - Selection/reselection | |
888 | * | |
889 | * Hence, establishing the cause(s) of any interrupt is partly guesswork. | |
890 | * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor | |
891 | * claimed that "the design of the [DP8490] interrupt logic ensures | |
892 | * interrupts will not be lost (they can be on the DP5380)." | |
893 | * The L5380/53C80 datasheet from LOGIC Devices has more details. | |
894 | * | |
895 | * Checking for bus reset by reading RST is futile because of interrupt | |
896 | * latency, but a bus reset will reset chip logic. Checking for parity error | |
897 | * is unnecessary because that interrupt is never enabled. A Loss of BSY | |
898 | * condition will clear DMA Mode. We can tell when this occurs because the | |
899 | * the Busy Monitor interrupt is enabled together with DMA Mode. | |
1da177e4 LT |
900 | */ |
901 | ||
cd400825 | 902 | static irqreturn_t NCR5380_intr(int irq, void *dev_id) |
1da177e4 | 903 | { |
baa9aac6 | 904 | struct Scsi_Host *instance = dev_id; |
cd400825 FT |
905 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
906 | int handled = 0; | |
1da177e4 LT |
907 | unsigned char basr; |
908 | unsigned long flags; | |
909 | ||
11d2f63b | 910 | spin_lock_irqsave(&hostdata->lock, flags); |
cd400825 FT |
911 | |
912 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
913 | if (basr & BASR_IRQ) { | |
914 | unsigned char mr = NCR5380_read(MODE_REG); | |
915 | unsigned char sr = NCR5380_read(STATUS_REG); | |
916 | ||
b746545f FT |
917 | dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", |
918 | irq, basr, sr, mr); | |
1da177e4 | 919 | |
1da177e4 | 920 | #if defined(REAL_DMA) |
cd400825 FT |
921 | if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { |
922 | /* Probably End of DMA, Phase Mismatch or Loss of BSY. | |
923 | * We ack IRQ after clearing Mode Register. Workarounds | |
924 | * for End of DMA errata need to happen in DMA Mode. | |
925 | */ | |
1da177e4 | 926 | |
b746545f | 927 | dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); |
1da177e4 | 928 | |
cd400825 | 929 | int transferred; |
1da177e4 | 930 | |
cd400825 FT |
931 | if (!hostdata->connected) |
932 | panic("scsi%d : DMA interrupt with no connected cmd\n", | |
933 | instance->hostno); | |
1da177e4 | 934 | |
cd400825 FT |
935 | transferred = hostdata->dmalen - NCR5380_dma_residual(instance); |
936 | hostdata->connected->SCp.this_residual -= transferred; | |
937 | hostdata->connected->SCp.ptr += transferred; | |
938 | hostdata->dmalen = 0; | |
1da177e4 | 939 | |
cd400825 FT |
940 | /* FIXME: we need to poll briefly then defer a workqueue task ! */ |
941 | NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2 * HZ); | |
942 | ||
943 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
944 | NCR5380_write(MODE_REG, MR_BASE); | |
945 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
946 | } else | |
947 | #endif /* REAL_DMA */ | |
948 | if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && | |
949 | (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { | |
950 | /* Probably reselected */ | |
951 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
952 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
953 | ||
b746545f | 954 | dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); |
cd400825 FT |
955 | |
956 | if (!hostdata->connected) { | |
957 | NCR5380_reselect(instance); | |
958 | queue_work(hostdata->work_q, &hostdata->main_task); | |
1da177e4 | 959 | } |
cd400825 FT |
960 | if (!hostdata->connected) |
961 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
962 | } else { | |
963 | /* Probably Bus Reset */ | |
964 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
965 | ||
b746545f | 966 | dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); |
cd400825 FT |
967 | } |
968 | handled = 1; | |
969 | } else { | |
970 | shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n"); | |
971 | } | |
972 | ||
11d2f63b | 973 | spin_unlock_irqrestore(&hostdata->lock, flags); |
cd400825 FT |
974 | |
975 | return IRQ_RETVAL(handled); | |
1da177e4 LT |
976 | } |
977 | ||
aff0cf9a | 978 | #endif |
1da177e4 | 979 | |
aff0cf9a | 980 | /* |
710ddd0d | 981 | * Function : int NCR5380_select(struct Scsi_Host *instance, |
594d4ba3 | 982 | * struct scsi_cmnd *cmd) |
1da177e4 LT |
983 | * |
984 | * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command, | |
594d4ba3 FT |
985 | * including ARBITRATION, SELECTION, and initial message out for |
986 | * IDENTIFY and queue messages. | |
1da177e4 | 987 | * |
aff0cf9a | 988 | * Inputs : instance - instantiation of the 5380 driver on which this |
594d4ba3 | 989 | * target lives, cmd - SCSI command to execute. |
aff0cf9a | 990 | * |
707d62b3 FT |
991 | * Returns cmd if selection failed but should be retried, |
992 | * NULL if selection failed and should not be retried, or | |
993 | * NULL if selection succeeded (hostdata->connected == cmd). | |
1da177e4 | 994 | * |
aff0cf9a | 995 | * Side effects : |
594d4ba3 FT |
996 | * If bus busy, arbitration failed, etc, NCR5380_select() will exit |
997 | * with registers as they should have been on entry - ie | |
998 | * SELECT_ENABLE will be set appropriately, the NCR5380 | |
999 | * will cease to drive any SCSI bus signals. | |
1da177e4 | 1000 | * |
594d4ba3 FT |
1001 | * If successful : I_T_L or I_T_L_Q nexus will be established, |
1002 | * instance->connected will be set to cmd. | |
1003 | * SELECT interrupt will be disabled. | |
1da177e4 | 1004 | * |
594d4ba3 FT |
1005 | * If failed (no target) : cmd->scsi_done() will be called, and the |
1006 | * cmd->result host byte set to DID_BAD_TARGET. | |
1da177e4 | 1007 | */ |
aff0cf9a | 1008 | |
707d62b3 FT |
1009 | static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance, |
1010 | struct scsi_cmnd *cmd) | |
1da177e4 | 1011 | { |
e8a60144 | 1012 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1013 | unsigned char tmp[3], phase; |
1014 | unsigned char *data; | |
1015 | int len; | |
1da177e4 | 1016 | int err; |
1da177e4 | 1017 | |
1da177e4 | 1018 | NCR5380_dprint(NDEBUG_ARBITRATION, instance); |
b746545f FT |
1019 | dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", |
1020 | instance->this_id); | |
1da177e4 | 1021 | |
707d62b3 FT |
1022 | /* |
1023 | * Arbitration and selection phases are slow and involve dropping the | |
1024 | * lock, so we have to watch out for EH. An exception handler may | |
1025 | * change 'selecting' to NULL. This function will then return NULL | |
1026 | * so that the caller will forget about 'cmd'. (During information | |
1027 | * transfer phases, EH may change 'connected' to NULL.) | |
1028 | */ | |
1029 | hostdata->selecting = cmd; | |
1030 | ||
aff0cf9a FT |
1031 | /* |
1032 | * Set the phase bits to 0, otherwise the NCR5380 won't drive the | |
1da177e4 LT |
1033 | * data bus during SELECTION. |
1034 | */ | |
1035 | ||
1036 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1037 | ||
aff0cf9a | 1038 | /* |
1da177e4 LT |
1039 | * Start arbitration. |
1040 | */ | |
1041 | ||
1042 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
1043 | NCR5380_write(MODE_REG, MR_ARBITRATE); | |
1044 | ||
55500d9b FT |
1045 | /* The chip now waits for BUS FREE phase. Then after the 800 ns |
1046 | * Bus Free Delay, arbitration will begin. | |
1047 | */ | |
1da177e4 | 1048 | |
11d2f63b | 1049 | spin_unlock_irq(&hostdata->lock); |
b32ade12 FT |
1050 | err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0, |
1051 | INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, | |
1052 | ICR_ARBITRATION_PROGRESS, HZ); | |
11d2f63b | 1053 | spin_lock_irq(&hostdata->lock); |
b32ade12 FT |
1054 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { |
1055 | /* Reselection interrupt */ | |
707d62b3 | 1056 | goto out; |
b32ade12 FT |
1057 | } |
1058 | if (err < 0) { | |
1059 | NCR5380_write(MODE_REG, MR_BASE); | |
1060 | shost_printk(KERN_ERR, instance, | |
1061 | "select: arbitration timeout\n"); | |
707d62b3 | 1062 | goto out; |
1da177e4 | 1063 | } |
11d2f63b | 1064 | spin_unlock_irq(&hostdata->lock); |
1da177e4 | 1065 | |
55500d9b | 1066 | /* The SCSI-2 arbitration delay is 2.4 us */ |
1da177e4 LT |
1067 | udelay(3); |
1068 | ||
1069 | /* Check for lost arbitration */ | |
1070 | if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { | |
1071 | NCR5380_write(MODE_REG, MR_BASE); | |
b746545f | 1072 | dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); |
11d2f63b | 1073 | spin_lock_irq(&hostdata->lock); |
707d62b3 | 1074 | goto out; |
1da177e4 | 1075 | } |
cf13b083 FT |
1076 | |
1077 | /* After/during arbitration, BSY should be asserted. | |
1078 | * IBM DPES-31080 Version S31Q works now | |
1079 | * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) | |
1080 | */ | |
1081 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1082 | ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); | |
1da177e4 | 1083 | |
aff0cf9a FT |
1084 | /* |
1085 | * Again, bus clear + bus settle time is 1.2us, however, this is | |
1da177e4 LT |
1086 | * a minimum so we'll udelay ceil(1.2) |
1087 | */ | |
1088 | ||
9c3f0e2b FT |
1089 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) |
1090 | udelay(15); | |
1091 | else | |
1092 | udelay(2); | |
1da177e4 | 1093 | |
11d2f63b FT |
1094 | spin_lock_irq(&hostdata->lock); |
1095 | ||
72064a78 FT |
1096 | /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ |
1097 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) | |
707d62b3 FT |
1098 | goto out; |
1099 | ||
1100 | if (!hostdata->selecting) { | |
1101 | NCR5380_write(MODE_REG, MR_BASE); | |
1102 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1103 | goto out; | |
1104 | } | |
72064a78 | 1105 | |
b746545f | 1106 | dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); |
1da177e4 | 1107 | |
aff0cf9a FT |
1108 | /* |
1109 | * Now that we have won arbitration, start Selection process, asserting | |
1da177e4 LT |
1110 | * the host and target ID's on the SCSI bus. |
1111 | */ | |
1112 | ||
422c0d61 | 1113 | NCR5380_write(OUTPUT_DATA_REG, (hostdata->id_mask | (1 << scmd_id(cmd)))); |
1da177e4 | 1114 | |
aff0cf9a | 1115 | /* |
1da177e4 LT |
1116 | * Raise ATN while SEL is true before BSY goes false from arbitration, |
1117 | * since this is the only way to guarantee that we'll get a MESSAGE OUT | |
1118 | * phase immediately after selection. | |
1119 | */ | |
1120 | ||
1121 | NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_BSY | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL)); | |
1122 | NCR5380_write(MODE_REG, MR_BASE); | |
1123 | ||
aff0cf9a | 1124 | /* |
1da177e4 LT |
1125 | * Reselect interrupts must be turned off prior to the dropping of BSY, |
1126 | * otherwise we will trigger an interrupt. | |
1127 | */ | |
1128 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1129 | ||
11d2f63b FT |
1130 | spin_unlock_irq(&hostdata->lock); |
1131 | ||
1da177e4 | 1132 | /* |
aff0cf9a | 1133 | * The initiator shall then wait at least two deskew delays and release |
1da177e4 LT |
1134 | * the BSY signal. |
1135 | */ | |
1136 | udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ | |
1137 | ||
1138 | /* Reset BSY */ | |
1139 | NCR5380_write(INITIATOR_COMMAND_REG, (ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL)); | |
1140 | ||
aff0cf9a | 1141 | /* |
1da177e4 | 1142 | * Something weird happens when we cease to drive BSY - looks |
aff0cf9a | 1143 | * like the board/chip is letting us do another read before the |
1da177e4 LT |
1144 | * appropriate propagation delay has expired, and we're confusing |
1145 | * a BSY signal from ourselves as the target's response to SELECTION. | |
1146 | * | |
1147 | * A small delay (the 'C++' frontend breaks the pipeline with an | |
1148 | * unnecessary jump, making it work on my 386-33/Trantor T128, the | |
aff0cf9a FT |
1149 | * tighter 'C' code breaks and requires this) solves the problem - |
1150 | * the 1 us delay is arbitrary, and only used because this delay will | |
1151 | * be the same on other platforms and since it works here, it should | |
1da177e4 LT |
1152 | * work there. |
1153 | * | |
1154 | * wingel suggests that this could be due to failing to wait | |
1155 | * one deskew delay. | |
1156 | */ | |
1157 | ||
1158 | udelay(1); | |
1159 | ||
b746545f | 1160 | dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); |
1da177e4 | 1161 | |
aff0cf9a FT |
1162 | /* |
1163 | * The SCSI specification calls for a 250 ms timeout for the actual | |
1da177e4 LT |
1164 | * selection. |
1165 | */ | |
1166 | ||
ae753a33 FT |
1167 | err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY, |
1168 | msecs_to_jiffies(250)); | |
1da177e4 | 1169 | |
1da177e4 | 1170 | if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { |
11d2f63b | 1171 | spin_lock_irq(&hostdata->lock); |
1da177e4 LT |
1172 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
1173 | NCR5380_reselect(instance); | |
cd400825 FT |
1174 | if (!hostdata->connected) |
1175 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
6a6ff4ac | 1176 | shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); |
707d62b3 | 1177 | goto out; |
1da177e4 | 1178 | } |
ae753a33 FT |
1179 | |
1180 | if (err < 0) { | |
11d2f63b | 1181 | spin_lock_irq(&hostdata->lock); |
ae753a33 | 1182 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
ae753a33 | 1183 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
707d62b3 FT |
1184 | /* Can't touch cmd if it has been reclaimed by the scsi ML */ |
1185 | if (hostdata->selecting) { | |
1186 | cmd->result = DID_BAD_TARGET << 16; | |
1187 | complete_cmd(instance, cmd); | |
1188 | dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n"); | |
1189 | cmd = NULL; | |
1190 | } | |
1191 | goto out; | |
ae753a33 FT |
1192 | } |
1193 | ||
aff0cf9a FT |
1194 | /* |
1195 | * No less than two deskew delays after the initiator detects the | |
1196 | * BSY signal is true, it shall release the SEL signal and may | |
1da177e4 LT |
1197 | * change the DATA BUS. -wingel |
1198 | */ | |
1199 | ||
1200 | udelay(1); | |
1201 | ||
1202 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1203 | ||
1da177e4 | 1204 | /* |
aff0cf9a | 1205 | * Since we followed the SCSI spec, and raised ATN while SEL |
1da177e4 LT |
1206 | * was true but before BSY was false during selection, the information |
1207 | * transfer phase should be a MESSAGE OUT phase so that we can send the | |
1208 | * IDENTIFY message. | |
aff0cf9a | 1209 | * |
1da177e4 LT |
1210 | * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG |
1211 | * message (2 bytes) with a tag ID that we increment with every command | |
1212 | * until it wraps back to 0. | |
1213 | * | |
1214 | * XXX - it turns out that there are some broken SCSI-II devices, | |
594d4ba3 FT |
1215 | * which claim to support tagged queuing but fail when more than |
1216 | * some number of commands are issued at once. | |
1da177e4 LT |
1217 | */ |
1218 | ||
1219 | /* Wait for start of REQ/ACK handshake */ | |
1220 | ||
1da177e4 | 1221 | err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 1222 | spin_lock_irq(&hostdata->lock); |
1cc160e1 | 1223 | if (err < 0) { |
55500d9b FT |
1224 | shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); |
1225 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1da177e4 | 1226 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
707d62b3 FT |
1227 | goto out; |
1228 | } | |
1229 | if (!hostdata->selecting) { | |
1230 | do_abort(instance); | |
1231 | goto out; | |
1da177e4 LT |
1232 | } |
1233 | ||
b746545f FT |
1234 | dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", |
1235 | scmd_id(cmd)); | |
22f5f10d | 1236 | tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun); |
1da177e4 LT |
1237 | |
1238 | len = 1; | |
1239 | cmd->tag = 0; | |
1240 | ||
1241 | /* Send message(s) */ | |
1242 | data = tmp; | |
1243 | phase = PHASE_MSGOUT; | |
1244 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f | 1245 | dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); |
1da177e4 | 1246 | /* XXX need to handle errors here */ |
11d2f63b | 1247 | |
1da177e4 | 1248 | hostdata->connected = cmd; |
9cb78c16 | 1249 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 | 1250 | |
28424d3a | 1251 | initialize_SCp(cmd); |
1da177e4 | 1252 | |
707d62b3 FT |
1253 | cmd = NULL; |
1254 | ||
1255 | out: | |
1256 | if (!hostdata->selecting) | |
1257 | return NULL; | |
1258 | hostdata->selecting = NULL; | |
1259 | return cmd; | |
1da177e4 LT |
1260 | } |
1261 | ||
aff0cf9a FT |
1262 | /* |
1263 | * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, | |
594d4ba3 | 1264 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1265 | * |
1266 | * Purpose : transfers data in given phase using polled I/O | |
1267 | * | |
aff0cf9a | 1268 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1269 | * what phase is expected, *count - pointer to number of |
1270 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1271 | * |
1da177e4 | 1272 | * Returns : -1 when different phase is entered without transferring |
594d4ba3 FT |
1273 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1274 | * is in same phase. | |
1da177e4 | 1275 | * |
594d4ba3 | 1276 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1277 | * |
1278 | * XXX Note : handling for bus free may be useful. | |
1279 | */ | |
1280 | ||
1281 | /* | |
aff0cf9a | 1282 | * Note : this code is not as quick as it could be, however it |
1da177e4 LT |
1283 | * IS 100% reliable, and for the actual data transfer where speed |
1284 | * counts, we will always do a pseudo DMA or DMA transfer. | |
1285 | */ | |
1286 | ||
1287 | static int NCR5380_transfer_pio(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data) { | |
1da177e4 LT |
1288 | unsigned char p = *phase, tmp; |
1289 | int c = *count; | |
1290 | unsigned char *d = *data; | |
1da177e4 | 1291 | |
aff0cf9a FT |
1292 | /* |
1293 | * The NCR5380 chip will only drive the SCSI bus when the | |
1da177e4 LT |
1294 | * phase specified in the appropriate bits of the TARGET COMMAND |
1295 | * REGISTER match the STATUS REGISTER | |
1296 | */ | |
1297 | ||
1298 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); | |
1299 | ||
1da177e4 | 1300 | do { |
aff0cf9a FT |
1301 | /* |
1302 | * Wait for assertion of REQ, after which the phase bits will be | |
1303 | * valid | |
1da177e4 LT |
1304 | */ |
1305 | ||
686f3990 | 1306 | if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) |
1da177e4 | 1307 | break; |
1da177e4 | 1308 | |
b746545f | 1309 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); |
1da177e4 LT |
1310 | |
1311 | /* Check for phase mismatch */ | |
686f3990 | 1312 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { |
b746545f FT |
1313 | dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); |
1314 | NCR5380_dprint_phase(NDEBUG_PIO, instance); | |
1da177e4 LT |
1315 | break; |
1316 | } | |
1317 | /* Do actual transfer from SCSI bus to / from memory */ | |
1318 | if (!(p & SR_IO)) | |
1319 | NCR5380_write(OUTPUT_DATA_REG, *d); | |
1320 | else | |
1321 | *d = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
1322 | ||
1323 | ++d; | |
1324 | ||
aff0cf9a | 1325 | /* |
1da177e4 LT |
1326 | * The SCSI standard suggests that in MSGOUT phase, the initiator |
1327 | * should drop ATN on the last byte of the message phase | |
1328 | * after REQ has been asserted for the handshake but before | |
1329 | * the initiator raises ACK. | |
1330 | */ | |
1331 | ||
1332 | if (!(p & SR_IO)) { | |
1333 | if (!((p & SR_MSG) && c > 1)) { | |
1334 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1335 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1336 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ACK); | |
1337 | } else { | |
1338 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN); | |
1339 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1340 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1341 | } | |
1342 | } else { | |
1343 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1344 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
1345 | } | |
1346 | ||
a2edc4a6 FT |
1347 | if (NCR5380_poll_politely(instance, |
1348 | STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) | |
1349 | break; | |
1350 | ||
b746545f | 1351 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); |
1da177e4 LT |
1352 | |
1353 | /* | |
aff0cf9a FT |
1354 | * We have several special cases to consider during REQ/ACK handshaking : |
1355 | * 1. We were in MSGOUT phase, and we are on the last byte of the | |
594d4ba3 | 1356 | * message. ATN must be dropped as ACK is dropped. |
1da177e4 | 1357 | * |
aff0cf9a | 1358 | * 2. We are in a MSGIN phase, and we are on the last byte of the |
594d4ba3 FT |
1359 | * message. We must exit with ACK asserted, so that the calling |
1360 | * code may raise ATN before dropping ACK to reject the message. | |
1da177e4 LT |
1361 | * |
1362 | * 3. ACK and ATN are clear and the target may proceed as normal. | |
1363 | */ | |
1364 | if (!(p == PHASE_MSGIN && c == 1)) { | |
1365 | if (p == PHASE_MSGOUT && c > 1) | |
1366 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1367 | else | |
1368 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1369 | } | |
1370 | } while (--c); | |
1371 | ||
b746545f | 1372 | dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); |
1da177e4 LT |
1373 | |
1374 | *count = c; | |
1375 | *data = d; | |
1376 | tmp = NCR5380_read(STATUS_REG); | |
a2edc4a6 FT |
1377 | /* The phase read from the bus is valid if either REQ is (already) |
1378 | * asserted or if ACK hasn't been released yet. The latter applies if | |
1379 | * we're in MSG IN, DATA IN or STATUS and all bytes have been received. | |
1380 | */ | |
1381 | if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) | |
1da177e4 LT |
1382 | *phase = tmp & PHASE_MASK; |
1383 | else | |
1384 | *phase = PHASE_UNKNOWN; | |
1385 | ||
1386 | if (!c || (*phase == p)) | |
1387 | return 0; | |
1388 | else | |
1389 | return -1; | |
1390 | } | |
1391 | ||
1392 | /** | |
636b1ec8 FT |
1393 | * do_reset - issue a reset command |
1394 | * @instance: adapter to reset | |
1da177e4 | 1395 | * |
636b1ec8 FT |
1396 | * Issue a reset sequence to the NCR5380 and try and get the bus |
1397 | * back into sane shape. | |
1da177e4 | 1398 | * |
636b1ec8 FT |
1399 | * This clears the reset interrupt flag because there may be no handler for |
1400 | * it. When the driver is initialized, the NCR5380_intr() handler has not yet | |
1401 | * been installed. And when in EH we may have released the ST DMA interrupt. | |
1da177e4 | 1402 | */ |
aff0cf9a | 1403 | |
54d8fe44 FT |
1404 | static void do_reset(struct Scsi_Host *instance) |
1405 | { | |
636b1ec8 FT |
1406 | unsigned long flags; |
1407 | ||
1408 | local_irq_save(flags); | |
1409 | NCR5380_write(TARGET_COMMAND_REG, | |
1410 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); | |
1da177e4 | 1411 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); |
636b1ec8 | 1412 | udelay(50); |
1da177e4 | 1413 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
636b1ec8 FT |
1414 | (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1415 | local_irq_restore(flags); | |
1da177e4 LT |
1416 | } |
1417 | ||
80d3eb6d FT |
1418 | /** |
1419 | * do_abort - abort the currently established nexus by going to | |
1420 | * MESSAGE OUT phase and sending an ABORT message. | |
1421 | * @instance: relevant scsi host instance | |
1da177e4 | 1422 | * |
80d3eb6d | 1423 | * Returns 0 on success, -1 on failure. |
1da177e4 LT |
1424 | */ |
1425 | ||
54d8fe44 FT |
1426 | static int do_abort(struct Scsi_Host *instance) |
1427 | { | |
1da177e4 LT |
1428 | unsigned char *msgptr, phase, tmp; |
1429 | int len; | |
1430 | int rc; | |
1da177e4 LT |
1431 | |
1432 | /* Request message out phase */ | |
1433 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1434 | ||
aff0cf9a FT |
1435 | /* |
1436 | * Wait for the target to indicate a valid phase by asserting | |
1437 | * REQ. Once this happens, we'll have either a MSGOUT phase | |
1438 | * and can immediately send the ABORT message, or we'll have some | |
1da177e4 | 1439 | * other phase and will have to source/sink data. |
aff0cf9a | 1440 | * |
1da177e4 LT |
1441 | * We really don't care what value was on the bus or what value |
1442 | * the target sees, so we just handshake. | |
1443 | */ | |
1444 | ||
80d3eb6d | 1445 | rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); |
1cc160e1 | 1446 | if (rc < 0) |
80d3eb6d | 1447 | goto timeout; |
1da177e4 | 1448 | |
f35d3474 | 1449 | tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; |
aff0cf9a | 1450 | |
1da177e4 LT |
1451 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); |
1452 | ||
f35d3474 | 1453 | if (tmp != PHASE_MSGOUT) { |
1da177e4 | 1454 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); |
54d8fe44 | 1455 | rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ); |
1cc160e1 | 1456 | if (rc < 0) |
80d3eb6d FT |
1457 | goto timeout; |
1458 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1da177e4 LT |
1459 | } |
1460 | tmp = ABORT; | |
1461 | msgptr = &tmp; | |
1462 | len = 1; | |
1463 | phase = PHASE_MSGOUT; | |
54d8fe44 | 1464 | NCR5380_transfer_pio(instance, &phase, &len, &msgptr); |
1da177e4 LT |
1465 | |
1466 | /* | |
1467 | * If we got here, and the command completed successfully, | |
1468 | * we're about to go into bus free state. | |
1469 | */ | |
1470 | ||
1471 | return len ? -1 : 0; | |
80d3eb6d FT |
1472 | |
1473 | timeout: | |
1474 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1475 | return -1; | |
1da177e4 LT |
1476 | } |
1477 | ||
1478 | #if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL) | |
aff0cf9a FT |
1479 | /* |
1480 | * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, | |
594d4ba3 | 1481 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1482 | * |
1483 | * Purpose : transfers data in given phase using either real | |
594d4ba3 | 1484 | * or pseudo DMA. |
1da177e4 | 1485 | * |
aff0cf9a | 1486 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1487 | * what phase is expected, *count - pointer to number of |
1488 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1489 | * |
1da177e4 | 1490 | * Returns : -1 when different phase is entered without transferring |
594d4ba3 FT |
1491 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1492 | * is in same phase. | |
1da177e4 | 1493 | * |
594d4ba3 | 1494 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1495 | */ |
1496 | ||
1497 | ||
1498 | static int NCR5380_transfer_dma(struct Scsi_Host *instance, unsigned char *phase, int *count, unsigned char **data) { | |
1da177e4 LT |
1499 | register int c = *count; |
1500 | register unsigned char p = *phase; | |
1501 | register unsigned char *d = *data; | |
1502 | unsigned char tmp; | |
1503 | int foo; | |
1504 | #if defined(REAL_DMA_POLL) | |
1505 | int cnt, toPIO; | |
1506 | unsigned char saved_data = 0, overrun = 0, residue; | |
1507 | #endif | |
1508 | ||
e8a60144 | 1509 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 1510 | |
1da177e4 LT |
1511 | if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { |
1512 | *phase = tmp; | |
1513 | return -1; | |
1514 | } | |
1515 | #if defined(REAL_DMA) || defined(REAL_DMA_POLL) | |
1da177e4 | 1516 | if (p & SR_IO) { |
9db6024e FT |
1517 | if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) |
1518 | c -= 2; | |
1da177e4 | 1519 | } |
1da177e4 | 1520 | hostdata->dma_len = (p & SR_IO) ? NCR5380_dma_read_setup(instance, d, c) : NCR5380_dma_write_setup(instance, d, c); |
b746545f FT |
1521 | |
1522 | dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", | |
1523 | (p & SR_IO) ? "receive" : "send", c, *data); | |
1da177e4 LT |
1524 | #endif |
1525 | ||
1526 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); | |
1527 | ||
1528 | #ifdef REAL_DMA | |
cd400825 FT |
1529 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | |
1530 | MR_ENABLE_EOP_INTR); | |
1da177e4 | 1531 | #elif defined(REAL_DMA_POLL) |
cd400825 | 1532 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY); |
1da177e4 LT |
1533 | #else |
1534 | /* | |
1535 | * Note : on my sample board, watch-dog timeouts occurred when interrupts | |
aff0cf9a | 1536 | * were not disabled for the duration of a single DMA transfer, from |
1da177e4 LT |
1537 | * before the setting of DMA mode to after transfer of the last byte. |
1538 | */ | |
1539 | ||
55181be8 | 1540 | if (hostdata->flags & FLAG_NO_DMA_FIXUP) |
cd400825 FT |
1541 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | |
1542 | MR_ENABLE_EOP_INTR); | |
1da177e4 | 1543 | else |
cd400825 | 1544 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY); |
1da177e4 LT |
1545 | #endif /* def REAL_DMA */ |
1546 | ||
52a6a1cb | 1547 | dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG)); |
1da177e4 | 1548 | |
aff0cf9a | 1549 | /* |
594d4ba3 FT |
1550 | * On the PAS16 at least I/O recovery delays are not needed here. |
1551 | * Everyone else seems to want them. | |
1da177e4 LT |
1552 | */ |
1553 | ||
1554 | if (p & SR_IO) { | |
1555 | io_recovery_delay(1); | |
1556 | NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); | |
1557 | } else { | |
1558 | io_recovery_delay(1); | |
1559 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1560 | io_recovery_delay(1); | |
1561 | NCR5380_write(START_DMA_SEND_REG, 0); | |
1562 | io_recovery_delay(1); | |
1563 | } | |
1564 | ||
1565 | #if defined(REAL_DMA_POLL) | |
1566 | do { | |
1567 | tmp = NCR5380_read(BUS_AND_STATUS_REG); | |
1568 | } while ((tmp & BASR_PHASE_MATCH) && !(tmp & (BASR_BUSY_ERROR | BASR_END_DMA_TRANSFER))); | |
1569 | ||
1570 | /* | |
c16df32e FT |
1571 | * At this point, either we've completed DMA, or we have a phase mismatch, |
1572 | * or we've unexpectedly lost BUSY (which is a real error). | |
1573 | * | |
1574 | * For DMA sends, we want to wait until the last byte has been | |
1575 | * transferred out over the bus before we turn off DMA mode. Alas, there | |
1576 | * seems to be no terribly good way of doing this on a 5380 under all | |
1577 | * conditions. For non-scatter-gather operations, we can wait until REQ | |
1578 | * and ACK both go false, or until a phase mismatch occurs. Gather-sends | |
1579 | * are nastier, since the device will be expecting more data than we | |
1580 | * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we | |
1581 | * could test Last Byte Sent to assure transfer (I imagine this is precisely | |
1582 | * why this signal was added to the newer chips) but on the older 538[01] | |
1583 | * this signal does not exist. The workaround for this lack is a watchdog; | |
1584 | * we bail out of the wait-loop after a modest amount of wait-time if | |
1585 | * the usual exit conditions are not met. Not a terribly clean or | |
1586 | * correct solution :-% | |
1587 | * | |
1588 | * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. | |
1589 | * If the chip is in DMA receive mode, it will respond to a target's | |
1590 | * REQ by latching the SCSI data into the INPUT DATA register and asserting | |
1591 | * ACK, even if it has _already_ been notified by the DMA controller that | |
1592 | * the current DMA transfer has completed! If the NCR5380 is then taken | |
1593 | * out of DMA mode, this already-acknowledged byte is lost. This is | |
1594 | * not a problem for "one DMA transfer per READ command", because | |
1595 | * the situation will never arise... either all of the data is DMA'ed | |
1596 | * properly, or the target switches to MESSAGE IN phase to signal a | |
1597 | * disconnection (either operation bringing the DMA to a clean halt). | |
1598 | * However, in order to handle scatter-receive, we must work around the | |
1599 | * problem. The chosen fix is to DMA N-2 bytes, then check for the | |
1600 | * condition before taking the NCR5380 out of DMA mode. One or two extra | |
1601 | * bytes are transferred via PIO as necessary to fill out the original | |
1602 | * request. | |
1da177e4 LT |
1603 | */ |
1604 | ||
1605 | if (p & SR_IO) { | |
9db6024e FT |
1606 | if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) { |
1607 | udelay(10); | |
1608 | if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == | |
1609 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
1610 | saved_data = NCR5380_read(INPUT_DATA_REGISTER); | |
1611 | overrun = 1; | |
1612 | } | |
1da177e4 | 1613 | } |
1da177e4 LT |
1614 | } else { |
1615 | int limit = 100; | |
1616 | while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) { | |
1617 | if (!(tmp & BASR_PHASE_MATCH)) | |
1618 | break; | |
1619 | if (--limit < 0) | |
1620 | break; | |
1621 | } | |
1622 | } | |
1623 | ||
b746545f FT |
1624 | dsprintk(NDEBUG_DMA, "polled DMA transfer complete, basr 0x%02x, sr 0x%02x\n", |
1625 | tmp, NCR5380_read(STATUS_REG)); | |
1da177e4 LT |
1626 | |
1627 | NCR5380_write(MODE_REG, MR_BASE); | |
1628 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1629 | ||
1630 | residue = NCR5380_dma_residual(instance); | |
1631 | c -= residue; | |
1632 | *count -= c; | |
1633 | *data += c; | |
1634 | *phase = NCR5380_read(STATUS_REG) & PHASE_MASK; | |
1635 | ||
9db6024e FT |
1636 | if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS) && |
1637 | *phase == p && (p & SR_IO) && residue == 0) { | |
1da177e4 | 1638 | if (overrun) { |
52a6a1cb | 1639 | dprintk(NDEBUG_DMA, "Got an input overrun, using saved byte\n"); |
1da177e4 LT |
1640 | **data = saved_data; |
1641 | *data += 1; | |
1642 | *count -= 1; | |
1643 | cnt = toPIO = 1; | |
1644 | } else { | |
1645 | printk("No overrun??\n"); | |
1646 | cnt = toPIO = 2; | |
1647 | } | |
52a6a1cb | 1648 | dprintk(NDEBUG_DMA, "Doing %d-byte PIO to 0x%X\n", cnt, *data); |
1da177e4 LT |
1649 | NCR5380_transfer_pio(instance, phase, &cnt, data); |
1650 | *count -= toPIO - cnt; | |
1651 | } | |
1da177e4 | 1652 | |
52a6a1cb | 1653 | dprintk(NDEBUG_DMA, "Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n", *data, *count, *(*data + *count - 1), *(*data + *count)); |
1da177e4 LT |
1654 | return 0; |
1655 | ||
1656 | #elif defined(REAL_DMA) | |
1657 | return 0; | |
1658 | #else /* defined(REAL_DMA_POLL) */ | |
1659 | if (p & SR_IO) { | |
55181be8 FT |
1660 | foo = NCR5380_pread(instance, d, |
1661 | hostdata->flags & FLAG_NO_DMA_FIXUP ? c : c - 1); | |
1662 | if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) { | |
1da177e4 | 1663 | /* |
aff0cf9a | 1664 | * We can't disable DMA mode after successfully transferring |
1da177e4 | 1665 | * what we plan to be the last byte, since that would open up |
aff0cf9a | 1666 | * a race condition where if the target asserted REQ before |
1da177e4 LT |
1667 | * we got the DMA mode reset, the NCR5380 would have latched |
1668 | * an additional byte into the INPUT DATA register and we'd | |
1669 | * have dropped it. | |
aff0cf9a FT |
1670 | * |
1671 | * The workaround was to transfer one fewer bytes than we | |
1672 | * intended to with the pseudo-DMA read function, wait for | |
1da177e4 LT |
1673 | * the chip to latch the last byte, read it, and then disable |
1674 | * pseudo-DMA mode. | |
aff0cf9a | 1675 | * |
1da177e4 LT |
1676 | * After REQ is asserted, the NCR5380 asserts DRQ and ACK. |
1677 | * REQ is deasserted when ACK is asserted, and not reasserted | |
1678 | * until ACK goes false. Since the NCR5380 won't lower ACK | |
1679 | * until DACK is asserted, which won't happen unless we twiddle | |
aff0cf9a FT |
1680 | * the DMA port or we take the NCR5380 out of DMA mode, we |
1681 | * can guarantee that we won't handshake another extra | |
1da177e4 LT |
1682 | * byte. |
1683 | */ | |
1684 | ||
55181be8 FT |
1685 | if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, |
1686 | BASR_DRQ, BASR_DRQ, HZ) < 0) { | |
1687 | foo = -1; | |
1688 | shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); | |
1689 | } | |
1690 | if (NCR5380_poll_politely(instance, STATUS_REG, | |
1691 | SR_REQ, 0, HZ) < 0) { | |
1692 | foo = -1; | |
1693 | shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); | |
1da177e4 | 1694 | } |
55181be8 | 1695 | d[c - 1] = NCR5380_read(INPUT_DATA_REG); |
1da177e4 | 1696 | } |
1da177e4 | 1697 | } else { |
1da177e4 | 1698 | foo = NCR5380_pwrite(instance, d, c); |
55181be8 | 1699 | if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) { |
1da177e4 | 1700 | /* |
aff0cf9a FT |
1701 | * Wait for the last byte to be sent. If REQ is being asserted for |
1702 | * the byte we're interested, we'll ACK it and it will go false. | |
1da177e4 | 1703 | */ |
55181be8 FT |
1704 | if (NCR5380_poll_politely2(instance, |
1705 | BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, | |
1706 | BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { | |
1707 | foo = -1; | |
1708 | shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); | |
1da177e4 LT |
1709 | } |
1710 | } | |
1da177e4 LT |
1711 | } |
1712 | NCR5380_write(MODE_REG, MR_BASE); | |
1713 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
cd400825 | 1714 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1da177e4 LT |
1715 | *data = d + c; |
1716 | *count = 0; | |
1717 | *phase = NCR5380_read(STATUS_REG) & PHASE_MASK; | |
1da177e4 LT |
1718 | return foo; |
1719 | #endif /* def REAL_DMA */ | |
1720 | } | |
1721 | #endif /* defined(REAL_DMA) | defined(PSEUDO_DMA) */ | |
1722 | ||
1723 | /* | |
1724 | * Function : NCR5380_information_transfer (struct Scsi_Host *instance) | |
1725 | * | |
aff0cf9a | 1726 | * Purpose : run through the various SCSI phases and do as the target |
594d4ba3 FT |
1727 | * directs us to. Operates on the currently connected command, |
1728 | * instance->connected. | |
1da177e4 LT |
1729 | * |
1730 | * Inputs : instance, instance for which we are doing commands | |
1731 | * | |
aff0cf9a | 1732 | * Side effects : SCSI things happen, the disconnected queue will be |
594d4ba3 FT |
1733 | * modified if a command disconnects, *instance->connected will |
1734 | * change. | |
1da177e4 | 1735 | * |
aff0cf9a | 1736 | * XXX Note : we need to watch for bus free or a reset condition here |
594d4ba3 | 1737 | * to recover from an unexpected bus free condition. |
1da177e4 LT |
1738 | */ |
1739 | ||
1740 | static void NCR5380_information_transfer(struct Scsi_Host *instance) { | |
e8a60144 | 1741 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1742 | unsigned char msgout = NOP; |
1743 | int sink = 0; | |
1744 | int len; | |
1745 | #if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) | |
1746 | int transfersize; | |
1747 | #endif | |
1748 | unsigned char *data; | |
1749 | unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; | |
11d2f63b | 1750 | struct scsi_cmnd *cmd; |
1da177e4 | 1751 | |
11d2f63b | 1752 | while ((cmd = hostdata->connected)) { |
32b26a10 FT |
1753 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1754 | ||
1da177e4 LT |
1755 | tmp = NCR5380_read(STATUS_REG); |
1756 | /* We only have a valid SCSI phase when REQ is asserted */ | |
1757 | if (tmp & SR_REQ) { | |
1758 | phase = (tmp & PHASE_MASK); | |
1759 | if (phase != old_phase) { | |
1760 | old_phase = phase; | |
1761 | NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); | |
1762 | } | |
1763 | if (sink && (phase != PHASE_MSGOUT)) { | |
1764 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1765 | ||
1766 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1767 | while (NCR5380_read(STATUS_REG) & SR_REQ); | |
1768 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1769 | sink = 0; | |
1770 | continue; | |
1771 | } | |
1772 | switch (phase) { | |
1da177e4 LT |
1773 | case PHASE_DATAOUT: |
1774 | #if (NDEBUG & NDEBUG_NO_DATAOUT) | |
6a6ff4ac | 1775 | shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); |
1da177e4 LT |
1776 | sink = 1; |
1777 | do_abort(instance); | |
1778 | cmd->result = DID_ERROR << 16; | |
677e0194 | 1779 | complete_cmd(instance, cmd); |
1da177e4 LT |
1780 | return; |
1781 | #endif | |
bf1a0c6f | 1782 | case PHASE_DATAIN: |
aff0cf9a | 1783 | /* |
1da177e4 LT |
1784 | * If there is no room left in the current buffer in the |
1785 | * scatter-gather list, move onto the next one. | |
1786 | */ | |
1787 | ||
1788 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
1789 | ++cmd->SCp.buffer; | |
1790 | --cmd->SCp.buffers_residual; | |
1791 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
45711f1a | 1792 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
b746545f FT |
1793 | dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n", |
1794 | cmd->SCp.this_residual, | |
1795 | cmd->SCp.buffers_residual); | |
1da177e4 LT |
1796 | } |
1797 | /* | |
aff0cf9a | 1798 | * The preferred transfer method is going to be |
1da177e4 LT |
1799 | * PSEUDO-DMA for systems that are strictly PIO, |
1800 | * since we can let the hardware do the handshaking. | |
1801 | * | |
1802 | * For this to work, we need to know the transfersize | |
1803 | * ahead of time, since the pseudo-DMA code will sit | |
1804 | * in an unconditional loop. | |
1805 | */ | |
1806 | ||
1807 | #if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) | |
ff3d4578 FT |
1808 | transfersize = 0; |
1809 | if (!cmd->device->borken && | |
1810 | !(hostdata->flags & FLAG_NO_PSEUDO_DMA)) | |
1811 | transfersize = NCR5380_dma_xfer_len(instance, cmd, phase); | |
1812 | ||
1813 | if (transfersize) { | |
1da177e4 LT |
1814 | len = transfersize; |
1815 | if (NCR5380_transfer_dma(instance, &phase, &len, (unsigned char **) &cmd->SCp.ptr)) { | |
1816 | /* | |
1817 | * If the watchdog timer fires, all future accesses to this | |
1818 | * device will use the polled-IO. | |
1819 | */ | |
017560fc JG |
1820 | scmd_printk(KERN_INFO, cmd, |
1821 | "switching to slow handshake\n"); | |
1da177e4 | 1822 | cmd->device->borken = 1; |
1da177e4 LT |
1823 | sink = 1; |
1824 | do_abort(instance); | |
1825 | cmd->result = DID_ERROR << 16; | |
677e0194 | 1826 | complete_cmd(instance, cmd); |
1da177e4 LT |
1827 | /* XXX - need to source or sink data here, as appropriate */ |
1828 | } else | |
1829 | cmd->SCp.this_residual -= transfersize - len; | |
1830 | } else | |
1831 | #endif /* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */ | |
11d2f63b FT |
1832 | { |
1833 | spin_unlock_irq(&hostdata->lock); | |
1da177e4 LT |
1834 | NCR5380_transfer_pio(instance, &phase, (int *) &cmd->SCp.this_residual, (unsigned char **) |
1835 | &cmd->SCp.ptr); | |
11d2f63b FT |
1836 | spin_lock_irq(&hostdata->lock); |
1837 | } | |
1da177e4 LT |
1838 | break; |
1839 | case PHASE_MSGIN: | |
1840 | len = 1; | |
1841 | data = &tmp; | |
1842 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1843 | cmd->SCp.Message = tmp; | |
1844 | ||
1845 | switch (tmp) { | |
1da177e4 LT |
1846 | case ABORT: |
1847 | case COMMAND_COMPLETE: | |
1848 | /* Accept message by clearing ACK */ | |
1849 | sink = 1; | |
1850 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
0d3d9a42 FT |
1851 | dsprintk(NDEBUG_QUEUES, instance, |
1852 | "COMMAND COMPLETE %p target %d lun %llu\n", | |
1853 | cmd, scmd_id(cmd), cmd->device->lun); | |
1854 | ||
1da177e4 | 1855 | hostdata->connected = NULL; |
1da177e4 | 1856 | |
f27db8eb FT |
1857 | cmd->result &= ~0xffff; |
1858 | cmd->result |= cmd->SCp.Status; | |
1859 | cmd->result |= cmd->SCp.Message << 8; | |
28424d3a | 1860 | |
f27db8eb | 1861 | if (cmd->cmnd[0] == REQUEST_SENSE) |
677e0194 | 1862 | complete_cmd(instance, cmd); |
f27db8eb FT |
1863 | else { |
1864 | if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || | |
1865 | cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { | |
1866 | dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", | |
1867 | cmd); | |
1868 | list_add_tail(&ncmd->list, | |
1869 | &hostdata->autosense); | |
1870 | } else | |
1871 | complete_cmd(instance, cmd); | |
1da177e4 LT |
1872 | } |
1873 | ||
aff0cf9a FT |
1874 | /* |
1875 | * Restore phase bits to 0 so an interrupted selection, | |
1da177e4 LT |
1876 | * arbitration can resume. |
1877 | */ | |
1878 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
72064a78 FT |
1879 | |
1880 | /* Enable reselect interrupts */ | |
1881 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1da177e4 LT |
1882 | return; |
1883 | case MESSAGE_REJECT: | |
1884 | /* Accept message by clearing ACK */ | |
1885 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1886 | switch (hostdata->last_message) { | |
1887 | case HEAD_OF_QUEUE_TAG: | |
1888 | case ORDERED_QUEUE_TAG: | |
1889 | case SIMPLE_QUEUE_TAG: | |
1890 | cmd->device->simple_tags = 0; | |
9cb78c16 | 1891 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 LT |
1892 | break; |
1893 | default: | |
1894 | break; | |
1895 | } | |
340b9612 | 1896 | break; |
1da177e4 LT |
1897 | case DISCONNECT:{ |
1898 | /* Accept message by clearing ACK */ | |
1899 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1da177e4 | 1900 | hostdata->connected = NULL; |
32b26a10 | 1901 | list_add(&ncmd->list, &hostdata->disconnected); |
0d3d9a42 FT |
1902 | dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, |
1903 | instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", | |
1904 | cmd, scmd_id(cmd), cmd->device->lun); | |
1905 | ||
aff0cf9a FT |
1906 | /* |
1907 | * Restore phase bits to 0 so an interrupted selection, | |
1da177e4 LT |
1908 | * arbitration can resume. |
1909 | */ | |
1910 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1911 | ||
1912 | /* Enable reselect interrupts */ | |
1913 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
1da177e4 LT |
1914 | return; |
1915 | } | |
aff0cf9a | 1916 | /* |
1da177e4 | 1917 | * The SCSI data pointer is *IMPLICITLY* saved on a disconnect |
aff0cf9a | 1918 | * operation, in violation of the SCSI spec so we can safely |
1da177e4 LT |
1919 | * ignore SAVE/RESTORE pointers calls. |
1920 | * | |
aff0cf9a | 1921 | * Unfortunately, some disks violate the SCSI spec and |
1da177e4 | 1922 | * don't issue the required SAVE_POINTERS message before |
aff0cf9a | 1923 | * disconnecting, and we have to break spec to remain |
1da177e4 LT |
1924 | * compatible. |
1925 | */ | |
1926 | case SAVE_POINTERS: | |
1927 | case RESTORE_POINTERS: | |
1928 | /* Accept message by clearing ACK */ | |
1929 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1930 | break; | |
1931 | case EXTENDED_MESSAGE: | |
c16df32e FT |
1932 | /* |
1933 | * Start the message buffer with the EXTENDED_MESSAGE | |
1934 | * byte, since spi_print_msg() wants the whole thing. | |
1935 | */ | |
1da177e4 LT |
1936 | extended_msg[0] = EXTENDED_MESSAGE; |
1937 | /* Accept first byte by clearing ACK */ | |
1938 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
11d2f63b FT |
1939 | |
1940 | spin_unlock_irq(&hostdata->lock); | |
1941 | ||
b746545f | 1942 | dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); |
1da177e4 LT |
1943 | |
1944 | len = 2; | |
1945 | data = extended_msg + 1; | |
1946 | phase = PHASE_MSGIN; | |
1947 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
1948 | dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", |
1949 | (int)extended_msg[1], | |
1950 | (int)extended_msg[2]); | |
1da177e4 | 1951 | |
e0783ed3 FT |
1952 | if (!len && extended_msg[1] > 0 && |
1953 | extended_msg[1] <= sizeof(extended_msg) - 2) { | |
1da177e4 LT |
1954 | /* Accept third byte by clearing ACK */ |
1955 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1956 | len = extended_msg[1] - 1; | |
1957 | data = extended_msg + 3; | |
1958 | phase = PHASE_MSGIN; | |
1959 | ||
1960 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
1961 | dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", |
1962 | len); | |
1da177e4 LT |
1963 | |
1964 | switch (extended_msg[2]) { | |
1965 | case EXTENDED_SDTR: | |
1966 | case EXTENDED_WDTR: | |
1967 | case EXTENDED_MODIFY_DATA_POINTER: | |
1968 | case EXTENDED_EXTENDED_IDENTIFY: | |
1969 | tmp = 0; | |
1970 | } | |
1971 | } else if (len) { | |
6a6ff4ac | 1972 | shost_printk(KERN_ERR, instance, "error receiving extended message\n"); |
1da177e4 LT |
1973 | tmp = 0; |
1974 | } else { | |
6a6ff4ac FT |
1975 | shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", |
1976 | extended_msg[2], extended_msg[1]); | |
1da177e4 LT |
1977 | tmp = 0; |
1978 | } | |
11d2f63b FT |
1979 | |
1980 | spin_lock_irq(&hostdata->lock); | |
1981 | if (!hostdata->connected) | |
1982 | return; | |
1983 | ||
1da177e4 LT |
1984 | /* Fall through to reject message */ |
1985 | ||
aff0cf9a FT |
1986 | /* |
1987 | * If we get something weird that we aren't expecting, | |
1da177e4 LT |
1988 | * reject it. |
1989 | */ | |
1990 | default: | |
1991 | if (!tmp) { | |
6a6ff4ac | 1992 | shost_printk(KERN_ERR, instance, "rejecting message "); |
1abfd370 | 1993 | spi_print_msg(extended_msg); |
1da177e4 LT |
1994 | printk("\n"); |
1995 | } else if (tmp != EXTENDED_MESSAGE) | |
017560fc JG |
1996 | scmd_printk(KERN_INFO, cmd, |
1997 | "rejecting unknown message %02x\n",tmp); | |
1da177e4 | 1998 | else |
017560fc JG |
1999 | scmd_printk(KERN_INFO, cmd, |
2000 | "rejecting unknown extended message code %02x, length %d\n", extended_msg[1], extended_msg[0]); | |
1da177e4 LT |
2001 | |
2002 | msgout = MESSAGE_REJECT; | |
2003 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
2004 | break; | |
2005 | } /* switch (tmp) */ | |
2006 | break; | |
2007 | case PHASE_MSGOUT: | |
2008 | len = 1; | |
2009 | data = &msgout; | |
2010 | hostdata->last_message = msgout; | |
2011 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2012 | if (msgout == ABORT) { | |
1da177e4 LT |
2013 | hostdata->connected = NULL; |
2014 | cmd->result = DID_ERROR << 16; | |
677e0194 | 2015 | complete_cmd(instance, cmd); |
1da177e4 LT |
2016 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
2017 | return; | |
2018 | } | |
2019 | msgout = NOP; | |
2020 | break; | |
2021 | case PHASE_CMDOUT: | |
2022 | len = cmd->cmd_len; | |
2023 | data = cmd->cmnd; | |
aff0cf9a FT |
2024 | /* |
2025 | * XXX for performance reasons, on machines with a | |
2026 | * PSEUDO-DMA architecture we should probably | |
2027 | * use the dma transfer function. | |
1da177e4 LT |
2028 | */ |
2029 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1da177e4 LT |
2030 | break; |
2031 | case PHASE_STATIN: | |
2032 | len = 1; | |
2033 | data = &tmp; | |
2034 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2035 | cmd->SCp.Status = tmp; | |
2036 | break; | |
2037 | default: | |
6a6ff4ac | 2038 | shost_printk(KERN_ERR, instance, "unknown phase\n"); |
4dde8f7d | 2039 | NCR5380_dprint(NDEBUG_ANY, instance); |
1da177e4 | 2040 | } /* switch(phase) */ |
686f3990 | 2041 | } else { |
11d2f63b | 2042 | spin_unlock_irq(&hostdata->lock); |
686f3990 | 2043 | NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 2044 | spin_lock_irq(&hostdata->lock); |
1da177e4 | 2045 | } |
11d2f63b | 2046 | } |
1da177e4 LT |
2047 | } |
2048 | ||
2049 | /* | |
2050 | * Function : void NCR5380_reselect (struct Scsi_Host *instance) | |
2051 | * | |
aff0cf9a | 2052 | * Purpose : does reselection, initializing the instance->connected |
594d4ba3 FT |
2053 | * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q |
2054 | * nexus has been reestablished, | |
aff0cf9a | 2055 | * |
1da177e4 | 2056 | * Inputs : instance - this instance of the NCR5380. |
1da177e4 LT |
2057 | */ |
2058 | ||
2059 | static void NCR5380_reselect(struct Scsi_Host *instance) { | |
e8a60144 | 2060 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
2061 | unsigned char target_mask; |
2062 | unsigned char lun, phase; | |
2063 | int len; | |
2064 | unsigned char msg[3]; | |
2065 | unsigned char *data; | |
32b26a10 FT |
2066 | struct NCR5380_cmd *ncmd; |
2067 | struct scsi_cmnd *tmp; | |
1da177e4 LT |
2068 | |
2069 | /* | |
2070 | * Disable arbitration, etc. since the host adapter obviously | |
2071 | * lost, and tell an interrupted NCR5380_select() to restart. | |
2072 | */ | |
2073 | ||
2074 | NCR5380_write(MODE_REG, MR_BASE); | |
1da177e4 LT |
2075 | |
2076 | target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); | |
b746545f FT |
2077 | |
2078 | dsprintk(NDEBUG_RESELECTION, instance, "reselect\n"); | |
1da177e4 | 2079 | |
aff0cf9a | 2080 | /* |
1da177e4 LT |
2081 | * At this point, we have detected that our SCSI ID is on the bus, |
2082 | * SEL is true and BSY was false for at least one bus settle delay | |
2083 | * (400 ns). | |
2084 | * | |
2085 | * We must assert BSY ourselves, until the target drops the SEL | |
2086 | * signal. | |
2087 | */ | |
2088 | ||
2089 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); | |
72064a78 FT |
2090 | if (NCR5380_poll_politely(instance, |
2091 | STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { | |
2092 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2093 | return; | |
2094 | } | |
1da177e4 LT |
2095 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2096 | ||
2097 | /* | |
2098 | * Wait for target to go into MSGIN. | |
1da177e4 LT |
2099 | */ |
2100 | ||
1cc160e1 | 2101 | if (NCR5380_poll_politely(instance, |
72064a78 FT |
2102 | STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { |
2103 | do_abort(instance); | |
2104 | return; | |
2105 | } | |
1da177e4 LT |
2106 | |
2107 | len = 1; | |
2108 | data = msg; | |
2109 | phase = PHASE_MSGIN; | |
2110 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2111 | ||
72064a78 FT |
2112 | if (len) { |
2113 | do_abort(instance); | |
2114 | return; | |
2115 | } | |
2116 | ||
1da177e4 | 2117 | if (!(msg[0] & 0x80)) { |
72064a78 | 2118 | shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); |
1abfd370 | 2119 | spi_print_msg(msg); |
72064a78 FT |
2120 | printk("\n"); |
2121 | do_abort(instance); | |
2122 | return; | |
2123 | } | |
2124 | lun = msg[0] & 0x07; | |
1da177e4 | 2125 | |
72064a78 FT |
2126 | /* |
2127 | * We need to add code for SCSI-II to track which devices have | |
2128 | * I_T_L_Q nexuses established, and which have simple I_T_L | |
2129 | * nexuses so we can chose to do additional data transfer. | |
2130 | */ | |
1da177e4 | 2131 | |
72064a78 FT |
2132 | /* |
2133 | * Find the command corresponding to the I_T_L or I_T_L_Q nexus we | |
2134 | * just reestablished, and remove it from the disconnected queue. | |
2135 | */ | |
1da177e4 | 2136 | |
32b26a10 FT |
2137 | tmp = NULL; |
2138 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2139 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2140 | ||
2141 | if (target_mask == (1 << scmd_id(cmd)) && | |
2142 | lun == (u8)cmd->device->lun) { | |
2143 | list_del(&ncmd->list); | |
2144 | tmp = cmd; | |
72064a78 | 2145 | break; |
1da177e4 LT |
2146 | } |
2147 | } | |
0d3d9a42 FT |
2148 | |
2149 | if (tmp) { | |
2150 | dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, | |
2151 | "reselect: removed %p from disconnected queue\n", tmp); | |
2152 | } else { | |
72064a78 FT |
2153 | shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", |
2154 | target_mask, lun); | |
2155 | /* | |
2156 | * Since we have an established nexus that we can't do anything with, | |
2157 | * we must abort it. | |
2158 | */ | |
1da177e4 | 2159 | do_abort(instance); |
72064a78 | 2160 | return; |
1da177e4 | 2161 | } |
72064a78 FT |
2162 | |
2163 | /* Accept message by clearing ACK */ | |
2164 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2165 | ||
2166 | hostdata->connected = tmp; | |
b746545f FT |
2167 | dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu, tag %d\n", |
2168 | scmd_id(tmp), tmp->device->lun, tmp->tag); | |
1da177e4 LT |
2169 | } |
2170 | ||
2171 | /* | |
2172 | * Function : void NCR5380_dma_complete (struct Scsi_Host *instance) | |
2173 | * | |
2174 | * Purpose : called by interrupt handler when DMA finishes or a phase | |
594d4ba3 | 2175 | * mismatch occurs (which would finish the DMA transfer). |
1da177e4 LT |
2176 | * |
2177 | * Inputs : instance - this instance of the NCR5380. | |
2178 | * | |
710ddd0d | 2179 | * Returns : pointer to the scsi_cmnd structure for which the I_T_L |
594d4ba3 | 2180 | * nexus has been reestablished, on failure NULL is returned. |
1da177e4 LT |
2181 | */ |
2182 | ||
2183 | #ifdef REAL_DMA | |
2184 | static void NCR5380_dma_complete(NCR5380_instance * instance) { | |
e8a60144 | 2185 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 2186 | int transferred; |
1da177e4 LT |
2187 | |
2188 | /* | |
2189 | * XXX this might not be right. | |
2190 | * | |
2191 | * Wait for final byte to transfer, ie wait for ACK to go false. | |
2192 | * | |
aff0cf9a | 2193 | * We should use the Last Byte Sent bit, unfortunately this is |
1da177e4 LT |
2194 | * not available on the 5380/5381 (only the various CMOS chips) |
2195 | * | |
2196 | * FIXME: timeout, and need to handle long timeout/irq case | |
2197 | */ | |
2198 | ||
2199 | NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ); | |
2200 | ||
1da177e4 LT |
2201 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2202 | ||
2203 | /* | |
2204 | * The only places we should see a phase mismatch and have to send | |
2205 | * data from the same set of pointers will be the data transfer | |
2206 | * phases. So, residual, requested length are only important here. | |
2207 | */ | |
2208 | ||
2209 | if (!(hostdata->connected->SCp.phase & SR_CD)) { | |
2210 | transferred = instance->dmalen - NCR5380_dma_residual(); | |
2211 | hostdata->connected->SCp.this_residual -= transferred; | |
2212 | hostdata->connected->SCp.ptr += transferred; | |
2213 | } | |
2214 | } | |
2215 | #endif /* def REAL_DMA */ | |
2216 | ||
8b00c3d5 FT |
2217 | /** |
2218 | * list_find_cmd - test for presence of a command in a linked list | |
2219 | * @haystack: list of commands | |
2220 | * @needle: command to search for | |
2221 | */ | |
2222 | ||
2223 | static bool list_find_cmd(struct list_head *haystack, | |
2224 | struct scsi_cmnd *needle) | |
2225 | { | |
2226 | struct NCR5380_cmd *ncmd; | |
2227 | ||
2228 | list_for_each_entry(ncmd, haystack, list) | |
2229 | if (NCR5380_to_scmd(ncmd) == needle) | |
2230 | return true; | |
2231 | return false; | |
2232 | } | |
2233 | ||
2234 | /** | |
2235 | * list_remove_cmd - remove a command from linked list | |
2236 | * @haystack: list of commands | |
2237 | * @needle: command to remove | |
2238 | */ | |
2239 | ||
2240 | static bool list_del_cmd(struct list_head *haystack, | |
2241 | struct scsi_cmnd *needle) | |
2242 | { | |
2243 | if (list_find_cmd(haystack, needle)) { | |
2244 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); | |
2245 | ||
2246 | list_del(&ncmd->list); | |
2247 | return true; | |
2248 | } | |
2249 | return false; | |
2250 | } | |
2251 | ||
2252 | /** | |
2253 | * NCR5380_abort - scsi host eh_abort_handler() method | |
2254 | * @cmd: the command to be aborted | |
2255 | * | |
2256 | * Try to abort a given command by removing it from queues and/or sending | |
2257 | * the target an abort message. This may not succeed in causing a target | |
2258 | * to abort the command. Nonetheless, the low-level driver must forget about | |
2259 | * the command because the mid-layer reclaims it and it may be re-issued. | |
2260 | * | |
2261 | * The normal path taken by a command is as follows. For EH we trace this | |
2262 | * same path to locate and abort the command. | |
2263 | * | |
2264 | * unissued -> selecting -> [unissued -> selecting ->]... connected -> | |
2265 | * [disconnected -> connected ->]... | |
2266 | * [autosense -> connected ->] done | |
2267 | * | |
2268 | * If cmd is unissued then just remove it. | |
2269 | * If cmd is disconnected, try to select the target. | |
2270 | * If cmd is connected, try to send an abort message. | |
2271 | * If cmd is waiting for autosense, give it a chance to complete but check | |
2272 | * that it isn't left connected. | |
2273 | * If cmd was not found at all then presumably it has already been completed, | |
2274 | * in which case return SUCCESS to try to avoid further EH measures. | |
2275 | * If the command has not completed yet, we must not fail to find it. | |
1da177e4 LT |
2276 | */ |
2277 | ||
710ddd0d FT |
2278 | static int NCR5380_abort(struct scsi_cmnd *cmd) |
2279 | { | |
1da177e4 | 2280 | struct Scsi_Host *instance = cmd->device->host; |
e8a60144 | 2281 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
11d2f63b | 2282 | unsigned long flags; |
8b00c3d5 | 2283 | int result = SUCCESS; |
1fa6b5fb | 2284 | |
11d2f63b FT |
2285 | spin_lock_irqsave(&hostdata->lock, flags); |
2286 | ||
32b26a10 | 2287 | #if (NDEBUG & NDEBUG_ANY) |
8b00c3d5 | 2288 | scmd_printk(KERN_INFO, cmd, __func__); |
32b26a10 | 2289 | #endif |
e5c3fddf FT |
2290 | NCR5380_dprint(NDEBUG_ANY, instance); |
2291 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
1da177e4 | 2292 | |
8b00c3d5 FT |
2293 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2294 | dsprintk(NDEBUG_ABORT, instance, | |
2295 | "abort: removed %p from issue queue\n", cmd); | |
2296 | cmd->result = DID_ABORT << 16; | |
2297 | cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ | |
2298 | } | |
2299 | ||
707d62b3 FT |
2300 | if (hostdata->selecting == cmd) { |
2301 | dsprintk(NDEBUG_ABORT, instance, | |
2302 | "abort: cmd %p == selecting\n", cmd); | |
2303 | hostdata->selecting = NULL; | |
2304 | cmd->result = DID_ABORT << 16; | |
2305 | complete_cmd(instance, cmd); | |
2306 | goto out; | |
2307 | } | |
2308 | ||
8b00c3d5 FT |
2309 | if (list_del_cmd(&hostdata->disconnected, cmd)) { |
2310 | dsprintk(NDEBUG_ABORT, instance, | |
2311 | "abort: removed %p from disconnected list\n", cmd); | |
2312 | cmd->result = DID_ERROR << 16; | |
2313 | if (!hostdata->connected) | |
2314 | NCR5380_select(instance, cmd); | |
2315 | if (hostdata->connected != cmd) { | |
2316 | complete_cmd(instance, cmd); | |
2317 | result = FAILED; | |
2318 | goto out; | |
2319 | } | |
2320 | } | |
2321 | ||
2322 | if (hostdata->connected == cmd) { | |
2323 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2324 | hostdata->connected = NULL; | |
2325 | if (do_abort(instance)) { | |
2326 | set_host_byte(cmd, DID_ERROR); | |
2327 | complete_cmd(instance, cmd); | |
2328 | result = FAILED; | |
2329 | goto out; | |
2330 | } | |
2331 | set_host_byte(cmd, DID_ABORT); | |
2332 | #ifdef REAL_DMA | |
2333 | hostdata->dma_len = 0; | |
2334 | #endif | |
2335 | if (cmd->cmnd[0] == REQUEST_SENSE) | |
2336 | complete_cmd(instance, cmd); | |
2337 | else { | |
2338 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
2339 | ||
2340 | /* Perform autosense for this command */ | |
2341 | list_add(&ncmd->list, &hostdata->autosense); | |
2342 | } | |
2343 | } | |
2344 | ||
2345 | if (list_find_cmd(&hostdata->autosense, cmd)) { | |
2346 | dsprintk(NDEBUG_ABORT, instance, | |
2347 | "abort: found %p on sense queue\n", cmd); | |
2348 | spin_unlock_irqrestore(&hostdata->lock, flags); | |
2349 | queue_work(hostdata->work_q, &hostdata->main_task); | |
2350 | msleep(1000); | |
2351 | spin_lock_irqsave(&hostdata->lock, flags); | |
2352 | if (list_del_cmd(&hostdata->autosense, cmd)) { | |
2353 | dsprintk(NDEBUG_ABORT, instance, | |
2354 | "abort: removed %p from sense queue\n", cmd); | |
2355 | set_host_byte(cmd, DID_ABORT); | |
2356 | complete_cmd(instance, cmd); | |
2357 | goto out; | |
2358 | } | |
2359 | } | |
2360 | ||
2361 | if (hostdata->connected == cmd) { | |
2362 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2363 | hostdata->connected = NULL; | |
2364 | if (do_abort(instance)) { | |
2365 | set_host_byte(cmd, DID_ERROR); | |
2366 | complete_cmd(instance, cmd); | |
2367 | result = FAILED; | |
2368 | goto out; | |
2369 | } | |
2370 | set_host_byte(cmd, DID_ABORT); | |
2371 | #ifdef REAL_DMA | |
2372 | hostdata->dma_len = 0; | |
2373 | #endif | |
2374 | complete_cmd(instance, cmd); | |
2375 | } | |
2376 | ||
2377 | out: | |
2378 | if (result == FAILED) | |
2379 | dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); | |
2380 | else | |
2381 | dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); | |
2382 | ||
2383 | queue_work(hostdata->work_q, &hostdata->main_task); | |
11d2f63b | 2384 | spin_unlock_irqrestore(&hostdata->lock, flags); |
32b26a10 | 2385 | |
8b00c3d5 | 2386 | return result; |
1da177e4 LT |
2387 | } |
2388 | ||
2389 | ||
3be1b3ea FT |
2390 | /** |
2391 | * NCR5380_bus_reset - reset the SCSI bus | |
2392 | * @cmd: SCSI command undergoing EH | |
1da177e4 | 2393 | * |
3be1b3ea | 2394 | * Returns SUCCESS |
1da177e4 LT |
2395 | */ |
2396 | ||
710ddd0d | 2397 | static int NCR5380_bus_reset(struct scsi_cmnd *cmd) |
68b3aa7c JG |
2398 | { |
2399 | struct Scsi_Host *instance = cmd->device->host; | |
11d2f63b | 2400 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
62717f53 | 2401 | int i; |
11d2f63b | 2402 | unsigned long flags; |
62717f53 | 2403 | struct NCR5380_cmd *ncmd; |
68b3aa7c | 2404 | |
11d2f63b | 2405 | spin_lock_irqsave(&hostdata->lock, flags); |
3be1b3ea FT |
2406 | |
2407 | #if (NDEBUG & NDEBUG_ANY) | |
62717f53 | 2408 | scmd_printk(KERN_INFO, cmd, __func__); |
3be1b3ea | 2409 | #endif |
e5c3fddf FT |
2410 | NCR5380_dprint(NDEBUG_ANY, instance); |
2411 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
68b3aa7c | 2412 | |
68b3aa7c | 2413 | do_reset(instance); |
3be1b3ea | 2414 | |
62717f53 FT |
2415 | /* reset NCR registers */ |
2416 | NCR5380_write(MODE_REG, MR_BASE); | |
2417 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
2418 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2419 | ||
2420 | /* After the reset, there are no more connected or disconnected commands | |
2421 | * and no busy units; so clear the low-level status here to avoid | |
2422 | * conflicts when the mid-level code tries to wake up the affected | |
2423 | * commands! | |
2424 | */ | |
2425 | ||
2426 | hostdata->selecting = NULL; | |
2427 | ||
2428 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2429 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2430 | ||
2431 | set_host_byte(cmd, DID_RESET); | |
2432 | cmd->scsi_done(cmd); | |
2433 | } | |
2434 | ||
2435 | list_for_each_entry(ncmd, &hostdata->autosense, list) { | |
2436 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2437 | ||
2438 | set_host_byte(cmd, DID_RESET); | |
2439 | cmd->scsi_done(cmd); | |
2440 | } | |
2441 | ||
2442 | if (hostdata->connected) { | |
2443 | set_host_byte(hostdata->connected, DID_RESET); | |
2444 | complete_cmd(instance, hostdata->connected); | |
2445 | hostdata->connected = NULL; | |
2446 | } | |
2447 | ||
2448 | if (hostdata->sensing) { | |
2449 | set_host_byte(hostdata->connected, DID_RESET); | |
2450 | complete_cmd(instance, hostdata->sensing); | |
2451 | hostdata->sensing = NULL; | |
2452 | } | |
2453 | ||
2454 | for (i = 0; i < 8; ++i) | |
2455 | hostdata->busy[i] = 0; | |
2456 | #ifdef REAL_DMA | |
2457 | hostdata->dma_len = 0; | |
2458 | #endif | |
2459 | ||
2460 | queue_work(hostdata->work_q, &hostdata->main_task); | |
11d2f63b | 2461 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1da177e4 | 2462 | |
1da177e4 LT |
2463 | return SUCCESS; |
2464 | } |