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ncr5380: Dont re-enter NCR5380_select()
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aff0cf9a 1/*
1da177e4 2 * NCR 5380 generic driver routines. These should make it *trivial*
594d4ba3
FT
3 * to implement 5380 SCSI drivers under Linux with a non-trantor
4 * architecture.
1da177e4 5 *
594d4ba3 6 * Note that these routines also work with NR53c400 family chips.
1da177e4
LT
7 *
8 * Copyright 1993, Drew Eckhardt
594d4ba3
FT
9 * Visionary Computing
10 * (Unix and Linux consulting and custom programming)
11 * drew@colorado.edu
12 * +1 (303) 666-5836
1da177e4 13 *
aff0cf9a 14 * For more information, please consult
1da177e4
LT
15 *
16 * NCR 5380 Family
17 * SCSI Protocol Controller
18 * Databook
19 *
20 * NCR Microelectronics
21 * 1635 Aeroplaza Drive
22 * Colorado Springs, CO 80916
23 * 1+ (719) 578-3400
24 * 1+ (800) 334-5454
25 */
26
27/*
c16df32e
FT
28 * With contributions from Ray Van Tassle, Ingmar Baumgart,
29 * Ronald van Cuijlenborg, Alan Cox and others.
1da177e4
LT
30 */
31
32/*
aff0cf9a 33 * Further development / testing that should be done :
1da177e4 34 * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete
594d4ba3
FT
35 * code so that everything does the same thing that's done at the
36 * end of a pseudo-DMA read operation.
1da177e4
LT
37 *
38 * 2. Fix REAL_DMA (interrupt driven, polled works fine) -
594d4ba3
FT
39 * basically, transfer size needs to be reduced by one
40 * and the last byte read as is done with PSEUDO_DMA.
aff0cf9a
FT
41 *
42 * 4. Test SCSI-II tagged queueing (I have no devices which support
594d4ba3 43 * tagged queueing)
1da177e4
LT
44 */
45
1da177e4 46#ifndef notyet
1da177e4
LT
47#undef REAL_DMA
48#endif
49
1da177e4
LT
50#ifdef BOARD_REQUIRES_NO_DELAY
51#define io_recovery_delay(x)
52#else
53#define io_recovery_delay(x) udelay(x)
54#endif
55
56/*
57 * Design
58 *
aff0cf9a 59 * This is a generic 5380 driver. To use it on a different platform,
1da177e4 60 * one simply writes appropriate system specific macros (ie, data
aff0cf9a 61 * transfer - some PC's will use the I/O bus, 68K's must use
1da177e4
LT
62 * memory mapped) and drops this file in their 'C' wrapper.
63 *
aff0cf9a 64 * As far as command queueing, two queues are maintained for
1da177e4 65 * each 5380 in the system - commands that haven't been issued yet,
aff0cf9a
FT
66 * and commands that are currently executing. This means that an
67 * unlimited number of commands may be queued, letting
68 * more commands propagate from the higher driver levels giving higher
69 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
70 * allowing multiple commands to propagate all the way to a SCSI-II device
1da177e4
LT
71 * while a command is already executing.
72 *
73 *
aff0cf9a 74 * Issues specific to the NCR5380 :
1da177e4 75 *
aff0cf9a
FT
76 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
77 * piece of hardware that requires you to sit in a loop polling for
78 * the REQ signal as long as you are connected. Some devices are
79 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
686f3990 80 * while doing long seek operations. [...] These
1da177e4
LT
81 * broken devices are the exception rather than the rule and I'd rather
82 * spend my time optimizing for the normal case.
83 *
84 * Architecture :
85 *
86 * At the heart of the design is a coroutine, NCR5380_main,
87 * which is started from a workqueue for each NCR5380 host in the
88 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
89 * removing the commands from the issue queue and calling
aff0cf9a 90 * NCR5380_select() if a nexus is not established.
1da177e4
LT
91 *
92 * Once a nexus is established, the NCR5380_information_transfer()
93 * phase goes through the various phases as instructed by the target.
94 * if the target goes into MSG IN and sends a DISCONNECT message,
95 * the command structure is placed into the per instance disconnected
aff0cf9a 96 * queue, and NCR5380_main tries to find more work. If the target is
1da177e4
LT
97 * idle for too long, the system will try to sleep.
98 *
99 * If a command has disconnected, eventually an interrupt will trigger,
100 * calling NCR5380_intr() which will in turn call NCR5380_reselect
101 * to reestablish a nexus. This will run main if necessary.
102 *
aff0cf9a 103 * On command termination, the done function will be called as
1da177e4
LT
104 * appropriate.
105 *
aff0cf9a 106 * SCSI pointers are maintained in the SCp field of SCSI command
1da177e4
LT
107 * structures, being initialized after the command is connected
108 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
109 * Note that in violation of the standard, an implicit SAVE POINTERS operation
110 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
111 */
112
113/*
114 * Using this file :
115 * This file a skeleton Linux SCSI driver for the NCR 5380 series
aff0cf9a 116 * of chips. To use it, you write an architecture specific functions
1da177e4
LT
117 * and macros and include this file in your driver.
118 *
aff0cf9a
FT
119 * These macros control options :
120 * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be
594d4ba3 121 * defined.
aff0cf9a 122 *
1da177e4 123 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
594d4ba3 124 * for commands that return with a CHECK CONDITION status.
1da177e4
LT
125 *
126 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
594d4ba3 127 * transceivers.
1da177e4
LT
128 *
129 * DONT_USE_INTR - if defined, never use interrupts, even if we probe or
594d4ba3 130 * override-configure an IRQ.
1da177e4 131 *
1da177e4
LT
132 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
133 *
134 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
135 *
136 * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't
594d4ba3
FT
137 * rely on phase mismatch and EOP interrupts to determine end
138 * of phase.
1da177e4 139 *
1da177e4 140 * These macros MUST be defined :
aff0cf9a 141 *
1da177e4
LT
142 * NCR5380_read(register) - read from the specified register
143 *
aff0cf9a 144 * NCR5380_write(register, value) - write to the specific register
1da177e4 145 *
aff0cf9a 146 * NCR5380_implementation_fields - additional fields needed for this
594d4ba3 147 * specific implementation of the NCR5380
1da177e4
LT
148 *
149 * Either real DMA *or* pseudo DMA may be implemented
aff0cf9a 150 * REAL functions :
1da177e4 151 * NCR5380_REAL_DMA should be defined if real DMA is to be used.
aff0cf9a 152 * Note that the DMA setup functions should return the number of bytes
594d4ba3 153 * that they were able to program the controller for.
1da177e4 154 *
aff0cf9a 155 * Also note that generic i386/PC versions of these macros are
594d4ba3
FT
156 * available as NCR5380_i386_dma_write_setup,
157 * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual.
1da177e4
LT
158 *
159 * NCR5380_dma_write_setup(instance, src, count) - initialize
160 * NCR5380_dma_read_setup(instance, dst, count) - initialize
161 * NCR5380_dma_residual(instance); - residual count
162 *
163 * PSEUDO functions :
164 * NCR5380_pwrite(instance, src, count)
165 * NCR5380_pread(instance, dst, count);
166 *
167 * The generic driver is initialized by calling NCR5380_init(instance),
aff0cf9a 168 * after setting the appropriate host specific fields and ID. If the
1da177e4
LT
169 * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance,
170 * possible) function may be used.
171 */
172
54d8fe44
FT
173static int do_abort(struct Scsi_Host *);
174static void do_reset(struct Scsi_Host *);
1da177e4 175
c16df32e 176/**
0d2cf867 177 * initialize_SCp - init the scsi pointer field
594d4ba3 178 * @cmd: command block to set up
1da177e4 179 *
594d4ba3 180 * Set up the internal fields in the SCSI command.
1da177e4
LT
181 */
182
710ddd0d 183static inline void initialize_SCp(struct scsi_cmnd *cmd)
1da177e4 184{
aff0cf9a
FT
185 /*
186 * Initialize the Scsi Pointer field so that all of the commands in the
1da177e4
LT
187 * various queues are valid.
188 */
189
9e0fe44d
BH
190 if (scsi_bufflen(cmd)) {
191 cmd->SCp.buffer = scsi_sglist(cmd);
192 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
45711f1a 193 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4
LT
194 cmd->SCp.this_residual = cmd->SCp.buffer->length;
195 } else {
196 cmd->SCp.buffer = NULL;
197 cmd->SCp.buffers_residual = 0;
9e0fe44d
BH
198 cmd->SCp.ptr = NULL;
199 cmd->SCp.this_residual = 0;
1da177e4 200 }
f27db8eb
FT
201
202 cmd->SCp.Status = 0;
203 cmd->SCp.Message = 0;
1da177e4
LT
204}
205
206/**
b32ade12 207 * NCR5380_poll_politely2 - wait for two chip register values
2f854b82 208 * @instance: controller to poll
b32ade12
FT
209 * @reg1: 5380 register to poll
210 * @bit1: Bitmask to check
211 * @val1: Expected value
212 * @reg2: Second 5380 register to poll
213 * @bit2: Second bitmask to check
214 * @val2: Second expected value
2f854b82
FT
215 * @wait: Time-out in jiffies
216 *
217 * Polls the chip in a reasonably efficient manner waiting for an
218 * event to occur. After a short quick poll we begin to yield the CPU
219 * (if possible). In irq contexts the time-out is arbitrarily limited.
220 * Callers may hold locks as long as they are held in irq mode.
221 *
b32ade12 222 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
1da177e4 223 */
2f854b82 224
b32ade12
FT
225static int NCR5380_poll_politely2(struct Scsi_Host *instance,
226 int reg1, int bit1, int val1,
227 int reg2, int bit2, int val2, int wait)
1da177e4 228{
2f854b82
FT
229 struct NCR5380_hostdata *hostdata = shost_priv(instance);
230 unsigned long deadline = jiffies + wait;
231 unsigned long n;
232
233 /* Busy-wait for up to 10 ms */
234 n = min(10000U, jiffies_to_usecs(wait));
235 n *= hostdata->accesses_per_ms;
b32ade12 236 n /= 2000;
2f854b82 237 do {
b32ade12
FT
238 if ((NCR5380_read(reg1) & bit1) == val1)
239 return 0;
240 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4
LT
241 return 0;
242 cpu_relax();
2f854b82
FT
243 } while (n--);
244
245 if (irqs_disabled() || in_interrupt())
246 return -ETIMEDOUT;
247
248 /* Repeatedly sleep for 1 ms until deadline */
249 while (time_is_after_jiffies(deadline)) {
250 schedule_timeout_uninterruptible(1);
b32ade12
FT
251 if ((NCR5380_read(reg1) & bit1) == val1)
252 return 0;
253 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4 254 return 0;
1da177e4 255 }
2f854b82 256
1da177e4
LT
257 return -ETIMEDOUT;
258}
259
b32ade12
FT
260static inline int NCR5380_poll_politely(struct Scsi_Host *instance,
261 int reg, int bit, int val, int wait)
262{
263 return NCR5380_poll_politely2(instance, reg, bit, val,
264 reg, bit, val, wait);
265}
266
185a7a1c 267#if NDEBUG
1da177e4
LT
268static struct {
269 unsigned char mask;
270 const char *name;
aff0cf9a
FT
271} signals[] = {
272 {SR_DBP, "PARITY"},
273 {SR_RST, "RST"},
274 {SR_BSY, "BSY"},
275 {SR_REQ, "REQ"},
276 {SR_MSG, "MSG"},
277 {SR_CD, "CD"},
278 {SR_IO, "IO"},
279 {SR_SEL, "SEL"},
1da177e4 280 {0, NULL}
aff0cf9a 281},
1da177e4 282basrs[] = {
aff0cf9a
FT
283 {BASR_ATN, "ATN"},
284 {BASR_ACK, "ACK"},
1da177e4 285 {0, NULL}
aff0cf9a
FT
286},
287icrs[] = {
288 {ICR_ASSERT_RST, "ASSERT RST"},
289 {ICR_ASSERT_ACK, "ASSERT ACK"},
290 {ICR_ASSERT_BSY, "ASSERT BSY"},
291 {ICR_ASSERT_SEL, "ASSERT SEL"},
292 {ICR_ASSERT_ATN, "ASSERT ATN"},
293 {ICR_ASSERT_DATA, "ASSERT DATA"},
1da177e4 294 {0, NULL}
aff0cf9a
FT
295},
296mrs[] = {
297 {MR_BLOCK_DMA_MODE, "MODE BLOCK DMA"},
298 {MR_TARGET, "MODE TARGET"},
299 {MR_ENABLE_PAR_CHECK, "MODE PARITY CHECK"},
300 {MR_ENABLE_PAR_INTR, "MODE PARITY INTR"},
0d2cf867 301 {MR_ENABLE_EOP_INTR, "MODE EOP INTR"},
aff0cf9a
FT
302 {MR_MONITOR_BSY, "MODE MONITOR BSY"},
303 {MR_DMA_MODE, "MODE DMA"},
304 {MR_ARBITRATE, "MODE ARBITRATION"},
1da177e4
LT
305 {0, NULL}
306};
307
308/**
0d2cf867
FT
309 * NCR5380_print - print scsi bus signals
310 * @instance: adapter state to dump
1da177e4 311 *
594d4ba3 312 * Print the SCSI bus signals for debugging purposes
1da177e4
LT
313 */
314
315static void NCR5380_print(struct Scsi_Host *instance)
316{
1da177e4 317 unsigned char status, data, basr, mr, icr, i;
1da177e4
LT
318
319 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
320 status = NCR5380_read(STATUS_REG);
321 mr = NCR5380_read(MODE_REG);
322 icr = NCR5380_read(INITIATOR_COMMAND_REG);
323 basr = NCR5380_read(BUS_AND_STATUS_REG);
324
325 printk("STATUS_REG: %02x ", status);
326 for (i = 0; signals[i].mask; ++i)
327 if (status & signals[i].mask)
328 printk(",%s", signals[i].name);
329 printk("\nBASR: %02x ", basr);
330 for (i = 0; basrs[i].mask; ++i)
331 if (basr & basrs[i].mask)
332 printk(",%s", basrs[i].name);
333 printk("\nICR: %02x ", icr);
334 for (i = 0; icrs[i].mask; ++i)
335 if (icr & icrs[i].mask)
336 printk(",%s", icrs[i].name);
337 printk("\nMODE: %02x ", mr);
338 for (i = 0; mrs[i].mask; ++i)
339 if (mr & mrs[i].mask)
340 printk(",%s", mrs[i].name);
341 printk("\n");
342}
343
0d2cf867
FT
344static struct {
345 unsigned char value;
346 const char *name;
347} phases[] = {
348 {PHASE_DATAOUT, "DATAOUT"},
349 {PHASE_DATAIN, "DATAIN"},
350 {PHASE_CMDOUT, "CMDOUT"},
351 {PHASE_STATIN, "STATIN"},
352 {PHASE_MSGOUT, "MSGOUT"},
353 {PHASE_MSGIN, "MSGIN"},
354 {PHASE_UNKNOWN, "UNKNOWN"}
355};
1da177e4 356
c16df32e 357/**
0d2cf867 358 * NCR5380_print_phase - show SCSI phase
594d4ba3 359 * @instance: adapter to dump
1da177e4 360 *
594d4ba3 361 * Print the current SCSI phase for debugging purposes
1da177e4
LT
362 */
363
364static void NCR5380_print_phase(struct Scsi_Host *instance)
365{
1da177e4
LT
366 unsigned char status;
367 int i;
1da177e4
LT
368
369 status = NCR5380_read(STATUS_REG);
370 if (!(status & SR_REQ))
6a6ff4ac 371 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
1da177e4 372 else {
0d2cf867
FT
373 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
374 (phases[i].value != (status & PHASE_MASK)); ++i)
375 ;
6a6ff4ac 376 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
1da177e4
LT
377 }
378}
379#endif
380
1da177e4 381
d5f7e65d 382static int probe_irq __initdata;
1da177e4
LT
383
384/**
594d4ba3
FT
385 * probe_intr - helper for IRQ autoprobe
386 * @irq: interrupt number
387 * @dev_id: unused
388 * @regs: unused
1da177e4 389 *
594d4ba3
FT
390 * Set a flag to indicate the IRQ in question was received. This is
391 * used by the IRQ probe code.
1da177e4 392 */
aff0cf9a 393
7d12e780 394static irqreturn_t __init probe_intr(int irq, void *dev_id)
1da177e4
LT
395{
396 probe_irq = irq;
397 return IRQ_HANDLED;
398}
399
400/**
594d4ba3
FT
401 * NCR5380_probe_irq - find the IRQ of an NCR5380
402 * @instance: NCR5380 controller
403 * @possible: bitmask of ISA IRQ lines
1da177e4 404 *
594d4ba3
FT
405 * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ
406 * and then looking to see what interrupt actually turned up.
1da177e4
LT
407 */
408
702809ce
AM
409static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance,
410 int possible)
1da177e4 411{
e8a60144 412 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
413 unsigned long timeout;
414 int trying_irqs, i, mask;
1da177e4 415
22f5f10d 416 for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1)
4909cc2b 417 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0))
1da177e4
LT
418 trying_irqs |= mask;
419
4e5a800c 420 timeout = jiffies + msecs_to_jiffies(250);
22f5f10d 421 probe_irq = NO_IRQ;
1da177e4
LT
422
423 /*
424 * A interrupt is triggered whenever BSY = false, SEL = true
aff0cf9a 425 * and a bit set in the SELECT_ENABLE_REG is asserted on the
1da177e4
LT
426 * SCSI bus.
427 *
428 * Note that the bus is only driven when the phase control signals
429 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that
430 * to zero.
431 */
432
433 NCR5380_write(TARGET_COMMAND_REG, 0);
434 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
435 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
436 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
437
22f5f10d 438 while (probe_irq == NO_IRQ && time_before(jiffies, timeout))
a9a3047d 439 schedule_timeout_uninterruptible(1);
aff0cf9a 440
1da177e4
LT
441 NCR5380_write(SELECT_ENABLE_REG, 0);
442 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
443
22f5f10d 444 for (i = 1, mask = 2; i < 16; ++i, mask <<= 1)
1da177e4
LT
445 if (trying_irqs & mask)
446 free_irq(i, NULL);
447
448 return probe_irq;
449}
450
451/**
594d4ba3
FT
452 * NCR58380_info - report driver and host information
453 * @instance: relevant scsi host instance
1da177e4 454 *
594d4ba3 455 * For use as the host template info() handler.
1da177e4
LT
456 */
457
8c32513b 458static const char *NCR5380_info(struct Scsi_Host *instance)
1da177e4 459{
8c32513b
FT
460 struct NCR5380_hostdata *hostdata = shost_priv(instance);
461
462 return hostdata->info;
463}
464
465static void prepare_info(struct Scsi_Host *instance)
466{
467 struct NCR5380_hostdata *hostdata = shost_priv(instance);
468
469 snprintf(hostdata->info, sizeof(hostdata->info),
470 "%s, io_port 0x%lx, n_io_port %d, "
471 "base 0x%lx, irq %d, "
472 "can_queue %d, cmd_per_lun %d, "
473 "sg_tablesize %d, this_id %d, "
be3f4121 474 "flags { %s%s%s}, "
8c32513b
FT
475 "options { %s} ",
476 instance->hostt->name, instance->io_port, instance->n_io_port,
477 instance->base, instance->irq,
478 instance->can_queue, instance->cmd_per_lun,
479 instance->sg_tablesize, instance->this_id,
55181be8 480 hostdata->flags & FLAG_NO_DMA_FIXUP ? "NO_DMA_FIXUP " : "",
8c32513b 481 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
9c3f0e2b 482 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "",
1da177e4 483#ifdef AUTOPROBE_IRQ
8c32513b 484 "AUTOPROBE_IRQ "
1da177e4 485#endif
1da177e4 486#ifdef DIFFERENTIAL
8c32513b 487 "DIFFERENTIAL "
1da177e4
LT
488#endif
489#ifdef REAL_DMA
8c32513b 490 "REAL_DMA "
1da177e4
LT
491#endif
492#ifdef REAL_DMA_POLL
8c32513b 493 "REAL_DMA_POLL "
1da177e4
LT
494#endif
495#ifdef PARITY
8c32513b 496 "PARITY "
1da177e4
LT
497#endif
498#ifdef PSEUDO_DMA
8c32513b 499 "PSEUDO_DMA "
8c32513b
FT
500#endif
501 "");
1da177e4
LT
502}
503
a9c2dc43 504#ifdef PSEUDO_DMA
dd7ab71b
AV
505static int __maybe_unused NCR5380_write_info(struct Scsi_Host *instance,
506 char *buffer, int length)
507{
a9c2dc43
FT
508 struct NCR5380_hostdata *hostdata = shost_priv(instance);
509
510 hostdata->spin_max_r = 0;
511 hostdata->spin_max_w = 0;
512 return 0;
dd7ab71b 513}
1da177e4 514
dd7ab71b 515static int __maybe_unused NCR5380_show_info(struct seq_file *m,
0d2cf867 516 struct Scsi_Host *instance)
1da177e4 517{
e8a60144 518 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 519
0c3de38f 520 seq_printf(m, "Highwater I/O busy spin counts: write %d, read %d\n",
a9c2dc43 521 hostdata->spin_max_w, hostdata->spin_max_r);
dd7ab71b 522 return 0;
1da177e4 523}
e5c3fddf 524#endif
1da177e4
LT
525
526/**
0d2cf867 527 * NCR5380_init - initialise an NCR5380
594d4ba3
FT
528 * @instance: adapter to configure
529 * @flags: control flags
1da177e4 530 *
594d4ba3
FT
531 * Initializes *instance and corresponding 5380 chip,
532 * with flags OR'd into the initial flags value.
1da177e4 533 *
594d4ba3 534 * Notes : I assume that the host, hostno, and id bits have been
0d2cf867 535 * set correctly. I don't care about the irq and other fields.
1da177e4 536 *
594d4ba3 537 * Returns 0 for success
1da177e4
LT
538 */
539
6f039790 540static int NCR5380_init(struct Scsi_Host *instance, int flags)
1da177e4 541{
e8a60144 542 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 543 int i;
2f854b82 544 unsigned long deadline;
1da177e4 545
0d2cf867 546 hostdata->host = instance;
1da177e4 547 hostdata->id_mask = 1 << instance->this_id;
0d2cf867 548 hostdata->id_higher_mask = 0;
1da177e4
LT
549 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
550 if (i > hostdata->id_mask)
551 hostdata->id_higher_mask |= i;
552 for (i = 0; i < 8; ++i)
553 hostdata->busy[i] = 0;
554#ifdef REAL_DMA
555 hostdata->dmalen = 0;
556#endif
11d2f63b 557 spin_lock_init(&hostdata->lock);
1da177e4 558 hostdata->connected = NULL;
f27db8eb
FT
559 hostdata->sensing = NULL;
560 INIT_LIST_HEAD(&hostdata->autosense);
32b26a10
FT
561 INIT_LIST_HEAD(&hostdata->unissued);
562 INIT_LIST_HEAD(&hostdata->disconnected);
563
55181be8 564 hostdata->flags = flags;
aff0cf9a 565
8d8601a7 566 INIT_WORK(&hostdata->main_task, NCR5380_main);
0ad0eff9
FT
567 hostdata->work_q = alloc_workqueue("ncr5380_%d",
568 WQ_UNBOUND | WQ_MEM_RECLAIM,
569 1, instance->host_no);
570 if (!hostdata->work_q)
571 return -ENOMEM;
572
8c32513b
FT
573 prepare_info(instance);
574
1da177e4
LT
575 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
576 NCR5380_write(MODE_REG, MR_BASE);
577 NCR5380_write(TARGET_COMMAND_REG, 0);
578 NCR5380_write(SELECT_ENABLE_REG, 0);
2f854b82
FT
579
580 /* Calibrate register polling loop */
581 i = 0;
582 deadline = jiffies + 1;
583 do {
584 cpu_relax();
585 } while (time_is_after_jiffies(deadline));
586 deadline += msecs_to_jiffies(256);
587 do {
588 NCR5380_read(STATUS_REG);
589 ++i;
590 cpu_relax();
591 } while (time_is_after_jiffies(deadline));
592 hostdata->accesses_per_ms = i / 256;
593
b6488f97
FT
594 return 0;
595}
1da177e4 596
b6488f97
FT
597/**
598 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
599 * @instance: adapter to check
600 *
601 * If the system crashed, it may have crashed with a connected target and
602 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
603 * currently established nexus, which we know nothing about. Failing that
604 * do a bus reset.
605 *
606 * Note that a bus reset will cause the chip to assert IRQ.
607 *
608 * Returns 0 if successful, otherwise -ENXIO.
609 */
610
611static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
612{
9c3f0e2b 613 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 614 int pass;
1da177e4
LT
615
616 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
617 switch (pass) {
618 case 1:
619 case 3:
620 case 5:
636b1ec8
FT
621 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
622 NCR5380_poll_politely(instance,
623 STATUS_REG, SR_BSY, 0, 5 * HZ);
1da177e4
LT
624 break;
625 case 2:
636b1ec8 626 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
1da177e4
LT
627 do_abort(instance);
628 break;
629 case 4:
636b1ec8 630 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
1da177e4 631 do_reset(instance);
9c3f0e2b
FT
632 /* Wait after a reset; the SCSI standard calls for
633 * 250ms, we wait 500ms to be on the safe side.
634 * But some Toshiba CD-ROMs need ten times that.
635 */
636 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
637 msleep(2500);
638 else
639 msleep(500);
1da177e4
LT
640 break;
641 case 6:
636b1ec8 642 shost_printk(KERN_ERR, instance, "bus locked solid\n");
1da177e4
LT
643 return -ENXIO;
644 }
645 }
646 return 0;
647}
648
649/**
0d2cf867 650 * NCR5380_exit - remove an NCR5380
594d4ba3 651 * @instance: adapter to remove
0d2cf867
FT
652 *
653 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
1da177e4
LT
654 */
655
a43cf0f3 656static void NCR5380_exit(struct Scsi_Host *instance)
1da177e4 657{
e8a60144 658 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 659
8d8601a7 660 cancel_work_sync(&hostdata->main_task);
0ad0eff9 661 destroy_workqueue(hostdata->work_q);
1da177e4
LT
662}
663
677e0194
FT
664/**
665 * complete_cmd - finish processing a command and return it to the SCSI ML
666 * @instance: the host instance
667 * @cmd: command to complete
668 */
669
670static void complete_cmd(struct Scsi_Host *instance,
671 struct scsi_cmnd *cmd)
672{
673 struct NCR5380_hostdata *hostdata = shost_priv(instance);
674
675 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
676
f27db8eb
FT
677 if (hostdata->sensing == cmd) {
678 /* Autosense processing ends here */
679 if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
680 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
681 set_host_byte(cmd, DID_ERROR);
682 } else
683 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
684 hostdata->sensing = NULL;
685 }
686
677e0194
FT
687 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
688
689 cmd->scsi_done(cmd);
690}
691
1da177e4 692/**
1bb40589
FT
693 * NCR5380_queue_command - queue a command
694 * @instance: the relevant SCSI adapter
695 * @cmd: SCSI command
1da177e4 696 *
1bb40589
FT
697 * cmd is added to the per-instance issue queue, with minor
698 * twiddling done to the host specific fields of cmd. If the
699 * main coroutine is not running, it is restarted.
1da177e4
LT
700 */
701
1bb40589
FT
702static int NCR5380_queue_command(struct Scsi_Host *instance,
703 struct scsi_cmnd *cmd)
1da177e4 704{
1bb40589 705 struct NCR5380_hostdata *hostdata = shost_priv(instance);
32b26a10 706 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1bb40589 707 unsigned long flags;
1da177e4
LT
708
709#if (NDEBUG & NDEBUG_NO_WRITE)
710 switch (cmd->cmnd[0]) {
711 case WRITE_6:
712 case WRITE_10:
dbb6b350 713 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
1da177e4 714 cmd->result = (DID_ERROR << 16);
1bb40589 715 cmd->scsi_done(cmd);
1da177e4
LT
716 return 0;
717 }
0d2cf867 718#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
1da177e4 719
1da177e4
LT
720 cmd->result = 0;
721
11d2f63b 722 spin_lock_irqsave(&hostdata->lock, flags);
1bb40589 723
aff0cf9a
FT
724 /*
725 * Insert the cmd into the issue queue. Note that REQUEST SENSE
1da177e4 726 * commands are added to the head of the queue since any command will
aff0cf9a 727 * clear the contingent allegiance condition that exists and the
1da177e4
LT
728 * sense data is only guaranteed to be valid while the condition exists.
729 */
730
32b26a10
FT
731 if (cmd->cmnd[0] == REQUEST_SENSE)
732 list_add(&ncmd->list, &hostdata->unissued);
733 else
734 list_add_tail(&ncmd->list, &hostdata->unissued);
735
11d2f63b 736 spin_unlock_irqrestore(&hostdata->lock, flags);
1bb40589 737
dbb6b350
FT
738 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
739 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
1da177e4 740
1da177e4 741 /* Kick off command processing */
8d8601a7 742 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4
LT
743 return 0;
744}
745
f27db8eb
FT
746/**
747 * dequeue_next_cmd - dequeue a command for processing
748 * @instance: the scsi host instance
749 *
750 * Priority is given to commands on the autosense queue. These commands
751 * need autosense because of a CHECK CONDITION result.
752 *
753 * Returns a command pointer if a command is found for a target that is
754 * not already busy. Otherwise returns NULL.
755 */
756
757static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
758{
759 struct NCR5380_hostdata *hostdata = shost_priv(instance);
760 struct NCR5380_cmd *ncmd;
761 struct scsi_cmnd *cmd;
762
763 if (list_empty(&hostdata->autosense)) {
764 list_for_each_entry(ncmd, &hostdata->unissued, list) {
765 cmd = NCR5380_to_scmd(ncmd);
766 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
767 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
768
769 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
770 list_del(&ncmd->list);
771 dsprintk(NDEBUG_QUEUES, instance,
772 "dequeue: removed %p from issue queue\n", cmd);
773 return cmd;
774 }
775 }
776 } else {
777 /* Autosense processing begins here */
778 ncmd = list_first_entry(&hostdata->autosense,
779 struct NCR5380_cmd, list);
780 list_del(&ncmd->list);
781 cmd = NCR5380_to_scmd(ncmd);
782 dsprintk(NDEBUG_QUEUES, instance,
783 "dequeue: removed %p from autosense queue\n", cmd);
784 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
785 hostdata->sensing = cmd;
786 return cmd;
787 }
788 return NULL;
789}
790
791static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
792{
793 struct NCR5380_hostdata *hostdata = shost_priv(instance);
794 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
795
796 if (hostdata->sensing) {
797 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
798 list_add(&ncmd->list, &hostdata->autosense);
799 hostdata->sensing = NULL;
800 } else
801 list_add(&ncmd->list, &hostdata->unissued);
802}
803
1da177e4 804/**
0d2cf867 805 * NCR5380_main - NCR state machines
1da177e4 806 *
594d4ba3
FT
807 * NCR5380_main is a coroutine that runs as long as more work can
808 * be done on the NCR5380 host adapters in a system. Both
809 * NCR5380_queue_command() and NCR5380_intr() will try to start it
810 * in case it is not running.
1da177e4
LT
811 */
812
c4028958 813static void NCR5380_main(struct work_struct *work)
1da177e4 814{
c4028958 815 struct NCR5380_hostdata *hostdata =
8d8601a7 816 container_of(work, struct NCR5380_hostdata, main_task);
1da177e4 817 struct Scsi_Host *instance = hostdata->host;
f27db8eb 818 struct scsi_cmnd *cmd;
1da177e4 819 int done;
aff0cf9a 820
1da177e4 821 do {
1da177e4 822 done = 1;
11d2f63b 823
0a4e3612 824 spin_lock_irq(&hostdata->lock);
f27db8eb
FT
825 while (!hostdata->connected &&
826 (cmd = dequeue_next_cmd(instance))) {
1da177e4 827
f27db8eb 828 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
76f13b93 829
f27db8eb
FT
830 /*
831 * Attempt to establish an I_T_L nexus here.
832 * On success, instance->hostdata->connected is set.
833 * On failure, we must add the command back to the
834 * issue queue so we can keep trying.
835 */
836 /*
837 * REQUEST SENSE commands are issued without tagged
838 * queueing, even on SCSI-II devices because the
839 * contingent allegiance condition exists for the
840 * entire unit.
841 */
11d2f63b 842
707d62b3
FT
843 cmd = NCR5380_select(instance, cmd);
844 if (!cmd) {
845 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
f27db8eb
FT
846 } else {
847 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
848 "main: select failed, returning %p to queue\n", cmd);
849 requeue_cmd(instance, cmd);
850 }
851 }
1da177e4
LT
852 if (hostdata->connected
853#ifdef REAL_DMA
854 && !hostdata->dmalen
855#endif
1da177e4 856 ) {
b746545f 857 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
1da177e4 858 NCR5380_information_transfer(instance);
1da177e4 859 done = 0;
1d3db59d 860 }
0a4e3612
FT
861 spin_unlock_irq(&hostdata->lock);
862 if (!done)
863 cond_resched();
1da177e4 864 } while (!done);
1da177e4
LT
865}
866
867#ifndef DONT_USE_INTR
868
869/**
cd400825
FT
870 * NCR5380_intr - generic NCR5380 irq handler
871 * @irq: interrupt number
872 * @dev_id: device info
873 *
874 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
875 * from the disconnected queue, and restarting NCR5380_main()
876 * as required.
877 *
878 * The chip can assert IRQ in any of six different conditions. The IRQ flag
879 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
880 * Three of these six conditions are latched in the Bus and Status Register:
881 * - End of DMA (cleared by ending DMA Mode)
882 * - Parity error (cleared by reading RPIR)
883 * - Loss of BSY (cleared by reading RPIR)
884 * Two conditions have flag bits that are not latched:
885 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
886 * - Bus reset (non-maskable)
887 * The remaining condition has no flag bit at all:
888 * - Selection/reselection
889 *
890 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
891 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
892 * claimed that "the design of the [DP8490] interrupt logic ensures
893 * interrupts will not be lost (they can be on the DP5380)."
894 * The L5380/53C80 datasheet from LOGIC Devices has more details.
895 *
896 * Checking for bus reset by reading RST is futile because of interrupt
897 * latency, but a bus reset will reset chip logic. Checking for parity error
898 * is unnecessary because that interrupt is never enabled. A Loss of BSY
899 * condition will clear DMA Mode. We can tell when this occurs because the
900 * the Busy Monitor interrupt is enabled together with DMA Mode.
1da177e4
LT
901 */
902
cd400825 903static irqreturn_t NCR5380_intr(int irq, void *dev_id)
1da177e4 904{
baa9aac6 905 struct Scsi_Host *instance = dev_id;
cd400825
FT
906 struct NCR5380_hostdata *hostdata = shost_priv(instance);
907 int handled = 0;
1da177e4
LT
908 unsigned char basr;
909 unsigned long flags;
910
11d2f63b 911 spin_lock_irqsave(&hostdata->lock, flags);
cd400825
FT
912
913 basr = NCR5380_read(BUS_AND_STATUS_REG);
914 if (basr & BASR_IRQ) {
915 unsigned char mr = NCR5380_read(MODE_REG);
916 unsigned char sr = NCR5380_read(STATUS_REG);
917
b746545f
FT
918 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
919 irq, basr, sr, mr);
1da177e4 920
1da177e4 921#if defined(REAL_DMA)
cd400825
FT
922 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
923 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
924 * We ack IRQ after clearing Mode Register. Workarounds
925 * for End of DMA errata need to happen in DMA Mode.
926 */
1da177e4 927
b746545f 928 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
1da177e4 929
cd400825 930 int transferred;
1da177e4 931
cd400825
FT
932 if (!hostdata->connected)
933 panic("scsi%d : DMA interrupt with no connected cmd\n",
934 instance->hostno);
1da177e4 935
cd400825
FT
936 transferred = hostdata->dmalen - NCR5380_dma_residual(instance);
937 hostdata->connected->SCp.this_residual -= transferred;
938 hostdata->connected->SCp.ptr += transferred;
939 hostdata->dmalen = 0;
1da177e4 940
cd400825
FT
941 /* FIXME: we need to poll briefly then defer a workqueue task ! */
942 NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2 * HZ);
943
944 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
945 NCR5380_write(MODE_REG, MR_BASE);
946 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
947 } else
948#endif /* REAL_DMA */
949 if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
950 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
951 /* Probably reselected */
952 NCR5380_write(SELECT_ENABLE_REG, 0);
953 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
954
b746545f 955 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
cd400825
FT
956
957 if (!hostdata->connected) {
958 NCR5380_reselect(instance);
959 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4 960 }
cd400825
FT
961 if (!hostdata->connected)
962 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
963 } else {
964 /* Probably Bus Reset */
965 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
966
b746545f 967 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
cd400825
FT
968 }
969 handled = 1;
970 } else {
971 shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n");
972 }
973
11d2f63b 974 spin_unlock_irqrestore(&hostdata->lock, flags);
cd400825
FT
975
976 return IRQ_RETVAL(handled);
1da177e4
LT
977}
978
aff0cf9a 979#endif
1da177e4 980
aff0cf9a 981/*
710ddd0d 982 * Function : int NCR5380_select(struct Scsi_Host *instance,
594d4ba3 983 * struct scsi_cmnd *cmd)
1da177e4
LT
984 *
985 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
594d4ba3
FT
986 * including ARBITRATION, SELECTION, and initial message out for
987 * IDENTIFY and queue messages.
1da177e4 988 *
aff0cf9a 989 * Inputs : instance - instantiation of the 5380 driver on which this
594d4ba3 990 * target lives, cmd - SCSI command to execute.
aff0cf9a 991 *
707d62b3
FT
992 * Returns cmd if selection failed but should be retried,
993 * NULL if selection failed and should not be retried, or
994 * NULL if selection succeeded (hostdata->connected == cmd).
1da177e4 995 *
aff0cf9a 996 * Side effects :
594d4ba3
FT
997 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
998 * with registers as they should have been on entry - ie
999 * SELECT_ENABLE will be set appropriately, the NCR5380
1000 * will cease to drive any SCSI bus signals.
1da177e4 1001 *
594d4ba3
FT
1002 * If successful : I_T_L or I_T_L_Q nexus will be established,
1003 * instance->connected will be set to cmd.
1004 * SELECT interrupt will be disabled.
1da177e4 1005 *
594d4ba3
FT
1006 * If failed (no target) : cmd->scsi_done() will be called, and the
1007 * cmd->result host byte set to DID_BAD_TARGET.
1da177e4 1008 */
aff0cf9a 1009
707d62b3
FT
1010static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
1011 struct scsi_cmnd *cmd)
1da177e4 1012{
e8a60144 1013 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1014 unsigned char tmp[3], phase;
1015 unsigned char *data;
1016 int len;
1da177e4 1017 int err;
1da177e4 1018
1da177e4 1019 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
b746545f
FT
1020 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
1021 instance->this_id);
1da177e4 1022
707d62b3
FT
1023 /*
1024 * Arbitration and selection phases are slow and involve dropping the
1025 * lock, so we have to watch out for EH. An exception handler may
1026 * change 'selecting' to NULL. This function will then return NULL
1027 * so that the caller will forget about 'cmd'. (During information
1028 * transfer phases, EH may change 'connected' to NULL.)
1029 */
1030 hostdata->selecting = cmd;
1031
aff0cf9a
FT
1032 /*
1033 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1da177e4
LT
1034 * data bus during SELECTION.
1035 */
1036
1037 NCR5380_write(TARGET_COMMAND_REG, 0);
1038
aff0cf9a 1039 /*
1da177e4
LT
1040 * Start arbitration.
1041 */
1042
1043 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1044 NCR5380_write(MODE_REG, MR_ARBITRATE);
1045
55500d9b
FT
1046 /* The chip now waits for BUS FREE phase. Then after the 800 ns
1047 * Bus Free Delay, arbitration will begin.
1048 */
1da177e4 1049
11d2f63b 1050 spin_unlock_irq(&hostdata->lock);
b32ade12
FT
1051 err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0,
1052 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1053 ICR_ARBITRATION_PROGRESS, HZ);
11d2f63b 1054 spin_lock_irq(&hostdata->lock);
b32ade12
FT
1055 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1056 /* Reselection interrupt */
707d62b3 1057 goto out;
b32ade12
FT
1058 }
1059 if (err < 0) {
1060 NCR5380_write(MODE_REG, MR_BASE);
1061 shost_printk(KERN_ERR, instance,
1062 "select: arbitration timeout\n");
707d62b3 1063 goto out;
1da177e4 1064 }
11d2f63b 1065 spin_unlock_irq(&hostdata->lock);
1da177e4 1066
55500d9b 1067 /* The SCSI-2 arbitration delay is 2.4 us */
1da177e4
LT
1068 udelay(3);
1069
1070 /* Check for lost arbitration */
0d2cf867
FT
1071 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1072 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1073 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1da177e4 1074 NCR5380_write(MODE_REG, MR_BASE);
b746545f 1075 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
11d2f63b 1076 spin_lock_irq(&hostdata->lock);
707d62b3 1077 goto out;
1da177e4 1078 }
cf13b083
FT
1079
1080 /* After/during arbitration, BSY should be asserted.
1081 * IBM DPES-31080 Version S31Q works now
1082 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1083 */
1084 NCR5380_write(INITIATOR_COMMAND_REG,
1085 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1da177e4 1086
aff0cf9a
FT
1087 /*
1088 * Again, bus clear + bus settle time is 1.2us, however, this is
1da177e4
LT
1089 * a minimum so we'll udelay ceil(1.2)
1090 */
1091
9c3f0e2b
FT
1092 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1093 udelay(15);
1094 else
1095 udelay(2);
1da177e4 1096
11d2f63b
FT
1097 spin_lock_irq(&hostdata->lock);
1098
72064a78
FT
1099 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1100 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
707d62b3
FT
1101 goto out;
1102
1103 if (!hostdata->selecting) {
1104 NCR5380_write(MODE_REG, MR_BASE);
1105 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1106 goto out;
1107 }
72064a78 1108
b746545f 1109 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1da177e4 1110
aff0cf9a
FT
1111 /*
1112 * Now that we have won arbitration, start Selection process, asserting
1da177e4
LT
1113 * the host and target ID's on the SCSI bus.
1114 */
1115
3d07d22b 1116 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1da177e4 1117
aff0cf9a 1118 /*
1da177e4
LT
1119 * Raise ATN while SEL is true before BSY goes false from arbitration,
1120 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1121 * phase immediately after selection.
1122 */
1123
3d07d22b
FT
1124 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1125 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4
LT
1126 NCR5380_write(MODE_REG, MR_BASE);
1127
aff0cf9a 1128 /*
1da177e4
LT
1129 * Reselect interrupts must be turned off prior to the dropping of BSY,
1130 * otherwise we will trigger an interrupt.
1131 */
1132 NCR5380_write(SELECT_ENABLE_REG, 0);
1133
11d2f63b
FT
1134 spin_unlock_irq(&hostdata->lock);
1135
1da177e4 1136 /*
aff0cf9a 1137 * The initiator shall then wait at least two deskew delays and release
1da177e4
LT
1138 * the BSY signal.
1139 */
0d2cf867 1140 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1da177e4
LT
1141
1142 /* Reset BSY */
3d07d22b
FT
1143 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1144 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4 1145
aff0cf9a 1146 /*
1da177e4 1147 * Something weird happens when we cease to drive BSY - looks
aff0cf9a 1148 * like the board/chip is letting us do another read before the
1da177e4
LT
1149 * appropriate propagation delay has expired, and we're confusing
1150 * a BSY signal from ourselves as the target's response to SELECTION.
1151 *
1152 * A small delay (the 'C++' frontend breaks the pipeline with an
1153 * unnecessary jump, making it work on my 386-33/Trantor T128, the
aff0cf9a
FT
1154 * tighter 'C' code breaks and requires this) solves the problem -
1155 * the 1 us delay is arbitrary, and only used because this delay will
1156 * be the same on other platforms and since it works here, it should
1da177e4
LT
1157 * work there.
1158 *
1159 * wingel suggests that this could be due to failing to wait
1160 * one deskew delay.
1161 */
1162
1163 udelay(1);
1164
b746545f 1165 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1da177e4 1166
aff0cf9a
FT
1167 /*
1168 * The SCSI specification calls for a 250 ms timeout for the actual
1da177e4
LT
1169 * selection.
1170 */
1171
ae753a33
FT
1172 err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY,
1173 msecs_to_jiffies(250));
1da177e4 1174
1da177e4 1175 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
11d2f63b 1176 spin_lock_irq(&hostdata->lock);
1da177e4
LT
1177 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1178 NCR5380_reselect(instance);
cd400825
FT
1179 if (!hostdata->connected)
1180 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
6a6ff4ac 1181 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
707d62b3 1182 goto out;
1da177e4 1183 }
ae753a33
FT
1184
1185 if (err < 0) {
11d2f63b 1186 spin_lock_irq(&hostdata->lock);
ae753a33 1187 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
ae753a33 1188 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1189 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1190 if (hostdata->selecting) {
1191 cmd->result = DID_BAD_TARGET << 16;
1192 complete_cmd(instance, cmd);
1193 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1194 cmd = NULL;
1195 }
1196 goto out;
ae753a33
FT
1197 }
1198
aff0cf9a
FT
1199 /*
1200 * No less than two deskew delays after the initiator detects the
1201 * BSY signal is true, it shall release the SEL signal and may
1da177e4
LT
1202 * change the DATA BUS. -wingel
1203 */
1204
1205 udelay(1);
1206
1207 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1208
1da177e4 1209 /*
aff0cf9a 1210 * Since we followed the SCSI spec, and raised ATN while SEL
1da177e4
LT
1211 * was true but before BSY was false during selection, the information
1212 * transfer phase should be a MESSAGE OUT phase so that we can send the
1213 * IDENTIFY message.
aff0cf9a 1214 *
1da177e4
LT
1215 * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG
1216 * message (2 bytes) with a tag ID that we increment with every command
1217 * until it wraps back to 0.
1218 *
1219 * XXX - it turns out that there are some broken SCSI-II devices,
594d4ba3
FT
1220 * which claim to support tagged queuing but fail when more than
1221 * some number of commands are issued at once.
1da177e4
LT
1222 */
1223
1224 /* Wait for start of REQ/ACK handshake */
1225
1da177e4 1226 err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 1227 spin_lock_irq(&hostdata->lock);
1cc160e1 1228 if (err < 0) {
55500d9b
FT
1229 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1230 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1da177e4 1231 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1232 goto out;
1233 }
1234 if (!hostdata->selecting) {
1235 do_abort(instance);
1236 goto out;
1da177e4
LT
1237 }
1238
b746545f
FT
1239 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1240 scmd_id(cmd));
22f5f10d 1241 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1da177e4
LT
1242
1243 len = 1;
1244 cmd->tag = 0;
1245
1246 /* Send message(s) */
1247 data = tmp;
1248 phase = PHASE_MSGOUT;
1249 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f 1250 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1da177e4 1251 /* XXX need to handle errors here */
11d2f63b 1252
1da177e4 1253 hostdata->connected = cmd;
3d07d22b 1254 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1da177e4 1255
28424d3a 1256 initialize_SCp(cmd);
1da177e4 1257
707d62b3
FT
1258 cmd = NULL;
1259
1260out:
1261 if (!hostdata->selecting)
1262 return NULL;
1263 hostdata->selecting = NULL;
1264 return cmd;
1da177e4
LT
1265}
1266
aff0cf9a
FT
1267/*
1268 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
594d4ba3 1269 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1270 *
1271 * Purpose : transfers data in given phase using polled I/O
1272 *
aff0cf9a 1273 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1274 * what phase is expected, *count - pointer to number of
1275 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1276 *
1da177e4 1277 * Returns : -1 when different phase is entered without transferring
0d2cf867 1278 * maximum number of bytes, 0 if all bytes are transferred or exit
594d4ba3 1279 * is in same phase.
1da177e4 1280 *
594d4ba3 1281 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1282 *
1283 * XXX Note : handling for bus free may be useful.
1284 */
1285
1286/*
aff0cf9a 1287 * Note : this code is not as quick as it could be, however it
1da177e4
LT
1288 * IS 100% reliable, and for the actual data transfer where speed
1289 * counts, we will always do a pseudo DMA or DMA transfer.
1290 */
1291
0d2cf867
FT
1292static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1293 unsigned char *phase, int *count,
1294 unsigned char **data)
1295{
1da177e4
LT
1296 unsigned char p = *phase, tmp;
1297 int c = *count;
1298 unsigned char *d = *data;
1da177e4 1299
aff0cf9a
FT
1300 /*
1301 * The NCR5380 chip will only drive the SCSI bus when the
1da177e4
LT
1302 * phase specified in the appropriate bits of the TARGET COMMAND
1303 * REGISTER match the STATUS REGISTER
1304 */
1305
0d2cf867 1306 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1da177e4 1307
1da177e4 1308 do {
aff0cf9a
FT
1309 /*
1310 * Wait for assertion of REQ, after which the phase bits will be
1311 * valid
1da177e4
LT
1312 */
1313
686f3990 1314 if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1da177e4 1315 break;
1da177e4 1316
b746545f 1317 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1da177e4
LT
1318
1319 /* Check for phase mismatch */
686f3990 1320 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
b746545f
FT
1321 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1322 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1da177e4
LT
1323 break;
1324 }
0d2cf867 1325
1da177e4
LT
1326 /* Do actual transfer from SCSI bus to / from memory */
1327 if (!(p & SR_IO))
1328 NCR5380_write(OUTPUT_DATA_REG, *d);
1329 else
1330 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1331
1332 ++d;
1333
aff0cf9a 1334 /*
1da177e4
LT
1335 * The SCSI standard suggests that in MSGOUT phase, the initiator
1336 * should drop ATN on the last byte of the message phase
1337 * after REQ has been asserted for the handshake but before
1338 * the initiator raises ACK.
1339 */
1340
1341 if (!(p & SR_IO)) {
1342 if (!((p & SR_MSG) && c > 1)) {
1343 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1344 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1345 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1346 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1da177e4 1347 } else {
3d07d22b
FT
1348 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1349 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1da177e4 1350 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1351 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1352 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1da177e4
LT
1353 }
1354 } else {
1355 NCR5380_dprint(NDEBUG_PIO, instance);
1356 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1357 }
1358
a2edc4a6
FT
1359 if (NCR5380_poll_politely(instance,
1360 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1361 break;
1362
b746545f 1363 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1da177e4
LT
1364
1365/*
aff0cf9a
FT
1366 * We have several special cases to consider during REQ/ACK handshaking :
1367 * 1. We were in MSGOUT phase, and we are on the last byte of the
594d4ba3 1368 * message. ATN must be dropped as ACK is dropped.
1da177e4 1369 *
aff0cf9a 1370 * 2. We are in a MSGIN phase, and we are on the last byte of the
594d4ba3
FT
1371 * message. We must exit with ACK asserted, so that the calling
1372 * code may raise ATN before dropping ACK to reject the message.
1da177e4
LT
1373 *
1374 * 3. ACK and ATN are clear and the target may proceed as normal.
1375 */
1376 if (!(p == PHASE_MSGIN && c == 1)) {
1377 if (p == PHASE_MSGOUT && c > 1)
1378 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1379 else
1380 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1381 }
1382 } while (--c);
1383
b746545f 1384 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1da177e4
LT
1385
1386 *count = c;
1387 *data = d;
1388 tmp = NCR5380_read(STATUS_REG);
a2edc4a6
FT
1389 /* The phase read from the bus is valid if either REQ is (already)
1390 * asserted or if ACK hasn't been released yet. The latter applies if
1391 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1392 */
1393 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1da177e4
LT
1394 *phase = tmp & PHASE_MASK;
1395 else
1396 *phase = PHASE_UNKNOWN;
1397
1398 if (!c || (*phase == p))
1399 return 0;
1400 else
1401 return -1;
1402}
1403
1404/**
636b1ec8
FT
1405 * do_reset - issue a reset command
1406 * @instance: adapter to reset
1da177e4 1407 *
636b1ec8
FT
1408 * Issue a reset sequence to the NCR5380 and try and get the bus
1409 * back into sane shape.
1da177e4 1410 *
636b1ec8
FT
1411 * This clears the reset interrupt flag because there may be no handler for
1412 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1413 * been installed. And when in EH we may have released the ST DMA interrupt.
1da177e4 1414 */
aff0cf9a 1415
54d8fe44
FT
1416static void do_reset(struct Scsi_Host *instance)
1417{
636b1ec8
FT
1418 unsigned long flags;
1419
1420 local_irq_save(flags);
1421 NCR5380_write(TARGET_COMMAND_REG,
1422 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1da177e4 1423 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
636b1ec8 1424 udelay(50);
1da177e4 1425 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
636b1ec8
FT
1426 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1427 local_irq_restore(flags);
1da177e4
LT
1428}
1429
80d3eb6d
FT
1430/**
1431 * do_abort - abort the currently established nexus by going to
1432 * MESSAGE OUT phase and sending an ABORT message.
1433 * @instance: relevant scsi host instance
1da177e4 1434 *
80d3eb6d 1435 * Returns 0 on success, -1 on failure.
1da177e4
LT
1436 */
1437
54d8fe44
FT
1438static int do_abort(struct Scsi_Host *instance)
1439{
1da177e4
LT
1440 unsigned char *msgptr, phase, tmp;
1441 int len;
1442 int rc;
1da177e4
LT
1443
1444 /* Request message out phase */
1445 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1446
aff0cf9a
FT
1447 /*
1448 * Wait for the target to indicate a valid phase by asserting
1449 * REQ. Once this happens, we'll have either a MSGOUT phase
1450 * and can immediately send the ABORT message, or we'll have some
1da177e4 1451 * other phase and will have to source/sink data.
aff0cf9a 1452 *
1da177e4
LT
1453 * We really don't care what value was on the bus or what value
1454 * the target sees, so we just handshake.
1455 */
1456
80d3eb6d 1457 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1cc160e1 1458 if (rc < 0)
80d3eb6d 1459 goto timeout;
1da177e4 1460
f35d3474 1461 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
aff0cf9a 1462
1da177e4
LT
1463 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1464
f35d3474 1465 if (tmp != PHASE_MSGOUT) {
0d2cf867
FT
1466 NCR5380_write(INITIATOR_COMMAND_REG,
1467 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
54d8fe44 1468 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ);
1cc160e1 1469 if (rc < 0)
80d3eb6d
FT
1470 goto timeout;
1471 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1da177e4 1472 }
0d2cf867 1473
1da177e4
LT
1474 tmp = ABORT;
1475 msgptr = &tmp;
1476 len = 1;
1477 phase = PHASE_MSGOUT;
54d8fe44 1478 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1da177e4
LT
1479
1480 /*
1481 * If we got here, and the command completed successfully,
1482 * we're about to go into bus free state.
1483 */
1484
1485 return len ? -1 : 0;
80d3eb6d
FT
1486
1487timeout:
1488 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1489 return -1;
1da177e4
LT
1490}
1491
1492#if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL)
aff0cf9a
FT
1493/*
1494 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
594d4ba3 1495 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1496 *
1497 * Purpose : transfers data in given phase using either real
594d4ba3 1498 * or pseudo DMA.
1da177e4 1499 *
aff0cf9a 1500 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1501 * what phase is expected, *count - pointer to number of
1502 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1503 *
1da177e4 1504 * Returns : -1 when different phase is entered without transferring
594d4ba3
FT
1505 * maximum number of bytes, 0 if all bytes or transferred or exit
1506 * is in same phase.
1da177e4 1507 *
594d4ba3 1508 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1509 */
1510
1511
0d2cf867
FT
1512static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1513 unsigned char *phase, int *count,
1514 unsigned char **data)
1515{
1516 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1517 register int c = *count;
1518 register unsigned char p = *phase;
1519 register unsigned char *d = *data;
1520 unsigned char tmp;
1521 int foo;
1522#if defined(REAL_DMA_POLL)
1523 int cnt, toPIO;
1524 unsigned char saved_data = 0, overrun = 0, residue;
1525#endif
1526
1da177e4
LT
1527 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1528 *phase = tmp;
1529 return -1;
1530 }
1531#if defined(REAL_DMA) || defined(REAL_DMA_POLL)
1da177e4 1532 if (p & SR_IO) {
9db6024e
FT
1533 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS))
1534 c -= 2;
1da177e4 1535 }
1da177e4 1536 hostdata->dma_len = (p & SR_IO) ? NCR5380_dma_read_setup(instance, d, c) : NCR5380_dma_write_setup(instance, d, c);
b746545f
FT
1537
1538 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1539 (p & SR_IO) ? "receive" : "send", c, *data);
1da177e4
LT
1540#endif
1541
1542 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1543
1544#ifdef REAL_DMA
cd400825
FT
1545 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1546 MR_ENABLE_EOP_INTR);
1da177e4 1547#elif defined(REAL_DMA_POLL)
cd400825 1548 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1549#else
1550 /*
1551 * Note : on my sample board, watch-dog timeouts occurred when interrupts
aff0cf9a 1552 * were not disabled for the duration of a single DMA transfer, from
1da177e4
LT
1553 * before the setting of DMA mode to after transfer of the last byte.
1554 */
1555
55181be8 1556 if (hostdata->flags & FLAG_NO_DMA_FIXUP)
cd400825
FT
1557 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1558 MR_ENABLE_EOP_INTR);
1da177e4 1559 else
cd400825 1560 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1561#endif /* def REAL_DMA */
1562
52a6a1cb 1563 dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG));
1da177e4 1564
aff0cf9a 1565 /*
594d4ba3
FT
1566 * On the PAS16 at least I/O recovery delays are not needed here.
1567 * Everyone else seems to want them.
1da177e4
LT
1568 */
1569
1570 if (p & SR_IO) {
1571 io_recovery_delay(1);
1572 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1573 } else {
1574 io_recovery_delay(1);
1575 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1576 io_recovery_delay(1);
1577 NCR5380_write(START_DMA_SEND_REG, 0);
1578 io_recovery_delay(1);
1579 }
1580
1581#if defined(REAL_DMA_POLL)
1582 do {
1583 tmp = NCR5380_read(BUS_AND_STATUS_REG);
1584 } while ((tmp & BASR_PHASE_MATCH) && !(tmp & (BASR_BUSY_ERROR | BASR_END_DMA_TRANSFER)));
1585
1586/*
c16df32e
FT
1587 * At this point, either we've completed DMA, or we have a phase mismatch,
1588 * or we've unexpectedly lost BUSY (which is a real error).
1589 *
1590 * For DMA sends, we want to wait until the last byte has been
1591 * transferred out over the bus before we turn off DMA mode. Alas, there
1592 * seems to be no terribly good way of doing this on a 5380 under all
1593 * conditions. For non-scatter-gather operations, we can wait until REQ
1594 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1595 * are nastier, since the device will be expecting more data than we
1596 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1597 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1598 * why this signal was added to the newer chips) but on the older 538[01]
1599 * this signal does not exist. The workaround for this lack is a watchdog;
1600 * we bail out of the wait-loop after a modest amount of wait-time if
1601 * the usual exit conditions are not met. Not a terribly clean or
1602 * correct solution :-%
1603 *
1604 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1605 * If the chip is in DMA receive mode, it will respond to a target's
1606 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1607 * ACK, even if it has _already_ been notified by the DMA controller that
1608 * the current DMA transfer has completed! If the NCR5380 is then taken
1609 * out of DMA mode, this already-acknowledged byte is lost. This is
1610 * not a problem for "one DMA transfer per READ command", because
1611 * the situation will never arise... either all of the data is DMA'ed
1612 * properly, or the target switches to MESSAGE IN phase to signal a
1613 * disconnection (either operation bringing the DMA to a clean halt).
1614 * However, in order to handle scatter-receive, we must work around the
1615 * problem. The chosen fix is to DMA N-2 bytes, then check for the
1616 * condition before taking the NCR5380 out of DMA mode. One or two extra
1617 * bytes are transferred via PIO as necessary to fill out the original
1618 * request.
1da177e4
LT
1619 */
1620
1621 if (p & SR_IO) {
9db6024e
FT
1622 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) {
1623 udelay(10);
1624 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
1625 (BASR_PHASE_MATCH | BASR_ACK)) {
1626 saved_data = NCR5380_read(INPUT_DATA_REGISTER);
1627 overrun = 1;
1628 }
1da177e4 1629 }
1da177e4
LT
1630 } else {
1631 int limit = 100;
1632 while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) {
1633 if (!(tmp & BASR_PHASE_MATCH))
1634 break;
1635 if (--limit < 0)
1636 break;
1637 }
1638 }
1639
b746545f
FT
1640 dsprintk(NDEBUG_DMA, "polled DMA transfer complete, basr 0x%02x, sr 0x%02x\n",
1641 tmp, NCR5380_read(STATUS_REG));
1da177e4
LT
1642
1643 NCR5380_write(MODE_REG, MR_BASE);
1644 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1645
1646 residue = NCR5380_dma_residual(instance);
1647 c -= residue;
1648 *count -= c;
1649 *data += c;
1650 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1651
9db6024e
FT
1652 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS) &&
1653 *phase == p && (p & SR_IO) && residue == 0) {
1da177e4 1654 if (overrun) {
52a6a1cb 1655 dprintk(NDEBUG_DMA, "Got an input overrun, using saved byte\n");
1da177e4
LT
1656 **data = saved_data;
1657 *data += 1;
1658 *count -= 1;
1659 cnt = toPIO = 1;
1660 } else {
1661 printk("No overrun??\n");
1662 cnt = toPIO = 2;
1663 }
52a6a1cb 1664 dprintk(NDEBUG_DMA, "Doing %d-byte PIO to 0x%X\n", cnt, *data);
1da177e4
LT
1665 NCR5380_transfer_pio(instance, phase, &cnt, data);
1666 *count -= toPIO - cnt;
1667 }
1da177e4 1668
52a6a1cb 1669 dprintk(NDEBUG_DMA, "Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n", *data, *count, *(*data + *count - 1), *(*data + *count));
1da177e4
LT
1670 return 0;
1671
1672#elif defined(REAL_DMA)
1673 return 0;
1674#else /* defined(REAL_DMA_POLL) */
1675 if (p & SR_IO) {
55181be8
FT
1676 foo = NCR5380_pread(instance, d,
1677 hostdata->flags & FLAG_NO_DMA_FIXUP ? c : c - 1);
1678 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4 1679 /*
aff0cf9a 1680 * We can't disable DMA mode after successfully transferring
1da177e4 1681 * what we plan to be the last byte, since that would open up
aff0cf9a 1682 * a race condition where if the target asserted REQ before
1da177e4
LT
1683 * we got the DMA mode reset, the NCR5380 would have latched
1684 * an additional byte into the INPUT DATA register and we'd
1685 * have dropped it.
aff0cf9a
FT
1686 *
1687 * The workaround was to transfer one fewer bytes than we
1688 * intended to with the pseudo-DMA read function, wait for
1da177e4
LT
1689 * the chip to latch the last byte, read it, and then disable
1690 * pseudo-DMA mode.
aff0cf9a 1691 *
1da177e4
LT
1692 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1693 * REQ is deasserted when ACK is asserted, and not reasserted
1694 * until ACK goes false. Since the NCR5380 won't lower ACK
1695 * until DACK is asserted, which won't happen unless we twiddle
aff0cf9a
FT
1696 * the DMA port or we take the NCR5380 out of DMA mode, we
1697 * can guarantee that we won't handshake another extra
1da177e4
LT
1698 * byte.
1699 */
1700
55181be8
FT
1701 if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG,
1702 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1703 foo = -1;
1704 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1705 }
1706 if (NCR5380_poll_politely(instance, STATUS_REG,
1707 SR_REQ, 0, HZ) < 0) {
1708 foo = -1;
1709 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1da177e4 1710 }
55181be8 1711 d[c - 1] = NCR5380_read(INPUT_DATA_REG);
1da177e4 1712 }
1da177e4 1713 } else {
1da177e4 1714 foo = NCR5380_pwrite(instance, d, c);
55181be8 1715 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4 1716 /*
aff0cf9a
FT
1717 * Wait for the last byte to be sent. If REQ is being asserted for
1718 * the byte we're interested, we'll ACK it and it will go false.
1da177e4 1719 */
55181be8
FT
1720 if (NCR5380_poll_politely2(instance,
1721 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1722 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1723 foo = -1;
1724 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1da177e4
LT
1725 }
1726 }
1da177e4
LT
1727 }
1728 NCR5380_write(MODE_REG, MR_BASE);
1729 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
cd400825 1730 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1da177e4
LT
1731 *data = d + c;
1732 *count = 0;
1733 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1da177e4
LT
1734 return foo;
1735#endif /* def REAL_DMA */
1736}
1737#endif /* defined(REAL_DMA) | defined(PSEUDO_DMA) */
1738
1739/*
1740 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1741 *
aff0cf9a 1742 * Purpose : run through the various SCSI phases and do as the target
594d4ba3
FT
1743 * directs us to. Operates on the currently connected command,
1744 * instance->connected.
1da177e4
LT
1745 *
1746 * Inputs : instance, instance for which we are doing commands
1747 *
aff0cf9a 1748 * Side effects : SCSI things happen, the disconnected queue will be
594d4ba3
FT
1749 * modified if a command disconnects, *instance->connected will
1750 * change.
1da177e4 1751 *
aff0cf9a 1752 * XXX Note : we need to watch for bus free or a reset condition here
594d4ba3 1753 * to recover from an unexpected bus free condition.
1da177e4
LT
1754 */
1755
0d2cf867
FT
1756static void NCR5380_information_transfer(struct Scsi_Host *instance)
1757{
e8a60144 1758 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1759 unsigned char msgout = NOP;
1760 int sink = 0;
1761 int len;
1da177e4 1762 int transfersize;
1da177e4
LT
1763 unsigned char *data;
1764 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
11d2f63b 1765 struct scsi_cmnd *cmd;
1da177e4 1766
11d2f63b 1767 while ((cmd = hostdata->connected)) {
32b26a10
FT
1768 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1769
1da177e4
LT
1770 tmp = NCR5380_read(STATUS_REG);
1771 /* We only have a valid SCSI phase when REQ is asserted */
1772 if (tmp & SR_REQ) {
1773 phase = (tmp & PHASE_MASK);
1774 if (phase != old_phase) {
1775 old_phase = phase;
1776 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1777 }
1778 if (sink && (phase != PHASE_MSGOUT)) {
1779 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1780
3d07d22b
FT
1781 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1782 ICR_ASSERT_ACK);
0d2cf867
FT
1783 while (NCR5380_read(STATUS_REG) & SR_REQ)
1784 ;
3d07d22b
FT
1785 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1786 ICR_ASSERT_ATN);
1da177e4
LT
1787 sink = 0;
1788 continue;
1789 }
0d2cf867 1790
1da177e4 1791 switch (phase) {
1da177e4
LT
1792 case PHASE_DATAOUT:
1793#if (NDEBUG & NDEBUG_NO_DATAOUT)
6a6ff4ac 1794 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1da177e4
LT
1795 sink = 1;
1796 do_abort(instance);
1797 cmd->result = DID_ERROR << 16;
677e0194 1798 complete_cmd(instance, cmd);
1da177e4
LT
1799 return;
1800#endif
bf1a0c6f 1801 case PHASE_DATAIN:
aff0cf9a 1802 /*
1da177e4
LT
1803 * If there is no room left in the current buffer in the
1804 * scatter-gather list, move onto the next one.
1805 */
1806
1807 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1808 ++cmd->SCp.buffer;
1809 --cmd->SCp.buffers_residual;
1810 cmd->SCp.this_residual = cmd->SCp.buffer->length;
45711f1a 1811 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
b746545f
FT
1812 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1813 cmd->SCp.this_residual,
1814 cmd->SCp.buffers_residual);
1da177e4 1815 }
0d2cf867 1816
1da177e4 1817 /*
aff0cf9a 1818 * The preferred transfer method is going to be
1da177e4
LT
1819 * PSEUDO-DMA for systems that are strictly PIO,
1820 * since we can let the hardware do the handshaking.
1821 *
1822 * For this to work, we need to know the transfersize
1823 * ahead of time, since the pseudo-DMA code will sit
1824 * in an unconditional loop.
1825 */
1826
1827#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
ff3d4578
FT
1828 transfersize = 0;
1829 if (!cmd->device->borken &&
1830 !(hostdata->flags & FLAG_NO_PSEUDO_DMA))
1831 transfersize = NCR5380_dma_xfer_len(instance, cmd, phase);
1832
1833 if (transfersize) {
1da177e4 1834 len = transfersize;
0d2cf867
FT
1835 if (NCR5380_transfer_dma(instance, &phase,
1836 &len, (unsigned char **)&cmd->SCp.ptr)) {
1da177e4 1837 /*
0d2cf867
FT
1838 * If the watchdog timer fires, all future
1839 * accesses to this device will use the
1840 * polled-IO.
1da177e4 1841 */
017560fc 1842 scmd_printk(KERN_INFO, cmd,
0d2cf867 1843 "switching to slow handshake\n");
1da177e4 1844 cmd->device->borken = 1;
1da177e4
LT
1845 sink = 1;
1846 do_abort(instance);
1847 cmd->result = DID_ERROR << 16;
677e0194 1848 complete_cmd(instance, cmd);
1da177e4
LT
1849 /* XXX - need to source or sink data here, as appropriate */
1850 } else
1851 cmd->SCp.this_residual -= transfersize - len;
1852 } else
1853#endif /* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */
11d2f63b 1854 {
1678847e
FT
1855 /* Break up transfer into 3 ms chunks,
1856 * presuming 6 accesses per handshake.
1857 */
1858 transfersize = min((unsigned long)cmd->SCp.this_residual,
1859 hostdata->accesses_per_ms / 2);
1860 len = transfersize;
1861 NCR5380_transfer_pio(instance, &phase, &len,
3d07d22b 1862 (unsigned char **)&cmd->SCp.ptr);
1678847e 1863 cmd->SCp.this_residual -= transfersize - len;
11d2f63b 1864 }
1678847e 1865 return;
1da177e4
LT
1866 case PHASE_MSGIN:
1867 len = 1;
1868 data = &tmp;
1869 NCR5380_transfer_pio(instance, &phase, &len, &data);
1870 cmd->SCp.Message = tmp;
1871
1872 switch (tmp) {
1da177e4
LT
1873 case ABORT:
1874 case COMMAND_COMPLETE:
1875 /* Accept message by clearing ACK */
1876 sink = 1;
1877 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0d3d9a42
FT
1878 dsprintk(NDEBUG_QUEUES, instance,
1879 "COMMAND COMPLETE %p target %d lun %llu\n",
1880 cmd, scmd_id(cmd), cmd->device->lun);
1881
1da177e4 1882 hostdata->connected = NULL;
1da177e4 1883
f27db8eb
FT
1884 cmd->result &= ~0xffff;
1885 cmd->result |= cmd->SCp.Status;
1886 cmd->result |= cmd->SCp.Message << 8;
28424d3a 1887
f27db8eb 1888 if (cmd->cmnd[0] == REQUEST_SENSE)
677e0194 1889 complete_cmd(instance, cmd);
f27db8eb
FT
1890 else {
1891 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1892 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1893 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1894 cmd);
1895 list_add_tail(&ncmd->list,
1896 &hostdata->autosense);
1897 } else
1898 complete_cmd(instance, cmd);
1da177e4
LT
1899 }
1900
aff0cf9a
FT
1901 /*
1902 * Restore phase bits to 0 so an interrupted selection,
1da177e4
LT
1903 * arbitration can resume.
1904 */
1905 NCR5380_write(TARGET_COMMAND_REG, 0);
72064a78
FT
1906
1907 /* Enable reselect interrupts */
1908 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1da177e4
LT
1909 return;
1910 case MESSAGE_REJECT:
1911 /* Accept message by clearing ACK */
1912 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1913 switch (hostdata->last_message) {
1914 case HEAD_OF_QUEUE_TAG:
1915 case ORDERED_QUEUE_TAG:
1916 case SIMPLE_QUEUE_TAG:
1917 cmd->device->simple_tags = 0;
9cb78c16 1918 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4
LT
1919 break;
1920 default:
1921 break;
1922 }
340b9612 1923 break;
0d2cf867
FT
1924 case DISCONNECT:
1925 /* Accept message by clearing ACK */
1926 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1927 hostdata->connected = NULL;
1928 list_add(&ncmd->list, &hostdata->disconnected);
1929 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1930 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1931 cmd, scmd_id(cmd), cmd->device->lun);
0d3d9a42 1932
0d2cf867
FT
1933 /*
1934 * Restore phase bits to 0 so an interrupted selection,
1935 * arbitration can resume.
1936 */
1937 NCR5380_write(TARGET_COMMAND_REG, 0);
1da177e4 1938
0d2cf867
FT
1939 /* Enable reselect interrupts */
1940 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1941 return;
aff0cf9a 1942 /*
1da177e4 1943 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
aff0cf9a 1944 * operation, in violation of the SCSI spec so we can safely
1da177e4
LT
1945 * ignore SAVE/RESTORE pointers calls.
1946 *
aff0cf9a 1947 * Unfortunately, some disks violate the SCSI spec and
1da177e4 1948 * don't issue the required SAVE_POINTERS message before
aff0cf9a 1949 * disconnecting, and we have to break spec to remain
1da177e4
LT
1950 * compatible.
1951 */
1952 case SAVE_POINTERS:
1953 case RESTORE_POINTERS:
1954 /* Accept message by clearing ACK */
1955 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1956 break;
1957 case EXTENDED_MESSAGE:
c16df32e
FT
1958 /*
1959 * Start the message buffer with the EXTENDED_MESSAGE
1960 * byte, since spi_print_msg() wants the whole thing.
1961 */
1da177e4
LT
1962 extended_msg[0] = EXTENDED_MESSAGE;
1963 /* Accept first byte by clearing ACK */
1964 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
11d2f63b
FT
1965
1966 spin_unlock_irq(&hostdata->lock);
1967
b746545f 1968 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1da177e4
LT
1969
1970 len = 2;
1971 data = extended_msg + 1;
1972 phase = PHASE_MSGIN;
1973 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1974 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1975 (int)extended_msg[1],
1976 (int)extended_msg[2]);
1da177e4 1977
e0783ed3
FT
1978 if (!len && extended_msg[1] > 0 &&
1979 extended_msg[1] <= sizeof(extended_msg) - 2) {
1da177e4
LT
1980 /* Accept third byte by clearing ACK */
1981 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1982 len = extended_msg[1] - 1;
1983 data = extended_msg + 3;
1984 phase = PHASE_MSGIN;
1985
1986 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1987 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1988 len);
1da177e4
LT
1989
1990 switch (extended_msg[2]) {
1991 case EXTENDED_SDTR:
1992 case EXTENDED_WDTR:
1993 case EXTENDED_MODIFY_DATA_POINTER:
1994 case EXTENDED_EXTENDED_IDENTIFY:
1995 tmp = 0;
1996 }
1997 } else if (len) {
6a6ff4ac 1998 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1da177e4
LT
1999 tmp = 0;
2000 } else {
6a6ff4ac
FT
2001 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
2002 extended_msg[2], extended_msg[1]);
1da177e4
LT
2003 tmp = 0;
2004 }
11d2f63b
FT
2005
2006 spin_lock_irq(&hostdata->lock);
2007 if (!hostdata->connected)
2008 return;
2009
1da177e4
LT
2010 /* Fall through to reject message */
2011
aff0cf9a
FT
2012 /*
2013 * If we get something weird that we aren't expecting,
1da177e4
LT
2014 * reject it.
2015 */
2016 default:
2017 if (!tmp) {
6a6ff4ac 2018 shost_printk(KERN_ERR, instance, "rejecting message ");
1abfd370 2019 spi_print_msg(extended_msg);
1da177e4
LT
2020 printk("\n");
2021 } else if (tmp != EXTENDED_MESSAGE)
017560fc 2022 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
2023 "rejecting unknown message %02x\n",
2024 tmp);
1da177e4 2025 else
017560fc 2026 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
2027 "rejecting unknown extended message code %02x, length %d\n",
2028 extended_msg[1], extended_msg[0]);
1da177e4
LT
2029
2030 msgout = MESSAGE_REJECT;
2031 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
2032 break;
0d2cf867 2033 } /* switch (tmp) */
1da177e4
LT
2034 break;
2035 case PHASE_MSGOUT:
2036 len = 1;
2037 data = &msgout;
2038 hostdata->last_message = msgout;
2039 NCR5380_transfer_pio(instance, &phase, &len, &data);
2040 if (msgout == ABORT) {
1da177e4
LT
2041 hostdata->connected = NULL;
2042 cmd->result = DID_ERROR << 16;
677e0194 2043 complete_cmd(instance, cmd);
1da177e4
LT
2044 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
2045 return;
2046 }
2047 msgout = NOP;
2048 break;
2049 case PHASE_CMDOUT:
2050 len = cmd->cmd_len;
2051 data = cmd->cmnd;
aff0cf9a
FT
2052 /*
2053 * XXX for performance reasons, on machines with a
2054 * PSEUDO-DMA architecture we should probably
2055 * use the dma transfer function.
1da177e4
LT
2056 */
2057 NCR5380_transfer_pio(instance, &phase, &len, &data);
1da177e4
LT
2058 break;
2059 case PHASE_STATIN:
2060 len = 1;
2061 data = &tmp;
2062 NCR5380_transfer_pio(instance, &phase, &len, &data);
2063 cmd->SCp.Status = tmp;
2064 break;
2065 default:
6a6ff4ac 2066 shost_printk(KERN_ERR, instance, "unknown phase\n");
4dde8f7d 2067 NCR5380_dprint(NDEBUG_ANY, instance);
0d2cf867 2068 } /* switch(phase) */
686f3990 2069 } else {
11d2f63b 2070 spin_unlock_irq(&hostdata->lock);
686f3990 2071 NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 2072 spin_lock_irq(&hostdata->lock);
1da177e4 2073 }
11d2f63b 2074 }
1da177e4
LT
2075}
2076
2077/*
2078 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2079 *
aff0cf9a 2080 * Purpose : does reselection, initializing the instance->connected
594d4ba3
FT
2081 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2082 * nexus has been reestablished,
aff0cf9a 2083 *
1da177e4 2084 * Inputs : instance - this instance of the NCR5380.
1da177e4
LT
2085 */
2086
0d2cf867
FT
2087static void NCR5380_reselect(struct Scsi_Host *instance)
2088{
e8a60144 2089 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
2090 unsigned char target_mask;
2091 unsigned char lun, phase;
2092 int len;
2093 unsigned char msg[3];
2094 unsigned char *data;
32b26a10
FT
2095 struct NCR5380_cmd *ncmd;
2096 struct scsi_cmnd *tmp;
1da177e4
LT
2097
2098 /*
2099 * Disable arbitration, etc. since the host adapter obviously
2100 * lost, and tell an interrupted NCR5380_select() to restart.
2101 */
2102
2103 NCR5380_write(MODE_REG, MR_BASE);
1da177e4
LT
2104
2105 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
b746545f
FT
2106
2107 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
1da177e4 2108
aff0cf9a 2109 /*
1da177e4
LT
2110 * At this point, we have detected that our SCSI ID is on the bus,
2111 * SEL is true and BSY was false for at least one bus settle delay
2112 * (400 ns).
2113 *
2114 * We must assert BSY ourselves, until the target drops the SEL
2115 * signal.
2116 */
2117
2118 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
72064a78
FT
2119 if (NCR5380_poll_politely(instance,
2120 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2121 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2122 return;
2123 }
1da177e4
LT
2124 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2125
2126 /*
2127 * Wait for target to go into MSGIN.
1da177e4
LT
2128 */
2129
1cc160e1 2130 if (NCR5380_poll_politely(instance,
72064a78
FT
2131 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2132 do_abort(instance);
2133 return;
2134 }
1da177e4
LT
2135
2136 len = 1;
2137 data = msg;
2138 phase = PHASE_MSGIN;
2139 NCR5380_transfer_pio(instance, &phase, &len, &data);
2140
72064a78
FT
2141 if (len) {
2142 do_abort(instance);
2143 return;
2144 }
2145
1da177e4 2146 if (!(msg[0] & 0x80)) {
72064a78 2147 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
1abfd370 2148 spi_print_msg(msg);
72064a78
FT
2149 printk("\n");
2150 do_abort(instance);
2151 return;
2152 }
2153 lun = msg[0] & 0x07;
1da177e4 2154
72064a78
FT
2155 /*
2156 * We need to add code for SCSI-II to track which devices have
2157 * I_T_L_Q nexuses established, and which have simple I_T_L
2158 * nexuses so we can chose to do additional data transfer.
2159 */
1da177e4 2160
72064a78
FT
2161 /*
2162 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2163 * just reestablished, and remove it from the disconnected queue.
2164 */
1da177e4 2165
32b26a10
FT
2166 tmp = NULL;
2167 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2168 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2169
2170 if (target_mask == (1 << scmd_id(cmd)) &&
2171 lun == (u8)cmd->device->lun) {
2172 list_del(&ncmd->list);
2173 tmp = cmd;
72064a78 2174 break;
1da177e4
LT
2175 }
2176 }
0d3d9a42
FT
2177
2178 if (tmp) {
2179 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2180 "reselect: removed %p from disconnected queue\n", tmp);
2181 } else {
72064a78
FT
2182 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2183 target_mask, lun);
2184 /*
0d2cf867
FT
2185 * Since we have an established nexus that we can't do anything
2186 * with, we must abort it.
72064a78 2187 */
1da177e4 2188 do_abort(instance);
72064a78 2189 return;
1da177e4 2190 }
72064a78
FT
2191
2192 /* Accept message by clearing ACK */
2193 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2194
2195 hostdata->connected = tmp;
b746545f
FT
2196 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu, tag %d\n",
2197 scmd_id(tmp), tmp->device->lun, tmp->tag);
1da177e4
LT
2198}
2199
2200/*
2201 * Function : void NCR5380_dma_complete (struct Scsi_Host *instance)
2202 *
2203 * Purpose : called by interrupt handler when DMA finishes or a phase
594d4ba3 2204 * mismatch occurs (which would finish the DMA transfer).
1da177e4
LT
2205 *
2206 * Inputs : instance - this instance of the NCR5380.
2207 *
710ddd0d 2208 * Returns : pointer to the scsi_cmnd structure for which the I_T_L
594d4ba3 2209 * nexus has been reestablished, on failure NULL is returned.
1da177e4
LT
2210 */
2211
2212#ifdef REAL_DMA
2213static void NCR5380_dma_complete(NCR5380_instance * instance) {
e8a60144 2214 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 2215 int transferred;
1da177e4
LT
2216
2217 /*
2218 * XXX this might not be right.
2219 *
2220 * Wait for final byte to transfer, ie wait for ACK to go false.
2221 *
aff0cf9a 2222 * We should use the Last Byte Sent bit, unfortunately this is
1da177e4
LT
2223 * not available on the 5380/5381 (only the various CMOS chips)
2224 *
2225 * FIXME: timeout, and need to handle long timeout/irq case
2226 */
2227
2228 NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ);
2229
1da177e4
LT
2230 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2231
2232 /*
2233 * The only places we should see a phase mismatch and have to send
2234 * data from the same set of pointers will be the data transfer
2235 * phases. So, residual, requested length are only important here.
2236 */
2237
2238 if (!(hostdata->connected->SCp.phase & SR_CD)) {
2239 transferred = instance->dmalen - NCR5380_dma_residual();
2240 hostdata->connected->SCp.this_residual -= transferred;
2241 hostdata->connected->SCp.ptr += transferred;
2242 }
2243}
2244#endif /* def REAL_DMA */
2245
8b00c3d5
FT
2246/**
2247 * list_find_cmd - test for presence of a command in a linked list
2248 * @haystack: list of commands
2249 * @needle: command to search for
2250 */
2251
2252static bool list_find_cmd(struct list_head *haystack,
2253 struct scsi_cmnd *needle)
2254{
2255 struct NCR5380_cmd *ncmd;
2256
2257 list_for_each_entry(ncmd, haystack, list)
2258 if (NCR5380_to_scmd(ncmd) == needle)
2259 return true;
2260 return false;
2261}
2262
2263/**
2264 * list_remove_cmd - remove a command from linked list
2265 * @haystack: list of commands
2266 * @needle: command to remove
2267 */
2268
2269static bool list_del_cmd(struct list_head *haystack,
2270 struct scsi_cmnd *needle)
2271{
2272 if (list_find_cmd(haystack, needle)) {
2273 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2274
2275 list_del(&ncmd->list);
2276 return true;
2277 }
2278 return false;
2279}
2280
2281/**
2282 * NCR5380_abort - scsi host eh_abort_handler() method
2283 * @cmd: the command to be aborted
2284 *
2285 * Try to abort a given command by removing it from queues and/or sending
2286 * the target an abort message. This may not succeed in causing a target
2287 * to abort the command. Nonetheless, the low-level driver must forget about
2288 * the command because the mid-layer reclaims it and it may be re-issued.
2289 *
2290 * The normal path taken by a command is as follows. For EH we trace this
2291 * same path to locate and abort the command.
2292 *
2293 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2294 * [disconnected -> connected ->]...
2295 * [autosense -> connected ->] done
2296 *
2297 * If cmd is unissued then just remove it.
2298 * If cmd is disconnected, try to select the target.
2299 * If cmd is connected, try to send an abort message.
2300 * If cmd is waiting for autosense, give it a chance to complete but check
2301 * that it isn't left connected.
2302 * If cmd was not found at all then presumably it has already been completed,
2303 * in which case return SUCCESS to try to avoid further EH measures.
2304 * If the command has not completed yet, we must not fail to find it.
71a00593
FT
2305 *
2306 * The lock protects driver data structures, but EH handlers also use it
2307 * to serialize their own execution and prevent their own re-entry.
1da177e4
LT
2308 */
2309
710ddd0d
FT
2310static int NCR5380_abort(struct scsi_cmnd *cmd)
2311{
1da177e4 2312 struct Scsi_Host *instance = cmd->device->host;
e8a60144 2313 struct NCR5380_hostdata *hostdata = shost_priv(instance);
11d2f63b 2314 unsigned long flags;
8b00c3d5 2315 int result = SUCCESS;
1fa6b5fb 2316
11d2f63b
FT
2317 spin_lock_irqsave(&hostdata->lock, flags);
2318
32b26a10 2319#if (NDEBUG & NDEBUG_ANY)
8b00c3d5 2320 scmd_printk(KERN_INFO, cmd, __func__);
32b26a10 2321#endif
e5c3fddf
FT
2322 NCR5380_dprint(NDEBUG_ANY, instance);
2323 NCR5380_dprint_phase(NDEBUG_ANY, instance);
1da177e4 2324
8b00c3d5
FT
2325 if (list_del_cmd(&hostdata->unissued, cmd)) {
2326 dsprintk(NDEBUG_ABORT, instance,
2327 "abort: removed %p from issue queue\n", cmd);
2328 cmd->result = DID_ABORT << 16;
2329 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2330 }
2331
707d62b3
FT
2332 if (hostdata->selecting == cmd) {
2333 dsprintk(NDEBUG_ABORT, instance,
2334 "abort: cmd %p == selecting\n", cmd);
2335 hostdata->selecting = NULL;
2336 cmd->result = DID_ABORT << 16;
2337 complete_cmd(instance, cmd);
2338 goto out;
2339 }
2340
8b00c3d5
FT
2341 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2342 dsprintk(NDEBUG_ABORT, instance,
2343 "abort: removed %p from disconnected list\n", cmd);
71a00593
FT
2344 /* Can't call NCR5380_select() and send ABORT because that
2345 * means releasing the lock. Need a bus reset.
2346 */
2347 result = FAILED;
2348 goto out;
8b00c3d5
FT
2349 }
2350
2351 if (hostdata->connected == cmd) {
2352 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2353 hostdata->connected = NULL;
2354 if (do_abort(instance)) {
2355 set_host_byte(cmd, DID_ERROR);
2356 complete_cmd(instance, cmd);
2357 result = FAILED;
2358 goto out;
2359 }
2360 set_host_byte(cmd, DID_ABORT);
2361#ifdef REAL_DMA
2362 hostdata->dma_len = 0;
2363#endif
2364 if (cmd->cmnd[0] == REQUEST_SENSE)
2365 complete_cmd(instance, cmd);
2366 else {
2367 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
2368
2369 /* Perform autosense for this command */
2370 list_add(&ncmd->list, &hostdata->autosense);
2371 }
2372 }
2373
2374 if (list_find_cmd(&hostdata->autosense, cmd)) {
2375 dsprintk(NDEBUG_ABORT, instance,
2376 "abort: found %p on sense queue\n", cmd);
2377 spin_unlock_irqrestore(&hostdata->lock, flags);
2378 queue_work(hostdata->work_q, &hostdata->main_task);
2379 msleep(1000);
2380 spin_lock_irqsave(&hostdata->lock, flags);
2381 if (list_del_cmd(&hostdata->autosense, cmd)) {
2382 dsprintk(NDEBUG_ABORT, instance,
2383 "abort: removed %p from sense queue\n", cmd);
2384 set_host_byte(cmd, DID_ABORT);
2385 complete_cmd(instance, cmd);
2386 goto out;
2387 }
2388 }
2389
2390 if (hostdata->connected == cmd) {
2391 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2392 hostdata->connected = NULL;
2393 if (do_abort(instance)) {
2394 set_host_byte(cmd, DID_ERROR);
2395 complete_cmd(instance, cmd);
2396 result = FAILED;
2397 goto out;
2398 }
2399 set_host_byte(cmd, DID_ABORT);
2400#ifdef REAL_DMA
2401 hostdata->dma_len = 0;
2402#endif
2403 complete_cmd(instance, cmd);
2404 }
2405
2406out:
2407 if (result == FAILED)
2408 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2409 else
2410 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2411
2412 queue_work(hostdata->work_q, &hostdata->main_task);
11d2f63b 2413 spin_unlock_irqrestore(&hostdata->lock, flags);
32b26a10 2414
8b00c3d5 2415 return result;
1da177e4
LT
2416}
2417
2418
3be1b3ea
FT
2419/**
2420 * NCR5380_bus_reset - reset the SCSI bus
2421 * @cmd: SCSI command undergoing EH
1da177e4 2422 *
3be1b3ea 2423 * Returns SUCCESS
1da177e4
LT
2424 */
2425
710ddd0d 2426static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
68b3aa7c
JG
2427{
2428 struct Scsi_Host *instance = cmd->device->host;
11d2f63b 2429 struct NCR5380_hostdata *hostdata = shost_priv(instance);
62717f53 2430 int i;
11d2f63b 2431 unsigned long flags;
62717f53 2432 struct NCR5380_cmd *ncmd;
68b3aa7c 2433
11d2f63b 2434 spin_lock_irqsave(&hostdata->lock, flags);
3be1b3ea
FT
2435
2436#if (NDEBUG & NDEBUG_ANY)
62717f53 2437 scmd_printk(KERN_INFO, cmd, __func__);
3be1b3ea 2438#endif
e5c3fddf
FT
2439 NCR5380_dprint(NDEBUG_ANY, instance);
2440 NCR5380_dprint_phase(NDEBUG_ANY, instance);
68b3aa7c 2441
68b3aa7c 2442 do_reset(instance);
3be1b3ea 2443
62717f53
FT
2444 /* reset NCR registers */
2445 NCR5380_write(MODE_REG, MR_BASE);
2446 NCR5380_write(TARGET_COMMAND_REG, 0);
2447 NCR5380_write(SELECT_ENABLE_REG, 0);
2448
2449 /* After the reset, there are no more connected or disconnected commands
2450 * and no busy units; so clear the low-level status here to avoid
2451 * conflicts when the mid-level code tries to wake up the affected
2452 * commands!
2453 */
2454
1884c283
FT
2455 if (list_del_cmd(&hostdata->unissued, cmd)) {
2456 cmd->result = DID_RESET << 16;
2457 cmd->scsi_done(cmd);
2458 }
2459
2460 if (hostdata->selecting) {
2461 hostdata->selecting->result = DID_RESET << 16;
2462 complete_cmd(instance, hostdata->selecting);
2463 hostdata->selecting = NULL;
2464 }
62717f53
FT
2465
2466 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2467 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2468
2469 set_host_byte(cmd, DID_RESET);
2470 cmd->scsi_done(cmd);
2471 }
1884c283 2472 INIT_LIST_HEAD(&hostdata->disconnected);
62717f53
FT
2473
2474 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2475 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2476
2477 set_host_byte(cmd, DID_RESET);
2478 cmd->scsi_done(cmd);
2479 }
1884c283 2480 INIT_LIST_HEAD(&hostdata->autosense);
62717f53
FT
2481
2482 if (hostdata->connected) {
2483 set_host_byte(hostdata->connected, DID_RESET);
2484 complete_cmd(instance, hostdata->connected);
2485 hostdata->connected = NULL;
2486 }
2487
62717f53
FT
2488 for (i = 0; i < 8; ++i)
2489 hostdata->busy[i] = 0;
2490#ifdef REAL_DMA
2491 hostdata->dma_len = 0;
2492#endif
2493
2494 queue_work(hostdata->work_q, &hostdata->main_task);
11d2f63b 2495 spin_unlock_irqrestore(&hostdata->lock, flags);
1da177e4 2496
1da177e4
LT
2497 return SUCCESS;
2498}