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Commit | Line | Data |
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aff0cf9a | 1 | /* |
1da177e4 | 2 | * NCR 5380 generic driver routines. These should make it *trivial* |
594d4ba3 FT |
3 | * to implement 5380 SCSI drivers under Linux with a non-trantor |
4 | * architecture. | |
1da177e4 | 5 | * |
594d4ba3 | 6 | * Note that these routines also work with NR53c400 family chips. |
1da177e4 LT |
7 | * |
8 | * Copyright 1993, Drew Eckhardt | |
594d4ba3 FT |
9 | * Visionary Computing |
10 | * (Unix and Linux consulting and custom programming) | |
11 | * drew@colorado.edu | |
12 | * +1 (303) 666-5836 | |
1da177e4 | 13 | * |
aff0cf9a | 14 | * For more information, please consult |
1da177e4 LT |
15 | * |
16 | * NCR 5380 Family | |
17 | * SCSI Protocol Controller | |
18 | * Databook | |
19 | * | |
20 | * NCR Microelectronics | |
21 | * 1635 Aeroplaza Drive | |
22 | * Colorado Springs, CO 80916 | |
23 | * 1+ (719) 578-3400 | |
24 | * 1+ (800) 334-5454 | |
25 | */ | |
26 | ||
27 | /* | |
c16df32e FT |
28 | * With contributions from Ray Van Tassle, Ingmar Baumgart, |
29 | * Ronald van Cuijlenborg, Alan Cox and others. | |
1da177e4 LT |
30 | */ |
31 | ||
52d3e561 FT |
32 | /* Ported to Atari by Roman Hodek and others. */ |
33 | ||
e9db3198 FT |
34 | /* Adapted for the Sun 3 by Sam Creasey. */ |
35 | ||
1da177e4 LT |
36 | /* |
37 | * Design | |
38 | * | |
aff0cf9a | 39 | * This is a generic 5380 driver. To use it on a different platform, |
1da177e4 | 40 | * one simply writes appropriate system specific macros (ie, data |
aff0cf9a | 41 | * transfer - some PC's will use the I/O bus, 68K's must use |
1da177e4 LT |
42 | * memory mapped) and drops this file in their 'C' wrapper. |
43 | * | |
aff0cf9a | 44 | * As far as command queueing, two queues are maintained for |
1da177e4 | 45 | * each 5380 in the system - commands that haven't been issued yet, |
aff0cf9a FT |
46 | * and commands that are currently executing. This means that an |
47 | * unlimited number of commands may be queued, letting | |
48 | * more commands propagate from the higher driver levels giving higher | |
49 | * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, | |
50 | * allowing multiple commands to propagate all the way to a SCSI-II device | |
1da177e4 LT |
51 | * while a command is already executing. |
52 | * | |
53 | * | |
aff0cf9a | 54 | * Issues specific to the NCR5380 : |
1da177e4 | 55 | * |
aff0cf9a FT |
56 | * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead |
57 | * piece of hardware that requires you to sit in a loop polling for | |
58 | * the REQ signal as long as you are connected. Some devices are | |
59 | * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect | |
686f3990 | 60 | * while doing long seek operations. [...] These |
1da177e4 LT |
61 | * broken devices are the exception rather than the rule and I'd rather |
62 | * spend my time optimizing for the normal case. | |
63 | * | |
64 | * Architecture : | |
65 | * | |
66 | * At the heart of the design is a coroutine, NCR5380_main, | |
67 | * which is started from a workqueue for each NCR5380 host in the | |
68 | * system. It attempts to establish I_T_L or I_T_L_Q nexuses by | |
69 | * removing the commands from the issue queue and calling | |
aff0cf9a | 70 | * NCR5380_select() if a nexus is not established. |
1da177e4 LT |
71 | * |
72 | * Once a nexus is established, the NCR5380_information_transfer() | |
73 | * phase goes through the various phases as instructed by the target. | |
74 | * if the target goes into MSG IN and sends a DISCONNECT message, | |
75 | * the command structure is placed into the per instance disconnected | |
aff0cf9a | 76 | * queue, and NCR5380_main tries to find more work. If the target is |
1da177e4 LT |
77 | * idle for too long, the system will try to sleep. |
78 | * | |
79 | * If a command has disconnected, eventually an interrupt will trigger, | |
80 | * calling NCR5380_intr() which will in turn call NCR5380_reselect | |
81 | * to reestablish a nexus. This will run main if necessary. | |
82 | * | |
aff0cf9a | 83 | * On command termination, the done function will be called as |
1da177e4 LT |
84 | * appropriate. |
85 | * | |
aff0cf9a | 86 | * SCSI pointers are maintained in the SCp field of SCSI command |
1da177e4 LT |
87 | * structures, being initialized after the command is connected |
88 | * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. | |
89 | * Note that in violation of the standard, an implicit SAVE POINTERS operation | |
90 | * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. | |
91 | */ | |
92 | ||
93 | /* | |
94 | * Using this file : | |
95 | * This file a skeleton Linux SCSI driver for the NCR 5380 series | |
aff0cf9a | 96 | * of chips. To use it, you write an architecture specific functions |
1da177e4 LT |
97 | * and macros and include this file in your driver. |
98 | * | |
aff0cf9a FT |
99 | * These macros control options : |
100 | * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be | |
594d4ba3 | 101 | * defined. |
aff0cf9a | 102 | * |
1da177e4 | 103 | * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically |
594d4ba3 | 104 | * for commands that return with a CHECK CONDITION status. |
1da177e4 LT |
105 | * |
106 | * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential | |
594d4ba3 | 107 | * transceivers. |
1da177e4 | 108 | * |
1da177e4 LT |
109 | * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases. |
110 | * | |
8053b0ee FT |
111 | * REAL_DMA - if defined, REAL DMA is used during the data transfer phases. |
112 | * | |
1da177e4 | 113 | * These macros MUST be defined : |
aff0cf9a | 114 | * |
1da177e4 LT |
115 | * NCR5380_read(register) - read from the specified register |
116 | * | |
aff0cf9a | 117 | * NCR5380_write(register, value) - write to the specific register |
1da177e4 | 118 | * |
aff0cf9a | 119 | * NCR5380_implementation_fields - additional fields needed for this |
594d4ba3 | 120 | * specific implementation of the NCR5380 |
1da177e4 LT |
121 | * |
122 | * Either real DMA *or* pseudo DMA may be implemented | |
1da177e4 | 123 | * |
4a98f896 FT |
124 | * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer |
125 | * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380 | |
126 | * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory | |
127 | * NCR5380_dma_residual - residual byte count | |
1da177e4 | 128 | * |
1da177e4 | 129 | * The generic driver is initialized by calling NCR5380_init(instance), |
aff0cf9a | 130 | * after setting the appropriate host specific fields and ID. If the |
1da177e4 LT |
131 | * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance, |
132 | * possible) function may be used. | |
133 | */ | |
134 | ||
e5d55d1a FT |
135 | #ifndef NCR5380_io_delay |
136 | #define NCR5380_io_delay(x) | |
137 | #endif | |
138 | ||
52d3e561 FT |
139 | #ifndef NCR5380_acquire_dma_irq |
140 | #define NCR5380_acquire_dma_irq(x) (1) | |
141 | #endif | |
142 | ||
143 | #ifndef NCR5380_release_dma_irq | |
144 | #define NCR5380_release_dma_irq(x) | |
145 | #endif | |
146 | ||
54d8fe44 FT |
147 | static int do_abort(struct Scsi_Host *); |
148 | static void do_reset(struct Scsi_Host *); | |
1da177e4 | 149 | |
c16df32e | 150 | /** |
0d2cf867 | 151 | * initialize_SCp - init the scsi pointer field |
594d4ba3 | 152 | * @cmd: command block to set up |
1da177e4 | 153 | * |
594d4ba3 | 154 | * Set up the internal fields in the SCSI command. |
1da177e4 LT |
155 | */ |
156 | ||
710ddd0d | 157 | static inline void initialize_SCp(struct scsi_cmnd *cmd) |
1da177e4 | 158 | { |
aff0cf9a FT |
159 | /* |
160 | * Initialize the Scsi Pointer field so that all of the commands in the | |
1da177e4 LT |
161 | * various queues are valid. |
162 | */ | |
163 | ||
9e0fe44d BH |
164 | if (scsi_bufflen(cmd)) { |
165 | cmd->SCp.buffer = scsi_sglist(cmd); | |
166 | cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; | |
45711f1a | 167 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
1da177e4 LT |
168 | cmd->SCp.this_residual = cmd->SCp.buffer->length; |
169 | } else { | |
170 | cmd->SCp.buffer = NULL; | |
171 | cmd->SCp.buffers_residual = 0; | |
9e0fe44d BH |
172 | cmd->SCp.ptr = NULL; |
173 | cmd->SCp.this_residual = 0; | |
1da177e4 | 174 | } |
f27db8eb FT |
175 | |
176 | cmd->SCp.Status = 0; | |
177 | cmd->SCp.Message = 0; | |
1da177e4 LT |
178 | } |
179 | ||
180 | /** | |
b32ade12 | 181 | * NCR5380_poll_politely2 - wait for two chip register values |
d5d37a0a | 182 | * @hostdata: host private data |
b32ade12 FT |
183 | * @reg1: 5380 register to poll |
184 | * @bit1: Bitmask to check | |
185 | * @val1: Expected value | |
186 | * @reg2: Second 5380 register to poll | |
187 | * @bit2: Second bitmask to check | |
188 | * @val2: Second expected value | |
2f854b82 FT |
189 | * @wait: Time-out in jiffies |
190 | * | |
191 | * Polls the chip in a reasonably efficient manner waiting for an | |
192 | * event to occur. After a short quick poll we begin to yield the CPU | |
193 | * (if possible). In irq contexts the time-out is arbitrarily limited. | |
194 | * Callers may hold locks as long as they are held in irq mode. | |
195 | * | |
b32ade12 | 196 | * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. |
1da177e4 | 197 | */ |
2f854b82 | 198 | |
d5d37a0a | 199 | static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata, |
61e1ce58 FT |
200 | unsigned int reg1, u8 bit1, u8 val1, |
201 | unsigned int reg2, u8 bit2, u8 val2, | |
202 | unsigned long wait) | |
1da177e4 | 203 | { |
d4408dd7 | 204 | unsigned long n = hostdata->poll_loops; |
2f854b82 | 205 | unsigned long deadline = jiffies + wait; |
2f854b82 | 206 | |
2f854b82 | 207 | do { |
b32ade12 FT |
208 | if ((NCR5380_read(reg1) & bit1) == val1) |
209 | return 0; | |
210 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 LT |
211 | return 0; |
212 | cpu_relax(); | |
2f854b82 FT |
213 | } while (n--); |
214 | ||
215 | if (irqs_disabled() || in_interrupt()) | |
216 | return -ETIMEDOUT; | |
217 | ||
218 | /* Repeatedly sleep for 1 ms until deadline */ | |
219 | while (time_is_after_jiffies(deadline)) { | |
220 | schedule_timeout_uninterruptible(1); | |
b32ade12 FT |
221 | if ((NCR5380_read(reg1) & bit1) == val1) |
222 | return 0; | |
223 | if ((NCR5380_read(reg2) & bit2) == val2) | |
1da177e4 | 224 | return 0; |
1da177e4 | 225 | } |
2f854b82 | 226 | |
1da177e4 LT |
227 | return -ETIMEDOUT; |
228 | } | |
229 | ||
185a7a1c | 230 | #if NDEBUG |
1da177e4 LT |
231 | static struct { |
232 | unsigned char mask; | |
233 | const char *name; | |
aff0cf9a FT |
234 | } signals[] = { |
235 | {SR_DBP, "PARITY"}, | |
236 | {SR_RST, "RST"}, | |
237 | {SR_BSY, "BSY"}, | |
238 | {SR_REQ, "REQ"}, | |
239 | {SR_MSG, "MSG"}, | |
240 | {SR_CD, "CD"}, | |
241 | {SR_IO, "IO"}, | |
242 | {SR_SEL, "SEL"}, | |
1da177e4 | 243 | {0, NULL} |
aff0cf9a | 244 | }, |
1da177e4 | 245 | basrs[] = { |
12866b99 FT |
246 | {BASR_END_DMA_TRANSFER, "END OF DMA"}, |
247 | {BASR_DRQ, "DRQ"}, | |
248 | {BASR_PARITY_ERROR, "PARITY ERROR"}, | |
249 | {BASR_IRQ, "IRQ"}, | |
250 | {BASR_PHASE_MATCH, "PHASE MATCH"}, | |
251 | {BASR_BUSY_ERROR, "BUSY ERROR"}, | |
aff0cf9a FT |
252 | {BASR_ATN, "ATN"}, |
253 | {BASR_ACK, "ACK"}, | |
1da177e4 | 254 | {0, NULL} |
aff0cf9a FT |
255 | }, |
256 | icrs[] = { | |
257 | {ICR_ASSERT_RST, "ASSERT RST"}, | |
12866b99 FT |
258 | {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, |
259 | {ICR_ARBITRATION_LOST, "LOST ARB."}, | |
aff0cf9a FT |
260 | {ICR_ASSERT_ACK, "ASSERT ACK"}, |
261 | {ICR_ASSERT_BSY, "ASSERT BSY"}, | |
262 | {ICR_ASSERT_SEL, "ASSERT SEL"}, | |
263 | {ICR_ASSERT_ATN, "ASSERT ATN"}, | |
264 | {ICR_ASSERT_DATA, "ASSERT DATA"}, | |
1da177e4 | 265 | {0, NULL} |
aff0cf9a FT |
266 | }, |
267 | mrs[] = { | |
12866b99 FT |
268 | {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, |
269 | {MR_TARGET, "TARGET"}, | |
270 | {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, | |
271 | {MR_ENABLE_PAR_INTR, "PARITY INTR"}, | |
272 | {MR_ENABLE_EOP_INTR, "EOP INTR"}, | |
273 | {MR_MONITOR_BSY, "MONITOR BSY"}, | |
274 | {MR_DMA_MODE, "DMA MODE"}, | |
275 | {MR_ARBITRATE, "ARBITRATE"}, | |
1da177e4 LT |
276 | {0, NULL} |
277 | }; | |
278 | ||
279 | /** | |
0d2cf867 FT |
280 | * NCR5380_print - print scsi bus signals |
281 | * @instance: adapter state to dump | |
1da177e4 | 282 | * |
594d4ba3 | 283 | * Print the SCSI bus signals for debugging purposes |
1da177e4 LT |
284 | */ |
285 | ||
286 | static void NCR5380_print(struct Scsi_Host *instance) | |
287 | { | |
61e1ce58 | 288 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 289 | unsigned char status, data, basr, mr, icr, i; |
1da177e4 LT |
290 | |
291 | data = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
292 | status = NCR5380_read(STATUS_REG); | |
293 | mr = NCR5380_read(MODE_REG); | |
294 | icr = NCR5380_read(INITIATOR_COMMAND_REG); | |
295 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
296 | ||
12866b99 | 297 | printk(KERN_DEBUG "SR = 0x%02x : ", status); |
1da177e4 LT |
298 | for (i = 0; signals[i].mask; ++i) |
299 | if (status & signals[i].mask) | |
12866b99 FT |
300 | printk(KERN_CONT "%s, ", signals[i].name); |
301 | printk(KERN_CONT "\nBASR = 0x%02x : ", basr); | |
1da177e4 LT |
302 | for (i = 0; basrs[i].mask; ++i) |
303 | if (basr & basrs[i].mask) | |
12866b99 FT |
304 | printk(KERN_CONT "%s, ", basrs[i].name); |
305 | printk(KERN_CONT "\nICR = 0x%02x : ", icr); | |
1da177e4 LT |
306 | for (i = 0; icrs[i].mask; ++i) |
307 | if (icr & icrs[i].mask) | |
12866b99 FT |
308 | printk(KERN_CONT "%s, ", icrs[i].name); |
309 | printk(KERN_CONT "\nMR = 0x%02x : ", mr); | |
1da177e4 LT |
310 | for (i = 0; mrs[i].mask; ++i) |
311 | if (mr & mrs[i].mask) | |
12866b99 FT |
312 | printk(KERN_CONT "%s, ", mrs[i].name); |
313 | printk(KERN_CONT "\n"); | |
1da177e4 LT |
314 | } |
315 | ||
0d2cf867 FT |
316 | static struct { |
317 | unsigned char value; | |
318 | const char *name; | |
319 | } phases[] = { | |
320 | {PHASE_DATAOUT, "DATAOUT"}, | |
321 | {PHASE_DATAIN, "DATAIN"}, | |
322 | {PHASE_CMDOUT, "CMDOUT"}, | |
323 | {PHASE_STATIN, "STATIN"}, | |
324 | {PHASE_MSGOUT, "MSGOUT"}, | |
325 | {PHASE_MSGIN, "MSGIN"}, | |
326 | {PHASE_UNKNOWN, "UNKNOWN"} | |
327 | }; | |
1da177e4 | 328 | |
c16df32e | 329 | /** |
0d2cf867 | 330 | * NCR5380_print_phase - show SCSI phase |
594d4ba3 | 331 | * @instance: adapter to dump |
1da177e4 | 332 | * |
594d4ba3 | 333 | * Print the current SCSI phase for debugging purposes |
1da177e4 LT |
334 | */ |
335 | ||
336 | static void NCR5380_print_phase(struct Scsi_Host *instance) | |
337 | { | |
61e1ce58 | 338 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
339 | unsigned char status; |
340 | int i; | |
1da177e4 LT |
341 | |
342 | status = NCR5380_read(STATUS_REG); | |
343 | if (!(status & SR_REQ)) | |
6a6ff4ac | 344 | shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); |
1da177e4 | 345 | else { |
0d2cf867 FT |
346 | for (i = 0; (phases[i].value != PHASE_UNKNOWN) && |
347 | (phases[i].value != (status & PHASE_MASK)); ++i) | |
348 | ; | |
6a6ff4ac | 349 | shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); |
1da177e4 LT |
350 | } |
351 | } | |
352 | #endif | |
353 | ||
1da177e4 | 354 | |
77f18a87 | 355 | static int probe_irq; |
1da177e4 LT |
356 | |
357 | /** | |
594d4ba3 FT |
358 | * probe_intr - helper for IRQ autoprobe |
359 | * @irq: interrupt number | |
360 | * @dev_id: unused | |
361 | * @regs: unused | |
1da177e4 | 362 | * |
594d4ba3 FT |
363 | * Set a flag to indicate the IRQ in question was received. This is |
364 | * used by the IRQ probe code. | |
1da177e4 | 365 | */ |
aff0cf9a | 366 | |
77f18a87 | 367 | static irqreturn_t probe_intr(int irq, void *dev_id) |
1da177e4 LT |
368 | { |
369 | probe_irq = irq; | |
370 | return IRQ_HANDLED; | |
371 | } | |
372 | ||
373 | /** | |
594d4ba3 FT |
374 | * NCR5380_probe_irq - find the IRQ of an NCR5380 |
375 | * @instance: NCR5380 controller | |
376 | * @possible: bitmask of ISA IRQ lines | |
1da177e4 | 377 | * |
594d4ba3 FT |
378 | * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ |
379 | * and then looking to see what interrupt actually turned up. | |
1da177e4 LT |
380 | */ |
381 | ||
77f18a87 | 382 | static int __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance, |
702809ce | 383 | int possible) |
1da177e4 | 384 | { |
e8a60144 | 385 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
386 | unsigned long timeout; |
387 | int trying_irqs, i, mask; | |
1da177e4 | 388 | |
22f5f10d | 389 | for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
4909cc2b | 390 | if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0)) |
1da177e4 LT |
391 | trying_irqs |= mask; |
392 | ||
4e5a800c | 393 | timeout = jiffies + msecs_to_jiffies(250); |
22f5f10d | 394 | probe_irq = NO_IRQ; |
1da177e4 LT |
395 | |
396 | /* | |
397 | * A interrupt is triggered whenever BSY = false, SEL = true | |
aff0cf9a | 398 | * and a bit set in the SELECT_ENABLE_REG is asserted on the |
1da177e4 LT |
399 | * SCSI bus. |
400 | * | |
401 | * Note that the bus is only driven when the phase control signals | |
402 | * (I/O, C/D, and MSG) match those in the TCR, so we must reset that | |
403 | * to zero. | |
404 | */ | |
405 | ||
406 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
407 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
408 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
409 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL); | |
410 | ||
22f5f10d | 411 | while (probe_irq == NO_IRQ && time_before(jiffies, timeout)) |
a9a3047d | 412 | schedule_timeout_uninterruptible(1); |
aff0cf9a | 413 | |
1da177e4 LT |
414 | NCR5380_write(SELECT_ENABLE_REG, 0); |
415 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
416 | ||
22f5f10d | 417 | for (i = 1, mask = 2; i < 16; ++i, mask <<= 1) |
1da177e4 LT |
418 | if (trying_irqs & mask) |
419 | free_irq(i, NULL); | |
420 | ||
421 | return probe_irq; | |
422 | } | |
423 | ||
424 | /** | |
594d4ba3 FT |
425 | * NCR58380_info - report driver and host information |
426 | * @instance: relevant scsi host instance | |
1da177e4 | 427 | * |
594d4ba3 | 428 | * For use as the host template info() handler. |
1da177e4 LT |
429 | */ |
430 | ||
8c32513b | 431 | static const char *NCR5380_info(struct Scsi_Host *instance) |
1da177e4 | 432 | { |
8c32513b FT |
433 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
434 | ||
435 | return hostdata->info; | |
436 | } | |
437 | ||
438 | static void prepare_info(struct Scsi_Host *instance) | |
439 | { | |
440 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
441 | ||
442 | snprintf(hostdata->info, sizeof(hostdata->info), | |
820682b1 FT |
443 | "%s, irq %d, " |
444 | "io_port 0x%lx, base 0x%lx, " | |
8c32513b FT |
445 | "can_queue %d, cmd_per_lun %d, " |
446 | "sg_tablesize %d, this_id %d, " | |
be3f4121 | 447 | "flags { %s%s%s}, " |
8c32513b | 448 | "options { %s} ", |
820682b1 FT |
449 | instance->hostt->name, instance->irq, |
450 | hostdata->io_port, hostdata->base, | |
8c32513b FT |
451 | instance->can_queue, instance->cmd_per_lun, |
452 | instance->sg_tablesize, instance->this_id, | |
1bb46002 | 453 | hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", |
8c32513b | 454 | hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", |
9c3f0e2b | 455 | hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "", |
1da177e4 | 456 | #ifdef DIFFERENTIAL |
8c32513b | 457 | "DIFFERENTIAL " |
1da177e4 | 458 | #endif |
1da177e4 | 459 | #ifdef PARITY |
8c32513b | 460 | "PARITY " |
8c32513b FT |
461 | #endif |
462 | ""); | |
1da177e4 LT |
463 | } |
464 | ||
1da177e4 | 465 | /** |
0d2cf867 | 466 | * NCR5380_init - initialise an NCR5380 |
594d4ba3 FT |
467 | * @instance: adapter to configure |
468 | * @flags: control flags | |
1da177e4 | 469 | * |
594d4ba3 FT |
470 | * Initializes *instance and corresponding 5380 chip, |
471 | * with flags OR'd into the initial flags value. | |
1da177e4 | 472 | * |
594d4ba3 | 473 | * Notes : I assume that the host, hostno, and id bits have been |
0d2cf867 | 474 | * set correctly. I don't care about the irq and other fields. |
1da177e4 | 475 | * |
594d4ba3 | 476 | * Returns 0 for success |
1da177e4 LT |
477 | */ |
478 | ||
6f039790 | 479 | static int NCR5380_init(struct Scsi_Host *instance, int flags) |
1da177e4 | 480 | { |
e8a60144 | 481 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 482 | int i; |
2f854b82 | 483 | unsigned long deadline; |
d4408dd7 | 484 | unsigned long accesses_per_ms; |
1da177e4 | 485 | |
ae5e33af FT |
486 | instance->max_lun = 7; |
487 | ||
0d2cf867 | 488 | hostdata->host = instance; |
1da177e4 | 489 | hostdata->id_mask = 1 << instance->this_id; |
0d2cf867 | 490 | hostdata->id_higher_mask = 0; |
1da177e4 LT |
491 | for (i = hostdata->id_mask; i <= 0x80; i <<= 1) |
492 | if (i > hostdata->id_mask) | |
493 | hostdata->id_higher_mask |= i; | |
494 | for (i = 0; i < 8; ++i) | |
495 | hostdata->busy[i] = 0; | |
e4dec680 FT |
496 | hostdata->dma_len = 0; |
497 | ||
11d2f63b | 498 | spin_lock_init(&hostdata->lock); |
1da177e4 | 499 | hostdata->connected = NULL; |
f27db8eb FT |
500 | hostdata->sensing = NULL; |
501 | INIT_LIST_HEAD(&hostdata->autosense); | |
32b26a10 FT |
502 | INIT_LIST_HEAD(&hostdata->unissued); |
503 | INIT_LIST_HEAD(&hostdata->disconnected); | |
504 | ||
55181be8 | 505 | hostdata->flags = flags; |
aff0cf9a | 506 | |
8d8601a7 | 507 | INIT_WORK(&hostdata->main_task, NCR5380_main); |
0ad0eff9 FT |
508 | hostdata->work_q = alloc_workqueue("ncr5380_%d", |
509 | WQ_UNBOUND | WQ_MEM_RECLAIM, | |
510 | 1, instance->host_no); | |
511 | if (!hostdata->work_q) | |
512 | return -ENOMEM; | |
513 | ||
8c32513b FT |
514 | prepare_info(instance); |
515 | ||
1da177e4 LT |
516 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
517 | NCR5380_write(MODE_REG, MR_BASE); | |
518 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
519 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2f854b82 FT |
520 | |
521 | /* Calibrate register polling loop */ | |
522 | i = 0; | |
523 | deadline = jiffies + 1; | |
524 | do { | |
525 | cpu_relax(); | |
526 | } while (time_is_after_jiffies(deadline)); | |
527 | deadline += msecs_to_jiffies(256); | |
528 | do { | |
529 | NCR5380_read(STATUS_REG); | |
530 | ++i; | |
531 | cpu_relax(); | |
532 | } while (time_is_after_jiffies(deadline)); | |
d4408dd7 FT |
533 | accesses_per_ms = i / 256; |
534 | hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2; | |
2f854b82 | 535 | |
b6488f97 FT |
536 | return 0; |
537 | } | |
1da177e4 | 538 | |
b6488f97 FT |
539 | /** |
540 | * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. | |
541 | * @instance: adapter to check | |
542 | * | |
543 | * If the system crashed, it may have crashed with a connected target and | |
544 | * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the | |
545 | * currently established nexus, which we know nothing about. Failing that | |
546 | * do a bus reset. | |
547 | * | |
548 | * Note that a bus reset will cause the chip to assert IRQ. | |
549 | * | |
550 | * Returns 0 if successful, otherwise -ENXIO. | |
551 | */ | |
552 | ||
553 | static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) | |
554 | { | |
9c3f0e2b | 555 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
b6488f97 | 556 | int pass; |
1da177e4 LT |
557 | |
558 | for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { | |
559 | switch (pass) { | |
560 | case 1: | |
561 | case 3: | |
562 | case 5: | |
636b1ec8 | 563 | shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); |
d5d37a0a | 564 | NCR5380_poll_politely(hostdata, |
636b1ec8 | 565 | STATUS_REG, SR_BSY, 0, 5 * HZ); |
1da177e4 LT |
566 | break; |
567 | case 2: | |
636b1ec8 | 568 | shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); |
1da177e4 LT |
569 | do_abort(instance); |
570 | break; | |
571 | case 4: | |
636b1ec8 | 572 | shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); |
1da177e4 | 573 | do_reset(instance); |
9c3f0e2b FT |
574 | /* Wait after a reset; the SCSI standard calls for |
575 | * 250ms, we wait 500ms to be on the safe side. | |
576 | * But some Toshiba CD-ROMs need ten times that. | |
577 | */ | |
578 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) | |
579 | msleep(2500); | |
580 | else | |
581 | msleep(500); | |
1da177e4 LT |
582 | break; |
583 | case 6: | |
636b1ec8 | 584 | shost_printk(KERN_ERR, instance, "bus locked solid\n"); |
1da177e4 LT |
585 | return -ENXIO; |
586 | } | |
587 | } | |
588 | return 0; | |
589 | } | |
590 | ||
591 | /** | |
0d2cf867 | 592 | * NCR5380_exit - remove an NCR5380 |
594d4ba3 | 593 | * @instance: adapter to remove |
0d2cf867 FT |
594 | * |
595 | * Assumes that no more work can be queued (e.g. by NCR5380_intr). | |
1da177e4 LT |
596 | */ |
597 | ||
a43cf0f3 | 598 | static void NCR5380_exit(struct Scsi_Host *instance) |
1da177e4 | 599 | { |
e8a60144 | 600 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 601 | |
8d8601a7 | 602 | cancel_work_sync(&hostdata->main_task); |
0ad0eff9 | 603 | destroy_workqueue(hostdata->work_q); |
1da177e4 LT |
604 | } |
605 | ||
677e0194 FT |
606 | /** |
607 | * complete_cmd - finish processing a command and return it to the SCSI ML | |
608 | * @instance: the host instance | |
609 | * @cmd: command to complete | |
610 | */ | |
611 | ||
612 | static void complete_cmd(struct Scsi_Host *instance, | |
613 | struct scsi_cmnd *cmd) | |
614 | { | |
615 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
616 | ||
617 | dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); | |
618 | ||
f27db8eb FT |
619 | if (hostdata->sensing == cmd) { |
620 | /* Autosense processing ends here */ | |
621 | if ((cmd->result & 0xff) != SAM_STAT_GOOD) { | |
622 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
623 | set_host_byte(cmd, DID_ERROR); | |
624 | } else | |
625 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); | |
626 | hostdata->sensing = NULL; | |
627 | } | |
628 | ||
677e0194 FT |
629 | hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); |
630 | ||
631 | cmd->scsi_done(cmd); | |
632 | } | |
633 | ||
1da177e4 | 634 | /** |
1bb40589 FT |
635 | * NCR5380_queue_command - queue a command |
636 | * @instance: the relevant SCSI adapter | |
637 | * @cmd: SCSI command | |
1da177e4 | 638 | * |
1bb40589 FT |
639 | * cmd is added to the per-instance issue queue, with minor |
640 | * twiddling done to the host specific fields of cmd. If the | |
641 | * main coroutine is not running, it is restarted. | |
1da177e4 LT |
642 | */ |
643 | ||
1bb40589 FT |
644 | static int NCR5380_queue_command(struct Scsi_Host *instance, |
645 | struct scsi_cmnd *cmd) | |
1da177e4 | 646 | { |
1bb40589 | 647 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
32b26a10 | 648 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1bb40589 | 649 | unsigned long flags; |
1da177e4 LT |
650 | |
651 | #if (NDEBUG & NDEBUG_NO_WRITE) | |
652 | switch (cmd->cmnd[0]) { | |
653 | case WRITE_6: | |
654 | case WRITE_10: | |
dbb6b350 | 655 | shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); |
1da177e4 | 656 | cmd->result = (DID_ERROR << 16); |
1bb40589 | 657 | cmd->scsi_done(cmd); |
1da177e4 LT |
658 | return 0; |
659 | } | |
0d2cf867 | 660 | #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ |
1da177e4 | 661 | |
1da177e4 LT |
662 | cmd->result = 0; |
663 | ||
52d3e561 FT |
664 | if (!NCR5380_acquire_dma_irq(instance)) |
665 | return SCSI_MLQUEUE_HOST_BUSY; | |
666 | ||
11d2f63b | 667 | spin_lock_irqsave(&hostdata->lock, flags); |
1bb40589 | 668 | |
aff0cf9a FT |
669 | /* |
670 | * Insert the cmd into the issue queue. Note that REQUEST SENSE | |
1da177e4 | 671 | * commands are added to the head of the queue since any command will |
aff0cf9a | 672 | * clear the contingent allegiance condition that exists and the |
1da177e4 LT |
673 | * sense data is only guaranteed to be valid while the condition exists. |
674 | */ | |
675 | ||
32b26a10 FT |
676 | if (cmd->cmnd[0] == REQUEST_SENSE) |
677 | list_add(&ncmd->list, &hostdata->unissued); | |
678 | else | |
679 | list_add_tail(&ncmd->list, &hostdata->unissued); | |
680 | ||
11d2f63b | 681 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1bb40589 | 682 | |
dbb6b350 FT |
683 | dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", |
684 | cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); | |
1da177e4 | 685 | |
1da177e4 | 686 | /* Kick off command processing */ |
8d8601a7 | 687 | queue_work(hostdata->work_q, &hostdata->main_task); |
1da177e4 LT |
688 | return 0; |
689 | } | |
690 | ||
52d3e561 FT |
691 | static inline void maybe_release_dma_irq(struct Scsi_Host *instance) |
692 | { | |
693 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
694 | ||
695 | /* Caller does the locking needed to set & test these data atomically */ | |
696 | if (list_empty(&hostdata->disconnected) && | |
697 | list_empty(&hostdata->unissued) && | |
698 | list_empty(&hostdata->autosense) && | |
699 | !hostdata->connected && | |
700 | !hostdata->selecting) | |
701 | NCR5380_release_dma_irq(instance); | |
702 | } | |
703 | ||
f27db8eb FT |
704 | /** |
705 | * dequeue_next_cmd - dequeue a command for processing | |
706 | * @instance: the scsi host instance | |
707 | * | |
708 | * Priority is given to commands on the autosense queue. These commands | |
709 | * need autosense because of a CHECK CONDITION result. | |
710 | * | |
711 | * Returns a command pointer if a command is found for a target that is | |
712 | * not already busy. Otherwise returns NULL. | |
713 | */ | |
714 | ||
715 | static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) | |
716 | { | |
717 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
718 | struct NCR5380_cmd *ncmd; | |
719 | struct scsi_cmnd *cmd; | |
720 | ||
8d5dbec3 | 721 | if (hostdata->sensing || list_empty(&hostdata->autosense)) { |
f27db8eb FT |
722 | list_for_each_entry(ncmd, &hostdata->unissued, list) { |
723 | cmd = NCR5380_to_scmd(ncmd); | |
724 | dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", | |
725 | cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); | |
726 | ||
727 | if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { | |
728 | list_del(&ncmd->list); | |
729 | dsprintk(NDEBUG_QUEUES, instance, | |
730 | "dequeue: removed %p from issue queue\n", cmd); | |
731 | return cmd; | |
732 | } | |
733 | } | |
734 | } else { | |
735 | /* Autosense processing begins here */ | |
736 | ncmd = list_first_entry(&hostdata->autosense, | |
737 | struct NCR5380_cmd, list); | |
738 | list_del(&ncmd->list); | |
739 | cmd = NCR5380_to_scmd(ncmd); | |
740 | dsprintk(NDEBUG_QUEUES, instance, | |
741 | "dequeue: removed %p from autosense queue\n", cmd); | |
742 | scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); | |
743 | hostdata->sensing = cmd; | |
744 | return cmd; | |
745 | } | |
746 | return NULL; | |
747 | } | |
748 | ||
749 | static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) | |
750 | { | |
751 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
752 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); | |
753 | ||
8d5dbec3 | 754 | if (hostdata->sensing == cmd) { |
f27db8eb FT |
755 | scsi_eh_restore_cmnd(cmd, &hostdata->ses); |
756 | list_add(&ncmd->list, &hostdata->autosense); | |
757 | hostdata->sensing = NULL; | |
758 | } else | |
759 | list_add(&ncmd->list, &hostdata->unissued); | |
760 | } | |
761 | ||
1da177e4 | 762 | /** |
0d2cf867 | 763 | * NCR5380_main - NCR state machines |
1da177e4 | 764 | * |
594d4ba3 FT |
765 | * NCR5380_main is a coroutine that runs as long as more work can |
766 | * be done on the NCR5380 host adapters in a system. Both | |
767 | * NCR5380_queue_command() and NCR5380_intr() will try to start it | |
768 | * in case it is not running. | |
1da177e4 LT |
769 | */ |
770 | ||
c4028958 | 771 | static void NCR5380_main(struct work_struct *work) |
1da177e4 | 772 | { |
c4028958 | 773 | struct NCR5380_hostdata *hostdata = |
8d8601a7 | 774 | container_of(work, struct NCR5380_hostdata, main_task); |
1da177e4 | 775 | struct Scsi_Host *instance = hostdata->host; |
1da177e4 | 776 | int done; |
aff0cf9a | 777 | |
1da177e4 | 778 | do { |
1da177e4 | 779 | done = 1; |
11d2f63b | 780 | |
0a4e3612 | 781 | spin_lock_irq(&hostdata->lock); |
ccf6efd7 FT |
782 | while (!hostdata->connected && !hostdata->selecting) { |
783 | struct scsi_cmnd *cmd = dequeue_next_cmd(instance); | |
784 | ||
785 | if (!cmd) | |
786 | break; | |
1da177e4 | 787 | |
f27db8eb | 788 | dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); |
76f13b93 | 789 | |
f27db8eb FT |
790 | /* |
791 | * Attempt to establish an I_T_L nexus here. | |
792 | * On success, instance->hostdata->connected is set. | |
793 | * On failure, we must add the command back to the | |
794 | * issue queue so we can keep trying. | |
795 | */ | |
796 | /* | |
797 | * REQUEST SENSE commands are issued without tagged | |
798 | * queueing, even on SCSI-II devices because the | |
799 | * contingent allegiance condition exists for the | |
800 | * entire unit. | |
801 | */ | |
11d2f63b | 802 | |
ccf6efd7 | 803 | if (!NCR5380_select(instance, cmd)) { |
707d62b3 | 804 | dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); |
52d3e561 | 805 | maybe_release_dma_irq(instance); |
f27db8eb FT |
806 | } else { |
807 | dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, | |
808 | "main: select failed, returning %p to queue\n", cmd); | |
809 | requeue_cmd(instance, cmd); | |
810 | } | |
811 | } | |
e4dec680 | 812 | if (hostdata->connected && !hostdata->dma_len) { |
b746545f | 813 | dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); |
1da177e4 | 814 | NCR5380_information_transfer(instance); |
1da177e4 | 815 | done = 0; |
1d3db59d | 816 | } |
0a4e3612 FT |
817 | spin_unlock_irq(&hostdata->lock); |
818 | if (!done) | |
819 | cond_resched(); | |
1da177e4 | 820 | } while (!done); |
1da177e4 LT |
821 | } |
822 | ||
8053b0ee FT |
823 | /* |
824 | * NCR5380_dma_complete - finish DMA transfer | |
825 | * @instance: the scsi host instance | |
826 | * | |
827 | * Called by the interrupt handler when DMA finishes or a phase | |
828 | * mismatch occurs (which would end the DMA transfer). | |
829 | */ | |
830 | ||
831 | static void NCR5380_dma_complete(struct Scsi_Host *instance) | |
832 | { | |
833 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
834 | int transferred; | |
835 | unsigned char **data; | |
836 | int *count; | |
837 | int saved_data = 0, overrun = 0; | |
838 | unsigned char p; | |
839 | ||
840 | if (hostdata->read_overruns) { | |
841 | p = hostdata->connected->SCp.phase; | |
842 | if (p & SR_IO) { | |
843 | udelay(10); | |
844 | if ((NCR5380_read(BUS_AND_STATUS_REG) & | |
845 | (BASR_PHASE_MATCH | BASR_ACK)) == | |
846 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
847 | saved_data = NCR5380_read(INPUT_DATA_REG); | |
848 | overrun = 1; | |
849 | dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); | |
850 | } | |
851 | } | |
852 | } | |
853 | ||
e9db3198 FT |
854 | #ifdef CONFIG_SUN3 |
855 | if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { | |
856 | pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", | |
857 | instance->host_no); | |
858 | BUG(); | |
859 | } | |
860 | ||
861 | if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == | |
862 | (BASR_PHASE_MATCH | BASR_ACK)) { | |
863 | pr_err("scsi%d: BASR %02x\n", instance->host_no, | |
864 | NCR5380_read(BUS_AND_STATUS_REG)); | |
865 | pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", | |
866 | instance->host_no); | |
867 | BUG(); | |
868 | } | |
869 | #endif | |
870 | ||
8053b0ee FT |
871 | NCR5380_write(MODE_REG, MR_BASE); |
872 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
873 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
874 | ||
4a98f896 | 875 | transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata); |
8053b0ee FT |
876 | hostdata->dma_len = 0; |
877 | ||
878 | data = (unsigned char **)&hostdata->connected->SCp.ptr; | |
879 | count = &hostdata->connected->SCp.this_residual; | |
880 | *data += transferred; | |
881 | *count -= transferred; | |
882 | ||
883 | if (hostdata->read_overruns) { | |
884 | int cnt, toPIO; | |
885 | ||
886 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { | |
887 | cnt = toPIO = hostdata->read_overruns; | |
888 | if (overrun) { | |
889 | dsprintk(NDEBUG_DMA, instance, | |
890 | "Got an input overrun, using saved byte\n"); | |
891 | *(*data)++ = saved_data; | |
892 | (*count)--; | |
893 | cnt--; | |
894 | toPIO--; | |
895 | } | |
896 | if (toPIO > 0) { | |
897 | dsprintk(NDEBUG_DMA, instance, | |
898 | "Doing %d byte PIO to 0x%p\n", cnt, *data); | |
899 | NCR5380_transfer_pio(instance, &p, &cnt, data); | |
900 | *count -= toPIO - cnt; | |
901 | } | |
902 | } | |
903 | } | |
904 | } | |
905 | ||
1da177e4 | 906 | /** |
cd400825 FT |
907 | * NCR5380_intr - generic NCR5380 irq handler |
908 | * @irq: interrupt number | |
909 | * @dev_id: device info | |
910 | * | |
911 | * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses | |
912 | * from the disconnected queue, and restarting NCR5380_main() | |
913 | * as required. | |
914 | * | |
915 | * The chip can assert IRQ in any of six different conditions. The IRQ flag | |
916 | * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). | |
917 | * Three of these six conditions are latched in the Bus and Status Register: | |
918 | * - End of DMA (cleared by ending DMA Mode) | |
919 | * - Parity error (cleared by reading RPIR) | |
920 | * - Loss of BSY (cleared by reading RPIR) | |
921 | * Two conditions have flag bits that are not latched: | |
922 | * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) | |
923 | * - Bus reset (non-maskable) | |
924 | * The remaining condition has no flag bit at all: | |
925 | * - Selection/reselection | |
926 | * | |
927 | * Hence, establishing the cause(s) of any interrupt is partly guesswork. | |
928 | * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor | |
929 | * claimed that "the design of the [DP8490] interrupt logic ensures | |
930 | * interrupts will not be lost (they can be on the DP5380)." | |
931 | * The L5380/53C80 datasheet from LOGIC Devices has more details. | |
932 | * | |
933 | * Checking for bus reset by reading RST is futile because of interrupt | |
934 | * latency, but a bus reset will reset chip logic. Checking for parity error | |
935 | * is unnecessary because that interrupt is never enabled. A Loss of BSY | |
936 | * condition will clear DMA Mode. We can tell when this occurs because the | |
937 | * the Busy Monitor interrupt is enabled together with DMA Mode. | |
1da177e4 LT |
938 | */ |
939 | ||
a46865dc | 940 | static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) |
1da177e4 | 941 | { |
baa9aac6 | 942 | struct Scsi_Host *instance = dev_id; |
cd400825 FT |
943 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
944 | int handled = 0; | |
1da177e4 LT |
945 | unsigned char basr; |
946 | unsigned long flags; | |
947 | ||
11d2f63b | 948 | spin_lock_irqsave(&hostdata->lock, flags); |
cd400825 FT |
949 | |
950 | basr = NCR5380_read(BUS_AND_STATUS_REG); | |
951 | if (basr & BASR_IRQ) { | |
952 | unsigned char mr = NCR5380_read(MODE_REG); | |
953 | unsigned char sr = NCR5380_read(STATUS_REG); | |
954 | ||
b746545f FT |
955 | dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", |
956 | irq, basr, sr, mr); | |
1da177e4 | 957 | |
8053b0ee FT |
958 | if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { |
959 | /* Probably End of DMA, Phase Mismatch or Loss of BSY. | |
960 | * We ack IRQ after clearing Mode Register. Workarounds | |
961 | * for End of DMA errata need to happen in DMA Mode. | |
962 | */ | |
963 | ||
964 | dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); | |
965 | ||
966 | if (hostdata->connected) { | |
967 | NCR5380_dma_complete(instance); | |
968 | queue_work(hostdata->work_q, &hostdata->main_task); | |
969 | } else { | |
970 | NCR5380_write(MODE_REG, MR_BASE); | |
971 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
972 | } | |
973 | } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && | |
cd400825 FT |
974 | (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { |
975 | /* Probably reselected */ | |
976 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
977 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
978 | ||
b746545f | 979 | dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); |
cd400825 FT |
980 | |
981 | if (!hostdata->connected) { | |
982 | NCR5380_reselect(instance); | |
983 | queue_work(hostdata->work_q, &hostdata->main_task); | |
1da177e4 | 984 | } |
cd400825 FT |
985 | if (!hostdata->connected) |
986 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
987 | } else { | |
988 | /* Probably Bus Reset */ | |
989 | NCR5380_read(RESET_PARITY_INTERRUPT_REG); | |
990 | ||
b746545f | 991 | dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); |
e9db3198 FT |
992 | #ifdef SUN3_SCSI_VME |
993 | dregs->csr |= CSR_DMA_ENABLE; | |
994 | #endif | |
cd400825 FT |
995 | } |
996 | handled = 1; | |
997 | } else { | |
9af9fecb | 998 | dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n"); |
e9db3198 FT |
999 | #ifdef SUN3_SCSI_VME |
1000 | dregs->csr |= CSR_DMA_ENABLE; | |
1001 | #endif | |
cd400825 FT |
1002 | } |
1003 | ||
11d2f63b | 1004 | spin_unlock_irqrestore(&hostdata->lock, flags); |
cd400825 FT |
1005 | |
1006 | return IRQ_RETVAL(handled); | |
1da177e4 LT |
1007 | } |
1008 | ||
aff0cf9a | 1009 | /* |
710ddd0d | 1010 | * Function : int NCR5380_select(struct Scsi_Host *instance, |
594d4ba3 | 1011 | * struct scsi_cmnd *cmd) |
1da177e4 LT |
1012 | * |
1013 | * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command, | |
594d4ba3 FT |
1014 | * including ARBITRATION, SELECTION, and initial message out for |
1015 | * IDENTIFY and queue messages. | |
1da177e4 | 1016 | * |
aff0cf9a | 1017 | * Inputs : instance - instantiation of the 5380 driver on which this |
594d4ba3 | 1018 | * target lives, cmd - SCSI command to execute. |
aff0cf9a | 1019 | * |
707d62b3 FT |
1020 | * Returns cmd if selection failed but should be retried, |
1021 | * NULL if selection failed and should not be retried, or | |
1022 | * NULL if selection succeeded (hostdata->connected == cmd). | |
1da177e4 | 1023 | * |
aff0cf9a | 1024 | * Side effects : |
594d4ba3 FT |
1025 | * If bus busy, arbitration failed, etc, NCR5380_select() will exit |
1026 | * with registers as they should have been on entry - ie | |
1027 | * SELECT_ENABLE will be set appropriately, the NCR5380 | |
1028 | * will cease to drive any SCSI bus signals. | |
1da177e4 | 1029 | * |
594d4ba3 FT |
1030 | * If successful : I_T_L or I_T_L_Q nexus will be established, |
1031 | * instance->connected will be set to cmd. | |
1032 | * SELECT interrupt will be disabled. | |
1da177e4 | 1033 | * |
594d4ba3 FT |
1034 | * If failed (no target) : cmd->scsi_done() will be called, and the |
1035 | * cmd->result host byte set to DID_BAD_TARGET. | |
1da177e4 | 1036 | */ |
aff0cf9a | 1037 | |
707d62b3 FT |
1038 | static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance, |
1039 | struct scsi_cmnd *cmd) | |
1da177e4 | 1040 | { |
e8a60144 | 1041 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1042 | unsigned char tmp[3], phase; |
1043 | unsigned char *data; | |
1044 | int len; | |
1da177e4 | 1045 | int err; |
1da177e4 | 1046 | |
1da177e4 | 1047 | NCR5380_dprint(NDEBUG_ARBITRATION, instance); |
b746545f FT |
1048 | dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", |
1049 | instance->this_id); | |
1da177e4 | 1050 | |
707d62b3 FT |
1051 | /* |
1052 | * Arbitration and selection phases are slow and involve dropping the | |
1053 | * lock, so we have to watch out for EH. An exception handler may | |
1054 | * change 'selecting' to NULL. This function will then return NULL | |
1055 | * so that the caller will forget about 'cmd'. (During information | |
1056 | * transfer phases, EH may change 'connected' to NULL.) | |
1057 | */ | |
1058 | hostdata->selecting = cmd; | |
1059 | ||
aff0cf9a FT |
1060 | /* |
1061 | * Set the phase bits to 0, otherwise the NCR5380 won't drive the | |
1da177e4 LT |
1062 | * data bus during SELECTION. |
1063 | */ | |
1064 | ||
1065 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1066 | ||
aff0cf9a | 1067 | /* |
1da177e4 LT |
1068 | * Start arbitration. |
1069 | */ | |
1070 | ||
1071 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); | |
1072 | NCR5380_write(MODE_REG, MR_ARBITRATE); | |
1073 | ||
55500d9b FT |
1074 | /* The chip now waits for BUS FREE phase. Then after the 800 ns |
1075 | * Bus Free Delay, arbitration will begin. | |
1076 | */ | |
1da177e4 | 1077 | |
11d2f63b | 1078 | spin_unlock_irq(&hostdata->lock); |
d5d37a0a | 1079 | err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0, |
b32ade12 FT |
1080 | INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, |
1081 | ICR_ARBITRATION_PROGRESS, HZ); | |
11d2f63b | 1082 | spin_lock_irq(&hostdata->lock); |
b32ade12 FT |
1083 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { |
1084 | /* Reselection interrupt */ | |
707d62b3 | 1085 | goto out; |
b32ade12 | 1086 | } |
ccf6efd7 FT |
1087 | if (!hostdata->selecting) { |
1088 | /* Command was aborted */ | |
1089 | NCR5380_write(MODE_REG, MR_BASE); | |
1090 | goto out; | |
1091 | } | |
b32ade12 FT |
1092 | if (err < 0) { |
1093 | NCR5380_write(MODE_REG, MR_BASE); | |
1094 | shost_printk(KERN_ERR, instance, | |
1095 | "select: arbitration timeout\n"); | |
707d62b3 | 1096 | goto out; |
1da177e4 | 1097 | } |
11d2f63b | 1098 | spin_unlock_irq(&hostdata->lock); |
1da177e4 | 1099 | |
55500d9b | 1100 | /* The SCSI-2 arbitration delay is 2.4 us */ |
1da177e4 LT |
1101 | udelay(3); |
1102 | ||
1103 | /* Check for lost arbitration */ | |
0d2cf867 FT |
1104 | if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || |
1105 | (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || | |
1106 | (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { | |
1da177e4 | 1107 | NCR5380_write(MODE_REG, MR_BASE); |
b746545f | 1108 | dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); |
11d2f63b | 1109 | spin_lock_irq(&hostdata->lock); |
707d62b3 | 1110 | goto out; |
1da177e4 | 1111 | } |
cf13b083 FT |
1112 | |
1113 | /* After/during arbitration, BSY should be asserted. | |
1114 | * IBM DPES-31080 Version S31Q works now | |
1115 | * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) | |
1116 | */ | |
1117 | NCR5380_write(INITIATOR_COMMAND_REG, | |
1118 | ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); | |
1da177e4 | 1119 | |
aff0cf9a FT |
1120 | /* |
1121 | * Again, bus clear + bus settle time is 1.2us, however, this is | |
1da177e4 LT |
1122 | * a minimum so we'll udelay ceil(1.2) |
1123 | */ | |
1124 | ||
9c3f0e2b FT |
1125 | if (hostdata->flags & FLAG_TOSHIBA_DELAY) |
1126 | udelay(15); | |
1127 | else | |
1128 | udelay(2); | |
1da177e4 | 1129 | |
11d2f63b FT |
1130 | spin_lock_irq(&hostdata->lock); |
1131 | ||
72064a78 FT |
1132 | /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ |
1133 | if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) | |
707d62b3 FT |
1134 | goto out; |
1135 | ||
1136 | if (!hostdata->selecting) { | |
1137 | NCR5380_write(MODE_REG, MR_BASE); | |
1138 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1139 | goto out; | |
1140 | } | |
72064a78 | 1141 | |
b746545f | 1142 | dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); |
1da177e4 | 1143 | |
aff0cf9a FT |
1144 | /* |
1145 | * Now that we have won arbitration, start Selection process, asserting | |
1da177e4 LT |
1146 | * the host and target ID's on the SCSI bus. |
1147 | */ | |
1148 | ||
3d07d22b | 1149 | NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); |
1da177e4 | 1150 | |
aff0cf9a | 1151 | /* |
1da177e4 LT |
1152 | * Raise ATN while SEL is true before BSY goes false from arbitration, |
1153 | * since this is the only way to guarantee that we'll get a MESSAGE OUT | |
1154 | * phase immediately after selection. | |
1155 | */ | |
1156 | ||
3d07d22b FT |
1157 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | |
1158 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 LT |
1159 | NCR5380_write(MODE_REG, MR_BASE); |
1160 | ||
aff0cf9a | 1161 | /* |
1da177e4 LT |
1162 | * Reselect interrupts must be turned off prior to the dropping of BSY, |
1163 | * otherwise we will trigger an interrupt. | |
1164 | */ | |
1165 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
1166 | ||
11d2f63b FT |
1167 | spin_unlock_irq(&hostdata->lock); |
1168 | ||
1da177e4 | 1169 | /* |
aff0cf9a | 1170 | * The initiator shall then wait at least two deskew delays and release |
1da177e4 LT |
1171 | * the BSY signal. |
1172 | */ | |
0d2cf867 | 1173 | udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ |
1da177e4 LT |
1174 | |
1175 | /* Reset BSY */ | |
3d07d22b FT |
1176 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | |
1177 | ICR_ASSERT_ATN | ICR_ASSERT_SEL); | |
1da177e4 | 1178 | |
aff0cf9a | 1179 | /* |
1da177e4 | 1180 | * Something weird happens when we cease to drive BSY - looks |
aff0cf9a | 1181 | * like the board/chip is letting us do another read before the |
1da177e4 LT |
1182 | * appropriate propagation delay has expired, and we're confusing |
1183 | * a BSY signal from ourselves as the target's response to SELECTION. | |
1184 | * | |
1185 | * A small delay (the 'C++' frontend breaks the pipeline with an | |
1186 | * unnecessary jump, making it work on my 386-33/Trantor T128, the | |
aff0cf9a FT |
1187 | * tighter 'C' code breaks and requires this) solves the problem - |
1188 | * the 1 us delay is arbitrary, and only used because this delay will | |
1189 | * be the same on other platforms and since it works here, it should | |
1da177e4 LT |
1190 | * work there. |
1191 | * | |
1192 | * wingel suggests that this could be due to failing to wait | |
1193 | * one deskew delay. | |
1194 | */ | |
1195 | ||
1196 | udelay(1); | |
1197 | ||
b746545f | 1198 | dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); |
1da177e4 | 1199 | |
aff0cf9a FT |
1200 | /* |
1201 | * The SCSI specification calls for a 250 ms timeout for the actual | |
1da177e4 LT |
1202 | * selection. |
1203 | */ | |
1204 | ||
d5d37a0a | 1205 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY, |
ae753a33 | 1206 | msecs_to_jiffies(250)); |
1da177e4 | 1207 | |
1da177e4 | 1208 | if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { |
11d2f63b | 1209 | spin_lock_irq(&hostdata->lock); |
1da177e4 LT |
1210 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
1211 | NCR5380_reselect(instance); | |
cd400825 FT |
1212 | if (!hostdata->connected) |
1213 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
6a6ff4ac | 1214 | shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); |
707d62b3 | 1215 | goto out; |
1da177e4 | 1216 | } |
ae753a33 FT |
1217 | |
1218 | if (err < 0) { | |
11d2f63b | 1219 | spin_lock_irq(&hostdata->lock); |
ae753a33 | 1220 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
ae753a33 | 1221 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
707d62b3 FT |
1222 | /* Can't touch cmd if it has been reclaimed by the scsi ML */ |
1223 | if (hostdata->selecting) { | |
1224 | cmd->result = DID_BAD_TARGET << 16; | |
1225 | complete_cmd(instance, cmd); | |
1226 | dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n"); | |
1227 | cmd = NULL; | |
1228 | } | |
1229 | goto out; | |
ae753a33 FT |
1230 | } |
1231 | ||
aff0cf9a FT |
1232 | /* |
1233 | * No less than two deskew delays after the initiator detects the | |
1234 | * BSY signal is true, it shall release the SEL signal and may | |
1da177e4 LT |
1235 | * change the DATA BUS. -wingel |
1236 | */ | |
1237 | ||
1238 | udelay(1); | |
1239 | ||
1240 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1241 | ||
1da177e4 | 1242 | /* |
aff0cf9a | 1243 | * Since we followed the SCSI spec, and raised ATN while SEL |
1da177e4 LT |
1244 | * was true but before BSY was false during selection, the information |
1245 | * transfer phase should be a MESSAGE OUT phase so that we can send the | |
1246 | * IDENTIFY message. | |
1da177e4 LT |
1247 | */ |
1248 | ||
1249 | /* Wait for start of REQ/ACK handshake */ | |
1250 | ||
d5d37a0a | 1251 | err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 1252 | spin_lock_irq(&hostdata->lock); |
1cc160e1 | 1253 | if (err < 0) { |
55500d9b FT |
1254 | shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); |
1255 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1da177e4 | 1256 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
707d62b3 FT |
1257 | goto out; |
1258 | } | |
1259 | if (!hostdata->selecting) { | |
1260 | do_abort(instance); | |
1261 | goto out; | |
1da177e4 LT |
1262 | } |
1263 | ||
b746545f FT |
1264 | dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", |
1265 | scmd_id(cmd)); | |
22f5f10d | 1266 | tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun); |
1da177e4 LT |
1267 | |
1268 | len = 1; | |
1da177e4 LT |
1269 | data = tmp; |
1270 | phase = PHASE_MSGOUT; | |
1271 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f | 1272 | dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); |
1da177e4 | 1273 | /* XXX need to handle errors here */ |
11d2f63b | 1274 | |
1da177e4 | 1275 | hostdata->connected = cmd; |
3d07d22b | 1276 | hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; |
1da177e4 | 1277 | |
e9db3198 FT |
1278 | #ifdef SUN3_SCSI_VME |
1279 | dregs->csr |= CSR_INTR; | |
1280 | #endif | |
1281 | ||
28424d3a | 1282 | initialize_SCp(cmd); |
1da177e4 | 1283 | |
707d62b3 FT |
1284 | cmd = NULL; |
1285 | ||
1286 | out: | |
1287 | if (!hostdata->selecting) | |
1288 | return NULL; | |
1289 | hostdata->selecting = NULL; | |
1290 | return cmd; | |
1da177e4 LT |
1291 | } |
1292 | ||
aff0cf9a FT |
1293 | /* |
1294 | * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, | |
594d4ba3 | 1295 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1296 | * |
1297 | * Purpose : transfers data in given phase using polled I/O | |
1298 | * | |
aff0cf9a | 1299 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1300 | * what phase is expected, *count - pointer to number of |
1301 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1302 | * |
1da177e4 | 1303 | * Returns : -1 when different phase is entered without transferring |
0d2cf867 | 1304 | * maximum number of bytes, 0 if all bytes are transferred or exit |
594d4ba3 | 1305 | * is in same phase. |
1da177e4 | 1306 | * |
594d4ba3 | 1307 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1308 | * |
1309 | * XXX Note : handling for bus free may be useful. | |
1310 | */ | |
1311 | ||
1312 | /* | |
aff0cf9a | 1313 | * Note : this code is not as quick as it could be, however it |
1da177e4 LT |
1314 | * IS 100% reliable, and for the actual data transfer where speed |
1315 | * counts, we will always do a pseudo DMA or DMA transfer. | |
1316 | */ | |
1317 | ||
0d2cf867 FT |
1318 | static int NCR5380_transfer_pio(struct Scsi_Host *instance, |
1319 | unsigned char *phase, int *count, | |
1320 | unsigned char **data) | |
1321 | { | |
61e1ce58 | 1322 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1323 | unsigned char p = *phase, tmp; |
1324 | int c = *count; | |
1325 | unsigned char *d = *data; | |
1da177e4 | 1326 | |
aff0cf9a FT |
1327 | /* |
1328 | * The NCR5380 chip will only drive the SCSI bus when the | |
1da177e4 LT |
1329 | * phase specified in the appropriate bits of the TARGET COMMAND |
1330 | * REGISTER match the STATUS REGISTER | |
1331 | */ | |
1332 | ||
0d2cf867 | 1333 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1da177e4 | 1334 | |
1da177e4 | 1335 | do { |
aff0cf9a FT |
1336 | /* |
1337 | * Wait for assertion of REQ, after which the phase bits will be | |
1338 | * valid | |
1da177e4 LT |
1339 | */ |
1340 | ||
d5d37a0a | 1341 | if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) |
1da177e4 | 1342 | break; |
1da177e4 | 1343 | |
b746545f | 1344 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); |
1da177e4 LT |
1345 | |
1346 | /* Check for phase mismatch */ | |
686f3990 | 1347 | if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { |
b746545f FT |
1348 | dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); |
1349 | NCR5380_dprint_phase(NDEBUG_PIO, instance); | |
1da177e4 LT |
1350 | break; |
1351 | } | |
0d2cf867 | 1352 | |
1da177e4 LT |
1353 | /* Do actual transfer from SCSI bus to / from memory */ |
1354 | if (!(p & SR_IO)) | |
1355 | NCR5380_write(OUTPUT_DATA_REG, *d); | |
1356 | else | |
1357 | *d = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
1358 | ||
1359 | ++d; | |
1360 | ||
aff0cf9a | 1361 | /* |
1da177e4 LT |
1362 | * The SCSI standard suggests that in MSGOUT phase, the initiator |
1363 | * should drop ATN on the last byte of the message phase | |
1364 | * after REQ has been asserted for the handshake but before | |
1365 | * the initiator raises ACK. | |
1366 | */ | |
1367 | ||
1368 | if (!(p & SR_IO)) { | |
1369 | if (!((p & SR_MSG) && c > 1)) { | |
1370 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); | |
1371 | NCR5380_dprint(NDEBUG_PIO, instance); | |
3d07d22b FT |
1372 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1373 | ICR_ASSERT_DATA | ICR_ASSERT_ACK); | |
1da177e4 | 1374 | } else { |
3d07d22b FT |
1375 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1376 | ICR_ASSERT_DATA | ICR_ASSERT_ATN); | |
1da177e4 | 1377 | NCR5380_dprint(NDEBUG_PIO, instance); |
3d07d22b FT |
1378 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1379 | ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
1da177e4 LT |
1380 | } |
1381 | } else { | |
1382 | NCR5380_dprint(NDEBUG_PIO, instance); | |
1383 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
1384 | } | |
1385 | ||
d5d37a0a | 1386 | if (NCR5380_poll_politely(hostdata, |
a2edc4a6 FT |
1387 | STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) |
1388 | break; | |
1389 | ||
b746545f | 1390 | dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); |
1da177e4 LT |
1391 | |
1392 | /* | |
aff0cf9a FT |
1393 | * We have several special cases to consider during REQ/ACK handshaking : |
1394 | * 1. We were in MSGOUT phase, and we are on the last byte of the | |
594d4ba3 | 1395 | * message. ATN must be dropped as ACK is dropped. |
1da177e4 | 1396 | * |
aff0cf9a | 1397 | * 2. We are in a MSGIN phase, and we are on the last byte of the |
594d4ba3 FT |
1398 | * message. We must exit with ACK asserted, so that the calling |
1399 | * code may raise ATN before dropping ACK to reject the message. | |
1da177e4 LT |
1400 | * |
1401 | * 3. ACK and ATN are clear and the target may proceed as normal. | |
1402 | */ | |
1403 | if (!(p == PHASE_MSGIN && c == 1)) { | |
1404 | if (p == PHASE_MSGOUT && c > 1) | |
1405 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1406 | else | |
1407 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1408 | } | |
1409 | } while (--c); | |
1410 | ||
b746545f | 1411 | dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); |
1da177e4 LT |
1412 | |
1413 | *count = c; | |
1414 | *data = d; | |
1415 | tmp = NCR5380_read(STATUS_REG); | |
a2edc4a6 FT |
1416 | /* The phase read from the bus is valid if either REQ is (already) |
1417 | * asserted or if ACK hasn't been released yet. The latter applies if | |
1418 | * we're in MSG IN, DATA IN or STATUS and all bytes have been received. | |
1419 | */ | |
1420 | if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) | |
1da177e4 LT |
1421 | *phase = tmp & PHASE_MASK; |
1422 | else | |
1423 | *phase = PHASE_UNKNOWN; | |
1424 | ||
1425 | if (!c || (*phase == p)) | |
1426 | return 0; | |
1427 | else | |
1428 | return -1; | |
1429 | } | |
1430 | ||
1431 | /** | |
636b1ec8 FT |
1432 | * do_reset - issue a reset command |
1433 | * @instance: adapter to reset | |
1da177e4 | 1434 | * |
636b1ec8 FT |
1435 | * Issue a reset sequence to the NCR5380 and try and get the bus |
1436 | * back into sane shape. | |
1da177e4 | 1437 | * |
636b1ec8 FT |
1438 | * This clears the reset interrupt flag because there may be no handler for |
1439 | * it. When the driver is initialized, the NCR5380_intr() handler has not yet | |
1440 | * been installed. And when in EH we may have released the ST DMA interrupt. | |
1da177e4 | 1441 | */ |
aff0cf9a | 1442 | |
54d8fe44 FT |
1443 | static void do_reset(struct Scsi_Host *instance) |
1444 | { | |
61e1ce58 | 1445 | struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance); |
636b1ec8 FT |
1446 | unsigned long flags; |
1447 | ||
1448 | local_irq_save(flags); | |
1449 | NCR5380_write(TARGET_COMMAND_REG, | |
1450 | PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); | |
1da177e4 | 1451 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); |
636b1ec8 | 1452 | udelay(50); |
1da177e4 | 1453 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
636b1ec8 FT |
1454 | (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); |
1455 | local_irq_restore(flags); | |
1da177e4 LT |
1456 | } |
1457 | ||
80d3eb6d FT |
1458 | /** |
1459 | * do_abort - abort the currently established nexus by going to | |
1460 | * MESSAGE OUT phase and sending an ABORT message. | |
1461 | * @instance: relevant scsi host instance | |
1da177e4 | 1462 | * |
80d3eb6d | 1463 | * Returns 0 on success, -1 on failure. |
1da177e4 LT |
1464 | */ |
1465 | ||
54d8fe44 FT |
1466 | static int do_abort(struct Scsi_Host *instance) |
1467 | { | |
61e1ce58 | 1468 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1469 | unsigned char *msgptr, phase, tmp; |
1470 | int len; | |
1471 | int rc; | |
1da177e4 LT |
1472 | |
1473 | /* Request message out phase */ | |
1474 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1475 | ||
aff0cf9a FT |
1476 | /* |
1477 | * Wait for the target to indicate a valid phase by asserting | |
1478 | * REQ. Once this happens, we'll have either a MSGOUT phase | |
1479 | * and can immediately send the ABORT message, or we'll have some | |
1da177e4 | 1480 | * other phase and will have to source/sink data. |
aff0cf9a | 1481 | * |
1da177e4 LT |
1482 | * We really don't care what value was on the bus or what value |
1483 | * the target sees, so we just handshake. | |
1484 | */ | |
1485 | ||
d5d37a0a | 1486 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); |
1cc160e1 | 1487 | if (rc < 0) |
80d3eb6d | 1488 | goto timeout; |
1da177e4 | 1489 | |
f35d3474 | 1490 | tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; |
aff0cf9a | 1491 | |
1da177e4 LT |
1492 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); |
1493 | ||
f35d3474 | 1494 | if (tmp != PHASE_MSGOUT) { |
0d2cf867 FT |
1495 | NCR5380_write(INITIATOR_COMMAND_REG, |
1496 | ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); | |
d5d37a0a | 1497 | rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ); |
1cc160e1 | 1498 | if (rc < 0) |
80d3eb6d FT |
1499 | goto timeout; |
1500 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
1da177e4 | 1501 | } |
0d2cf867 | 1502 | |
1da177e4 LT |
1503 | tmp = ABORT; |
1504 | msgptr = &tmp; | |
1505 | len = 1; | |
1506 | phase = PHASE_MSGOUT; | |
54d8fe44 | 1507 | NCR5380_transfer_pio(instance, &phase, &len, &msgptr); |
1da177e4 LT |
1508 | |
1509 | /* | |
1510 | * If we got here, and the command completed successfully, | |
1511 | * we're about to go into bus free state. | |
1512 | */ | |
1513 | ||
1514 | return len ? -1 : 0; | |
80d3eb6d FT |
1515 | |
1516 | timeout: | |
1517 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1518 | return -1; | |
1da177e4 LT |
1519 | } |
1520 | ||
aff0cf9a FT |
1521 | /* |
1522 | * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, | |
594d4ba3 | 1523 | * unsigned char *phase, int *count, unsigned char **data) |
1da177e4 LT |
1524 | * |
1525 | * Purpose : transfers data in given phase using either real | |
594d4ba3 | 1526 | * or pseudo DMA. |
1da177e4 | 1527 | * |
aff0cf9a | 1528 | * Inputs : instance - instance of driver, *phase - pointer to |
594d4ba3 FT |
1529 | * what phase is expected, *count - pointer to number of |
1530 | * bytes to transfer, **data - pointer to data pointer. | |
aff0cf9a | 1531 | * |
1da177e4 | 1532 | * Returns : -1 when different phase is entered without transferring |
594d4ba3 FT |
1533 | * maximum number of bytes, 0 if all bytes or transferred or exit |
1534 | * is in same phase. | |
1da177e4 | 1535 | * |
594d4ba3 | 1536 | * Also, *phase, *count, *data are modified in place. |
1da177e4 LT |
1537 | */ |
1538 | ||
1539 | ||
0d2cf867 FT |
1540 | static int NCR5380_transfer_dma(struct Scsi_Host *instance, |
1541 | unsigned char *phase, int *count, | |
1542 | unsigned char **data) | |
1543 | { | |
1544 | struct NCR5380_hostdata *hostdata = shost_priv(instance); | |
f0ea73a4 FT |
1545 | int c = *count; |
1546 | unsigned char p = *phase; | |
1547 | unsigned char *d = *data; | |
1da177e4 | 1548 | unsigned char tmp; |
8053b0ee | 1549 | int result = 0; |
1da177e4 | 1550 | |
1da177e4 LT |
1551 | if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { |
1552 | *phase = tmp; | |
1553 | return -1; | |
1554 | } | |
1da177e4 | 1555 | |
8053b0ee | 1556 | hostdata->connected->SCp.phase = p; |
1da177e4 | 1557 | |
8053b0ee FT |
1558 | if (p & SR_IO) { |
1559 | if (hostdata->read_overruns) | |
1560 | c -= hostdata->read_overruns; | |
1561 | else if (hostdata->flags & FLAG_DMA_FIXUP) | |
1562 | --c; | |
1563 | } | |
1da177e4 | 1564 | |
8053b0ee FT |
1565 | dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", |
1566 | (p & SR_IO) ? "receive" : "send", c, d); | |
1da177e4 | 1567 | |
e9db3198 FT |
1568 | #ifdef CONFIG_SUN3 |
1569 | /* send start chain */ | |
1570 | sun3scsi_dma_start(c, *data); | |
1571 | #endif | |
1572 | ||
8053b0ee FT |
1573 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); |
1574 | NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | | |
1575 | MR_ENABLE_EOP_INTR); | |
1576 | ||
1577 | if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { | |
1578 | /* On the Medusa, it is a must to initialize the DMA before | |
1579 | * starting the NCR. This is also the cleaner way for the TT. | |
1580 | */ | |
1581 | if (p & SR_IO) | |
4a98f896 | 1582 | result = NCR5380_dma_recv_setup(hostdata, d, c); |
8053b0ee | 1583 | else |
4a98f896 | 1584 | result = NCR5380_dma_send_setup(hostdata, d, c); |
8053b0ee | 1585 | } |
1da177e4 | 1586 | |
aff0cf9a | 1587 | /* |
594d4ba3 FT |
1588 | * On the PAS16 at least I/O recovery delays are not needed here. |
1589 | * Everyone else seems to want them. | |
1da177e4 LT |
1590 | */ |
1591 | ||
1592 | if (p & SR_IO) { | |
e9db3198 | 1593 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
e5d55d1a | 1594 | NCR5380_io_delay(1); |
1da177e4 LT |
1595 | NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); |
1596 | } else { | |
e5d55d1a | 1597 | NCR5380_io_delay(1); |
1da177e4 | 1598 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); |
e5d55d1a | 1599 | NCR5380_io_delay(1); |
1da177e4 | 1600 | NCR5380_write(START_DMA_SEND_REG, 0); |
e5d55d1a | 1601 | NCR5380_io_delay(1); |
1da177e4 LT |
1602 | } |
1603 | ||
e9db3198 FT |
1604 | #ifdef CONFIG_SUN3 |
1605 | #ifdef SUN3_SCSI_VME | |
1606 | dregs->csr |= CSR_DMA_ENABLE; | |
1607 | #endif | |
1608 | sun3_dma_active = 1; | |
1609 | #endif | |
1610 | ||
8053b0ee FT |
1611 | if (hostdata->flags & FLAG_LATE_DMA_SETUP) { |
1612 | /* On the Falcon, the DMA setup must be done after the last | |
1613 | * NCR access, else the DMA setup gets trashed! | |
1614 | */ | |
1615 | if (p & SR_IO) | |
4a98f896 | 1616 | result = NCR5380_dma_recv_setup(hostdata, d, c); |
8053b0ee | 1617 | else |
4a98f896 | 1618 | result = NCR5380_dma_send_setup(hostdata, d, c); |
8053b0ee FT |
1619 | } |
1620 | ||
1621 | /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ | |
1622 | if (result < 0) | |
1623 | return result; | |
1624 | ||
1625 | /* For real DMA, result is the byte count. DMA interrupt is expected. */ | |
1626 | if (result > 0) { | |
1627 | hostdata->dma_len = result; | |
1628 | return 0; | |
1629 | } | |
1630 | ||
1631 | /* The result is zero iff pseudo DMA send/receive was completed. */ | |
1632 | hostdata->dma_len = c; | |
1633 | ||
1da177e4 | 1634 | /* |
e4dec680 | 1635 | * A note regarding the DMA errata workarounds for early NMOS silicon. |
c16df32e FT |
1636 | * |
1637 | * For DMA sends, we want to wait until the last byte has been | |
1638 | * transferred out over the bus before we turn off DMA mode. Alas, there | |
1639 | * seems to be no terribly good way of doing this on a 5380 under all | |
1640 | * conditions. For non-scatter-gather operations, we can wait until REQ | |
1641 | * and ACK both go false, or until a phase mismatch occurs. Gather-sends | |
1642 | * are nastier, since the device will be expecting more data than we | |
1643 | * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we | |
1644 | * could test Last Byte Sent to assure transfer (I imagine this is precisely | |
1645 | * why this signal was added to the newer chips) but on the older 538[01] | |
1646 | * this signal does not exist. The workaround for this lack is a watchdog; | |
1647 | * we bail out of the wait-loop after a modest amount of wait-time if | |
1648 | * the usual exit conditions are not met. Not a terribly clean or | |
1649 | * correct solution :-% | |
1650 | * | |
1651 | * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. | |
1652 | * If the chip is in DMA receive mode, it will respond to a target's | |
1653 | * REQ by latching the SCSI data into the INPUT DATA register and asserting | |
1654 | * ACK, even if it has _already_ been notified by the DMA controller that | |
1655 | * the current DMA transfer has completed! If the NCR5380 is then taken | |
1656 | * out of DMA mode, this already-acknowledged byte is lost. This is | |
1657 | * not a problem for "one DMA transfer per READ command", because | |
1658 | * the situation will never arise... either all of the data is DMA'ed | |
1659 | * properly, or the target switches to MESSAGE IN phase to signal a | |
1660 | * disconnection (either operation bringing the DMA to a clean halt). | |
1661 | * However, in order to handle scatter-receive, we must work around the | |
e4dec680 | 1662 | * problem. The chosen fix is to DMA fewer bytes, then check for the |
c16df32e FT |
1663 | * condition before taking the NCR5380 out of DMA mode. One or two extra |
1664 | * bytes are transferred via PIO as necessary to fill out the original | |
1665 | * request. | |
1da177e4 LT |
1666 | */ |
1667 | ||
8053b0ee FT |
1668 | if (hostdata->flags & FLAG_DMA_FIXUP) { |
1669 | if (p & SR_IO) { | |
1da177e4 | 1670 | /* |
e4dec680 | 1671 | * The workaround was to transfer fewer bytes than we |
aff0cf9a | 1672 | * intended to with the pseudo-DMA read function, wait for |
1da177e4 LT |
1673 | * the chip to latch the last byte, read it, and then disable |
1674 | * pseudo-DMA mode. | |
aff0cf9a | 1675 | * |
1da177e4 LT |
1676 | * After REQ is asserted, the NCR5380 asserts DRQ and ACK. |
1677 | * REQ is deasserted when ACK is asserted, and not reasserted | |
1678 | * until ACK goes false. Since the NCR5380 won't lower ACK | |
1679 | * until DACK is asserted, which won't happen unless we twiddle | |
aff0cf9a FT |
1680 | * the DMA port or we take the NCR5380 out of DMA mode, we |
1681 | * can guarantee that we won't handshake another extra | |
1da177e4 LT |
1682 | * byte. |
1683 | */ | |
1684 | ||
d5d37a0a | 1685 | if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, |
55181be8 | 1686 | BASR_DRQ, BASR_DRQ, HZ) < 0) { |
438af51c | 1687 | result = -1; |
55181be8 FT |
1688 | shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); |
1689 | } | |
d5d37a0a | 1690 | if (NCR5380_poll_politely(hostdata, STATUS_REG, |
55181be8 | 1691 | SR_REQ, 0, HZ) < 0) { |
438af51c | 1692 | result = -1; |
55181be8 | 1693 | shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); |
1da177e4 | 1694 | } |
8053b0ee FT |
1695 | d[*count - 1] = NCR5380_read(INPUT_DATA_REG); |
1696 | } else { | |
1da177e4 | 1697 | /* |
aff0cf9a FT |
1698 | * Wait for the last byte to be sent. If REQ is being asserted for |
1699 | * the byte we're interested, we'll ACK it and it will go false. | |
1da177e4 | 1700 | */ |
d5d37a0a | 1701 | if (NCR5380_poll_politely2(hostdata, |
55181be8 FT |
1702 | BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, |
1703 | BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { | |
438af51c | 1704 | result = -1; |
55181be8 | 1705 | shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); |
1da177e4 LT |
1706 | } |
1707 | } | |
1da177e4 | 1708 | } |
8053b0ee FT |
1709 | |
1710 | NCR5380_dma_complete(instance); | |
438af51c | 1711 | return result; |
1da177e4 | 1712 | } |
1da177e4 LT |
1713 | |
1714 | /* | |
1715 | * Function : NCR5380_information_transfer (struct Scsi_Host *instance) | |
1716 | * | |
aff0cf9a | 1717 | * Purpose : run through the various SCSI phases and do as the target |
594d4ba3 FT |
1718 | * directs us to. Operates on the currently connected command, |
1719 | * instance->connected. | |
1da177e4 LT |
1720 | * |
1721 | * Inputs : instance, instance for which we are doing commands | |
1722 | * | |
aff0cf9a | 1723 | * Side effects : SCSI things happen, the disconnected queue will be |
594d4ba3 FT |
1724 | * modified if a command disconnects, *instance->connected will |
1725 | * change. | |
1da177e4 | 1726 | * |
aff0cf9a | 1727 | * XXX Note : we need to watch for bus free or a reset condition here |
594d4ba3 | 1728 | * to recover from an unexpected bus free condition. |
1da177e4 LT |
1729 | */ |
1730 | ||
0d2cf867 FT |
1731 | static void NCR5380_information_transfer(struct Scsi_Host *instance) |
1732 | { | |
e8a60144 | 1733 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 LT |
1734 | unsigned char msgout = NOP; |
1735 | int sink = 0; | |
1736 | int len; | |
1da177e4 | 1737 | int transfersize; |
1da177e4 LT |
1738 | unsigned char *data; |
1739 | unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; | |
11d2f63b | 1740 | struct scsi_cmnd *cmd; |
1da177e4 | 1741 | |
e9db3198 FT |
1742 | #ifdef SUN3_SCSI_VME |
1743 | dregs->csr |= CSR_INTR; | |
1744 | #endif | |
1745 | ||
11d2f63b | 1746 | while ((cmd = hostdata->connected)) { |
32b26a10 FT |
1747 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); |
1748 | ||
1da177e4 LT |
1749 | tmp = NCR5380_read(STATUS_REG); |
1750 | /* We only have a valid SCSI phase when REQ is asserted */ | |
1751 | if (tmp & SR_REQ) { | |
1752 | phase = (tmp & PHASE_MASK); | |
1753 | if (phase != old_phase) { | |
1754 | old_phase = phase; | |
1755 | NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); | |
1756 | } | |
e9db3198 | 1757 | #ifdef CONFIG_SUN3 |
4a98f896 FT |
1758 | if (phase == PHASE_CMDOUT && |
1759 | sun3_dma_setup_done != cmd) { | |
1760 | int count; | |
e9db3198 FT |
1761 | |
1762 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
4a98f896 FT |
1763 | ++cmd->SCp.buffer; |
1764 | --cmd->SCp.buffers_residual; | |
1765 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
1766 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); | |
e9db3198 FT |
1767 | } |
1768 | ||
4a98f896 FT |
1769 | count = sun3scsi_dma_xfer_len(hostdata, cmd); |
1770 | ||
1771 | if (count > 0) { | |
1772 | if (rq_data_dir(cmd->request)) | |
1773 | sun3scsi_dma_send_setup(hostdata, | |
1774 | cmd->SCp.ptr, count); | |
1775 | else | |
1776 | sun3scsi_dma_recv_setup(hostdata, | |
1777 | cmd->SCp.ptr, count); | |
e9db3198 FT |
1778 | sun3_dma_setup_done = cmd; |
1779 | } | |
1780 | #ifdef SUN3_SCSI_VME | |
1781 | dregs->csr |= CSR_INTR; | |
1782 | #endif | |
1783 | } | |
1784 | #endif /* CONFIG_SUN3 */ | |
1785 | ||
1da177e4 LT |
1786 | if (sink && (phase != PHASE_MSGOUT)) { |
1787 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); | |
1788 | ||
3d07d22b FT |
1789 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | |
1790 | ICR_ASSERT_ACK); | |
0d2cf867 FT |
1791 | while (NCR5380_read(STATUS_REG) & SR_REQ) |
1792 | ; | |
3d07d22b FT |
1793 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | |
1794 | ICR_ASSERT_ATN); | |
1da177e4 LT |
1795 | sink = 0; |
1796 | continue; | |
1797 | } | |
0d2cf867 | 1798 | |
1da177e4 | 1799 | switch (phase) { |
1da177e4 LT |
1800 | case PHASE_DATAOUT: |
1801 | #if (NDEBUG & NDEBUG_NO_DATAOUT) | |
6a6ff4ac | 1802 | shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); |
1da177e4 LT |
1803 | sink = 1; |
1804 | do_abort(instance); | |
1805 | cmd->result = DID_ERROR << 16; | |
677e0194 | 1806 | complete_cmd(instance, cmd); |
dc183965 | 1807 | hostdata->connected = NULL; |
1da177e4 LT |
1808 | return; |
1809 | #endif | |
bf1a0c6f | 1810 | case PHASE_DATAIN: |
aff0cf9a | 1811 | /* |
1da177e4 LT |
1812 | * If there is no room left in the current buffer in the |
1813 | * scatter-gather list, move onto the next one. | |
1814 | */ | |
1815 | ||
1816 | if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { | |
1817 | ++cmd->SCp.buffer; | |
1818 | --cmd->SCp.buffers_residual; | |
1819 | cmd->SCp.this_residual = cmd->SCp.buffer->length; | |
45711f1a | 1820 | cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); |
b746545f FT |
1821 | dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n", |
1822 | cmd->SCp.this_residual, | |
1823 | cmd->SCp.buffers_residual); | |
1da177e4 | 1824 | } |
0d2cf867 | 1825 | |
1da177e4 | 1826 | /* |
aff0cf9a | 1827 | * The preferred transfer method is going to be |
1da177e4 LT |
1828 | * PSEUDO-DMA for systems that are strictly PIO, |
1829 | * since we can let the hardware do the handshaking. | |
1830 | * | |
1831 | * For this to work, we need to know the transfersize | |
1832 | * ahead of time, since the pseudo-DMA code will sit | |
1833 | * in an unconditional loop. | |
1834 | */ | |
1835 | ||
ff3d4578 | 1836 | transfersize = 0; |
7e9ec8d9 | 1837 | if (!cmd->device->borken) |
4a98f896 | 1838 | transfersize = NCR5380_dma_xfer_len(hostdata, cmd); |
ff3d4578 | 1839 | |
438af51c | 1840 | if (transfersize > 0) { |
1da177e4 | 1841 | len = transfersize; |
0d2cf867 FT |
1842 | if (NCR5380_transfer_dma(instance, &phase, |
1843 | &len, (unsigned char **)&cmd->SCp.ptr)) { | |
1da177e4 | 1844 | /* |
0d2cf867 FT |
1845 | * If the watchdog timer fires, all future |
1846 | * accesses to this device will use the | |
1847 | * polled-IO. | |
1da177e4 | 1848 | */ |
017560fc | 1849 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 | 1850 | "switching to slow handshake\n"); |
1da177e4 | 1851 | cmd->device->borken = 1; |
1da177e4 LT |
1852 | sink = 1; |
1853 | do_abort(instance); | |
1854 | cmd->result = DID_ERROR << 16; | |
1da177e4 | 1855 | /* XXX - need to source or sink data here, as appropriate */ |
8053b0ee | 1856 | } |
f825e40b | 1857 | } else { |
08348b1c FT |
1858 | /* Transfer a small chunk so that the |
1859 | * irq mode lock is not held too long. | |
1678847e | 1860 | */ |
08348b1c FT |
1861 | transfersize = min(cmd->SCp.this_residual, |
1862 | NCR5380_PIO_CHUNK_SIZE); | |
1678847e FT |
1863 | len = transfersize; |
1864 | NCR5380_transfer_pio(instance, &phase, &len, | |
3d07d22b | 1865 | (unsigned char **)&cmd->SCp.ptr); |
1678847e | 1866 | cmd->SCp.this_residual -= transfersize - len; |
11d2f63b | 1867 | } |
e9db3198 FT |
1868 | #ifdef CONFIG_SUN3 |
1869 | if (sun3_dma_setup_done == cmd) | |
1870 | sun3_dma_setup_done = NULL; | |
1871 | #endif | |
1678847e | 1872 | return; |
1da177e4 LT |
1873 | case PHASE_MSGIN: |
1874 | len = 1; | |
1875 | data = &tmp; | |
1876 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1877 | cmd->SCp.Message = tmp; | |
1878 | ||
1879 | switch (tmp) { | |
1da177e4 LT |
1880 | case ABORT: |
1881 | case COMMAND_COMPLETE: | |
1882 | /* Accept message by clearing ACK */ | |
1883 | sink = 1; | |
1884 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
0d3d9a42 FT |
1885 | dsprintk(NDEBUG_QUEUES, instance, |
1886 | "COMMAND COMPLETE %p target %d lun %llu\n", | |
1887 | cmd, scmd_id(cmd), cmd->device->lun); | |
1888 | ||
1da177e4 | 1889 | hostdata->connected = NULL; |
1da177e4 | 1890 | |
f27db8eb FT |
1891 | cmd->result &= ~0xffff; |
1892 | cmd->result |= cmd->SCp.Status; | |
1893 | cmd->result |= cmd->SCp.Message << 8; | |
28424d3a | 1894 | |
f27db8eb | 1895 | if (cmd->cmnd[0] == REQUEST_SENSE) |
677e0194 | 1896 | complete_cmd(instance, cmd); |
f27db8eb FT |
1897 | else { |
1898 | if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || | |
1899 | cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { | |
1900 | dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", | |
1901 | cmd); | |
1902 | list_add_tail(&ncmd->list, | |
1903 | &hostdata->autosense); | |
1904 | } else | |
1905 | complete_cmd(instance, cmd); | |
1da177e4 LT |
1906 | } |
1907 | ||
aff0cf9a FT |
1908 | /* |
1909 | * Restore phase bits to 0 so an interrupted selection, | |
1da177e4 LT |
1910 | * arbitration can resume. |
1911 | */ | |
1912 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
72064a78 FT |
1913 | |
1914 | /* Enable reselect interrupts */ | |
1915 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
52d3e561 FT |
1916 | |
1917 | maybe_release_dma_irq(instance); | |
1da177e4 LT |
1918 | return; |
1919 | case MESSAGE_REJECT: | |
1920 | /* Accept message by clearing ACK */ | |
1921 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1922 | switch (hostdata->last_message) { | |
1923 | case HEAD_OF_QUEUE_TAG: | |
1924 | case ORDERED_QUEUE_TAG: | |
1925 | case SIMPLE_QUEUE_TAG: | |
1926 | cmd->device->simple_tags = 0; | |
9cb78c16 | 1927 | hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); |
1da177e4 LT |
1928 | break; |
1929 | default: | |
1930 | break; | |
1931 | } | |
340b9612 | 1932 | break; |
0d2cf867 FT |
1933 | case DISCONNECT: |
1934 | /* Accept message by clearing ACK */ | |
1935 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1936 | hostdata->connected = NULL; | |
1937 | list_add(&ncmd->list, &hostdata->disconnected); | |
1938 | dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, | |
1939 | instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", | |
1940 | cmd, scmd_id(cmd), cmd->device->lun); | |
0d3d9a42 | 1941 | |
0d2cf867 FT |
1942 | /* |
1943 | * Restore phase bits to 0 so an interrupted selection, | |
1944 | * arbitration can resume. | |
1945 | */ | |
1946 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
1da177e4 | 1947 | |
0d2cf867 FT |
1948 | /* Enable reselect interrupts */ |
1949 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); | |
e9db3198 FT |
1950 | #ifdef SUN3_SCSI_VME |
1951 | dregs->csr |= CSR_DMA_ENABLE; | |
1952 | #endif | |
0d2cf867 | 1953 | return; |
aff0cf9a | 1954 | /* |
1da177e4 | 1955 | * The SCSI data pointer is *IMPLICITLY* saved on a disconnect |
aff0cf9a | 1956 | * operation, in violation of the SCSI spec so we can safely |
1da177e4 LT |
1957 | * ignore SAVE/RESTORE pointers calls. |
1958 | * | |
aff0cf9a | 1959 | * Unfortunately, some disks violate the SCSI spec and |
1da177e4 | 1960 | * don't issue the required SAVE_POINTERS message before |
aff0cf9a | 1961 | * disconnecting, and we have to break spec to remain |
1da177e4 LT |
1962 | * compatible. |
1963 | */ | |
1964 | case SAVE_POINTERS: | |
1965 | case RESTORE_POINTERS: | |
1966 | /* Accept message by clearing ACK */ | |
1967 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1968 | break; | |
1969 | case EXTENDED_MESSAGE: | |
c16df32e FT |
1970 | /* |
1971 | * Start the message buffer with the EXTENDED_MESSAGE | |
1972 | * byte, since spi_print_msg() wants the whole thing. | |
1973 | */ | |
1da177e4 LT |
1974 | extended_msg[0] = EXTENDED_MESSAGE; |
1975 | /* Accept first byte by clearing ACK */ | |
1976 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
11d2f63b FT |
1977 | |
1978 | spin_unlock_irq(&hostdata->lock); | |
1979 | ||
b746545f | 1980 | dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); |
1da177e4 LT |
1981 | |
1982 | len = 2; | |
1983 | data = extended_msg + 1; | |
1984 | phase = PHASE_MSGIN; | |
1985 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
1986 | dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", |
1987 | (int)extended_msg[1], | |
1988 | (int)extended_msg[2]); | |
1da177e4 | 1989 | |
e0783ed3 FT |
1990 | if (!len && extended_msg[1] > 0 && |
1991 | extended_msg[1] <= sizeof(extended_msg) - 2) { | |
1da177e4 LT |
1992 | /* Accept third byte by clearing ACK */ |
1993 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
1994 | len = extended_msg[1] - 1; | |
1995 | data = extended_msg + 3; | |
1996 | phase = PHASE_MSGIN; | |
1997 | ||
1998 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
b746545f FT |
1999 | dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", |
2000 | len); | |
1da177e4 LT |
2001 | |
2002 | switch (extended_msg[2]) { | |
2003 | case EXTENDED_SDTR: | |
2004 | case EXTENDED_WDTR: | |
2005 | case EXTENDED_MODIFY_DATA_POINTER: | |
2006 | case EXTENDED_EXTENDED_IDENTIFY: | |
2007 | tmp = 0; | |
2008 | } | |
2009 | } else if (len) { | |
6a6ff4ac | 2010 | shost_printk(KERN_ERR, instance, "error receiving extended message\n"); |
1da177e4 LT |
2011 | tmp = 0; |
2012 | } else { | |
6a6ff4ac FT |
2013 | shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", |
2014 | extended_msg[2], extended_msg[1]); | |
1da177e4 LT |
2015 | tmp = 0; |
2016 | } | |
11d2f63b FT |
2017 | |
2018 | spin_lock_irq(&hostdata->lock); | |
2019 | if (!hostdata->connected) | |
2020 | return; | |
2021 | ||
1da177e4 LT |
2022 | /* Fall through to reject message */ |
2023 | ||
aff0cf9a FT |
2024 | /* |
2025 | * If we get something weird that we aren't expecting, | |
1da177e4 LT |
2026 | * reject it. |
2027 | */ | |
2028 | default: | |
2029 | if (!tmp) { | |
6a6ff4ac | 2030 | shost_printk(KERN_ERR, instance, "rejecting message "); |
1abfd370 | 2031 | spi_print_msg(extended_msg); |
1da177e4 LT |
2032 | printk("\n"); |
2033 | } else if (tmp != EXTENDED_MESSAGE) | |
017560fc | 2034 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 FT |
2035 | "rejecting unknown message %02x\n", |
2036 | tmp); | |
1da177e4 | 2037 | else |
017560fc | 2038 | scmd_printk(KERN_INFO, cmd, |
0d2cf867 FT |
2039 | "rejecting unknown extended message code %02x, length %d\n", |
2040 | extended_msg[1], extended_msg[0]); | |
1da177e4 LT |
2041 | |
2042 | msgout = MESSAGE_REJECT; | |
2043 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); | |
2044 | break; | |
0d2cf867 | 2045 | } /* switch (tmp) */ |
1da177e4 LT |
2046 | break; |
2047 | case PHASE_MSGOUT: | |
2048 | len = 1; | |
2049 | data = &msgout; | |
2050 | hostdata->last_message = msgout; | |
2051 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2052 | if (msgout == ABORT) { | |
1da177e4 LT |
2053 | hostdata->connected = NULL; |
2054 | cmd->result = DID_ERROR << 16; | |
677e0194 | 2055 | complete_cmd(instance, cmd); |
52d3e561 | 2056 | maybe_release_dma_irq(instance); |
1da177e4 LT |
2057 | NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); |
2058 | return; | |
2059 | } | |
2060 | msgout = NOP; | |
2061 | break; | |
2062 | case PHASE_CMDOUT: | |
2063 | len = cmd->cmd_len; | |
2064 | data = cmd->cmnd; | |
aff0cf9a FT |
2065 | /* |
2066 | * XXX for performance reasons, on machines with a | |
2067 | * PSEUDO-DMA architecture we should probably | |
2068 | * use the dma transfer function. | |
1da177e4 LT |
2069 | */ |
2070 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
1da177e4 LT |
2071 | break; |
2072 | case PHASE_STATIN: | |
2073 | len = 1; | |
2074 | data = &tmp; | |
2075 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2076 | cmd->SCp.Status = tmp; | |
2077 | break; | |
2078 | default: | |
6a6ff4ac | 2079 | shost_printk(KERN_ERR, instance, "unknown phase\n"); |
4dde8f7d | 2080 | NCR5380_dprint(NDEBUG_ANY, instance); |
0d2cf867 | 2081 | } /* switch(phase) */ |
686f3990 | 2082 | } else { |
11d2f63b | 2083 | spin_unlock_irq(&hostdata->lock); |
d5d37a0a | 2084 | NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); |
11d2f63b | 2085 | spin_lock_irq(&hostdata->lock); |
1da177e4 | 2086 | } |
11d2f63b | 2087 | } |
1da177e4 LT |
2088 | } |
2089 | ||
2090 | /* | |
2091 | * Function : void NCR5380_reselect (struct Scsi_Host *instance) | |
2092 | * | |
aff0cf9a | 2093 | * Purpose : does reselection, initializing the instance->connected |
594d4ba3 FT |
2094 | * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q |
2095 | * nexus has been reestablished, | |
aff0cf9a | 2096 | * |
1da177e4 | 2097 | * Inputs : instance - this instance of the NCR5380. |
1da177e4 LT |
2098 | */ |
2099 | ||
0d2cf867 FT |
2100 | static void NCR5380_reselect(struct Scsi_Host *instance) |
2101 | { | |
e8a60144 | 2102 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
1da177e4 | 2103 | unsigned char target_mask; |
e9db3198 | 2104 | unsigned char lun; |
1da177e4 | 2105 | unsigned char msg[3]; |
32b26a10 FT |
2106 | struct NCR5380_cmd *ncmd; |
2107 | struct scsi_cmnd *tmp; | |
1da177e4 LT |
2108 | |
2109 | /* | |
2110 | * Disable arbitration, etc. since the host adapter obviously | |
2111 | * lost, and tell an interrupted NCR5380_select() to restart. | |
2112 | */ | |
2113 | ||
2114 | NCR5380_write(MODE_REG, MR_BASE); | |
1da177e4 LT |
2115 | |
2116 | target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); | |
b746545f FT |
2117 | |
2118 | dsprintk(NDEBUG_RESELECTION, instance, "reselect\n"); | |
1da177e4 | 2119 | |
aff0cf9a | 2120 | /* |
1da177e4 LT |
2121 | * At this point, we have detected that our SCSI ID is on the bus, |
2122 | * SEL is true and BSY was false for at least one bus settle delay | |
2123 | * (400 ns). | |
2124 | * | |
2125 | * We must assert BSY ourselves, until the target drops the SEL | |
2126 | * signal. | |
2127 | */ | |
2128 | ||
2129 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); | |
d5d37a0a | 2130 | if (NCR5380_poll_politely(hostdata, |
72064a78 FT |
2131 | STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { |
2132 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2133 | return; | |
2134 | } | |
1da177e4 LT |
2135 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); |
2136 | ||
2137 | /* | |
2138 | * Wait for target to go into MSGIN. | |
1da177e4 LT |
2139 | */ |
2140 | ||
d5d37a0a | 2141 | if (NCR5380_poll_politely(hostdata, |
72064a78 FT |
2142 | STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { |
2143 | do_abort(instance); | |
2144 | return; | |
2145 | } | |
1da177e4 | 2146 | |
e9db3198 FT |
2147 | #ifdef CONFIG_SUN3 |
2148 | /* acknowledge toggle to MSGIN */ | |
2149 | NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); | |
1da177e4 | 2150 | |
e9db3198 FT |
2151 | /* peek at the byte without really hitting the bus */ |
2152 | msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); | |
2153 | #else | |
2154 | { | |
2155 | int len = 1; | |
2156 | unsigned char *data = msg; | |
2157 | unsigned char phase = PHASE_MSGIN; | |
2158 | ||
2159 | NCR5380_transfer_pio(instance, &phase, &len, &data); | |
2160 | ||
2161 | if (len) { | |
2162 | do_abort(instance); | |
2163 | return; | |
2164 | } | |
72064a78 | 2165 | } |
e9db3198 | 2166 | #endif /* CONFIG_SUN3 */ |
72064a78 | 2167 | |
1da177e4 | 2168 | if (!(msg[0] & 0x80)) { |
72064a78 | 2169 | shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); |
1abfd370 | 2170 | spi_print_msg(msg); |
72064a78 FT |
2171 | printk("\n"); |
2172 | do_abort(instance); | |
2173 | return; | |
2174 | } | |
2175 | lun = msg[0] & 0x07; | |
1da177e4 | 2176 | |
72064a78 FT |
2177 | /* |
2178 | * We need to add code for SCSI-II to track which devices have | |
2179 | * I_T_L_Q nexuses established, and which have simple I_T_L | |
2180 | * nexuses so we can chose to do additional data transfer. | |
2181 | */ | |
1da177e4 | 2182 | |
72064a78 FT |
2183 | /* |
2184 | * Find the command corresponding to the I_T_L or I_T_L_Q nexus we | |
2185 | * just reestablished, and remove it from the disconnected queue. | |
2186 | */ | |
1da177e4 | 2187 | |
32b26a10 FT |
2188 | tmp = NULL; |
2189 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2190 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2191 | ||
2192 | if (target_mask == (1 << scmd_id(cmd)) && | |
2193 | lun == (u8)cmd->device->lun) { | |
2194 | list_del(&ncmd->list); | |
2195 | tmp = cmd; | |
72064a78 | 2196 | break; |
1da177e4 LT |
2197 | } |
2198 | } | |
0d3d9a42 FT |
2199 | |
2200 | if (tmp) { | |
2201 | dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, | |
2202 | "reselect: removed %p from disconnected queue\n", tmp); | |
2203 | } else { | |
72064a78 FT |
2204 | shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", |
2205 | target_mask, lun); | |
2206 | /* | |
0d2cf867 FT |
2207 | * Since we have an established nexus that we can't do anything |
2208 | * with, we must abort it. | |
72064a78 | 2209 | */ |
1da177e4 | 2210 | do_abort(instance); |
72064a78 | 2211 | return; |
1da177e4 | 2212 | } |
72064a78 | 2213 | |
e9db3198 | 2214 | #ifdef CONFIG_SUN3 |
4a98f896 FT |
2215 | if (sun3_dma_setup_done != tmp) { |
2216 | int count; | |
e9db3198 FT |
2217 | |
2218 | if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) { | |
4a98f896 FT |
2219 | ++tmp->SCp.buffer; |
2220 | --tmp->SCp.buffers_residual; | |
2221 | tmp->SCp.this_residual = tmp->SCp.buffer->length; | |
2222 | tmp->SCp.ptr = sg_virt(tmp->SCp.buffer); | |
e9db3198 FT |
2223 | } |
2224 | ||
4a98f896 FT |
2225 | count = sun3scsi_dma_xfer_len(hostdata, tmp); |
2226 | ||
2227 | if (count > 0) { | |
2228 | if (rq_data_dir(tmp->request)) | |
2229 | sun3scsi_dma_send_setup(hostdata, | |
2230 | tmp->SCp.ptr, count); | |
2231 | else | |
2232 | sun3scsi_dma_recv_setup(hostdata, | |
2233 | tmp->SCp.ptr, count); | |
e9db3198 FT |
2234 | sun3_dma_setup_done = tmp; |
2235 | } | |
2236 | } | |
2237 | ||
2238 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); | |
2239 | #endif /* CONFIG_SUN3 */ | |
2240 | ||
72064a78 FT |
2241 | /* Accept message by clearing ACK */ |
2242 | NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); | |
2243 | ||
2244 | hostdata->connected = tmp; | |
c4ec6f92 FT |
2245 | dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", |
2246 | scmd_id(tmp), tmp->device->lun); | |
1da177e4 LT |
2247 | } |
2248 | ||
8b00c3d5 FT |
2249 | /** |
2250 | * list_find_cmd - test for presence of a command in a linked list | |
2251 | * @haystack: list of commands | |
2252 | * @needle: command to search for | |
2253 | */ | |
2254 | ||
2255 | static bool list_find_cmd(struct list_head *haystack, | |
2256 | struct scsi_cmnd *needle) | |
2257 | { | |
2258 | struct NCR5380_cmd *ncmd; | |
2259 | ||
2260 | list_for_each_entry(ncmd, haystack, list) | |
2261 | if (NCR5380_to_scmd(ncmd) == needle) | |
2262 | return true; | |
2263 | return false; | |
2264 | } | |
2265 | ||
2266 | /** | |
2267 | * list_remove_cmd - remove a command from linked list | |
2268 | * @haystack: list of commands | |
2269 | * @needle: command to remove | |
2270 | */ | |
2271 | ||
2272 | static bool list_del_cmd(struct list_head *haystack, | |
2273 | struct scsi_cmnd *needle) | |
2274 | { | |
2275 | if (list_find_cmd(haystack, needle)) { | |
2276 | struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); | |
2277 | ||
2278 | list_del(&ncmd->list); | |
2279 | return true; | |
2280 | } | |
2281 | return false; | |
2282 | } | |
2283 | ||
2284 | /** | |
2285 | * NCR5380_abort - scsi host eh_abort_handler() method | |
2286 | * @cmd: the command to be aborted | |
2287 | * | |
2288 | * Try to abort a given command by removing it from queues and/or sending | |
2289 | * the target an abort message. This may not succeed in causing a target | |
2290 | * to abort the command. Nonetheless, the low-level driver must forget about | |
2291 | * the command because the mid-layer reclaims it and it may be re-issued. | |
2292 | * | |
2293 | * The normal path taken by a command is as follows. For EH we trace this | |
2294 | * same path to locate and abort the command. | |
2295 | * | |
2296 | * unissued -> selecting -> [unissued -> selecting ->]... connected -> | |
2297 | * [disconnected -> connected ->]... | |
2298 | * [autosense -> connected ->] done | |
2299 | * | |
8b00c3d5 FT |
2300 | * If cmd was not found at all then presumably it has already been completed, |
2301 | * in which case return SUCCESS to try to avoid further EH measures. | |
dc183965 | 2302 | * |
8b00c3d5 | 2303 | * If the command has not completed yet, we must not fail to find it. |
dc183965 FT |
2304 | * We have no option but to forget the aborted command (even if it still |
2305 | * lacks sense data). The mid-layer may re-issue a command that is in error | |
2306 | * recovery (see scsi_send_eh_cmnd), but the logic and data structures in | |
2307 | * this driver are such that a command can appear on one queue only. | |
71a00593 FT |
2308 | * |
2309 | * The lock protects driver data structures, but EH handlers also use it | |
2310 | * to serialize their own execution and prevent their own re-entry. | |
1da177e4 LT |
2311 | */ |
2312 | ||
710ddd0d FT |
2313 | static int NCR5380_abort(struct scsi_cmnd *cmd) |
2314 | { | |
1da177e4 | 2315 | struct Scsi_Host *instance = cmd->device->host; |
e8a60144 | 2316 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
11d2f63b | 2317 | unsigned long flags; |
8b00c3d5 | 2318 | int result = SUCCESS; |
1fa6b5fb | 2319 | |
11d2f63b FT |
2320 | spin_lock_irqsave(&hostdata->lock, flags); |
2321 | ||
32b26a10 | 2322 | #if (NDEBUG & NDEBUG_ANY) |
8b00c3d5 | 2323 | scmd_printk(KERN_INFO, cmd, __func__); |
32b26a10 | 2324 | #endif |
e5c3fddf FT |
2325 | NCR5380_dprint(NDEBUG_ANY, instance); |
2326 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
1da177e4 | 2327 | |
8b00c3d5 FT |
2328 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2329 | dsprintk(NDEBUG_ABORT, instance, | |
2330 | "abort: removed %p from issue queue\n", cmd); | |
2331 | cmd->result = DID_ABORT << 16; | |
2332 | cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ | |
dc183965 | 2333 | goto out; |
8b00c3d5 FT |
2334 | } |
2335 | ||
707d62b3 FT |
2336 | if (hostdata->selecting == cmd) { |
2337 | dsprintk(NDEBUG_ABORT, instance, | |
2338 | "abort: cmd %p == selecting\n", cmd); | |
2339 | hostdata->selecting = NULL; | |
2340 | cmd->result = DID_ABORT << 16; | |
2341 | complete_cmd(instance, cmd); | |
2342 | goto out; | |
2343 | } | |
2344 | ||
8b00c3d5 FT |
2345 | if (list_del_cmd(&hostdata->disconnected, cmd)) { |
2346 | dsprintk(NDEBUG_ABORT, instance, | |
2347 | "abort: removed %p from disconnected list\n", cmd); | |
71a00593 FT |
2348 | /* Can't call NCR5380_select() and send ABORT because that |
2349 | * means releasing the lock. Need a bus reset. | |
2350 | */ | |
dc183965 FT |
2351 | set_host_byte(cmd, DID_ERROR); |
2352 | complete_cmd(instance, cmd); | |
71a00593 FT |
2353 | result = FAILED; |
2354 | goto out; | |
8b00c3d5 FT |
2355 | } |
2356 | ||
2357 | if (hostdata->connected == cmd) { | |
2358 | dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); | |
2359 | hostdata->connected = NULL; | |
8b00c3d5 | 2360 | hostdata->dma_len = 0; |
8b00c3d5 FT |
2361 | if (do_abort(instance)) { |
2362 | set_host_byte(cmd, DID_ERROR); | |
2363 | complete_cmd(instance, cmd); | |
2364 | result = FAILED; | |
2365 | goto out; | |
2366 | } | |
2367 | set_host_byte(cmd, DID_ABORT); | |
dc183965 FT |
2368 | complete_cmd(instance, cmd); |
2369 | goto out; | |
2370 | } | |
2371 | ||
2372 | if (list_del_cmd(&hostdata->autosense, cmd)) { | |
2373 | dsprintk(NDEBUG_ABORT, instance, | |
2374 | "abort: removed %p from sense queue\n", cmd); | |
2375 | set_host_byte(cmd, DID_ERROR); | |
8b00c3d5 FT |
2376 | complete_cmd(instance, cmd); |
2377 | } | |
2378 | ||
2379 | out: | |
2380 | if (result == FAILED) | |
2381 | dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); | |
2382 | else | |
2383 | dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); | |
2384 | ||
2385 | queue_work(hostdata->work_q, &hostdata->main_task); | |
52d3e561 | 2386 | maybe_release_dma_irq(instance); |
11d2f63b | 2387 | spin_unlock_irqrestore(&hostdata->lock, flags); |
32b26a10 | 2388 | |
8b00c3d5 | 2389 | return result; |
1da177e4 LT |
2390 | } |
2391 | ||
2392 | ||
3be1b3ea FT |
2393 | /** |
2394 | * NCR5380_bus_reset - reset the SCSI bus | |
2395 | * @cmd: SCSI command undergoing EH | |
1da177e4 | 2396 | * |
3be1b3ea | 2397 | * Returns SUCCESS |
1da177e4 LT |
2398 | */ |
2399 | ||
710ddd0d | 2400 | static int NCR5380_bus_reset(struct scsi_cmnd *cmd) |
68b3aa7c JG |
2401 | { |
2402 | struct Scsi_Host *instance = cmd->device->host; | |
11d2f63b | 2403 | struct NCR5380_hostdata *hostdata = shost_priv(instance); |
62717f53 | 2404 | int i; |
11d2f63b | 2405 | unsigned long flags; |
62717f53 | 2406 | struct NCR5380_cmd *ncmd; |
68b3aa7c | 2407 | |
11d2f63b | 2408 | spin_lock_irqsave(&hostdata->lock, flags); |
3be1b3ea FT |
2409 | |
2410 | #if (NDEBUG & NDEBUG_ANY) | |
62717f53 | 2411 | scmd_printk(KERN_INFO, cmd, __func__); |
3be1b3ea | 2412 | #endif |
e5c3fddf FT |
2413 | NCR5380_dprint(NDEBUG_ANY, instance); |
2414 | NCR5380_dprint_phase(NDEBUG_ANY, instance); | |
68b3aa7c | 2415 | |
68b3aa7c | 2416 | do_reset(instance); |
3be1b3ea | 2417 | |
62717f53 FT |
2418 | /* reset NCR registers */ |
2419 | NCR5380_write(MODE_REG, MR_BASE); | |
2420 | NCR5380_write(TARGET_COMMAND_REG, 0); | |
2421 | NCR5380_write(SELECT_ENABLE_REG, 0); | |
2422 | ||
2423 | /* After the reset, there are no more connected or disconnected commands | |
2424 | * and no busy units; so clear the low-level status here to avoid | |
2425 | * conflicts when the mid-level code tries to wake up the affected | |
2426 | * commands! | |
2427 | */ | |
2428 | ||
1884c283 FT |
2429 | if (list_del_cmd(&hostdata->unissued, cmd)) { |
2430 | cmd->result = DID_RESET << 16; | |
2431 | cmd->scsi_done(cmd); | |
2432 | } | |
2433 | ||
2434 | if (hostdata->selecting) { | |
2435 | hostdata->selecting->result = DID_RESET << 16; | |
2436 | complete_cmd(instance, hostdata->selecting); | |
2437 | hostdata->selecting = NULL; | |
2438 | } | |
62717f53 FT |
2439 | |
2440 | list_for_each_entry(ncmd, &hostdata->disconnected, list) { | |
2441 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2442 | ||
2443 | set_host_byte(cmd, DID_RESET); | |
216fad91 | 2444 | complete_cmd(instance, cmd); |
62717f53 | 2445 | } |
1884c283 | 2446 | INIT_LIST_HEAD(&hostdata->disconnected); |
62717f53 FT |
2447 | |
2448 | list_for_each_entry(ncmd, &hostdata->autosense, list) { | |
2449 | struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); | |
2450 | ||
2451 | set_host_byte(cmd, DID_RESET); | |
2452 | cmd->scsi_done(cmd); | |
2453 | } | |
1884c283 | 2454 | INIT_LIST_HEAD(&hostdata->autosense); |
62717f53 FT |
2455 | |
2456 | if (hostdata->connected) { | |
2457 | set_host_byte(hostdata->connected, DID_RESET); | |
2458 | complete_cmd(instance, hostdata->connected); | |
2459 | hostdata->connected = NULL; | |
2460 | } | |
2461 | ||
62717f53 FT |
2462 | for (i = 0; i < 8; ++i) |
2463 | hostdata->busy[i] = 0; | |
62717f53 | 2464 | hostdata->dma_len = 0; |
62717f53 FT |
2465 | |
2466 | queue_work(hostdata->work_q, &hostdata->main_task); | |
52d3e561 | 2467 | maybe_release_dma_irq(instance); |
11d2f63b | 2468 | spin_unlock_irqrestore(&hostdata->lock, flags); |
1da177e4 | 2469 | |
1da177e4 LT |
2470 | return SUCCESS; |
2471 | } |