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ncr5380: Fix NCR5380_select() EH checks and result handling
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aff0cf9a 1/*
1da177e4 2 * NCR 5380 generic driver routines. These should make it *trivial*
594d4ba3
FT
3 * to implement 5380 SCSI drivers under Linux with a non-trantor
4 * architecture.
1da177e4 5 *
594d4ba3 6 * Note that these routines also work with NR53c400 family chips.
1da177e4
LT
7 *
8 * Copyright 1993, Drew Eckhardt
594d4ba3
FT
9 * Visionary Computing
10 * (Unix and Linux consulting and custom programming)
11 * drew@colorado.edu
12 * +1 (303) 666-5836
1da177e4 13 *
aff0cf9a 14 * For more information, please consult
1da177e4
LT
15 *
16 * NCR 5380 Family
17 * SCSI Protocol Controller
18 * Databook
19 *
20 * NCR Microelectronics
21 * 1635 Aeroplaza Drive
22 * Colorado Springs, CO 80916
23 * 1+ (719) 578-3400
24 * 1+ (800) 334-5454
25 */
26
27/*
c16df32e
FT
28 * With contributions from Ray Van Tassle, Ingmar Baumgart,
29 * Ronald van Cuijlenborg, Alan Cox and others.
1da177e4
LT
30 */
31
32/*
aff0cf9a 33 * Further development / testing that should be done :
1da177e4 34 * 1. Cleanup the NCR5380_transfer_dma function and DMA operation complete
594d4ba3
FT
35 * code so that everything does the same thing that's done at the
36 * end of a pseudo-DMA read operation.
1da177e4
LT
37 *
38 * 2. Fix REAL_DMA (interrupt driven, polled works fine) -
594d4ba3
FT
39 * basically, transfer size needs to be reduced by one
40 * and the last byte read as is done with PSEUDO_DMA.
aff0cf9a
FT
41 *
42 * 4. Test SCSI-II tagged queueing (I have no devices which support
594d4ba3 43 * tagged queueing)
1da177e4
LT
44 */
45
1da177e4 46#ifndef notyet
1da177e4
LT
47#undef REAL_DMA
48#endif
49
1da177e4
LT
50#ifdef BOARD_REQUIRES_NO_DELAY
51#define io_recovery_delay(x)
52#else
53#define io_recovery_delay(x) udelay(x)
54#endif
55
56/*
57 * Design
58 *
aff0cf9a 59 * This is a generic 5380 driver. To use it on a different platform,
1da177e4 60 * one simply writes appropriate system specific macros (ie, data
aff0cf9a 61 * transfer - some PC's will use the I/O bus, 68K's must use
1da177e4
LT
62 * memory mapped) and drops this file in their 'C' wrapper.
63 *
aff0cf9a 64 * As far as command queueing, two queues are maintained for
1da177e4 65 * each 5380 in the system - commands that haven't been issued yet,
aff0cf9a
FT
66 * and commands that are currently executing. This means that an
67 * unlimited number of commands may be queued, letting
68 * more commands propagate from the higher driver levels giving higher
69 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported,
70 * allowing multiple commands to propagate all the way to a SCSI-II device
1da177e4
LT
71 * while a command is already executing.
72 *
73 *
aff0cf9a 74 * Issues specific to the NCR5380 :
1da177e4 75 *
aff0cf9a
FT
76 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
77 * piece of hardware that requires you to sit in a loop polling for
78 * the REQ signal as long as you are connected. Some devices are
79 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
686f3990 80 * while doing long seek operations. [...] These
1da177e4
LT
81 * broken devices are the exception rather than the rule and I'd rather
82 * spend my time optimizing for the normal case.
83 *
84 * Architecture :
85 *
86 * At the heart of the design is a coroutine, NCR5380_main,
87 * which is started from a workqueue for each NCR5380 host in the
88 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by
89 * removing the commands from the issue queue and calling
aff0cf9a 90 * NCR5380_select() if a nexus is not established.
1da177e4
LT
91 *
92 * Once a nexus is established, the NCR5380_information_transfer()
93 * phase goes through the various phases as instructed by the target.
94 * if the target goes into MSG IN and sends a DISCONNECT message,
95 * the command structure is placed into the per instance disconnected
aff0cf9a 96 * queue, and NCR5380_main tries to find more work. If the target is
1da177e4
LT
97 * idle for too long, the system will try to sleep.
98 *
99 * If a command has disconnected, eventually an interrupt will trigger,
100 * calling NCR5380_intr() which will in turn call NCR5380_reselect
101 * to reestablish a nexus. This will run main if necessary.
102 *
aff0cf9a 103 * On command termination, the done function will be called as
1da177e4
LT
104 * appropriate.
105 *
aff0cf9a 106 * SCSI pointers are maintained in the SCp field of SCSI command
1da177e4
LT
107 * structures, being initialized after the command is connected
108 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
109 * Note that in violation of the standard, an implicit SAVE POINTERS operation
110 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
111 */
112
113/*
114 * Using this file :
115 * This file a skeleton Linux SCSI driver for the NCR 5380 series
aff0cf9a 116 * of chips. To use it, you write an architecture specific functions
1da177e4
LT
117 * and macros and include this file in your driver.
118 *
aff0cf9a
FT
119 * These macros control options :
120 * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be
594d4ba3 121 * defined.
aff0cf9a 122 *
1da177e4 123 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
594d4ba3 124 * for commands that return with a CHECK CONDITION status.
1da177e4
LT
125 *
126 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
594d4ba3 127 * transceivers.
1da177e4
LT
128 *
129 * DONT_USE_INTR - if defined, never use interrupts, even if we probe or
594d4ba3 130 * override-configure an IRQ.
1da177e4 131 *
1da177e4
LT
132 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
133 *
134 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
135 *
136 * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't
594d4ba3
FT
137 * rely on phase mismatch and EOP interrupts to determine end
138 * of phase.
1da177e4 139 *
1da177e4 140 * These macros MUST be defined :
aff0cf9a 141 *
1da177e4
LT
142 * NCR5380_read(register) - read from the specified register
143 *
aff0cf9a 144 * NCR5380_write(register, value) - write to the specific register
1da177e4 145 *
aff0cf9a 146 * NCR5380_implementation_fields - additional fields needed for this
594d4ba3 147 * specific implementation of the NCR5380
1da177e4
LT
148 *
149 * Either real DMA *or* pseudo DMA may be implemented
aff0cf9a 150 * REAL functions :
1da177e4 151 * NCR5380_REAL_DMA should be defined if real DMA is to be used.
aff0cf9a 152 * Note that the DMA setup functions should return the number of bytes
594d4ba3 153 * that they were able to program the controller for.
1da177e4 154 *
aff0cf9a 155 * Also note that generic i386/PC versions of these macros are
594d4ba3
FT
156 * available as NCR5380_i386_dma_write_setup,
157 * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual.
1da177e4
LT
158 *
159 * NCR5380_dma_write_setup(instance, src, count) - initialize
160 * NCR5380_dma_read_setup(instance, dst, count) - initialize
161 * NCR5380_dma_residual(instance); - residual count
162 *
163 * PSEUDO functions :
164 * NCR5380_pwrite(instance, src, count)
165 * NCR5380_pread(instance, dst, count);
166 *
167 * The generic driver is initialized by calling NCR5380_init(instance),
aff0cf9a 168 * after setting the appropriate host specific fields and ID. If the
1da177e4
LT
169 * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance,
170 * possible) function may be used.
171 */
172
54d8fe44
FT
173static int do_abort(struct Scsi_Host *);
174static void do_reset(struct Scsi_Host *);
1da177e4 175
c16df32e 176/**
0d2cf867 177 * initialize_SCp - init the scsi pointer field
594d4ba3 178 * @cmd: command block to set up
1da177e4 179 *
594d4ba3 180 * Set up the internal fields in the SCSI command.
1da177e4
LT
181 */
182
710ddd0d 183static inline void initialize_SCp(struct scsi_cmnd *cmd)
1da177e4 184{
aff0cf9a
FT
185 /*
186 * Initialize the Scsi Pointer field so that all of the commands in the
1da177e4
LT
187 * various queues are valid.
188 */
189
9e0fe44d
BH
190 if (scsi_bufflen(cmd)) {
191 cmd->SCp.buffer = scsi_sglist(cmd);
192 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
45711f1a 193 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1da177e4
LT
194 cmd->SCp.this_residual = cmd->SCp.buffer->length;
195 } else {
196 cmd->SCp.buffer = NULL;
197 cmd->SCp.buffers_residual = 0;
9e0fe44d
BH
198 cmd->SCp.ptr = NULL;
199 cmd->SCp.this_residual = 0;
1da177e4 200 }
f27db8eb
FT
201
202 cmd->SCp.Status = 0;
203 cmd->SCp.Message = 0;
1da177e4
LT
204}
205
206/**
b32ade12 207 * NCR5380_poll_politely2 - wait for two chip register values
2f854b82 208 * @instance: controller to poll
b32ade12
FT
209 * @reg1: 5380 register to poll
210 * @bit1: Bitmask to check
211 * @val1: Expected value
212 * @reg2: Second 5380 register to poll
213 * @bit2: Second bitmask to check
214 * @val2: Second expected value
2f854b82
FT
215 * @wait: Time-out in jiffies
216 *
217 * Polls the chip in a reasonably efficient manner waiting for an
218 * event to occur. After a short quick poll we begin to yield the CPU
219 * (if possible). In irq contexts the time-out is arbitrarily limited.
220 * Callers may hold locks as long as they are held in irq mode.
221 *
b32ade12 222 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
1da177e4 223 */
2f854b82 224
b32ade12
FT
225static int NCR5380_poll_politely2(struct Scsi_Host *instance,
226 int reg1, int bit1, int val1,
227 int reg2, int bit2, int val2, int wait)
1da177e4 228{
2f854b82
FT
229 struct NCR5380_hostdata *hostdata = shost_priv(instance);
230 unsigned long deadline = jiffies + wait;
231 unsigned long n;
232
233 /* Busy-wait for up to 10 ms */
234 n = min(10000U, jiffies_to_usecs(wait));
235 n *= hostdata->accesses_per_ms;
b32ade12 236 n /= 2000;
2f854b82 237 do {
b32ade12
FT
238 if ((NCR5380_read(reg1) & bit1) == val1)
239 return 0;
240 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4
LT
241 return 0;
242 cpu_relax();
2f854b82
FT
243 } while (n--);
244
245 if (irqs_disabled() || in_interrupt())
246 return -ETIMEDOUT;
247
248 /* Repeatedly sleep for 1 ms until deadline */
249 while (time_is_after_jiffies(deadline)) {
250 schedule_timeout_uninterruptible(1);
b32ade12
FT
251 if ((NCR5380_read(reg1) & bit1) == val1)
252 return 0;
253 if ((NCR5380_read(reg2) & bit2) == val2)
1da177e4 254 return 0;
1da177e4 255 }
2f854b82 256
1da177e4
LT
257 return -ETIMEDOUT;
258}
259
b32ade12
FT
260static inline int NCR5380_poll_politely(struct Scsi_Host *instance,
261 int reg, int bit, int val, int wait)
262{
263 return NCR5380_poll_politely2(instance, reg, bit, val,
264 reg, bit, val, wait);
265}
266
185a7a1c 267#if NDEBUG
1da177e4
LT
268static struct {
269 unsigned char mask;
270 const char *name;
aff0cf9a
FT
271} signals[] = {
272 {SR_DBP, "PARITY"},
273 {SR_RST, "RST"},
274 {SR_BSY, "BSY"},
275 {SR_REQ, "REQ"},
276 {SR_MSG, "MSG"},
277 {SR_CD, "CD"},
278 {SR_IO, "IO"},
279 {SR_SEL, "SEL"},
1da177e4 280 {0, NULL}
aff0cf9a 281},
1da177e4 282basrs[] = {
aff0cf9a
FT
283 {BASR_ATN, "ATN"},
284 {BASR_ACK, "ACK"},
1da177e4 285 {0, NULL}
aff0cf9a
FT
286},
287icrs[] = {
288 {ICR_ASSERT_RST, "ASSERT RST"},
289 {ICR_ASSERT_ACK, "ASSERT ACK"},
290 {ICR_ASSERT_BSY, "ASSERT BSY"},
291 {ICR_ASSERT_SEL, "ASSERT SEL"},
292 {ICR_ASSERT_ATN, "ASSERT ATN"},
293 {ICR_ASSERT_DATA, "ASSERT DATA"},
1da177e4 294 {0, NULL}
aff0cf9a
FT
295},
296mrs[] = {
297 {MR_BLOCK_DMA_MODE, "MODE BLOCK DMA"},
298 {MR_TARGET, "MODE TARGET"},
299 {MR_ENABLE_PAR_CHECK, "MODE PARITY CHECK"},
300 {MR_ENABLE_PAR_INTR, "MODE PARITY INTR"},
0d2cf867 301 {MR_ENABLE_EOP_INTR, "MODE EOP INTR"},
aff0cf9a
FT
302 {MR_MONITOR_BSY, "MODE MONITOR BSY"},
303 {MR_DMA_MODE, "MODE DMA"},
304 {MR_ARBITRATE, "MODE ARBITRATION"},
1da177e4
LT
305 {0, NULL}
306};
307
308/**
0d2cf867
FT
309 * NCR5380_print - print scsi bus signals
310 * @instance: adapter state to dump
1da177e4 311 *
594d4ba3 312 * Print the SCSI bus signals for debugging purposes
1da177e4
LT
313 */
314
315static void NCR5380_print(struct Scsi_Host *instance)
316{
1da177e4 317 unsigned char status, data, basr, mr, icr, i;
1da177e4
LT
318
319 data = NCR5380_read(CURRENT_SCSI_DATA_REG);
320 status = NCR5380_read(STATUS_REG);
321 mr = NCR5380_read(MODE_REG);
322 icr = NCR5380_read(INITIATOR_COMMAND_REG);
323 basr = NCR5380_read(BUS_AND_STATUS_REG);
324
325 printk("STATUS_REG: %02x ", status);
326 for (i = 0; signals[i].mask; ++i)
327 if (status & signals[i].mask)
328 printk(",%s", signals[i].name);
329 printk("\nBASR: %02x ", basr);
330 for (i = 0; basrs[i].mask; ++i)
331 if (basr & basrs[i].mask)
332 printk(",%s", basrs[i].name);
333 printk("\nICR: %02x ", icr);
334 for (i = 0; icrs[i].mask; ++i)
335 if (icr & icrs[i].mask)
336 printk(",%s", icrs[i].name);
337 printk("\nMODE: %02x ", mr);
338 for (i = 0; mrs[i].mask; ++i)
339 if (mr & mrs[i].mask)
340 printk(",%s", mrs[i].name);
341 printk("\n");
342}
343
0d2cf867
FT
344static struct {
345 unsigned char value;
346 const char *name;
347} phases[] = {
348 {PHASE_DATAOUT, "DATAOUT"},
349 {PHASE_DATAIN, "DATAIN"},
350 {PHASE_CMDOUT, "CMDOUT"},
351 {PHASE_STATIN, "STATIN"},
352 {PHASE_MSGOUT, "MSGOUT"},
353 {PHASE_MSGIN, "MSGIN"},
354 {PHASE_UNKNOWN, "UNKNOWN"}
355};
1da177e4 356
c16df32e 357/**
0d2cf867 358 * NCR5380_print_phase - show SCSI phase
594d4ba3 359 * @instance: adapter to dump
1da177e4 360 *
594d4ba3 361 * Print the current SCSI phase for debugging purposes
1da177e4
LT
362 */
363
364static void NCR5380_print_phase(struct Scsi_Host *instance)
365{
1da177e4
LT
366 unsigned char status;
367 int i;
1da177e4
LT
368
369 status = NCR5380_read(STATUS_REG);
370 if (!(status & SR_REQ))
6a6ff4ac 371 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
1da177e4 372 else {
0d2cf867
FT
373 for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
374 (phases[i].value != (status & PHASE_MASK)); ++i)
375 ;
6a6ff4ac 376 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
1da177e4
LT
377 }
378}
379#endif
380
1da177e4 381
d5f7e65d 382static int probe_irq __initdata;
1da177e4
LT
383
384/**
594d4ba3
FT
385 * probe_intr - helper for IRQ autoprobe
386 * @irq: interrupt number
387 * @dev_id: unused
388 * @regs: unused
1da177e4 389 *
594d4ba3
FT
390 * Set a flag to indicate the IRQ in question was received. This is
391 * used by the IRQ probe code.
1da177e4 392 */
aff0cf9a 393
7d12e780 394static irqreturn_t __init probe_intr(int irq, void *dev_id)
1da177e4
LT
395{
396 probe_irq = irq;
397 return IRQ_HANDLED;
398}
399
400/**
594d4ba3
FT
401 * NCR5380_probe_irq - find the IRQ of an NCR5380
402 * @instance: NCR5380 controller
403 * @possible: bitmask of ISA IRQ lines
1da177e4 404 *
594d4ba3
FT
405 * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ
406 * and then looking to see what interrupt actually turned up.
1da177e4
LT
407 */
408
702809ce
AM
409static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance,
410 int possible)
1da177e4 411{
e8a60144 412 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
413 unsigned long timeout;
414 int trying_irqs, i, mask;
1da177e4 415
22f5f10d 416 for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1)
4909cc2b 417 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0))
1da177e4
LT
418 trying_irqs |= mask;
419
4e5a800c 420 timeout = jiffies + msecs_to_jiffies(250);
22f5f10d 421 probe_irq = NO_IRQ;
1da177e4
LT
422
423 /*
424 * A interrupt is triggered whenever BSY = false, SEL = true
aff0cf9a 425 * and a bit set in the SELECT_ENABLE_REG is asserted on the
1da177e4
LT
426 * SCSI bus.
427 *
428 * Note that the bus is only driven when the phase control signals
429 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that
430 * to zero.
431 */
432
433 NCR5380_write(TARGET_COMMAND_REG, 0);
434 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
435 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
436 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
437
22f5f10d 438 while (probe_irq == NO_IRQ && time_before(jiffies, timeout))
a9a3047d 439 schedule_timeout_uninterruptible(1);
aff0cf9a 440
1da177e4
LT
441 NCR5380_write(SELECT_ENABLE_REG, 0);
442 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
443
22f5f10d 444 for (i = 1, mask = 2; i < 16; ++i, mask <<= 1)
1da177e4
LT
445 if (trying_irqs & mask)
446 free_irq(i, NULL);
447
448 return probe_irq;
449}
450
451/**
594d4ba3
FT
452 * NCR58380_info - report driver and host information
453 * @instance: relevant scsi host instance
1da177e4 454 *
594d4ba3 455 * For use as the host template info() handler.
1da177e4
LT
456 */
457
8c32513b 458static const char *NCR5380_info(struct Scsi_Host *instance)
1da177e4 459{
8c32513b
FT
460 struct NCR5380_hostdata *hostdata = shost_priv(instance);
461
462 return hostdata->info;
463}
464
465static void prepare_info(struct Scsi_Host *instance)
466{
467 struct NCR5380_hostdata *hostdata = shost_priv(instance);
468
469 snprintf(hostdata->info, sizeof(hostdata->info),
470 "%s, io_port 0x%lx, n_io_port %d, "
471 "base 0x%lx, irq %d, "
472 "can_queue %d, cmd_per_lun %d, "
473 "sg_tablesize %d, this_id %d, "
be3f4121 474 "flags { %s%s%s}, "
8c32513b
FT
475 "options { %s} ",
476 instance->hostt->name, instance->io_port, instance->n_io_port,
477 instance->base, instance->irq,
478 instance->can_queue, instance->cmd_per_lun,
479 instance->sg_tablesize, instance->this_id,
55181be8 480 hostdata->flags & FLAG_NO_DMA_FIXUP ? "NO_DMA_FIXUP " : "",
8c32513b 481 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
9c3f0e2b 482 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "",
1da177e4 483#ifdef AUTOPROBE_IRQ
8c32513b 484 "AUTOPROBE_IRQ "
1da177e4 485#endif
1da177e4 486#ifdef DIFFERENTIAL
8c32513b 487 "DIFFERENTIAL "
1da177e4
LT
488#endif
489#ifdef REAL_DMA
8c32513b 490 "REAL_DMA "
1da177e4
LT
491#endif
492#ifdef REAL_DMA_POLL
8c32513b 493 "REAL_DMA_POLL "
1da177e4
LT
494#endif
495#ifdef PARITY
8c32513b 496 "PARITY "
1da177e4
LT
497#endif
498#ifdef PSEUDO_DMA
8c32513b 499 "PSEUDO_DMA "
8c32513b
FT
500#endif
501 "");
1da177e4
LT
502}
503
a9c2dc43 504#ifdef PSEUDO_DMA
dd7ab71b
AV
505static int __maybe_unused NCR5380_write_info(struct Scsi_Host *instance,
506 char *buffer, int length)
507{
a9c2dc43
FT
508 struct NCR5380_hostdata *hostdata = shost_priv(instance);
509
510 hostdata->spin_max_r = 0;
511 hostdata->spin_max_w = 0;
512 return 0;
dd7ab71b 513}
1da177e4 514
dd7ab71b 515static int __maybe_unused NCR5380_show_info(struct seq_file *m,
0d2cf867 516 struct Scsi_Host *instance)
1da177e4 517{
e8a60144 518 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 519
0c3de38f 520 seq_printf(m, "Highwater I/O busy spin counts: write %d, read %d\n",
a9c2dc43 521 hostdata->spin_max_w, hostdata->spin_max_r);
dd7ab71b 522 return 0;
1da177e4 523}
e5c3fddf 524#endif
1da177e4
LT
525
526/**
0d2cf867 527 * NCR5380_init - initialise an NCR5380
594d4ba3
FT
528 * @instance: adapter to configure
529 * @flags: control flags
1da177e4 530 *
594d4ba3
FT
531 * Initializes *instance and corresponding 5380 chip,
532 * with flags OR'd into the initial flags value.
1da177e4 533 *
594d4ba3 534 * Notes : I assume that the host, hostno, and id bits have been
0d2cf867 535 * set correctly. I don't care about the irq and other fields.
1da177e4 536 *
594d4ba3 537 * Returns 0 for success
1da177e4
LT
538 */
539
6f039790 540static int NCR5380_init(struct Scsi_Host *instance, int flags)
1da177e4 541{
e8a60144 542 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 543 int i;
2f854b82 544 unsigned long deadline;
1da177e4 545
0d2cf867 546 hostdata->host = instance;
1da177e4 547 hostdata->id_mask = 1 << instance->this_id;
0d2cf867 548 hostdata->id_higher_mask = 0;
1da177e4
LT
549 for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
550 if (i > hostdata->id_mask)
551 hostdata->id_higher_mask |= i;
552 for (i = 0; i < 8; ++i)
553 hostdata->busy[i] = 0;
554#ifdef REAL_DMA
555 hostdata->dmalen = 0;
556#endif
11d2f63b 557 spin_lock_init(&hostdata->lock);
1da177e4 558 hostdata->connected = NULL;
f27db8eb
FT
559 hostdata->sensing = NULL;
560 INIT_LIST_HEAD(&hostdata->autosense);
32b26a10
FT
561 INIT_LIST_HEAD(&hostdata->unissued);
562 INIT_LIST_HEAD(&hostdata->disconnected);
563
55181be8 564 hostdata->flags = flags;
aff0cf9a 565
8d8601a7 566 INIT_WORK(&hostdata->main_task, NCR5380_main);
0ad0eff9
FT
567 hostdata->work_q = alloc_workqueue("ncr5380_%d",
568 WQ_UNBOUND | WQ_MEM_RECLAIM,
569 1, instance->host_no);
570 if (!hostdata->work_q)
571 return -ENOMEM;
572
8c32513b
FT
573 prepare_info(instance);
574
1da177e4
LT
575 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
576 NCR5380_write(MODE_REG, MR_BASE);
577 NCR5380_write(TARGET_COMMAND_REG, 0);
578 NCR5380_write(SELECT_ENABLE_REG, 0);
2f854b82
FT
579
580 /* Calibrate register polling loop */
581 i = 0;
582 deadline = jiffies + 1;
583 do {
584 cpu_relax();
585 } while (time_is_after_jiffies(deadline));
586 deadline += msecs_to_jiffies(256);
587 do {
588 NCR5380_read(STATUS_REG);
589 ++i;
590 cpu_relax();
591 } while (time_is_after_jiffies(deadline));
592 hostdata->accesses_per_ms = i / 256;
593
b6488f97
FT
594 return 0;
595}
1da177e4 596
b6488f97
FT
597/**
598 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
599 * @instance: adapter to check
600 *
601 * If the system crashed, it may have crashed with a connected target and
602 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
603 * currently established nexus, which we know nothing about. Failing that
604 * do a bus reset.
605 *
606 * Note that a bus reset will cause the chip to assert IRQ.
607 *
608 * Returns 0 if successful, otherwise -ENXIO.
609 */
610
611static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
612{
9c3f0e2b 613 struct NCR5380_hostdata *hostdata = shost_priv(instance);
b6488f97 614 int pass;
1da177e4
LT
615
616 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
617 switch (pass) {
618 case 1:
619 case 3:
620 case 5:
636b1ec8
FT
621 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
622 NCR5380_poll_politely(instance,
623 STATUS_REG, SR_BSY, 0, 5 * HZ);
1da177e4
LT
624 break;
625 case 2:
636b1ec8 626 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
1da177e4
LT
627 do_abort(instance);
628 break;
629 case 4:
636b1ec8 630 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
1da177e4 631 do_reset(instance);
9c3f0e2b
FT
632 /* Wait after a reset; the SCSI standard calls for
633 * 250ms, we wait 500ms to be on the safe side.
634 * But some Toshiba CD-ROMs need ten times that.
635 */
636 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
637 msleep(2500);
638 else
639 msleep(500);
1da177e4
LT
640 break;
641 case 6:
636b1ec8 642 shost_printk(KERN_ERR, instance, "bus locked solid\n");
1da177e4
LT
643 return -ENXIO;
644 }
645 }
646 return 0;
647}
648
649/**
0d2cf867 650 * NCR5380_exit - remove an NCR5380
594d4ba3 651 * @instance: adapter to remove
0d2cf867
FT
652 *
653 * Assumes that no more work can be queued (e.g. by NCR5380_intr).
1da177e4
LT
654 */
655
a43cf0f3 656static void NCR5380_exit(struct Scsi_Host *instance)
1da177e4 657{
e8a60144 658 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 659
8d8601a7 660 cancel_work_sync(&hostdata->main_task);
0ad0eff9 661 destroy_workqueue(hostdata->work_q);
1da177e4
LT
662}
663
677e0194
FT
664/**
665 * complete_cmd - finish processing a command and return it to the SCSI ML
666 * @instance: the host instance
667 * @cmd: command to complete
668 */
669
670static void complete_cmd(struct Scsi_Host *instance,
671 struct scsi_cmnd *cmd)
672{
673 struct NCR5380_hostdata *hostdata = shost_priv(instance);
674
675 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
676
f27db8eb
FT
677 if (hostdata->sensing == cmd) {
678 /* Autosense processing ends here */
679 if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
680 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
681 set_host_byte(cmd, DID_ERROR);
682 } else
683 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
684 hostdata->sensing = NULL;
685 }
686
677e0194
FT
687 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
688
689 cmd->scsi_done(cmd);
690}
691
1da177e4 692/**
1bb40589
FT
693 * NCR5380_queue_command - queue a command
694 * @instance: the relevant SCSI adapter
695 * @cmd: SCSI command
1da177e4 696 *
1bb40589
FT
697 * cmd is added to the per-instance issue queue, with minor
698 * twiddling done to the host specific fields of cmd. If the
699 * main coroutine is not running, it is restarted.
1da177e4
LT
700 */
701
1bb40589
FT
702static int NCR5380_queue_command(struct Scsi_Host *instance,
703 struct scsi_cmnd *cmd)
1da177e4 704{
1bb40589 705 struct NCR5380_hostdata *hostdata = shost_priv(instance);
32b26a10 706 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1bb40589 707 unsigned long flags;
1da177e4
LT
708
709#if (NDEBUG & NDEBUG_NO_WRITE)
710 switch (cmd->cmnd[0]) {
711 case WRITE_6:
712 case WRITE_10:
dbb6b350 713 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
1da177e4 714 cmd->result = (DID_ERROR << 16);
1bb40589 715 cmd->scsi_done(cmd);
1da177e4
LT
716 return 0;
717 }
0d2cf867 718#endif /* (NDEBUG & NDEBUG_NO_WRITE) */
1da177e4 719
1da177e4
LT
720 cmd->result = 0;
721
11d2f63b 722 spin_lock_irqsave(&hostdata->lock, flags);
1bb40589 723
aff0cf9a
FT
724 /*
725 * Insert the cmd into the issue queue. Note that REQUEST SENSE
1da177e4 726 * commands are added to the head of the queue since any command will
aff0cf9a 727 * clear the contingent allegiance condition that exists and the
1da177e4
LT
728 * sense data is only guaranteed to be valid while the condition exists.
729 */
730
32b26a10
FT
731 if (cmd->cmnd[0] == REQUEST_SENSE)
732 list_add(&ncmd->list, &hostdata->unissued);
733 else
734 list_add_tail(&ncmd->list, &hostdata->unissued);
735
11d2f63b 736 spin_unlock_irqrestore(&hostdata->lock, flags);
1bb40589 737
dbb6b350
FT
738 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
739 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
1da177e4 740
1da177e4 741 /* Kick off command processing */
8d8601a7 742 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4
LT
743 return 0;
744}
745
f27db8eb
FT
746/**
747 * dequeue_next_cmd - dequeue a command for processing
748 * @instance: the scsi host instance
749 *
750 * Priority is given to commands on the autosense queue. These commands
751 * need autosense because of a CHECK CONDITION result.
752 *
753 * Returns a command pointer if a command is found for a target that is
754 * not already busy. Otherwise returns NULL.
755 */
756
757static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
758{
759 struct NCR5380_hostdata *hostdata = shost_priv(instance);
760 struct NCR5380_cmd *ncmd;
761 struct scsi_cmnd *cmd;
762
763 if (list_empty(&hostdata->autosense)) {
764 list_for_each_entry(ncmd, &hostdata->unissued, list) {
765 cmd = NCR5380_to_scmd(ncmd);
766 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
767 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
768
769 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
770 list_del(&ncmd->list);
771 dsprintk(NDEBUG_QUEUES, instance,
772 "dequeue: removed %p from issue queue\n", cmd);
773 return cmd;
774 }
775 }
776 } else {
777 /* Autosense processing begins here */
778 ncmd = list_first_entry(&hostdata->autosense,
779 struct NCR5380_cmd, list);
780 list_del(&ncmd->list);
781 cmd = NCR5380_to_scmd(ncmd);
782 dsprintk(NDEBUG_QUEUES, instance,
783 "dequeue: removed %p from autosense queue\n", cmd);
784 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
785 hostdata->sensing = cmd;
786 return cmd;
787 }
788 return NULL;
789}
790
791static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
792{
793 struct NCR5380_hostdata *hostdata = shost_priv(instance);
794 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
795
796 if (hostdata->sensing) {
797 scsi_eh_restore_cmnd(cmd, &hostdata->ses);
798 list_add(&ncmd->list, &hostdata->autosense);
799 hostdata->sensing = NULL;
800 } else
801 list_add(&ncmd->list, &hostdata->unissued);
802}
803
1da177e4 804/**
0d2cf867 805 * NCR5380_main - NCR state machines
1da177e4 806 *
594d4ba3
FT
807 * NCR5380_main is a coroutine that runs as long as more work can
808 * be done on the NCR5380 host adapters in a system. Both
809 * NCR5380_queue_command() and NCR5380_intr() will try to start it
810 * in case it is not running.
1da177e4
LT
811 */
812
c4028958 813static void NCR5380_main(struct work_struct *work)
1da177e4 814{
c4028958 815 struct NCR5380_hostdata *hostdata =
8d8601a7 816 container_of(work, struct NCR5380_hostdata, main_task);
1da177e4 817 struct Scsi_Host *instance = hostdata->host;
1da177e4 818 int done;
aff0cf9a 819
1da177e4 820 do {
1da177e4 821 done = 1;
11d2f63b 822
0a4e3612 823 spin_lock_irq(&hostdata->lock);
ccf6efd7
FT
824 while (!hostdata->connected && !hostdata->selecting) {
825 struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
826
827 if (!cmd)
828 break;
1da177e4 829
f27db8eb 830 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
76f13b93 831
f27db8eb
FT
832 /*
833 * Attempt to establish an I_T_L nexus here.
834 * On success, instance->hostdata->connected is set.
835 * On failure, we must add the command back to the
836 * issue queue so we can keep trying.
837 */
838 /*
839 * REQUEST SENSE commands are issued without tagged
840 * queueing, even on SCSI-II devices because the
841 * contingent allegiance condition exists for the
842 * entire unit.
843 */
11d2f63b 844
ccf6efd7 845 if (!NCR5380_select(instance, cmd)) {
707d62b3 846 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
f27db8eb
FT
847 } else {
848 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
849 "main: select failed, returning %p to queue\n", cmd);
850 requeue_cmd(instance, cmd);
851 }
852 }
1da177e4
LT
853 if (hostdata->connected
854#ifdef REAL_DMA
855 && !hostdata->dmalen
856#endif
1da177e4 857 ) {
b746545f 858 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
1da177e4 859 NCR5380_information_transfer(instance);
1da177e4 860 done = 0;
1d3db59d 861 }
0a4e3612
FT
862 spin_unlock_irq(&hostdata->lock);
863 if (!done)
864 cond_resched();
1da177e4 865 } while (!done);
1da177e4
LT
866}
867
868#ifndef DONT_USE_INTR
869
870/**
cd400825
FT
871 * NCR5380_intr - generic NCR5380 irq handler
872 * @irq: interrupt number
873 * @dev_id: device info
874 *
875 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
876 * from the disconnected queue, and restarting NCR5380_main()
877 * as required.
878 *
879 * The chip can assert IRQ in any of six different conditions. The IRQ flag
880 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
881 * Three of these six conditions are latched in the Bus and Status Register:
882 * - End of DMA (cleared by ending DMA Mode)
883 * - Parity error (cleared by reading RPIR)
884 * - Loss of BSY (cleared by reading RPIR)
885 * Two conditions have flag bits that are not latched:
886 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
887 * - Bus reset (non-maskable)
888 * The remaining condition has no flag bit at all:
889 * - Selection/reselection
890 *
891 * Hence, establishing the cause(s) of any interrupt is partly guesswork.
892 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
893 * claimed that "the design of the [DP8490] interrupt logic ensures
894 * interrupts will not be lost (they can be on the DP5380)."
895 * The L5380/53C80 datasheet from LOGIC Devices has more details.
896 *
897 * Checking for bus reset by reading RST is futile because of interrupt
898 * latency, but a bus reset will reset chip logic. Checking for parity error
899 * is unnecessary because that interrupt is never enabled. A Loss of BSY
900 * condition will clear DMA Mode. We can tell when this occurs because the
901 * the Busy Monitor interrupt is enabled together with DMA Mode.
1da177e4
LT
902 */
903
cd400825 904static irqreturn_t NCR5380_intr(int irq, void *dev_id)
1da177e4 905{
baa9aac6 906 struct Scsi_Host *instance = dev_id;
cd400825
FT
907 struct NCR5380_hostdata *hostdata = shost_priv(instance);
908 int handled = 0;
1da177e4
LT
909 unsigned char basr;
910 unsigned long flags;
911
11d2f63b 912 spin_lock_irqsave(&hostdata->lock, flags);
cd400825
FT
913
914 basr = NCR5380_read(BUS_AND_STATUS_REG);
915 if (basr & BASR_IRQ) {
916 unsigned char mr = NCR5380_read(MODE_REG);
917 unsigned char sr = NCR5380_read(STATUS_REG);
918
b746545f
FT
919 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
920 irq, basr, sr, mr);
1da177e4 921
1da177e4 922#if defined(REAL_DMA)
cd400825
FT
923 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
924 /* Probably End of DMA, Phase Mismatch or Loss of BSY.
925 * We ack IRQ after clearing Mode Register. Workarounds
926 * for End of DMA errata need to happen in DMA Mode.
927 */
1da177e4 928
b746545f 929 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
1da177e4 930
cd400825 931 int transferred;
1da177e4 932
cd400825
FT
933 if (!hostdata->connected)
934 panic("scsi%d : DMA interrupt with no connected cmd\n",
935 instance->hostno);
1da177e4 936
cd400825
FT
937 transferred = hostdata->dmalen - NCR5380_dma_residual(instance);
938 hostdata->connected->SCp.this_residual -= transferred;
939 hostdata->connected->SCp.ptr += transferred;
940 hostdata->dmalen = 0;
1da177e4 941
cd400825
FT
942 /* FIXME: we need to poll briefly then defer a workqueue task ! */
943 NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2 * HZ);
944
945 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
946 NCR5380_write(MODE_REG, MR_BASE);
947 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
948 } else
949#endif /* REAL_DMA */
950 if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
951 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
952 /* Probably reselected */
953 NCR5380_write(SELECT_ENABLE_REG, 0);
954 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
955
b746545f 956 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
cd400825
FT
957
958 if (!hostdata->connected) {
959 NCR5380_reselect(instance);
960 queue_work(hostdata->work_q, &hostdata->main_task);
1da177e4 961 }
cd400825
FT
962 if (!hostdata->connected)
963 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
964 } else {
965 /* Probably Bus Reset */
966 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
967
b746545f 968 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
cd400825
FT
969 }
970 handled = 1;
971 } else {
972 shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n");
973 }
974
11d2f63b 975 spin_unlock_irqrestore(&hostdata->lock, flags);
cd400825
FT
976
977 return IRQ_RETVAL(handled);
1da177e4
LT
978}
979
aff0cf9a 980#endif
1da177e4 981
aff0cf9a 982/*
710ddd0d 983 * Function : int NCR5380_select(struct Scsi_Host *instance,
594d4ba3 984 * struct scsi_cmnd *cmd)
1da177e4
LT
985 *
986 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
594d4ba3
FT
987 * including ARBITRATION, SELECTION, and initial message out for
988 * IDENTIFY and queue messages.
1da177e4 989 *
aff0cf9a 990 * Inputs : instance - instantiation of the 5380 driver on which this
594d4ba3 991 * target lives, cmd - SCSI command to execute.
aff0cf9a 992 *
707d62b3
FT
993 * Returns cmd if selection failed but should be retried,
994 * NULL if selection failed and should not be retried, or
995 * NULL if selection succeeded (hostdata->connected == cmd).
1da177e4 996 *
aff0cf9a 997 * Side effects :
594d4ba3
FT
998 * If bus busy, arbitration failed, etc, NCR5380_select() will exit
999 * with registers as they should have been on entry - ie
1000 * SELECT_ENABLE will be set appropriately, the NCR5380
1001 * will cease to drive any SCSI bus signals.
1da177e4 1002 *
594d4ba3
FT
1003 * If successful : I_T_L or I_T_L_Q nexus will be established,
1004 * instance->connected will be set to cmd.
1005 * SELECT interrupt will be disabled.
1da177e4 1006 *
594d4ba3
FT
1007 * If failed (no target) : cmd->scsi_done() will be called, and the
1008 * cmd->result host byte set to DID_BAD_TARGET.
1da177e4 1009 */
aff0cf9a 1010
707d62b3
FT
1011static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
1012 struct scsi_cmnd *cmd)
1da177e4 1013{
e8a60144 1014 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1015 unsigned char tmp[3], phase;
1016 unsigned char *data;
1017 int len;
1da177e4 1018 int err;
1da177e4 1019
1da177e4 1020 NCR5380_dprint(NDEBUG_ARBITRATION, instance);
b746545f
FT
1021 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
1022 instance->this_id);
1da177e4 1023
707d62b3
FT
1024 /*
1025 * Arbitration and selection phases are slow and involve dropping the
1026 * lock, so we have to watch out for EH. An exception handler may
1027 * change 'selecting' to NULL. This function will then return NULL
1028 * so that the caller will forget about 'cmd'. (During information
1029 * transfer phases, EH may change 'connected' to NULL.)
1030 */
1031 hostdata->selecting = cmd;
1032
aff0cf9a
FT
1033 /*
1034 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1da177e4
LT
1035 * data bus during SELECTION.
1036 */
1037
1038 NCR5380_write(TARGET_COMMAND_REG, 0);
1039
aff0cf9a 1040 /*
1da177e4
LT
1041 * Start arbitration.
1042 */
1043
1044 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1045 NCR5380_write(MODE_REG, MR_ARBITRATE);
1046
55500d9b
FT
1047 /* The chip now waits for BUS FREE phase. Then after the 800 ns
1048 * Bus Free Delay, arbitration will begin.
1049 */
1da177e4 1050
11d2f63b 1051 spin_unlock_irq(&hostdata->lock);
b32ade12
FT
1052 err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0,
1053 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1054 ICR_ARBITRATION_PROGRESS, HZ);
11d2f63b 1055 spin_lock_irq(&hostdata->lock);
b32ade12
FT
1056 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1057 /* Reselection interrupt */
707d62b3 1058 goto out;
b32ade12 1059 }
ccf6efd7
FT
1060 if (!hostdata->selecting) {
1061 /* Command was aborted */
1062 NCR5380_write(MODE_REG, MR_BASE);
1063 goto out;
1064 }
b32ade12
FT
1065 if (err < 0) {
1066 NCR5380_write(MODE_REG, MR_BASE);
1067 shost_printk(KERN_ERR, instance,
1068 "select: arbitration timeout\n");
707d62b3 1069 goto out;
1da177e4 1070 }
11d2f63b 1071 spin_unlock_irq(&hostdata->lock);
1da177e4 1072
55500d9b 1073 /* The SCSI-2 arbitration delay is 2.4 us */
1da177e4
LT
1074 udelay(3);
1075
1076 /* Check for lost arbitration */
0d2cf867
FT
1077 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1078 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1079 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1da177e4 1080 NCR5380_write(MODE_REG, MR_BASE);
b746545f 1081 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
11d2f63b 1082 spin_lock_irq(&hostdata->lock);
707d62b3 1083 goto out;
1da177e4 1084 }
cf13b083
FT
1085
1086 /* After/during arbitration, BSY should be asserted.
1087 * IBM DPES-31080 Version S31Q works now
1088 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1089 */
1090 NCR5380_write(INITIATOR_COMMAND_REG,
1091 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1da177e4 1092
aff0cf9a
FT
1093 /*
1094 * Again, bus clear + bus settle time is 1.2us, however, this is
1da177e4
LT
1095 * a minimum so we'll udelay ceil(1.2)
1096 */
1097
9c3f0e2b
FT
1098 if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1099 udelay(15);
1100 else
1101 udelay(2);
1da177e4 1102
11d2f63b
FT
1103 spin_lock_irq(&hostdata->lock);
1104
72064a78
FT
1105 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1106 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
707d62b3
FT
1107 goto out;
1108
1109 if (!hostdata->selecting) {
1110 NCR5380_write(MODE_REG, MR_BASE);
1111 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1112 goto out;
1113 }
72064a78 1114
b746545f 1115 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1da177e4 1116
aff0cf9a
FT
1117 /*
1118 * Now that we have won arbitration, start Selection process, asserting
1da177e4
LT
1119 * the host and target ID's on the SCSI bus.
1120 */
1121
3d07d22b 1122 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1da177e4 1123
aff0cf9a 1124 /*
1da177e4
LT
1125 * Raise ATN while SEL is true before BSY goes false from arbitration,
1126 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1127 * phase immediately after selection.
1128 */
1129
3d07d22b
FT
1130 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1131 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4
LT
1132 NCR5380_write(MODE_REG, MR_BASE);
1133
aff0cf9a 1134 /*
1da177e4
LT
1135 * Reselect interrupts must be turned off prior to the dropping of BSY,
1136 * otherwise we will trigger an interrupt.
1137 */
1138 NCR5380_write(SELECT_ENABLE_REG, 0);
1139
11d2f63b
FT
1140 spin_unlock_irq(&hostdata->lock);
1141
1da177e4 1142 /*
aff0cf9a 1143 * The initiator shall then wait at least two deskew delays and release
1da177e4
LT
1144 * the BSY signal.
1145 */
0d2cf867 1146 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */
1da177e4
LT
1147
1148 /* Reset BSY */
3d07d22b
FT
1149 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1150 ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1da177e4 1151
aff0cf9a 1152 /*
1da177e4 1153 * Something weird happens when we cease to drive BSY - looks
aff0cf9a 1154 * like the board/chip is letting us do another read before the
1da177e4
LT
1155 * appropriate propagation delay has expired, and we're confusing
1156 * a BSY signal from ourselves as the target's response to SELECTION.
1157 *
1158 * A small delay (the 'C++' frontend breaks the pipeline with an
1159 * unnecessary jump, making it work on my 386-33/Trantor T128, the
aff0cf9a
FT
1160 * tighter 'C' code breaks and requires this) solves the problem -
1161 * the 1 us delay is arbitrary, and only used because this delay will
1162 * be the same on other platforms and since it works here, it should
1da177e4
LT
1163 * work there.
1164 *
1165 * wingel suggests that this could be due to failing to wait
1166 * one deskew delay.
1167 */
1168
1169 udelay(1);
1170
b746545f 1171 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1da177e4 1172
aff0cf9a
FT
1173 /*
1174 * The SCSI specification calls for a 250 ms timeout for the actual
1da177e4
LT
1175 * selection.
1176 */
1177
ae753a33
FT
1178 err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY,
1179 msecs_to_jiffies(250));
1da177e4 1180
1da177e4 1181 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
11d2f63b 1182 spin_lock_irq(&hostdata->lock);
1da177e4
LT
1183 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1184 NCR5380_reselect(instance);
cd400825
FT
1185 if (!hostdata->connected)
1186 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
6a6ff4ac 1187 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
707d62b3 1188 goto out;
1da177e4 1189 }
ae753a33
FT
1190
1191 if (err < 0) {
11d2f63b 1192 spin_lock_irq(&hostdata->lock);
ae753a33 1193 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
ae753a33 1194 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1195 /* Can't touch cmd if it has been reclaimed by the scsi ML */
1196 if (hostdata->selecting) {
1197 cmd->result = DID_BAD_TARGET << 16;
1198 complete_cmd(instance, cmd);
1199 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1200 cmd = NULL;
1201 }
1202 goto out;
ae753a33
FT
1203 }
1204
aff0cf9a
FT
1205 /*
1206 * No less than two deskew delays after the initiator detects the
1207 * BSY signal is true, it shall release the SEL signal and may
1da177e4
LT
1208 * change the DATA BUS. -wingel
1209 */
1210
1211 udelay(1);
1212
1213 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1214
1da177e4 1215 /*
aff0cf9a 1216 * Since we followed the SCSI spec, and raised ATN while SEL
1da177e4
LT
1217 * was true but before BSY was false during selection, the information
1218 * transfer phase should be a MESSAGE OUT phase so that we can send the
1219 * IDENTIFY message.
aff0cf9a 1220 *
1da177e4
LT
1221 * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG
1222 * message (2 bytes) with a tag ID that we increment with every command
1223 * until it wraps back to 0.
1224 *
1225 * XXX - it turns out that there are some broken SCSI-II devices,
594d4ba3
FT
1226 * which claim to support tagged queuing but fail when more than
1227 * some number of commands are issued at once.
1da177e4
LT
1228 */
1229
1230 /* Wait for start of REQ/ACK handshake */
1231
1da177e4 1232 err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 1233 spin_lock_irq(&hostdata->lock);
1cc160e1 1234 if (err < 0) {
55500d9b
FT
1235 shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1236 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1da177e4 1237 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
707d62b3
FT
1238 goto out;
1239 }
1240 if (!hostdata->selecting) {
1241 do_abort(instance);
1242 goto out;
1da177e4
LT
1243 }
1244
b746545f
FT
1245 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1246 scmd_id(cmd));
22f5f10d 1247 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1da177e4
LT
1248
1249 len = 1;
1250 cmd->tag = 0;
1251
1252 /* Send message(s) */
1253 data = tmp;
1254 phase = PHASE_MSGOUT;
1255 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f 1256 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1da177e4 1257 /* XXX need to handle errors here */
11d2f63b 1258
1da177e4 1259 hostdata->connected = cmd;
3d07d22b 1260 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1da177e4 1261
28424d3a 1262 initialize_SCp(cmd);
1da177e4 1263
707d62b3
FT
1264 cmd = NULL;
1265
1266out:
1267 if (!hostdata->selecting)
1268 return NULL;
1269 hostdata->selecting = NULL;
1270 return cmd;
1da177e4
LT
1271}
1272
aff0cf9a
FT
1273/*
1274 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
594d4ba3 1275 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1276 *
1277 * Purpose : transfers data in given phase using polled I/O
1278 *
aff0cf9a 1279 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1280 * what phase is expected, *count - pointer to number of
1281 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1282 *
1da177e4 1283 * Returns : -1 when different phase is entered without transferring
0d2cf867 1284 * maximum number of bytes, 0 if all bytes are transferred or exit
594d4ba3 1285 * is in same phase.
1da177e4 1286 *
594d4ba3 1287 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1288 *
1289 * XXX Note : handling for bus free may be useful.
1290 */
1291
1292/*
aff0cf9a 1293 * Note : this code is not as quick as it could be, however it
1da177e4
LT
1294 * IS 100% reliable, and for the actual data transfer where speed
1295 * counts, we will always do a pseudo DMA or DMA transfer.
1296 */
1297
0d2cf867
FT
1298static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1299 unsigned char *phase, int *count,
1300 unsigned char **data)
1301{
1da177e4
LT
1302 unsigned char p = *phase, tmp;
1303 int c = *count;
1304 unsigned char *d = *data;
1da177e4 1305
aff0cf9a
FT
1306 /*
1307 * The NCR5380 chip will only drive the SCSI bus when the
1da177e4
LT
1308 * phase specified in the appropriate bits of the TARGET COMMAND
1309 * REGISTER match the STATUS REGISTER
1310 */
1311
0d2cf867 1312 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1da177e4 1313
1da177e4 1314 do {
aff0cf9a
FT
1315 /*
1316 * Wait for assertion of REQ, after which the phase bits will be
1317 * valid
1da177e4
LT
1318 */
1319
686f3990 1320 if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1da177e4 1321 break;
1da177e4 1322
b746545f 1323 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1da177e4
LT
1324
1325 /* Check for phase mismatch */
686f3990 1326 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
b746545f
FT
1327 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1328 NCR5380_dprint_phase(NDEBUG_PIO, instance);
1da177e4
LT
1329 break;
1330 }
0d2cf867 1331
1da177e4
LT
1332 /* Do actual transfer from SCSI bus to / from memory */
1333 if (!(p & SR_IO))
1334 NCR5380_write(OUTPUT_DATA_REG, *d);
1335 else
1336 *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1337
1338 ++d;
1339
aff0cf9a 1340 /*
1da177e4
LT
1341 * The SCSI standard suggests that in MSGOUT phase, the initiator
1342 * should drop ATN on the last byte of the message phase
1343 * after REQ has been asserted for the handshake but before
1344 * the initiator raises ACK.
1345 */
1346
1347 if (!(p & SR_IO)) {
1348 if (!((p & SR_MSG) && c > 1)) {
1349 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1350 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1351 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1352 ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1da177e4 1353 } else {
3d07d22b
FT
1354 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1355 ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1da177e4 1356 NCR5380_dprint(NDEBUG_PIO, instance);
3d07d22b
FT
1357 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1358 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1da177e4
LT
1359 }
1360 } else {
1361 NCR5380_dprint(NDEBUG_PIO, instance);
1362 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1363 }
1364
a2edc4a6
FT
1365 if (NCR5380_poll_politely(instance,
1366 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1367 break;
1368
b746545f 1369 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1da177e4
LT
1370
1371/*
aff0cf9a
FT
1372 * We have several special cases to consider during REQ/ACK handshaking :
1373 * 1. We were in MSGOUT phase, and we are on the last byte of the
594d4ba3 1374 * message. ATN must be dropped as ACK is dropped.
1da177e4 1375 *
aff0cf9a 1376 * 2. We are in a MSGIN phase, and we are on the last byte of the
594d4ba3
FT
1377 * message. We must exit with ACK asserted, so that the calling
1378 * code may raise ATN before dropping ACK to reject the message.
1da177e4
LT
1379 *
1380 * 3. ACK and ATN are clear and the target may proceed as normal.
1381 */
1382 if (!(p == PHASE_MSGIN && c == 1)) {
1383 if (p == PHASE_MSGOUT && c > 1)
1384 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1385 else
1386 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1387 }
1388 } while (--c);
1389
b746545f 1390 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1da177e4
LT
1391
1392 *count = c;
1393 *data = d;
1394 tmp = NCR5380_read(STATUS_REG);
a2edc4a6
FT
1395 /* The phase read from the bus is valid if either REQ is (already)
1396 * asserted or if ACK hasn't been released yet. The latter applies if
1397 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1398 */
1399 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1da177e4
LT
1400 *phase = tmp & PHASE_MASK;
1401 else
1402 *phase = PHASE_UNKNOWN;
1403
1404 if (!c || (*phase == p))
1405 return 0;
1406 else
1407 return -1;
1408}
1409
1410/**
636b1ec8
FT
1411 * do_reset - issue a reset command
1412 * @instance: adapter to reset
1da177e4 1413 *
636b1ec8
FT
1414 * Issue a reset sequence to the NCR5380 and try and get the bus
1415 * back into sane shape.
1da177e4 1416 *
636b1ec8
FT
1417 * This clears the reset interrupt flag because there may be no handler for
1418 * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1419 * been installed. And when in EH we may have released the ST DMA interrupt.
1da177e4 1420 */
aff0cf9a 1421
54d8fe44
FT
1422static void do_reset(struct Scsi_Host *instance)
1423{
636b1ec8
FT
1424 unsigned long flags;
1425
1426 local_irq_save(flags);
1427 NCR5380_write(TARGET_COMMAND_REG,
1428 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1da177e4 1429 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
636b1ec8 1430 udelay(50);
1da177e4 1431 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
636b1ec8
FT
1432 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1433 local_irq_restore(flags);
1da177e4
LT
1434}
1435
80d3eb6d
FT
1436/**
1437 * do_abort - abort the currently established nexus by going to
1438 * MESSAGE OUT phase and sending an ABORT message.
1439 * @instance: relevant scsi host instance
1da177e4 1440 *
80d3eb6d 1441 * Returns 0 on success, -1 on failure.
1da177e4
LT
1442 */
1443
54d8fe44
FT
1444static int do_abort(struct Scsi_Host *instance)
1445{
1da177e4
LT
1446 unsigned char *msgptr, phase, tmp;
1447 int len;
1448 int rc;
1da177e4
LT
1449
1450 /* Request message out phase */
1451 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1452
aff0cf9a
FT
1453 /*
1454 * Wait for the target to indicate a valid phase by asserting
1455 * REQ. Once this happens, we'll have either a MSGOUT phase
1456 * and can immediately send the ABORT message, or we'll have some
1da177e4 1457 * other phase and will have to source/sink data.
aff0cf9a 1458 *
1da177e4
LT
1459 * We really don't care what value was on the bus or what value
1460 * the target sees, so we just handshake.
1461 */
1462
80d3eb6d 1463 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1cc160e1 1464 if (rc < 0)
80d3eb6d 1465 goto timeout;
1da177e4 1466
f35d3474 1467 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
aff0cf9a 1468
1da177e4
LT
1469 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1470
f35d3474 1471 if (tmp != PHASE_MSGOUT) {
0d2cf867
FT
1472 NCR5380_write(INITIATOR_COMMAND_REG,
1473 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
54d8fe44 1474 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ);
1cc160e1 1475 if (rc < 0)
80d3eb6d
FT
1476 goto timeout;
1477 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1da177e4 1478 }
0d2cf867 1479
1da177e4
LT
1480 tmp = ABORT;
1481 msgptr = &tmp;
1482 len = 1;
1483 phase = PHASE_MSGOUT;
54d8fe44 1484 NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1da177e4
LT
1485
1486 /*
1487 * If we got here, and the command completed successfully,
1488 * we're about to go into bus free state.
1489 */
1490
1491 return len ? -1 : 0;
80d3eb6d
FT
1492
1493timeout:
1494 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1495 return -1;
1da177e4
LT
1496}
1497
1498#if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL)
aff0cf9a
FT
1499/*
1500 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
594d4ba3 1501 * unsigned char *phase, int *count, unsigned char **data)
1da177e4
LT
1502 *
1503 * Purpose : transfers data in given phase using either real
594d4ba3 1504 * or pseudo DMA.
1da177e4 1505 *
aff0cf9a 1506 * Inputs : instance - instance of driver, *phase - pointer to
594d4ba3
FT
1507 * what phase is expected, *count - pointer to number of
1508 * bytes to transfer, **data - pointer to data pointer.
aff0cf9a 1509 *
1da177e4 1510 * Returns : -1 when different phase is entered without transferring
594d4ba3
FT
1511 * maximum number of bytes, 0 if all bytes or transferred or exit
1512 * is in same phase.
1da177e4 1513 *
594d4ba3 1514 * Also, *phase, *count, *data are modified in place.
1da177e4
LT
1515 */
1516
1517
0d2cf867
FT
1518static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1519 unsigned char *phase, int *count,
1520 unsigned char **data)
1521{
1522 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1523 register int c = *count;
1524 register unsigned char p = *phase;
1525 register unsigned char *d = *data;
1526 unsigned char tmp;
1527 int foo;
1528#if defined(REAL_DMA_POLL)
1529 int cnt, toPIO;
1530 unsigned char saved_data = 0, overrun = 0, residue;
1531#endif
1532
1da177e4
LT
1533 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1534 *phase = tmp;
1535 return -1;
1536 }
1537#if defined(REAL_DMA) || defined(REAL_DMA_POLL)
1da177e4 1538 if (p & SR_IO) {
9db6024e
FT
1539 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS))
1540 c -= 2;
1da177e4 1541 }
1da177e4 1542 hostdata->dma_len = (p & SR_IO) ? NCR5380_dma_read_setup(instance, d, c) : NCR5380_dma_write_setup(instance, d, c);
b746545f
FT
1543
1544 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1545 (p & SR_IO) ? "receive" : "send", c, *data);
1da177e4
LT
1546#endif
1547
1548 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1549
1550#ifdef REAL_DMA
cd400825
FT
1551 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1552 MR_ENABLE_EOP_INTR);
1da177e4 1553#elif defined(REAL_DMA_POLL)
cd400825 1554 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1555#else
1556 /*
1557 * Note : on my sample board, watch-dog timeouts occurred when interrupts
aff0cf9a 1558 * were not disabled for the duration of a single DMA transfer, from
1da177e4
LT
1559 * before the setting of DMA mode to after transfer of the last byte.
1560 */
1561
55181be8 1562 if (hostdata->flags & FLAG_NO_DMA_FIXUP)
cd400825
FT
1563 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1564 MR_ENABLE_EOP_INTR);
1da177e4 1565 else
cd400825 1566 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1da177e4
LT
1567#endif /* def REAL_DMA */
1568
52a6a1cb 1569 dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG));
1da177e4 1570
aff0cf9a 1571 /*
594d4ba3
FT
1572 * On the PAS16 at least I/O recovery delays are not needed here.
1573 * Everyone else seems to want them.
1da177e4
LT
1574 */
1575
1576 if (p & SR_IO) {
1577 io_recovery_delay(1);
1578 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1579 } else {
1580 io_recovery_delay(1);
1581 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1582 io_recovery_delay(1);
1583 NCR5380_write(START_DMA_SEND_REG, 0);
1584 io_recovery_delay(1);
1585 }
1586
1587#if defined(REAL_DMA_POLL)
1588 do {
1589 tmp = NCR5380_read(BUS_AND_STATUS_REG);
1590 } while ((tmp & BASR_PHASE_MATCH) && !(tmp & (BASR_BUSY_ERROR | BASR_END_DMA_TRANSFER)));
1591
1592/*
c16df32e
FT
1593 * At this point, either we've completed DMA, or we have a phase mismatch,
1594 * or we've unexpectedly lost BUSY (which is a real error).
1595 *
1596 * For DMA sends, we want to wait until the last byte has been
1597 * transferred out over the bus before we turn off DMA mode. Alas, there
1598 * seems to be no terribly good way of doing this on a 5380 under all
1599 * conditions. For non-scatter-gather operations, we can wait until REQ
1600 * and ACK both go false, or until a phase mismatch occurs. Gather-sends
1601 * are nastier, since the device will be expecting more data than we
1602 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we
1603 * could test Last Byte Sent to assure transfer (I imagine this is precisely
1604 * why this signal was added to the newer chips) but on the older 538[01]
1605 * this signal does not exist. The workaround for this lack is a watchdog;
1606 * we bail out of the wait-loop after a modest amount of wait-time if
1607 * the usual exit conditions are not met. Not a terribly clean or
1608 * correct solution :-%
1609 *
1610 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1611 * If the chip is in DMA receive mode, it will respond to a target's
1612 * REQ by latching the SCSI data into the INPUT DATA register and asserting
1613 * ACK, even if it has _already_ been notified by the DMA controller that
1614 * the current DMA transfer has completed! If the NCR5380 is then taken
1615 * out of DMA mode, this already-acknowledged byte is lost. This is
1616 * not a problem for "one DMA transfer per READ command", because
1617 * the situation will never arise... either all of the data is DMA'ed
1618 * properly, or the target switches to MESSAGE IN phase to signal a
1619 * disconnection (either operation bringing the DMA to a clean halt).
1620 * However, in order to handle scatter-receive, we must work around the
1621 * problem. The chosen fix is to DMA N-2 bytes, then check for the
1622 * condition before taking the NCR5380 out of DMA mode. One or two extra
1623 * bytes are transferred via PIO as necessary to fill out the original
1624 * request.
1da177e4
LT
1625 */
1626
1627 if (p & SR_IO) {
9db6024e
FT
1628 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) {
1629 udelay(10);
1630 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
1631 (BASR_PHASE_MATCH | BASR_ACK)) {
1632 saved_data = NCR5380_read(INPUT_DATA_REGISTER);
1633 overrun = 1;
1634 }
1da177e4 1635 }
1da177e4
LT
1636 } else {
1637 int limit = 100;
1638 while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) {
1639 if (!(tmp & BASR_PHASE_MATCH))
1640 break;
1641 if (--limit < 0)
1642 break;
1643 }
1644 }
1645
b746545f
FT
1646 dsprintk(NDEBUG_DMA, "polled DMA transfer complete, basr 0x%02x, sr 0x%02x\n",
1647 tmp, NCR5380_read(STATUS_REG));
1da177e4
LT
1648
1649 NCR5380_write(MODE_REG, MR_BASE);
1650 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1651
1652 residue = NCR5380_dma_residual(instance);
1653 c -= residue;
1654 *count -= c;
1655 *data += c;
1656 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1657
9db6024e
FT
1658 if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS) &&
1659 *phase == p && (p & SR_IO) && residue == 0) {
1da177e4 1660 if (overrun) {
52a6a1cb 1661 dprintk(NDEBUG_DMA, "Got an input overrun, using saved byte\n");
1da177e4
LT
1662 **data = saved_data;
1663 *data += 1;
1664 *count -= 1;
1665 cnt = toPIO = 1;
1666 } else {
1667 printk("No overrun??\n");
1668 cnt = toPIO = 2;
1669 }
52a6a1cb 1670 dprintk(NDEBUG_DMA, "Doing %d-byte PIO to 0x%X\n", cnt, *data);
1da177e4
LT
1671 NCR5380_transfer_pio(instance, phase, &cnt, data);
1672 *count -= toPIO - cnt;
1673 }
1da177e4 1674
52a6a1cb 1675 dprintk(NDEBUG_DMA, "Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n", *data, *count, *(*data + *count - 1), *(*data + *count));
1da177e4
LT
1676 return 0;
1677
1678#elif defined(REAL_DMA)
1679 return 0;
1680#else /* defined(REAL_DMA_POLL) */
1681 if (p & SR_IO) {
55181be8
FT
1682 foo = NCR5380_pread(instance, d,
1683 hostdata->flags & FLAG_NO_DMA_FIXUP ? c : c - 1);
1684 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4 1685 /*
aff0cf9a 1686 * We can't disable DMA mode after successfully transferring
1da177e4 1687 * what we plan to be the last byte, since that would open up
aff0cf9a 1688 * a race condition where if the target asserted REQ before
1da177e4
LT
1689 * we got the DMA mode reset, the NCR5380 would have latched
1690 * an additional byte into the INPUT DATA register and we'd
1691 * have dropped it.
aff0cf9a
FT
1692 *
1693 * The workaround was to transfer one fewer bytes than we
1694 * intended to with the pseudo-DMA read function, wait for
1da177e4
LT
1695 * the chip to latch the last byte, read it, and then disable
1696 * pseudo-DMA mode.
aff0cf9a 1697 *
1da177e4
LT
1698 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1699 * REQ is deasserted when ACK is asserted, and not reasserted
1700 * until ACK goes false. Since the NCR5380 won't lower ACK
1701 * until DACK is asserted, which won't happen unless we twiddle
aff0cf9a
FT
1702 * the DMA port or we take the NCR5380 out of DMA mode, we
1703 * can guarantee that we won't handshake another extra
1da177e4
LT
1704 * byte.
1705 */
1706
55181be8
FT
1707 if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG,
1708 BASR_DRQ, BASR_DRQ, HZ) < 0) {
1709 foo = -1;
1710 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1711 }
1712 if (NCR5380_poll_politely(instance, STATUS_REG,
1713 SR_REQ, 0, HZ) < 0) {
1714 foo = -1;
1715 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1da177e4 1716 }
55181be8 1717 d[c - 1] = NCR5380_read(INPUT_DATA_REG);
1da177e4 1718 }
1da177e4 1719 } else {
1da177e4 1720 foo = NCR5380_pwrite(instance, d, c);
55181be8 1721 if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1da177e4 1722 /*
aff0cf9a
FT
1723 * Wait for the last byte to be sent. If REQ is being asserted for
1724 * the byte we're interested, we'll ACK it and it will go false.
1da177e4 1725 */
55181be8
FT
1726 if (NCR5380_poll_politely2(instance,
1727 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1728 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1729 foo = -1;
1730 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1da177e4
LT
1731 }
1732 }
1da177e4
LT
1733 }
1734 NCR5380_write(MODE_REG, MR_BASE);
1735 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
cd400825 1736 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1da177e4
LT
1737 *data = d + c;
1738 *count = 0;
1739 *phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1da177e4
LT
1740 return foo;
1741#endif /* def REAL_DMA */
1742}
1743#endif /* defined(REAL_DMA) | defined(PSEUDO_DMA) */
1744
1745/*
1746 * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1747 *
aff0cf9a 1748 * Purpose : run through the various SCSI phases and do as the target
594d4ba3
FT
1749 * directs us to. Operates on the currently connected command,
1750 * instance->connected.
1da177e4
LT
1751 *
1752 * Inputs : instance, instance for which we are doing commands
1753 *
aff0cf9a 1754 * Side effects : SCSI things happen, the disconnected queue will be
594d4ba3
FT
1755 * modified if a command disconnects, *instance->connected will
1756 * change.
1da177e4 1757 *
aff0cf9a 1758 * XXX Note : we need to watch for bus free or a reset condition here
594d4ba3 1759 * to recover from an unexpected bus free condition.
1da177e4
LT
1760 */
1761
0d2cf867
FT
1762static void NCR5380_information_transfer(struct Scsi_Host *instance)
1763{
e8a60144 1764 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
1765 unsigned char msgout = NOP;
1766 int sink = 0;
1767 int len;
1da177e4 1768 int transfersize;
1da177e4
LT
1769 unsigned char *data;
1770 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
11d2f63b 1771 struct scsi_cmnd *cmd;
1da177e4 1772
11d2f63b 1773 while ((cmd = hostdata->connected)) {
32b26a10
FT
1774 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1775
1da177e4
LT
1776 tmp = NCR5380_read(STATUS_REG);
1777 /* We only have a valid SCSI phase when REQ is asserted */
1778 if (tmp & SR_REQ) {
1779 phase = (tmp & PHASE_MASK);
1780 if (phase != old_phase) {
1781 old_phase = phase;
1782 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1783 }
1784 if (sink && (phase != PHASE_MSGOUT)) {
1785 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1786
3d07d22b
FT
1787 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1788 ICR_ASSERT_ACK);
0d2cf867
FT
1789 while (NCR5380_read(STATUS_REG) & SR_REQ)
1790 ;
3d07d22b
FT
1791 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1792 ICR_ASSERT_ATN);
1da177e4
LT
1793 sink = 0;
1794 continue;
1795 }
0d2cf867 1796
1da177e4 1797 switch (phase) {
1da177e4
LT
1798 case PHASE_DATAOUT:
1799#if (NDEBUG & NDEBUG_NO_DATAOUT)
6a6ff4ac 1800 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1da177e4
LT
1801 sink = 1;
1802 do_abort(instance);
1803 cmd->result = DID_ERROR << 16;
677e0194 1804 complete_cmd(instance, cmd);
dc183965 1805 hostdata->connected = NULL;
1da177e4
LT
1806 return;
1807#endif
bf1a0c6f 1808 case PHASE_DATAIN:
aff0cf9a 1809 /*
1da177e4
LT
1810 * If there is no room left in the current buffer in the
1811 * scatter-gather list, move onto the next one.
1812 */
1813
1814 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1815 ++cmd->SCp.buffer;
1816 --cmd->SCp.buffers_residual;
1817 cmd->SCp.this_residual = cmd->SCp.buffer->length;
45711f1a 1818 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
b746545f
FT
1819 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1820 cmd->SCp.this_residual,
1821 cmd->SCp.buffers_residual);
1da177e4 1822 }
0d2cf867 1823
1da177e4 1824 /*
aff0cf9a 1825 * The preferred transfer method is going to be
1da177e4
LT
1826 * PSEUDO-DMA for systems that are strictly PIO,
1827 * since we can let the hardware do the handshaking.
1828 *
1829 * For this to work, we need to know the transfersize
1830 * ahead of time, since the pseudo-DMA code will sit
1831 * in an unconditional loop.
1832 */
1833
1834#if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
ff3d4578
FT
1835 transfersize = 0;
1836 if (!cmd->device->borken &&
1837 !(hostdata->flags & FLAG_NO_PSEUDO_DMA))
1838 transfersize = NCR5380_dma_xfer_len(instance, cmd, phase);
1839
1840 if (transfersize) {
1da177e4 1841 len = transfersize;
0d2cf867
FT
1842 if (NCR5380_transfer_dma(instance, &phase,
1843 &len, (unsigned char **)&cmd->SCp.ptr)) {
1da177e4 1844 /*
0d2cf867
FT
1845 * If the watchdog timer fires, all future
1846 * accesses to this device will use the
1847 * polled-IO.
1da177e4 1848 */
017560fc 1849 scmd_printk(KERN_INFO, cmd,
0d2cf867 1850 "switching to slow handshake\n");
1da177e4 1851 cmd->device->borken = 1;
1da177e4
LT
1852 sink = 1;
1853 do_abort(instance);
1854 cmd->result = DID_ERROR << 16;
1da177e4
LT
1855 /* XXX - need to source or sink data here, as appropriate */
1856 } else
1857 cmd->SCp.this_residual -= transfersize - len;
1858 } else
1859#endif /* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */
11d2f63b 1860 {
1678847e
FT
1861 /* Break up transfer into 3 ms chunks,
1862 * presuming 6 accesses per handshake.
1863 */
1864 transfersize = min((unsigned long)cmd->SCp.this_residual,
1865 hostdata->accesses_per_ms / 2);
1866 len = transfersize;
1867 NCR5380_transfer_pio(instance, &phase, &len,
3d07d22b 1868 (unsigned char **)&cmd->SCp.ptr);
1678847e 1869 cmd->SCp.this_residual -= transfersize - len;
11d2f63b 1870 }
1678847e 1871 return;
1da177e4
LT
1872 case PHASE_MSGIN:
1873 len = 1;
1874 data = &tmp;
1875 NCR5380_transfer_pio(instance, &phase, &len, &data);
1876 cmd->SCp.Message = tmp;
1877
1878 switch (tmp) {
1da177e4
LT
1879 case ABORT:
1880 case COMMAND_COMPLETE:
1881 /* Accept message by clearing ACK */
1882 sink = 1;
1883 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0d3d9a42
FT
1884 dsprintk(NDEBUG_QUEUES, instance,
1885 "COMMAND COMPLETE %p target %d lun %llu\n",
1886 cmd, scmd_id(cmd), cmd->device->lun);
1887
1da177e4 1888 hostdata->connected = NULL;
1da177e4 1889
f27db8eb
FT
1890 cmd->result &= ~0xffff;
1891 cmd->result |= cmd->SCp.Status;
1892 cmd->result |= cmd->SCp.Message << 8;
28424d3a 1893
f27db8eb 1894 if (cmd->cmnd[0] == REQUEST_SENSE)
677e0194 1895 complete_cmd(instance, cmd);
f27db8eb
FT
1896 else {
1897 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1898 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1899 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1900 cmd);
1901 list_add_tail(&ncmd->list,
1902 &hostdata->autosense);
1903 } else
1904 complete_cmd(instance, cmd);
1da177e4
LT
1905 }
1906
aff0cf9a
FT
1907 /*
1908 * Restore phase bits to 0 so an interrupted selection,
1da177e4
LT
1909 * arbitration can resume.
1910 */
1911 NCR5380_write(TARGET_COMMAND_REG, 0);
72064a78
FT
1912
1913 /* Enable reselect interrupts */
1914 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1da177e4
LT
1915 return;
1916 case MESSAGE_REJECT:
1917 /* Accept message by clearing ACK */
1918 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1919 switch (hostdata->last_message) {
1920 case HEAD_OF_QUEUE_TAG:
1921 case ORDERED_QUEUE_TAG:
1922 case SIMPLE_QUEUE_TAG:
1923 cmd->device->simple_tags = 0;
9cb78c16 1924 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1da177e4
LT
1925 break;
1926 default:
1927 break;
1928 }
340b9612 1929 break;
0d2cf867
FT
1930 case DISCONNECT:
1931 /* Accept message by clearing ACK */
1932 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1933 hostdata->connected = NULL;
1934 list_add(&ncmd->list, &hostdata->disconnected);
1935 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1936 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1937 cmd, scmd_id(cmd), cmd->device->lun);
0d3d9a42 1938
0d2cf867
FT
1939 /*
1940 * Restore phase bits to 0 so an interrupted selection,
1941 * arbitration can resume.
1942 */
1943 NCR5380_write(TARGET_COMMAND_REG, 0);
1da177e4 1944
0d2cf867
FT
1945 /* Enable reselect interrupts */
1946 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1947 return;
aff0cf9a 1948 /*
1da177e4 1949 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
aff0cf9a 1950 * operation, in violation of the SCSI spec so we can safely
1da177e4
LT
1951 * ignore SAVE/RESTORE pointers calls.
1952 *
aff0cf9a 1953 * Unfortunately, some disks violate the SCSI spec and
1da177e4 1954 * don't issue the required SAVE_POINTERS message before
aff0cf9a 1955 * disconnecting, and we have to break spec to remain
1da177e4
LT
1956 * compatible.
1957 */
1958 case SAVE_POINTERS:
1959 case RESTORE_POINTERS:
1960 /* Accept message by clearing ACK */
1961 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1962 break;
1963 case EXTENDED_MESSAGE:
c16df32e
FT
1964 /*
1965 * Start the message buffer with the EXTENDED_MESSAGE
1966 * byte, since spi_print_msg() wants the whole thing.
1967 */
1da177e4
LT
1968 extended_msg[0] = EXTENDED_MESSAGE;
1969 /* Accept first byte by clearing ACK */
1970 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
11d2f63b
FT
1971
1972 spin_unlock_irq(&hostdata->lock);
1973
b746545f 1974 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1da177e4
LT
1975
1976 len = 2;
1977 data = extended_msg + 1;
1978 phase = PHASE_MSGIN;
1979 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1980 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1981 (int)extended_msg[1],
1982 (int)extended_msg[2]);
1da177e4 1983
e0783ed3
FT
1984 if (!len && extended_msg[1] > 0 &&
1985 extended_msg[1] <= sizeof(extended_msg) - 2) {
1da177e4
LT
1986 /* Accept third byte by clearing ACK */
1987 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1988 len = extended_msg[1] - 1;
1989 data = extended_msg + 3;
1990 phase = PHASE_MSGIN;
1991
1992 NCR5380_transfer_pio(instance, &phase, &len, &data);
b746545f
FT
1993 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1994 len);
1da177e4
LT
1995
1996 switch (extended_msg[2]) {
1997 case EXTENDED_SDTR:
1998 case EXTENDED_WDTR:
1999 case EXTENDED_MODIFY_DATA_POINTER:
2000 case EXTENDED_EXTENDED_IDENTIFY:
2001 tmp = 0;
2002 }
2003 } else if (len) {
6a6ff4ac 2004 shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1da177e4
LT
2005 tmp = 0;
2006 } else {
6a6ff4ac
FT
2007 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
2008 extended_msg[2], extended_msg[1]);
1da177e4
LT
2009 tmp = 0;
2010 }
11d2f63b
FT
2011
2012 spin_lock_irq(&hostdata->lock);
2013 if (!hostdata->connected)
2014 return;
2015
1da177e4
LT
2016 /* Fall through to reject message */
2017
aff0cf9a
FT
2018 /*
2019 * If we get something weird that we aren't expecting,
1da177e4
LT
2020 * reject it.
2021 */
2022 default:
2023 if (!tmp) {
6a6ff4ac 2024 shost_printk(KERN_ERR, instance, "rejecting message ");
1abfd370 2025 spi_print_msg(extended_msg);
1da177e4
LT
2026 printk("\n");
2027 } else if (tmp != EXTENDED_MESSAGE)
017560fc 2028 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
2029 "rejecting unknown message %02x\n",
2030 tmp);
1da177e4 2031 else
017560fc 2032 scmd_printk(KERN_INFO, cmd,
0d2cf867
FT
2033 "rejecting unknown extended message code %02x, length %d\n",
2034 extended_msg[1], extended_msg[0]);
1da177e4
LT
2035
2036 msgout = MESSAGE_REJECT;
2037 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
2038 break;
0d2cf867 2039 } /* switch (tmp) */
1da177e4
LT
2040 break;
2041 case PHASE_MSGOUT:
2042 len = 1;
2043 data = &msgout;
2044 hostdata->last_message = msgout;
2045 NCR5380_transfer_pio(instance, &phase, &len, &data);
2046 if (msgout == ABORT) {
1da177e4
LT
2047 hostdata->connected = NULL;
2048 cmd->result = DID_ERROR << 16;
677e0194 2049 complete_cmd(instance, cmd);
1da177e4
LT
2050 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
2051 return;
2052 }
2053 msgout = NOP;
2054 break;
2055 case PHASE_CMDOUT:
2056 len = cmd->cmd_len;
2057 data = cmd->cmnd;
aff0cf9a
FT
2058 /*
2059 * XXX for performance reasons, on machines with a
2060 * PSEUDO-DMA architecture we should probably
2061 * use the dma transfer function.
1da177e4
LT
2062 */
2063 NCR5380_transfer_pio(instance, &phase, &len, &data);
1da177e4
LT
2064 break;
2065 case PHASE_STATIN:
2066 len = 1;
2067 data = &tmp;
2068 NCR5380_transfer_pio(instance, &phase, &len, &data);
2069 cmd->SCp.Status = tmp;
2070 break;
2071 default:
6a6ff4ac 2072 shost_printk(KERN_ERR, instance, "unknown phase\n");
4dde8f7d 2073 NCR5380_dprint(NDEBUG_ANY, instance);
0d2cf867 2074 } /* switch(phase) */
686f3990 2075 } else {
11d2f63b 2076 spin_unlock_irq(&hostdata->lock);
686f3990 2077 NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
11d2f63b 2078 spin_lock_irq(&hostdata->lock);
1da177e4 2079 }
11d2f63b 2080 }
1da177e4
LT
2081}
2082
2083/*
2084 * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2085 *
aff0cf9a 2086 * Purpose : does reselection, initializing the instance->connected
594d4ba3
FT
2087 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2088 * nexus has been reestablished,
aff0cf9a 2089 *
1da177e4 2090 * Inputs : instance - this instance of the NCR5380.
1da177e4
LT
2091 */
2092
0d2cf867
FT
2093static void NCR5380_reselect(struct Scsi_Host *instance)
2094{
e8a60144 2095 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4
LT
2096 unsigned char target_mask;
2097 unsigned char lun, phase;
2098 int len;
2099 unsigned char msg[3];
2100 unsigned char *data;
32b26a10
FT
2101 struct NCR5380_cmd *ncmd;
2102 struct scsi_cmnd *tmp;
1da177e4
LT
2103
2104 /*
2105 * Disable arbitration, etc. since the host adapter obviously
2106 * lost, and tell an interrupted NCR5380_select() to restart.
2107 */
2108
2109 NCR5380_write(MODE_REG, MR_BASE);
1da177e4
LT
2110
2111 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
b746545f
FT
2112
2113 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
1da177e4 2114
aff0cf9a 2115 /*
1da177e4
LT
2116 * At this point, we have detected that our SCSI ID is on the bus,
2117 * SEL is true and BSY was false for at least one bus settle delay
2118 * (400 ns).
2119 *
2120 * We must assert BSY ourselves, until the target drops the SEL
2121 * signal.
2122 */
2123
2124 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
72064a78
FT
2125 if (NCR5380_poll_politely(instance,
2126 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2127 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2128 return;
2129 }
1da177e4
LT
2130 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2131
2132 /*
2133 * Wait for target to go into MSGIN.
1da177e4
LT
2134 */
2135
1cc160e1 2136 if (NCR5380_poll_politely(instance,
72064a78
FT
2137 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2138 do_abort(instance);
2139 return;
2140 }
1da177e4
LT
2141
2142 len = 1;
2143 data = msg;
2144 phase = PHASE_MSGIN;
2145 NCR5380_transfer_pio(instance, &phase, &len, &data);
2146
72064a78
FT
2147 if (len) {
2148 do_abort(instance);
2149 return;
2150 }
2151
1da177e4 2152 if (!(msg[0] & 0x80)) {
72064a78 2153 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
1abfd370 2154 spi_print_msg(msg);
72064a78
FT
2155 printk("\n");
2156 do_abort(instance);
2157 return;
2158 }
2159 lun = msg[0] & 0x07;
1da177e4 2160
72064a78
FT
2161 /*
2162 * We need to add code for SCSI-II to track which devices have
2163 * I_T_L_Q nexuses established, and which have simple I_T_L
2164 * nexuses so we can chose to do additional data transfer.
2165 */
1da177e4 2166
72064a78
FT
2167 /*
2168 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we
2169 * just reestablished, and remove it from the disconnected queue.
2170 */
1da177e4 2171
32b26a10
FT
2172 tmp = NULL;
2173 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2174 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2175
2176 if (target_mask == (1 << scmd_id(cmd)) &&
2177 lun == (u8)cmd->device->lun) {
2178 list_del(&ncmd->list);
2179 tmp = cmd;
72064a78 2180 break;
1da177e4
LT
2181 }
2182 }
0d3d9a42
FT
2183
2184 if (tmp) {
2185 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2186 "reselect: removed %p from disconnected queue\n", tmp);
2187 } else {
72064a78
FT
2188 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2189 target_mask, lun);
2190 /*
0d2cf867
FT
2191 * Since we have an established nexus that we can't do anything
2192 * with, we must abort it.
72064a78 2193 */
1da177e4 2194 do_abort(instance);
72064a78 2195 return;
1da177e4 2196 }
72064a78
FT
2197
2198 /* Accept message by clearing ACK */
2199 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2200
2201 hostdata->connected = tmp;
b746545f
FT
2202 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu, tag %d\n",
2203 scmd_id(tmp), tmp->device->lun, tmp->tag);
1da177e4
LT
2204}
2205
2206/*
2207 * Function : void NCR5380_dma_complete (struct Scsi_Host *instance)
2208 *
2209 * Purpose : called by interrupt handler when DMA finishes or a phase
594d4ba3 2210 * mismatch occurs (which would finish the DMA transfer).
1da177e4
LT
2211 *
2212 * Inputs : instance - this instance of the NCR5380.
2213 *
710ddd0d 2214 * Returns : pointer to the scsi_cmnd structure for which the I_T_L
594d4ba3 2215 * nexus has been reestablished, on failure NULL is returned.
1da177e4
LT
2216 */
2217
2218#ifdef REAL_DMA
2219static void NCR5380_dma_complete(NCR5380_instance * instance) {
e8a60144 2220 struct NCR5380_hostdata *hostdata = shost_priv(instance);
1da177e4 2221 int transferred;
1da177e4
LT
2222
2223 /*
2224 * XXX this might not be right.
2225 *
2226 * Wait for final byte to transfer, ie wait for ACK to go false.
2227 *
aff0cf9a 2228 * We should use the Last Byte Sent bit, unfortunately this is
1da177e4
LT
2229 * not available on the 5380/5381 (only the various CMOS chips)
2230 *
2231 * FIXME: timeout, and need to handle long timeout/irq case
2232 */
2233
2234 NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ);
2235
1da177e4
LT
2236 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2237
2238 /*
2239 * The only places we should see a phase mismatch and have to send
2240 * data from the same set of pointers will be the data transfer
2241 * phases. So, residual, requested length are only important here.
2242 */
2243
2244 if (!(hostdata->connected->SCp.phase & SR_CD)) {
2245 transferred = instance->dmalen - NCR5380_dma_residual();
2246 hostdata->connected->SCp.this_residual -= transferred;
2247 hostdata->connected->SCp.ptr += transferred;
2248 }
2249}
2250#endif /* def REAL_DMA */
2251
8b00c3d5
FT
2252/**
2253 * list_find_cmd - test for presence of a command in a linked list
2254 * @haystack: list of commands
2255 * @needle: command to search for
2256 */
2257
2258static bool list_find_cmd(struct list_head *haystack,
2259 struct scsi_cmnd *needle)
2260{
2261 struct NCR5380_cmd *ncmd;
2262
2263 list_for_each_entry(ncmd, haystack, list)
2264 if (NCR5380_to_scmd(ncmd) == needle)
2265 return true;
2266 return false;
2267}
2268
2269/**
2270 * list_remove_cmd - remove a command from linked list
2271 * @haystack: list of commands
2272 * @needle: command to remove
2273 */
2274
2275static bool list_del_cmd(struct list_head *haystack,
2276 struct scsi_cmnd *needle)
2277{
2278 if (list_find_cmd(haystack, needle)) {
2279 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2280
2281 list_del(&ncmd->list);
2282 return true;
2283 }
2284 return false;
2285}
2286
2287/**
2288 * NCR5380_abort - scsi host eh_abort_handler() method
2289 * @cmd: the command to be aborted
2290 *
2291 * Try to abort a given command by removing it from queues and/or sending
2292 * the target an abort message. This may not succeed in causing a target
2293 * to abort the command. Nonetheless, the low-level driver must forget about
2294 * the command because the mid-layer reclaims it and it may be re-issued.
2295 *
2296 * The normal path taken by a command is as follows. For EH we trace this
2297 * same path to locate and abort the command.
2298 *
2299 * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2300 * [disconnected -> connected ->]...
2301 * [autosense -> connected ->] done
2302 *
8b00c3d5
FT
2303 * If cmd was not found at all then presumably it has already been completed,
2304 * in which case return SUCCESS to try to avoid further EH measures.
dc183965 2305 *
8b00c3d5 2306 * If the command has not completed yet, we must not fail to find it.
dc183965
FT
2307 * We have no option but to forget the aborted command (even if it still
2308 * lacks sense data). The mid-layer may re-issue a command that is in error
2309 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2310 * this driver are such that a command can appear on one queue only.
71a00593
FT
2311 *
2312 * The lock protects driver data structures, but EH handlers also use it
2313 * to serialize their own execution and prevent their own re-entry.
1da177e4
LT
2314 */
2315
710ddd0d
FT
2316static int NCR5380_abort(struct scsi_cmnd *cmd)
2317{
1da177e4 2318 struct Scsi_Host *instance = cmd->device->host;
e8a60144 2319 struct NCR5380_hostdata *hostdata = shost_priv(instance);
11d2f63b 2320 unsigned long flags;
8b00c3d5 2321 int result = SUCCESS;
1fa6b5fb 2322
11d2f63b
FT
2323 spin_lock_irqsave(&hostdata->lock, flags);
2324
32b26a10 2325#if (NDEBUG & NDEBUG_ANY)
8b00c3d5 2326 scmd_printk(KERN_INFO, cmd, __func__);
32b26a10 2327#endif
e5c3fddf
FT
2328 NCR5380_dprint(NDEBUG_ANY, instance);
2329 NCR5380_dprint_phase(NDEBUG_ANY, instance);
1da177e4 2330
8b00c3d5
FT
2331 if (list_del_cmd(&hostdata->unissued, cmd)) {
2332 dsprintk(NDEBUG_ABORT, instance,
2333 "abort: removed %p from issue queue\n", cmd);
2334 cmd->result = DID_ABORT << 16;
2335 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
dc183965 2336 goto out;
8b00c3d5
FT
2337 }
2338
707d62b3
FT
2339 if (hostdata->selecting == cmd) {
2340 dsprintk(NDEBUG_ABORT, instance,
2341 "abort: cmd %p == selecting\n", cmd);
2342 hostdata->selecting = NULL;
2343 cmd->result = DID_ABORT << 16;
2344 complete_cmd(instance, cmd);
2345 goto out;
2346 }
2347
8b00c3d5
FT
2348 if (list_del_cmd(&hostdata->disconnected, cmd)) {
2349 dsprintk(NDEBUG_ABORT, instance,
2350 "abort: removed %p from disconnected list\n", cmd);
71a00593
FT
2351 /* Can't call NCR5380_select() and send ABORT because that
2352 * means releasing the lock. Need a bus reset.
2353 */
dc183965
FT
2354 set_host_byte(cmd, DID_ERROR);
2355 complete_cmd(instance, cmd);
71a00593
FT
2356 result = FAILED;
2357 goto out;
8b00c3d5
FT
2358 }
2359
2360 if (hostdata->connected == cmd) {
2361 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2362 hostdata->connected = NULL;
8b00c3d5
FT
2363#ifdef REAL_DMA
2364 hostdata->dma_len = 0;
2365#endif
8b00c3d5
FT
2366 if (do_abort(instance)) {
2367 set_host_byte(cmd, DID_ERROR);
2368 complete_cmd(instance, cmd);
2369 result = FAILED;
2370 goto out;
2371 }
2372 set_host_byte(cmd, DID_ABORT);
dc183965
FT
2373 complete_cmd(instance, cmd);
2374 goto out;
2375 }
2376
2377 if (list_del_cmd(&hostdata->autosense, cmd)) {
2378 dsprintk(NDEBUG_ABORT, instance,
2379 "abort: removed %p from sense queue\n", cmd);
2380 set_host_byte(cmd, DID_ERROR);
8b00c3d5
FT
2381 complete_cmd(instance, cmd);
2382 }
2383
2384out:
2385 if (result == FAILED)
2386 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2387 else
2388 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2389
2390 queue_work(hostdata->work_q, &hostdata->main_task);
11d2f63b 2391 spin_unlock_irqrestore(&hostdata->lock, flags);
32b26a10 2392
8b00c3d5 2393 return result;
1da177e4
LT
2394}
2395
2396
3be1b3ea
FT
2397/**
2398 * NCR5380_bus_reset - reset the SCSI bus
2399 * @cmd: SCSI command undergoing EH
1da177e4 2400 *
3be1b3ea 2401 * Returns SUCCESS
1da177e4
LT
2402 */
2403
710ddd0d 2404static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
68b3aa7c
JG
2405{
2406 struct Scsi_Host *instance = cmd->device->host;
11d2f63b 2407 struct NCR5380_hostdata *hostdata = shost_priv(instance);
62717f53 2408 int i;
11d2f63b 2409 unsigned long flags;
62717f53 2410 struct NCR5380_cmd *ncmd;
68b3aa7c 2411
11d2f63b 2412 spin_lock_irqsave(&hostdata->lock, flags);
3be1b3ea
FT
2413
2414#if (NDEBUG & NDEBUG_ANY)
62717f53 2415 scmd_printk(KERN_INFO, cmd, __func__);
3be1b3ea 2416#endif
e5c3fddf
FT
2417 NCR5380_dprint(NDEBUG_ANY, instance);
2418 NCR5380_dprint_phase(NDEBUG_ANY, instance);
68b3aa7c 2419
68b3aa7c 2420 do_reset(instance);
3be1b3ea 2421
62717f53
FT
2422 /* reset NCR registers */
2423 NCR5380_write(MODE_REG, MR_BASE);
2424 NCR5380_write(TARGET_COMMAND_REG, 0);
2425 NCR5380_write(SELECT_ENABLE_REG, 0);
2426
2427 /* After the reset, there are no more connected or disconnected commands
2428 * and no busy units; so clear the low-level status here to avoid
2429 * conflicts when the mid-level code tries to wake up the affected
2430 * commands!
2431 */
2432
1884c283
FT
2433 if (list_del_cmd(&hostdata->unissued, cmd)) {
2434 cmd->result = DID_RESET << 16;
2435 cmd->scsi_done(cmd);
2436 }
2437
2438 if (hostdata->selecting) {
2439 hostdata->selecting->result = DID_RESET << 16;
2440 complete_cmd(instance, hostdata->selecting);
2441 hostdata->selecting = NULL;
2442 }
62717f53
FT
2443
2444 list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2445 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2446
2447 set_host_byte(cmd, DID_RESET);
2448 cmd->scsi_done(cmd);
2449 }
1884c283 2450 INIT_LIST_HEAD(&hostdata->disconnected);
62717f53
FT
2451
2452 list_for_each_entry(ncmd, &hostdata->autosense, list) {
2453 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2454
2455 set_host_byte(cmd, DID_RESET);
2456 cmd->scsi_done(cmd);
2457 }
1884c283 2458 INIT_LIST_HEAD(&hostdata->autosense);
62717f53
FT
2459
2460 if (hostdata->connected) {
2461 set_host_byte(hostdata->connected, DID_RESET);
2462 complete_cmd(instance, hostdata->connected);
2463 hostdata->connected = NULL;
2464 }
2465
62717f53
FT
2466 for (i = 0; i < 8; ++i)
2467 hostdata->busy[i] = 0;
2468#ifdef REAL_DMA
2469 hostdata->dma_len = 0;
2470#endif
2471
2472 queue_work(hostdata->work_q, &hostdata->main_task);
11d2f63b 2473 spin_unlock_irqrestore(&hostdata->lock, flags);
1da177e4 2474
1da177e4
LT
2475 return SUCCESS;
2476}