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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
fa195afe | 3 | * (c) Copyright 2001 Red Hat Inc. |
1da177e4 LT |
4 | * |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
e8b12f0f | 8 | * Copyright (c) 2000-2010 Adaptec, Inc. |
1d4bcdad RAR |
9 | * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) |
10 | * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) | |
1da177e4 LT |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * Module Name: | |
27 | * comminit.c | |
28 | * | |
29 | * Abstract: This supports the initialization of the host adapter commuication interface. | |
30 | * This is a platform dependent module for the pci cyclone board. | |
31 | * | |
32 | */ | |
33 | ||
34 | #include <linux/kernel.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/types.h> | |
1da177e4 LT |
37 | #include <linux/pci.h> |
38 | #include <linux/spinlock.h> | |
39 | #include <linux/slab.h> | |
40 | #include <linux/blkdev.h> | |
78cbccd3 | 41 | #include <linux/delay.h> |
1da177e4 LT |
42 | #include <linux/completion.h> |
43 | #include <linux/mm.h> | |
7c00ffa3 | 44 | #include <scsi/scsi_host.h> |
1da177e4 LT |
45 | |
46 | #include "aacraid.h" | |
47 | ||
bed30de4 MH |
48 | struct aac_common aac_config = { |
49 | .irq_mod = 1 | |
50 | }; | |
1da177e4 | 51 | |
78cbccd3 RAR |
52 | static inline int aac_is_msix_mode(struct aac_dev *dev) |
53 | { | |
8af8e1c2 | 54 | u32 status = 0; |
78cbccd3 | 55 | |
8af8e1c2 DC |
56 | if (dev->pdev->device == PMC_DEVICE_S6 || |
57 | dev->pdev->device == PMC_DEVICE_S7 || | |
58 | dev->pdev->device == PMC_DEVICE_S8) { | |
59 | status = src_readl(dev, MUnit.OMR); | |
60 | } | |
78cbccd3 RAR |
61 | return (status & AAC_INT_MODE_MSIX); |
62 | } | |
63 | ||
64 | static inline void aac_change_to_intx(struct aac_dev *dev) | |
65 | { | |
66 | aac_src_access_devreg(dev, AAC_DISABLE_MSIX); | |
67 | aac_src_access_devreg(dev, AAC_ENABLE_INTX); | |
68 | } | |
69 | ||
1da177e4 LT |
70 | static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign) |
71 | { | |
72 | unsigned char *base; | |
73 | unsigned long size, align; | |
ef616233 | 74 | const unsigned long fibsize = dev->max_fib_size; |
7c00ffa3 | 75 | const unsigned long printfbufsiz = 256; |
a1751cda RAR |
76 | unsigned long host_rrq_size, aac_init_size; |
77 | union aac_init *init; | |
1da177e4 | 78 | dma_addr_t phys; |
d8e96507 | 79 | unsigned long aac_max_hostphysmempages; |
1da177e4 | 80 | |
a1751cda RAR |
81 | if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) || |
82 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) || | |
2589624f RAR |
83 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && |
84 | !dev->sa_firmware)) { | |
a1751cda RAR |
85 | host_rrq_size = |
86 | (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) | |
87 | * sizeof(u32); | |
2589624f RAR |
88 | aac_init_size = sizeof(union aac_init); |
89 | } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && | |
90 | dev->sa_firmware) { | |
91 | host_rrq_size = (dev->scsi_host_ptr->can_queue | |
92 | + AAC_NUM_MGT_FIB) * sizeof(u32) * AAC_MAX_MSIX; | |
93 | aac_init_size = sizeof(union aac_init) + | |
94 | (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq); | |
95 | } else { | |
a1751cda | 96 | host_rrq_size = 0; |
2589624f RAR |
97 | aac_init_size = sizeof(union aac_init); |
98 | } | |
a1751cda RAR |
99 | size = fibsize + aac_init_size + commsize + commalign + |
100 | printfbufsiz + host_rrq_size; | |
101 | ||
1da177e4 LT |
102 | base = pci_alloc_consistent(dev->pdev, size, &phys); |
103 | ||
a1751cda | 104 | if (base == NULL) { |
1da177e4 LT |
105 | printk(KERN_ERR "aacraid: unable to create mapping.\n"); |
106 | return 0; | |
107 | } | |
a1751cda | 108 | |
1da177e4 LT |
109 | dev->comm_addr = (void *)base; |
110 | dev->comm_phys = phys; | |
111 | dev->comm_size = size; | |
a1751cda RAR |
112 | |
113 | if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) || | |
114 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) || | |
115 | (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)) { | |
e8b12f0f MR |
116 | dev->host_rrq = (u32 *)(base + fibsize); |
117 | dev->host_rrq_pa = phys + fibsize; | |
118 | memset(dev->host_rrq, 0, host_rrq_size); | |
119 | } | |
120 | ||
a1751cda | 121 | dev->init = (union aac_init *)(base + fibsize + host_rrq_size); |
e8b12f0f | 122 | dev->init_pa = phys + fibsize + host_rrq_size; |
1da177e4 LT |
123 | |
124 | init = dev->init; | |
125 | ||
a1751cda RAR |
126 | if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { |
127 | int i; | |
128 | u64 addr; | |
129 | ||
130 | init->r8.init_struct_revision = | |
131 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_8); | |
132 | init->r8.init_flags = cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | | |
133 | INITFLAGS_DRIVER_USES_UTC_TIME | | |
134 | INITFLAGS_DRIVER_SUPPORTS_PM); | |
135 | init->r8.init_flags |= | |
136 | cpu_to_le32(INITFLAGS_DRIVER_SUPPORTS_HBA_MODE); | |
137 | init->r8.rr_queue_count = cpu_to_le32(dev->max_msix); | |
138 | init->r8.max_io_size = | |
139 | cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9); | |
140 | init->r8.max_num_aif = init->r8.reserved1 = | |
141 | init->r8.reserved2 = 0; | |
142 | ||
143 | for (i = 0; i < dev->max_msix; i++) { | |
144 | addr = (u64)dev->host_rrq_pa + dev->vector_cap * i * | |
145 | sizeof(u32); | |
146 | init->r8.rrq[i].host_addr_high = cpu_to_le32( | |
147 | upper_32_bits(addr)); | |
148 | init->r8.rrq[i].host_addr_low = cpu_to_le32( | |
149 | lower_32_bits(addr)); | |
150 | init->r8.rrq[i].msix_id = i; | |
151 | init->r8.rrq[i].element_count = cpu_to_le16( | |
152 | (u16)dev->vector_cap); | |
153 | init->r8.rrq[i].comp_thresh = | |
154 | init->r8.rrq[i].unused = 0; | |
155 | } | |
1da177e4 | 156 | |
a1751cda RAR |
157 | pr_warn("aacraid: Comm Interface type3 enabled\n"); |
158 | } else { | |
159 | init->r7.init_struct_revision = | |
160 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION); | |
161 | if (dev->max_fib_size != sizeof(struct hw_fib)) | |
162 | init->r7.init_struct_revision = | |
163 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4); | |
164 | init->r7.no_of_msix_vectors = cpu_to_le32(SA_MINIPORT_REVISION); | |
165 | init->r7.fsrev = cpu_to_le32(dev->fsrev); | |
166 | ||
167 | /* | |
168 | * Adapter Fibs are the first thing allocated so that they | |
169 | * start page aligned | |
170 | */ | |
171 | dev->aif_base_va = (struct hw_fib *)base; | |
172 | ||
173 | init->r7.adapter_fibs_virtual_address = 0; | |
174 | init->r7.adapter_fibs_physical_address = cpu_to_le32((u32)phys); | |
175 | init->r7.adapter_fibs_size = cpu_to_le32(fibsize); | |
176 | init->r7.adapter_fib_align = cpu_to_le32(sizeof(struct hw_fib)); | |
177 | ||
178 | /* | |
179 | * number of 4k pages of host physical memory. The aacraid fw | |
180 | * needs this number to be less than 4gb worth of pages. New | |
181 | * firmware doesn't have any issues with the mapping system, but | |
182 | * older Firmware did, and had *troubles* dealing with the math | |
183 | * overloading past 32 bits, thus we must limit this field. | |
184 | */ | |
185 | aac_max_hostphysmempages = | |
186 | dma_get_required_mask(&dev->pdev->dev) >> 12; | |
187 | if (aac_max_hostphysmempages < AAC_MAX_HOSTPHYSMEMPAGES) | |
188 | init->r7.host_phys_mem_pages = | |
189 | cpu_to_le32(aac_max_hostphysmempages); | |
190 | else | |
191 | init->r7.host_phys_mem_pages = | |
192 | cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES); | |
193 | ||
194 | init->r7.init_flags = | |
195 | cpu_to_le32(INITFLAGS_DRIVER_USES_UTC_TIME | | |
196 | INITFLAGS_DRIVER_SUPPORTS_PM); | |
197 | init->r7.max_io_commands = | |
198 | cpu_to_le32(dev->scsi_host_ptr->can_queue + | |
199 | AAC_NUM_MGT_FIB); | |
200 | init->r7.max_io_size = | |
201 | cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9); | |
202 | init->r7.max_fib_size = cpu_to_le32(dev->max_fib_size); | |
203 | init->r7.max_num_aif = cpu_to_le32(dev->max_num_aif); | |
204 | ||
205 | if (dev->comm_interface == AAC_COMM_MESSAGE) { | |
206 | init->r7.init_flags |= | |
207 | cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED); | |
208 | pr_warn("aacraid: Comm Interface enabled\n"); | |
209 | } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) { | |
210 | init->r7.init_struct_revision = | |
211 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_6); | |
212 | init->r7.init_flags |= | |
213 | cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | | |
214 | INITFLAGS_NEW_COMM_TYPE1_SUPPORTED | | |
215 | INITFLAGS_FAST_JBOD_SUPPORTED); | |
216 | init->r7.host_rrq_addr_high = | |
217 | cpu_to_le32(upper_32_bits(dev->host_rrq_pa)); | |
218 | init->r7.host_rrq_addr_low = | |
219 | cpu_to_le32(lower_32_bits(dev->host_rrq_pa)); | |
220 | pr_warn("aacraid: Comm Interface type1 enabled\n"); | |
221 | } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) { | |
222 | init->r7.init_struct_revision = | |
223 | cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_7); | |
224 | init->r7.init_flags |= | |
225 | cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | | |
226 | INITFLAGS_NEW_COMM_TYPE2_SUPPORTED | | |
227 | INITFLAGS_FAST_JBOD_SUPPORTED); | |
228 | init->r7.host_rrq_addr_high = | |
229 | cpu_to_le32(upper_32_bits(dev->host_rrq_pa)); | |
230 | init->r7.host_rrq_addr_low = | |
231 | cpu_to_le32(lower_32_bits(dev->host_rrq_pa)); | |
232 | init->r7.no_of_msix_vectors = | |
233 | cpu_to_le32(dev->max_msix); | |
234 | /* must be the COMM_PREFERRED_SETTINGS values */ | |
235 | pr_warn("aacraid: Comm Interface type2 enabled\n"); | |
236 | } | |
8e0c5ebd | 237 | } |
e8b12f0f | 238 | |
1da177e4 LT |
239 | /* |
240 | * Increment the base address by the amount already used | |
241 | */ | |
a1751cda | 242 | base = base + fibsize + host_rrq_size + aac_init_size; |
e8b12f0f | 243 | phys = (dma_addr_t)((ulong)phys + fibsize + host_rrq_size + |
a1751cda | 244 | aac_init_size); |
e8b12f0f | 245 | |
1da177e4 LT |
246 | /* |
247 | * Align the beginning of Headers to commalign | |
248 | */ | |
142956af | 249 | align = (commalign - ((uintptr_t)(base) & (commalign - 1))); |
1da177e4 LT |
250 | base = base + align; |
251 | phys = phys + align; | |
252 | /* | |
253 | * Fill in addresses of the Comm Area Headers and Queues | |
254 | */ | |
255 | *commaddr = base; | |
a1751cda RAR |
256 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) |
257 | init->r7.comm_header_address = cpu_to_le32((u32)phys); | |
1da177e4 LT |
258 | /* |
259 | * Increment the base address by the size of the CommArea | |
260 | */ | |
261 | base = base + commsize; | |
262 | phys = phys + commsize; | |
263 | /* | |
264 | * Place the Printf buffer area after the Fast I/O comm area. | |
265 | */ | |
266 | dev->printfbuf = (void *)base; | |
a1751cda RAR |
267 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) { |
268 | init->r7.printfbuf = cpu_to_le32(phys); | |
269 | init->r7.printfbufsiz = cpu_to_le32(printfbufsiz); | |
270 | } | |
1da177e4 LT |
271 | memset(base, 0, printfbufsiz); |
272 | return 1; | |
273 | } | |
a1751cda | 274 | |
1da177e4 LT |
275 | static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize) |
276 | { | |
ef616233 | 277 | atomic_set(&q->numpending, 0); |
1da177e4 | 278 | q->dev = dev; |
1da177e4 LT |
279 | init_waitqueue_head(&q->cmdready); |
280 | INIT_LIST_HEAD(&q->cmdq); | |
281 | init_waitqueue_head(&q->qfull); | |
282 | spin_lock_init(&q->lockdata); | |
283 | q->lock = &q->lockdata; | |
56b58712 MH |
284 | q->headers.producer = (__le32 *)mem; |
285 | q->headers.consumer = (__le32 *)(mem+1); | |
1da177e4 LT |
286 | *(q->headers.producer) = cpu_to_le32(qsize); |
287 | *(q->headers.consumer) = cpu_to_le32(qsize); | |
288 | q->entries = qsize; | |
289 | } | |
290 | ||
291 | /** | |
292 | * aac_send_shutdown - shutdown an adapter | |
293 | * @dev: Adapter to shutdown | |
294 | * | |
295 | * This routine will send a VM_CloseAll (shutdown) request to the adapter. | |
296 | */ | |
297 | ||
298 | int aac_send_shutdown(struct aac_dev * dev) | |
299 | { | |
300 | struct fib * fibctx; | |
301 | struct aac_close *cmd; | |
302 | int status; | |
303 | ||
bfb35aa8 | 304 | fibctx = aac_fib_alloc(dev); |
7c00ffa3 MH |
305 | if (!fibctx) |
306 | return -ENOMEM; | |
bfb35aa8 | 307 | aac_fib_init(fibctx); |
1da177e4 | 308 | |
fbd18598 RAR |
309 | mutex_lock(&dev->ioctl_mutex); |
310 | dev->adapter_shutdown = 1; | |
311 | mutex_unlock(&dev->ioctl_mutex); | |
1da177e4 | 312 | |
fbd18598 | 313 | cmd = (struct aac_close *) fib_data(fibctx); |
1da177e4 | 314 | cmd->command = cpu_to_le32(VM_CloseAll); |
2c10cd43 | 315 | cmd->cid = cpu_to_le32(0xfffffffe); |
1da177e4 | 316 | |
bfb35aa8 | 317 | status = aac_fib_send(ContainerCommand, |
1da177e4 LT |
318 | fibctx, |
319 | sizeof(struct aac_close), | |
320 | FsaNormal, | |
9203344c | 321 | -2 /* Timeout silently */, 1, |
1da177e4 LT |
322 | NULL, NULL); |
323 | ||
90ee3466 | 324 | if (status >= 0) |
bfb35aa8 | 325 | aac_fib_complete(fibctx); |
cacb6dc3 PNRCEH |
326 | /* FIB should be freed only after getting the response from the F/W */ |
327 | if (status != -ERESTARTSYS) | |
328 | aac_fib_free(fibctx); | |
495c0217 MR |
329 | if ((dev->pdev->device == PMC_DEVICE_S7 || |
330 | dev->pdev->device == PMC_DEVICE_S8 || | |
331 | dev->pdev->device == PMC_DEVICE_S9) && | |
332 | dev->msi_enabled) | |
c1ef83ad | 333 | aac_set_intx_mode(dev); |
1da177e4 LT |
334 | return status; |
335 | } | |
336 | ||
337 | /** | |
338 | * aac_comm_init - Initialise FSA data structures | |
339 | * @dev: Adapter to initialise | |
340 | * | |
341 | * Initializes the data structures that are required for the FSA commuication | |
342 | * interface to operate. | |
343 | * Returns | |
344 | * 1 - if we were able to init the commuication interface. | |
345 | * 0 - If there were errors initing. This is a fatal error. | |
346 | */ | |
347 | ||
4833869e | 348 | static int aac_comm_init(struct aac_dev * dev) |
1da177e4 LT |
349 | { |
350 | unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2; | |
351 | unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES; | |
352 | u32 *headers; | |
353 | struct aac_entry * queues; | |
354 | unsigned long size; | |
355 | struct aac_queue_block * comm = dev->queues; | |
356 | /* | |
357 | * Now allocate and initialize the zone structures used as our | |
358 | * pool of FIB context records. The size of the zone is based | |
359 | * on the system memory size. We also initialize the mutex used | |
360 | * to protect the zone. | |
361 | */ | |
362 | spin_lock_init(&dev->fib_lock); | |
363 | ||
364 | /* | |
af901ca1 | 365 | * Allocate the physically contiguous space for the commuication |
1da177e4 LT |
366 | * queue headers. |
367 | */ | |
368 | ||
369 | size = hdrsize + queuesize; | |
370 | ||
371 | if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT)) | |
372 | return -ENOMEM; | |
373 | ||
374 | queues = (struct aac_entry *)(((ulong)headers) + hdrsize); | |
375 | ||
376 | /* Adapter to Host normal priority Command queue */ | |
377 | comm->queue[HostNormCmdQueue].base = queues; | |
378 | aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES); | |
379 | queues += HOST_NORM_CMD_ENTRIES; | |
380 | headers += 2; | |
381 | ||
382 | /* Adapter to Host high priority command queue */ | |
383 | comm->queue[HostHighCmdQueue].base = queues; | |
384 | aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES); | |
385 | ||
386 | queues += HOST_HIGH_CMD_ENTRIES; | |
387 | headers +=2; | |
388 | ||
389 | /* Host to adapter normal priority command queue */ | |
390 | comm->queue[AdapNormCmdQueue].base = queues; | |
391 | aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES); | |
392 | ||
393 | queues += ADAP_NORM_CMD_ENTRIES; | |
394 | headers += 2; | |
395 | ||
396 | /* host to adapter high priority command queue */ | |
397 | comm->queue[AdapHighCmdQueue].base = queues; | |
398 | aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES); | |
399 | ||
400 | queues += ADAP_HIGH_CMD_ENTRIES; | |
401 | headers += 2; | |
402 | ||
403 | /* adapter to host normal priority response queue */ | |
404 | comm->queue[HostNormRespQueue].base = queues; | |
405 | aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES); | |
406 | queues += HOST_NORM_RESP_ENTRIES; | |
407 | headers += 2; | |
408 | ||
409 | /* adapter to host high priority response queue */ | |
410 | comm->queue[HostHighRespQueue].base = queues; | |
411 | aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES); | |
412 | ||
413 | queues += HOST_HIGH_RESP_ENTRIES; | |
414 | headers += 2; | |
415 | ||
416 | /* host to adapter normal priority response queue */ | |
417 | comm->queue[AdapNormRespQueue].base = queues; | |
418 | aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES); | |
419 | ||
420 | queues += ADAP_NORM_RESP_ENTRIES; | |
421 | headers += 2; | |
422 | ||
423 | /* host to adapter high priority response queue */ | |
424 | comm->queue[AdapHighRespQueue].base = queues; | |
425 | aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES); | |
426 | ||
427 | comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock; | |
428 | comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock; | |
429 | comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock; | |
430 | comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock; | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
de665f28 MR |
435 | void aac_define_int_mode(struct aac_dev *dev) |
436 | { | |
84859c92 | 437 | int i, msi_count, min_msix; |
de665f28 MR |
438 | |
439 | msi_count = i = 0; | |
440 | /* max. vectors from GET_COMM_PREFERRED_SETTINGS */ | |
441 | if (dev->max_msix == 0 || | |
442 | dev->pdev->device == PMC_DEVICE_S6 || | |
443 | dev->sync_mode) { | |
444 | dev->max_msix = 1; | |
445 | dev->vector_cap = | |
446 | dev->scsi_host_ptr->can_queue + | |
447 | AAC_NUM_MGT_FIB; | |
448 | return; | |
449 | } | |
450 | ||
451 | /* Don't bother allocating more MSI-X vectors than cpus */ | |
452 | msi_count = min(dev->max_msix, | |
453 | (unsigned int)num_online_cpus()); | |
454 | ||
455 | dev->max_msix = msi_count; | |
456 | ||
457 | if (msi_count > AAC_MAX_MSIX) | |
458 | msi_count = AAC_MAX_MSIX; | |
459 | ||
de665f28 MR |
460 | if (msi_count > 1 && |
461 | pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) { | |
84859c92 | 462 | min_msix = 2; |
0910d8bb HR |
463 | i = pci_alloc_irq_vectors(dev->pdev, |
464 | min_msix, msi_count, | |
465 | PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); | |
84859c92 | 466 | if (i > 0) { |
de665f28 | 467 | dev->msi_enabled = 1; |
84859c92 | 468 | msi_count = i; |
de665f28 MR |
469 | } else { |
470 | dev->msi_enabled = 0; | |
e4d5c4e2 RAR |
471 | dev_err(&dev->pdev->dev, |
472 | "MSIX not supported!! Will try INTX 0x%x.\n", i); | |
de665f28 MR |
473 | } |
474 | } | |
475 | ||
476 | if (!dev->msi_enabled) | |
477 | dev->max_msix = msi_count = 1; | |
478 | else { | |
479 | if (dev->max_msix > msi_count) | |
480 | dev->max_msix = msi_count; | |
481 | } | |
2589624f RAR |
482 | if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && dev->sa_firmware) |
483 | dev->vector_cap = dev->scsi_host_ptr->can_queue + | |
484 | AAC_NUM_MGT_FIB; | |
485 | else | |
486 | dev->vector_cap = (dev->scsi_host_ptr->can_queue + | |
487 | AAC_NUM_MGT_FIB) / msi_count; | |
488 | ||
de665f28 | 489 | } |
1da177e4 LT |
490 | struct aac_dev *aac_init_adapter(struct aac_dev *dev) |
491 | { | |
7c00ffa3 MH |
492 | u32 status[5]; |
493 | struct Scsi_Host * host = dev->scsi_host_ptr; | |
11604612 | 494 | extern int aac_sync_mode; |
7c00ffa3 MH |
495 | |
496 | /* | |
497 | * Check the preferred comm settings, defaults from template. | |
498 | */ | |
cacb6dc3 PNRCEH |
499 | dev->management_fib_count = 0; |
500 | spin_lock_init(&dev->manage_lock); | |
11604612 | 501 | spin_lock_init(&dev->sync_lock); |
c6992781 | 502 | spin_lock_init(&dev->iq_lock); |
7c00ffa3 MH |
503 | dev->max_fib_size = sizeof(struct hw_fib); |
504 | dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size | |
505 | - sizeof(struct aac_fibhdr) | |
63a70eea MH |
506 | - sizeof(struct aac_write) + sizeof(struct sgentry)) |
507 | / sizeof(struct sgentry); | |
28713324 | 508 | dev->comm_interface = AAC_COMM_PRODUCER; |
e8b12f0f MR |
509 | dev->raw_io_interface = dev->raw_io_64 = 0; |
510 | ||
78cbccd3 RAR |
511 | |
512 | /* | |
513 | * Enable INTX mode, if not done already Enabled | |
514 | */ | |
515 | if (aac_is_msix_mode(dev)) { | |
516 | aac_change_to_intx(dev); | |
517 | dev_info(&dev->pdev->dev, "Changed firmware to INTX mode"); | |
518 | } | |
519 | ||
7a8cf29d | 520 | if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES, |
dafde947 | 521 | 0, 0, 0, 0, 0, 0, |
a1751cda RAR |
522 | status+0, status+1, status+2, status+3, status+4)) && |
523 | (status[0] == 0x00000001)) { | |
dafde947 | 524 | dev->doorbell_mask = status[3]; |
a1751cda | 525 | if (status[1] & AAC_OPT_NEW_COMM_64) |
7a8cf29d | 526 | dev->raw_io_64 = 1; |
11604612 MR |
527 | dev->sync_mode = aac_sync_mode; |
528 | if (dev->a_ops.adapter_comm && | |
a1751cda | 529 | (status[1] & AAC_OPT_NEW_COMM)) { |
e8b12f0f MR |
530 | dev->comm_interface = AAC_COMM_MESSAGE; |
531 | dev->raw_io_interface = 1; | |
a1751cda | 532 | if ((status[1] & AAC_OPT_NEW_COMM_TYPE1)) { |
11604612 MR |
533 | /* driver supports TYPE1 (Tupelo) */ |
534 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE1; | |
a1751cda RAR |
535 | } else if (status[1] & AAC_OPT_NEW_COMM_TYPE2) { |
536 | /* driver supports TYPE2 (Denali, Yosemite) */ | |
85d22bbf | 537 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE2; |
a1751cda RAR |
538 | } else if (status[1] & AAC_OPT_NEW_COMM_TYPE3) { |
539 | /* driver supports TYPE3 (Yosemite, Thor) */ | |
540 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE3; | |
541 | } else if (status[1] & AAC_OPT_NEW_COMM_TYPE4) { | |
542 | /* not supported TYPE - switch to sync. mode */ | |
85d22bbf MR |
543 | dev->comm_interface = AAC_COMM_MESSAGE_TYPE2; |
544 | dev->sync_mode = 1; | |
e8b12f0f MR |
545 | } |
546 | } | |
2589624f RAR |
547 | if ((status[1] & le32_to_cpu(AAC_OPT_EXTENDED)) && |
548 | (status[4] & le32_to_cpu(AAC_EXTOPT_SA_FIRMWARE))) | |
549 | dev->sa_firmware = 1; | |
550 | else | |
551 | dev->sa_firmware = 0; | |
552 | ||
28713324 MH |
553 | if ((dev->comm_interface == AAC_COMM_MESSAGE) && |
554 | (status[2] > dev->base_size)) { | |
76a7f8fd | 555 | aac_adapter_ioremap(dev, 0); |
8e0c5ebd | 556 | dev->base_size = status[2]; |
76a7f8fd | 557 | if (aac_adapter_ioremap(dev, status[2])) { |
8e0c5ebd | 558 | /* remap failed, go back ... */ |
28713324 | 559 | dev->comm_interface = AAC_COMM_PRODUCER; |
76a7f8fd | 560 | if (aac_adapter_ioremap(dev, AAC_MIN_FOOTPRINT_SIZE)) { |
8e0c5ebd MH |
561 | printk(KERN_WARNING |
562 | "aacraid: unable to map adapter.\n"); | |
563 | return NULL; | |
564 | } | |
565 | } | |
566 | } | |
7a8cf29d | 567 | } |
495c0217 MR |
568 | dev->max_msix = 0; |
569 | dev->msi_enabled = 0; | |
f9c42596 | 570 | dev->adapter_shutdown = 0; |
7c00ffa3 MH |
571 | if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS, |
572 | 0, 0, 0, 0, 0, 0, | |
573 | status+0, status+1, status+2, status+3, status+4)) | |
574 | && (status[0] == 0x00000001)) { | |
575 | /* | |
576 | * status[1] >> 16 maximum command size in KB | |
577 | * status[1] & 0xFFFF maximum FIB size | |
578 | * status[2] >> 16 maximum SG elements to driver | |
579 | * status[2] & 0xFFFF maximum SG elements from driver | |
580 | * status[3] & 0xFFFF maximum number FIBs outstanding | |
581 | */ | |
582 | host->max_sectors = (status[1] >> 16) << 1; | |
e8b12f0f MR |
583 | /* Multiple of 32 for PMC */ |
584 | dev->max_fib_size = status[1] & 0xFFE0; | |
7c00ffa3 MH |
585 | host->sg_tablesize = status[2] >> 16; |
586 | dev->sg_tablesize = status[2] & 0xFFFF; | |
2b4df6ea MR |
587 | if (dev->pdev->device == PMC_DEVICE_S7 || |
588 | dev->pdev->device == PMC_DEVICE_S8 || | |
2589624f RAR |
589 | dev->pdev->device == PMC_DEVICE_S9) { |
590 | if (host->can_queue > (status[3] >> 16) - | |
591 | AAC_NUM_MGT_FIB) | |
592 | host->can_queue = (status[3] >> 16) - | |
593 | AAC_NUM_MGT_FIB; | |
594 | } else if (host->can_queue > (status[3] & 0xFFFF) - | |
595 | AAC_NUM_MGT_FIB) | |
596 | host->can_queue = (status[3] & 0xFFFF) - | |
597 | AAC_NUM_MGT_FIB; | |
598 | ||
e8b12f0f | 599 | dev->max_num_aif = status[4] & 0xFFFF; |
7c00ffa3 | 600 | } |
2589624f RAR |
601 | if (numacb > 0) { |
602 | if (numacb < host->can_queue) | |
603 | host->can_queue = numacb; | |
604 | else | |
605 | pr_warn("numacb=%d ignored\n", numacb); | |
7c00ffa3 MH |
606 | } |
607 | ||
495c0217 MR |
608 | if (dev->pdev->device == PMC_DEVICE_S6 || |
609 | dev->pdev->device == PMC_DEVICE_S7 || | |
610 | dev->pdev->device == PMC_DEVICE_S8 || | |
611 | dev->pdev->device == PMC_DEVICE_S9) | |
612 | aac_define_int_mode(dev); | |
1da177e4 LT |
613 | /* |
614 | * Ok now init the communication subsystem | |
615 | */ | |
616 | ||
4dbc22d7 | 617 | dev->queues = kzalloc(sizeof(struct aac_queue_block), GFP_KERNEL); |
1da177e4 LT |
618 | if (dev->queues == NULL) { |
619 | printk(KERN_ERR "Error could not allocate comm region.\n"); | |
620 | return NULL; | |
621 | } | |
1da177e4 LT |
622 | |
623 | if (aac_comm_init(dev)<0){ | |
624 | kfree(dev->queues); | |
625 | return NULL; | |
626 | } | |
627 | /* | |
628 | * Initialize the list of fibs | |
629 | */ | |
bfb35aa8 | 630 | if (aac_fib_setup(dev) < 0) { |
1da177e4 LT |
631 | kfree(dev->queues); |
632 | return NULL; | |
633 | } | |
634 | ||
635 | INIT_LIST_HEAD(&dev->fib_list); | |
11604612 | 636 | INIT_LIST_HEAD(&dev->sync_fib_list); |
1da177e4 LT |
637 | |
638 | return dev; | |
639 | } | |
640 |