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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
3 | * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com> | |
4 | * | |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
03d44337 | 8 | * Copyright (c) 2000-2007 Adaptec, Inc. (aacraid@adaptec.com) |
1da177e4 LT |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2, or (at your option) | |
13 | * any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; see the file COPYING. If not, write to | |
22 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | * | |
24 | * Module Name: | |
25 | * commsup.c | |
26 | * | |
27 | * Abstract: Contain all routines that are required for FSA host/adapter | |
7c00ffa3 | 28 | * communication. |
1da177e4 LT |
29 | * |
30 | */ | |
31 | ||
32 | #include <linux/kernel.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/types.h> | |
35 | #include <linux/sched.h> | |
36 | #include <linux/pci.h> | |
37 | #include <linux/spinlock.h> | |
38 | #include <linux/slab.h> | |
39 | #include <linux/completion.h> | |
40 | #include <linux/blkdev.h> | |
164006da | 41 | #include <linux/delay.h> |
fe27381d | 42 | #include <linux/kthread.h> |
6a3670c4 | 43 | #include <linux/interrupt.h> |
8c867b25 | 44 | #include <scsi/scsi.h> |
7c00ffa3 | 45 | #include <scsi/scsi_host.h> |
131256cf | 46 | #include <scsi/scsi_device.h> |
8c867b25 | 47 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
48 | #include <asm/semaphore.h> |
49 | ||
50 | #include "aacraid.h" | |
51 | ||
52 | /** | |
53 | * fib_map_alloc - allocate the fib objects | |
54 | * @dev: Adapter to allocate for | |
55 | * | |
56 | * Allocate and map the shared PCI space for the FIB blocks used to | |
57 | * talk to the Adaptec firmware. | |
58 | */ | |
59 | ||
60 | static int fib_map_alloc(struct aac_dev *dev) | |
61 | { | |
7c00ffa3 MH |
62 | dprintk((KERN_INFO |
63 | "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n", | |
64 | dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue, | |
65 | AAC_NUM_MGT_FIB, &dev->hw_fib_pa)); | |
66 | if((dev->hw_fib_va = pci_alloc_consistent(dev->pdev, dev->max_fib_size | |
67 | * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), | |
68 | &dev->hw_fib_pa))==NULL) | |
1da177e4 LT |
69 | return -ENOMEM; |
70 | return 0; | |
71 | } | |
72 | ||
73 | /** | |
bfb35aa8 | 74 | * aac_fib_map_free - free the fib objects |
1da177e4 LT |
75 | * @dev: Adapter to free |
76 | * | |
77 | * Free the PCI mappings and the memory allocated for FIB blocks | |
78 | * on this adapter. | |
79 | */ | |
80 | ||
bfb35aa8 | 81 | void aac_fib_map_free(struct aac_dev *dev) |
1da177e4 | 82 | { |
9ad5204d SM |
83 | pci_free_consistent(dev->pdev, |
84 | dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB), | |
85 | dev->hw_fib_va, dev->hw_fib_pa); | |
86 | dev->hw_fib_va = NULL; | |
87 | dev->hw_fib_pa = 0; | |
1da177e4 LT |
88 | } |
89 | ||
90 | /** | |
bfb35aa8 | 91 | * aac_fib_setup - setup the fibs |
1da177e4 LT |
92 | * @dev: Adapter to set up |
93 | * | |
94 | * Allocate the PCI space for the fibs, map it and then intialise the | |
95 | * fib area, the unmapped fib data and also the free list | |
96 | */ | |
97 | ||
bfb35aa8 | 98 | int aac_fib_setup(struct aac_dev * dev) |
1da177e4 LT |
99 | { |
100 | struct fib *fibptr; | |
a8166a52 | 101 | struct hw_fib *hw_fib; |
1da177e4 LT |
102 | dma_addr_t hw_fib_pa; |
103 | int i; | |
7c00ffa3 MH |
104 | |
105 | while (((i = fib_map_alloc(dev)) == -ENOMEM) | |
106 | && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) { | |
107 | dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1); | |
108 | dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB; | |
109 | } | |
110 | if (i<0) | |
1da177e4 LT |
111 | return -ENOMEM; |
112 | ||
a8166a52 | 113 | hw_fib = dev->hw_fib_va; |
1da177e4 | 114 | hw_fib_pa = dev->hw_fib_pa; |
a8166a52 | 115 | memset(hw_fib, 0, dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)); |
1da177e4 LT |
116 | /* |
117 | * Initialise the fibs | |
118 | */ | |
7c00ffa3 | 119 | for (i = 0, fibptr = &dev->fibs[i]; i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); i++, fibptr++) |
1da177e4 LT |
120 | { |
121 | fibptr->dev = dev; | |
a8166a52 MH |
122 | fibptr->hw_fib_va = hw_fib; |
123 | fibptr->data = (void *) fibptr->hw_fib_va->data; | |
1da177e4 LT |
124 | fibptr->next = fibptr+1; /* Forward chain the fibs */ |
125 | init_MUTEX_LOCKED(&fibptr->event_wait); | |
126 | spin_lock_init(&fibptr->event_lock); | |
a8166a52 MH |
127 | hw_fib->header.XferState = cpu_to_le32(0xffffffff); |
128 | hw_fib->header.SenderSize = cpu_to_le16(dev->max_fib_size); | |
1da177e4 | 129 | fibptr->hw_fib_pa = hw_fib_pa; |
a8166a52 | 130 | hw_fib = (struct hw_fib *)((unsigned char *)hw_fib + dev->max_fib_size); |
7c00ffa3 | 131 | hw_fib_pa = hw_fib_pa + dev->max_fib_size; |
1da177e4 LT |
132 | } |
133 | /* | |
134 | * Add the fib chain to the free list | |
135 | */ | |
7c00ffa3 | 136 | dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL; |
1da177e4 LT |
137 | /* |
138 | * Enable this to debug out of queue space | |
139 | */ | |
140 | dev->free_fib = &dev->fibs[0]; | |
141 | return 0; | |
142 | } | |
143 | ||
144 | /** | |
bfb35aa8 | 145 | * aac_fib_alloc - allocate a fib |
1da177e4 LT |
146 | * @dev: Adapter to allocate the fib for |
147 | * | |
148 | * Allocate a fib from the adapter fib pool. If the pool is empty we | |
7c00ffa3 | 149 | * return NULL. |
1da177e4 LT |
150 | */ |
151 | ||
bfb35aa8 | 152 | struct fib *aac_fib_alloc(struct aac_dev *dev) |
1da177e4 LT |
153 | { |
154 | struct fib * fibptr; | |
155 | unsigned long flags; | |
156 | spin_lock_irqsave(&dev->fib_lock, flags); | |
157 | fibptr = dev->free_fib; | |
7c00ffa3 MH |
158 | if(!fibptr){ |
159 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
160 | return fibptr; | |
161 | } | |
1da177e4 LT |
162 | dev->free_fib = fibptr->next; |
163 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
164 | /* | |
165 | * Set the proper node type code and node byte size | |
166 | */ | |
167 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
168 | fibptr->size = sizeof(struct fib); | |
169 | /* | |
170 | * Null out fields that depend on being zero at the start of | |
171 | * each I/O | |
172 | */ | |
a8166a52 | 173 | fibptr->hw_fib_va->header.XferState = 0; |
1da177e4 LT |
174 | fibptr->callback = NULL; |
175 | fibptr->callback_data = NULL; | |
176 | ||
177 | return fibptr; | |
178 | } | |
179 | ||
180 | /** | |
bfb35aa8 | 181 | * aac_fib_free - free a fib |
1da177e4 LT |
182 | * @fibptr: fib to free up |
183 | * | |
184 | * Frees up a fib and places it on the appropriate queue | |
1da177e4 LT |
185 | */ |
186 | ||
bfb35aa8 | 187 | void aac_fib_free(struct fib *fibptr) |
1da177e4 LT |
188 | { |
189 | unsigned long flags; | |
190 | ||
191 | spin_lock_irqsave(&fibptr->dev->fib_lock, flags); | |
03d44337 | 192 | if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 193 | aac_config.fib_timeouts++; |
03d44337 MH |
194 | if (fibptr->hw_fib_va->header.XferState != 0) { |
195 | printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n", | |
196 | (void*)fibptr, | |
197 | le32_to_cpu(fibptr->hw_fib_va->header.XferState)); | |
198 | } | |
199 | fibptr->next = fibptr->dev->free_fib; | |
200 | fibptr->dev->free_fib = fibptr; | |
1da177e4 LT |
201 | spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags); |
202 | } | |
203 | ||
204 | /** | |
bfb35aa8 | 205 | * aac_fib_init - initialise a fib |
1da177e4 LT |
206 | * @fibptr: The fib to initialize |
207 | * | |
208 | * Set up the generic fib fields ready for use | |
209 | */ | |
210 | ||
bfb35aa8 | 211 | void aac_fib_init(struct fib *fibptr) |
1da177e4 | 212 | { |
a8166a52 | 213 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
1da177e4 LT |
214 | |
215 | hw_fib->header.StructType = FIB_MAGIC; | |
7c00ffa3 MH |
216 | hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size); |
217 | hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable); | |
8e0c5ebd | 218 | hw_fib->header.SenderFibAddress = 0; /* Filled in later if needed */ |
1da177e4 | 219 | hw_fib->header.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa); |
7c00ffa3 | 220 | hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size); |
1da177e4 LT |
221 | } |
222 | ||
223 | /** | |
224 | * fib_deallocate - deallocate a fib | |
225 | * @fibptr: fib to deallocate | |
226 | * | |
227 | * Will deallocate and return to the free pool the FIB pointed to by the | |
228 | * caller. | |
229 | */ | |
230 | ||
4833869e | 231 | static void fib_dealloc(struct fib * fibptr) |
1da177e4 | 232 | { |
a8166a52 | 233 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
125e1874 | 234 | BUG_ON(hw_fib->header.StructType != FIB_MAGIC); |
1da177e4 LT |
235 | hw_fib->header.XferState = 0; |
236 | } | |
237 | ||
238 | /* | |
239 | * Commuication primitives define and support the queuing method we use to | |
240 | * support host to adapter commuication. All queue accesses happen through | |
241 | * these routines and are the only routines which have a knowledge of the | |
242 | * how these queues are implemented. | |
243 | */ | |
244 | ||
245 | /** | |
246 | * aac_get_entry - get a queue entry | |
247 | * @dev: Adapter | |
248 | * @qid: Queue Number | |
249 | * @entry: Entry return | |
250 | * @index: Index return | |
251 | * @nonotify: notification control | |
252 | * | |
253 | * With a priority the routine returns a queue entry if the queue has free entries. If the queue | |
254 | * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is | |
255 | * returned. | |
256 | */ | |
257 | ||
258 | static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify) | |
259 | { | |
260 | struct aac_queue * q; | |
bed30de4 | 261 | unsigned long idx; |
1da177e4 LT |
262 | |
263 | /* | |
264 | * All of the queues wrap when they reach the end, so we check | |
265 | * to see if they have reached the end and if they have we just | |
266 | * set the index back to zero. This is a wrap. You could or off | |
267 | * the high bits in all updates but this is a bit faster I think. | |
268 | */ | |
269 | ||
270 | q = &dev->queues->queue[qid]; | |
bed30de4 MH |
271 | |
272 | idx = *index = le32_to_cpu(*(q->headers.producer)); | |
273 | /* Interrupt Moderation, only interrupt for first two entries */ | |
274 | if (idx != le32_to_cpu(*(q->headers.consumer))) { | |
275 | if (--idx == 0) { | |
1640a2c3 | 276 | if (qid == AdapNormCmdQueue) |
bed30de4 | 277 | idx = ADAP_NORM_CMD_ENTRIES; |
1640a2c3 | 278 | else |
bed30de4 MH |
279 | idx = ADAP_NORM_RESP_ENTRIES; |
280 | } | |
281 | if (idx != le32_to_cpu(*(q->headers.consumer))) | |
1da177e4 | 282 | *nonotify = 1; |
bed30de4 | 283 | } |
1da177e4 | 284 | |
1640a2c3 | 285 | if (qid == AdapNormCmdQueue) { |
1da177e4 LT |
286 | if (*index >= ADAP_NORM_CMD_ENTRIES) |
287 | *index = 0; /* Wrap to front of the Producer Queue. */ | |
1640a2c3 | 288 | } else { |
1da177e4 LT |
289 | if (*index >= ADAP_NORM_RESP_ENTRIES) |
290 | *index = 0; /* Wrap to front of the Producer Queue. */ | |
291 | } | |
1da177e4 LT |
292 | |
293 | if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { /* Queue is full */ | |
7c00ffa3 | 294 | printk(KERN_WARNING "Queue %d full, %u outstanding.\n", |
1da177e4 LT |
295 | qid, q->numpending); |
296 | return 0; | |
297 | } else { | |
298 | *entry = q->base + *index; | |
299 | return 1; | |
300 | } | |
301 | } | |
302 | ||
303 | /** | |
304 | * aac_queue_get - get the next free QE | |
305 | * @dev: Adapter | |
306 | * @index: Returned index | |
307 | * @priority: Priority of fib | |
308 | * @fib: Fib to associate with the queue entry | |
309 | * @wait: Wait if queue full | |
310 | * @fibptr: Driver fib object to go with fib | |
311 | * @nonotify: Don't notify the adapter | |
312 | * | |
313 | * Gets the next free QE off the requested priorty adapter command | |
314 | * queue and associates the Fib with the QE. The QE represented by | |
315 | * index is ready to insert on the queue when this routine returns | |
316 | * success. | |
317 | */ | |
318 | ||
28713324 | 319 | int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify) |
1da177e4 LT |
320 | { |
321 | struct aac_entry * entry = NULL; | |
322 | int map = 0; | |
1da177e4 | 323 | |
1640a2c3 | 324 | if (qid == AdapNormCmdQueue) { |
1da177e4 LT |
325 | /* if no entries wait for some if caller wants to */ |
326 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) | |
327 | { | |
328 | printk(KERN_ERR "GetEntries failed\n"); | |
329 | } | |
330 | /* | |
331 | * Setup queue entry with a command, status and fib mapped | |
332 | */ | |
333 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
334 | map = 1; | |
1640a2c3 | 335 | } else { |
1da177e4 LT |
336 | while(!aac_get_entry(dev, qid, &entry, index, nonotify)) |
337 | { | |
338 | /* if no entries wait for some if caller wants to */ | |
339 | } | |
340 | /* | |
341 | * Setup queue entry with command, status and fib mapped | |
342 | */ | |
343 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
344 | entry->addr = hw_fib->header.SenderFibAddress; | |
345 | /* Restore adapters pointer to the FIB */ | |
346 | hw_fib->header.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */ | |
347 | map = 0; | |
348 | } | |
349 | /* | |
350 | * If MapFib is true than we need to map the Fib and put pointers | |
351 | * in the queue entry. | |
352 | */ | |
353 | if (map) | |
354 | entry->addr = cpu_to_le32(fibptr->hw_fib_pa); | |
355 | return 0; | |
356 | } | |
357 | ||
1da177e4 LT |
358 | /* |
359 | * Define the highest level of host to adapter communication routines. | |
360 | * These routines will support host to adapter FS commuication. These | |
361 | * routines have no knowledge of the commuication method used. This level | |
362 | * sends and receives FIBs. This level has no knowledge of how these FIBs | |
363 | * get passed back and forth. | |
364 | */ | |
365 | ||
366 | /** | |
bfb35aa8 | 367 | * aac_fib_send - send a fib to the adapter |
1da177e4 LT |
368 | * @command: Command to send |
369 | * @fibptr: The fib | |
370 | * @size: Size of fib data area | |
371 | * @priority: Priority of Fib | |
372 | * @wait: Async/sync select | |
373 | * @reply: True if a reply is wanted | |
374 | * @callback: Called with reply | |
375 | * @callback_data: Passed to callback | |
376 | * | |
377 | * Sends the requested FIB to the adapter and optionally will wait for a | |
378 | * response FIB. If the caller does not wish to wait for a response than | |
379 | * an event to wait on must be supplied. This event will be set when a | |
380 | * response FIB is received from the adapter. | |
381 | */ | |
382 | ||
bfb35aa8 MH |
383 | int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size, |
384 | int priority, int wait, int reply, fib_callback callback, | |
385 | void *callback_data) | |
1da177e4 | 386 | { |
1da177e4 | 387 | struct aac_dev * dev = fibptr->dev; |
a8166a52 | 388 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 389 | unsigned long flags = 0; |
1640a2c3 MH |
390 | unsigned long qflags; |
391 | ||
1da177e4 LT |
392 | if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned))) |
393 | return -EBUSY; | |
394 | /* | |
395 | * There are 5 cases with the wait and reponse requested flags. | |
396 | * The only invalid cases are if the caller requests to wait and | |
397 | * does not request a response and if the caller does not want a | |
398 | * response and the Fib is not allocated from pool. If a response | |
399 | * is not requesed the Fib will just be deallocaed by the DPC | |
400 | * routine when the response comes back from the adapter. No | |
401 | * further processing will be done besides deleting the Fib. We | |
402 | * will have a debug mode where the adapter can notify the host | |
403 | * it had a problem and the host can log that fact. | |
404 | */ | |
405 | if (wait && !reply) { | |
406 | return -EINVAL; | |
407 | } else if (!wait && reply) { | |
408 | hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected); | |
409 | FIB_COUNTER_INCREMENT(aac_config.AsyncSent); | |
410 | } else if (!wait && !reply) { | |
411 | hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected); | |
412 | FIB_COUNTER_INCREMENT(aac_config.NoResponseSent); | |
413 | } else if (wait && reply) { | |
414 | hw_fib->header.XferState |= cpu_to_le32(ResponseExpected); | |
415 | FIB_COUNTER_INCREMENT(aac_config.NormalSent); | |
416 | } | |
417 | /* | |
418 | * Map the fib into 32bits by using the fib number | |
419 | */ | |
420 | ||
8e0c5ebd | 421 | hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2); |
1da177e4 LT |
422 | hw_fib->header.SenderData = (u32)(fibptr - dev->fibs); |
423 | /* | |
424 | * Set FIB state to indicate where it came from and if we want a | |
425 | * response from the adapter. Also load the command from the | |
426 | * caller. | |
427 | * | |
428 | * Map the hw fib pointer as a 32bit value | |
429 | */ | |
430 | hw_fib->header.Command = cpu_to_le16(command); | |
431 | hw_fib->header.XferState |= cpu_to_le32(SentFromHost); | |
a8166a52 | 432 | fibptr->hw_fib_va->header.Flags = 0; /* 0 the flags field - internal only*/ |
1da177e4 LT |
433 | /* |
434 | * Set the size of the Fib we want to send to the adapter | |
435 | */ | |
436 | hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size); | |
437 | if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) { | |
438 | return -EMSGSIZE; | |
439 | } | |
440 | /* | |
441 | * Get a queue entry connect the FIB to it and send an notify | |
442 | * the adapter a command is ready. | |
443 | */ | |
1640a2c3 | 444 | hw_fib->header.XferState |= cpu_to_le32(NormalPriority); |
1da177e4 | 445 | |
1da177e4 LT |
446 | /* |
447 | * Fill in the Callback and CallbackContext if we are not | |
448 | * going to wait. | |
449 | */ | |
450 | if (!wait) { | |
451 | fibptr->callback = callback; | |
452 | fibptr->callback_data = callback_data; | |
453 | } | |
1da177e4 LT |
454 | |
455 | fibptr->done = 0; | |
456 | fibptr->flags = 0; | |
457 | ||
1640a2c3 MH |
458 | FIB_COUNTER_INCREMENT(aac_config.FibsSent); |
459 | ||
1640a2c3 | 460 | dprintk((KERN_DEBUG "Fib contents:.\n")); |
8e0c5ebd MH |
461 | dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command))); |
462 | dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command))); | |
463 | dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState))); | |
a8166a52 | 464 | dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va)); |
1640a2c3 MH |
465 | dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa)); |
466 | dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr)); | |
467 | ||
c8f7b073 | 468 | if (!dev->queues) |
65101355 | 469 | return -EBUSY; |
1640a2c3 MH |
470 | |
471 | if(wait) | |
472 | spin_lock_irqsave(&fibptr->event_lock, flags); | |
28713324 | 473 | aac_adapter_deliver(fibptr); |
8e0c5ebd | 474 | |
1da177e4 LT |
475 | /* |
476 | * If the caller wanted us to wait for response wait now. | |
477 | */ | |
478 | ||
479 | if (wait) { | |
480 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
9203344c MH |
481 | /* Only set for first known interruptable command */ |
482 | if (wait < 0) { | |
483 | /* | |
484 | * *VERY* Dangerous to time out a command, the | |
485 | * assumption is made that we have no hope of | |
486 | * functioning because an interrupt routing or other | |
487 | * hardware failure has occurred. | |
488 | */ | |
489 | unsigned long count = 36000000L; /* 3 minutes */ | |
9203344c | 490 | while (down_trylock(&fibptr->event_wait)) { |
33524b70 | 491 | int blink; |
9203344c | 492 | if (--count == 0) { |
28713324 | 493 | struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue]; |
9203344c MH |
494 | spin_lock_irqsave(q->lock, qflags); |
495 | q->numpending--; | |
9203344c MH |
496 | spin_unlock_irqrestore(q->lock, qflags); |
497 | if (wait == -1) { | |
bfb35aa8 | 498 | printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n" |
9203344c MH |
499 | "Usually a result of a PCI interrupt routing problem;\n" |
500 | "update mother board BIOS or consider utilizing one of\n" | |
501 | "the SAFE mode kernel options (acpi, apic etc)\n"); | |
502 | } | |
503 | return -ETIMEDOUT; | |
504 | } | |
33524b70 MH |
505 | if ((blink = aac_adapter_check_health(dev)) > 0) { |
506 | if (wait == -1) { | |
507 | printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n" | |
508 | "Usually a result of a serious unrecoverable hardware problem\n", | |
509 | blink); | |
510 | } | |
511 | return -EFAULT; | |
512 | } | |
9203344c MH |
513 | udelay(5); |
514 | } | |
33bb3b29 MH |
515 | } else |
516 | (void)down_interruptible(&fibptr->event_wait); | |
517 | spin_lock_irqsave(&fibptr->event_lock, flags); | |
518 | if (fibptr->done == 0) { | |
519 | fibptr->done = 2; /* Tell interrupt we aborted */ | |
c8f7b073 | 520 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
33bb3b29 | 521 | return -EINTR; |
c8f7b073 | 522 | } |
33bb3b29 | 523 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
125e1874 | 524 | BUG_ON(fibptr->done == 0); |
1da177e4 | 525 | |
912d4e88 | 526 | if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 527 | return -ETIMEDOUT; |
912d4e88 | 528 | return 0; |
1da177e4 LT |
529 | } |
530 | /* | |
531 | * If the user does not want a response than return success otherwise | |
532 | * return pending | |
533 | */ | |
534 | if (reply) | |
535 | return -EINPROGRESS; | |
536 | else | |
537 | return 0; | |
538 | } | |
539 | ||
540 | /** | |
541 | * aac_consumer_get - get the top of the queue | |
542 | * @dev: Adapter | |
543 | * @q: Queue | |
544 | * @entry: Return entry | |
545 | * | |
546 | * Will return a pointer to the entry on the top of the queue requested that | |
547 | * we are a consumer of, and return the address of the queue entry. It does | |
548 | * not change the state of the queue. | |
549 | */ | |
550 | ||
551 | int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry) | |
552 | { | |
553 | u32 index; | |
554 | int status; | |
555 | if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) { | |
556 | status = 0; | |
557 | } else { | |
558 | /* | |
559 | * The consumer index must be wrapped if we have reached | |
560 | * the end of the queue, else we just use the entry | |
561 | * pointed to by the header index | |
562 | */ | |
563 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) | |
564 | index = 0; | |
565 | else | |
566 | index = le32_to_cpu(*q->headers.consumer); | |
567 | *entry = q->base + index; | |
568 | status = 1; | |
569 | } | |
570 | return(status); | |
571 | } | |
572 | ||
573 | /** | |
574 | * aac_consumer_free - free consumer entry | |
575 | * @dev: Adapter | |
576 | * @q: Queue | |
577 | * @qid: Queue ident | |
578 | * | |
579 | * Frees up the current top of the queue we are a consumer of. If the | |
580 | * queue was full notify the producer that the queue is no longer full. | |
581 | */ | |
582 | ||
583 | void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid) | |
584 | { | |
585 | int wasfull = 0; | |
586 | u32 notify; | |
587 | ||
588 | if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer)) | |
589 | wasfull = 1; | |
590 | ||
591 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) | |
592 | *q->headers.consumer = cpu_to_le32(1); | |
593 | else | |
594 | *q->headers.consumer = cpu_to_le32(le32_to_cpu(*q->headers.consumer)+1); | |
595 | ||
596 | if (wasfull) { | |
597 | switch (qid) { | |
598 | ||
599 | case HostNormCmdQueue: | |
600 | notify = HostNormCmdNotFull; | |
601 | break; | |
1da177e4 LT |
602 | case HostNormRespQueue: |
603 | notify = HostNormRespNotFull; | |
604 | break; | |
1da177e4 LT |
605 | default: |
606 | BUG(); | |
607 | return; | |
608 | } | |
609 | aac_adapter_notify(dev, notify); | |
610 | } | |
611 | } | |
612 | ||
613 | /** | |
bfb35aa8 | 614 | * aac_fib_adapter_complete - complete adapter issued fib |
1da177e4 LT |
615 | * @fibptr: fib to complete |
616 | * @size: size of fib | |
617 | * | |
618 | * Will do all necessary work to complete a FIB that was sent from | |
619 | * the adapter. | |
620 | */ | |
621 | ||
bfb35aa8 | 622 | int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size) |
1da177e4 | 623 | { |
a8166a52 | 624 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 625 | struct aac_dev * dev = fibptr->dev; |
1640a2c3 | 626 | struct aac_queue * q; |
1da177e4 | 627 | unsigned long nointr = 0; |
1640a2c3 MH |
628 | unsigned long qflags; |
629 | ||
630 | if (hw_fib->header.XferState == 0) { | |
28713324 | 631 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
8e0c5ebd | 632 | kfree (hw_fib); |
1da177e4 | 633 | return 0; |
1640a2c3 | 634 | } |
1da177e4 LT |
635 | /* |
636 | * If we plan to do anything check the structure type first. | |
637 | */ | |
638 | if ( hw_fib->header.StructType != FIB_MAGIC ) { | |
28713324 | 639 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
8e0c5ebd | 640 | kfree (hw_fib); |
1da177e4 LT |
641 | return -EINVAL; |
642 | } | |
643 | /* | |
644 | * This block handles the case where the adapter had sent us a | |
645 | * command and we have finished processing the command. We | |
646 | * call completeFib when we are done processing the command | |
647 | * and want to send a response back to the adapter. This will | |
648 | * send the completed cdb to the adapter. | |
649 | */ | |
650 | if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) { | |
28713324 | 651 | if (dev->comm_interface == AAC_COMM_MESSAGE) { |
8e0c5ebd MH |
652 | kfree (hw_fib); |
653 | } else { | |
654 | u32 index; | |
655 | hw_fib->header.XferState |= cpu_to_le32(HostProcessed); | |
656 | if (size) { | |
657 | size += sizeof(struct aac_fibhdr); | |
658 | if (size > le16_to_cpu(hw_fib->header.SenderSize)) | |
659 | return -EMSGSIZE; | |
660 | hw_fib->header.Size = cpu_to_le16(size); | |
661 | } | |
662 | q = &dev->queues->queue[AdapNormRespQueue]; | |
663 | spin_lock_irqsave(q->lock, qflags); | |
664 | aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr); | |
665 | *(q->headers.producer) = cpu_to_le32(index + 1); | |
666 | spin_unlock_irqrestore(q->lock, qflags); | |
667 | if (!(nointr & (int)aac_config.irq_mod)) | |
668 | aac_adapter_notify(dev, AdapNormRespQueue); | |
1da177e4 LT |
669 | } |
670 | } | |
671 | else | |
672 | { | |
bfb35aa8 | 673 | printk(KERN_WARNING "aac_fib_adapter_complete: Unknown xferstate detected.\n"); |
1da177e4 LT |
674 | BUG(); |
675 | } | |
676 | return 0; | |
677 | } | |
678 | ||
679 | /** | |
bfb35aa8 | 680 | * aac_fib_complete - fib completion handler |
1da177e4 LT |
681 | * @fib: FIB to complete |
682 | * | |
683 | * Will do all necessary work to complete a FIB. | |
684 | */ | |
685 | ||
bfb35aa8 | 686 | int aac_fib_complete(struct fib *fibptr) |
1da177e4 | 687 | { |
a8166a52 | 688 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 LT |
689 | |
690 | /* | |
691 | * Check for a fib which has already been completed | |
692 | */ | |
693 | ||
694 | if (hw_fib->header.XferState == 0) | |
695 | return 0; | |
696 | /* | |
697 | * If we plan to do anything check the structure type first. | |
698 | */ | |
699 | ||
700 | if (hw_fib->header.StructType != FIB_MAGIC) | |
701 | return -EINVAL; | |
702 | /* | |
703 | * This block completes a cdb which orginated on the host and we | |
704 | * just need to deallocate the cdb or reinit it. At this point the | |
705 | * command is complete that we had sent to the adapter and this | |
706 | * cdb could be reused. | |
707 | */ | |
708 | if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) && | |
709 | (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))) | |
710 | { | |
711 | fib_dealloc(fibptr); | |
712 | } | |
713 | else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost)) | |
714 | { | |
715 | /* | |
716 | * This handles the case when the host has aborted the I/O | |
717 | * to the adapter because the adapter is not responding | |
718 | */ | |
719 | fib_dealloc(fibptr); | |
720 | } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) { | |
721 | fib_dealloc(fibptr); | |
722 | } else { | |
723 | BUG(); | |
724 | } | |
725 | return 0; | |
726 | } | |
727 | ||
728 | /** | |
729 | * aac_printf - handle printf from firmware | |
730 | * @dev: Adapter | |
731 | * @val: Message info | |
732 | * | |
733 | * Print a message passed to us by the controller firmware on the | |
734 | * Adaptec board | |
735 | */ | |
736 | ||
737 | void aac_printf(struct aac_dev *dev, u32 val) | |
738 | { | |
1da177e4 | 739 | char *cp = dev->printfbuf; |
7c00ffa3 MH |
740 | if (dev->printf_enabled) |
741 | { | |
742 | int length = val & 0xffff; | |
743 | int level = (val >> 16) & 0xffff; | |
744 | ||
745 | /* | |
746 | * The size of the printfbuf is set in port.c | |
747 | * There is no variable or define for it | |
748 | */ | |
749 | if (length > 255) | |
750 | length = 255; | |
751 | if (cp[length] != 0) | |
752 | cp[length] = 0; | |
753 | if (level == LOG_AAC_HIGH_ERROR) | |
1241f359 | 754 | printk(KERN_WARNING "%s:%s", dev->name, cp); |
7c00ffa3 | 755 | else |
1241f359 | 756 | printk(KERN_INFO "%s:%s", dev->name, cp); |
7c00ffa3 | 757 | } |
1da177e4 LT |
758 | memset(cp, 0, 256); |
759 | } | |
760 | ||
131256cf MH |
761 | |
762 | /** | |
763 | * aac_handle_aif - Handle a message from the firmware | |
764 | * @dev: Which adapter this fib is from | |
765 | * @fibptr: Pointer to fibptr from adapter | |
766 | * | |
767 | * This routine handles a driver notify fib from the adapter and | |
768 | * dispatches it to the appropriate routine for handling. | |
769 | */ | |
770 | ||
31876f32 | 771 | #define AIF_SNIFF_TIMEOUT (30*HZ) |
131256cf MH |
772 | static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr) |
773 | { | |
a8166a52 | 774 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
131256cf | 775 | struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data; |
131256cf MH |
776 | u32 container; |
777 | struct scsi_device *device; | |
778 | enum { | |
779 | NOTHING, | |
780 | DELETE, | |
781 | ADD, | |
782 | CHANGE | |
783 | } device_config_needed; | |
784 | ||
785 | /* Sniff for container changes */ | |
786 | ||
c8f7b073 | 787 | if (!dev || !dev->fsa_dev) |
131256cf MH |
788 | return; |
789 | container = (u32)-1; | |
790 | ||
791 | /* | |
792 | * We have set this up to try and minimize the number of | |
793 | * re-configures that take place. As a result of this when | |
794 | * certain AIF's come in we will set a flag waiting for another | |
795 | * type of AIF before setting the re-config flag. | |
796 | */ | |
797 | switch (le32_to_cpu(aifcmd->command)) { | |
798 | case AifCmdDriverNotify: | |
f3307f72 | 799 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
131256cf MH |
800 | /* |
801 | * Morph or Expand complete | |
802 | */ | |
803 | case AifDenMorphComplete: | |
804 | case AifDenVolumeExtendComplete: | |
f3307f72 | 805 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
806 | if (container >= dev->maximum_num_containers) |
807 | break; | |
808 | ||
809 | /* | |
f64a181d | 810 | * Find the scsi_device associated with the SCSI |
131256cf MH |
811 | * address. Make sure we have the right array, and if |
812 | * so set the flag to initiate a new re-config once we | |
813 | * see an AifEnConfigChange AIF come through. | |
814 | */ | |
815 | ||
816 | if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) { | |
817 | device = scsi_device_lookup(dev->scsi_host_ptr, | |
818 | CONTAINER_TO_CHANNEL(container), | |
819 | CONTAINER_TO_ID(container), | |
820 | CONTAINER_TO_LUN(container)); | |
821 | if (device) { | |
822 | dev->fsa_dev[container].config_needed = CHANGE; | |
823 | dev->fsa_dev[container].config_waiting_on = AifEnConfigChange; | |
31876f32 | 824 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
825 | scsi_device_put(device); |
826 | } | |
827 | } | |
828 | } | |
829 | ||
830 | /* | |
831 | * If we are waiting on something and this happens to be | |
832 | * that thing then set the re-configure flag. | |
833 | */ | |
834 | if (container != (u32)-1) { | |
835 | if (container >= dev->maximum_num_containers) | |
836 | break; | |
31876f32 | 837 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 838 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 839 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
840 | dev->fsa_dev[container].config_waiting_on = 0; |
841 | } else for (container = 0; | |
842 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 843 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 844 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 845 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
846 | dev->fsa_dev[container].config_waiting_on = 0; |
847 | } | |
848 | break; | |
849 | ||
850 | case AifCmdEventNotify: | |
f3307f72 | 851 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
95e852e1 SM |
852 | case AifEnBatteryEvent: |
853 | dev->cache_protected = | |
854 | (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3)); | |
855 | break; | |
131256cf MH |
856 | /* |
857 | * Add an Array. | |
858 | */ | |
859 | case AifEnAddContainer: | |
f3307f72 | 860 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
861 | if (container >= dev->maximum_num_containers) |
862 | break; | |
863 | dev->fsa_dev[container].config_needed = ADD; | |
864 | dev->fsa_dev[container].config_waiting_on = | |
865 | AifEnConfigChange; | |
31876f32 | 866 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
867 | break; |
868 | ||
869 | /* | |
870 | * Delete an Array. | |
871 | */ | |
872 | case AifEnDeleteContainer: | |
f3307f72 | 873 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
874 | if (container >= dev->maximum_num_containers) |
875 | break; | |
876 | dev->fsa_dev[container].config_needed = DELETE; | |
877 | dev->fsa_dev[container].config_waiting_on = | |
878 | AifEnConfigChange; | |
31876f32 | 879 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
880 | break; |
881 | ||
882 | /* | |
883 | * Container change detected. If we currently are not | |
884 | * waiting on something else, setup to wait on a Config Change. | |
885 | */ | |
886 | case AifEnContainerChange: | |
f3307f72 | 887 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
888 | if (container >= dev->maximum_num_containers) |
889 | break; | |
31876f32 MH |
890 | if (dev->fsa_dev[container].config_waiting_on && |
891 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) | |
131256cf MH |
892 | break; |
893 | dev->fsa_dev[container].config_needed = CHANGE; | |
894 | dev->fsa_dev[container].config_waiting_on = | |
895 | AifEnConfigChange; | |
31876f32 | 896 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
897 | break; |
898 | ||
899 | case AifEnConfigChange: | |
900 | break; | |
901 | ||
902 | } | |
903 | ||
904 | /* | |
905 | * If we are waiting on something and this happens to be | |
906 | * that thing then set the re-configure flag. | |
907 | */ | |
908 | if (container != (u32)-1) { | |
909 | if (container >= dev->maximum_num_containers) | |
910 | break; | |
31876f32 | 911 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 912 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 913 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
914 | dev->fsa_dev[container].config_waiting_on = 0; |
915 | } else for (container = 0; | |
916 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 917 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 918 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 919 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
920 | dev->fsa_dev[container].config_waiting_on = 0; |
921 | } | |
922 | break; | |
923 | ||
924 | case AifCmdJobProgress: | |
925 | /* | |
926 | * These are job progress AIF's. When a Clear is being | |
927 | * done on a container it is initially created then hidden from | |
928 | * the OS. When the clear completes we don't get a config | |
929 | * change so we monitor the job status complete on a clear then | |
930 | * wait for a container change. | |
931 | */ | |
932 | ||
f3307f72 CH |
933 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
934 | (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] || | |
935 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) { | |
131256cf MH |
936 | for (container = 0; |
937 | container < dev->maximum_num_containers; | |
938 | ++container) { | |
939 | /* | |
940 | * Stomp on all config sequencing for all | |
941 | * containers? | |
942 | */ | |
943 | dev->fsa_dev[container].config_waiting_on = | |
944 | AifEnContainerChange; | |
945 | dev->fsa_dev[container].config_needed = ADD; | |
31876f32 MH |
946 | dev->fsa_dev[container].config_waiting_stamp = |
947 | jiffies; | |
131256cf MH |
948 | } |
949 | } | |
f3307f72 CH |
950 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
951 | ((__le32 *)aifcmd->data)[6] == 0 && | |
952 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) { | |
131256cf MH |
953 | for (container = 0; |
954 | container < dev->maximum_num_containers; | |
955 | ++container) { | |
956 | /* | |
957 | * Stomp on all config sequencing for all | |
958 | * containers? | |
959 | */ | |
960 | dev->fsa_dev[container].config_waiting_on = | |
961 | AifEnContainerChange; | |
962 | dev->fsa_dev[container].config_needed = DELETE; | |
31876f32 MH |
963 | dev->fsa_dev[container].config_waiting_stamp = |
964 | jiffies; | |
131256cf MH |
965 | } |
966 | } | |
967 | break; | |
968 | } | |
969 | ||
970 | device_config_needed = NOTHING; | |
971 | for (container = 0; container < dev->maximum_num_containers; | |
972 | ++container) { | |
31876f32 MH |
973 | if ((dev->fsa_dev[container].config_waiting_on == 0) && |
974 | (dev->fsa_dev[container].config_needed != NOTHING) && | |
975 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) { | |
131256cf MH |
976 | device_config_needed = |
977 | dev->fsa_dev[container].config_needed; | |
978 | dev->fsa_dev[container].config_needed = NOTHING; | |
979 | break; | |
980 | } | |
981 | } | |
982 | if (device_config_needed == NOTHING) | |
983 | return; | |
984 | ||
985 | /* | |
986 | * If we decided that a re-configuration needs to be done, | |
987 | * schedule it here on the way out the door, please close the door | |
988 | * behind you. | |
989 | */ | |
990 | ||
131256cf | 991 | /* |
f64a181d | 992 | * Find the scsi_device associated with the SCSI address, |
131256cf MH |
993 | * and mark it as changed, invalidating the cache. This deals |
994 | * with changes to existing device IDs. | |
995 | */ | |
996 | ||
997 | if (!dev || !dev->scsi_host_ptr) | |
998 | return; | |
999 | /* | |
bfb35aa8 | 1000 | * force reload of disk info via aac_probe_container |
131256cf MH |
1001 | */ |
1002 | if ((device_config_needed == CHANGE) | |
1003 | && (dev->fsa_dev[container].valid == 1)) | |
1004 | dev->fsa_dev[container].valid = 2; | |
1005 | if ((device_config_needed == CHANGE) || | |
1006 | (device_config_needed == ADD)) | |
bfb35aa8 | 1007 | aac_probe_container(dev, container); |
131256cf MH |
1008 | device = scsi_device_lookup(dev->scsi_host_ptr, |
1009 | CONTAINER_TO_CHANNEL(container), | |
1010 | CONTAINER_TO_ID(container), | |
1011 | CONTAINER_TO_LUN(container)); | |
1012 | if (device) { | |
1013 | switch (device_config_needed) { | |
1014 | case DELETE: | |
131256cf | 1015 | case CHANGE: |
131256cf MH |
1016 | scsi_rescan_device(&device->sdev_gendev); |
1017 | ||
1018 | default: | |
1019 | break; | |
1020 | } | |
1021 | scsi_device_put(device); | |
1022 | } | |
1023 | if (device_config_needed == ADD) { | |
1024 | scsi_add_device(dev->scsi_host_ptr, | |
1025 | CONTAINER_TO_CHANNEL(container), | |
1026 | CONTAINER_TO_ID(container), | |
1027 | CONTAINER_TO_LUN(container)); | |
1028 | } | |
1029 | ||
1030 | } | |
1031 | ||
29c97684 | 1032 | static int _aac_reset_adapter(struct aac_dev *aac, int forced) |
8c867b25 MH |
1033 | { |
1034 | int index, quirks; | |
8c867b25 MH |
1035 | int retval; |
1036 | struct Scsi_Host *host; | |
1037 | struct scsi_device *dev; | |
1038 | struct scsi_cmnd *command; | |
1039 | struct scsi_cmnd *command_list; | |
29c97684 | 1040 | int jafo = 0; |
8c867b25 MH |
1041 | |
1042 | /* | |
1043 | * Assumptions: | |
29c97684 SM |
1044 | * - host is locked, unless called by the aacraid thread. |
1045 | * (a matter of convenience, due to legacy issues surrounding | |
1046 | * eh_host_adapter_reset). | |
8c867b25 MH |
1047 | * - in_reset is asserted, so no new i/o is getting to the |
1048 | * card. | |
29c97684 SM |
1049 | * - The card is dead, or will be very shortly ;-/ so no new |
1050 | * commands are completing in the interrupt service. | |
8c867b25 MH |
1051 | */ |
1052 | host = aac->scsi_host_ptr; | |
1053 | scsi_block_requests(host); | |
1054 | aac_adapter_disable_int(aac); | |
29c97684 SM |
1055 | if (aac->thread->pid != current->pid) { |
1056 | spin_unlock_irq(host->host_lock); | |
1057 | kthread_stop(aac->thread); | |
1058 | jafo = 1; | |
1059 | } | |
8c867b25 MH |
1060 | |
1061 | /* | |
1062 | * If a positive health, means in a known DEAD PANIC | |
1063 | * state and the adapter could be reset to `try again'. | |
1064 | */ | |
29c97684 | 1065 | retval = aac_adapter_restart(aac, forced ? 0 : aac_adapter_check_health(aac)); |
8c867b25 MH |
1066 | |
1067 | if (retval) | |
1068 | goto out; | |
8c867b25 | 1069 | |
d18b448f MH |
1070 | /* |
1071 | * Loop through the fibs, close the synchronous FIBS | |
1072 | */ | |
33bb3b29 | 1073 | for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) { |
d18b448f | 1074 | struct fib *fib = &aac->fibs[index]; |
a8166a52 MH |
1075 | if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) && |
1076 | (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) { | |
d18b448f MH |
1077 | unsigned long flagv; |
1078 | spin_lock_irqsave(&fib->event_lock, flagv); | |
1079 | up(&fib->event_wait); | |
1080 | spin_unlock_irqrestore(&fib->event_lock, flagv); | |
1081 | schedule(); | |
33bb3b29 | 1082 | retval = 0; |
d18b448f MH |
1083 | } |
1084 | } | |
33bb3b29 MH |
1085 | /* Give some extra time for ioctls to complete. */ |
1086 | if (retval == 0) | |
1087 | ssleep(2); | |
8c867b25 MH |
1088 | index = aac->cardtype; |
1089 | ||
1090 | /* | |
1091 | * Re-initialize the adapter, first free resources, then carefully | |
1092 | * apply the initialization sequence to come back again. Only risk | |
1093 | * is a change in Firmware dropping cache, it is assumed the caller | |
1094 | * will ensure that i/o is queisced and the card is flushed in that | |
1095 | * case. | |
1096 | */ | |
1097 | aac_fib_map_free(aac); | |
8c867b25 MH |
1098 | pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys); |
1099 | aac->comm_addr = NULL; | |
1100 | aac->comm_phys = 0; | |
1101 | kfree(aac->queues); | |
1102 | aac->queues = NULL; | |
1103 | free_irq(aac->pdev->irq, aac); | |
1104 | kfree(aac->fsa_dev); | |
1105 | aac->fsa_dev = NULL; | |
94cf6ba1 SM |
1106 | quirks = aac_get_driver_ident(index)->quirks; |
1107 | if (quirks & AAC_QUIRK_31BIT) { | |
9ad5204d SM |
1108 | if (((retval = pci_set_dma_mask(aac->pdev, DMA_31BIT_MASK))) || |
1109 | ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_31BIT_MASK)))) | |
8c867b25 MH |
1110 | goto out; |
1111 | } else { | |
9ad5204d SM |
1112 | if (((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK))) || |
1113 | ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_32BIT_MASK)))) | |
8c867b25 MH |
1114 | goto out; |
1115 | } | |
1116 | if ((retval = (*(aac_get_driver_ident(index)->init))(aac))) | |
1117 | goto out; | |
94cf6ba1 | 1118 | if (quirks & AAC_QUIRK_31BIT) |
8c867b25 MH |
1119 | if ((retval = pci_set_dma_mask(aac->pdev, DMA_32BIT_MASK))) |
1120 | goto out; | |
29c97684 SM |
1121 | if (jafo) { |
1122 | aac->thread = kthread_run(aac_command_thread, aac, aac->name); | |
1123 | if (IS_ERR(aac->thread)) { | |
1124 | retval = PTR_ERR(aac->thread); | |
1125 | goto out; | |
1126 | } | |
8c867b25 MH |
1127 | } |
1128 | (void)aac_get_adapter_info(aac); | |
8c867b25 MH |
1129 | if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) { |
1130 | host->sg_tablesize = 34; | |
1131 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1132 | } | |
1133 | if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) { | |
1134 | host->sg_tablesize = 17; | |
1135 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1136 | } | |
1137 | aac_get_config_status(aac, 1); | |
1138 | aac_get_containers(aac); | |
1139 | /* | |
1140 | * This is where the assumption that the Adapter is quiesced | |
1141 | * is important. | |
1142 | */ | |
1143 | command_list = NULL; | |
1144 | __shost_for_each_device(dev, host) { | |
1145 | unsigned long flags; | |
1146 | spin_lock_irqsave(&dev->list_lock, flags); | |
1147 | list_for_each_entry(command, &dev->cmd_list, list) | |
1148 | if (command->SCp.phase == AAC_OWNER_FIRMWARE) { | |
1149 | command->SCp.buffer = (struct scatterlist *)command_list; | |
1150 | command_list = command; | |
1151 | } | |
1152 | spin_unlock_irqrestore(&dev->list_lock, flags); | |
1153 | } | |
1154 | while ((command = command_list)) { | |
1155 | command_list = (struct scsi_cmnd *)command->SCp.buffer; | |
1156 | command->SCp.buffer = NULL; | |
1157 | command->result = DID_OK << 16 | |
1158 | | COMMAND_COMPLETE << 8 | |
1159 | | SAM_STAT_TASK_SET_FULL; | |
1160 | command->SCp.phase = AAC_OWNER_ERROR_HANDLER; | |
1161 | command->scsi_done(command); | |
1162 | } | |
1163 | retval = 0; | |
1164 | ||
1165 | out: | |
1166 | aac->in_reset = 0; | |
1167 | scsi_unblock_requests(host); | |
29c97684 SM |
1168 | if (jafo) { |
1169 | spin_lock_irq(host->host_lock); | |
1170 | } | |
1171 | return retval; | |
1172 | } | |
1173 | ||
1174 | int aac_reset_adapter(struct aac_dev * aac, int forced) | |
1175 | { | |
1176 | unsigned long flagv = 0; | |
1177 | int retval; | |
1178 | struct Scsi_Host * host; | |
1179 | ||
1180 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1181 | return -EBUSY; | |
1182 | ||
1183 | if (aac->in_reset) { | |
1184 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1185 | return -EBUSY; | |
1186 | } | |
1187 | aac->in_reset = 1; | |
1188 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1189 | ||
1190 | /* | |
1191 | * Wait for all commands to complete to this specific | |
1192 | * target (block maximum 60 seconds). Although not necessary, | |
1193 | * it does make us a good storage citizen. | |
1194 | */ | |
1195 | host = aac->scsi_host_ptr; | |
1196 | scsi_block_requests(host); | |
1197 | if (forced < 2) for (retval = 60; retval; --retval) { | |
1198 | struct scsi_device * dev; | |
1199 | struct scsi_cmnd * command; | |
1200 | int active = 0; | |
1201 | ||
1202 | __shost_for_each_device(dev, host) { | |
1203 | spin_lock_irqsave(&dev->list_lock, flagv); | |
1204 | list_for_each_entry(command, &dev->cmd_list, list) { | |
1205 | if (command->SCp.phase == AAC_OWNER_FIRMWARE) { | |
1206 | active++; | |
1207 | break; | |
1208 | } | |
1209 | } | |
1210 | spin_unlock_irqrestore(&dev->list_lock, flagv); | |
1211 | if (active) | |
1212 | break; | |
1213 | ||
1214 | } | |
1215 | /* | |
1216 | * We can exit If all the commands are complete | |
1217 | */ | |
1218 | if (active == 0) | |
1219 | break; | |
1220 | ssleep(1); | |
1221 | } | |
1222 | ||
1223 | /* Quiesce build, flush cache, write through mode */ | |
f858317d SM |
1224 | if (forced < 2) |
1225 | aac_send_shutdown(aac); | |
29c97684 | 1226 | spin_lock_irqsave(host->host_lock, flagv); |
f858317d | 1227 | retval = _aac_reset_adapter(aac, forced ? forced : ((aac_check_reset != 0) && (aac_check_reset != 1))); |
29c97684 SM |
1228 | spin_unlock_irqrestore(host->host_lock, flagv); |
1229 | ||
f858317d | 1230 | if ((forced < 2) && (retval == -ENODEV)) { |
29c97684 SM |
1231 | /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */ |
1232 | struct fib * fibctx = aac_fib_alloc(aac); | |
1233 | if (fibctx) { | |
1234 | struct aac_pause *cmd; | |
1235 | int status; | |
1236 | ||
1237 | aac_fib_init(fibctx); | |
1238 | ||
1239 | cmd = (struct aac_pause *) fib_data(fibctx); | |
1240 | ||
1241 | cmd->command = cpu_to_le32(VM_ContainerConfig); | |
1242 | cmd->type = cpu_to_le32(CT_PAUSE_IO); | |
1243 | cmd->timeout = cpu_to_le32(1); | |
1244 | cmd->min = cpu_to_le32(1); | |
1245 | cmd->noRescan = cpu_to_le32(1); | |
1246 | cmd->count = cpu_to_le32(0); | |
1247 | ||
1248 | status = aac_fib_send(ContainerCommand, | |
1249 | fibctx, | |
1250 | sizeof(struct aac_pause), | |
1251 | FsaNormal, | |
1252 | -2 /* Timeout silently */, 1, | |
1253 | NULL, NULL); | |
1254 | ||
1255 | if (status >= 0) | |
1256 | aac_fib_complete(fibctx); | |
1257 | aac_fib_free(fibctx); | |
1258 | } | |
1259 | } | |
1260 | ||
8c867b25 MH |
1261 | return retval; |
1262 | } | |
1263 | ||
1264 | int aac_check_health(struct aac_dev * aac) | |
1265 | { | |
1266 | int BlinkLED; | |
1267 | unsigned long time_now, flagv = 0; | |
1268 | struct list_head * entry; | |
1269 | struct Scsi_Host * host; | |
1270 | ||
1271 | /* Extending the scope of fib_lock slightly to protect aac->in_reset */ | |
1272 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1273 | return 0; | |
1274 | ||
1275 | if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) { | |
1276 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1277 | return 0; /* OK */ | |
1278 | } | |
1279 | ||
1280 | aac->in_reset = 1; | |
1281 | ||
1282 | /* Fake up an AIF: | |
1283 | * aac_aifcmd.command = AifCmdEventNotify = 1 | |
1284 | * aac_aifcmd.seqnum = 0xFFFFFFFF | |
1285 | * aac_aifcmd.data[0] = AifEnExpEvent = 23 | |
1286 | * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3 | |
1287 | * aac.aifcmd.data[2] = AifHighPriority = 3 | |
1288 | * aac.aifcmd.data[3] = BlinkLED | |
1289 | */ | |
1290 | ||
1291 | time_now = jiffies/HZ; | |
1292 | entry = aac->fib_list.next; | |
1293 | ||
1294 | /* | |
1295 | * For each Context that is on the | |
1296 | * fibctxList, make a copy of the | |
1297 | * fib, and then set the event to wake up the | |
1298 | * thread that is waiting for it. | |
1299 | */ | |
1300 | while (entry != &aac->fib_list) { | |
1301 | /* | |
1302 | * Extract the fibctx | |
1303 | */ | |
1304 | struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next); | |
1305 | struct hw_fib * hw_fib; | |
1306 | struct fib * fib; | |
1307 | /* | |
1308 | * Check if the queue is getting | |
1309 | * backlogged | |
1310 | */ | |
1311 | if (fibctx->count > 20) { | |
1312 | /* | |
1313 | * It's *not* jiffies folks, | |
1314 | * but jiffies / HZ, so do not | |
1315 | * panic ... | |
1316 | */ | |
1317 | u32 time_last = fibctx->jiffies; | |
1318 | /* | |
1319 | * Has it been > 2 minutes | |
1320 | * since the last read off | |
1321 | * the queue? | |
1322 | */ | |
1323 | if ((time_now - time_last) > aif_timeout) { | |
1324 | entry = entry->next; | |
1325 | aac_close_fib_context(aac, fibctx); | |
1326 | continue; | |
1327 | } | |
1328 | } | |
1329 | /* | |
1330 | * Warning: no sleep allowed while | |
1331 | * holding spinlock | |
1332 | */ | |
4dbc22d7 SM |
1333 | hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC); |
1334 | fib = kzalloc(sizeof(struct fib), GFP_ATOMIC); | |
8c867b25 MH |
1335 | if (fib && hw_fib) { |
1336 | struct aac_aifcmd * aif; | |
1337 | ||
a8166a52 | 1338 | fib->hw_fib_va = hw_fib; |
8c867b25 MH |
1339 | fib->dev = aac; |
1340 | aac_fib_init(fib); | |
1341 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
1342 | fib->size = sizeof (struct fib); | |
1343 | fib->data = hw_fib->data; | |
1344 | aif = (struct aac_aifcmd *)hw_fib->data; | |
1345 | aif->command = cpu_to_le32(AifCmdEventNotify); | |
a3940da5 SM |
1346 | aif->seqnum = cpu_to_le32(0xFFFFFFFF); |
1347 | ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent); | |
1348 | ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic); | |
1349 | ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority); | |
1350 | ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED); | |
8c867b25 MH |
1351 | |
1352 | /* | |
1353 | * Put the FIB onto the | |
1354 | * fibctx's fibs | |
1355 | */ | |
1356 | list_add_tail(&fib->fiblink, &fibctx->fib_list); | |
1357 | fibctx->count++; | |
1358 | /* | |
1359 | * Set the event to wake up the | |
1360 | * thread that will waiting. | |
1361 | */ | |
1362 | up(&fibctx->wait_sem); | |
1363 | } else { | |
1364 | printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); | |
1365 | kfree(fib); | |
1366 | kfree(hw_fib); | |
1367 | } | |
1368 | entry = entry->next; | |
1369 | } | |
1370 | ||
1371 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1372 | ||
1373 | if (BlinkLED < 0) { | |
1374 | printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED); | |
1375 | goto out; | |
1376 | } | |
1377 | ||
1378 | printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED); | |
1379 | ||
a3940da5 SM |
1380 | if (!aac_check_reset || ((aac_check_reset != 1) && |
1381 | (aac->supplement_adapter_info.SupportedOptions2 & | |
1382 | AAC_OPTION_IGNORE_RESET))) | |
29c97684 | 1383 | goto out; |
8c867b25 | 1384 | host = aac->scsi_host_ptr; |
29c97684 SM |
1385 | if (aac->thread->pid != current->pid) |
1386 | spin_lock_irqsave(host->host_lock, flagv); | |
f858317d | 1387 | BlinkLED = _aac_reset_adapter(aac, aac_check_reset != 1); |
29c97684 SM |
1388 | if (aac->thread->pid != current->pid) |
1389 | spin_unlock_irqrestore(host->host_lock, flagv); | |
8c867b25 MH |
1390 | return BlinkLED; |
1391 | ||
1392 | out: | |
1393 | aac->in_reset = 0; | |
1394 | return BlinkLED; | |
1395 | } | |
1396 | ||
1397 | ||
1da177e4 LT |
1398 | /** |
1399 | * aac_command_thread - command processing thread | |
1400 | * @dev: Adapter to monitor | |
1401 | * | |
1402 | * Waits on the commandready event in it's queue. When the event gets set | |
1403 | * it will pull FIBs off it's queue. It will continue to pull FIBs off | |
1404 | * until the queue is empty. When the queue is empty it will wait for | |
1405 | * more FIBs. | |
1406 | */ | |
1407 | ||
fe27381d | 1408 | int aac_command_thread(void *data) |
1da177e4 | 1409 | { |
fe27381d | 1410 | struct aac_dev *dev = data; |
1da177e4 LT |
1411 | struct hw_fib *hw_fib, *hw_newfib; |
1412 | struct fib *fib, *newfib; | |
1da177e4 LT |
1413 | struct aac_fib_context *fibctx; |
1414 | unsigned long flags; | |
1415 | DECLARE_WAITQUEUE(wait, current); | |
29c97684 SM |
1416 | unsigned long next_jiffies = jiffies + HZ; |
1417 | unsigned long next_check_jiffies = next_jiffies; | |
1418 | long difference = HZ; | |
1da177e4 LT |
1419 | |
1420 | /* | |
1421 | * We can only have one thread per adapter for AIF's. | |
1422 | */ | |
1423 | if (dev->aif_thread) | |
1424 | return -EINVAL; | |
fe27381d | 1425 | |
1da177e4 LT |
1426 | /* |
1427 | * Let the DPC know it has a place to send the AIF's to. | |
1428 | */ | |
1429 | dev->aif_thread = 1; | |
2f130980 | 1430 | add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); |
1da177e4 | 1431 | set_current_state(TASK_INTERRUPTIBLE); |
2f130980 | 1432 | dprintk ((KERN_INFO "aac_command_thread start\n")); |
1da177e4 LT |
1433 | while(1) |
1434 | { | |
2f130980 MH |
1435 | spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags); |
1436 | while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) { | |
1da177e4 LT |
1437 | struct list_head *entry; |
1438 | struct aac_aifcmd * aifcmd; | |
1439 | ||
1440 | set_current_state(TASK_RUNNING); | |
2f130980 MH |
1441 | |
1442 | entry = dev->queues->queue[HostNormCmdQueue].cmdq.next; | |
1da177e4 | 1443 | list_del(entry); |
2f130980 MH |
1444 | |
1445 | spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags); | |
1da177e4 LT |
1446 | fib = list_entry(entry, struct fib, fiblink); |
1447 | /* | |
1448 | * We will process the FIB here or pass it to a | |
1449 | * worker thread that is TBD. We Really can't | |
1450 | * do anything at this point since we don't have | |
1451 | * anything defined for this thread to do. | |
1452 | */ | |
a8166a52 | 1453 | hw_fib = fib->hw_fib_va; |
1da177e4 LT |
1454 | memset(fib, 0, sizeof(struct fib)); |
1455 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
1456 | fib->size = sizeof( struct fib ); | |
a8166a52 | 1457 | fib->hw_fib_va = hw_fib; |
1da177e4 LT |
1458 | fib->data = hw_fib->data; |
1459 | fib->dev = dev; | |
1460 | /* | |
1461 | * We only handle AifRequest fibs from the adapter. | |
1462 | */ | |
1463 | aifcmd = (struct aac_aifcmd *) hw_fib->data; | |
1464 | if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) { | |
1465 | /* Handle Driver Notify Events */ | |
131256cf | 1466 | aac_handle_aif(dev, fib); |
56b58712 | 1467 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); |
bfb35aa8 | 1468 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); |
1da177e4 LT |
1469 | } else { |
1470 | struct list_head *entry; | |
1471 | /* The u32 here is important and intended. We are using | |
1472 | 32bit wrapping time to fit the adapter field */ | |
1473 | ||
1474 | u32 time_now, time_last; | |
1475 | unsigned long flagv; | |
2f130980 MH |
1476 | unsigned num; |
1477 | struct hw_fib ** hw_fib_pool, ** hw_fib_p; | |
1478 | struct fib ** fib_pool, ** fib_p; | |
131256cf MH |
1479 | |
1480 | /* Sniff events */ | |
1481 | if ((aifcmd->command == | |
1482 | cpu_to_le32(AifCmdEventNotify)) || | |
1483 | (aifcmd->command == | |
1484 | cpu_to_le32(AifCmdJobProgress))) { | |
1485 | aac_handle_aif(dev, fib); | |
1486 | } | |
29c97684 | 1487 | |
1da177e4 LT |
1488 | time_now = jiffies/HZ; |
1489 | ||
2f130980 MH |
1490 | /* |
1491 | * Warning: no sleep allowed while | |
1492 | * holding spinlock. We take the estimate | |
1493 | * and pre-allocate a set of fibs outside the | |
1494 | * lock. | |
1495 | */ | |
1496 | num = le32_to_cpu(dev->init->AdapterFibsSize) | |
1497 | / sizeof(struct hw_fib); /* some extra */ | |
1498 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
1499 | entry = dev->fib_list.next; | |
1500 | while (entry != &dev->fib_list) { | |
1501 | entry = entry->next; | |
1502 | ++num; | |
1503 | } | |
1504 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
1505 | hw_fib_pool = NULL; | |
1506 | fib_pool = NULL; | |
1507 | if (num | |
1508 | && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL))) | |
1509 | && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) { | |
1510 | hw_fib_p = hw_fib_pool; | |
1511 | fib_p = fib_pool; | |
1512 | while (hw_fib_p < &hw_fib_pool[num]) { | |
1513 | if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) { | |
1514 | --hw_fib_p; | |
1515 | break; | |
1516 | } | |
1517 | if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) { | |
1518 | kfree(*(--hw_fib_p)); | |
1519 | break; | |
1520 | } | |
1521 | } | |
1522 | if ((num = hw_fib_p - hw_fib_pool) == 0) { | |
1523 | kfree(fib_pool); | |
1524 | fib_pool = NULL; | |
1525 | kfree(hw_fib_pool); | |
1526 | hw_fib_pool = NULL; | |
1527 | } | |
c9475cb0 | 1528 | } else { |
2f130980 MH |
1529 | kfree(hw_fib_pool); |
1530 | hw_fib_pool = NULL; | |
1531 | } | |
1da177e4 LT |
1532 | spin_lock_irqsave(&dev->fib_lock, flagv); |
1533 | entry = dev->fib_list.next; | |
1534 | /* | |
1535 | * For each Context that is on the | |
1536 | * fibctxList, make a copy of the | |
1537 | * fib, and then set the event to wake up the | |
1538 | * thread that is waiting for it. | |
1539 | */ | |
2f130980 MH |
1540 | hw_fib_p = hw_fib_pool; |
1541 | fib_p = fib_pool; | |
1da177e4 LT |
1542 | while (entry != &dev->fib_list) { |
1543 | /* | |
1544 | * Extract the fibctx | |
1545 | */ | |
1546 | fibctx = list_entry(entry, struct aac_fib_context, next); | |
1547 | /* | |
1548 | * Check if the queue is getting | |
1549 | * backlogged | |
1550 | */ | |
1551 | if (fibctx->count > 20) | |
1552 | { | |
1553 | /* | |
1554 | * It's *not* jiffies folks, | |
1555 | * but jiffies / HZ so do not | |
1556 | * panic ... | |
1557 | */ | |
1558 | time_last = fibctx->jiffies; | |
1559 | /* | |
1560 | * Has it been > 2 minutes | |
1561 | * since the last read off | |
1562 | * the queue? | |
1563 | */ | |
404d9a90 | 1564 | if ((time_now - time_last) > aif_timeout) { |
1da177e4 LT |
1565 | entry = entry->next; |
1566 | aac_close_fib_context(dev, fibctx); | |
1567 | continue; | |
1568 | } | |
1569 | } | |
1570 | /* | |
1571 | * Warning: no sleep allowed while | |
1572 | * holding spinlock | |
1573 | */ | |
2f130980 MH |
1574 | if (hw_fib_p < &hw_fib_pool[num]) { |
1575 | hw_newfib = *hw_fib_p; | |
1576 | *(hw_fib_p++) = NULL; | |
1577 | newfib = *fib_p; | |
1578 | *(fib_p++) = NULL; | |
1da177e4 LT |
1579 | /* |
1580 | * Make the copy of the FIB | |
1581 | */ | |
1582 | memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib)); | |
1583 | memcpy(newfib, fib, sizeof(struct fib)); | |
a8166a52 | 1584 | newfib->hw_fib_va = hw_newfib; |
1da177e4 LT |
1585 | /* |
1586 | * Put the FIB onto the | |
1587 | * fibctx's fibs | |
1588 | */ | |
1589 | list_add_tail(&newfib->fiblink, &fibctx->fib_list); | |
1590 | fibctx->count++; | |
1591 | /* | |
1592 | * Set the event to wake up the | |
2f130980 | 1593 | * thread that is waiting. |
1da177e4 LT |
1594 | */ |
1595 | up(&fibctx->wait_sem); | |
1596 | } else { | |
1597 | printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); | |
1da177e4 LT |
1598 | } |
1599 | entry = entry->next; | |
1600 | } | |
1601 | /* | |
1602 | * Set the status of this FIB | |
1603 | */ | |
56b58712 | 1604 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); |
bfb35aa8 | 1605 | aac_fib_adapter_complete(fib, sizeof(u32)); |
1da177e4 | 1606 | spin_unlock_irqrestore(&dev->fib_lock, flagv); |
2f130980 MH |
1607 | /* Free up the remaining resources */ |
1608 | hw_fib_p = hw_fib_pool; | |
1609 | fib_p = fib_pool; | |
1610 | while (hw_fib_p < &hw_fib_pool[num]) { | |
c9475cb0 JJ |
1611 | kfree(*hw_fib_p); |
1612 | kfree(*fib_p); | |
2f130980 MH |
1613 | ++fib_p; |
1614 | ++hw_fib_p; | |
1615 | } | |
c9475cb0 JJ |
1616 | kfree(hw_fib_pool); |
1617 | kfree(fib_pool); | |
1da177e4 | 1618 | } |
1da177e4 | 1619 | kfree(fib); |
2f130980 | 1620 | spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags); |
1da177e4 LT |
1621 | } |
1622 | /* | |
1623 | * There are no more AIF's | |
1624 | */ | |
2f130980 | 1625 | spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags); |
29c97684 SM |
1626 | |
1627 | /* | |
1628 | * Background activity | |
1629 | */ | |
1630 | if ((time_before(next_check_jiffies,next_jiffies)) | |
1631 | && ((difference = next_check_jiffies - jiffies) <= 0)) { | |
1632 | next_check_jiffies = next_jiffies; | |
1633 | if (aac_check_health(dev) == 0) { | |
1634 | difference = ((long)(unsigned)check_interval) | |
1635 | * HZ; | |
1636 | next_check_jiffies = jiffies + difference; | |
1637 | } else if (!dev->queues) | |
1638 | break; | |
1639 | } | |
1640 | if (!time_before(next_check_jiffies,next_jiffies) | |
1641 | && ((difference = next_jiffies - jiffies) <= 0)) { | |
1642 | struct timeval now; | |
1643 | int ret; | |
1644 | ||
1645 | /* Don't even try to talk to adapter if its sick */ | |
1646 | ret = aac_check_health(dev); | |
1647 | if (!ret && !dev->queues) | |
1648 | break; | |
1649 | next_check_jiffies = jiffies | |
1650 | + ((long)(unsigned)check_interval) | |
1651 | * HZ; | |
1652 | do_gettimeofday(&now); | |
1653 | ||
1654 | /* Synchronize our watches */ | |
1655 | if (((1000000 - (1000000 / HZ)) > now.tv_usec) | |
1656 | && (now.tv_usec > (1000000 / HZ))) | |
1657 | difference = (((1000000 - now.tv_usec) * HZ) | |
1658 | + 500000) / 1000000; | |
1659 | else if (ret == 0) { | |
1660 | struct fib *fibptr; | |
1661 | ||
1662 | if ((fibptr = aac_fib_alloc(dev))) { | |
f3307f72 | 1663 | __le32 *info; |
29c97684 SM |
1664 | |
1665 | aac_fib_init(fibptr); | |
1666 | ||
f3307f72 | 1667 | info = (__le32 *) fib_data(fibptr); |
29c97684 SM |
1668 | if (now.tv_usec > 500000) |
1669 | ++now.tv_sec; | |
1670 | ||
1671 | *info = cpu_to_le32(now.tv_sec); | |
1672 | ||
1673 | (void)aac_fib_send(SendHostTime, | |
1674 | fibptr, | |
1675 | sizeof(*info), | |
1676 | FsaNormal, | |
1677 | 1, 1, | |
1678 | NULL, | |
1679 | NULL); | |
1680 | aac_fib_complete(fibptr); | |
1681 | aac_fib_free(fibptr); | |
1682 | } | |
1683 | difference = (long)(unsigned)update_interval*HZ; | |
1684 | } else { | |
1685 | /* retry shortly */ | |
1686 | difference = 10 * HZ; | |
1687 | } | |
1688 | next_jiffies = jiffies + difference; | |
1689 | if (time_before(next_check_jiffies,next_jiffies)) | |
1690 | difference = next_check_jiffies - jiffies; | |
1691 | } | |
1692 | if (difference <= 0) | |
1693 | difference = 1; | |
1694 | set_current_state(TASK_INTERRUPTIBLE); | |
1695 | schedule_timeout(difference); | |
1da177e4 | 1696 | |
fe27381d | 1697 | if (kthread_should_stop()) |
1da177e4 | 1698 | break; |
1da177e4 | 1699 | } |
2f130980 MH |
1700 | if (dev->queues) |
1701 | remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); | |
1da177e4 | 1702 | dev->aif_thread = 0; |
2f130980 | 1703 | return 0; |
1da177e4 | 1704 | } |