]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blame - drivers/scsi/aacraid/commsup.c
scsi: aacraid: Reworked aac_command_thread
[mirror_ubuntu-zesty-kernel.git] / drivers / scsi / aacraid / commsup.c
CommitLineData
1da177e4
LT
1/*
2 * Adaptec AAC series RAID controller driver
fa195afe 3 * (c) Copyright 2001 Red Hat Inc.
1da177e4
LT
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
e8b12f0f
MR
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
1da177e4
LT
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Module Name:
26 * commsup.c
27 *
28 * Abstract: Contain all routines that are required for FSA host/adapter
7c00ffa3 29 * communication.
1da177e4
LT
30 *
31 */
32
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/types.h>
36#include <linux/sched.h>
37#include <linux/pci.h>
38#include <linux/spinlock.h>
39#include <linux/slab.h>
40#include <linux/completion.h>
41#include <linux/blkdev.h>
164006da 42#include <linux/delay.h>
fe27381d 43#include <linux/kthread.h>
6a3670c4 44#include <linux/interrupt.h>
6188e10d 45#include <linux/semaphore.h>
8c867b25 46#include <scsi/scsi.h>
7c00ffa3 47#include <scsi/scsi_host.h>
131256cf 48#include <scsi/scsi_device.h>
8c867b25 49#include <scsi/scsi_cmnd.h>
1da177e4
LT
50
51#include "aacraid.h"
52
53/**
54 * fib_map_alloc - allocate the fib objects
55 * @dev: Adapter to allocate for
56 *
57 * Allocate and map the shared PCI space for the FIB blocks used to
58 * talk to the Adaptec firmware.
59 */
8ce3eca4 60
1da177e4
LT
61static int fib_map_alloc(struct aac_dev *dev)
62{
932cc3d3
RAR
63 if (dev->max_fib_size > AAC_MAX_NATIVE_SIZE)
64 dev->max_cmd_size = AAC_MAX_NATIVE_SIZE;
65 else
66 dev->max_cmd_size = dev->max_fib_size;
67
7c00ffa3
MH
68 dprintk((KERN_INFO
69 "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
932cc3d3 70 dev->pdev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue,
7c00ffa3 71 AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
e8b12f0f 72 dev->hw_fib_va = pci_alloc_consistent(dev->pdev,
932cc3d3 73 (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr))
e8b12f0f
MR
74 * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1),
75 &dev->hw_fib_pa);
76 if (dev->hw_fib_va == NULL)
1da177e4
LT
77 return -ENOMEM;
78 return 0;
79}
80
81/**
bfb35aa8 82 * aac_fib_map_free - free the fib objects
1da177e4
LT
83 * @dev: Adapter to free
84 *
85 * Free the PCI mappings and the memory allocated for FIB blocks
86 * on this adapter.
87 */
88
bfb35aa8 89void aac_fib_map_free(struct aac_dev *dev)
1da177e4 90{
932cc3d3 91 if (dev->hw_fib_va && dev->max_cmd_size) {
f88fa79a 92 pci_free_consistent(dev->pdev,
932cc3d3 93 (dev->max_cmd_size *
f88fa79a
RAR
94 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)),
95 dev->hw_fib_va, dev->hw_fib_pa);
96 }
9ad5204d
SM
97 dev->hw_fib_va = NULL;
98 dev->hw_fib_pa = 0;
1da177e4
LT
99}
100
3f4ce057
RAR
101void aac_fib_vector_assign(struct aac_dev *dev)
102{
103 u32 i = 0;
104 u32 vector = 1;
105 struct fib *fibptr = NULL;
106
107 for (i = 0, fibptr = &dev->fibs[i];
108 i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
109 i++, fibptr++) {
110 if ((dev->max_msix == 1) ||
111 (i > ((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1)
112 - dev->vector_cap))) {
113 fibptr->vector_no = 0;
114 } else {
115 fibptr->vector_no = vector;
116 vector++;
117 if (vector == dev->max_msix)
118 vector = 1;
119 }
120 }
121}
122
1da177e4 123/**
bfb35aa8 124 * aac_fib_setup - setup the fibs
1da177e4
LT
125 * @dev: Adapter to set up
126 *
b595076a 127 * Allocate the PCI space for the fibs, map it and then initialise the
1da177e4
LT
128 * fib area, the unmapped fib data and also the free list
129 */
130
bfb35aa8 131int aac_fib_setup(struct aac_dev * dev)
1da177e4
LT
132{
133 struct fib *fibptr;
a8166a52 134 struct hw_fib *hw_fib;
1da177e4
LT
135 dma_addr_t hw_fib_pa;
136 int i;
a1751cda 137 u32 max_cmds;
7c00ffa3
MH
138
139 while (((i = fib_map_alloc(dev)) == -ENOMEM)
140 && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
a1751cda
RAR
141 max_cmds = (dev->scsi_host_ptr->can_queue+AAC_NUM_MGT_FIB) >> 1;
142 dev->scsi_host_ptr->can_queue = max_cmds - AAC_NUM_MGT_FIB;
143 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)
144 dev->init->r7.max_io_commands = cpu_to_le32(max_cmds);
7c00ffa3
MH
145 }
146 if (i<0)
1da177e4 147 return -ENOMEM;
8ce3eca4 148
e8b12f0f
MR
149 /* 32 byte alignment for PMC */
150 hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1);
151 dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
152 (hw_fib_pa - dev->hw_fib_pa));
153 dev->hw_fib_pa = hw_fib_pa;
154 memset(dev->hw_fib_va, 0,
155 (dev->max_fib_size + sizeof(struct aac_fib_xporthdr)) *
156 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
157
158 /* add Xport header */
159 dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
160 sizeof(struct aac_fib_xporthdr));
161 dev->hw_fib_pa += sizeof(struct aac_fib_xporthdr);
162
a8166a52 163 hw_fib = dev->hw_fib_va;
1da177e4 164 hw_fib_pa = dev->hw_fib_pa;
1da177e4
LT
165 /*
166 * Initialise the fibs
167 */
8ce3eca4
SM
168 for (i = 0, fibptr = &dev->fibs[i];
169 i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
170 i++, fibptr++)
1da177e4 171 {
85d22bbf 172 fibptr->flags = 0;
6bf3b630 173 fibptr->size = sizeof(struct fib);
1da177e4 174 fibptr->dev = dev;
a8166a52
MH
175 fibptr->hw_fib_va = hw_fib;
176 fibptr->data = (void *) fibptr->hw_fib_va->data;
1da177e4 177 fibptr->next = fibptr+1; /* Forward chain the fibs */
6de76cfc 178 sema_init(&fibptr->event_wait, 0);
1da177e4 179 spin_lock_init(&fibptr->event_lock);
a8166a52
MH
180 hw_fib->header.XferState = cpu_to_le32(0xffffffff);
181 hw_fib->header.SenderSize = cpu_to_le16(dev->max_fib_size);
1da177e4 182 fibptr->hw_fib_pa = hw_fib_pa;
e8b12f0f 183 hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
932cc3d3 184 dev->max_cmd_size + sizeof(struct aac_fib_xporthdr));
e8b12f0f 185 hw_fib_pa = hw_fib_pa +
932cc3d3 186 dev->max_cmd_size + sizeof(struct aac_fib_xporthdr);
1da177e4 187 }
3f4ce057
RAR
188
189 /*
190 *Assign vector numbers to fibs
191 */
192 aac_fib_vector_assign(dev);
193
1da177e4
LT
194 /*
195 * Add the fib chain to the free list
196 */
7c00ffa3 197 dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
1da177e4 198 /*
6bf3b630
RAR
199 * Set 8 fibs aside for management tools
200 */
201 dev->free_fib = &dev->fibs[dev->scsi_host_ptr->can_queue];
1da177e4
LT
202 return 0;
203}
204
6bf3b630
RAR
205/**
206 * aac_fib_alloc_tag-allocate a fib using tags
207 * @dev: Adapter to allocate the fib for
208 *
209 * Allocate a fib from the adapter fib pool using tags
210 * from the blk layer.
211 */
212
213struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd)
214{
215 struct fib *fibptr;
216
217 fibptr = &dev->fibs[scmd->request->tag];
218 /*
219 * Null out fields that depend on being zero at the start of
220 * each I/O
221 */
222 fibptr->hw_fib_va->header.XferState = 0;
223 fibptr->type = FSAFS_NTC_FIB_CONTEXT;
224 fibptr->callback_data = NULL;
225 fibptr->callback = NULL;
226
227 return fibptr;
228}
229
1da177e4 230/**
bfb35aa8 231 * aac_fib_alloc - allocate a fib
1da177e4
LT
232 * @dev: Adapter to allocate the fib for
233 *
234 * Allocate a fib from the adapter fib pool. If the pool is empty we
7c00ffa3 235 * return NULL.
1da177e4 236 */
8ce3eca4 237
bfb35aa8 238struct fib *aac_fib_alloc(struct aac_dev *dev)
1da177e4
LT
239{
240 struct fib * fibptr;
241 unsigned long flags;
242 spin_lock_irqsave(&dev->fib_lock, flags);
8ce3eca4 243 fibptr = dev->free_fib;
7c00ffa3
MH
244 if(!fibptr){
245 spin_unlock_irqrestore(&dev->fib_lock, flags);
246 return fibptr;
247 }
1da177e4
LT
248 dev->free_fib = fibptr->next;
249 spin_unlock_irqrestore(&dev->fib_lock, flags);
250 /*
251 * Set the proper node type code and node byte size
252 */
253 fibptr->type = FSAFS_NTC_FIB_CONTEXT;
254 fibptr->size = sizeof(struct fib);
255 /*
256 * Null out fields that depend on being zero at the start of
257 * each I/O
258 */
a8166a52 259 fibptr->hw_fib_va->header.XferState = 0;
b6ef70f3 260 fibptr->flags = 0;
1da177e4
LT
261 fibptr->callback = NULL;
262 fibptr->callback_data = NULL;
263
264 return fibptr;
265}
266
267/**
bfb35aa8 268 * aac_fib_free - free a fib
1da177e4
LT
269 * @fibptr: fib to free up
270 *
271 * Frees up a fib and places it on the appropriate queue
1da177e4 272 */
8ce3eca4 273
bfb35aa8 274void aac_fib_free(struct fib *fibptr)
1da177e4 275{
ef616233 276 unsigned long flags;
cacb6dc3 277
ef616233 278 if (fibptr->done == 2)
cacb6dc3 279 return;
1da177e4
LT
280
281 spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
03d44337 282 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 283 aac_config.fib_timeouts++;
03d44337
MH
284 if (fibptr->hw_fib_va->header.XferState != 0) {
285 printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
286 (void*)fibptr,
287 le32_to_cpu(fibptr->hw_fib_va->header.XferState));
288 }
289 fibptr->next = fibptr->dev->free_fib;
290 fibptr->dev->free_fib = fibptr;
1da177e4
LT
291 spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
292}
293
294/**
bfb35aa8 295 * aac_fib_init - initialise a fib
1da177e4 296 * @fibptr: The fib to initialize
8ce3eca4 297 *
1da177e4
LT
298 * Set up the generic fib fields ready for use
299 */
8ce3eca4 300
bfb35aa8 301void aac_fib_init(struct fib *fibptr)
1da177e4 302{
a8166a52 303 struct hw_fib *hw_fib = fibptr->hw_fib_va;
1da177e4 304
85d22bbf 305 memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr));
1da177e4 306 hw_fib->header.StructType = FIB_MAGIC;
7c00ffa3
MH
307 hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
308 hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
85d22bbf 309 hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
7c00ffa3 310 hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
1da177e4
LT
311}
312
313/**
314 * fib_deallocate - deallocate a fib
315 * @fibptr: fib to deallocate
316 *
317 * Will deallocate and return to the free pool the FIB pointed to by the
318 * caller.
319 */
8ce3eca4 320
4833869e 321static void fib_dealloc(struct fib * fibptr)
1da177e4 322{
a8166a52 323 struct hw_fib *hw_fib = fibptr->hw_fib_va;
8ce3eca4 324 hw_fib->header.XferState = 0;
1da177e4
LT
325}
326
327/*
328 * Commuication primitives define and support the queuing method we use to
329 * support host to adapter commuication. All queue accesses happen through
330 * these routines and are the only routines which have a knowledge of the
331 * how these queues are implemented.
332 */
8ce3eca4 333
1da177e4
LT
334/**
335 * aac_get_entry - get a queue entry
336 * @dev: Adapter
337 * @qid: Queue Number
338 * @entry: Entry return
339 * @index: Index return
340 * @nonotify: notification control
341 *
342 * With a priority the routine returns a queue entry if the queue has free entries. If the queue
343 * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
344 * returned.
345 */
8ce3eca4 346
1da177e4
LT
347static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
348{
349 struct aac_queue * q;
bed30de4 350 unsigned long idx;
1da177e4
LT
351
352 /*
353 * All of the queues wrap when they reach the end, so we check
354 * to see if they have reached the end and if they have we just
355 * set the index back to zero. This is a wrap. You could or off
356 * the high bits in all updates but this is a bit faster I think.
357 */
358
359 q = &dev->queues->queue[qid];
bed30de4
MH
360
361 idx = *index = le32_to_cpu(*(q->headers.producer));
362 /* Interrupt Moderation, only interrupt for first two entries */
363 if (idx != le32_to_cpu(*(q->headers.consumer))) {
364 if (--idx == 0) {
1640a2c3 365 if (qid == AdapNormCmdQueue)
bed30de4 366 idx = ADAP_NORM_CMD_ENTRIES;
1640a2c3 367 else
bed30de4
MH
368 idx = ADAP_NORM_RESP_ENTRIES;
369 }
370 if (idx != le32_to_cpu(*(q->headers.consumer)))
8ce3eca4 371 *nonotify = 1;
bed30de4 372 }
1da177e4 373
1640a2c3 374 if (qid == AdapNormCmdQueue) {
8ce3eca4 375 if (*index >= ADAP_NORM_CMD_ENTRIES)
1da177e4 376 *index = 0; /* Wrap to front of the Producer Queue. */
1640a2c3 377 } else {
8ce3eca4 378 if (*index >= ADAP_NORM_RESP_ENTRIES)
1da177e4
LT
379 *index = 0; /* Wrap to front of the Producer Queue. */
380 }
1da177e4 381
8ce3eca4
SM
382 /* Queue is full */
383 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) {
7c00ffa3 384 printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
ef616233 385 qid, atomic_read(&q->numpending));
1da177e4
LT
386 return 0;
387 } else {
8ce3eca4 388 *entry = q->base + *index;
1da177e4
LT
389 return 1;
390 }
8ce3eca4 391}
1da177e4
LT
392
393/**
394 * aac_queue_get - get the next free QE
395 * @dev: Adapter
396 * @index: Returned index
397 * @priority: Priority of fib
398 * @fib: Fib to associate with the queue entry
399 * @wait: Wait if queue full
400 * @fibptr: Driver fib object to go with fib
401 * @nonotify: Don't notify the adapter
402 *
403 * Gets the next free QE off the requested priorty adapter command
404 * queue and associates the Fib with the QE. The QE represented by
405 * index is ready to insert on the queue when this routine returns
406 * success.
407 */
408
28713324 409int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
1da177e4
LT
410{
411 struct aac_entry * entry = NULL;
412 int map = 0;
8ce3eca4 413
1640a2c3 414 if (qid == AdapNormCmdQueue) {
1da177e4 415 /* if no entries wait for some if caller wants to */
8ce3eca4 416 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
417 printk(KERN_ERR "GetEntries failed\n");
418 }
8ce3eca4
SM
419 /*
420 * Setup queue entry with a command, status and fib mapped
421 */
422 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
423 map = 1;
1640a2c3 424 } else {
8ce3eca4 425 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
426 /* if no entries wait for some if caller wants to */
427 }
8ce3eca4
SM
428 /*
429 * Setup queue entry with command, status and fib mapped
430 */
431 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
432 entry->addr = hw_fib->header.SenderFibAddress;
433 /* Restore adapters pointer to the FIB */
85d22bbf 434 hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
8ce3eca4 435 map = 0;
1da177e4
LT
436 }
437 /*
438 * If MapFib is true than we need to map the Fib and put pointers
439 * in the queue entry.
440 */
441 if (map)
442 entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
443 return 0;
444}
445
1da177e4 446/*
8ce3eca4
SM
447 * Define the highest level of host to adapter communication routines.
448 * These routines will support host to adapter FS commuication. These
1da177e4
LT
449 * routines have no knowledge of the commuication method used. This level
450 * sends and receives FIBs. This level has no knowledge of how these FIBs
451 * get passed back and forth.
452 */
453
454/**
bfb35aa8 455 * aac_fib_send - send a fib to the adapter
1da177e4
LT
456 * @command: Command to send
457 * @fibptr: The fib
458 * @size: Size of fib data area
459 * @priority: Priority of Fib
460 * @wait: Async/sync select
461 * @reply: True if a reply is wanted
462 * @callback: Called with reply
463 * @callback_data: Passed to callback
464 *
465 * Sends the requested FIB to the adapter and optionally will wait for a
466 * response FIB. If the caller does not wish to wait for a response than
467 * an event to wait on must be supplied. This event will be set when a
468 * response FIB is received from the adapter.
469 */
8ce3eca4 470
bfb35aa8
MH
471int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
472 int priority, int wait, int reply, fib_callback callback,
473 void *callback_data)
1da177e4 474{
1da177e4 475 struct aac_dev * dev = fibptr->dev;
a8166a52 476 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 477 unsigned long flags = 0;
cacb6dc3 478 unsigned long mflags = 0;
11604612 479 unsigned long sflags = 0;
cacb6dc3 480
1640a2c3 481
1da177e4
LT
482 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
483 return -EBUSY;
484 /*
25985edc 485 * There are 5 cases with the wait and response requested flags.
1da177e4
LT
486 * The only invalid cases are if the caller requests to wait and
487 * does not request a response and if the caller does not want a
488 * response and the Fib is not allocated from pool. If a response
489 * is not requesed the Fib will just be deallocaed by the DPC
490 * routine when the response comes back from the adapter. No
8ce3eca4 491 * further processing will be done besides deleting the Fib. We
1da177e4
LT
492 * will have a debug mode where the adapter can notify the host
493 * it had a problem and the host can log that fact.
494 */
b6ef70f3 495 fibptr->flags = 0;
1da177e4
LT
496 if (wait && !reply) {
497 return -EINVAL;
498 } else if (!wait && reply) {
499 hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
500 FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
501 } else if (!wait && !reply) {
502 hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
503 FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
504 } else if (wait && reply) {
505 hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
506 FIB_COUNTER_INCREMENT(aac_config.NormalSent);
8ce3eca4 507 }
1da177e4
LT
508 /*
509 * Map the fib into 32bits by using the fib number
510 */
511
8e0c5ebd 512 hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
85d22bbf 513 hw_fib->header.Handle = (u32)(fibptr - dev->fibs) + 1;
1da177e4
LT
514 /*
515 * Set FIB state to indicate where it came from and if we want a
516 * response from the adapter. Also load the command from the
517 * caller.
518 *
519 * Map the hw fib pointer as a 32bit value
520 */
521 hw_fib->header.Command = cpu_to_le16(command);
522 hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
1da177e4
LT
523 /*
524 * Set the size of the Fib we want to send to the adapter
525 */
526 hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
527 if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
528 return -EMSGSIZE;
8ce3eca4 529 }
1da177e4
LT
530 /*
531 * Get a queue entry connect the FIB to it and send an notify
532 * the adapter a command is ready.
533 */
1640a2c3 534 hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
1da177e4 535
1da177e4
LT
536 /*
537 * Fill in the Callback and CallbackContext if we are not
538 * going to wait.
539 */
540 if (!wait) {
541 fibptr->callback = callback;
542 fibptr->callback_data = callback_data;
b6ef70f3 543 fibptr->flags = FIB_CONTEXT_FLAG;
1da177e4 544 }
1da177e4
LT
545
546 fibptr->done = 0;
1da177e4 547
1640a2c3
MH
548 FIB_COUNTER_INCREMENT(aac_config.FibsSent);
549
1640a2c3 550 dprintk((KERN_DEBUG "Fib contents:.\n"));
8e0c5ebd
MH
551 dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
552 dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
553 dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
a8166a52 554 dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va));
1640a2c3
MH
555 dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
556 dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
557
c8f7b073 558 if (!dev->queues)
65101355 559 return -EBUSY;
1640a2c3 560
cacb6dc3
PNRCEH
561 if (wait) {
562
563 spin_lock_irqsave(&dev->manage_lock, mflags);
564 if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
565 printk(KERN_INFO "No management Fibs Available:%d\n",
566 dev->management_fib_count);
567 spin_unlock_irqrestore(&dev->manage_lock, mflags);
568 return -EBUSY;
569 }
570 dev->management_fib_count++;
571 spin_unlock_irqrestore(&dev->manage_lock, mflags);
1640a2c3 572 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3
PNRCEH
573 }
574
11604612
MR
575 if (dev->sync_mode) {
576 if (wait)
577 spin_unlock_irqrestore(&fibptr->event_lock, flags);
578 spin_lock_irqsave(&dev->sync_lock, sflags);
579 if (dev->sync_fib) {
580 list_add_tail(&fibptr->fiblink, &dev->sync_fib_list);
581 spin_unlock_irqrestore(&dev->sync_lock, sflags);
582 } else {
583 dev->sync_fib = fibptr;
584 spin_unlock_irqrestore(&dev->sync_lock, sflags);
585 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
586 (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0,
587 NULL, NULL, NULL, NULL, NULL);
588 }
589 if (wait) {
590 fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
591 if (down_interruptible(&fibptr->event_wait)) {
592 fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT;
593 return -EFAULT;
594 }
595 return 0;
596 }
597 return -EINPROGRESS;
598 }
599
cacb6dc3
PNRCEH
600 if (aac_adapter_deliver(fibptr) != 0) {
601 printk(KERN_ERR "aac_fib_send: returned -EBUSY\n");
602 if (wait) {
603 spin_unlock_irqrestore(&fibptr->event_lock, flags);
604 spin_lock_irqsave(&dev->manage_lock, mflags);
605 dev->management_fib_count--;
606 spin_unlock_irqrestore(&dev->manage_lock, mflags);
607 }
608 return -EBUSY;
609 }
610
8e0c5ebd 611
1da177e4 612 /*
8ce3eca4 613 * If the caller wanted us to wait for response wait now.
1da177e4 614 */
8ce3eca4 615
1da177e4
LT
616 if (wait) {
617 spin_unlock_irqrestore(&fibptr->event_lock, flags);
9203344c
MH
618 /* Only set for first known interruptable command */
619 if (wait < 0) {
620 /*
621 * *VERY* Dangerous to time out a command, the
622 * assumption is made that we have no hope of
623 * functioning because an interrupt routing or other
624 * hardware failure has occurred.
625 */
30002f1c 626 unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */
9203344c 627 while (down_trylock(&fibptr->event_wait)) {
33524b70 628 int blink;
30002f1c 629 if (time_is_before_eq_jiffies(timeout)) {
28713324 630 struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
ef616233 631 atomic_dec(&q->numpending);
9203344c 632 if (wait == -1) {
bfb35aa8 633 printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
9203344c
MH
634 "Usually a result of a PCI interrupt routing problem;\n"
635 "update mother board BIOS or consider utilizing one of\n"
636 "the SAFE mode kernel options (acpi, apic etc)\n");
637 }
638 return -ETIMEDOUT;
639 }
33524b70
MH
640 if ((blink = aac_adapter_check_health(dev)) > 0) {
641 if (wait == -1) {
642 printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n"
643 "Usually a result of a serious unrecoverable hardware problem\n",
644 blink);
645 }
646 return -EFAULT;
647 }
07beca2b
RAR
648 /*
649 * Allow other processes / CPUS to use core
650 */
651 schedule();
9203344c 652 }
0462590e 653 } else if (down_interruptible(&fibptr->event_wait)) {
cacb6dc3
PNRCEH
654 /* Do nothing ... satisfy
655 * down_interruptible must_check */
e6990c64 656 }
cacb6dc3 657
33bb3b29 658 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3 659 if (fibptr->done == 0) {
33bb3b29 660 fibptr->done = 2; /* Tell interrupt we aborted */
c8f7b073 661 spin_unlock_irqrestore(&fibptr->event_lock, flags);
cacb6dc3 662 return -ERESTARTSYS;
c8f7b073 663 }
33bb3b29 664 spin_unlock_irqrestore(&fibptr->event_lock, flags);
125e1874 665 BUG_ON(fibptr->done == 0);
8ce3eca4 666
912d4e88 667 if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 668 return -ETIMEDOUT;
912d4e88 669 return 0;
1da177e4
LT
670 }
671 /*
672 * If the user does not want a response than return success otherwise
673 * return pending
674 */
675 if (reply)
676 return -EINPROGRESS;
677 else
678 return 0;
679}
680
8ce3eca4 681/**
1da177e4
LT
682 * aac_consumer_get - get the top of the queue
683 * @dev: Adapter
684 * @q: Queue
685 * @entry: Return entry
686 *
687 * Will return a pointer to the entry on the top of the queue requested that
8ce3eca4
SM
688 * we are a consumer of, and return the address of the queue entry. It does
689 * not change the state of the queue.
1da177e4
LT
690 */
691
692int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
693{
694 u32 index;
695 int status;
696 if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
697 status = 0;
698 } else {
699 /*
700 * The consumer index must be wrapped if we have reached
701 * the end of the queue, else we just use the entry
702 * pointed to by the header index
703 */
8ce3eca4
SM
704 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
705 index = 0;
1da177e4 706 else
8ce3eca4 707 index = le32_to_cpu(*q->headers.consumer);
1da177e4
LT
708 *entry = q->base + index;
709 status = 1;
710 }
711 return(status);
712}
713
714/**
715 * aac_consumer_free - free consumer entry
716 * @dev: Adapter
717 * @q: Queue
718 * @qid: Queue ident
719 *
720 * Frees up the current top of the queue we are a consumer of. If the
721 * queue was full notify the producer that the queue is no longer full.
722 */
723
724void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
725{
726 int wasfull = 0;
727 u32 notify;
728
729 if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
730 wasfull = 1;
8ce3eca4 731
1da177e4
LT
732 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
733 *q->headers.consumer = cpu_to_le32(1);
734 else
36b8dd1b 735 le32_add_cpu(q->headers.consumer, 1);
8ce3eca4 736
1da177e4
LT
737 if (wasfull) {
738 switch (qid) {
739
740 case HostNormCmdQueue:
741 notify = HostNormCmdNotFull;
742 break;
1da177e4
LT
743 case HostNormRespQueue:
744 notify = HostNormRespNotFull;
745 break;
1da177e4
LT
746 default:
747 BUG();
748 return;
749 }
750 aac_adapter_notify(dev, notify);
751 }
8ce3eca4 752}
1da177e4
LT
753
754/**
bfb35aa8 755 * aac_fib_adapter_complete - complete adapter issued fib
1da177e4
LT
756 * @fibptr: fib to complete
757 * @size: size of fib
758 *
759 * Will do all necessary work to complete a FIB that was sent from
760 * the adapter.
761 */
762
bfb35aa8 763int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
1da177e4 764{
a8166a52 765 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 766 struct aac_dev * dev = fibptr->dev;
1640a2c3 767 struct aac_queue * q;
1da177e4 768 unsigned long nointr = 0;
1640a2c3
MH
769 unsigned long qflags;
770
85d22bbf 771 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 ||
a1751cda
RAR
772 dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 ||
773 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
e8b12f0f
MR
774 kfree(hw_fib);
775 return 0;
776 }
777
1640a2c3 778 if (hw_fib->header.XferState == 0) {
28713324 779 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 780 kfree(hw_fib);
8ce3eca4 781 return 0;
1640a2c3 782 }
1da177e4
LT
783 /*
784 * If we plan to do anything check the structure type first.
8ce3eca4 785 */
85d22bbf
MR
786 if (hw_fib->header.StructType != FIB_MAGIC &&
787 hw_fib->header.StructType != FIB_MAGIC2 &&
788 hw_fib->header.StructType != FIB_MAGIC2_64) {
28713324 789 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 790 kfree(hw_fib);
8ce3eca4 791 return -EINVAL;
1da177e4
LT
792 }
793 /*
794 * This block handles the case where the adapter had sent us a
795 * command and we have finished processing the command. We
8ce3eca4
SM
796 * call completeFib when we are done processing the command
797 * and want to send a response back to the adapter. This will
1da177e4
LT
798 * send the completed cdb to the adapter.
799 */
800 if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
28713324 801 if (dev->comm_interface == AAC_COMM_MESSAGE) {
8e0c5ebd
MH
802 kfree (hw_fib);
803 } else {
8ce3eca4
SM
804 u32 index;
805 hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
8e0c5ebd
MH
806 if (size) {
807 size += sizeof(struct aac_fibhdr);
8ce3eca4 808 if (size > le16_to_cpu(hw_fib->header.SenderSize))
8e0c5ebd
MH
809 return -EMSGSIZE;
810 hw_fib->header.Size = cpu_to_le16(size);
811 }
812 q = &dev->queues->queue[AdapNormRespQueue];
813 spin_lock_irqsave(q->lock, qflags);
814 aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
815 *(q->headers.producer) = cpu_to_le32(index + 1);
816 spin_unlock_irqrestore(q->lock, qflags);
817 if (!(nointr & (int)aac_config.irq_mod))
818 aac_adapter_notify(dev, AdapNormRespQueue);
1da177e4 819 }
8ce3eca4
SM
820 } else {
821 printk(KERN_WARNING "aac_fib_adapter_complete: "
822 "Unknown xferstate detected.\n");
823 BUG();
1da177e4 824 }
1da177e4
LT
825 return 0;
826}
827
828/**
bfb35aa8 829 * aac_fib_complete - fib completion handler
1da177e4
LT
830 * @fib: FIB to complete
831 *
832 * Will do all necessary work to complete a FIB.
833 */
8ce3eca4 834
bfb35aa8 835int aac_fib_complete(struct fib *fibptr)
1da177e4 836{
a8166a52 837 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4
LT
838
839 /*
840 * Check for a fib which has already been completed
841 */
842
843 if (hw_fib->header.XferState == 0)
8ce3eca4 844 return 0;
1da177e4
LT
845 /*
846 * If we plan to do anything check the structure type first.
8ce3eca4 847 */
1da177e4 848
85d22bbf
MR
849 if (hw_fib->header.StructType != FIB_MAGIC &&
850 hw_fib->header.StructType != FIB_MAGIC2 &&
851 hw_fib->header.StructType != FIB_MAGIC2_64)
8ce3eca4 852 return -EINVAL;
1da177e4 853 /*
8ce3eca4 854 * This block completes a cdb which orginated on the host and we
1da177e4
LT
855 * just need to deallocate the cdb or reinit it. At this point the
856 * command is complete that we had sent to the adapter and this
857 * cdb could be reused.
858 */
cacb6dc3 859
1da177e4
LT
860 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
861 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
862 {
863 fib_dealloc(fibptr);
864 }
865 else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
866 {
867 /*
868 * This handles the case when the host has aborted the I/O
869 * to the adapter because the adapter is not responding
870 */
871 fib_dealloc(fibptr);
872 } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
873 fib_dealloc(fibptr);
874 } else {
875 BUG();
8ce3eca4 876 }
1da177e4
LT
877 return 0;
878}
879
880/**
881 * aac_printf - handle printf from firmware
882 * @dev: Adapter
883 * @val: Message info
884 *
885 * Print a message passed to us by the controller firmware on the
886 * Adaptec board
887 */
888
889void aac_printf(struct aac_dev *dev, u32 val)
890{
1da177e4 891 char *cp = dev->printfbuf;
7c00ffa3
MH
892 if (dev->printf_enabled)
893 {
894 int length = val & 0xffff;
895 int level = (val >> 16) & 0xffff;
8ce3eca4 896
7c00ffa3
MH
897 /*
898 * The size of the printfbuf is set in port.c
899 * There is no variable or define for it
900 */
901 if (length > 255)
902 length = 255;
903 if (cp[length] != 0)
904 cp[length] = 0;
905 if (level == LOG_AAC_HIGH_ERROR)
1241f359 906 printk(KERN_WARNING "%s:%s", dev->name, cp);
7c00ffa3 907 else
1241f359 908 printk(KERN_INFO "%s:%s", dev->name, cp);
7c00ffa3 909 }
8ce3eca4 910 memset(cp, 0, 256);
1da177e4
LT
911}
912
9cb62fa2
RAR
913static inline int aac_aif_data(struct aac_aifcmd *aifcmd, uint32_t index)
914{
915 return le32_to_cpu(((__le32 *)aifcmd->data)[index]);
916}
917
918
919static void aac_handle_aif_bu(struct aac_dev *dev, struct aac_aifcmd *aifcmd)
920{
921 switch (aac_aif_data(aifcmd, 1)) {
922 case AifBuCacheDataLoss:
923 if (aac_aif_data(aifcmd, 2))
924 dev_info(&dev->pdev->dev, "Backup unit had cache data loss - [%d]\n",
925 aac_aif_data(aifcmd, 2));
926 else
927 dev_info(&dev->pdev->dev, "Backup Unit had cache data loss\n");
928 break;
929 case AifBuCacheDataRecover:
930 if (aac_aif_data(aifcmd, 2))
931 dev_info(&dev->pdev->dev, "DDR cache data recovered successfully - [%d]\n",
932 aac_aif_data(aifcmd, 2));
933 else
934 dev_info(&dev->pdev->dev, "DDR cache data recovered successfully\n");
935 break;
936 }
937}
131256cf
MH
938
939/**
940 * aac_handle_aif - Handle a message from the firmware
941 * @dev: Which adapter this fib is from
942 * @fibptr: Pointer to fibptr from adapter
943 *
944 * This routine handles a driver notify fib from the adapter and
945 * dispatches it to the appropriate routine for handling.
946 */
947
495c0217 948#define AIF_SNIFF_TIMEOUT (500*HZ)
131256cf
MH
949static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
950{
a8166a52 951 struct hw_fib * hw_fib = fibptr->hw_fib_va;
131256cf 952 struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
0995ad38 953 u32 channel, id, lun, container;
131256cf
MH
954 struct scsi_device *device;
955 enum {
956 NOTHING,
957 DELETE,
958 ADD,
959 CHANGE
0995ad38 960 } device_config_needed = NOTHING;
131256cf
MH
961
962 /* Sniff for container changes */
963
c8f7b073 964 if (!dev || !dev->fsa_dev)
131256cf 965 return;
0995ad38 966 container = channel = id = lun = (u32)-1;
131256cf
MH
967
968 /*
969 * We have set this up to try and minimize the number of
970 * re-configures that take place. As a result of this when
971 * certain AIF's come in we will set a flag waiting for another
972 * type of AIF before setting the re-config flag.
973 */
974 switch (le32_to_cpu(aifcmd->command)) {
975 case AifCmdDriverNotify:
f3307f72 976 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
dab04b01
MR
977 case AifRawDeviceRemove:
978 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
979 if ((container >> 28)) {
980 container = (u32)-1;
981 break;
982 }
983 channel = (container >> 24) & 0xF;
984 if (channel >= dev->maximum_num_channels) {
985 container = (u32)-1;
986 break;
987 }
988 id = container & 0xFFFF;
989 if (id >= dev->maximum_num_physicals) {
990 container = (u32)-1;
991 break;
992 }
993 lun = (container >> 16) & 0xFF;
994 container = (u32)-1;
995 channel = aac_phys_to_logical(channel);
996 device_config_needed =
997 (((__le32 *)aifcmd->data)[0] ==
998 cpu_to_le32(AifRawDeviceRemove)) ? DELETE : ADD;
999
1000 if (device_config_needed == ADD) {
1001 device = scsi_device_lookup(
1002 dev->scsi_host_ptr,
1003 channel, id, lun);
1004 if (device) {
1005 scsi_remove_device(device);
1006 scsi_device_put(device);
1007 }
1008 }
1009 break;
131256cf
MH
1010 /*
1011 * Morph or Expand complete
1012 */
1013 case AifDenMorphComplete:
1014 case AifDenVolumeExtendComplete:
f3307f72 1015 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1016 if (container >= dev->maximum_num_containers)
1017 break;
1018
1019 /*
f64a181d 1020 * Find the scsi_device associated with the SCSI
131256cf
MH
1021 * address. Make sure we have the right array, and if
1022 * so set the flag to initiate a new re-config once we
1023 * see an AifEnConfigChange AIF come through.
1024 */
1025
1026 if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
8ce3eca4
SM
1027 device = scsi_device_lookup(dev->scsi_host_ptr,
1028 CONTAINER_TO_CHANNEL(container),
1029 CONTAINER_TO_ID(container),
131256cf
MH
1030 CONTAINER_TO_LUN(container));
1031 if (device) {
1032 dev->fsa_dev[container].config_needed = CHANGE;
1033 dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
31876f32 1034 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1035 scsi_device_put(device);
1036 }
1037 }
1038 }
1039
1040 /*
1041 * If we are waiting on something and this happens to be
1042 * that thing then set the re-configure flag.
1043 */
1044 if (container != (u32)-1) {
1045 if (container >= dev->maximum_num_containers)
1046 break;
31876f32 1047 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1048 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1049 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1050 dev->fsa_dev[container].config_waiting_on = 0;
1051 } else for (container = 0;
1052 container < dev->maximum_num_containers; ++container) {
31876f32 1053 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1054 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1055 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1056 dev->fsa_dev[container].config_waiting_on = 0;
1057 }
1058 break;
1059
1060 case AifCmdEventNotify:
f3307f72 1061 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
95e852e1
SM
1062 case AifEnBatteryEvent:
1063 dev->cache_protected =
1064 (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3));
1065 break;
131256cf
MH
1066 /*
1067 * Add an Array.
1068 */
1069 case AifEnAddContainer:
f3307f72 1070 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1071 if (container >= dev->maximum_num_containers)
1072 break;
1073 dev->fsa_dev[container].config_needed = ADD;
1074 dev->fsa_dev[container].config_waiting_on =
1075 AifEnConfigChange;
31876f32 1076 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1077 break;
1078
1079 /*
1080 * Delete an Array.
1081 */
1082 case AifEnDeleteContainer:
f3307f72 1083 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1084 if (container >= dev->maximum_num_containers)
1085 break;
1086 dev->fsa_dev[container].config_needed = DELETE;
1087 dev->fsa_dev[container].config_waiting_on =
1088 AifEnConfigChange;
31876f32 1089 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1090 break;
1091
1092 /*
1093 * Container change detected. If we currently are not
1094 * waiting on something else, setup to wait on a Config Change.
1095 */
1096 case AifEnContainerChange:
f3307f72 1097 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1098 if (container >= dev->maximum_num_containers)
1099 break;
31876f32
MH
1100 if (dev->fsa_dev[container].config_waiting_on &&
1101 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1102 break;
1103 dev->fsa_dev[container].config_needed = CHANGE;
1104 dev->fsa_dev[container].config_waiting_on =
1105 AifEnConfigChange;
31876f32 1106 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1107 break;
1108
1109 case AifEnConfigChange:
1110 break;
1111
cb1042f2
SM
1112 case AifEnAddJBOD:
1113 case AifEnDeleteJBOD:
1114 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
a4576b5d
MS
1115 if ((container >> 28)) {
1116 container = (u32)-1;
cb1042f2 1117 break;
a4576b5d 1118 }
cb1042f2 1119 channel = (container >> 24) & 0xF;
a4576b5d
MS
1120 if (channel >= dev->maximum_num_channels) {
1121 container = (u32)-1;
cb1042f2 1122 break;
a4576b5d 1123 }
cb1042f2 1124 id = container & 0xFFFF;
a4576b5d
MS
1125 if (id >= dev->maximum_num_physicals) {
1126 container = (u32)-1;
cb1042f2 1127 break;
a4576b5d 1128 }
cb1042f2 1129 lun = (container >> 16) & 0xFF;
a4576b5d 1130 container = (u32)-1;
cb1042f2
SM
1131 channel = aac_phys_to_logical(channel);
1132 device_config_needed =
1133 (((__le32 *)aifcmd->data)[0] ==
1134 cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE;
5ca05594
RM
1135 if (device_config_needed == ADD) {
1136 device = scsi_device_lookup(dev->scsi_host_ptr,
1137 channel,
1138 id,
1139 lun);
1140 if (device) {
1141 scsi_remove_device(device);
1142 scsi_device_put(device);
1143 }
1144 }
cb1042f2
SM
1145 break;
1146
0995ad38 1147 case AifEnEnclosureManagement:
cb1042f2
SM
1148 /*
1149 * If in JBOD mode, automatic exposure of new
1150 * physical target to be suppressed until configured.
1151 */
1152 if (dev->jbod)
1153 break;
0995ad38
SM
1154 switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) {
1155 case EM_DRIVE_INSERTION:
1156 case EM_DRIVE_REMOVAL:
46154a02
MR
1157 case EM_SES_DRIVE_INSERTION:
1158 case EM_SES_DRIVE_REMOVAL:
0995ad38
SM
1159 container = le32_to_cpu(
1160 ((__le32 *)aifcmd->data)[2]);
a4576b5d
MS
1161 if ((container >> 28)) {
1162 container = (u32)-1;
0995ad38 1163 break;
a4576b5d 1164 }
0995ad38 1165 channel = (container >> 24) & 0xF;
a4576b5d
MS
1166 if (channel >= dev->maximum_num_channels) {
1167 container = (u32)-1;
0995ad38 1168 break;
a4576b5d 1169 }
0995ad38
SM
1170 id = container & 0xFFFF;
1171 lun = (container >> 16) & 0xFF;
a4576b5d 1172 container = (u32)-1;
0995ad38
SM
1173 if (id >= dev->maximum_num_physicals) {
1174 /* legacy dev_t ? */
1175 if ((0x2000 <= id) || lun || channel ||
1176 ((channel = (id >> 7) & 0x3F) >=
1177 dev->maximum_num_channels))
1178 break;
1179 lun = (id >> 4) & 7;
1180 id &= 0xF;
1181 }
1182 channel = aac_phys_to_logical(channel);
1183 device_config_needed =
46154a02
MR
1184 ((((__le32 *)aifcmd->data)[3]
1185 == cpu_to_le32(EM_DRIVE_INSERTION)) ||
1186 (((__le32 *)aifcmd->data)[3]
1187 == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ?
0995ad38
SM
1188 ADD : DELETE;
1189 break;
1190 }
9cb62fa2
RAR
1191 case AifBuManagerEvent:
1192 aac_handle_aif_bu(dev, aifcmd);
0995ad38 1193 break;
131256cf
MH
1194 }
1195
1196 /*
1197 * If we are waiting on something and this happens to be
1198 * that thing then set the re-configure flag.
1199 */
1200 if (container != (u32)-1) {
1201 if (container >= dev->maximum_num_containers)
1202 break;
31876f32 1203 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1204 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1205 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1206 dev->fsa_dev[container].config_waiting_on = 0;
1207 } else for (container = 0;
1208 container < dev->maximum_num_containers; ++container) {
31876f32 1209 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1210 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1211 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1212 dev->fsa_dev[container].config_waiting_on = 0;
1213 }
1214 break;
1215
1216 case AifCmdJobProgress:
1217 /*
1218 * These are job progress AIF's. When a Clear is being
1219 * done on a container it is initially created then hidden from
1220 * the OS. When the clear completes we don't get a config
1221 * change so we monitor the job status complete on a clear then
1222 * wait for a container change.
1223 */
1224
f3307f72
CH
1225 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1226 (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] ||
1227 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) {
131256cf
MH
1228 for (container = 0;
1229 container < dev->maximum_num_containers;
1230 ++container) {
1231 /*
1232 * Stomp on all config sequencing for all
1233 * containers?
1234 */
1235 dev->fsa_dev[container].config_waiting_on =
1236 AifEnContainerChange;
1237 dev->fsa_dev[container].config_needed = ADD;
31876f32
MH
1238 dev->fsa_dev[container].config_waiting_stamp =
1239 jiffies;
131256cf
MH
1240 }
1241 }
f3307f72
CH
1242 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1243 ((__le32 *)aifcmd->data)[6] == 0 &&
1244 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) {
131256cf
MH
1245 for (container = 0;
1246 container < dev->maximum_num_containers;
1247 ++container) {
1248 /*
1249 * Stomp on all config sequencing for all
1250 * containers?
1251 */
1252 dev->fsa_dev[container].config_waiting_on =
1253 AifEnContainerChange;
1254 dev->fsa_dev[container].config_needed = DELETE;
31876f32
MH
1255 dev->fsa_dev[container].config_waiting_stamp =
1256 jiffies;
131256cf
MH
1257 }
1258 }
1259 break;
1260 }
1261
a4576b5d
MS
1262 container = 0;
1263retry_next:
0995ad38 1264 if (device_config_needed == NOTHING)
a4576b5d 1265 for (; container < dev->maximum_num_containers; ++container) {
31876f32
MH
1266 if ((dev->fsa_dev[container].config_waiting_on == 0) &&
1267 (dev->fsa_dev[container].config_needed != NOTHING) &&
1268 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
131256cf
MH
1269 device_config_needed =
1270 dev->fsa_dev[container].config_needed;
1271 dev->fsa_dev[container].config_needed = NOTHING;
0995ad38
SM
1272 channel = CONTAINER_TO_CHANNEL(container);
1273 id = CONTAINER_TO_ID(container);
1274 lun = CONTAINER_TO_LUN(container);
131256cf
MH
1275 break;
1276 }
1277 }
1278 if (device_config_needed == NOTHING)
1279 return;
1280
1281 /*
1282 * If we decided that a re-configuration needs to be done,
1283 * schedule it here on the way out the door, please close the door
1284 * behind you.
1285 */
1286
131256cf 1287 /*
f64a181d 1288 * Find the scsi_device associated with the SCSI address,
131256cf
MH
1289 * and mark it as changed, invalidating the cache. This deals
1290 * with changes to existing device IDs.
1291 */
1292
1293 if (!dev || !dev->scsi_host_ptr)
1294 return;
1295 /*
bfb35aa8 1296 * force reload of disk info via aac_probe_container
131256cf 1297 */
0995ad38
SM
1298 if ((channel == CONTAINER_CHANNEL) &&
1299 (device_config_needed != NOTHING)) {
1300 if (dev->fsa_dev[container].valid == 1)
1301 dev->fsa_dev[container].valid = 2;
bfb35aa8 1302 aac_probe_container(dev, container);
0995ad38
SM
1303 }
1304 device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun);
131256cf
MH
1305 if (device) {
1306 switch (device_config_needed) {
1307 case DELETE:
9cccde93
RM
1308#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1309 scsi_remove_device(device);
1310#else
0995ad38
SM
1311 if (scsi_device_online(device)) {
1312 scsi_device_set_state(device, SDEV_OFFLINE);
1313 sdev_printk(KERN_INFO, device,
1314 "Device offlined - %s\n",
1315 (channel == CONTAINER_CHANNEL) ?
1316 "array deleted" :
1317 "enclosure services event");
1318 }
9cccde93 1319#endif
0995ad38
SM
1320 break;
1321 case ADD:
1322 if (!scsi_device_online(device)) {
1323 sdev_printk(KERN_INFO, device,
1324 "Device online - %s\n",
1325 (channel == CONTAINER_CHANNEL) ?
1326 "array created" :
1327 "enclosure services event");
1328 scsi_device_set_state(device, SDEV_RUNNING);
1329 }
1330 /* FALLTHRU */
131256cf 1331 case CHANGE:
0995ad38
SM
1332 if ((channel == CONTAINER_CHANNEL)
1333 && (!dev->fsa_dev[container].valid)) {
9cccde93
RM
1334#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1335 scsi_remove_device(device);
1336#else
0995ad38
SM
1337 if (!scsi_device_online(device))
1338 break;
1339 scsi_device_set_state(device, SDEV_OFFLINE);
1340 sdev_printk(KERN_INFO, device,
1341 "Device offlined - %s\n",
1342 "array failed");
9cccde93 1343#endif
0995ad38
SM
1344 break;
1345 }
131256cf
MH
1346 scsi_rescan_device(&device->sdev_gendev);
1347
1348 default:
1349 break;
1350 }
1351 scsi_device_put(device);
0995ad38 1352 device_config_needed = NOTHING;
131256cf 1353 }
0995ad38
SM
1354 if (device_config_needed == ADD)
1355 scsi_add_device(dev->scsi_host_ptr, channel, id, lun);
a4576b5d
MS
1356 if (channel == CONTAINER_CHANNEL) {
1357 container++;
1358 device_config_needed = NOTHING;
1359 goto retry_next;
1360 }
131256cf
MH
1361}
1362
29c97684 1363static int _aac_reset_adapter(struct aac_dev *aac, int forced)
8c867b25
MH
1364{
1365 int index, quirks;
8b1462e0 1366 int retval;
8c867b25
MH
1367 struct Scsi_Host *host;
1368 struct scsi_device *dev;
1369 struct scsi_cmnd *command;
1370 struct scsi_cmnd *command_list;
29c97684 1371 int jafo = 0;
8c867b25
MH
1372
1373 /*
1374 * Assumptions:
29c97684
SM
1375 * - host is locked, unless called by the aacraid thread.
1376 * (a matter of convenience, due to legacy issues surrounding
1377 * eh_host_adapter_reset).
8c867b25
MH
1378 * - in_reset is asserted, so no new i/o is getting to the
1379 * card.
29c97684
SM
1380 * - The card is dead, or will be very shortly ;-/ so no new
1381 * commands are completing in the interrupt service.
8c867b25
MH
1382 */
1383 host = aac->scsi_host_ptr;
1384 scsi_block_requests(host);
1385 aac_adapter_disable_int(aac);
29c97684
SM
1386 if (aac->thread->pid != current->pid) {
1387 spin_unlock_irq(host->host_lock);
1388 kthread_stop(aac->thread);
1389 jafo = 1;
1390 }
8c867b25
MH
1391
1392 /*
1393 * If a positive health, means in a known DEAD PANIC
1394 * state and the adapter could be reset to `try again'.
1395 */
29c97684 1396 retval = aac_adapter_restart(aac, forced ? 0 : aac_adapter_check_health(aac));
8c867b25
MH
1397
1398 if (retval)
1399 goto out;
8c867b25 1400
d18b448f
MH
1401 /*
1402 * Loop through the fibs, close the synchronous FIBS
1403 */
33bb3b29 1404 for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) {
d18b448f 1405 struct fib *fib = &aac->fibs[index];
a8166a52
MH
1406 if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) &&
1407 (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) {
d18b448f
MH
1408 unsigned long flagv;
1409 spin_lock_irqsave(&fib->event_lock, flagv);
1410 up(&fib->event_wait);
1411 spin_unlock_irqrestore(&fib->event_lock, flagv);
1412 schedule();
33bb3b29 1413 retval = 0;
d18b448f
MH
1414 }
1415 }
33bb3b29
MH
1416 /* Give some extra time for ioctls to complete. */
1417 if (retval == 0)
1418 ssleep(2);
8c867b25
MH
1419 index = aac->cardtype;
1420
1421 /*
1422 * Re-initialize the adapter, first free resources, then carefully
1423 * apply the initialization sequence to come back again. Only risk
1424 * is a change in Firmware dropping cache, it is assumed the caller
1425 * will ensure that i/o is queisced and the card is flushed in that
1426 * case.
1427 */
1428 aac_fib_map_free(aac);
8c867b25
MH
1429 pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
1430 aac->comm_addr = NULL;
1431 aac->comm_phys = 0;
1432 kfree(aac->queues);
1433 aac->queues = NULL;
8b1462e0 1434 aac_free_irq(aac);
8c867b25
MH
1435 kfree(aac->fsa_dev);
1436 aac->fsa_dev = NULL;
94cf6ba1
SM
1437 quirks = aac_get_driver_ident(index)->quirks;
1438 if (quirks & AAC_QUIRK_31BIT) {
929a22a5
YH
1439 if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(31)))) ||
1440 ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(31)))))
8c867b25
MH
1441 goto out;
1442 } else {
284901a9
YH
1443 if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32)))) ||
1444 ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(32)))))
8c867b25
MH
1445 goto out;
1446 }
1447 if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
1448 goto out;
94cf6ba1 1449 if (quirks & AAC_QUIRK_31BIT)
284901a9 1450 if ((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32))))
8c867b25 1451 goto out;
29c97684 1452 if (jafo) {
f170168b
KC
1453 aac->thread = kthread_run(aac_command_thread, aac, "%s",
1454 aac->name);
29c97684
SM
1455 if (IS_ERR(aac->thread)) {
1456 retval = PTR_ERR(aac->thread);
1457 goto out;
1458 }
8c867b25
MH
1459 }
1460 (void)aac_get_adapter_info(aac);
8c867b25 1461 if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
8ce3eca4
SM
1462 host->sg_tablesize = 34;
1463 host->max_sectors = (host->sg_tablesize * 8) + 112;
1464 }
1465 if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
1466 host->sg_tablesize = 17;
1467 host->max_sectors = (host->sg_tablesize * 8) + 112;
1468 }
8c867b25
MH
1469 aac_get_config_status(aac, 1);
1470 aac_get_containers(aac);
1471 /*
1472 * This is where the assumption that the Adapter is quiesced
1473 * is important.
1474 */
1475 command_list = NULL;
1476 __shost_for_each_device(dev, host) {
1477 unsigned long flags;
1478 spin_lock_irqsave(&dev->list_lock, flags);
1479 list_for_each_entry(command, &dev->cmd_list, list)
1480 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1481 command->SCp.buffer = (struct scatterlist *)command_list;
1482 command_list = command;
1483 }
1484 spin_unlock_irqrestore(&dev->list_lock, flags);
1485 }
1486 while ((command = command_list)) {
1487 command_list = (struct scsi_cmnd *)command->SCp.buffer;
1488 command->SCp.buffer = NULL;
1489 command->result = DID_OK << 16
1490 | COMMAND_COMPLETE << 8
1491 | SAM_STAT_TASK_SET_FULL;
1492 command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
1493 command->scsi_done(command);
1494 }
1495 retval = 0;
1496
1497out:
1498 aac->in_reset = 0;
1499 scsi_unblock_requests(host);
29c97684
SM
1500 if (jafo) {
1501 spin_lock_irq(host->host_lock);
1502 }
1503 return retval;
1504}
1505
1506int aac_reset_adapter(struct aac_dev * aac, int forced)
1507{
1508 unsigned long flagv = 0;
1509 int retval;
1510 struct Scsi_Host * host;
1511
1512 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1513 return -EBUSY;
1514
1515 if (aac->in_reset) {
1516 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1517 return -EBUSY;
1518 }
1519 aac->in_reset = 1;
1520 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1521
1522 /*
1523 * Wait for all commands to complete to this specific
1524 * target (block maximum 60 seconds). Although not necessary,
1525 * it does make us a good storage citizen.
1526 */
1527 host = aac->scsi_host_ptr;
1528 scsi_block_requests(host);
1529 if (forced < 2) for (retval = 60; retval; --retval) {
1530 struct scsi_device * dev;
1531 struct scsi_cmnd * command;
1532 int active = 0;
1533
1534 __shost_for_each_device(dev, host) {
1535 spin_lock_irqsave(&dev->list_lock, flagv);
1536 list_for_each_entry(command, &dev->cmd_list, list) {
1537 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1538 active++;
1539 break;
1540 }
1541 }
1542 spin_unlock_irqrestore(&dev->list_lock, flagv);
1543 if (active)
1544 break;
1545
1546 }
1547 /*
1548 * We can exit If all the commands are complete
1549 */
1550 if (active == 0)
1551 break;
1552 ssleep(1);
1553 }
1554
1555 /* Quiesce build, flush cache, write through mode */
f858317d
SM
1556 if (forced < 2)
1557 aac_send_shutdown(aac);
29c97684 1558 spin_lock_irqsave(host->host_lock, flagv);
f858317d 1559 retval = _aac_reset_adapter(aac, forced ? forced : ((aac_check_reset != 0) && (aac_check_reset != 1)));
29c97684
SM
1560 spin_unlock_irqrestore(host->host_lock, flagv);
1561
f858317d 1562 if ((forced < 2) && (retval == -ENODEV)) {
29c97684
SM
1563 /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */
1564 struct fib * fibctx = aac_fib_alloc(aac);
1565 if (fibctx) {
1566 struct aac_pause *cmd;
1567 int status;
1568
1569 aac_fib_init(fibctx);
1570
1571 cmd = (struct aac_pause *) fib_data(fibctx);
1572
1573 cmd->command = cpu_to_le32(VM_ContainerConfig);
1574 cmd->type = cpu_to_le32(CT_PAUSE_IO);
1575 cmd->timeout = cpu_to_le32(1);
1576 cmd->min = cpu_to_le32(1);
1577 cmd->noRescan = cpu_to_le32(1);
1578 cmd->count = cpu_to_le32(0);
1579
1580 status = aac_fib_send(ContainerCommand,
1581 fibctx,
1582 sizeof(struct aac_pause),
1583 FsaNormal,
1584 -2 /* Timeout silently */, 1,
1585 NULL, NULL);
1586
1587 if (status >= 0)
1588 aac_fib_complete(fibctx);
cacb6dc3
PNRCEH
1589 /* FIB should be freed only after getting
1590 * the response from the F/W */
1591 if (status != -ERESTARTSYS)
1592 aac_fib_free(fibctx);
29c97684
SM
1593 }
1594 }
1595
8c867b25
MH
1596 return retval;
1597}
1598
1599int aac_check_health(struct aac_dev * aac)
1600{
1601 int BlinkLED;
1602 unsigned long time_now, flagv = 0;
1603 struct list_head * entry;
1604 struct Scsi_Host * host;
1605
1606 /* Extending the scope of fib_lock slightly to protect aac->in_reset */
1607 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1608 return 0;
1609
1610 if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
1611 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1612 return 0; /* OK */
1613 }
1614
1615 aac->in_reset = 1;
1616
1617 /* Fake up an AIF:
1618 * aac_aifcmd.command = AifCmdEventNotify = 1
1619 * aac_aifcmd.seqnum = 0xFFFFFFFF
1620 * aac_aifcmd.data[0] = AifEnExpEvent = 23
1621 * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
1622 * aac.aifcmd.data[2] = AifHighPriority = 3
1623 * aac.aifcmd.data[3] = BlinkLED
1624 */
1625
1626 time_now = jiffies/HZ;
1627 entry = aac->fib_list.next;
1628
1629 /*
1630 * For each Context that is on the
1631 * fibctxList, make a copy of the
1632 * fib, and then set the event to wake up the
1633 * thread that is waiting for it.
1634 */
1635 while (entry != &aac->fib_list) {
1636 /*
1637 * Extract the fibctx
1638 */
1639 struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
1640 struct hw_fib * hw_fib;
1641 struct fib * fib;
1642 /*
1643 * Check if the queue is getting
1644 * backlogged
1645 */
1646 if (fibctx->count > 20) {
1647 /*
1648 * It's *not* jiffies folks,
1649 * but jiffies / HZ, so do not
1650 * panic ...
1651 */
1652 u32 time_last = fibctx->jiffies;
1653 /*
1654 * Has it been > 2 minutes
1655 * since the last read off
1656 * the queue?
1657 */
1658 if ((time_now - time_last) > aif_timeout) {
1659 entry = entry->next;
1660 aac_close_fib_context(aac, fibctx);
1661 continue;
1662 }
1663 }
1664 /*
1665 * Warning: no sleep allowed while
1666 * holding spinlock
1667 */
4dbc22d7
SM
1668 hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC);
1669 fib = kzalloc(sizeof(struct fib), GFP_ATOMIC);
8c867b25
MH
1670 if (fib && hw_fib) {
1671 struct aac_aifcmd * aif;
1672
a8166a52 1673 fib->hw_fib_va = hw_fib;
8c867b25
MH
1674 fib->dev = aac;
1675 aac_fib_init(fib);
1676 fib->type = FSAFS_NTC_FIB_CONTEXT;
1677 fib->size = sizeof (struct fib);
1678 fib->data = hw_fib->data;
1679 aif = (struct aac_aifcmd *)hw_fib->data;
1680 aif->command = cpu_to_le32(AifCmdEventNotify);
a3940da5
SM
1681 aif->seqnum = cpu_to_le32(0xFFFFFFFF);
1682 ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent);
1683 ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic);
1684 ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority);
1685 ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED);
8c867b25
MH
1686
1687 /*
1688 * Put the FIB onto the
1689 * fibctx's fibs
1690 */
1691 list_add_tail(&fib->fiblink, &fibctx->fib_list);
1692 fibctx->count++;
1693 /*
1694 * Set the event to wake up the
1695 * thread that will waiting.
1696 */
1697 up(&fibctx->wait_sem);
1698 } else {
1699 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1700 kfree(fib);
1701 kfree(hw_fib);
1702 }
1703 entry = entry->next;
1704 }
1705
1706 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1707
1708 if (BlinkLED < 0) {
1709 printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED);
1710 goto out;
1711 }
1712
1713 printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
1714
2f7ecc55 1715 if (!aac_check_reset || ((aac_check_reset == 1) &&
a3940da5
SM
1716 (aac->supplement_adapter_info.SupportedOptions2 &
1717 AAC_OPTION_IGNORE_RESET)))
29c97684 1718 goto out;
8c867b25 1719 host = aac->scsi_host_ptr;
29c97684
SM
1720 if (aac->thread->pid != current->pid)
1721 spin_lock_irqsave(host->host_lock, flagv);
f858317d 1722 BlinkLED = _aac_reset_adapter(aac, aac_check_reset != 1);
29c97684
SM
1723 if (aac->thread->pid != current->pid)
1724 spin_unlock_irqrestore(host->host_lock, flagv);
8c867b25
MH
1725 return BlinkLED;
1726
1727out:
1728 aac->in_reset = 0;
1729 return BlinkLED;
1730}
1731
7c0b5eda
RAR
1732static int get_fib_count(struct aac_dev *dev)
1733{
1734 unsigned int num = 0;
1735 struct list_head *entry;
1736 unsigned long flagv;
1737
1738 /*
1739 * Warning: no sleep allowed while
1740 * holding spinlock. We take the estimate
1741 * and pre-allocate a set of fibs outside the
1742 * lock.
1743 */
1744 num = le32_to_cpu(dev->init->r7.adapter_fibs_size)
1745 / sizeof(struct hw_fib); /* some extra */
1746 spin_lock_irqsave(&dev->fib_lock, flagv);
1747 entry = dev->fib_list.next;
1748 while (entry != &dev->fib_list) {
1749 entry = entry->next;
1750 ++num;
1751 }
1752 spin_unlock_irqrestore(&dev->fib_lock, flagv);
1753
1754 return num;
1755}
1756
1757static int fillup_pools(struct aac_dev *dev, struct hw_fib **hw_fib_pool,
1758 struct fib **fib_pool,
1759 unsigned int num)
1760{
1761 struct hw_fib **hw_fib_p;
1762 struct fib **fib_p;
1763 int rcode = 1;
1764
1765 hw_fib_p = hw_fib_pool;
1766 fib_p = fib_pool;
1767 while (hw_fib_p < &hw_fib_pool[num]) {
1768 *(hw_fib_p) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL);
1769 if (!(*(hw_fib_p++))) {
1770 --hw_fib_p;
1771 break;
1772 }
1773
1774 *(fib_p) = kmalloc(sizeof(struct fib), GFP_KERNEL);
1775 if (!(*(fib_p++))) {
1776 kfree(*(--hw_fib_p));
1777 break;
1778 }
1779 }
1780
1781 num = hw_fib_p - hw_fib_pool;
1782 if (!num)
1783 rcode = 0;
1784
1785 return rcode;
1786}
1787
1788static void wakeup_fibctx_threads(struct aac_dev *dev,
1789 struct hw_fib **hw_fib_pool,
1790 struct fib **fib_pool,
1791 struct fib *fib,
1792 struct hw_fib *hw_fib,
1793 unsigned int num)
1794{
1795 unsigned long flagv;
1796 struct list_head *entry;
1797 struct hw_fib **hw_fib_p;
1798 struct fib **fib_p;
1799 u32 time_now, time_last;
1800 struct hw_fib *hw_newfib;
1801 struct fib *newfib;
1802 struct aac_fib_context *fibctx;
1803
1804 time_now = jiffies/HZ;
1805 spin_lock_irqsave(&dev->fib_lock, flagv);
1806 entry = dev->fib_list.next;
1807 /*
1808 * For each Context that is on the
1809 * fibctxList, make a copy of the
1810 * fib, and then set the event to wake up the
1811 * thread that is waiting for it.
1812 */
1813
1814 hw_fib_p = hw_fib_pool;
1815 fib_p = fib_pool;
1816 while (entry != &dev->fib_list) {
1817 /*
1818 * Extract the fibctx
1819 */
1820 fibctx = list_entry(entry, struct aac_fib_context,
1821 next);
1822 /*
1823 * Check if the queue is getting
1824 * backlogged
1825 */
1826 if (fibctx->count > 20) {
1827 /*
1828 * It's *not* jiffies folks,
1829 * but jiffies / HZ so do not
1830 * panic ...
1831 */
1832 time_last = fibctx->jiffies;
1833 /*
1834 * Has it been > 2 minutes
1835 * since the last read off
1836 * the queue?
1837 */
1838 if ((time_now - time_last) > aif_timeout) {
1839 entry = entry->next;
1840 aac_close_fib_context(dev, fibctx);
1841 continue;
1842 }
1843 }
1844 /*
1845 * Warning: no sleep allowed while
1846 * holding spinlock
1847 */
1848 if (hw_fib_p >= &hw_fib_pool[num]) {
1849 pr_warn("aifd: didn't allocate NewFib\n");
1850 entry = entry->next;
1851 continue;
1852 }
1853
1854 hw_newfib = *hw_fib_p;
1855 *(hw_fib_p++) = NULL;
1856 newfib = *fib_p;
1857 *(fib_p++) = NULL;
1858 /*
1859 * Make the copy of the FIB
1860 */
1861 memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
1862 memcpy(newfib, fib, sizeof(struct fib));
1863 newfib->hw_fib_va = hw_newfib;
1864 /*
1865 * Put the FIB onto the
1866 * fibctx's fibs
1867 */
1868 list_add_tail(&newfib->fiblink, &fibctx->fib_list);
1869 fibctx->count++;
1870 /*
1871 * Set the event to wake up the
1872 * thread that is waiting.
1873 */
1874 up(&fibctx->wait_sem);
1875
1876 entry = entry->next;
1877 }
1878 /*
1879 * Set the status of this FIB
1880 */
1881 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
1882 aac_fib_adapter_complete(fib, sizeof(u32));
1883 spin_unlock_irqrestore(&dev->fib_lock, flagv);
1884
1885}
1886
1887static void aac_process_events(struct aac_dev *dev)
1888{
1889 struct hw_fib *hw_fib;
1890 struct fib *fib;
1891 unsigned long flags;
1892 spinlock_t *t_lock;
1893 unsigned int rcode;
1894
1895 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
1896 spin_lock_irqsave(t_lock, flags);
1897
1898 while (!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
1899 struct list_head *entry;
1900 struct aac_aifcmd *aifcmd;
1901 unsigned int num;
1902 struct hw_fib **hw_fib_pool, **hw_fib_p;
1903 struct fib **fib_pool, **fib_p;
1904
1905 set_current_state(TASK_RUNNING);
1906
1907 entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
1908 list_del(entry);
1909
1910 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
1911 spin_unlock_irqrestore(t_lock, flags);
1912
1913 fib = list_entry(entry, struct fib, fiblink);
1914 hw_fib = fib->hw_fib_va;
1915 /*
1916 * We will process the FIB here or pass it to a
1917 * worker thread that is TBD. We Really can't
1918 * do anything at this point since we don't have
1919 * anything defined for this thread to do.
1920 */
1921 memset(fib, 0, sizeof(struct fib));
1922 fib->type = FSAFS_NTC_FIB_CONTEXT;
1923 fib->size = sizeof(struct fib);
1924 fib->hw_fib_va = hw_fib;
1925 fib->data = hw_fib->data;
1926 fib->dev = dev;
1927 /*
1928 * We only handle AifRequest fibs from the adapter.
1929 */
1930
1931 aifcmd = (struct aac_aifcmd *) hw_fib->data;
1932 if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
1933 /* Handle Driver Notify Events */
1934 aac_handle_aif(dev, fib);
1935 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
1936 aac_fib_adapter_complete(fib, (u16)sizeof(u32));
1937 goto free_fib;
1938 }
1939 /*
1940 * The u32 here is important and intended. We are using
1941 * 32bit wrapping time to fit the adapter field
1942 */
1943
1944 /* Sniff events */
1945 if (aifcmd->command == cpu_to_le32(AifCmdEventNotify)
1946 || aifcmd->command == cpu_to_le32(AifCmdJobProgress)) {
1947 aac_handle_aif(dev, fib);
1948 }
1949
1950 /*
1951 * get number of fibs to process
1952 */
1953 num = get_fib_count(dev);
1954 if (!num)
1955 goto free_fib;
1956
1957 hw_fib_pool = kmalloc_array(num, sizeof(struct hw_fib *),
1958 GFP_KERNEL);
1959 if (!hw_fib_pool)
1960 goto free_fib;
1961
1962 fib_pool = kmalloc_array(num, sizeof(struct fib *), GFP_KERNEL);
1963 if (!fib_pool)
1964 goto free_hw_fib_pool;
1965
1966 /*
1967 * Fill up fib pointer pools with actual fibs
1968 * and hw_fibs
1969 */
1970 rcode = fillup_pools(dev, hw_fib_pool, fib_pool, num);
1971 if (!rcode)
1972 goto free_mem;
1973
1974 /*
1975 * wakeup the thread that is waiting for
1976 * the response from fw (ioctl)
1977 */
1978 wakeup_fibctx_threads(dev, hw_fib_pool, fib_pool,
1979 fib, hw_fib, num);
1980
1981free_mem:
1982 /* Free up the remaining resources */
1983 hw_fib_p = hw_fib_pool;
1984 fib_p = fib_pool;
1985 while (hw_fib_p < &hw_fib_pool[num]) {
1986 kfree(*hw_fib_p);
1987 kfree(*fib_p);
1988 ++fib_p;
1989 ++hw_fib_p;
1990 }
1991 kfree(fib_pool);
1992free_hw_fib_pool:
1993 kfree(hw_fib_pool);
1994free_fib:
1995 kfree(fib);
1996 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
1997 spin_lock_irqsave(t_lock, flags);
1998 }
1999 /*
2000 * There are no more AIF's
2001 */
2002 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
2003 spin_unlock_irqrestore(t_lock, flags);
2004}
8c867b25 2005
1da177e4
LT
2006/**
2007 * aac_command_thread - command processing thread
2008 * @dev: Adapter to monitor
2009 *
2010 * Waits on the commandready event in it's queue. When the event gets set
2011 * it will pull FIBs off it's queue. It will continue to pull FIBs off
2012 * until the queue is empty. When the queue is empty it will wait for
2013 * more FIBs.
2014 */
8ce3eca4 2015
fe27381d 2016int aac_command_thread(void *data)
1da177e4 2017{
fe27381d 2018 struct aac_dev *dev = data;
1da177e4 2019 DECLARE_WAITQUEUE(wait, current);
29c97684
SM
2020 unsigned long next_jiffies = jiffies + HZ;
2021 unsigned long next_check_jiffies = next_jiffies;
2022 long difference = HZ;
1da177e4
LT
2023
2024 /*
2025 * We can only have one thread per adapter for AIF's.
2026 */
2027 if (dev->aif_thread)
2028 return -EINVAL;
fe27381d 2029
1da177e4
LT
2030 /*
2031 * Let the DPC know it has a place to send the AIF's to.
2032 */
2033 dev->aif_thread = 1;
2f130980 2034 add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 2035 set_current_state(TASK_INTERRUPTIBLE);
2f130980 2036 dprintk ((KERN_INFO "aac_command_thread start\n"));
8ce3eca4 2037 while (1) {
1da177e4 2038
7c0b5eda 2039 aac_process_events(dev);
29c97684
SM
2040
2041 /*
2042 * Background activity
2043 */
2044 if ((time_before(next_check_jiffies,next_jiffies))
2045 && ((difference = next_check_jiffies - jiffies) <= 0)) {
2046 next_check_jiffies = next_jiffies;
2047 if (aac_check_health(dev) == 0) {
2048 difference = ((long)(unsigned)check_interval)
2049 * HZ;
2050 next_check_jiffies = jiffies + difference;
2051 } else if (!dev->queues)
2052 break;
2053 }
2054 if (!time_before(next_check_jiffies,next_jiffies)
2055 && ((difference = next_jiffies - jiffies) <= 0)) {
2056 struct timeval now;
2057 int ret;
2058
2059 /* Don't even try to talk to adapter if its sick */
2060 ret = aac_check_health(dev);
2061 if (!ret && !dev->queues)
2062 break;
2063 next_check_jiffies = jiffies
2064 + ((long)(unsigned)check_interval)
2065 * HZ;
2066 do_gettimeofday(&now);
2067
2068 /* Synchronize our watches */
2069 if (((1000000 - (1000000 / HZ)) > now.tv_usec)
2070 && (now.tv_usec > (1000000 / HZ)))
2071 difference = (((1000000 - now.tv_usec) * HZ)
2072 + 500000) / 1000000;
2073 else if (ret == 0) {
2074 struct fib *fibptr;
2075
2076 if ((fibptr = aac_fib_alloc(dev))) {
cacb6dc3 2077 int status;
f3307f72 2078 __le32 *info;
29c97684
SM
2079
2080 aac_fib_init(fibptr);
2081
f3307f72 2082 info = (__le32 *) fib_data(fibptr);
29c97684
SM
2083 if (now.tv_usec > 500000)
2084 ++now.tv_sec;
2085
2086 *info = cpu_to_le32(now.tv_sec);
2087
cacb6dc3 2088 status = aac_fib_send(SendHostTime,
29c97684
SM
2089 fibptr,
2090 sizeof(*info),
2091 FsaNormal,
2092 1, 1,
2093 NULL,
2094 NULL);
cacb6dc3
PNRCEH
2095 /* Do not set XferState to zero unless
2096 * receives a response from F/W */
2097 if (status >= 0)
2098 aac_fib_complete(fibptr);
2099 /* FIB should be freed only after
2100 * getting the response from the F/W */
2101 if (status != -ERESTARTSYS)
2102 aac_fib_free(fibptr);
29c97684
SM
2103 }
2104 difference = (long)(unsigned)update_interval*HZ;
2105 } else {
2106 /* retry shortly */
2107 difference = 10 * HZ;
2108 }
2109 next_jiffies = jiffies + difference;
2110 if (time_before(next_check_jiffies,next_jiffies))
2111 difference = next_check_jiffies - jiffies;
2112 }
2113 if (difference <= 0)
2114 difference = 1;
2115 set_current_state(TASK_INTERRUPTIBLE);
fc4bf75e
RAR
2116
2117 if (kthread_should_stop())
2118 break;
2119
29c97684 2120 schedule_timeout(difference);
1da177e4 2121
fe27381d 2122 if (kthread_should_stop())
1da177e4 2123 break;
1da177e4 2124 }
2f130980
MH
2125 if (dev->queues)
2126 remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 2127 dev->aif_thread = 0;
2f130980 2128 return 0;
1da177e4 2129}
8b1462e0
MR
2130
2131int aac_acquire_irq(struct aac_dev *dev)
2132{
2133 int i;
2134 int j;
2135 int ret = 0;
8b1462e0 2136
8b1462e0
MR
2137 if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) {
2138 for (i = 0; i < dev->max_msix; i++) {
2139 dev->aac_msix[i].vector_no = i;
2140 dev->aac_msix[i].dev = dev;
0910d8bb 2141 if (request_irq(pci_irq_vector(dev->pdev, i),
8b1462e0
MR
2142 dev->a_ops.adapter_intr,
2143 0, "aacraid", &(dev->aac_msix[i]))) {
2144 printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n",
2145 dev->name, dev->id, i);
2146 for (j = 0 ; j < i ; j++)
0910d8bb 2147 free_irq(pci_irq_vector(dev->pdev, j),
8b1462e0
MR
2148 &(dev->aac_msix[j]));
2149 pci_disable_msix(dev->pdev);
2150 ret = -1;
2151 }
8b1462e0
MR
2152 }
2153 } else {
2154 dev->aac_msix[0].vector_no = 0;
2155 dev->aac_msix[0].dev = dev;
2156
2157 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
2158 IRQF_SHARED, "aacraid",
2159 &(dev->aac_msix[0])) < 0) {
2160 if (dev->msi)
2161 pci_disable_msi(dev->pdev);
2162 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
2163 dev->name, dev->id);
2164 ret = -1;
2165 }
2166 }
2167 return ret;
2168}
2169
2170void aac_free_irq(struct aac_dev *dev)
2171{
2172 int i;
2173 int cpu;
2174
2175 cpu = cpumask_first(cpu_online_mask);
2176 if (dev->pdev->device == PMC_DEVICE_S6 ||
2177 dev->pdev->device == PMC_DEVICE_S7 ||
2178 dev->pdev->device == PMC_DEVICE_S8 ||
2179 dev->pdev->device == PMC_DEVICE_S9) {
2180 if (dev->max_msix > 1) {
0910d8bb
HR
2181 for (i = 0; i < dev->max_msix; i++)
2182 free_irq(pci_irq_vector(dev->pdev, i),
2183 &(dev->aac_msix[i]));
8b1462e0
MR
2184 } else {
2185 free_irq(dev->pdev->irq, &(dev->aac_msix[0]));
2186 }
2187 } else {
2188 free_irq(dev->pdev->irq, dev);
2189 }
2190 if (dev->msi)
2191 pci_disable_msi(dev->pdev);
2192 else if (dev->max_msix > 1)
2193 pci_disable_msix(dev->pdev);
2194}