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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
fa195afe | 3 | * (c) Copyright 2001 Red Hat Inc. |
1da177e4 LT |
4 | * |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
e8b12f0f | 8 | * Copyright (c) 2000-2010 Adaptec, Inc. |
f4babba0 RAR |
9 | * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) |
10 | * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) | |
1da177e4 LT |
11 | * |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * Module Name: | |
27 | * commsup.c | |
28 | * | |
29 | * Abstract: Contain all routines that are required for FSA host/adapter | |
7c00ffa3 | 30 | * communication. |
1da177e4 LT |
31 | * |
32 | */ | |
33 | ||
34 | #include <linux/kernel.h> | |
35 | #include <linux/init.h> | |
cbbfa58f | 36 | #include <linux/crash_dump.h> |
1da177e4 LT |
37 | #include <linux/types.h> |
38 | #include <linux/sched.h> | |
39 | #include <linux/pci.h> | |
40 | #include <linux/spinlock.h> | |
41 | #include <linux/slab.h> | |
42 | #include <linux/completion.h> | |
43 | #include <linux/blkdev.h> | |
164006da | 44 | #include <linux/delay.h> |
fe27381d | 45 | #include <linux/kthread.h> |
6a3670c4 | 46 | #include <linux/interrupt.h> |
6188e10d | 47 | #include <linux/semaphore.h> |
3d77d840 | 48 | #include <linux/bcd.h> |
8c867b25 | 49 | #include <scsi/scsi.h> |
7c00ffa3 | 50 | #include <scsi/scsi_host.h> |
131256cf | 51 | #include <scsi/scsi_device.h> |
8c867b25 | 52 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
53 | |
54 | #include "aacraid.h" | |
55 | ||
56 | /** | |
57 | * fib_map_alloc - allocate the fib objects | |
58 | * @dev: Adapter to allocate for | |
59 | * | |
60 | * Allocate and map the shared PCI space for the FIB blocks used to | |
61 | * talk to the Adaptec firmware. | |
62 | */ | |
8ce3eca4 | 63 | |
1da177e4 LT |
64 | static int fib_map_alloc(struct aac_dev *dev) |
65 | { | |
3ffd6c5a RAR |
66 | if (dev->max_fib_size > AAC_MAX_NATIVE_SIZE) |
67 | dev->max_cmd_size = AAC_MAX_NATIVE_SIZE; | |
68 | else | |
69 | dev->max_cmd_size = dev->max_fib_size; | |
423400e6 RAR |
70 | if (dev->max_fib_size < AAC_MAX_NATIVE_SIZE) { |
71 | dev->max_cmd_size = AAC_MAX_NATIVE_SIZE; | |
72 | } else { | |
73 | dev->max_cmd_size = dev->max_fib_size; | |
74 | } | |
3ffd6c5a | 75 | |
7c00ffa3 | 76 | dprintk((KERN_INFO |
f481973d MR |
77 | "allocate hardware fibs dma_alloc_coherent(%p, %d * (%d + %d), %p)\n", |
78 | &dev->pdev->dev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue, | |
7c00ffa3 | 79 | AAC_NUM_MGT_FIB, &dev->hw_fib_pa)); |
f481973d | 80 | dev->hw_fib_va = dma_alloc_coherent(&dev->pdev->dev, |
3ffd6c5a | 81 | (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)) |
e8b12f0f | 82 | * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1), |
f481973d | 83 | &dev->hw_fib_pa, GFP_KERNEL); |
e8b12f0f | 84 | if (dev->hw_fib_va == NULL) |
1da177e4 LT |
85 | return -ENOMEM; |
86 | return 0; | |
87 | } | |
88 | ||
89 | /** | |
bfb35aa8 | 90 | * aac_fib_map_free - free the fib objects |
1da177e4 LT |
91 | * @dev: Adapter to free |
92 | * | |
93 | * Free the PCI mappings and the memory allocated for FIB blocks | |
94 | * on this adapter. | |
95 | */ | |
96 | ||
bfb35aa8 | 97 | void aac_fib_map_free(struct aac_dev *dev) |
1da177e4 | 98 | { |
1bff5abc RAR |
99 | size_t alloc_size; |
100 | size_t fib_size; | |
101 | int num_fibs; | |
102 | ||
103 | if(!dev->hw_fib_va || !dev->max_cmd_size) | |
104 | return; | |
105 | ||
106 | num_fibs = dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB; | |
107 | fib_size = dev->max_fib_size + sizeof(struct aac_fib_xporthdr); | |
108 | alloc_size = fib_size * num_fibs + ALIGN32 - 1; | |
109 | ||
f481973d MR |
110 | dma_free_coherent(&dev->pdev->dev, alloc_size, dev->hw_fib_va, |
111 | dev->hw_fib_pa); | |
1bff5abc | 112 | |
9ad5204d SM |
113 | dev->hw_fib_va = NULL; |
114 | dev->hw_fib_pa = 0; | |
1da177e4 LT |
115 | } |
116 | ||
3f4ce057 RAR |
117 | void aac_fib_vector_assign(struct aac_dev *dev) |
118 | { | |
119 | u32 i = 0; | |
120 | u32 vector = 1; | |
121 | struct fib *fibptr = NULL; | |
122 | ||
123 | for (i = 0, fibptr = &dev->fibs[i]; | |
124 | i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); | |
125 | i++, fibptr++) { | |
126 | if ((dev->max_msix == 1) || | |
127 | (i > ((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1) | |
128 | - dev->vector_cap))) { | |
129 | fibptr->vector_no = 0; | |
130 | } else { | |
131 | fibptr->vector_no = vector; | |
132 | vector++; | |
133 | if (vector == dev->max_msix) | |
134 | vector = 1; | |
135 | } | |
136 | } | |
137 | } | |
138 | ||
1da177e4 | 139 | /** |
bfb35aa8 | 140 | * aac_fib_setup - setup the fibs |
1da177e4 LT |
141 | * @dev: Adapter to set up |
142 | * | |
b595076a | 143 | * Allocate the PCI space for the fibs, map it and then initialise the |
1da177e4 LT |
144 | * fib area, the unmapped fib data and also the free list |
145 | */ | |
146 | ||
bfb35aa8 | 147 | int aac_fib_setup(struct aac_dev * dev) |
1da177e4 LT |
148 | { |
149 | struct fib *fibptr; | |
a8166a52 | 150 | struct hw_fib *hw_fib; |
1da177e4 LT |
151 | dma_addr_t hw_fib_pa; |
152 | int i; | |
d1ef4da8 | 153 | u32 max_cmds; |
7c00ffa3 MH |
154 | |
155 | while (((i = fib_map_alloc(dev)) == -ENOMEM) | |
156 | && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) { | |
d1ef4da8 RAR |
157 | max_cmds = (dev->scsi_host_ptr->can_queue+AAC_NUM_MGT_FIB) >> 1; |
158 | dev->scsi_host_ptr->can_queue = max_cmds - AAC_NUM_MGT_FIB; | |
159 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) | |
160 | dev->init->r7.max_io_commands = cpu_to_le32(max_cmds); | |
7c00ffa3 MH |
161 | } |
162 | if (i<0) | |
1da177e4 | 163 | return -ENOMEM; |
8ce3eca4 | 164 | |
e8b12f0f | 165 | memset(dev->hw_fib_va, 0, |
423400e6 | 166 | (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)) * |
e8b12f0f MR |
167 | (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)); |
168 | ||
1bff5abc RAR |
169 | /* 32 byte alignment for PMC */ |
170 | hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1); | |
171 | hw_fib = (struct hw_fib *)((unsigned char *)dev->hw_fib_va + | |
172 | (hw_fib_pa - dev->hw_fib_pa)); | |
173 | ||
e8b12f0f | 174 | /* add Xport header */ |
1bff5abc | 175 | hw_fib = (struct hw_fib *)((unsigned char *)hw_fib + |
e8b12f0f | 176 | sizeof(struct aac_fib_xporthdr)); |
1bff5abc | 177 | hw_fib_pa += sizeof(struct aac_fib_xporthdr); |
e8b12f0f | 178 | |
1da177e4 LT |
179 | /* |
180 | * Initialise the fibs | |
181 | */ | |
8ce3eca4 SM |
182 | for (i = 0, fibptr = &dev->fibs[i]; |
183 | i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); | |
184 | i++, fibptr++) | |
1da177e4 | 185 | { |
85d22bbf | 186 | fibptr->flags = 0; |
6bf3b630 | 187 | fibptr->size = sizeof(struct fib); |
1da177e4 | 188 | fibptr->dev = dev; |
a8166a52 MH |
189 | fibptr->hw_fib_va = hw_fib; |
190 | fibptr->data = (void *) fibptr->hw_fib_va->data; | |
1da177e4 | 191 | fibptr->next = fibptr+1; /* Forward chain the fibs */ |
6de76cfc | 192 | sema_init(&fibptr->event_wait, 0); |
1da177e4 | 193 | spin_lock_init(&fibptr->event_lock); |
a8166a52 | 194 | hw_fib->header.XferState = cpu_to_le32(0xffffffff); |
423400e6 RAR |
195 | hw_fib->header.SenderSize = |
196 | cpu_to_le16(dev->max_fib_size); /* ?? max_cmd_size */ | |
1da177e4 | 197 | fibptr->hw_fib_pa = hw_fib_pa; |
423400e6 RAR |
198 | fibptr->hw_sgl_pa = hw_fib_pa + |
199 | offsetof(struct aac_hba_cmd_req, sge[2]); | |
200 | /* | |
201 | * one element is for the ptr to the separate sg list, | |
202 | * second element for 32 byte alignment | |
203 | */ | |
204 | fibptr->hw_error_pa = hw_fib_pa + | |
205 | offsetof(struct aac_native_hba, resp.resp_bytes[0]); | |
206 | ||
e8b12f0f | 207 | hw_fib = (struct hw_fib *)((unsigned char *)hw_fib + |
3ffd6c5a | 208 | dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)); |
e8b12f0f | 209 | hw_fib_pa = hw_fib_pa + |
3ffd6c5a | 210 | dev->max_cmd_size + sizeof(struct aac_fib_xporthdr); |
1da177e4 | 211 | } |
3f4ce057 RAR |
212 | |
213 | /* | |
214 | *Assign vector numbers to fibs | |
215 | */ | |
216 | aac_fib_vector_assign(dev); | |
217 | ||
1da177e4 LT |
218 | /* |
219 | * Add the fib chain to the free list | |
220 | */ | |
7c00ffa3 | 221 | dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL; |
1da177e4 | 222 | /* |
6bf3b630 RAR |
223 | * Set 8 fibs aside for management tools |
224 | */ | |
225 | dev->free_fib = &dev->fibs[dev->scsi_host_ptr->can_queue]; | |
1da177e4 LT |
226 | return 0; |
227 | } | |
228 | ||
6bf3b630 RAR |
229 | /** |
230 | * aac_fib_alloc_tag-allocate a fib using tags | |
231 | * @dev: Adapter to allocate the fib for | |
232 | * | |
233 | * Allocate a fib from the adapter fib pool using tags | |
234 | * from the blk layer. | |
235 | */ | |
236 | ||
237 | struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd) | |
238 | { | |
239 | struct fib *fibptr; | |
240 | ||
241 | fibptr = &dev->fibs[scmd->request->tag]; | |
242 | /* | |
243 | * Null out fields that depend on being zero at the start of | |
244 | * each I/O | |
245 | */ | |
246 | fibptr->hw_fib_va->header.XferState = 0; | |
247 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
248 | fibptr->callback_data = NULL; | |
249 | fibptr->callback = NULL; | |
250 | ||
251 | return fibptr; | |
252 | } | |
253 | ||
1da177e4 | 254 | /** |
bfb35aa8 | 255 | * aac_fib_alloc - allocate a fib |
1da177e4 LT |
256 | * @dev: Adapter to allocate the fib for |
257 | * | |
258 | * Allocate a fib from the adapter fib pool. If the pool is empty we | |
7c00ffa3 | 259 | * return NULL. |
1da177e4 | 260 | */ |
8ce3eca4 | 261 | |
bfb35aa8 | 262 | struct fib *aac_fib_alloc(struct aac_dev *dev) |
1da177e4 LT |
263 | { |
264 | struct fib * fibptr; | |
265 | unsigned long flags; | |
266 | spin_lock_irqsave(&dev->fib_lock, flags); | |
8ce3eca4 | 267 | fibptr = dev->free_fib; |
7c00ffa3 MH |
268 | if(!fibptr){ |
269 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
270 | return fibptr; | |
271 | } | |
1da177e4 LT |
272 | dev->free_fib = fibptr->next; |
273 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
274 | /* | |
275 | * Set the proper node type code and node byte size | |
276 | */ | |
277 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
278 | fibptr->size = sizeof(struct fib); | |
279 | /* | |
280 | * Null out fields that depend on being zero at the start of | |
281 | * each I/O | |
282 | */ | |
a8166a52 | 283 | fibptr->hw_fib_va->header.XferState = 0; |
b6ef70f3 | 284 | fibptr->flags = 0; |
1da177e4 LT |
285 | fibptr->callback = NULL; |
286 | fibptr->callback_data = NULL; | |
287 | ||
288 | return fibptr; | |
289 | } | |
290 | ||
291 | /** | |
bfb35aa8 | 292 | * aac_fib_free - free a fib |
1da177e4 LT |
293 | * @fibptr: fib to free up |
294 | * | |
295 | * Frees up a fib and places it on the appropriate queue | |
1da177e4 | 296 | */ |
8ce3eca4 | 297 | |
bfb35aa8 | 298 | void aac_fib_free(struct fib *fibptr) |
1da177e4 | 299 | { |
ef616233 | 300 | unsigned long flags; |
cacb6dc3 | 301 | |
ef616233 | 302 | if (fibptr->done == 2) |
cacb6dc3 | 303 | return; |
1da177e4 LT |
304 | |
305 | spin_lock_irqsave(&fibptr->dev->fib_lock, flags); | |
03d44337 | 306 | if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 307 | aac_config.fib_timeouts++; |
423400e6 RAR |
308 | if (!(fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) && |
309 | fibptr->hw_fib_va->header.XferState != 0) { | |
03d44337 MH |
310 | printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n", |
311 | (void*)fibptr, | |
312 | le32_to_cpu(fibptr->hw_fib_va->header.XferState)); | |
313 | } | |
314 | fibptr->next = fibptr->dev->free_fib; | |
315 | fibptr->dev->free_fib = fibptr; | |
1da177e4 LT |
316 | spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags); |
317 | } | |
318 | ||
319 | /** | |
bfb35aa8 | 320 | * aac_fib_init - initialise a fib |
1da177e4 | 321 | * @fibptr: The fib to initialize |
8ce3eca4 | 322 | * |
1da177e4 LT |
323 | * Set up the generic fib fields ready for use |
324 | */ | |
8ce3eca4 | 325 | |
bfb35aa8 | 326 | void aac_fib_init(struct fib *fibptr) |
1da177e4 | 327 | { |
a8166a52 | 328 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
1da177e4 | 329 | |
85d22bbf | 330 | memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr)); |
1da177e4 | 331 | hw_fib->header.StructType = FIB_MAGIC; |
7c00ffa3 MH |
332 | hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size); |
333 | hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable); | |
85d22bbf | 334 | hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa); |
7c00ffa3 | 335 | hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size); |
1da177e4 LT |
336 | } |
337 | ||
338 | /** | |
339 | * fib_deallocate - deallocate a fib | |
340 | * @fibptr: fib to deallocate | |
341 | * | |
342 | * Will deallocate and return to the free pool the FIB pointed to by the | |
343 | * caller. | |
344 | */ | |
8ce3eca4 | 345 | |
4833869e | 346 | static void fib_dealloc(struct fib * fibptr) |
1da177e4 | 347 | { |
a8166a52 | 348 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
8ce3eca4 | 349 | hw_fib->header.XferState = 0; |
1da177e4 LT |
350 | } |
351 | ||
352 | /* | |
353 | * Commuication primitives define and support the queuing method we use to | |
354 | * support host to adapter commuication. All queue accesses happen through | |
355 | * these routines and are the only routines which have a knowledge of the | |
356 | * how these queues are implemented. | |
357 | */ | |
8ce3eca4 | 358 | |
1da177e4 LT |
359 | /** |
360 | * aac_get_entry - get a queue entry | |
361 | * @dev: Adapter | |
362 | * @qid: Queue Number | |
363 | * @entry: Entry return | |
364 | * @index: Index return | |
365 | * @nonotify: notification control | |
366 | * | |
367 | * With a priority the routine returns a queue entry if the queue has free entries. If the queue | |
368 | * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is | |
369 | * returned. | |
370 | */ | |
8ce3eca4 | 371 | |
1da177e4 LT |
372 | static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify) |
373 | { | |
374 | struct aac_queue * q; | |
bed30de4 | 375 | unsigned long idx; |
1da177e4 LT |
376 | |
377 | /* | |
378 | * All of the queues wrap when they reach the end, so we check | |
379 | * to see if they have reached the end and if they have we just | |
380 | * set the index back to zero. This is a wrap. You could or off | |
381 | * the high bits in all updates but this is a bit faster I think. | |
382 | */ | |
383 | ||
384 | q = &dev->queues->queue[qid]; | |
bed30de4 MH |
385 | |
386 | idx = *index = le32_to_cpu(*(q->headers.producer)); | |
387 | /* Interrupt Moderation, only interrupt for first two entries */ | |
388 | if (idx != le32_to_cpu(*(q->headers.consumer))) { | |
389 | if (--idx == 0) { | |
1640a2c3 | 390 | if (qid == AdapNormCmdQueue) |
bed30de4 | 391 | idx = ADAP_NORM_CMD_ENTRIES; |
1640a2c3 | 392 | else |
bed30de4 MH |
393 | idx = ADAP_NORM_RESP_ENTRIES; |
394 | } | |
395 | if (idx != le32_to_cpu(*(q->headers.consumer))) | |
8ce3eca4 | 396 | *nonotify = 1; |
bed30de4 | 397 | } |
1da177e4 | 398 | |
1640a2c3 | 399 | if (qid == AdapNormCmdQueue) { |
8ce3eca4 | 400 | if (*index >= ADAP_NORM_CMD_ENTRIES) |
1da177e4 | 401 | *index = 0; /* Wrap to front of the Producer Queue. */ |
1640a2c3 | 402 | } else { |
8ce3eca4 | 403 | if (*index >= ADAP_NORM_RESP_ENTRIES) |
1da177e4 LT |
404 | *index = 0; /* Wrap to front of the Producer Queue. */ |
405 | } | |
1da177e4 | 406 | |
8ce3eca4 SM |
407 | /* Queue is full */ |
408 | if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { | |
7c00ffa3 | 409 | printk(KERN_WARNING "Queue %d full, %u outstanding.\n", |
ef616233 | 410 | qid, atomic_read(&q->numpending)); |
1da177e4 LT |
411 | return 0; |
412 | } else { | |
8ce3eca4 | 413 | *entry = q->base + *index; |
1da177e4 LT |
414 | return 1; |
415 | } | |
8ce3eca4 | 416 | } |
1da177e4 LT |
417 | |
418 | /** | |
419 | * aac_queue_get - get the next free QE | |
420 | * @dev: Adapter | |
421 | * @index: Returned index | |
422 | * @priority: Priority of fib | |
423 | * @fib: Fib to associate with the queue entry | |
424 | * @wait: Wait if queue full | |
425 | * @fibptr: Driver fib object to go with fib | |
426 | * @nonotify: Don't notify the adapter | |
427 | * | |
428 | * Gets the next free QE off the requested priorty adapter command | |
429 | * queue and associates the Fib with the QE. The QE represented by | |
430 | * index is ready to insert on the queue when this routine returns | |
431 | * success. | |
432 | */ | |
433 | ||
28713324 | 434 | int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify) |
1da177e4 LT |
435 | { |
436 | struct aac_entry * entry = NULL; | |
437 | int map = 0; | |
8ce3eca4 | 438 | |
1640a2c3 | 439 | if (qid == AdapNormCmdQueue) { |
1da177e4 | 440 | /* if no entries wait for some if caller wants to */ |
8ce3eca4 | 441 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) { |
1da177e4 LT |
442 | printk(KERN_ERR "GetEntries failed\n"); |
443 | } | |
8ce3eca4 SM |
444 | /* |
445 | * Setup queue entry with a command, status and fib mapped | |
446 | */ | |
447 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
448 | map = 1; | |
1640a2c3 | 449 | } else { |
8ce3eca4 | 450 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) { |
1da177e4 LT |
451 | /* if no entries wait for some if caller wants to */ |
452 | } | |
8ce3eca4 SM |
453 | /* |
454 | * Setup queue entry with command, status and fib mapped | |
455 | */ | |
456 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
457 | entry->addr = hw_fib->header.SenderFibAddress; | |
458 | /* Restore adapters pointer to the FIB */ | |
85d22bbf | 459 | hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */ |
8ce3eca4 | 460 | map = 0; |
1da177e4 LT |
461 | } |
462 | /* | |
463 | * If MapFib is true than we need to map the Fib and put pointers | |
464 | * in the queue entry. | |
465 | */ | |
466 | if (map) | |
467 | entry->addr = cpu_to_le32(fibptr->hw_fib_pa); | |
468 | return 0; | |
469 | } | |
470 | ||
1da177e4 | 471 | /* |
8ce3eca4 SM |
472 | * Define the highest level of host to adapter communication routines. |
473 | * These routines will support host to adapter FS commuication. These | |
1da177e4 LT |
474 | * routines have no knowledge of the commuication method used. This level |
475 | * sends and receives FIBs. This level has no knowledge of how these FIBs | |
476 | * get passed back and forth. | |
477 | */ | |
478 | ||
479 | /** | |
bfb35aa8 | 480 | * aac_fib_send - send a fib to the adapter |
1da177e4 LT |
481 | * @command: Command to send |
482 | * @fibptr: The fib | |
483 | * @size: Size of fib data area | |
484 | * @priority: Priority of Fib | |
485 | * @wait: Async/sync select | |
486 | * @reply: True if a reply is wanted | |
487 | * @callback: Called with reply | |
488 | * @callback_data: Passed to callback | |
489 | * | |
490 | * Sends the requested FIB to the adapter and optionally will wait for a | |
491 | * response FIB. If the caller does not wish to wait for a response than | |
492 | * an event to wait on must be supplied. This event will be set when a | |
493 | * response FIB is received from the adapter. | |
494 | */ | |
8ce3eca4 | 495 | |
bfb35aa8 MH |
496 | int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size, |
497 | int priority, int wait, int reply, fib_callback callback, | |
498 | void *callback_data) | |
1da177e4 | 499 | { |
1da177e4 | 500 | struct aac_dev * dev = fibptr->dev; |
a8166a52 | 501 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 502 | unsigned long flags = 0; |
cacb6dc3 | 503 | unsigned long mflags = 0; |
11604612 | 504 | unsigned long sflags = 0; |
cacb6dc3 | 505 | |
1da177e4 LT |
506 | if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned))) |
507 | return -EBUSY; | |
a0c6143e RAR |
508 | |
509 | if (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)) | |
510 | return -EINVAL; | |
511 | ||
1da177e4 | 512 | /* |
25985edc | 513 | * There are 5 cases with the wait and response requested flags. |
1da177e4 LT |
514 | * The only invalid cases are if the caller requests to wait and |
515 | * does not request a response and if the caller does not want a | |
516 | * response and the Fib is not allocated from pool. If a response | |
517 | * is not requesed the Fib will just be deallocaed by the DPC | |
518 | * routine when the response comes back from the adapter. No | |
8ce3eca4 | 519 | * further processing will be done besides deleting the Fib. We |
1da177e4 LT |
520 | * will have a debug mode where the adapter can notify the host |
521 | * it had a problem and the host can log that fact. | |
522 | */ | |
b6ef70f3 | 523 | fibptr->flags = 0; |
1da177e4 LT |
524 | if (wait && !reply) { |
525 | return -EINVAL; | |
526 | } else if (!wait && reply) { | |
527 | hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected); | |
528 | FIB_COUNTER_INCREMENT(aac_config.AsyncSent); | |
529 | } else if (!wait && !reply) { | |
530 | hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected); | |
531 | FIB_COUNTER_INCREMENT(aac_config.NoResponseSent); | |
532 | } else if (wait && reply) { | |
533 | hw_fib->header.XferState |= cpu_to_le32(ResponseExpected); | |
534 | FIB_COUNTER_INCREMENT(aac_config.NormalSent); | |
8ce3eca4 | 535 | } |
1da177e4 LT |
536 | /* |
537 | * Map the fib into 32bits by using the fib number | |
538 | */ | |
539 | ||
423400e6 RAR |
540 | hw_fib->header.SenderFibAddress = |
541 | cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2); | |
542 | ||
543 | /* use the same shifted value for handle to be compatible | |
544 | * with the new native hba command handle | |
545 | */ | |
546 | hw_fib->header.Handle = | |
547 | cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1); | |
548 | ||
1da177e4 LT |
549 | /* |
550 | * Set FIB state to indicate where it came from and if we want a | |
551 | * response from the adapter. Also load the command from the | |
552 | * caller. | |
553 | * | |
554 | * Map the hw fib pointer as a 32bit value | |
555 | */ | |
556 | hw_fib->header.Command = cpu_to_le16(command); | |
557 | hw_fib->header.XferState |= cpu_to_le32(SentFromHost); | |
1da177e4 LT |
558 | /* |
559 | * Set the size of the Fib we want to send to the adapter | |
560 | */ | |
561 | hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size); | |
562 | if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) { | |
563 | return -EMSGSIZE; | |
8ce3eca4 | 564 | } |
1da177e4 LT |
565 | /* |
566 | * Get a queue entry connect the FIB to it and send an notify | |
567 | * the adapter a command is ready. | |
568 | */ | |
1640a2c3 | 569 | hw_fib->header.XferState |= cpu_to_le32(NormalPriority); |
1da177e4 | 570 | |
1da177e4 LT |
571 | /* |
572 | * Fill in the Callback and CallbackContext if we are not | |
573 | * going to wait. | |
574 | */ | |
575 | if (!wait) { | |
576 | fibptr->callback = callback; | |
577 | fibptr->callback_data = callback_data; | |
b6ef70f3 | 578 | fibptr->flags = FIB_CONTEXT_FLAG; |
1da177e4 | 579 | } |
1da177e4 LT |
580 | |
581 | fibptr->done = 0; | |
1da177e4 | 582 | |
1640a2c3 MH |
583 | FIB_COUNTER_INCREMENT(aac_config.FibsSent); |
584 | ||
1640a2c3 | 585 | dprintk((KERN_DEBUG "Fib contents:.\n")); |
8e0c5ebd MH |
586 | dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command))); |
587 | dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command))); | |
588 | dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState))); | |
a8166a52 | 589 | dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va)); |
1640a2c3 MH |
590 | dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa)); |
591 | dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr)); | |
592 | ||
c8f7b073 | 593 | if (!dev->queues) |
65101355 | 594 | return -EBUSY; |
1640a2c3 | 595 | |
cacb6dc3 PNRCEH |
596 | if (wait) { |
597 | ||
598 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
599 | if (dev->management_fib_count >= AAC_NUM_MGT_FIB) { | |
600 | printk(KERN_INFO "No management Fibs Available:%d\n", | |
601 | dev->management_fib_count); | |
602 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
603 | return -EBUSY; | |
604 | } | |
605 | dev->management_fib_count++; | |
606 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
1640a2c3 | 607 | spin_lock_irqsave(&fibptr->event_lock, flags); |
cacb6dc3 PNRCEH |
608 | } |
609 | ||
11604612 MR |
610 | if (dev->sync_mode) { |
611 | if (wait) | |
612 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
613 | spin_lock_irqsave(&dev->sync_lock, sflags); | |
614 | if (dev->sync_fib) { | |
615 | list_add_tail(&fibptr->fiblink, &dev->sync_fib_list); | |
616 | spin_unlock_irqrestore(&dev->sync_lock, sflags); | |
617 | } else { | |
618 | dev->sync_fib = fibptr; | |
619 | spin_unlock_irqrestore(&dev->sync_lock, sflags); | |
620 | aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, | |
621 | (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0, | |
622 | NULL, NULL, NULL, NULL, NULL); | |
623 | } | |
624 | if (wait) { | |
625 | fibptr->flags |= FIB_CONTEXT_FLAG_WAIT; | |
626 | if (down_interruptible(&fibptr->event_wait)) { | |
627 | fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT; | |
628 | return -EFAULT; | |
629 | } | |
630 | return 0; | |
631 | } | |
632 | return -EINPROGRESS; | |
633 | } | |
634 | ||
cacb6dc3 PNRCEH |
635 | if (aac_adapter_deliver(fibptr) != 0) { |
636 | printk(KERN_ERR "aac_fib_send: returned -EBUSY\n"); | |
637 | if (wait) { | |
638 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
639 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
640 | dev->management_fib_count--; | |
641 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
642 | } | |
643 | return -EBUSY; | |
644 | } | |
645 | ||
8e0c5ebd | 646 | |
1da177e4 | 647 | /* |
8ce3eca4 | 648 | * If the caller wanted us to wait for response wait now. |
1da177e4 | 649 | */ |
8ce3eca4 | 650 | |
1da177e4 LT |
651 | if (wait) { |
652 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
9203344c MH |
653 | /* Only set for first known interruptable command */ |
654 | if (wait < 0) { | |
655 | /* | |
656 | * *VERY* Dangerous to time out a command, the | |
657 | * assumption is made that we have no hope of | |
658 | * functioning because an interrupt routing or other | |
659 | * hardware failure has occurred. | |
660 | */ | |
30002f1c | 661 | unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */ |
9203344c | 662 | while (down_trylock(&fibptr->event_wait)) { |
33524b70 | 663 | int blink; |
30002f1c | 664 | if (time_is_before_eq_jiffies(timeout)) { |
28713324 | 665 | struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue]; |
ef616233 | 666 | atomic_dec(&q->numpending); |
9203344c | 667 | if (wait == -1) { |
bfb35aa8 | 668 | printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n" |
9203344c MH |
669 | "Usually a result of a PCI interrupt routing problem;\n" |
670 | "update mother board BIOS or consider utilizing one of\n" | |
671 | "the SAFE mode kernel options (acpi, apic etc)\n"); | |
672 | } | |
673 | return -ETIMEDOUT; | |
674 | } | |
16ae9dd3 | 675 | |
bd257b2f | 676 | if (unlikely(pci_channel_offline(dev->pdev))) |
16ae9dd3 RAR |
677 | return -EFAULT; |
678 | ||
33524b70 MH |
679 | if ((blink = aac_adapter_check_health(dev)) > 0) { |
680 | if (wait == -1) { | |
681 | printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n" | |
682 | "Usually a result of a serious unrecoverable hardware problem\n", | |
683 | blink); | |
684 | } | |
685 | return -EFAULT; | |
686 | } | |
07beca2b RAR |
687 | /* |
688 | * Allow other processes / CPUS to use core | |
689 | */ | |
690 | schedule(); | |
9203344c | 691 | } |
0462590e | 692 | } else if (down_interruptible(&fibptr->event_wait)) { |
cacb6dc3 PNRCEH |
693 | /* Do nothing ... satisfy |
694 | * down_interruptible must_check */ | |
e6990c64 | 695 | } |
cacb6dc3 | 696 | |
33bb3b29 | 697 | spin_lock_irqsave(&fibptr->event_lock, flags); |
cacb6dc3 | 698 | if (fibptr->done == 0) { |
33bb3b29 | 699 | fibptr->done = 2; /* Tell interrupt we aborted */ |
c8f7b073 | 700 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
cacb6dc3 | 701 | return -ERESTARTSYS; |
c8f7b073 | 702 | } |
33bb3b29 | 703 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
125e1874 | 704 | BUG_ON(fibptr->done == 0); |
8ce3eca4 | 705 | |
912d4e88 | 706 | if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 707 | return -ETIMEDOUT; |
912d4e88 | 708 | return 0; |
1da177e4 LT |
709 | } |
710 | /* | |
711 | * If the user does not want a response than return success otherwise | |
712 | * return pending | |
713 | */ | |
714 | if (reply) | |
715 | return -EINPROGRESS; | |
716 | else | |
717 | return 0; | |
718 | } | |
719 | ||
423400e6 RAR |
720 | int aac_hba_send(u8 command, struct fib *fibptr, fib_callback callback, |
721 | void *callback_data) | |
722 | { | |
723 | struct aac_dev *dev = fibptr->dev; | |
724 | int wait; | |
725 | unsigned long flags = 0; | |
726 | unsigned long mflags = 0; | |
727 | ||
728 | fibptr->flags = (FIB_CONTEXT_FLAG | FIB_CONTEXT_FLAG_NATIVE_HBA); | |
729 | if (callback) { | |
730 | wait = 0; | |
731 | fibptr->callback = callback; | |
732 | fibptr->callback_data = callback_data; | |
733 | } else | |
734 | wait = 1; | |
735 | ||
736 | ||
737 | if (command == HBA_IU_TYPE_SCSI_CMD_REQ) { | |
738 | struct aac_hba_cmd_req *hbacmd = | |
739 | (struct aac_hba_cmd_req *)fibptr->hw_fib_va; | |
740 | ||
741 | hbacmd->iu_type = command; | |
742 | /* bit1 of request_id must be 0 */ | |
743 | hbacmd->request_id = | |
744 | cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1); | |
c323eab7 | 745 | fibptr->flags |= FIB_CONTEXT_FLAG_SCSI_CMD; |
b60710ec | 746 | } else if (command != HBA_IU_TYPE_SCSI_TM_REQ) |
423400e6 RAR |
747 | return -EINVAL; |
748 | ||
749 | ||
750 | if (wait) { | |
751 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
752 | if (dev->management_fib_count >= AAC_NUM_MGT_FIB) { | |
753 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
754 | return -EBUSY; | |
755 | } | |
756 | dev->management_fib_count++; | |
757 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
758 | spin_lock_irqsave(&fibptr->event_lock, flags); | |
759 | } | |
760 | ||
761 | if (aac_adapter_deliver(fibptr) != 0) { | |
762 | if (wait) { | |
763 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
764 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
765 | dev->management_fib_count--; | |
766 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
767 | } | |
768 | return -EBUSY; | |
769 | } | |
770 | FIB_COUNTER_INCREMENT(aac_config.NativeSent); | |
771 | ||
772 | if (wait) { | |
16ae9dd3 | 773 | |
423400e6 | 774 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
16ae9dd3 | 775 | |
bd257b2f | 776 | if (unlikely(pci_channel_offline(dev->pdev))) |
16ae9dd3 RAR |
777 | return -EFAULT; |
778 | ||
8c41b9b7 RAR |
779 | fibptr->flags |= FIB_CONTEXT_FLAG_WAIT; |
780 | if (down_interruptible(&fibptr->event_wait)) | |
423400e6 | 781 | fibptr->done = 2; |
8c41b9b7 RAR |
782 | fibptr->flags &= ~(FIB_CONTEXT_FLAG_WAIT); |
783 | ||
423400e6 RAR |
784 | spin_lock_irqsave(&fibptr->event_lock, flags); |
785 | if ((fibptr->done == 0) || (fibptr->done == 2)) { | |
786 | fibptr->done = 2; /* Tell interrupt we aborted */ | |
787 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
788 | return -ERESTARTSYS; | |
789 | } | |
790 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
791 | WARN_ON(fibptr->done == 0); | |
792 | ||
793 | if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) | |
794 | return -ETIMEDOUT; | |
795 | ||
796 | return 0; | |
797 | } | |
798 | ||
799 | return -EINPROGRESS; | |
800 | } | |
801 | ||
8ce3eca4 | 802 | /** |
1da177e4 LT |
803 | * aac_consumer_get - get the top of the queue |
804 | * @dev: Adapter | |
805 | * @q: Queue | |
806 | * @entry: Return entry | |
807 | * | |
808 | * Will return a pointer to the entry on the top of the queue requested that | |
8ce3eca4 SM |
809 | * we are a consumer of, and return the address of the queue entry. It does |
810 | * not change the state of the queue. | |
1da177e4 LT |
811 | */ |
812 | ||
813 | int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry) | |
814 | { | |
815 | u32 index; | |
816 | int status; | |
817 | if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) { | |
818 | status = 0; | |
819 | } else { | |
820 | /* | |
821 | * The consumer index must be wrapped if we have reached | |
822 | * the end of the queue, else we just use the entry | |
823 | * pointed to by the header index | |
824 | */ | |
8ce3eca4 SM |
825 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) |
826 | index = 0; | |
1da177e4 | 827 | else |
8ce3eca4 | 828 | index = le32_to_cpu(*q->headers.consumer); |
1da177e4 LT |
829 | *entry = q->base + index; |
830 | status = 1; | |
831 | } | |
832 | return(status); | |
833 | } | |
834 | ||
835 | /** | |
836 | * aac_consumer_free - free consumer entry | |
837 | * @dev: Adapter | |
838 | * @q: Queue | |
839 | * @qid: Queue ident | |
840 | * | |
841 | * Frees up the current top of the queue we are a consumer of. If the | |
842 | * queue was full notify the producer that the queue is no longer full. | |
843 | */ | |
844 | ||
845 | void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid) | |
846 | { | |
847 | int wasfull = 0; | |
848 | u32 notify; | |
849 | ||
850 | if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer)) | |
851 | wasfull = 1; | |
8ce3eca4 | 852 | |
1da177e4 LT |
853 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) |
854 | *q->headers.consumer = cpu_to_le32(1); | |
855 | else | |
36b8dd1b | 856 | le32_add_cpu(q->headers.consumer, 1); |
8ce3eca4 | 857 | |
1da177e4 LT |
858 | if (wasfull) { |
859 | switch (qid) { | |
860 | ||
861 | case HostNormCmdQueue: | |
862 | notify = HostNormCmdNotFull; | |
863 | break; | |
1da177e4 LT |
864 | case HostNormRespQueue: |
865 | notify = HostNormRespNotFull; | |
866 | break; | |
1da177e4 LT |
867 | default: |
868 | BUG(); | |
869 | return; | |
870 | } | |
871 | aac_adapter_notify(dev, notify); | |
872 | } | |
8ce3eca4 | 873 | } |
1da177e4 LT |
874 | |
875 | /** | |
bfb35aa8 | 876 | * aac_fib_adapter_complete - complete adapter issued fib |
1da177e4 LT |
877 | * @fibptr: fib to complete |
878 | * @size: size of fib | |
879 | * | |
880 | * Will do all necessary work to complete a FIB that was sent from | |
881 | * the adapter. | |
882 | */ | |
883 | ||
bfb35aa8 | 884 | int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size) |
1da177e4 | 885 | { |
a8166a52 | 886 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 887 | struct aac_dev * dev = fibptr->dev; |
1640a2c3 | 888 | struct aac_queue * q; |
1da177e4 | 889 | unsigned long nointr = 0; |
1640a2c3 MH |
890 | unsigned long qflags; |
891 | ||
85d22bbf | 892 | if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 || |
d1ef4da8 RAR |
893 | dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 || |
894 | dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { | |
e8b12f0f MR |
895 | kfree(hw_fib); |
896 | return 0; | |
897 | } | |
898 | ||
1640a2c3 | 899 | if (hw_fib->header.XferState == 0) { |
28713324 | 900 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
e8b12f0f | 901 | kfree(hw_fib); |
8ce3eca4 | 902 | return 0; |
1640a2c3 | 903 | } |
1da177e4 LT |
904 | /* |
905 | * If we plan to do anything check the structure type first. | |
8ce3eca4 | 906 | */ |
85d22bbf MR |
907 | if (hw_fib->header.StructType != FIB_MAGIC && |
908 | hw_fib->header.StructType != FIB_MAGIC2 && | |
909 | hw_fib->header.StructType != FIB_MAGIC2_64) { | |
28713324 | 910 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
e8b12f0f | 911 | kfree(hw_fib); |
8ce3eca4 | 912 | return -EINVAL; |
1da177e4 LT |
913 | } |
914 | /* | |
915 | * This block handles the case where the adapter had sent us a | |
916 | * command and we have finished processing the command. We | |
8ce3eca4 SM |
917 | * call completeFib when we are done processing the command |
918 | * and want to send a response back to the adapter. This will | |
1da177e4 LT |
919 | * send the completed cdb to the adapter. |
920 | */ | |
921 | if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) { | |
28713324 | 922 | if (dev->comm_interface == AAC_COMM_MESSAGE) { |
8e0c5ebd MH |
923 | kfree (hw_fib); |
924 | } else { | |
8ce3eca4 SM |
925 | u32 index; |
926 | hw_fib->header.XferState |= cpu_to_le32(HostProcessed); | |
8e0c5ebd MH |
927 | if (size) { |
928 | size += sizeof(struct aac_fibhdr); | |
8ce3eca4 | 929 | if (size > le16_to_cpu(hw_fib->header.SenderSize)) |
8e0c5ebd MH |
930 | return -EMSGSIZE; |
931 | hw_fib->header.Size = cpu_to_le16(size); | |
932 | } | |
933 | q = &dev->queues->queue[AdapNormRespQueue]; | |
934 | spin_lock_irqsave(q->lock, qflags); | |
935 | aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr); | |
936 | *(q->headers.producer) = cpu_to_le32(index + 1); | |
937 | spin_unlock_irqrestore(q->lock, qflags); | |
938 | if (!(nointr & (int)aac_config.irq_mod)) | |
939 | aac_adapter_notify(dev, AdapNormRespQueue); | |
1da177e4 | 940 | } |
8ce3eca4 SM |
941 | } else { |
942 | printk(KERN_WARNING "aac_fib_adapter_complete: " | |
943 | "Unknown xferstate detected.\n"); | |
944 | BUG(); | |
1da177e4 | 945 | } |
1da177e4 LT |
946 | return 0; |
947 | } | |
948 | ||
949 | /** | |
bfb35aa8 | 950 | * aac_fib_complete - fib completion handler |
1da177e4 LT |
951 | * @fib: FIB to complete |
952 | * | |
953 | * Will do all necessary work to complete a FIB. | |
954 | */ | |
8ce3eca4 | 955 | |
bfb35aa8 | 956 | int aac_fib_complete(struct fib *fibptr) |
1da177e4 | 957 | { |
a8166a52 | 958 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 959 | |
423400e6 RAR |
960 | if (fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) { |
961 | fib_dealloc(fibptr); | |
962 | return 0; | |
963 | } | |
964 | ||
1da177e4 | 965 | /* |
423400e6 RAR |
966 | * Check for a fib which has already been completed or with a |
967 | * status wait timeout | |
1da177e4 LT |
968 | */ |
969 | ||
423400e6 | 970 | if (hw_fib->header.XferState == 0 || fibptr->done == 2) |
8ce3eca4 | 971 | return 0; |
1da177e4 LT |
972 | /* |
973 | * If we plan to do anything check the structure type first. | |
8ce3eca4 | 974 | */ |
1da177e4 | 975 | |
85d22bbf MR |
976 | if (hw_fib->header.StructType != FIB_MAGIC && |
977 | hw_fib->header.StructType != FIB_MAGIC2 && | |
978 | hw_fib->header.StructType != FIB_MAGIC2_64) | |
8ce3eca4 | 979 | return -EINVAL; |
1da177e4 | 980 | /* |
8ce3eca4 | 981 | * This block completes a cdb which orginated on the host and we |
1da177e4 LT |
982 | * just need to deallocate the cdb or reinit it. At this point the |
983 | * command is complete that we had sent to the adapter and this | |
984 | * cdb could be reused. | |
985 | */ | |
cacb6dc3 | 986 | |
1da177e4 LT |
987 | if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) && |
988 | (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))) | |
989 | { | |
990 | fib_dealloc(fibptr); | |
991 | } | |
992 | else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost)) | |
993 | { | |
994 | /* | |
995 | * This handles the case when the host has aborted the I/O | |
996 | * to the adapter because the adapter is not responding | |
997 | */ | |
998 | fib_dealloc(fibptr); | |
999 | } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) { | |
1000 | fib_dealloc(fibptr); | |
1001 | } else { | |
1002 | BUG(); | |
8ce3eca4 | 1003 | } |
1da177e4 LT |
1004 | return 0; |
1005 | } | |
1006 | ||
1007 | /** | |
1008 | * aac_printf - handle printf from firmware | |
1009 | * @dev: Adapter | |
1010 | * @val: Message info | |
1011 | * | |
1012 | * Print a message passed to us by the controller firmware on the | |
1013 | * Adaptec board | |
1014 | */ | |
1015 | ||
1016 | void aac_printf(struct aac_dev *dev, u32 val) | |
1017 | { | |
1da177e4 | 1018 | char *cp = dev->printfbuf; |
7c00ffa3 MH |
1019 | if (dev->printf_enabled) |
1020 | { | |
1021 | int length = val & 0xffff; | |
1022 | int level = (val >> 16) & 0xffff; | |
8ce3eca4 | 1023 | |
7c00ffa3 MH |
1024 | /* |
1025 | * The size of the printfbuf is set in port.c | |
1026 | * There is no variable or define for it | |
1027 | */ | |
1028 | if (length > 255) | |
1029 | length = 255; | |
1030 | if (cp[length] != 0) | |
1031 | cp[length] = 0; | |
1032 | if (level == LOG_AAC_HIGH_ERROR) | |
1241f359 | 1033 | printk(KERN_WARNING "%s:%s", dev->name, cp); |
7c00ffa3 | 1034 | else |
1241f359 | 1035 | printk(KERN_INFO "%s:%s", dev->name, cp); |
7c00ffa3 | 1036 | } |
8ce3eca4 | 1037 | memset(cp, 0, 256); |
1da177e4 LT |
1038 | } |
1039 | ||
9cb62fa2 RAR |
1040 | static inline int aac_aif_data(struct aac_aifcmd *aifcmd, uint32_t index) |
1041 | { | |
1042 | return le32_to_cpu(((__le32 *)aifcmd->data)[index]); | |
1043 | } | |
1044 | ||
1045 | ||
1046 | static void aac_handle_aif_bu(struct aac_dev *dev, struct aac_aifcmd *aifcmd) | |
1047 | { | |
1048 | switch (aac_aif_data(aifcmd, 1)) { | |
1049 | case AifBuCacheDataLoss: | |
1050 | if (aac_aif_data(aifcmd, 2)) | |
1051 | dev_info(&dev->pdev->dev, "Backup unit had cache data loss - [%d]\n", | |
1052 | aac_aif_data(aifcmd, 2)); | |
1053 | else | |
1054 | dev_info(&dev->pdev->dev, "Backup Unit had cache data loss\n"); | |
1055 | break; | |
1056 | case AifBuCacheDataRecover: | |
1057 | if (aac_aif_data(aifcmd, 2)) | |
1058 | dev_info(&dev->pdev->dev, "DDR cache data recovered successfully - [%d]\n", | |
1059 | aac_aif_data(aifcmd, 2)); | |
1060 | else | |
1061 | dev_info(&dev->pdev->dev, "DDR cache data recovered successfully\n"); | |
1062 | break; | |
1063 | } | |
1064 | } | |
131256cf MH |
1065 | |
1066 | /** | |
1067 | * aac_handle_aif - Handle a message from the firmware | |
1068 | * @dev: Which adapter this fib is from | |
1069 | * @fibptr: Pointer to fibptr from adapter | |
1070 | * | |
1071 | * This routine handles a driver notify fib from the adapter and | |
1072 | * dispatches it to the appropriate routine for handling. | |
1073 | */ | |
1074 | ||
495c0217 | 1075 | #define AIF_SNIFF_TIMEOUT (500*HZ) |
131256cf MH |
1076 | static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr) |
1077 | { | |
a8166a52 | 1078 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
131256cf | 1079 | struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data; |
0995ad38 | 1080 | u32 channel, id, lun, container; |
131256cf MH |
1081 | struct scsi_device *device; |
1082 | enum { | |
1083 | NOTHING, | |
1084 | DELETE, | |
1085 | ADD, | |
1086 | CHANGE | |
0995ad38 | 1087 | } device_config_needed = NOTHING; |
131256cf MH |
1088 | |
1089 | /* Sniff for container changes */ | |
1090 | ||
c8f7b073 | 1091 | if (!dev || !dev->fsa_dev) |
131256cf | 1092 | return; |
0995ad38 | 1093 | container = channel = id = lun = (u32)-1; |
131256cf MH |
1094 | |
1095 | /* | |
1096 | * We have set this up to try and minimize the number of | |
1097 | * re-configures that take place. As a result of this when | |
1098 | * certain AIF's come in we will set a flag waiting for another | |
1099 | * type of AIF before setting the re-config flag. | |
1100 | */ | |
1101 | switch (le32_to_cpu(aifcmd->command)) { | |
1102 | case AifCmdDriverNotify: | |
f3307f72 | 1103 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
dab04b01 MR |
1104 | case AifRawDeviceRemove: |
1105 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); | |
1106 | if ((container >> 28)) { | |
1107 | container = (u32)-1; | |
1108 | break; | |
1109 | } | |
1110 | channel = (container >> 24) & 0xF; | |
1111 | if (channel >= dev->maximum_num_channels) { | |
1112 | container = (u32)-1; | |
1113 | break; | |
1114 | } | |
1115 | id = container & 0xFFFF; | |
1116 | if (id >= dev->maximum_num_physicals) { | |
1117 | container = (u32)-1; | |
1118 | break; | |
1119 | } | |
1120 | lun = (container >> 16) & 0xFF; | |
1121 | container = (u32)-1; | |
1122 | channel = aac_phys_to_logical(channel); | |
423400e6 | 1123 | device_config_needed = DELETE; |
dab04b01 | 1124 | break; |
423400e6 | 1125 | |
131256cf MH |
1126 | /* |
1127 | * Morph or Expand complete | |
1128 | */ | |
1129 | case AifDenMorphComplete: | |
1130 | case AifDenVolumeExtendComplete: | |
f3307f72 | 1131 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1132 | if (container >= dev->maximum_num_containers) |
1133 | break; | |
1134 | ||
1135 | /* | |
f64a181d | 1136 | * Find the scsi_device associated with the SCSI |
131256cf MH |
1137 | * address. Make sure we have the right array, and if |
1138 | * so set the flag to initiate a new re-config once we | |
1139 | * see an AifEnConfigChange AIF come through. | |
1140 | */ | |
1141 | ||
1142 | if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) { | |
8ce3eca4 SM |
1143 | device = scsi_device_lookup(dev->scsi_host_ptr, |
1144 | CONTAINER_TO_CHANNEL(container), | |
1145 | CONTAINER_TO_ID(container), | |
131256cf MH |
1146 | CONTAINER_TO_LUN(container)); |
1147 | if (device) { | |
1148 | dev->fsa_dev[container].config_needed = CHANGE; | |
1149 | dev->fsa_dev[container].config_waiting_on = AifEnConfigChange; | |
31876f32 | 1150 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1151 | scsi_device_put(device); |
1152 | } | |
1153 | } | |
1154 | } | |
1155 | ||
1156 | /* | |
1157 | * If we are waiting on something and this happens to be | |
1158 | * that thing then set the re-configure flag. | |
1159 | */ | |
1160 | if (container != (u32)-1) { | |
1161 | if (container >= dev->maximum_num_containers) | |
1162 | break; | |
31876f32 | 1163 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1164 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1165 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1166 | dev->fsa_dev[container].config_waiting_on = 0; |
1167 | } else for (container = 0; | |
1168 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 1169 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1170 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1171 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1172 | dev->fsa_dev[container].config_waiting_on = 0; |
1173 | } | |
1174 | break; | |
1175 | ||
1176 | case AifCmdEventNotify: | |
f3307f72 | 1177 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
95e852e1 SM |
1178 | case AifEnBatteryEvent: |
1179 | dev->cache_protected = | |
1180 | (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3)); | |
1181 | break; | |
131256cf MH |
1182 | /* |
1183 | * Add an Array. | |
1184 | */ | |
1185 | case AifEnAddContainer: | |
f3307f72 | 1186 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1187 | if (container >= dev->maximum_num_containers) |
1188 | break; | |
1189 | dev->fsa_dev[container].config_needed = ADD; | |
1190 | dev->fsa_dev[container].config_waiting_on = | |
1191 | AifEnConfigChange; | |
31876f32 | 1192 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1193 | break; |
1194 | ||
1195 | /* | |
1196 | * Delete an Array. | |
1197 | */ | |
1198 | case AifEnDeleteContainer: | |
f3307f72 | 1199 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1200 | if (container >= dev->maximum_num_containers) |
1201 | break; | |
1202 | dev->fsa_dev[container].config_needed = DELETE; | |
1203 | dev->fsa_dev[container].config_waiting_on = | |
1204 | AifEnConfigChange; | |
31876f32 | 1205 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1206 | break; |
1207 | ||
1208 | /* | |
1209 | * Container change detected. If we currently are not | |
1210 | * waiting on something else, setup to wait on a Config Change. | |
1211 | */ | |
1212 | case AifEnContainerChange: | |
f3307f72 | 1213 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1214 | if (container >= dev->maximum_num_containers) |
1215 | break; | |
31876f32 MH |
1216 | if (dev->fsa_dev[container].config_waiting_on && |
1217 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) | |
131256cf MH |
1218 | break; |
1219 | dev->fsa_dev[container].config_needed = CHANGE; | |
1220 | dev->fsa_dev[container].config_waiting_on = | |
1221 | AifEnConfigChange; | |
31876f32 | 1222 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1223 | break; |
1224 | ||
1225 | case AifEnConfigChange: | |
1226 | break; | |
1227 | ||
cb1042f2 SM |
1228 | case AifEnAddJBOD: |
1229 | case AifEnDeleteJBOD: | |
1230 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); | |
a4576b5d MS |
1231 | if ((container >> 28)) { |
1232 | container = (u32)-1; | |
cb1042f2 | 1233 | break; |
a4576b5d | 1234 | } |
cb1042f2 | 1235 | channel = (container >> 24) & 0xF; |
a4576b5d MS |
1236 | if (channel >= dev->maximum_num_channels) { |
1237 | container = (u32)-1; | |
cb1042f2 | 1238 | break; |
a4576b5d | 1239 | } |
cb1042f2 | 1240 | id = container & 0xFFFF; |
a4576b5d MS |
1241 | if (id >= dev->maximum_num_physicals) { |
1242 | container = (u32)-1; | |
cb1042f2 | 1243 | break; |
a4576b5d | 1244 | } |
cb1042f2 | 1245 | lun = (container >> 16) & 0xFF; |
a4576b5d | 1246 | container = (u32)-1; |
cb1042f2 SM |
1247 | channel = aac_phys_to_logical(channel); |
1248 | device_config_needed = | |
1249 | (((__le32 *)aifcmd->data)[0] == | |
1250 | cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE; | |
5ca05594 RM |
1251 | if (device_config_needed == ADD) { |
1252 | device = scsi_device_lookup(dev->scsi_host_ptr, | |
1253 | channel, | |
1254 | id, | |
1255 | lun); | |
1256 | if (device) { | |
1257 | scsi_remove_device(device); | |
1258 | scsi_device_put(device); | |
1259 | } | |
1260 | } | |
cb1042f2 SM |
1261 | break; |
1262 | ||
0995ad38 | 1263 | case AifEnEnclosureManagement: |
cb1042f2 SM |
1264 | /* |
1265 | * If in JBOD mode, automatic exposure of new | |
1266 | * physical target to be suppressed until configured. | |
1267 | */ | |
1268 | if (dev->jbod) | |
1269 | break; | |
0995ad38 SM |
1270 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) { |
1271 | case EM_DRIVE_INSERTION: | |
1272 | case EM_DRIVE_REMOVAL: | |
46154a02 MR |
1273 | case EM_SES_DRIVE_INSERTION: |
1274 | case EM_SES_DRIVE_REMOVAL: | |
0995ad38 SM |
1275 | container = le32_to_cpu( |
1276 | ((__le32 *)aifcmd->data)[2]); | |
a4576b5d MS |
1277 | if ((container >> 28)) { |
1278 | container = (u32)-1; | |
0995ad38 | 1279 | break; |
a4576b5d | 1280 | } |
0995ad38 | 1281 | channel = (container >> 24) & 0xF; |
a4576b5d MS |
1282 | if (channel >= dev->maximum_num_channels) { |
1283 | container = (u32)-1; | |
0995ad38 | 1284 | break; |
a4576b5d | 1285 | } |
0995ad38 SM |
1286 | id = container & 0xFFFF; |
1287 | lun = (container >> 16) & 0xFF; | |
a4576b5d | 1288 | container = (u32)-1; |
0995ad38 SM |
1289 | if (id >= dev->maximum_num_physicals) { |
1290 | /* legacy dev_t ? */ | |
1291 | if ((0x2000 <= id) || lun || channel || | |
1292 | ((channel = (id >> 7) & 0x3F) >= | |
1293 | dev->maximum_num_channels)) | |
1294 | break; | |
1295 | lun = (id >> 4) & 7; | |
1296 | id &= 0xF; | |
1297 | } | |
1298 | channel = aac_phys_to_logical(channel); | |
1299 | device_config_needed = | |
46154a02 MR |
1300 | ((((__le32 *)aifcmd->data)[3] |
1301 | == cpu_to_le32(EM_DRIVE_INSERTION)) || | |
1302 | (((__le32 *)aifcmd->data)[3] | |
1303 | == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ? | |
0995ad38 SM |
1304 | ADD : DELETE; |
1305 | break; | |
1306 | } | |
9cb62fa2 RAR |
1307 | case AifBuManagerEvent: |
1308 | aac_handle_aif_bu(dev, aifcmd); | |
0995ad38 | 1309 | break; |
131256cf MH |
1310 | } |
1311 | ||
1312 | /* | |
1313 | * If we are waiting on something and this happens to be | |
1314 | * that thing then set the re-configure flag. | |
1315 | */ | |
1316 | if (container != (u32)-1) { | |
1317 | if (container >= dev->maximum_num_containers) | |
1318 | break; | |
31876f32 | 1319 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1320 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1321 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1322 | dev->fsa_dev[container].config_waiting_on = 0; |
1323 | } else for (container = 0; | |
1324 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 1325 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1326 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1327 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1328 | dev->fsa_dev[container].config_waiting_on = 0; |
1329 | } | |
1330 | break; | |
1331 | ||
1332 | case AifCmdJobProgress: | |
1333 | /* | |
1334 | * These are job progress AIF's. When a Clear is being | |
1335 | * done on a container it is initially created then hidden from | |
1336 | * the OS. When the clear completes we don't get a config | |
1337 | * change so we monitor the job status complete on a clear then | |
1338 | * wait for a container change. | |
1339 | */ | |
1340 | ||
f3307f72 CH |
1341 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
1342 | (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] || | |
1343 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) { | |
131256cf MH |
1344 | for (container = 0; |
1345 | container < dev->maximum_num_containers; | |
1346 | ++container) { | |
1347 | /* | |
1348 | * Stomp on all config sequencing for all | |
1349 | * containers? | |
1350 | */ | |
1351 | dev->fsa_dev[container].config_waiting_on = | |
1352 | AifEnContainerChange; | |
1353 | dev->fsa_dev[container].config_needed = ADD; | |
31876f32 MH |
1354 | dev->fsa_dev[container].config_waiting_stamp = |
1355 | jiffies; | |
131256cf MH |
1356 | } |
1357 | } | |
f3307f72 CH |
1358 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
1359 | ((__le32 *)aifcmd->data)[6] == 0 && | |
1360 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) { | |
131256cf MH |
1361 | for (container = 0; |
1362 | container < dev->maximum_num_containers; | |
1363 | ++container) { | |
1364 | /* | |
1365 | * Stomp on all config sequencing for all | |
1366 | * containers? | |
1367 | */ | |
1368 | dev->fsa_dev[container].config_waiting_on = | |
1369 | AifEnContainerChange; | |
1370 | dev->fsa_dev[container].config_needed = DELETE; | |
31876f32 MH |
1371 | dev->fsa_dev[container].config_waiting_stamp = |
1372 | jiffies; | |
131256cf MH |
1373 | } |
1374 | } | |
1375 | break; | |
1376 | } | |
1377 | ||
a4576b5d MS |
1378 | container = 0; |
1379 | retry_next: | |
0995ad38 | 1380 | if (device_config_needed == NOTHING) |
a4576b5d | 1381 | for (; container < dev->maximum_num_containers; ++container) { |
31876f32 MH |
1382 | if ((dev->fsa_dev[container].config_waiting_on == 0) && |
1383 | (dev->fsa_dev[container].config_needed != NOTHING) && | |
1384 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) { | |
131256cf MH |
1385 | device_config_needed = |
1386 | dev->fsa_dev[container].config_needed; | |
1387 | dev->fsa_dev[container].config_needed = NOTHING; | |
0995ad38 SM |
1388 | channel = CONTAINER_TO_CHANNEL(container); |
1389 | id = CONTAINER_TO_ID(container); | |
1390 | lun = CONTAINER_TO_LUN(container); | |
131256cf MH |
1391 | break; |
1392 | } | |
1393 | } | |
1394 | if (device_config_needed == NOTHING) | |
1395 | return; | |
1396 | ||
1397 | /* | |
1398 | * If we decided that a re-configuration needs to be done, | |
1399 | * schedule it here on the way out the door, please close the door | |
1400 | * behind you. | |
1401 | */ | |
1402 | ||
131256cf | 1403 | /* |
f64a181d | 1404 | * Find the scsi_device associated with the SCSI address, |
131256cf MH |
1405 | * and mark it as changed, invalidating the cache. This deals |
1406 | * with changes to existing device IDs. | |
1407 | */ | |
1408 | ||
1409 | if (!dev || !dev->scsi_host_ptr) | |
1410 | return; | |
1411 | /* | |
bfb35aa8 | 1412 | * force reload of disk info via aac_probe_container |
131256cf | 1413 | */ |
0995ad38 SM |
1414 | if ((channel == CONTAINER_CHANNEL) && |
1415 | (device_config_needed != NOTHING)) { | |
1416 | if (dev->fsa_dev[container].valid == 1) | |
1417 | dev->fsa_dev[container].valid = 2; | |
bfb35aa8 | 1418 | aac_probe_container(dev, container); |
0995ad38 SM |
1419 | } |
1420 | device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun); | |
131256cf MH |
1421 | if (device) { |
1422 | switch (device_config_needed) { | |
1423 | case DELETE: | |
9cccde93 RM |
1424 | #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE)) |
1425 | scsi_remove_device(device); | |
1426 | #else | |
0995ad38 SM |
1427 | if (scsi_device_online(device)) { |
1428 | scsi_device_set_state(device, SDEV_OFFLINE); | |
1429 | sdev_printk(KERN_INFO, device, | |
1430 | "Device offlined - %s\n", | |
1431 | (channel == CONTAINER_CHANNEL) ? | |
1432 | "array deleted" : | |
1433 | "enclosure services event"); | |
1434 | } | |
9cccde93 | 1435 | #endif |
0995ad38 SM |
1436 | break; |
1437 | case ADD: | |
1438 | if (!scsi_device_online(device)) { | |
1439 | sdev_printk(KERN_INFO, device, | |
1440 | "Device online - %s\n", | |
1441 | (channel == CONTAINER_CHANNEL) ? | |
1442 | "array created" : | |
1443 | "enclosure services event"); | |
1444 | scsi_device_set_state(device, SDEV_RUNNING); | |
1445 | } | |
1446 | /* FALLTHRU */ | |
131256cf | 1447 | case CHANGE: |
0995ad38 SM |
1448 | if ((channel == CONTAINER_CHANNEL) |
1449 | && (!dev->fsa_dev[container].valid)) { | |
9cccde93 RM |
1450 | #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE)) |
1451 | scsi_remove_device(device); | |
1452 | #else | |
0995ad38 SM |
1453 | if (!scsi_device_online(device)) |
1454 | break; | |
1455 | scsi_device_set_state(device, SDEV_OFFLINE); | |
1456 | sdev_printk(KERN_INFO, device, | |
1457 | "Device offlined - %s\n", | |
1458 | "array failed"); | |
9cccde93 | 1459 | #endif |
0995ad38 SM |
1460 | break; |
1461 | } | |
131256cf MH |
1462 | scsi_rescan_device(&device->sdev_gendev); |
1463 | ||
1464 | default: | |
1465 | break; | |
1466 | } | |
1467 | scsi_device_put(device); | |
0995ad38 | 1468 | device_config_needed = NOTHING; |
131256cf | 1469 | } |
0995ad38 SM |
1470 | if (device_config_needed == ADD) |
1471 | scsi_add_device(dev->scsi_host_ptr, channel, id, lun); | |
a4576b5d MS |
1472 | if (channel == CONTAINER_CHANNEL) { |
1473 | container++; | |
1474 | device_config_needed = NOTHING; | |
1475 | goto retry_next; | |
1476 | } | |
131256cf MH |
1477 | } |
1478 | ||
31364329 | 1479 | static int _aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type) |
8c867b25 MH |
1480 | { |
1481 | int index, quirks; | |
8b1462e0 | 1482 | int retval; |
8c867b25 MH |
1483 | struct Scsi_Host *host; |
1484 | struct scsi_device *dev; | |
1485 | struct scsi_cmnd *command; | |
1486 | struct scsi_cmnd *command_list; | |
29c97684 | 1487 | int jafo = 0; |
31364329 | 1488 | int bled; |
8105d39d | 1489 | u64 dmamask; |
8c41b9b7 | 1490 | int num_of_fibs = 0; |
8c867b25 MH |
1491 | |
1492 | /* | |
1493 | * Assumptions: | |
29c97684 SM |
1494 | * - host is locked, unless called by the aacraid thread. |
1495 | * (a matter of convenience, due to legacy issues surrounding | |
1496 | * eh_host_adapter_reset). | |
8c867b25 MH |
1497 | * - in_reset is asserted, so no new i/o is getting to the |
1498 | * card. | |
29c97684 SM |
1499 | * - The card is dead, or will be very shortly ;-/ so no new |
1500 | * commands are completing in the interrupt service. | |
8c867b25 MH |
1501 | */ |
1502 | host = aac->scsi_host_ptr; | |
1503 | scsi_block_requests(host); | |
1504 | aac_adapter_disable_int(aac); | |
29c97684 SM |
1505 | if (aac->thread->pid != current->pid) { |
1506 | spin_unlock_irq(host->host_lock); | |
1507 | kthread_stop(aac->thread); | |
1508 | jafo = 1; | |
1509 | } | |
8c867b25 MH |
1510 | |
1511 | /* | |
1512 | * If a positive health, means in a known DEAD PANIC | |
1513 | * state and the adapter could be reset to `try again'. | |
1514 | */ | |
31364329 RAR |
1515 | bled = forced ? 0 : aac_adapter_check_health(aac); |
1516 | retval = aac_adapter_restart(aac, bled, reset_type); | |
8c867b25 MH |
1517 | |
1518 | if (retval) | |
1519 | goto out; | |
8c867b25 | 1520 | |
d18b448f MH |
1521 | /* |
1522 | * Loop through the fibs, close the synchronous FIBS | |
1523 | */ | |
8c41b9b7 RAR |
1524 | retval = 1; |
1525 | num_of_fibs = aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB; | |
1526 | for (index = 0; index < num_of_fibs; index++) { | |
1527 | ||
d18b448f | 1528 | struct fib *fib = &aac->fibs[index]; |
8c41b9b7 RAR |
1529 | __le32 XferState = fib->hw_fib_va->header.XferState; |
1530 | bool is_response_expected = false; | |
1531 | ||
1532 | if (!(XferState & cpu_to_le32(NoResponseExpected | Async)) && | |
1533 | (XferState & cpu_to_le32(ResponseExpected))) | |
1534 | is_response_expected = true; | |
1535 | ||
1536 | if (is_response_expected | |
1537 | || fib->flags & FIB_CONTEXT_FLAG_WAIT) { | |
d18b448f MH |
1538 | unsigned long flagv; |
1539 | spin_lock_irqsave(&fib->event_lock, flagv); | |
1540 | up(&fib->event_wait); | |
1541 | spin_unlock_irqrestore(&fib->event_lock, flagv); | |
1542 | schedule(); | |
33bb3b29 | 1543 | retval = 0; |
d18b448f MH |
1544 | } |
1545 | } | |
33bb3b29 MH |
1546 | /* Give some extra time for ioctls to complete. */ |
1547 | if (retval == 0) | |
1548 | ssleep(2); | |
8c867b25 MH |
1549 | index = aac->cardtype; |
1550 | ||
1551 | /* | |
1552 | * Re-initialize the adapter, first free resources, then carefully | |
1553 | * apply the initialization sequence to come back again. Only risk | |
1554 | * is a change in Firmware dropping cache, it is assumed the caller | |
1555 | * will ensure that i/o is queisced and the card is flushed in that | |
1556 | * case. | |
1557 | */ | |
e4717292 | 1558 | aac_free_irq(aac); |
8c867b25 | 1559 | aac_fib_map_free(aac); |
f481973d MR |
1560 | dma_free_coherent(&aac->pdev->dev, aac->comm_size, aac->comm_addr, |
1561 | aac->comm_phys); | |
8c867b25 MH |
1562 | aac->comm_addr = NULL; |
1563 | aac->comm_phys = 0; | |
1564 | kfree(aac->queues); | |
1565 | aac->queues = NULL; | |
8c867b25 MH |
1566 | kfree(aac->fsa_dev); |
1567 | aac->fsa_dev = NULL; | |
8105d39d RAR |
1568 | |
1569 | dmamask = DMA_BIT_MASK(32); | |
94cf6ba1 | 1570 | quirks = aac_get_driver_ident(index)->quirks; |
8105d39d RAR |
1571 | if (quirks & AAC_QUIRK_31BIT) |
1572 | retval = pci_set_dma_mask(aac->pdev, dmamask); | |
1573 | else if (!(quirks & AAC_QUIRK_SRC)) | |
1574 | retval = pci_set_dma_mask(aac->pdev, dmamask); | |
1575 | else | |
1576 | retval = pci_set_consistent_dma_mask(aac->pdev, dmamask); | |
1577 | ||
1578 | if (quirks & AAC_QUIRK_31BIT && !retval) { | |
1579 | dmamask = DMA_BIT_MASK(31); | |
1580 | retval = pci_set_consistent_dma_mask(aac->pdev, dmamask); | |
8c867b25 | 1581 | } |
8105d39d RAR |
1582 | |
1583 | if (retval) | |
1584 | goto out; | |
1585 | ||
8c867b25 MH |
1586 | if ((retval = (*(aac_get_driver_ident(index)->init))(aac))) |
1587 | goto out; | |
8105d39d | 1588 | |
29c97684 | 1589 | if (jafo) { |
f170168b KC |
1590 | aac->thread = kthread_run(aac_command_thread, aac, "%s", |
1591 | aac->name); | |
29c97684 SM |
1592 | if (IS_ERR(aac->thread)) { |
1593 | retval = PTR_ERR(aac->thread); | |
1594 | goto out; | |
1595 | } | |
8c867b25 MH |
1596 | } |
1597 | (void)aac_get_adapter_info(aac); | |
8c867b25 | 1598 | if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) { |
8ce3eca4 SM |
1599 | host->sg_tablesize = 34; |
1600 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1601 | } | |
1602 | if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) { | |
1603 | host->sg_tablesize = 17; | |
1604 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1605 | } | |
8c867b25 MH |
1606 | aac_get_config_status(aac, 1); |
1607 | aac_get_containers(aac); | |
1608 | /* | |
1609 | * This is where the assumption that the Adapter is quiesced | |
1610 | * is important. | |
1611 | */ | |
1612 | command_list = NULL; | |
1613 | __shost_for_each_device(dev, host) { | |
1614 | unsigned long flags; | |
1615 | spin_lock_irqsave(&dev->list_lock, flags); | |
1616 | list_for_each_entry(command, &dev->cmd_list, list) | |
1617 | if (command->SCp.phase == AAC_OWNER_FIRMWARE) { | |
1618 | command->SCp.buffer = (struct scatterlist *)command_list; | |
1619 | command_list = command; | |
1620 | } | |
1621 | spin_unlock_irqrestore(&dev->list_lock, flags); | |
1622 | } | |
1623 | while ((command = command_list)) { | |
1624 | command_list = (struct scsi_cmnd *)command->SCp.buffer; | |
1625 | command->SCp.buffer = NULL; | |
1626 | command->result = DID_OK << 16 | |
1627 | | COMMAND_COMPLETE << 8 | |
1628 | | SAM_STAT_TASK_SET_FULL; | |
1629 | command->SCp.phase = AAC_OWNER_ERROR_HANDLER; | |
1630 | command->scsi_done(command); | |
1631 | } | |
a2d0321d | 1632 | /* |
aa130d66 RAR |
1633 | * Any Device that was already marked offline needs to be marked |
1634 | * running | |
a2d0321d RAR |
1635 | */ |
1636 | __shost_for_each_device(dev, host) { | |
aa130d66 RAR |
1637 | if (!scsi_device_online(dev)) |
1638 | scsi_device_set_state(dev, SDEV_RUNNING); | |
a2d0321d | 1639 | } |
8c867b25 MH |
1640 | retval = 0; |
1641 | ||
1642 | out: | |
1643 | aac->in_reset = 0; | |
1644 | scsi_unblock_requests(host); | |
1cbd79a3 | 1645 | |
f474254c RAR |
1646 | /* |
1647 | * Issue bus rescan to catch any configuration that might have | |
1648 | * occurred | |
1649 | */ | |
cbbfa58f | 1650 | if (!retval && !is_kdump_kernel()) { |
f474254c RAR |
1651 | dev_info(&aac->pdev->dev, "Scheduling bus rescan\n"); |
1652 | aac_schedule_safw_scan_worker(aac); | |
1653 | } | |
1654 | ||
29c97684 SM |
1655 | if (jafo) { |
1656 | spin_lock_irq(host->host_lock); | |
1657 | } | |
1658 | return retval; | |
1659 | } | |
1660 | ||
31364329 | 1661 | int aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type) |
29c97684 SM |
1662 | { |
1663 | unsigned long flagv = 0; | |
1664 | int retval; | |
1665 | struct Scsi_Host * host; | |
31364329 | 1666 | int bled; |
29c97684 SM |
1667 | |
1668 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1669 | return -EBUSY; | |
1670 | ||
1671 | if (aac->in_reset) { | |
1672 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1673 | return -EBUSY; | |
1674 | } | |
1675 | aac->in_reset = 1; | |
1676 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1677 | ||
1678 | /* | |
1679 | * Wait for all commands to complete to this specific | |
1680 | * target (block maximum 60 seconds). Although not necessary, | |
1681 | * it does make us a good storage citizen. | |
1682 | */ | |
1683 | host = aac->scsi_host_ptr; | |
1684 | scsi_block_requests(host); | |
29c97684 SM |
1685 | |
1686 | /* Quiesce build, flush cache, write through mode */ | |
f858317d SM |
1687 | if (forced < 2) |
1688 | aac_send_shutdown(aac); | |
29c97684 | 1689 | spin_lock_irqsave(host->host_lock, flagv); |
31364329 RAR |
1690 | bled = forced ? forced : |
1691 | (aac_check_reset != 0 && aac_check_reset != 1); | |
1692 | retval = _aac_reset_adapter(aac, bled, reset_type); | |
29c97684 SM |
1693 | spin_unlock_irqrestore(host->host_lock, flagv); |
1694 | ||
f858317d | 1695 | if ((forced < 2) && (retval == -ENODEV)) { |
29c97684 SM |
1696 | /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */ |
1697 | struct fib * fibctx = aac_fib_alloc(aac); | |
1698 | if (fibctx) { | |
1699 | struct aac_pause *cmd; | |
1700 | int status; | |
1701 | ||
1702 | aac_fib_init(fibctx); | |
1703 | ||
1704 | cmd = (struct aac_pause *) fib_data(fibctx); | |
1705 | ||
1706 | cmd->command = cpu_to_le32(VM_ContainerConfig); | |
1707 | cmd->type = cpu_to_le32(CT_PAUSE_IO); | |
1708 | cmd->timeout = cpu_to_le32(1); | |
1709 | cmd->min = cpu_to_le32(1); | |
1710 | cmd->noRescan = cpu_to_le32(1); | |
1711 | cmd->count = cpu_to_le32(0); | |
1712 | ||
1713 | status = aac_fib_send(ContainerCommand, | |
1714 | fibctx, | |
1715 | sizeof(struct aac_pause), | |
1716 | FsaNormal, | |
1717 | -2 /* Timeout silently */, 1, | |
1718 | NULL, NULL); | |
1719 | ||
1720 | if (status >= 0) | |
1721 | aac_fib_complete(fibctx); | |
cacb6dc3 PNRCEH |
1722 | /* FIB should be freed only after getting |
1723 | * the response from the F/W */ | |
1724 | if (status != -ERESTARTSYS) | |
1725 | aac_fib_free(fibctx); | |
29c97684 SM |
1726 | } |
1727 | } | |
1728 | ||
8c867b25 MH |
1729 | return retval; |
1730 | } | |
1731 | ||
1732 | int aac_check_health(struct aac_dev * aac) | |
1733 | { | |
1734 | int BlinkLED; | |
1735 | unsigned long time_now, flagv = 0; | |
1736 | struct list_head * entry; | |
8c867b25 MH |
1737 | |
1738 | /* Extending the scope of fib_lock slightly to protect aac->in_reset */ | |
1739 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1740 | return 0; | |
1741 | ||
1742 | if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) { | |
1743 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1744 | return 0; /* OK */ | |
1745 | } | |
1746 | ||
1747 | aac->in_reset = 1; | |
1748 | ||
1749 | /* Fake up an AIF: | |
1750 | * aac_aifcmd.command = AifCmdEventNotify = 1 | |
1751 | * aac_aifcmd.seqnum = 0xFFFFFFFF | |
1752 | * aac_aifcmd.data[0] = AifEnExpEvent = 23 | |
1753 | * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3 | |
1754 | * aac.aifcmd.data[2] = AifHighPriority = 3 | |
1755 | * aac.aifcmd.data[3] = BlinkLED | |
1756 | */ | |
1757 | ||
1758 | time_now = jiffies/HZ; | |
1759 | entry = aac->fib_list.next; | |
1760 | ||
1761 | /* | |
1762 | * For each Context that is on the | |
1763 | * fibctxList, make a copy of the | |
1764 | * fib, and then set the event to wake up the | |
1765 | * thread that is waiting for it. | |
1766 | */ | |
1767 | while (entry != &aac->fib_list) { | |
1768 | /* | |
1769 | * Extract the fibctx | |
1770 | */ | |
1771 | struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next); | |
1772 | struct hw_fib * hw_fib; | |
1773 | struct fib * fib; | |
1774 | /* | |
1775 | * Check if the queue is getting | |
1776 | * backlogged | |
1777 | */ | |
1778 | if (fibctx->count > 20) { | |
1779 | /* | |
1780 | * It's *not* jiffies folks, | |
1781 | * but jiffies / HZ, so do not | |
1782 | * panic ... | |
1783 | */ | |
1784 | u32 time_last = fibctx->jiffies; | |
1785 | /* | |
1786 | * Has it been > 2 minutes | |
1787 | * since the last read off | |
1788 | * the queue? | |
1789 | */ | |
1790 | if ((time_now - time_last) > aif_timeout) { | |
1791 | entry = entry->next; | |
1792 | aac_close_fib_context(aac, fibctx); | |
1793 | continue; | |
1794 | } | |
1795 | } | |
1796 | /* | |
1797 | * Warning: no sleep allowed while | |
1798 | * holding spinlock | |
1799 | */ | |
4dbc22d7 SM |
1800 | hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC); |
1801 | fib = kzalloc(sizeof(struct fib), GFP_ATOMIC); | |
8c867b25 MH |
1802 | if (fib && hw_fib) { |
1803 | struct aac_aifcmd * aif; | |
1804 | ||
a8166a52 | 1805 | fib->hw_fib_va = hw_fib; |
8c867b25 MH |
1806 | fib->dev = aac; |
1807 | aac_fib_init(fib); | |
1808 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
1809 | fib->size = sizeof (struct fib); | |
1810 | fib->data = hw_fib->data; | |
1811 | aif = (struct aac_aifcmd *)hw_fib->data; | |
1812 | aif->command = cpu_to_le32(AifCmdEventNotify); | |
a3940da5 SM |
1813 | aif->seqnum = cpu_to_le32(0xFFFFFFFF); |
1814 | ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent); | |
1815 | ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic); | |
1816 | ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority); | |
1817 | ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED); | |
8c867b25 MH |
1818 | |
1819 | /* | |
1820 | * Put the FIB onto the | |
1821 | * fibctx's fibs | |
1822 | */ | |
1823 | list_add_tail(&fib->fiblink, &fibctx->fib_list); | |
1824 | fibctx->count++; | |
1825 | /* | |
1826 | * Set the event to wake up the | |
1827 | * thread that will waiting. | |
1828 | */ | |
1829 | up(&fibctx->wait_sem); | |
1830 | } else { | |
1831 | printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); | |
1832 | kfree(fib); | |
1833 | kfree(hw_fib); | |
1834 | } | |
1835 | entry = entry->next; | |
1836 | } | |
1837 | ||
1838 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1839 | ||
1840 | if (BlinkLED < 0) { | |
911e572e GP |
1841 | printk(KERN_ERR "%s: Host adapter is dead (or got a PCI error) %d\n", |
1842 | aac->name, BlinkLED); | |
8c867b25 MH |
1843 | goto out; |
1844 | } | |
1845 | ||
1846 | printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED); | |
1847 | ||
8c867b25 MH |
1848 | out: |
1849 | aac->in_reset = 0; | |
1850 | return BlinkLED; | |
1851 | } | |
1852 | ||
b772ea6d RAR |
1853 | static inline int is_safw_raid_volume(struct aac_dev *aac, int bus, int target) |
1854 | { | |
1855 | return bus == CONTAINER_CHANNEL && target < aac->maximum_num_containers; | |
1856 | } | |
1857 | ||
abbea901 RAR |
1858 | static struct scsi_device *aac_lookup_safw_scsi_device(struct aac_dev *dev, |
1859 | int bus, | |
1860 | int target) | |
1861 | { | |
1862 | if (bus != CONTAINER_CHANNEL) | |
1863 | bus = aac_phys_to_logical(bus); | |
1864 | ||
1865 | return scsi_device_lookup(dev->scsi_host_ptr, bus, target, 0); | |
1866 | } | |
1867 | ||
1868 | static int aac_add_safw_device(struct aac_dev *dev, int bus, int target) | |
1869 | { | |
1870 | if (bus != CONTAINER_CHANNEL) | |
1871 | bus = aac_phys_to_logical(bus); | |
1872 | ||
1873 | return scsi_add_device(dev->scsi_host_ptr, bus, target, 0); | |
1874 | } | |
1875 | ||
1876 | static void aac_put_safw_scsi_device(struct scsi_device *sdev) | |
1877 | { | |
1878 | if (sdev) | |
1879 | scsi_device_put(sdev); | |
1880 | } | |
1881 | ||
1882 | static void aac_remove_safw_device(struct aac_dev *dev, int bus, int target) | |
1883 | { | |
1884 | struct scsi_device *sdev; | |
1885 | ||
1886 | sdev = aac_lookup_safw_scsi_device(dev, bus, target); | |
1887 | scsi_remove_device(sdev); | |
1888 | aac_put_safw_scsi_device(sdev); | |
1889 | } | |
1890 | ||
b772ea6d RAR |
1891 | static inline int aac_is_safw_scan_count_equal(struct aac_dev *dev, |
1892 | int bus, int target) | |
1893 | { | |
1894 | return dev->hba_map[bus][target].scan_counter == dev->scan_counter; | |
1895 | } | |
1896 | ||
1897 | static int aac_is_safw_target_valid(struct aac_dev *dev, int bus, int target) | |
1898 | { | |
1899 | if (is_safw_raid_volume(dev, bus, target)) | |
1900 | return dev->fsa_dev[target].valid; | |
1901 | else | |
1902 | return aac_is_safw_scan_count_equal(dev, bus, target); | |
1903 | } | |
6223a39f | 1904 | |
abbea901 RAR |
1905 | static int aac_is_safw_device_exposed(struct aac_dev *dev, int bus, int target) |
1906 | { | |
1907 | int is_exposed = 0; | |
1908 | struct scsi_device *sdev; | |
1909 | ||
1910 | sdev = aac_lookup_safw_scsi_device(dev, bus, target); | |
1911 | if (sdev) | |
1912 | is_exposed = 1; | |
1913 | aac_put_safw_scsi_device(sdev); | |
1914 | ||
1915 | return is_exposed; | |
1916 | } | |
1917 | ||
b960759a | 1918 | static int aac_update_safw_host_devices(struct aac_dev *dev) |
6223a39f | 1919 | { |
4d621cc3 | 1920 | int i; |
075b1062 RAR |
1921 | int bus; |
1922 | int target; | |
abbea901 | 1923 | int is_exposed = 0; |
075b1062 RAR |
1924 | int rcode = 0; |
1925 | ||
b960759a | 1926 | rcode = aac_setup_safw_adapter(dev); |
075b1062 RAR |
1927 | if (unlikely(rcode < 0)) { |
1928 | goto out; | |
1929 | } | |
6223a39f | 1930 | |
4d621cc3 | 1931 | for (i = 0; i < AAC_BUS_TARGET_LOOP; i++) { |
6223a39f | 1932 | |
4d621cc3 RAR |
1933 | bus = get_bus_number(i); |
1934 | target = get_target_number(i); | |
6223a39f | 1935 | |
abbea901 | 1936 | is_exposed = aac_is_safw_device_exposed(dev, bus, target); |
6223a39f | 1937 | |
abbea901 RAR |
1938 | if (aac_is_safw_target_valid(dev, bus, target) && !is_exposed) |
1939 | aac_add_safw_device(dev, bus, target); | |
1940 | else if (!aac_is_safw_target_valid(dev, bus, target) && | |
1941 | is_exposed) | |
1942 | aac_remove_safw_device(dev, bus, target); | |
6223a39f | 1943 | } |
075b1062 RAR |
1944 | out: |
1945 | return rcode; | |
6223a39f RAR |
1946 | } |
1947 | ||
b960759a | 1948 | static int aac_scan_safw_host(struct aac_dev *dev) |
4aa77253 RAR |
1949 | { |
1950 | int rcode = 0; | |
1951 | ||
b960759a | 1952 | rcode = aac_update_safw_host_devices(dev); |
4aa77253 RAR |
1953 | if (rcode) |
1954 | aac_schedule_safw_scan_worker(dev); | |
1955 | ||
1956 | return rcode; | |
1957 | } | |
1958 | ||
b960759a | 1959 | int aac_scan_host(struct aac_dev *dev) |
823a7dbc RAR |
1960 | { |
1961 | int rcode = 0; | |
1962 | ||
1963 | mutex_lock(&dev->scan_mutex); | |
1964 | if (dev->sa_firmware) | |
b960759a | 1965 | rcode = aac_scan_safw_host(dev); |
823a7dbc RAR |
1966 | else |
1967 | scsi_scan_host(dev->scsi_host_ptr); | |
1968 | mutex_unlock(&dev->scan_mutex); | |
4aa77253 | 1969 | |
823a7dbc RAR |
1970 | return rcode; |
1971 | } | |
1972 | ||
6223a39f RAR |
1973 | /** |
1974 | * aac_handle_sa_aif Handle a message from the firmware | |
1975 | * @dev: Which adapter this fib is from | |
1976 | * @fibptr: Pointer to fibptr from adapter | |
1977 | * | |
1978 | * This routine handles a driver notify fib from the adapter and | |
1979 | * dispatches it to the appropriate routine for handling. | |
1980 | */ | |
1981 | static void aac_handle_sa_aif(struct aac_dev *dev, struct fib *fibptr) | |
1982 | { | |
b772ea6d | 1983 | int i; |
6223a39f | 1984 | u32 events = 0; |
6223a39f RAR |
1985 | |
1986 | if (fibptr->hbacmd_size & SA_AIF_HOTPLUG) | |
1987 | events = SA_AIF_HOTPLUG; | |
1988 | else if (fibptr->hbacmd_size & SA_AIF_HARDWARE) | |
1989 | events = SA_AIF_HARDWARE; | |
1990 | else if (fibptr->hbacmd_size & SA_AIF_PDEV_CHANGE) | |
1991 | events = SA_AIF_PDEV_CHANGE; | |
1992 | else if (fibptr->hbacmd_size & SA_AIF_LDEV_CHANGE) | |
1993 | events = SA_AIF_LDEV_CHANGE; | |
1994 | else if (fibptr->hbacmd_size & SA_AIF_BPSTAT_CHANGE) | |
1995 | events = SA_AIF_BPSTAT_CHANGE; | |
1996 | else if (fibptr->hbacmd_size & SA_AIF_BPCFG_CHANGE) | |
1997 | events = SA_AIF_BPCFG_CHANGE; | |
1998 | ||
1999 | switch (events) { | |
2000 | case SA_AIF_HOTPLUG: | |
2001 | case SA_AIF_HARDWARE: | |
2002 | case SA_AIF_PDEV_CHANGE: | |
2003 | case SA_AIF_LDEV_CHANGE: | |
2004 | case SA_AIF_BPCFG_CHANGE: | |
2005 | ||
b960759a | 2006 | aac_scan_host(dev); |
823a7dbc | 2007 | |
6223a39f RAR |
2008 | break; |
2009 | ||
2010 | case SA_AIF_BPSTAT_CHANGE: | |
2011 | /* currently do nothing */ | |
2012 | break; | |
2013 | } | |
2014 | ||
2015 | for (i = 1; i <= 10; ++i) { | |
2016 | events = src_readl(dev, MUnit.IDR); | |
2017 | if (events & (1<<23)) { | |
2018 | pr_warn(" AIF not cleared by firmware - %d/%d)\n", | |
2019 | i, 10); | |
2020 | ssleep(1); | |
2021 | } | |
2022 | } | |
2023 | } | |
2024 | ||
113156bc RAR |
2025 | static int get_fib_count(struct aac_dev *dev) |
2026 | { | |
2027 | unsigned int num = 0; | |
2028 | struct list_head *entry; | |
2029 | unsigned long flagv; | |
2030 | ||
2031 | /* | |
2032 | * Warning: no sleep allowed while | |
2033 | * holding spinlock. We take the estimate | |
2034 | * and pre-allocate a set of fibs outside the | |
2035 | * lock. | |
2036 | */ | |
2037 | num = le32_to_cpu(dev->init->r7.adapter_fibs_size) | |
2038 | / sizeof(struct hw_fib); /* some extra */ | |
2039 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
2040 | entry = dev->fib_list.next; | |
2041 | while (entry != &dev->fib_list) { | |
2042 | entry = entry->next; | |
2043 | ++num; | |
2044 | } | |
2045 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
2046 | ||
2047 | return num; | |
2048 | } | |
2049 | ||
2050 | static int fillup_pools(struct aac_dev *dev, struct hw_fib **hw_fib_pool, | |
2051 | struct fib **fib_pool, | |
2052 | unsigned int num) | |
2053 | { | |
2054 | struct hw_fib **hw_fib_p; | |
2055 | struct fib **fib_p; | |
113156bc RAR |
2056 | |
2057 | hw_fib_p = hw_fib_pool; | |
2058 | fib_p = fib_pool; | |
2059 | while (hw_fib_p < &hw_fib_pool[num]) { | |
2060 | *(hw_fib_p) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL); | |
2061 | if (!(*(hw_fib_p++))) { | |
2062 | --hw_fib_p; | |
2063 | break; | |
2064 | } | |
2065 | ||
2066 | *(fib_p) = kmalloc(sizeof(struct fib), GFP_KERNEL); | |
2067 | if (!(*(fib_p++))) { | |
2068 | kfree(*(--hw_fib_p)); | |
2069 | break; | |
2070 | } | |
2071 | } | |
2072 | ||
e498520e RAR |
2073 | /* |
2074 | * Get the actual number of allocated fibs | |
2075 | */ | |
113156bc | 2076 | num = hw_fib_p - hw_fib_pool; |
e498520e | 2077 | return num; |
113156bc RAR |
2078 | } |
2079 | ||
2080 | static void wakeup_fibctx_threads(struct aac_dev *dev, | |
2081 | struct hw_fib **hw_fib_pool, | |
2082 | struct fib **fib_pool, | |
2083 | struct fib *fib, | |
2084 | struct hw_fib *hw_fib, | |
2085 | unsigned int num) | |
2086 | { | |
2087 | unsigned long flagv; | |
2088 | struct list_head *entry; | |
2089 | struct hw_fib **hw_fib_p; | |
2090 | struct fib **fib_p; | |
2091 | u32 time_now, time_last; | |
2092 | struct hw_fib *hw_newfib; | |
2093 | struct fib *newfib; | |
2094 | struct aac_fib_context *fibctx; | |
2095 | ||
2096 | time_now = jiffies/HZ; | |
2097 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
2098 | entry = dev->fib_list.next; | |
2099 | /* | |
2100 | * For each Context that is on the | |
2101 | * fibctxList, make a copy of the | |
2102 | * fib, and then set the event to wake up the | |
2103 | * thread that is waiting for it. | |
2104 | */ | |
2105 | ||
2106 | hw_fib_p = hw_fib_pool; | |
2107 | fib_p = fib_pool; | |
2108 | while (entry != &dev->fib_list) { | |
2109 | /* | |
2110 | * Extract the fibctx | |
2111 | */ | |
2112 | fibctx = list_entry(entry, struct aac_fib_context, | |
2113 | next); | |
2114 | /* | |
2115 | * Check if the queue is getting | |
2116 | * backlogged | |
2117 | */ | |
2118 | if (fibctx->count > 20) { | |
2119 | /* | |
2120 | * It's *not* jiffies folks, | |
2121 | * but jiffies / HZ so do not | |
2122 | * panic ... | |
2123 | */ | |
2124 | time_last = fibctx->jiffies; | |
2125 | /* | |
2126 | * Has it been > 2 minutes | |
2127 | * since the last read off | |
2128 | * the queue? | |
2129 | */ | |
2130 | if ((time_now - time_last) > aif_timeout) { | |
2131 | entry = entry->next; | |
2132 | aac_close_fib_context(dev, fibctx); | |
2133 | continue; | |
2134 | } | |
2135 | } | |
2136 | /* | |
2137 | * Warning: no sleep allowed while | |
2138 | * holding spinlock | |
2139 | */ | |
2140 | if (hw_fib_p >= &hw_fib_pool[num]) { | |
2141 | pr_warn("aifd: didn't allocate NewFib\n"); | |
2142 | entry = entry->next; | |
2143 | continue; | |
2144 | } | |
2145 | ||
2146 | hw_newfib = *hw_fib_p; | |
2147 | *(hw_fib_p++) = NULL; | |
2148 | newfib = *fib_p; | |
2149 | *(fib_p++) = NULL; | |
2150 | /* | |
2151 | * Make the copy of the FIB | |
2152 | */ | |
2153 | memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib)); | |
2154 | memcpy(newfib, fib, sizeof(struct fib)); | |
2155 | newfib->hw_fib_va = hw_newfib; | |
2156 | /* | |
2157 | * Put the FIB onto the | |
2158 | * fibctx's fibs | |
2159 | */ | |
2160 | list_add_tail(&newfib->fiblink, &fibctx->fib_list); | |
2161 | fibctx->count++; | |
2162 | /* | |
2163 | * Set the event to wake up the | |
2164 | * thread that is waiting. | |
2165 | */ | |
2166 | up(&fibctx->wait_sem); | |
2167 | ||
2168 | entry = entry->next; | |
2169 | } | |
2170 | /* | |
2171 | * Set the status of this FIB | |
2172 | */ | |
2173 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); | |
2174 | aac_fib_adapter_complete(fib, sizeof(u32)); | |
2175 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
2176 | ||
2177 | } | |
2178 | ||
2179 | static void aac_process_events(struct aac_dev *dev) | |
2180 | { | |
2181 | struct hw_fib *hw_fib; | |
2182 | struct fib *fib; | |
2183 | unsigned long flags; | |
2184 | spinlock_t *t_lock; | |
113156bc RAR |
2185 | |
2186 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2187 | spin_lock_irqsave(t_lock, flags); | |
2188 | ||
2189 | while (!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) { | |
2190 | struct list_head *entry; | |
2191 | struct aac_aifcmd *aifcmd; | |
2192 | unsigned int num; | |
2193 | struct hw_fib **hw_fib_pool, **hw_fib_p; | |
2194 | struct fib **fib_pool, **fib_p; | |
2195 | ||
2196 | set_current_state(TASK_RUNNING); | |
2197 | ||
2198 | entry = dev->queues->queue[HostNormCmdQueue].cmdq.next; | |
2199 | list_del(entry); | |
2200 | ||
2201 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2202 | spin_unlock_irqrestore(t_lock, flags); | |
2203 | ||
2204 | fib = list_entry(entry, struct fib, fiblink); | |
2205 | hw_fib = fib->hw_fib_va; | |
6223a39f RAR |
2206 | if (dev->sa_firmware) { |
2207 | /* Thor AIF */ | |
2208 | aac_handle_sa_aif(dev, fib); | |
2209 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); | |
d844752e | 2210 | goto free_fib; |
6223a39f | 2211 | } |
113156bc RAR |
2212 | /* |
2213 | * We will process the FIB here or pass it to a | |
2214 | * worker thread that is TBD. We Really can't | |
2215 | * do anything at this point since we don't have | |
2216 | * anything defined for this thread to do. | |
2217 | */ | |
2218 | memset(fib, 0, sizeof(struct fib)); | |
2219 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
2220 | fib->size = sizeof(struct fib); | |
2221 | fib->hw_fib_va = hw_fib; | |
2222 | fib->data = hw_fib->data; | |
2223 | fib->dev = dev; | |
2224 | /* | |
2225 | * We only handle AifRequest fibs from the adapter. | |
2226 | */ | |
2227 | ||
2228 | aifcmd = (struct aac_aifcmd *) hw_fib->data; | |
2229 | if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) { | |
2230 | /* Handle Driver Notify Events */ | |
2231 | aac_handle_aif(dev, fib); | |
2232 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); | |
2233 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); | |
2234 | goto free_fib; | |
2235 | } | |
2236 | /* | |
2237 | * The u32 here is important and intended. We are using | |
2238 | * 32bit wrapping time to fit the adapter field | |
2239 | */ | |
2240 | ||
2241 | /* Sniff events */ | |
2242 | if (aifcmd->command == cpu_to_le32(AifCmdEventNotify) | |
2243 | || aifcmd->command == cpu_to_le32(AifCmdJobProgress)) { | |
2244 | aac_handle_aif(dev, fib); | |
2245 | } | |
2246 | ||
2247 | /* | |
2248 | * get number of fibs to process | |
2249 | */ | |
2250 | num = get_fib_count(dev); | |
2251 | if (!num) | |
2252 | goto free_fib; | |
2253 | ||
2254 | hw_fib_pool = kmalloc_array(num, sizeof(struct hw_fib *), | |
2255 | GFP_KERNEL); | |
2256 | if (!hw_fib_pool) | |
2257 | goto free_fib; | |
2258 | ||
2259 | fib_pool = kmalloc_array(num, sizeof(struct fib *), GFP_KERNEL); | |
2260 | if (!fib_pool) | |
2261 | goto free_hw_fib_pool; | |
2262 | ||
2263 | /* | |
2264 | * Fill up fib pointer pools with actual fibs | |
2265 | * and hw_fibs | |
2266 | */ | |
e498520e RAR |
2267 | num = fillup_pools(dev, hw_fib_pool, fib_pool, num); |
2268 | if (!num) | |
113156bc RAR |
2269 | goto free_mem; |
2270 | ||
2271 | /* | |
2272 | * wakeup the thread that is waiting for | |
2273 | * the response from fw (ioctl) | |
2274 | */ | |
2275 | wakeup_fibctx_threads(dev, hw_fib_pool, fib_pool, | |
2276 | fib, hw_fib, num); | |
2277 | ||
2278 | free_mem: | |
2279 | /* Free up the remaining resources */ | |
2280 | hw_fib_p = hw_fib_pool; | |
2281 | fib_p = fib_pool; | |
2282 | while (hw_fib_p < &hw_fib_pool[num]) { | |
2283 | kfree(*hw_fib_p); | |
2284 | kfree(*fib_p); | |
2285 | ++fib_p; | |
2286 | ++hw_fib_p; | |
2287 | } | |
2288 | kfree(fib_pool); | |
2289 | free_hw_fib_pool: | |
2290 | kfree(hw_fib_pool); | |
2291 | free_fib: | |
2292 | kfree(fib); | |
2293 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2294 | spin_lock_irqsave(t_lock, flags); | |
2295 | } | |
2296 | /* | |
2297 | * There are no more AIF's | |
2298 | */ | |
2299 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2300 | spin_unlock_irqrestore(t_lock, flags); | |
2301 | } | |
8c867b25 | 2302 | |
3d77d840 RAR |
2303 | static int aac_send_wellness_command(struct aac_dev *dev, char *wellness_str, |
2304 | u32 datasize) | |
2305 | { | |
2306 | struct aac_srb *srbcmd; | |
2307 | struct sgmap64 *sg64; | |
2308 | dma_addr_t addr; | |
2309 | char *dma_buf; | |
2310 | struct fib *fibptr; | |
2311 | int ret = -ENOMEM; | |
2312 | u32 vbus, vid; | |
2313 | ||
2314 | fibptr = aac_fib_alloc(dev); | |
2315 | if (!fibptr) | |
2316 | goto out; | |
2317 | ||
f481973d MR |
2318 | dma_buf = dma_alloc_coherent(&dev->pdev->dev, datasize, &addr, |
2319 | GFP_KERNEL); | |
3d77d840 RAR |
2320 | if (!dma_buf) |
2321 | goto fib_free_out; | |
2322 | ||
2323 | aac_fib_init(fibptr); | |
2324 | ||
1c68856e RAR |
2325 | vbus = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_bus); |
2326 | vid = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_target); | |
3d77d840 RAR |
2327 | |
2328 | srbcmd = (struct aac_srb *)fib_data(fibptr); | |
2329 | ||
2330 | srbcmd->function = cpu_to_le32(SRBF_ExecuteScsi); | |
2331 | srbcmd->channel = cpu_to_le32(vbus); | |
2332 | srbcmd->id = cpu_to_le32(vid); | |
2333 | srbcmd->lun = 0; | |
2334 | srbcmd->flags = cpu_to_le32(SRB_DataOut); | |
2335 | srbcmd->timeout = cpu_to_le32(10); | |
2336 | srbcmd->retry_limit = 0; | |
2337 | srbcmd->cdb_size = cpu_to_le32(12); | |
2338 | srbcmd->count = cpu_to_le32(datasize); | |
2339 | ||
2340 | memset(srbcmd->cdb, 0, sizeof(srbcmd->cdb)); | |
2341 | srbcmd->cdb[0] = BMIC_OUT; | |
2342 | srbcmd->cdb[6] = WRITE_HOST_WELLNESS; | |
2343 | memcpy(dma_buf, (char *)wellness_str, datasize); | |
2344 | ||
2345 | sg64 = (struct sgmap64 *)&srbcmd->sg; | |
2346 | sg64->count = cpu_to_le32(1); | |
2347 | sg64->sg[0].addr[1] = cpu_to_le32((u32)(((addr) >> 16) >> 16)); | |
2348 | sg64->sg[0].addr[0] = cpu_to_le32((u32)(addr & 0xffffffff)); | |
2349 | sg64->sg[0].count = cpu_to_le32(datasize); | |
2350 | ||
2351 | ret = aac_fib_send(ScsiPortCommand64, fibptr, sizeof(struct aac_srb), | |
2352 | FsaNormal, 1, 1, NULL, NULL); | |
2353 | ||
f481973d | 2354 | dma_free_coherent(&dev->pdev->dev, datasize, dma_buf, addr); |
3d77d840 RAR |
2355 | |
2356 | /* | |
2357 | * Do not set XferState to zero unless | |
2358 | * receives a response from F/W | |
2359 | */ | |
2360 | if (ret >= 0) | |
2361 | aac_fib_complete(fibptr); | |
2362 | ||
2363 | /* | |
2364 | * FIB should be freed only after | |
2365 | * getting the response from the F/W | |
2366 | */ | |
2367 | if (ret != -ERESTARTSYS) | |
2368 | goto fib_free_out; | |
2369 | ||
2370 | out: | |
2371 | return ret; | |
2372 | fib_free_out: | |
2373 | aac_fib_free(fibptr); | |
2374 | goto out; | |
2375 | } | |
2376 | ||
820f1886 | 2377 | int aac_send_safw_hostttime(struct aac_dev *dev, struct timespec64 *now) |
3d77d840 RAR |
2378 | { |
2379 | struct tm cur_tm; | |
2380 | char wellness_str[] = "<HW>TD\010\0\0\0\0\0\0\0\0\0DW\0\0ZZ"; | |
2381 | u32 datasize = sizeof(wellness_str); | |
820f1886 | 2382 | time64_t local_time; |
3d77d840 RAR |
2383 | int ret = -ENODEV; |
2384 | ||
2385 | if (!dev->sa_firmware) | |
2386 | goto out; | |
2387 | ||
820f1886 AB |
2388 | local_time = (now->tv_sec - (sys_tz.tz_minuteswest * 60)); |
2389 | time64_to_tm(local_time, 0, &cur_tm); | |
3d77d840 RAR |
2390 | cur_tm.tm_mon += 1; |
2391 | cur_tm.tm_year += 1900; | |
2392 | wellness_str[8] = bin2bcd(cur_tm.tm_hour); | |
2393 | wellness_str[9] = bin2bcd(cur_tm.tm_min); | |
2394 | wellness_str[10] = bin2bcd(cur_tm.tm_sec); | |
2395 | wellness_str[12] = bin2bcd(cur_tm.tm_mon); | |
2396 | wellness_str[13] = bin2bcd(cur_tm.tm_mday); | |
2397 | wellness_str[14] = bin2bcd(cur_tm.tm_year / 100); | |
2398 | wellness_str[15] = bin2bcd(cur_tm.tm_year % 100); | |
2399 | ||
2400 | ret = aac_send_wellness_command(dev, wellness_str, datasize); | |
2401 | ||
2402 | out: | |
2403 | return ret; | |
2404 | } | |
2405 | ||
820f1886 | 2406 | int aac_send_hosttime(struct aac_dev *dev, struct timespec64 *now) |
3d77d840 RAR |
2407 | { |
2408 | int ret = -ENOMEM; | |
2409 | struct fib *fibptr; | |
2410 | __le32 *info; | |
2411 | ||
2412 | fibptr = aac_fib_alloc(dev); | |
2413 | if (!fibptr) | |
2414 | goto out; | |
2415 | ||
2416 | aac_fib_init(fibptr); | |
2417 | info = (__le32 *)fib_data(fibptr); | |
820f1886 | 2418 | *info = cpu_to_le32(now->tv_sec); /* overflow in y2106 */ |
3d77d840 RAR |
2419 | ret = aac_fib_send(SendHostTime, fibptr, sizeof(*info), FsaNormal, |
2420 | 1, 1, NULL, NULL); | |
2421 | ||
2422 | /* | |
2423 | * Do not set XferState to zero unless | |
2424 | * receives a response from F/W | |
2425 | */ | |
2426 | if (ret >= 0) | |
2427 | aac_fib_complete(fibptr); | |
2428 | ||
2429 | /* | |
2430 | * FIB should be freed only after | |
2431 | * getting the response from the F/W | |
2432 | */ | |
2433 | if (ret != -ERESTARTSYS) | |
2434 | aac_fib_free(fibptr); | |
2435 | ||
2436 | out: | |
2437 | return ret; | |
2438 | } | |
2439 | ||
1da177e4 LT |
2440 | /** |
2441 | * aac_command_thread - command processing thread | |
2442 | * @dev: Adapter to monitor | |
2443 | * | |
2444 | * Waits on the commandready event in it's queue. When the event gets set | |
2445 | * it will pull FIBs off it's queue. It will continue to pull FIBs off | |
2446 | * until the queue is empty. When the queue is empty it will wait for | |
2447 | * more FIBs. | |
2448 | */ | |
8ce3eca4 | 2449 | |
fe27381d | 2450 | int aac_command_thread(void *data) |
1da177e4 | 2451 | { |
fe27381d | 2452 | struct aac_dev *dev = data; |
1da177e4 | 2453 | DECLARE_WAITQUEUE(wait, current); |
29c97684 SM |
2454 | unsigned long next_jiffies = jiffies + HZ; |
2455 | unsigned long next_check_jiffies = next_jiffies; | |
2456 | long difference = HZ; | |
1da177e4 LT |
2457 | |
2458 | /* | |
2459 | * We can only have one thread per adapter for AIF's. | |
2460 | */ | |
2461 | if (dev->aif_thread) | |
2462 | return -EINVAL; | |
fe27381d | 2463 | |
1da177e4 LT |
2464 | /* |
2465 | * Let the DPC know it has a place to send the AIF's to. | |
2466 | */ | |
2467 | dev->aif_thread = 1; | |
2f130980 | 2468 | add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); |
1da177e4 | 2469 | set_current_state(TASK_INTERRUPTIBLE); |
2f130980 | 2470 | dprintk ((KERN_INFO "aac_command_thread start\n")); |
8ce3eca4 | 2471 | while (1) { |
1da177e4 | 2472 | |
113156bc | 2473 | aac_process_events(dev); |
29c97684 SM |
2474 | |
2475 | /* | |
2476 | * Background activity | |
2477 | */ | |
2478 | if ((time_before(next_check_jiffies,next_jiffies)) | |
2479 | && ((difference = next_check_jiffies - jiffies) <= 0)) { | |
2480 | next_check_jiffies = next_jiffies; | |
9473ddb2 | 2481 | if (aac_adapter_check_health(dev) == 0) { |
29c97684 SM |
2482 | difference = ((long)(unsigned)check_interval) |
2483 | * HZ; | |
2484 | next_check_jiffies = jiffies + difference; | |
2485 | } else if (!dev->queues) | |
2486 | break; | |
2487 | } | |
2488 | if (!time_before(next_check_jiffies,next_jiffies) | |
2489 | && ((difference = next_jiffies - jiffies) <= 0)) { | |
820f1886 | 2490 | struct timespec64 now; |
29c97684 SM |
2491 | int ret; |
2492 | ||
2493 | /* Don't even try to talk to adapter if its sick */ | |
9473ddb2 | 2494 | ret = aac_adapter_check_health(dev); |
849ac6a5 | 2495 | if (ret || !dev->queues) |
29c97684 SM |
2496 | break; |
2497 | next_check_jiffies = jiffies | |
2498 | + ((long)(unsigned)check_interval) | |
2499 | * HZ; | |
820f1886 | 2500 | ktime_get_real_ts64(&now); |
29c97684 SM |
2501 | |
2502 | /* Synchronize our watches */ | |
820f1886 AB |
2503 | if (((NSEC_PER_SEC - (NSEC_PER_SEC / HZ)) > now.tv_nsec) |
2504 | && (now.tv_nsec > (NSEC_PER_SEC / HZ))) | |
d1853975 AB |
2505 | difference = HZ + HZ / 2 - |
2506 | now.tv_nsec / (NSEC_PER_SEC / HZ); | |
fbdab3e7 | 2507 | else { |
820f1886 | 2508 | if (now.tv_nsec > NSEC_PER_SEC / 2) |
3d77d840 RAR |
2509 | ++now.tv_sec; |
2510 | ||
2511 | if (dev->sa_firmware) | |
2512 | ret = | |
2513 | aac_send_safw_hostttime(dev, &now); | |
2514 | else | |
2515 | ret = aac_send_hosttime(dev, &now); | |
2516 | ||
29c97684 | 2517 | difference = (long)(unsigned)update_interval*HZ; |
29c97684 SM |
2518 | } |
2519 | next_jiffies = jiffies + difference; | |
2520 | if (time_before(next_check_jiffies,next_jiffies)) | |
2521 | difference = next_check_jiffies - jiffies; | |
2522 | } | |
2523 | if (difference <= 0) | |
2524 | difference = 1; | |
2525 | set_current_state(TASK_INTERRUPTIBLE); | |
fc4bf75e RAR |
2526 | |
2527 | if (kthread_should_stop()) | |
2528 | break; | |
2529 | ||
d1853975 AB |
2530 | /* |
2531 | * we probably want usleep_range() here instead of the | |
2532 | * jiffies computation | |
2533 | */ | |
29c97684 | 2534 | schedule_timeout(difference); |
1da177e4 | 2535 | |
fe27381d | 2536 | if (kthread_should_stop()) |
1da177e4 | 2537 | break; |
1da177e4 | 2538 | } |
2f130980 MH |
2539 | if (dev->queues) |
2540 | remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); | |
1da177e4 | 2541 | dev->aif_thread = 0; |
2f130980 | 2542 | return 0; |
1da177e4 | 2543 | } |
8b1462e0 MR |
2544 | |
2545 | int aac_acquire_irq(struct aac_dev *dev) | |
2546 | { | |
2547 | int i; | |
2548 | int j; | |
2549 | int ret = 0; | |
8b1462e0 | 2550 | |
8b1462e0 MR |
2551 | if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) { |
2552 | for (i = 0; i < dev->max_msix; i++) { | |
2553 | dev->aac_msix[i].vector_no = i; | |
2554 | dev->aac_msix[i].dev = dev; | |
0910d8bb | 2555 | if (request_irq(pci_irq_vector(dev->pdev, i), |
8b1462e0 MR |
2556 | dev->a_ops.adapter_intr, |
2557 | 0, "aacraid", &(dev->aac_msix[i]))) { | |
2558 | printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n", | |
2559 | dev->name, dev->id, i); | |
2560 | for (j = 0 ; j < i ; j++) | |
0910d8bb | 2561 | free_irq(pci_irq_vector(dev->pdev, j), |
8b1462e0 MR |
2562 | &(dev->aac_msix[j])); |
2563 | pci_disable_msix(dev->pdev); | |
2564 | ret = -1; | |
2565 | } | |
8b1462e0 MR |
2566 | } |
2567 | } else { | |
2568 | dev->aac_msix[0].vector_no = 0; | |
2569 | dev->aac_msix[0].dev = dev; | |
2570 | ||
2571 | if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, | |
2572 | IRQF_SHARED, "aacraid", | |
2573 | &(dev->aac_msix[0])) < 0) { | |
2574 | if (dev->msi) | |
2575 | pci_disable_msi(dev->pdev); | |
2576 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", | |
2577 | dev->name, dev->id); | |
2578 | ret = -1; | |
2579 | } | |
2580 | } | |
2581 | return ret; | |
2582 | } | |
2583 | ||
2584 | void aac_free_irq(struct aac_dev *dev) | |
2585 | { | |
2586 | int i; | |
2587 | int cpu; | |
2588 | ||
2589 | cpu = cpumask_first(cpu_online_mask); | |
395e5df7 | 2590 | if (aac_is_src(dev)) { |
8b1462e0 | 2591 | if (dev->max_msix > 1) { |
0910d8bb HR |
2592 | for (i = 0; i < dev->max_msix; i++) |
2593 | free_irq(pci_irq_vector(dev->pdev, i), | |
2594 | &(dev->aac_msix[i])); | |
8b1462e0 MR |
2595 | } else { |
2596 | free_irq(dev->pdev->irq, &(dev->aac_msix[0])); | |
2597 | } | |
2598 | } else { | |
2599 | free_irq(dev->pdev->irq, dev); | |
2600 | } | |
2601 | if (dev->msi) | |
2602 | pci_disable_msi(dev->pdev); | |
2603 | else if (dev->max_msix > 1) | |
2604 | pci_disable_msix(dev->pdev); | |
2605 | } |