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1da177e4 LT |
1 | /* |
2 | * Adaptec AAC series RAID controller driver | |
fa195afe | 3 | * (c) Copyright 2001 Red Hat Inc. |
1da177e4 LT |
4 | * |
5 | * based on the old aacraid driver that is.. | |
6 | * Adaptec aacraid device driver for Linux. | |
7 | * | |
e8b12f0f MR |
8 | * Copyright (c) 2000-2010 Adaptec, Inc. |
9 | * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) | |
1da177e4 LT |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2, or (at your option) | |
14 | * any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; see the file COPYING. If not, write to | |
23 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | * | |
25 | * Module Name: | |
26 | * commsup.c | |
27 | * | |
28 | * Abstract: Contain all routines that are required for FSA host/adapter | |
7c00ffa3 | 29 | * communication. |
1da177e4 LT |
30 | * |
31 | */ | |
32 | ||
33 | #include <linux/kernel.h> | |
34 | #include <linux/init.h> | |
35 | #include <linux/types.h> | |
36 | #include <linux/sched.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/spinlock.h> | |
39 | #include <linux/slab.h> | |
40 | #include <linux/completion.h> | |
41 | #include <linux/blkdev.h> | |
164006da | 42 | #include <linux/delay.h> |
fe27381d | 43 | #include <linux/kthread.h> |
6a3670c4 | 44 | #include <linux/interrupt.h> |
6188e10d | 45 | #include <linux/semaphore.h> |
abd03305 | 46 | #include <linux/bcd.h> |
8c867b25 | 47 | #include <scsi/scsi.h> |
7c00ffa3 | 48 | #include <scsi/scsi_host.h> |
131256cf | 49 | #include <scsi/scsi_device.h> |
8c867b25 | 50 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
51 | |
52 | #include "aacraid.h" | |
53 | ||
54 | /** | |
55 | * fib_map_alloc - allocate the fib objects | |
56 | * @dev: Adapter to allocate for | |
57 | * | |
58 | * Allocate and map the shared PCI space for the FIB blocks used to | |
59 | * talk to the Adaptec firmware. | |
60 | */ | |
8ce3eca4 | 61 | |
1da177e4 LT |
62 | static int fib_map_alloc(struct aac_dev *dev) |
63 | { | |
932cc3d3 RAR |
64 | if (dev->max_fib_size > AAC_MAX_NATIVE_SIZE) |
65 | dev->max_cmd_size = AAC_MAX_NATIVE_SIZE; | |
66 | else | |
67 | dev->max_cmd_size = dev->max_fib_size; | |
68 | ||
7c00ffa3 MH |
69 | dprintk((KERN_INFO |
70 | "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n", | |
932cc3d3 | 71 | dev->pdev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue, |
7c00ffa3 | 72 | AAC_NUM_MGT_FIB, &dev->hw_fib_pa)); |
e8b12f0f | 73 | dev->hw_fib_va = pci_alloc_consistent(dev->pdev, |
932cc3d3 | 74 | (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)) |
e8b12f0f MR |
75 | * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1), |
76 | &dev->hw_fib_pa); | |
77 | if (dev->hw_fib_va == NULL) | |
1da177e4 LT |
78 | return -ENOMEM; |
79 | return 0; | |
80 | } | |
81 | ||
82 | /** | |
bfb35aa8 | 83 | * aac_fib_map_free - free the fib objects |
1da177e4 LT |
84 | * @dev: Adapter to free |
85 | * | |
86 | * Free the PCI mappings and the memory allocated for FIB blocks | |
87 | * on this adapter. | |
88 | */ | |
89 | ||
bfb35aa8 | 90 | void aac_fib_map_free(struct aac_dev *dev) |
1da177e4 | 91 | { |
932cc3d3 | 92 | if (dev->hw_fib_va && dev->max_cmd_size) { |
f88fa79a | 93 | pci_free_consistent(dev->pdev, |
932cc3d3 | 94 | (dev->max_cmd_size * |
f88fa79a RAR |
95 | (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)), |
96 | dev->hw_fib_va, dev->hw_fib_pa); | |
97 | } | |
9ad5204d SM |
98 | dev->hw_fib_va = NULL; |
99 | dev->hw_fib_pa = 0; | |
1da177e4 LT |
100 | } |
101 | ||
3f4ce057 RAR |
102 | void aac_fib_vector_assign(struct aac_dev *dev) |
103 | { | |
104 | u32 i = 0; | |
105 | u32 vector = 1; | |
106 | struct fib *fibptr = NULL; | |
107 | ||
108 | for (i = 0, fibptr = &dev->fibs[i]; | |
109 | i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); | |
110 | i++, fibptr++) { | |
111 | if ((dev->max_msix == 1) || | |
112 | (i > ((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1) | |
113 | - dev->vector_cap))) { | |
114 | fibptr->vector_no = 0; | |
115 | } else { | |
116 | fibptr->vector_no = vector; | |
117 | vector++; | |
118 | if (vector == dev->max_msix) | |
119 | vector = 1; | |
120 | } | |
121 | } | |
122 | } | |
123 | ||
1da177e4 | 124 | /** |
bfb35aa8 | 125 | * aac_fib_setup - setup the fibs |
1da177e4 LT |
126 | * @dev: Adapter to set up |
127 | * | |
b595076a | 128 | * Allocate the PCI space for the fibs, map it and then initialise the |
1da177e4 LT |
129 | * fib area, the unmapped fib data and also the free list |
130 | */ | |
131 | ||
bfb35aa8 | 132 | int aac_fib_setup(struct aac_dev * dev) |
1da177e4 LT |
133 | { |
134 | struct fib *fibptr; | |
a8166a52 | 135 | struct hw_fib *hw_fib; |
1da177e4 LT |
136 | dma_addr_t hw_fib_pa; |
137 | int i; | |
a1751cda | 138 | u32 max_cmds; |
7c00ffa3 MH |
139 | |
140 | while (((i = fib_map_alloc(dev)) == -ENOMEM) | |
141 | && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) { | |
a1751cda RAR |
142 | max_cmds = (dev->scsi_host_ptr->can_queue+AAC_NUM_MGT_FIB) >> 1; |
143 | dev->scsi_host_ptr->can_queue = max_cmds - AAC_NUM_MGT_FIB; | |
144 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) | |
145 | dev->init->r7.max_io_commands = cpu_to_le32(max_cmds); | |
7c00ffa3 MH |
146 | } |
147 | if (i<0) | |
1da177e4 | 148 | return -ENOMEM; |
8ce3eca4 | 149 | |
e8b12f0f MR |
150 | /* 32 byte alignment for PMC */ |
151 | hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1); | |
152 | dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va + | |
153 | (hw_fib_pa - dev->hw_fib_pa)); | |
154 | dev->hw_fib_pa = hw_fib_pa; | |
155 | memset(dev->hw_fib_va, 0, | |
156 | (dev->max_fib_size + sizeof(struct aac_fib_xporthdr)) * | |
157 | (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)); | |
158 | ||
159 | /* add Xport header */ | |
160 | dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va + | |
161 | sizeof(struct aac_fib_xporthdr)); | |
162 | dev->hw_fib_pa += sizeof(struct aac_fib_xporthdr); | |
163 | ||
a8166a52 | 164 | hw_fib = dev->hw_fib_va; |
1da177e4 | 165 | hw_fib_pa = dev->hw_fib_pa; |
1da177e4 LT |
166 | /* |
167 | * Initialise the fibs | |
168 | */ | |
8ce3eca4 SM |
169 | for (i = 0, fibptr = &dev->fibs[i]; |
170 | i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); | |
171 | i++, fibptr++) | |
1da177e4 | 172 | { |
85d22bbf | 173 | fibptr->flags = 0; |
6bf3b630 | 174 | fibptr->size = sizeof(struct fib); |
1da177e4 | 175 | fibptr->dev = dev; |
a8166a52 MH |
176 | fibptr->hw_fib_va = hw_fib; |
177 | fibptr->data = (void *) fibptr->hw_fib_va->data; | |
1da177e4 | 178 | fibptr->next = fibptr+1; /* Forward chain the fibs */ |
6de76cfc | 179 | sema_init(&fibptr->event_wait, 0); |
1da177e4 | 180 | spin_lock_init(&fibptr->event_lock); |
a8166a52 MH |
181 | hw_fib->header.XferState = cpu_to_le32(0xffffffff); |
182 | hw_fib->header.SenderSize = cpu_to_le16(dev->max_fib_size); | |
1da177e4 | 183 | fibptr->hw_fib_pa = hw_fib_pa; |
e8b12f0f | 184 | hw_fib = (struct hw_fib *)((unsigned char *)hw_fib + |
932cc3d3 | 185 | dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)); |
e8b12f0f | 186 | hw_fib_pa = hw_fib_pa + |
932cc3d3 | 187 | dev->max_cmd_size + sizeof(struct aac_fib_xporthdr); |
1da177e4 | 188 | } |
3f4ce057 RAR |
189 | |
190 | /* | |
191 | *Assign vector numbers to fibs | |
192 | */ | |
193 | aac_fib_vector_assign(dev); | |
194 | ||
1da177e4 LT |
195 | /* |
196 | * Add the fib chain to the free list | |
197 | */ | |
7c00ffa3 | 198 | dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL; |
1da177e4 | 199 | /* |
6bf3b630 RAR |
200 | * Set 8 fibs aside for management tools |
201 | */ | |
202 | dev->free_fib = &dev->fibs[dev->scsi_host_ptr->can_queue]; | |
1da177e4 LT |
203 | return 0; |
204 | } | |
205 | ||
6bf3b630 RAR |
206 | /** |
207 | * aac_fib_alloc_tag-allocate a fib using tags | |
208 | * @dev: Adapter to allocate the fib for | |
209 | * | |
210 | * Allocate a fib from the adapter fib pool using tags | |
211 | * from the blk layer. | |
212 | */ | |
213 | ||
214 | struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd) | |
215 | { | |
216 | struct fib *fibptr; | |
217 | ||
218 | fibptr = &dev->fibs[scmd->request->tag]; | |
219 | /* | |
220 | * Null out fields that depend on being zero at the start of | |
221 | * each I/O | |
222 | */ | |
223 | fibptr->hw_fib_va->header.XferState = 0; | |
224 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
225 | fibptr->callback_data = NULL; | |
226 | fibptr->callback = NULL; | |
227 | ||
228 | return fibptr; | |
229 | } | |
230 | ||
1da177e4 | 231 | /** |
bfb35aa8 | 232 | * aac_fib_alloc - allocate a fib |
1da177e4 LT |
233 | * @dev: Adapter to allocate the fib for |
234 | * | |
235 | * Allocate a fib from the adapter fib pool. If the pool is empty we | |
7c00ffa3 | 236 | * return NULL. |
1da177e4 | 237 | */ |
8ce3eca4 | 238 | |
bfb35aa8 | 239 | struct fib *aac_fib_alloc(struct aac_dev *dev) |
1da177e4 LT |
240 | { |
241 | struct fib * fibptr; | |
242 | unsigned long flags; | |
243 | spin_lock_irqsave(&dev->fib_lock, flags); | |
8ce3eca4 | 244 | fibptr = dev->free_fib; |
7c00ffa3 MH |
245 | if(!fibptr){ |
246 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
247 | return fibptr; | |
248 | } | |
1da177e4 LT |
249 | dev->free_fib = fibptr->next; |
250 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
251 | /* | |
252 | * Set the proper node type code and node byte size | |
253 | */ | |
254 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
255 | fibptr->size = sizeof(struct fib); | |
256 | /* | |
257 | * Null out fields that depend on being zero at the start of | |
258 | * each I/O | |
259 | */ | |
a8166a52 | 260 | fibptr->hw_fib_va->header.XferState = 0; |
b6ef70f3 | 261 | fibptr->flags = 0; |
1da177e4 LT |
262 | fibptr->callback = NULL; |
263 | fibptr->callback_data = NULL; | |
264 | ||
265 | return fibptr; | |
266 | } | |
267 | ||
268 | /** | |
bfb35aa8 | 269 | * aac_fib_free - free a fib |
1da177e4 LT |
270 | * @fibptr: fib to free up |
271 | * | |
272 | * Frees up a fib and places it on the appropriate queue | |
1da177e4 | 273 | */ |
8ce3eca4 | 274 | |
bfb35aa8 | 275 | void aac_fib_free(struct fib *fibptr) |
1da177e4 | 276 | { |
ef616233 | 277 | unsigned long flags; |
cacb6dc3 | 278 | |
ef616233 | 279 | if (fibptr->done == 2) |
cacb6dc3 | 280 | return; |
1da177e4 LT |
281 | |
282 | spin_lock_irqsave(&fibptr->dev->fib_lock, flags); | |
03d44337 | 283 | if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 284 | aac_config.fib_timeouts++; |
03d44337 MH |
285 | if (fibptr->hw_fib_va->header.XferState != 0) { |
286 | printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n", | |
287 | (void*)fibptr, | |
288 | le32_to_cpu(fibptr->hw_fib_va->header.XferState)); | |
289 | } | |
290 | fibptr->next = fibptr->dev->free_fib; | |
291 | fibptr->dev->free_fib = fibptr; | |
1da177e4 LT |
292 | spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags); |
293 | } | |
294 | ||
295 | /** | |
bfb35aa8 | 296 | * aac_fib_init - initialise a fib |
1da177e4 | 297 | * @fibptr: The fib to initialize |
8ce3eca4 | 298 | * |
1da177e4 LT |
299 | * Set up the generic fib fields ready for use |
300 | */ | |
8ce3eca4 | 301 | |
bfb35aa8 | 302 | void aac_fib_init(struct fib *fibptr) |
1da177e4 | 303 | { |
a8166a52 | 304 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
1da177e4 | 305 | |
85d22bbf | 306 | memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr)); |
1da177e4 | 307 | hw_fib->header.StructType = FIB_MAGIC; |
7c00ffa3 MH |
308 | hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size); |
309 | hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable); | |
85d22bbf | 310 | hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa); |
7c00ffa3 | 311 | hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size); |
1da177e4 LT |
312 | } |
313 | ||
314 | /** | |
315 | * fib_deallocate - deallocate a fib | |
316 | * @fibptr: fib to deallocate | |
317 | * | |
318 | * Will deallocate and return to the free pool the FIB pointed to by the | |
319 | * caller. | |
320 | */ | |
8ce3eca4 | 321 | |
4833869e | 322 | static void fib_dealloc(struct fib * fibptr) |
1da177e4 | 323 | { |
a8166a52 | 324 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
8ce3eca4 | 325 | hw_fib->header.XferState = 0; |
1da177e4 LT |
326 | } |
327 | ||
328 | /* | |
329 | * Commuication primitives define and support the queuing method we use to | |
330 | * support host to adapter commuication. All queue accesses happen through | |
331 | * these routines and are the only routines which have a knowledge of the | |
332 | * how these queues are implemented. | |
333 | */ | |
8ce3eca4 | 334 | |
1da177e4 LT |
335 | /** |
336 | * aac_get_entry - get a queue entry | |
337 | * @dev: Adapter | |
338 | * @qid: Queue Number | |
339 | * @entry: Entry return | |
340 | * @index: Index return | |
341 | * @nonotify: notification control | |
342 | * | |
343 | * With a priority the routine returns a queue entry if the queue has free entries. If the queue | |
344 | * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is | |
345 | * returned. | |
346 | */ | |
8ce3eca4 | 347 | |
1da177e4 LT |
348 | static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify) |
349 | { | |
350 | struct aac_queue * q; | |
bed30de4 | 351 | unsigned long idx; |
1da177e4 LT |
352 | |
353 | /* | |
354 | * All of the queues wrap when they reach the end, so we check | |
355 | * to see if they have reached the end and if they have we just | |
356 | * set the index back to zero. This is a wrap. You could or off | |
357 | * the high bits in all updates but this is a bit faster I think. | |
358 | */ | |
359 | ||
360 | q = &dev->queues->queue[qid]; | |
bed30de4 MH |
361 | |
362 | idx = *index = le32_to_cpu(*(q->headers.producer)); | |
363 | /* Interrupt Moderation, only interrupt for first two entries */ | |
364 | if (idx != le32_to_cpu(*(q->headers.consumer))) { | |
365 | if (--idx == 0) { | |
1640a2c3 | 366 | if (qid == AdapNormCmdQueue) |
bed30de4 | 367 | idx = ADAP_NORM_CMD_ENTRIES; |
1640a2c3 | 368 | else |
bed30de4 MH |
369 | idx = ADAP_NORM_RESP_ENTRIES; |
370 | } | |
371 | if (idx != le32_to_cpu(*(q->headers.consumer))) | |
8ce3eca4 | 372 | *nonotify = 1; |
bed30de4 | 373 | } |
1da177e4 | 374 | |
1640a2c3 | 375 | if (qid == AdapNormCmdQueue) { |
8ce3eca4 | 376 | if (*index >= ADAP_NORM_CMD_ENTRIES) |
1da177e4 | 377 | *index = 0; /* Wrap to front of the Producer Queue. */ |
1640a2c3 | 378 | } else { |
8ce3eca4 | 379 | if (*index >= ADAP_NORM_RESP_ENTRIES) |
1da177e4 LT |
380 | *index = 0; /* Wrap to front of the Producer Queue. */ |
381 | } | |
1da177e4 | 382 | |
8ce3eca4 SM |
383 | /* Queue is full */ |
384 | if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { | |
7c00ffa3 | 385 | printk(KERN_WARNING "Queue %d full, %u outstanding.\n", |
ef616233 | 386 | qid, atomic_read(&q->numpending)); |
1da177e4 LT |
387 | return 0; |
388 | } else { | |
8ce3eca4 | 389 | *entry = q->base + *index; |
1da177e4 LT |
390 | return 1; |
391 | } | |
8ce3eca4 | 392 | } |
1da177e4 LT |
393 | |
394 | /** | |
395 | * aac_queue_get - get the next free QE | |
396 | * @dev: Adapter | |
397 | * @index: Returned index | |
398 | * @priority: Priority of fib | |
399 | * @fib: Fib to associate with the queue entry | |
400 | * @wait: Wait if queue full | |
401 | * @fibptr: Driver fib object to go with fib | |
402 | * @nonotify: Don't notify the adapter | |
403 | * | |
404 | * Gets the next free QE off the requested priorty adapter command | |
405 | * queue and associates the Fib with the QE. The QE represented by | |
406 | * index is ready to insert on the queue when this routine returns | |
407 | * success. | |
408 | */ | |
409 | ||
28713324 | 410 | int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify) |
1da177e4 LT |
411 | { |
412 | struct aac_entry * entry = NULL; | |
413 | int map = 0; | |
8ce3eca4 | 414 | |
1640a2c3 | 415 | if (qid == AdapNormCmdQueue) { |
1da177e4 | 416 | /* if no entries wait for some if caller wants to */ |
8ce3eca4 | 417 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) { |
1da177e4 LT |
418 | printk(KERN_ERR "GetEntries failed\n"); |
419 | } | |
8ce3eca4 SM |
420 | /* |
421 | * Setup queue entry with a command, status and fib mapped | |
422 | */ | |
423 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
424 | map = 1; | |
1640a2c3 | 425 | } else { |
8ce3eca4 | 426 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) { |
1da177e4 LT |
427 | /* if no entries wait for some if caller wants to */ |
428 | } | |
8ce3eca4 SM |
429 | /* |
430 | * Setup queue entry with command, status and fib mapped | |
431 | */ | |
432 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
433 | entry->addr = hw_fib->header.SenderFibAddress; | |
434 | /* Restore adapters pointer to the FIB */ | |
85d22bbf | 435 | hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */ |
8ce3eca4 | 436 | map = 0; |
1da177e4 LT |
437 | } |
438 | /* | |
439 | * If MapFib is true than we need to map the Fib and put pointers | |
440 | * in the queue entry. | |
441 | */ | |
442 | if (map) | |
443 | entry->addr = cpu_to_le32(fibptr->hw_fib_pa); | |
444 | return 0; | |
445 | } | |
446 | ||
1da177e4 | 447 | /* |
8ce3eca4 SM |
448 | * Define the highest level of host to adapter communication routines. |
449 | * These routines will support host to adapter FS commuication. These | |
1da177e4 LT |
450 | * routines have no knowledge of the commuication method used. This level |
451 | * sends and receives FIBs. This level has no knowledge of how these FIBs | |
452 | * get passed back and forth. | |
453 | */ | |
454 | ||
455 | /** | |
bfb35aa8 | 456 | * aac_fib_send - send a fib to the adapter |
1da177e4 LT |
457 | * @command: Command to send |
458 | * @fibptr: The fib | |
459 | * @size: Size of fib data area | |
460 | * @priority: Priority of Fib | |
461 | * @wait: Async/sync select | |
462 | * @reply: True if a reply is wanted | |
463 | * @callback: Called with reply | |
464 | * @callback_data: Passed to callback | |
465 | * | |
466 | * Sends the requested FIB to the adapter and optionally will wait for a | |
467 | * response FIB. If the caller does not wish to wait for a response than | |
468 | * an event to wait on must be supplied. This event will be set when a | |
469 | * response FIB is received from the adapter. | |
470 | */ | |
8ce3eca4 | 471 | |
bfb35aa8 MH |
472 | int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size, |
473 | int priority, int wait, int reply, fib_callback callback, | |
474 | void *callback_data) | |
1da177e4 | 475 | { |
1da177e4 | 476 | struct aac_dev * dev = fibptr->dev; |
a8166a52 | 477 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 478 | unsigned long flags = 0; |
cacb6dc3 | 479 | unsigned long mflags = 0; |
11604612 | 480 | unsigned long sflags = 0; |
cacb6dc3 | 481 | |
1640a2c3 | 482 | |
1da177e4 LT |
483 | if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned))) |
484 | return -EBUSY; | |
485 | /* | |
25985edc | 486 | * There are 5 cases with the wait and response requested flags. |
1da177e4 LT |
487 | * The only invalid cases are if the caller requests to wait and |
488 | * does not request a response and if the caller does not want a | |
489 | * response and the Fib is not allocated from pool. If a response | |
490 | * is not requesed the Fib will just be deallocaed by the DPC | |
491 | * routine when the response comes back from the adapter. No | |
8ce3eca4 | 492 | * further processing will be done besides deleting the Fib. We |
1da177e4 LT |
493 | * will have a debug mode where the adapter can notify the host |
494 | * it had a problem and the host can log that fact. | |
495 | */ | |
b6ef70f3 | 496 | fibptr->flags = 0; |
1da177e4 LT |
497 | if (wait && !reply) { |
498 | return -EINVAL; | |
499 | } else if (!wait && reply) { | |
500 | hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected); | |
501 | FIB_COUNTER_INCREMENT(aac_config.AsyncSent); | |
502 | } else if (!wait && !reply) { | |
503 | hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected); | |
504 | FIB_COUNTER_INCREMENT(aac_config.NoResponseSent); | |
505 | } else if (wait && reply) { | |
506 | hw_fib->header.XferState |= cpu_to_le32(ResponseExpected); | |
507 | FIB_COUNTER_INCREMENT(aac_config.NormalSent); | |
8ce3eca4 | 508 | } |
1da177e4 LT |
509 | /* |
510 | * Map the fib into 32bits by using the fib number | |
511 | */ | |
512 | ||
8e0c5ebd | 513 | hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2); |
85d22bbf | 514 | hw_fib->header.Handle = (u32)(fibptr - dev->fibs) + 1; |
1da177e4 LT |
515 | /* |
516 | * Set FIB state to indicate where it came from and if we want a | |
517 | * response from the adapter. Also load the command from the | |
518 | * caller. | |
519 | * | |
520 | * Map the hw fib pointer as a 32bit value | |
521 | */ | |
522 | hw_fib->header.Command = cpu_to_le16(command); | |
523 | hw_fib->header.XferState |= cpu_to_le32(SentFromHost); | |
1da177e4 LT |
524 | /* |
525 | * Set the size of the Fib we want to send to the adapter | |
526 | */ | |
527 | hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size); | |
528 | if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) { | |
529 | return -EMSGSIZE; | |
8ce3eca4 | 530 | } |
1da177e4 LT |
531 | /* |
532 | * Get a queue entry connect the FIB to it and send an notify | |
533 | * the adapter a command is ready. | |
534 | */ | |
1640a2c3 | 535 | hw_fib->header.XferState |= cpu_to_le32(NormalPriority); |
1da177e4 | 536 | |
1da177e4 LT |
537 | /* |
538 | * Fill in the Callback and CallbackContext if we are not | |
539 | * going to wait. | |
540 | */ | |
541 | if (!wait) { | |
542 | fibptr->callback = callback; | |
543 | fibptr->callback_data = callback_data; | |
b6ef70f3 | 544 | fibptr->flags = FIB_CONTEXT_FLAG; |
1da177e4 | 545 | } |
1da177e4 LT |
546 | |
547 | fibptr->done = 0; | |
1da177e4 | 548 | |
1640a2c3 MH |
549 | FIB_COUNTER_INCREMENT(aac_config.FibsSent); |
550 | ||
1640a2c3 | 551 | dprintk((KERN_DEBUG "Fib contents:.\n")); |
8e0c5ebd MH |
552 | dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command))); |
553 | dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command))); | |
554 | dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState))); | |
a8166a52 | 555 | dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va)); |
1640a2c3 MH |
556 | dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa)); |
557 | dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr)); | |
558 | ||
c8f7b073 | 559 | if (!dev->queues) |
65101355 | 560 | return -EBUSY; |
1640a2c3 | 561 | |
cacb6dc3 PNRCEH |
562 | if (wait) { |
563 | ||
564 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
565 | if (dev->management_fib_count >= AAC_NUM_MGT_FIB) { | |
566 | printk(KERN_INFO "No management Fibs Available:%d\n", | |
567 | dev->management_fib_count); | |
568 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
569 | return -EBUSY; | |
570 | } | |
571 | dev->management_fib_count++; | |
572 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
1640a2c3 | 573 | spin_lock_irqsave(&fibptr->event_lock, flags); |
cacb6dc3 PNRCEH |
574 | } |
575 | ||
11604612 MR |
576 | if (dev->sync_mode) { |
577 | if (wait) | |
578 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
579 | spin_lock_irqsave(&dev->sync_lock, sflags); | |
580 | if (dev->sync_fib) { | |
581 | list_add_tail(&fibptr->fiblink, &dev->sync_fib_list); | |
582 | spin_unlock_irqrestore(&dev->sync_lock, sflags); | |
583 | } else { | |
584 | dev->sync_fib = fibptr; | |
585 | spin_unlock_irqrestore(&dev->sync_lock, sflags); | |
586 | aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, | |
587 | (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0, | |
588 | NULL, NULL, NULL, NULL, NULL); | |
589 | } | |
590 | if (wait) { | |
591 | fibptr->flags |= FIB_CONTEXT_FLAG_WAIT; | |
592 | if (down_interruptible(&fibptr->event_wait)) { | |
593 | fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT; | |
594 | return -EFAULT; | |
595 | } | |
596 | return 0; | |
597 | } | |
598 | return -EINPROGRESS; | |
599 | } | |
600 | ||
cacb6dc3 PNRCEH |
601 | if (aac_adapter_deliver(fibptr) != 0) { |
602 | printk(KERN_ERR "aac_fib_send: returned -EBUSY\n"); | |
603 | if (wait) { | |
604 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
605 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
606 | dev->management_fib_count--; | |
607 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
608 | } | |
609 | return -EBUSY; | |
610 | } | |
611 | ||
8e0c5ebd | 612 | |
1da177e4 | 613 | /* |
8ce3eca4 | 614 | * If the caller wanted us to wait for response wait now. |
1da177e4 | 615 | */ |
8ce3eca4 | 616 | |
1da177e4 LT |
617 | if (wait) { |
618 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
9203344c MH |
619 | /* Only set for first known interruptable command */ |
620 | if (wait < 0) { | |
621 | /* | |
622 | * *VERY* Dangerous to time out a command, the | |
623 | * assumption is made that we have no hope of | |
624 | * functioning because an interrupt routing or other | |
625 | * hardware failure has occurred. | |
626 | */ | |
30002f1c | 627 | unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */ |
9203344c | 628 | while (down_trylock(&fibptr->event_wait)) { |
33524b70 | 629 | int blink; |
30002f1c | 630 | if (time_is_before_eq_jiffies(timeout)) { |
28713324 | 631 | struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue]; |
ef616233 | 632 | atomic_dec(&q->numpending); |
9203344c | 633 | if (wait == -1) { |
bfb35aa8 | 634 | printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n" |
9203344c MH |
635 | "Usually a result of a PCI interrupt routing problem;\n" |
636 | "update mother board BIOS or consider utilizing one of\n" | |
637 | "the SAFE mode kernel options (acpi, apic etc)\n"); | |
638 | } | |
639 | return -ETIMEDOUT; | |
640 | } | |
33524b70 MH |
641 | if ((blink = aac_adapter_check_health(dev)) > 0) { |
642 | if (wait == -1) { | |
643 | printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n" | |
644 | "Usually a result of a serious unrecoverable hardware problem\n", | |
645 | blink); | |
646 | } | |
647 | return -EFAULT; | |
648 | } | |
07beca2b RAR |
649 | /* |
650 | * Allow other processes / CPUS to use core | |
651 | */ | |
652 | schedule(); | |
9203344c | 653 | } |
0462590e | 654 | } else if (down_interruptible(&fibptr->event_wait)) { |
cacb6dc3 PNRCEH |
655 | /* Do nothing ... satisfy |
656 | * down_interruptible must_check */ | |
e6990c64 | 657 | } |
cacb6dc3 | 658 | |
33bb3b29 | 659 | spin_lock_irqsave(&fibptr->event_lock, flags); |
cacb6dc3 | 660 | if (fibptr->done == 0) { |
33bb3b29 | 661 | fibptr->done = 2; /* Tell interrupt we aborted */ |
c8f7b073 | 662 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
cacb6dc3 | 663 | return -ERESTARTSYS; |
c8f7b073 | 664 | } |
33bb3b29 | 665 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
125e1874 | 666 | BUG_ON(fibptr->done == 0); |
8ce3eca4 | 667 | |
912d4e88 | 668 | if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 669 | return -ETIMEDOUT; |
912d4e88 | 670 | return 0; |
1da177e4 LT |
671 | } |
672 | /* | |
673 | * If the user does not want a response than return success otherwise | |
674 | * return pending | |
675 | */ | |
676 | if (reply) | |
677 | return -EINPROGRESS; | |
678 | else | |
679 | return 0; | |
680 | } | |
681 | ||
8ce3eca4 | 682 | /** |
1da177e4 LT |
683 | * aac_consumer_get - get the top of the queue |
684 | * @dev: Adapter | |
685 | * @q: Queue | |
686 | * @entry: Return entry | |
687 | * | |
688 | * Will return a pointer to the entry on the top of the queue requested that | |
8ce3eca4 SM |
689 | * we are a consumer of, and return the address of the queue entry. It does |
690 | * not change the state of the queue. | |
1da177e4 LT |
691 | */ |
692 | ||
693 | int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry) | |
694 | { | |
695 | u32 index; | |
696 | int status; | |
697 | if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) { | |
698 | status = 0; | |
699 | } else { | |
700 | /* | |
701 | * The consumer index must be wrapped if we have reached | |
702 | * the end of the queue, else we just use the entry | |
703 | * pointed to by the header index | |
704 | */ | |
8ce3eca4 SM |
705 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) |
706 | index = 0; | |
1da177e4 | 707 | else |
8ce3eca4 | 708 | index = le32_to_cpu(*q->headers.consumer); |
1da177e4 LT |
709 | *entry = q->base + index; |
710 | status = 1; | |
711 | } | |
712 | return(status); | |
713 | } | |
714 | ||
715 | /** | |
716 | * aac_consumer_free - free consumer entry | |
717 | * @dev: Adapter | |
718 | * @q: Queue | |
719 | * @qid: Queue ident | |
720 | * | |
721 | * Frees up the current top of the queue we are a consumer of. If the | |
722 | * queue was full notify the producer that the queue is no longer full. | |
723 | */ | |
724 | ||
725 | void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid) | |
726 | { | |
727 | int wasfull = 0; | |
728 | u32 notify; | |
729 | ||
730 | if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer)) | |
731 | wasfull = 1; | |
8ce3eca4 | 732 | |
1da177e4 LT |
733 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) |
734 | *q->headers.consumer = cpu_to_le32(1); | |
735 | else | |
36b8dd1b | 736 | le32_add_cpu(q->headers.consumer, 1); |
8ce3eca4 | 737 | |
1da177e4 LT |
738 | if (wasfull) { |
739 | switch (qid) { | |
740 | ||
741 | case HostNormCmdQueue: | |
742 | notify = HostNormCmdNotFull; | |
743 | break; | |
1da177e4 LT |
744 | case HostNormRespQueue: |
745 | notify = HostNormRespNotFull; | |
746 | break; | |
1da177e4 LT |
747 | default: |
748 | BUG(); | |
749 | return; | |
750 | } | |
751 | aac_adapter_notify(dev, notify); | |
752 | } | |
8ce3eca4 | 753 | } |
1da177e4 LT |
754 | |
755 | /** | |
bfb35aa8 | 756 | * aac_fib_adapter_complete - complete adapter issued fib |
1da177e4 LT |
757 | * @fibptr: fib to complete |
758 | * @size: size of fib | |
759 | * | |
760 | * Will do all necessary work to complete a FIB that was sent from | |
761 | * the adapter. | |
762 | */ | |
763 | ||
bfb35aa8 | 764 | int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size) |
1da177e4 | 765 | { |
a8166a52 | 766 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 767 | struct aac_dev * dev = fibptr->dev; |
1640a2c3 | 768 | struct aac_queue * q; |
1da177e4 | 769 | unsigned long nointr = 0; |
1640a2c3 MH |
770 | unsigned long qflags; |
771 | ||
85d22bbf | 772 | if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 || |
a1751cda RAR |
773 | dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 || |
774 | dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { | |
e8b12f0f MR |
775 | kfree(hw_fib); |
776 | return 0; | |
777 | } | |
778 | ||
1640a2c3 | 779 | if (hw_fib->header.XferState == 0) { |
28713324 | 780 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
e8b12f0f | 781 | kfree(hw_fib); |
8ce3eca4 | 782 | return 0; |
1640a2c3 | 783 | } |
1da177e4 LT |
784 | /* |
785 | * If we plan to do anything check the structure type first. | |
8ce3eca4 | 786 | */ |
85d22bbf MR |
787 | if (hw_fib->header.StructType != FIB_MAGIC && |
788 | hw_fib->header.StructType != FIB_MAGIC2 && | |
789 | hw_fib->header.StructType != FIB_MAGIC2_64) { | |
28713324 | 790 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
e8b12f0f | 791 | kfree(hw_fib); |
8ce3eca4 | 792 | return -EINVAL; |
1da177e4 LT |
793 | } |
794 | /* | |
795 | * This block handles the case where the adapter had sent us a | |
796 | * command and we have finished processing the command. We | |
8ce3eca4 SM |
797 | * call completeFib when we are done processing the command |
798 | * and want to send a response back to the adapter. This will | |
1da177e4 LT |
799 | * send the completed cdb to the adapter. |
800 | */ | |
801 | if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) { | |
28713324 | 802 | if (dev->comm_interface == AAC_COMM_MESSAGE) { |
8e0c5ebd MH |
803 | kfree (hw_fib); |
804 | } else { | |
8ce3eca4 SM |
805 | u32 index; |
806 | hw_fib->header.XferState |= cpu_to_le32(HostProcessed); | |
8e0c5ebd MH |
807 | if (size) { |
808 | size += sizeof(struct aac_fibhdr); | |
8ce3eca4 | 809 | if (size > le16_to_cpu(hw_fib->header.SenderSize)) |
8e0c5ebd MH |
810 | return -EMSGSIZE; |
811 | hw_fib->header.Size = cpu_to_le16(size); | |
812 | } | |
813 | q = &dev->queues->queue[AdapNormRespQueue]; | |
814 | spin_lock_irqsave(q->lock, qflags); | |
815 | aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr); | |
816 | *(q->headers.producer) = cpu_to_le32(index + 1); | |
817 | spin_unlock_irqrestore(q->lock, qflags); | |
818 | if (!(nointr & (int)aac_config.irq_mod)) | |
819 | aac_adapter_notify(dev, AdapNormRespQueue); | |
1da177e4 | 820 | } |
8ce3eca4 SM |
821 | } else { |
822 | printk(KERN_WARNING "aac_fib_adapter_complete: " | |
823 | "Unknown xferstate detected.\n"); | |
824 | BUG(); | |
1da177e4 | 825 | } |
1da177e4 LT |
826 | return 0; |
827 | } | |
828 | ||
829 | /** | |
bfb35aa8 | 830 | * aac_fib_complete - fib completion handler |
1da177e4 LT |
831 | * @fib: FIB to complete |
832 | * | |
833 | * Will do all necessary work to complete a FIB. | |
834 | */ | |
8ce3eca4 | 835 | |
bfb35aa8 | 836 | int aac_fib_complete(struct fib *fibptr) |
1da177e4 | 837 | { |
a8166a52 | 838 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 LT |
839 | |
840 | /* | |
841 | * Check for a fib which has already been completed | |
842 | */ | |
843 | ||
844 | if (hw_fib->header.XferState == 0) | |
8ce3eca4 | 845 | return 0; |
1da177e4 LT |
846 | /* |
847 | * If we plan to do anything check the structure type first. | |
8ce3eca4 | 848 | */ |
1da177e4 | 849 | |
85d22bbf MR |
850 | if (hw_fib->header.StructType != FIB_MAGIC && |
851 | hw_fib->header.StructType != FIB_MAGIC2 && | |
852 | hw_fib->header.StructType != FIB_MAGIC2_64) | |
8ce3eca4 | 853 | return -EINVAL; |
1da177e4 | 854 | /* |
8ce3eca4 | 855 | * This block completes a cdb which orginated on the host and we |
1da177e4 LT |
856 | * just need to deallocate the cdb or reinit it. At this point the |
857 | * command is complete that we had sent to the adapter and this | |
858 | * cdb could be reused. | |
859 | */ | |
cacb6dc3 | 860 | |
1da177e4 LT |
861 | if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) && |
862 | (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))) | |
863 | { | |
864 | fib_dealloc(fibptr); | |
865 | } | |
866 | else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost)) | |
867 | { | |
868 | /* | |
869 | * This handles the case when the host has aborted the I/O | |
870 | * to the adapter because the adapter is not responding | |
871 | */ | |
872 | fib_dealloc(fibptr); | |
873 | } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) { | |
874 | fib_dealloc(fibptr); | |
875 | } else { | |
876 | BUG(); | |
8ce3eca4 | 877 | } |
1da177e4 LT |
878 | return 0; |
879 | } | |
880 | ||
881 | /** | |
882 | * aac_printf - handle printf from firmware | |
883 | * @dev: Adapter | |
884 | * @val: Message info | |
885 | * | |
886 | * Print a message passed to us by the controller firmware on the | |
887 | * Adaptec board | |
888 | */ | |
889 | ||
890 | void aac_printf(struct aac_dev *dev, u32 val) | |
891 | { | |
1da177e4 | 892 | char *cp = dev->printfbuf; |
7c00ffa3 MH |
893 | if (dev->printf_enabled) |
894 | { | |
895 | int length = val & 0xffff; | |
896 | int level = (val >> 16) & 0xffff; | |
8ce3eca4 | 897 | |
7c00ffa3 MH |
898 | /* |
899 | * The size of the printfbuf is set in port.c | |
900 | * There is no variable or define for it | |
901 | */ | |
902 | if (length > 255) | |
903 | length = 255; | |
904 | if (cp[length] != 0) | |
905 | cp[length] = 0; | |
906 | if (level == LOG_AAC_HIGH_ERROR) | |
1241f359 | 907 | printk(KERN_WARNING "%s:%s", dev->name, cp); |
7c00ffa3 | 908 | else |
1241f359 | 909 | printk(KERN_INFO "%s:%s", dev->name, cp); |
7c00ffa3 | 910 | } |
8ce3eca4 | 911 | memset(cp, 0, 256); |
1da177e4 LT |
912 | } |
913 | ||
9cb62fa2 RAR |
914 | static inline int aac_aif_data(struct aac_aifcmd *aifcmd, uint32_t index) |
915 | { | |
916 | return le32_to_cpu(((__le32 *)aifcmd->data)[index]); | |
917 | } | |
918 | ||
919 | ||
920 | static void aac_handle_aif_bu(struct aac_dev *dev, struct aac_aifcmd *aifcmd) | |
921 | { | |
922 | switch (aac_aif_data(aifcmd, 1)) { | |
923 | case AifBuCacheDataLoss: | |
924 | if (aac_aif_data(aifcmd, 2)) | |
925 | dev_info(&dev->pdev->dev, "Backup unit had cache data loss - [%d]\n", | |
926 | aac_aif_data(aifcmd, 2)); | |
927 | else | |
928 | dev_info(&dev->pdev->dev, "Backup Unit had cache data loss\n"); | |
929 | break; | |
930 | case AifBuCacheDataRecover: | |
931 | if (aac_aif_data(aifcmd, 2)) | |
932 | dev_info(&dev->pdev->dev, "DDR cache data recovered successfully - [%d]\n", | |
933 | aac_aif_data(aifcmd, 2)); | |
934 | else | |
935 | dev_info(&dev->pdev->dev, "DDR cache data recovered successfully\n"); | |
936 | break; | |
937 | } | |
938 | } | |
131256cf MH |
939 | |
940 | /** | |
941 | * aac_handle_aif - Handle a message from the firmware | |
942 | * @dev: Which adapter this fib is from | |
943 | * @fibptr: Pointer to fibptr from adapter | |
944 | * | |
945 | * This routine handles a driver notify fib from the adapter and | |
946 | * dispatches it to the appropriate routine for handling. | |
947 | */ | |
948 | ||
495c0217 | 949 | #define AIF_SNIFF_TIMEOUT (500*HZ) |
131256cf MH |
950 | static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr) |
951 | { | |
a8166a52 | 952 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
131256cf | 953 | struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data; |
0995ad38 | 954 | u32 channel, id, lun, container; |
131256cf MH |
955 | struct scsi_device *device; |
956 | enum { | |
957 | NOTHING, | |
958 | DELETE, | |
959 | ADD, | |
960 | CHANGE | |
0995ad38 | 961 | } device_config_needed = NOTHING; |
131256cf MH |
962 | |
963 | /* Sniff for container changes */ | |
964 | ||
c8f7b073 | 965 | if (!dev || !dev->fsa_dev) |
131256cf | 966 | return; |
0995ad38 | 967 | container = channel = id = lun = (u32)-1; |
131256cf MH |
968 | |
969 | /* | |
970 | * We have set this up to try and minimize the number of | |
971 | * re-configures that take place. As a result of this when | |
972 | * certain AIF's come in we will set a flag waiting for another | |
973 | * type of AIF before setting the re-config flag. | |
974 | */ | |
975 | switch (le32_to_cpu(aifcmd->command)) { | |
976 | case AifCmdDriverNotify: | |
f3307f72 | 977 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
dab04b01 MR |
978 | case AifRawDeviceRemove: |
979 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); | |
980 | if ((container >> 28)) { | |
981 | container = (u32)-1; | |
982 | break; | |
983 | } | |
984 | channel = (container >> 24) & 0xF; | |
985 | if (channel >= dev->maximum_num_channels) { | |
986 | container = (u32)-1; | |
987 | break; | |
988 | } | |
989 | id = container & 0xFFFF; | |
990 | if (id >= dev->maximum_num_physicals) { | |
991 | container = (u32)-1; | |
992 | break; | |
993 | } | |
994 | lun = (container >> 16) & 0xFF; | |
995 | container = (u32)-1; | |
996 | channel = aac_phys_to_logical(channel); | |
997 | device_config_needed = | |
998 | (((__le32 *)aifcmd->data)[0] == | |
999 | cpu_to_le32(AifRawDeviceRemove)) ? DELETE : ADD; | |
1000 | ||
1001 | if (device_config_needed == ADD) { | |
1002 | device = scsi_device_lookup( | |
1003 | dev->scsi_host_ptr, | |
1004 | channel, id, lun); | |
1005 | if (device) { | |
1006 | scsi_remove_device(device); | |
1007 | scsi_device_put(device); | |
1008 | } | |
1009 | } | |
1010 | break; | |
131256cf MH |
1011 | /* |
1012 | * Morph or Expand complete | |
1013 | */ | |
1014 | case AifDenMorphComplete: | |
1015 | case AifDenVolumeExtendComplete: | |
f3307f72 | 1016 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1017 | if (container >= dev->maximum_num_containers) |
1018 | break; | |
1019 | ||
1020 | /* | |
f64a181d | 1021 | * Find the scsi_device associated with the SCSI |
131256cf MH |
1022 | * address. Make sure we have the right array, and if |
1023 | * so set the flag to initiate a new re-config once we | |
1024 | * see an AifEnConfigChange AIF come through. | |
1025 | */ | |
1026 | ||
1027 | if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) { | |
8ce3eca4 SM |
1028 | device = scsi_device_lookup(dev->scsi_host_ptr, |
1029 | CONTAINER_TO_CHANNEL(container), | |
1030 | CONTAINER_TO_ID(container), | |
131256cf MH |
1031 | CONTAINER_TO_LUN(container)); |
1032 | if (device) { | |
1033 | dev->fsa_dev[container].config_needed = CHANGE; | |
1034 | dev->fsa_dev[container].config_waiting_on = AifEnConfigChange; | |
31876f32 | 1035 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1036 | scsi_device_put(device); |
1037 | } | |
1038 | } | |
1039 | } | |
1040 | ||
1041 | /* | |
1042 | * If we are waiting on something and this happens to be | |
1043 | * that thing then set the re-configure flag. | |
1044 | */ | |
1045 | if (container != (u32)-1) { | |
1046 | if (container >= dev->maximum_num_containers) | |
1047 | break; | |
31876f32 | 1048 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1049 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1050 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1051 | dev->fsa_dev[container].config_waiting_on = 0; |
1052 | } else for (container = 0; | |
1053 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 1054 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1055 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1056 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1057 | dev->fsa_dev[container].config_waiting_on = 0; |
1058 | } | |
1059 | break; | |
1060 | ||
1061 | case AifCmdEventNotify: | |
f3307f72 | 1062 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
95e852e1 SM |
1063 | case AifEnBatteryEvent: |
1064 | dev->cache_protected = | |
1065 | (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3)); | |
1066 | break; | |
131256cf MH |
1067 | /* |
1068 | * Add an Array. | |
1069 | */ | |
1070 | case AifEnAddContainer: | |
f3307f72 | 1071 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1072 | if (container >= dev->maximum_num_containers) |
1073 | break; | |
1074 | dev->fsa_dev[container].config_needed = ADD; | |
1075 | dev->fsa_dev[container].config_waiting_on = | |
1076 | AifEnConfigChange; | |
31876f32 | 1077 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1078 | break; |
1079 | ||
1080 | /* | |
1081 | * Delete an Array. | |
1082 | */ | |
1083 | case AifEnDeleteContainer: | |
f3307f72 | 1084 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1085 | if (container >= dev->maximum_num_containers) |
1086 | break; | |
1087 | dev->fsa_dev[container].config_needed = DELETE; | |
1088 | dev->fsa_dev[container].config_waiting_on = | |
1089 | AifEnConfigChange; | |
31876f32 | 1090 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1091 | break; |
1092 | ||
1093 | /* | |
1094 | * Container change detected. If we currently are not | |
1095 | * waiting on something else, setup to wait on a Config Change. | |
1096 | */ | |
1097 | case AifEnContainerChange: | |
f3307f72 | 1098 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1099 | if (container >= dev->maximum_num_containers) |
1100 | break; | |
31876f32 MH |
1101 | if (dev->fsa_dev[container].config_waiting_on && |
1102 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) | |
131256cf MH |
1103 | break; |
1104 | dev->fsa_dev[container].config_needed = CHANGE; | |
1105 | dev->fsa_dev[container].config_waiting_on = | |
1106 | AifEnConfigChange; | |
31876f32 | 1107 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1108 | break; |
1109 | ||
1110 | case AifEnConfigChange: | |
1111 | break; | |
1112 | ||
cb1042f2 SM |
1113 | case AifEnAddJBOD: |
1114 | case AifEnDeleteJBOD: | |
1115 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); | |
a4576b5d MS |
1116 | if ((container >> 28)) { |
1117 | container = (u32)-1; | |
cb1042f2 | 1118 | break; |
a4576b5d | 1119 | } |
cb1042f2 | 1120 | channel = (container >> 24) & 0xF; |
a4576b5d MS |
1121 | if (channel >= dev->maximum_num_channels) { |
1122 | container = (u32)-1; | |
cb1042f2 | 1123 | break; |
a4576b5d | 1124 | } |
cb1042f2 | 1125 | id = container & 0xFFFF; |
a4576b5d MS |
1126 | if (id >= dev->maximum_num_physicals) { |
1127 | container = (u32)-1; | |
cb1042f2 | 1128 | break; |
a4576b5d | 1129 | } |
cb1042f2 | 1130 | lun = (container >> 16) & 0xFF; |
a4576b5d | 1131 | container = (u32)-1; |
cb1042f2 SM |
1132 | channel = aac_phys_to_logical(channel); |
1133 | device_config_needed = | |
1134 | (((__le32 *)aifcmd->data)[0] == | |
1135 | cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE; | |
5ca05594 RM |
1136 | if (device_config_needed == ADD) { |
1137 | device = scsi_device_lookup(dev->scsi_host_ptr, | |
1138 | channel, | |
1139 | id, | |
1140 | lun); | |
1141 | if (device) { | |
1142 | scsi_remove_device(device); | |
1143 | scsi_device_put(device); | |
1144 | } | |
1145 | } | |
cb1042f2 SM |
1146 | break; |
1147 | ||
0995ad38 | 1148 | case AifEnEnclosureManagement: |
cb1042f2 SM |
1149 | /* |
1150 | * If in JBOD mode, automatic exposure of new | |
1151 | * physical target to be suppressed until configured. | |
1152 | */ | |
1153 | if (dev->jbod) | |
1154 | break; | |
0995ad38 SM |
1155 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) { |
1156 | case EM_DRIVE_INSERTION: | |
1157 | case EM_DRIVE_REMOVAL: | |
46154a02 MR |
1158 | case EM_SES_DRIVE_INSERTION: |
1159 | case EM_SES_DRIVE_REMOVAL: | |
0995ad38 SM |
1160 | container = le32_to_cpu( |
1161 | ((__le32 *)aifcmd->data)[2]); | |
a4576b5d MS |
1162 | if ((container >> 28)) { |
1163 | container = (u32)-1; | |
0995ad38 | 1164 | break; |
a4576b5d | 1165 | } |
0995ad38 | 1166 | channel = (container >> 24) & 0xF; |
a4576b5d MS |
1167 | if (channel >= dev->maximum_num_channels) { |
1168 | container = (u32)-1; | |
0995ad38 | 1169 | break; |
a4576b5d | 1170 | } |
0995ad38 SM |
1171 | id = container & 0xFFFF; |
1172 | lun = (container >> 16) & 0xFF; | |
a4576b5d | 1173 | container = (u32)-1; |
0995ad38 SM |
1174 | if (id >= dev->maximum_num_physicals) { |
1175 | /* legacy dev_t ? */ | |
1176 | if ((0x2000 <= id) || lun || channel || | |
1177 | ((channel = (id >> 7) & 0x3F) >= | |
1178 | dev->maximum_num_channels)) | |
1179 | break; | |
1180 | lun = (id >> 4) & 7; | |
1181 | id &= 0xF; | |
1182 | } | |
1183 | channel = aac_phys_to_logical(channel); | |
1184 | device_config_needed = | |
46154a02 MR |
1185 | ((((__le32 *)aifcmd->data)[3] |
1186 | == cpu_to_le32(EM_DRIVE_INSERTION)) || | |
1187 | (((__le32 *)aifcmd->data)[3] | |
1188 | == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ? | |
0995ad38 SM |
1189 | ADD : DELETE; |
1190 | break; | |
1191 | } | |
9cb62fa2 RAR |
1192 | case AifBuManagerEvent: |
1193 | aac_handle_aif_bu(dev, aifcmd); | |
0995ad38 | 1194 | break; |
131256cf MH |
1195 | } |
1196 | ||
1197 | /* | |
1198 | * If we are waiting on something and this happens to be | |
1199 | * that thing then set the re-configure flag. | |
1200 | */ | |
1201 | if (container != (u32)-1) { | |
1202 | if (container >= dev->maximum_num_containers) | |
1203 | break; | |
31876f32 | 1204 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1205 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1206 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1207 | dev->fsa_dev[container].config_waiting_on = 0; |
1208 | } else for (container = 0; | |
1209 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 1210 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1211 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1212 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1213 | dev->fsa_dev[container].config_waiting_on = 0; |
1214 | } | |
1215 | break; | |
1216 | ||
1217 | case AifCmdJobProgress: | |
1218 | /* | |
1219 | * These are job progress AIF's. When a Clear is being | |
1220 | * done on a container it is initially created then hidden from | |
1221 | * the OS. When the clear completes we don't get a config | |
1222 | * change so we monitor the job status complete on a clear then | |
1223 | * wait for a container change. | |
1224 | */ | |
1225 | ||
f3307f72 CH |
1226 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
1227 | (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] || | |
1228 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) { | |
131256cf MH |
1229 | for (container = 0; |
1230 | container < dev->maximum_num_containers; | |
1231 | ++container) { | |
1232 | /* | |
1233 | * Stomp on all config sequencing for all | |
1234 | * containers? | |
1235 | */ | |
1236 | dev->fsa_dev[container].config_waiting_on = | |
1237 | AifEnContainerChange; | |
1238 | dev->fsa_dev[container].config_needed = ADD; | |
31876f32 MH |
1239 | dev->fsa_dev[container].config_waiting_stamp = |
1240 | jiffies; | |
131256cf MH |
1241 | } |
1242 | } | |
f3307f72 CH |
1243 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
1244 | ((__le32 *)aifcmd->data)[6] == 0 && | |
1245 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) { | |
131256cf MH |
1246 | for (container = 0; |
1247 | container < dev->maximum_num_containers; | |
1248 | ++container) { | |
1249 | /* | |
1250 | * Stomp on all config sequencing for all | |
1251 | * containers? | |
1252 | */ | |
1253 | dev->fsa_dev[container].config_waiting_on = | |
1254 | AifEnContainerChange; | |
1255 | dev->fsa_dev[container].config_needed = DELETE; | |
31876f32 MH |
1256 | dev->fsa_dev[container].config_waiting_stamp = |
1257 | jiffies; | |
131256cf MH |
1258 | } |
1259 | } | |
1260 | break; | |
1261 | } | |
1262 | ||
a4576b5d MS |
1263 | container = 0; |
1264 | retry_next: | |
0995ad38 | 1265 | if (device_config_needed == NOTHING) |
a4576b5d | 1266 | for (; container < dev->maximum_num_containers; ++container) { |
31876f32 MH |
1267 | if ((dev->fsa_dev[container].config_waiting_on == 0) && |
1268 | (dev->fsa_dev[container].config_needed != NOTHING) && | |
1269 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) { | |
131256cf MH |
1270 | device_config_needed = |
1271 | dev->fsa_dev[container].config_needed; | |
1272 | dev->fsa_dev[container].config_needed = NOTHING; | |
0995ad38 SM |
1273 | channel = CONTAINER_TO_CHANNEL(container); |
1274 | id = CONTAINER_TO_ID(container); | |
1275 | lun = CONTAINER_TO_LUN(container); | |
131256cf MH |
1276 | break; |
1277 | } | |
1278 | } | |
1279 | if (device_config_needed == NOTHING) | |
1280 | return; | |
1281 | ||
1282 | /* | |
1283 | * If we decided that a re-configuration needs to be done, | |
1284 | * schedule it here on the way out the door, please close the door | |
1285 | * behind you. | |
1286 | */ | |
1287 | ||
131256cf | 1288 | /* |
f64a181d | 1289 | * Find the scsi_device associated with the SCSI address, |
131256cf MH |
1290 | * and mark it as changed, invalidating the cache. This deals |
1291 | * with changes to existing device IDs. | |
1292 | */ | |
1293 | ||
1294 | if (!dev || !dev->scsi_host_ptr) | |
1295 | return; | |
1296 | /* | |
bfb35aa8 | 1297 | * force reload of disk info via aac_probe_container |
131256cf | 1298 | */ |
0995ad38 SM |
1299 | if ((channel == CONTAINER_CHANNEL) && |
1300 | (device_config_needed != NOTHING)) { | |
1301 | if (dev->fsa_dev[container].valid == 1) | |
1302 | dev->fsa_dev[container].valid = 2; | |
bfb35aa8 | 1303 | aac_probe_container(dev, container); |
0995ad38 SM |
1304 | } |
1305 | device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun); | |
131256cf MH |
1306 | if (device) { |
1307 | switch (device_config_needed) { | |
1308 | case DELETE: | |
9cccde93 RM |
1309 | #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE)) |
1310 | scsi_remove_device(device); | |
1311 | #else | |
0995ad38 SM |
1312 | if (scsi_device_online(device)) { |
1313 | scsi_device_set_state(device, SDEV_OFFLINE); | |
1314 | sdev_printk(KERN_INFO, device, | |
1315 | "Device offlined - %s\n", | |
1316 | (channel == CONTAINER_CHANNEL) ? | |
1317 | "array deleted" : | |
1318 | "enclosure services event"); | |
1319 | } | |
9cccde93 | 1320 | #endif |
0995ad38 SM |
1321 | break; |
1322 | case ADD: | |
1323 | if (!scsi_device_online(device)) { | |
1324 | sdev_printk(KERN_INFO, device, | |
1325 | "Device online - %s\n", | |
1326 | (channel == CONTAINER_CHANNEL) ? | |
1327 | "array created" : | |
1328 | "enclosure services event"); | |
1329 | scsi_device_set_state(device, SDEV_RUNNING); | |
1330 | } | |
1331 | /* FALLTHRU */ | |
131256cf | 1332 | case CHANGE: |
0995ad38 SM |
1333 | if ((channel == CONTAINER_CHANNEL) |
1334 | && (!dev->fsa_dev[container].valid)) { | |
9cccde93 RM |
1335 | #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE)) |
1336 | scsi_remove_device(device); | |
1337 | #else | |
0995ad38 SM |
1338 | if (!scsi_device_online(device)) |
1339 | break; | |
1340 | scsi_device_set_state(device, SDEV_OFFLINE); | |
1341 | sdev_printk(KERN_INFO, device, | |
1342 | "Device offlined - %s\n", | |
1343 | "array failed"); | |
9cccde93 | 1344 | #endif |
0995ad38 SM |
1345 | break; |
1346 | } | |
131256cf MH |
1347 | scsi_rescan_device(&device->sdev_gendev); |
1348 | ||
1349 | default: | |
1350 | break; | |
1351 | } | |
1352 | scsi_device_put(device); | |
0995ad38 | 1353 | device_config_needed = NOTHING; |
131256cf | 1354 | } |
0995ad38 SM |
1355 | if (device_config_needed == ADD) |
1356 | scsi_add_device(dev->scsi_host_ptr, channel, id, lun); | |
a4576b5d MS |
1357 | if (channel == CONTAINER_CHANNEL) { |
1358 | container++; | |
1359 | device_config_needed = NOTHING; | |
1360 | goto retry_next; | |
1361 | } | |
131256cf MH |
1362 | } |
1363 | ||
29c97684 | 1364 | static int _aac_reset_adapter(struct aac_dev *aac, int forced) |
8c867b25 MH |
1365 | { |
1366 | int index, quirks; | |
8b1462e0 | 1367 | int retval; |
8c867b25 MH |
1368 | struct Scsi_Host *host; |
1369 | struct scsi_device *dev; | |
1370 | struct scsi_cmnd *command; | |
1371 | struct scsi_cmnd *command_list; | |
29c97684 | 1372 | int jafo = 0; |
8c867b25 MH |
1373 | |
1374 | /* | |
1375 | * Assumptions: | |
29c97684 SM |
1376 | * - host is locked, unless called by the aacraid thread. |
1377 | * (a matter of convenience, due to legacy issues surrounding | |
1378 | * eh_host_adapter_reset). | |
8c867b25 MH |
1379 | * - in_reset is asserted, so no new i/o is getting to the |
1380 | * card. | |
29c97684 SM |
1381 | * - The card is dead, or will be very shortly ;-/ so no new |
1382 | * commands are completing in the interrupt service. | |
8c867b25 MH |
1383 | */ |
1384 | host = aac->scsi_host_ptr; | |
1385 | scsi_block_requests(host); | |
1386 | aac_adapter_disable_int(aac); | |
29c97684 SM |
1387 | if (aac->thread->pid != current->pid) { |
1388 | spin_unlock_irq(host->host_lock); | |
1389 | kthread_stop(aac->thread); | |
1390 | jafo = 1; | |
1391 | } | |
8c867b25 MH |
1392 | |
1393 | /* | |
1394 | * If a positive health, means in a known DEAD PANIC | |
1395 | * state and the adapter could be reset to `try again'. | |
1396 | */ | |
29c97684 | 1397 | retval = aac_adapter_restart(aac, forced ? 0 : aac_adapter_check_health(aac)); |
8c867b25 MH |
1398 | |
1399 | if (retval) | |
1400 | goto out; | |
8c867b25 | 1401 | |
d18b448f MH |
1402 | /* |
1403 | * Loop through the fibs, close the synchronous FIBS | |
1404 | */ | |
33bb3b29 | 1405 | for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) { |
d18b448f | 1406 | struct fib *fib = &aac->fibs[index]; |
a8166a52 MH |
1407 | if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) && |
1408 | (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) { | |
d18b448f MH |
1409 | unsigned long flagv; |
1410 | spin_lock_irqsave(&fib->event_lock, flagv); | |
1411 | up(&fib->event_wait); | |
1412 | spin_unlock_irqrestore(&fib->event_lock, flagv); | |
1413 | schedule(); | |
33bb3b29 | 1414 | retval = 0; |
d18b448f MH |
1415 | } |
1416 | } | |
33bb3b29 MH |
1417 | /* Give some extra time for ioctls to complete. */ |
1418 | if (retval == 0) | |
1419 | ssleep(2); | |
8c867b25 MH |
1420 | index = aac->cardtype; |
1421 | ||
1422 | /* | |
1423 | * Re-initialize the adapter, first free resources, then carefully | |
1424 | * apply the initialization sequence to come back again. Only risk | |
1425 | * is a change in Firmware dropping cache, it is assumed the caller | |
1426 | * will ensure that i/o is queisced and the card is flushed in that | |
1427 | * case. | |
1428 | */ | |
1429 | aac_fib_map_free(aac); | |
8c867b25 MH |
1430 | pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys); |
1431 | aac->comm_addr = NULL; | |
1432 | aac->comm_phys = 0; | |
1433 | kfree(aac->queues); | |
1434 | aac->queues = NULL; | |
8b1462e0 | 1435 | aac_free_irq(aac); |
8c867b25 MH |
1436 | kfree(aac->fsa_dev); |
1437 | aac->fsa_dev = NULL; | |
94cf6ba1 SM |
1438 | quirks = aac_get_driver_ident(index)->quirks; |
1439 | if (quirks & AAC_QUIRK_31BIT) { | |
929a22a5 YH |
1440 | if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(31)))) || |
1441 | ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(31))))) | |
8c867b25 MH |
1442 | goto out; |
1443 | } else { | |
284901a9 YH |
1444 | if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32)))) || |
1445 | ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(32))))) | |
8c867b25 MH |
1446 | goto out; |
1447 | } | |
1448 | if ((retval = (*(aac_get_driver_ident(index)->init))(aac))) | |
1449 | goto out; | |
94cf6ba1 | 1450 | if (quirks & AAC_QUIRK_31BIT) |
284901a9 | 1451 | if ((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32)))) |
8c867b25 | 1452 | goto out; |
29c97684 | 1453 | if (jafo) { |
f170168b KC |
1454 | aac->thread = kthread_run(aac_command_thread, aac, "%s", |
1455 | aac->name); | |
29c97684 SM |
1456 | if (IS_ERR(aac->thread)) { |
1457 | retval = PTR_ERR(aac->thread); | |
1458 | goto out; | |
1459 | } | |
8c867b25 MH |
1460 | } |
1461 | (void)aac_get_adapter_info(aac); | |
8c867b25 | 1462 | if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) { |
8ce3eca4 SM |
1463 | host->sg_tablesize = 34; |
1464 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1465 | } | |
1466 | if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) { | |
1467 | host->sg_tablesize = 17; | |
1468 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1469 | } | |
8c867b25 MH |
1470 | aac_get_config_status(aac, 1); |
1471 | aac_get_containers(aac); | |
1472 | /* | |
1473 | * This is where the assumption that the Adapter is quiesced | |
1474 | * is important. | |
1475 | */ | |
1476 | command_list = NULL; | |
1477 | __shost_for_each_device(dev, host) { | |
1478 | unsigned long flags; | |
1479 | spin_lock_irqsave(&dev->list_lock, flags); | |
1480 | list_for_each_entry(command, &dev->cmd_list, list) | |
1481 | if (command->SCp.phase == AAC_OWNER_FIRMWARE) { | |
1482 | command->SCp.buffer = (struct scatterlist *)command_list; | |
1483 | command_list = command; | |
1484 | } | |
1485 | spin_unlock_irqrestore(&dev->list_lock, flags); | |
1486 | } | |
1487 | while ((command = command_list)) { | |
1488 | command_list = (struct scsi_cmnd *)command->SCp.buffer; | |
1489 | command->SCp.buffer = NULL; | |
1490 | command->result = DID_OK << 16 | |
1491 | | COMMAND_COMPLETE << 8 | |
1492 | | SAM_STAT_TASK_SET_FULL; | |
1493 | command->SCp.phase = AAC_OWNER_ERROR_HANDLER; | |
1494 | command->scsi_done(command); | |
1495 | } | |
1496 | retval = 0; | |
1497 | ||
1498 | out: | |
1499 | aac->in_reset = 0; | |
1500 | scsi_unblock_requests(host); | |
29c97684 SM |
1501 | if (jafo) { |
1502 | spin_lock_irq(host->host_lock); | |
1503 | } | |
1504 | return retval; | |
1505 | } | |
1506 | ||
1507 | int aac_reset_adapter(struct aac_dev * aac, int forced) | |
1508 | { | |
1509 | unsigned long flagv = 0; | |
1510 | int retval; | |
1511 | struct Scsi_Host * host; | |
1512 | ||
1513 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1514 | return -EBUSY; | |
1515 | ||
1516 | if (aac->in_reset) { | |
1517 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1518 | return -EBUSY; | |
1519 | } | |
1520 | aac->in_reset = 1; | |
1521 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1522 | ||
1523 | /* | |
1524 | * Wait for all commands to complete to this specific | |
1525 | * target (block maximum 60 seconds). Although not necessary, | |
1526 | * it does make us a good storage citizen. | |
1527 | */ | |
1528 | host = aac->scsi_host_ptr; | |
1529 | scsi_block_requests(host); | |
1530 | if (forced < 2) for (retval = 60; retval; --retval) { | |
1531 | struct scsi_device * dev; | |
1532 | struct scsi_cmnd * command; | |
1533 | int active = 0; | |
1534 | ||
1535 | __shost_for_each_device(dev, host) { | |
1536 | spin_lock_irqsave(&dev->list_lock, flagv); | |
1537 | list_for_each_entry(command, &dev->cmd_list, list) { | |
1538 | if (command->SCp.phase == AAC_OWNER_FIRMWARE) { | |
1539 | active++; | |
1540 | break; | |
1541 | } | |
1542 | } | |
1543 | spin_unlock_irqrestore(&dev->list_lock, flagv); | |
1544 | if (active) | |
1545 | break; | |
1546 | ||
1547 | } | |
1548 | /* | |
1549 | * We can exit If all the commands are complete | |
1550 | */ | |
1551 | if (active == 0) | |
1552 | break; | |
1553 | ssleep(1); | |
1554 | } | |
1555 | ||
1556 | /* Quiesce build, flush cache, write through mode */ | |
f858317d SM |
1557 | if (forced < 2) |
1558 | aac_send_shutdown(aac); | |
29c97684 | 1559 | spin_lock_irqsave(host->host_lock, flagv); |
f858317d | 1560 | retval = _aac_reset_adapter(aac, forced ? forced : ((aac_check_reset != 0) && (aac_check_reset != 1))); |
29c97684 SM |
1561 | spin_unlock_irqrestore(host->host_lock, flagv); |
1562 | ||
f858317d | 1563 | if ((forced < 2) && (retval == -ENODEV)) { |
29c97684 SM |
1564 | /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */ |
1565 | struct fib * fibctx = aac_fib_alloc(aac); | |
1566 | if (fibctx) { | |
1567 | struct aac_pause *cmd; | |
1568 | int status; | |
1569 | ||
1570 | aac_fib_init(fibctx); | |
1571 | ||
1572 | cmd = (struct aac_pause *) fib_data(fibctx); | |
1573 | ||
1574 | cmd->command = cpu_to_le32(VM_ContainerConfig); | |
1575 | cmd->type = cpu_to_le32(CT_PAUSE_IO); | |
1576 | cmd->timeout = cpu_to_le32(1); | |
1577 | cmd->min = cpu_to_le32(1); | |
1578 | cmd->noRescan = cpu_to_le32(1); | |
1579 | cmd->count = cpu_to_le32(0); | |
1580 | ||
1581 | status = aac_fib_send(ContainerCommand, | |
1582 | fibctx, | |
1583 | sizeof(struct aac_pause), | |
1584 | FsaNormal, | |
1585 | -2 /* Timeout silently */, 1, | |
1586 | NULL, NULL); | |
1587 | ||
1588 | if (status >= 0) | |
1589 | aac_fib_complete(fibctx); | |
cacb6dc3 PNRCEH |
1590 | /* FIB should be freed only after getting |
1591 | * the response from the F/W */ | |
1592 | if (status != -ERESTARTSYS) | |
1593 | aac_fib_free(fibctx); | |
29c97684 SM |
1594 | } |
1595 | } | |
1596 | ||
8c867b25 MH |
1597 | return retval; |
1598 | } | |
1599 | ||
1600 | int aac_check_health(struct aac_dev * aac) | |
1601 | { | |
1602 | int BlinkLED; | |
1603 | unsigned long time_now, flagv = 0; | |
1604 | struct list_head * entry; | |
1605 | struct Scsi_Host * host; | |
1606 | ||
1607 | /* Extending the scope of fib_lock slightly to protect aac->in_reset */ | |
1608 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1609 | return 0; | |
1610 | ||
1611 | if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) { | |
1612 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1613 | return 0; /* OK */ | |
1614 | } | |
1615 | ||
1616 | aac->in_reset = 1; | |
1617 | ||
1618 | /* Fake up an AIF: | |
1619 | * aac_aifcmd.command = AifCmdEventNotify = 1 | |
1620 | * aac_aifcmd.seqnum = 0xFFFFFFFF | |
1621 | * aac_aifcmd.data[0] = AifEnExpEvent = 23 | |
1622 | * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3 | |
1623 | * aac.aifcmd.data[2] = AifHighPriority = 3 | |
1624 | * aac.aifcmd.data[3] = BlinkLED | |
1625 | */ | |
1626 | ||
1627 | time_now = jiffies/HZ; | |
1628 | entry = aac->fib_list.next; | |
1629 | ||
1630 | /* | |
1631 | * For each Context that is on the | |
1632 | * fibctxList, make a copy of the | |
1633 | * fib, and then set the event to wake up the | |
1634 | * thread that is waiting for it. | |
1635 | */ | |
1636 | while (entry != &aac->fib_list) { | |
1637 | /* | |
1638 | * Extract the fibctx | |
1639 | */ | |
1640 | struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next); | |
1641 | struct hw_fib * hw_fib; | |
1642 | struct fib * fib; | |
1643 | /* | |
1644 | * Check if the queue is getting | |
1645 | * backlogged | |
1646 | */ | |
1647 | if (fibctx->count > 20) { | |
1648 | /* | |
1649 | * It's *not* jiffies folks, | |
1650 | * but jiffies / HZ, so do not | |
1651 | * panic ... | |
1652 | */ | |
1653 | u32 time_last = fibctx->jiffies; | |
1654 | /* | |
1655 | * Has it been > 2 minutes | |
1656 | * since the last read off | |
1657 | * the queue? | |
1658 | */ | |
1659 | if ((time_now - time_last) > aif_timeout) { | |
1660 | entry = entry->next; | |
1661 | aac_close_fib_context(aac, fibctx); | |
1662 | continue; | |
1663 | } | |
1664 | } | |
1665 | /* | |
1666 | * Warning: no sleep allowed while | |
1667 | * holding spinlock | |
1668 | */ | |
4dbc22d7 SM |
1669 | hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC); |
1670 | fib = kzalloc(sizeof(struct fib), GFP_ATOMIC); | |
8c867b25 MH |
1671 | if (fib && hw_fib) { |
1672 | struct aac_aifcmd * aif; | |
1673 | ||
a8166a52 | 1674 | fib->hw_fib_va = hw_fib; |
8c867b25 MH |
1675 | fib->dev = aac; |
1676 | aac_fib_init(fib); | |
1677 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
1678 | fib->size = sizeof (struct fib); | |
1679 | fib->data = hw_fib->data; | |
1680 | aif = (struct aac_aifcmd *)hw_fib->data; | |
1681 | aif->command = cpu_to_le32(AifCmdEventNotify); | |
a3940da5 SM |
1682 | aif->seqnum = cpu_to_le32(0xFFFFFFFF); |
1683 | ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent); | |
1684 | ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic); | |
1685 | ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority); | |
1686 | ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED); | |
8c867b25 MH |
1687 | |
1688 | /* | |
1689 | * Put the FIB onto the | |
1690 | * fibctx's fibs | |
1691 | */ | |
1692 | list_add_tail(&fib->fiblink, &fibctx->fib_list); | |
1693 | fibctx->count++; | |
1694 | /* | |
1695 | * Set the event to wake up the | |
1696 | * thread that will waiting. | |
1697 | */ | |
1698 | up(&fibctx->wait_sem); | |
1699 | } else { | |
1700 | printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); | |
1701 | kfree(fib); | |
1702 | kfree(hw_fib); | |
1703 | } | |
1704 | entry = entry->next; | |
1705 | } | |
1706 | ||
1707 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1708 | ||
1709 | if (BlinkLED < 0) { | |
1710 | printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED); | |
1711 | goto out; | |
1712 | } | |
1713 | ||
1714 | printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED); | |
1715 | ||
2f7ecc55 | 1716 | if (!aac_check_reset || ((aac_check_reset == 1) && |
a3940da5 SM |
1717 | (aac->supplement_adapter_info.SupportedOptions2 & |
1718 | AAC_OPTION_IGNORE_RESET))) | |
29c97684 | 1719 | goto out; |
8c867b25 | 1720 | host = aac->scsi_host_ptr; |
29c97684 SM |
1721 | if (aac->thread->pid != current->pid) |
1722 | spin_lock_irqsave(host->host_lock, flagv); | |
f858317d | 1723 | BlinkLED = _aac_reset_adapter(aac, aac_check_reset != 1); |
29c97684 SM |
1724 | if (aac->thread->pid != current->pid) |
1725 | spin_unlock_irqrestore(host->host_lock, flagv); | |
8c867b25 MH |
1726 | return BlinkLED; |
1727 | ||
1728 | out: | |
1729 | aac->in_reset = 0; | |
1730 | return BlinkLED; | |
1731 | } | |
1732 | ||
be6aeeed RAR |
1733 | |
1734 | static void aac_resolve_luns(struct aac_dev *dev) | |
1735 | { | |
1736 | int bus, target, channel; | |
1737 | struct scsi_device *sdev; | |
1738 | u8 devtype; | |
1739 | u8 new_devtype; | |
1740 | ||
1741 | for (bus = 0; bus < AAC_MAX_BUSES; bus++) { | |
1742 | for (target = 0; target < AAC_MAX_TARGETS; target++) { | |
1743 | ||
1744 | if (aac_phys_to_logical(bus) == ENCLOSURE_CHANNEL) | |
1745 | continue; | |
1746 | ||
1747 | if (bus == CONTAINER_CHANNEL) | |
1748 | channel = CONTAINER_CHANNEL; | |
1749 | else | |
1750 | channel = aac_phys_to_logical(bus); | |
1751 | ||
1752 | devtype = dev->hba_map[bus][target].devtype; | |
1753 | new_devtype = dev->hba_map[bus][target].new_devtype; | |
1754 | ||
1755 | sdev = scsi_device_lookup(dev->scsi_host_ptr, channel, | |
1756 | target, 0); | |
1757 | ||
1758 | if (!sdev && devtype) | |
1759 | scsi_add_device(dev->scsi_host_ptr, channel, | |
1760 | target, 0); | |
1761 | else if (sdev && new_devtype != devtype) | |
1762 | scsi_remove_device(sdev); | |
1763 | else if (sdev && new_devtype == devtype) | |
1764 | scsi_rescan_device(&sdev->sdev_gendev); | |
1765 | ||
1766 | if (sdev) | |
1767 | scsi_device_put(sdev); | |
1768 | ||
1769 | dev->hba_map[bus][target].devtype = new_devtype; | |
1770 | } | |
1771 | } | |
1772 | } | |
1773 | ||
1774 | /** | |
1775 | * aac_handle_sa_aif Handle a message from the firmware | |
1776 | * @dev: Which adapter this fib is from | |
1777 | * @fibptr: Pointer to fibptr from adapter | |
1778 | * | |
1779 | * This routine handles a driver notify fib from the adapter and | |
1780 | * dispatches it to the appropriate routine for handling. | |
1781 | */ | |
1782 | static void aac_handle_sa_aif(struct aac_dev *dev, struct fib *fibptr) | |
1783 | { | |
1784 | int i, bus, target, container, rcode = 0; | |
1785 | u32 events = 0; | |
1786 | struct fib *fib; | |
1787 | struct scsi_device *sdev; | |
1788 | ||
1789 | if (fibptr->hbacmd_size & SA_AIF_HOTPLUG) | |
1790 | events = SA_AIF_HOTPLUG; | |
1791 | else if (fibptr->hbacmd_size & SA_AIF_HARDWARE) | |
1792 | events = SA_AIF_HARDWARE; | |
1793 | else if (fibptr->hbacmd_size & SA_AIF_PDEV_CHANGE) | |
1794 | events = SA_AIF_PDEV_CHANGE; | |
1795 | else if (fibptr->hbacmd_size & SA_AIF_LDEV_CHANGE) | |
1796 | events = SA_AIF_LDEV_CHANGE; | |
1797 | else if (fibptr->hbacmd_size & SA_AIF_BPSTAT_CHANGE) | |
1798 | events = SA_AIF_BPSTAT_CHANGE; | |
1799 | else if (fibptr->hbacmd_size & SA_AIF_BPCFG_CHANGE) | |
1800 | events = SA_AIF_BPCFG_CHANGE; | |
1801 | ||
1802 | switch (events) { | |
1803 | case SA_AIF_HOTPLUG: | |
1804 | case SA_AIF_HARDWARE: | |
1805 | case SA_AIF_PDEV_CHANGE: | |
1806 | case SA_AIF_LDEV_CHANGE: | |
1807 | case SA_AIF_BPCFG_CHANGE: | |
1808 | ||
1809 | fib = aac_fib_alloc(dev); | |
1810 | if (!fib) { | |
1811 | pr_err("aac_handle_sa_aif: out of memory\n"); | |
1812 | return; | |
1813 | } | |
1814 | for (bus = 0; bus < AAC_MAX_BUSES; bus++) | |
1815 | for (target = 0; target < AAC_MAX_TARGETS; target++) | |
1816 | dev->hba_map[bus][target].new_devtype = 0; | |
1817 | ||
1818 | rcode = aac_report_phys_luns(dev, fib, AAC_RESCAN); | |
1819 | ||
1820 | if (rcode != -ERESTARTSYS) | |
1821 | aac_fib_free(fib); | |
1822 | ||
1823 | aac_resolve_luns(dev); | |
1824 | ||
1825 | if (events == SA_AIF_LDEV_CHANGE || | |
1826 | events == SA_AIF_BPCFG_CHANGE) { | |
1827 | aac_get_containers(dev); | |
1828 | for (container = 0; container < | |
1829 | dev->maximum_num_containers; ++container) { | |
1830 | sdev = scsi_device_lookup(dev->scsi_host_ptr, | |
1831 | CONTAINER_CHANNEL, | |
1832 | container, 0); | |
1833 | if (dev->fsa_dev[container].valid && !sdev) { | |
1834 | scsi_add_device(dev->scsi_host_ptr, | |
1835 | CONTAINER_CHANNEL, | |
1836 | container, 0); | |
1837 | } else if (!dev->fsa_dev[container].valid && | |
1838 | sdev) { | |
1839 | scsi_remove_device(sdev); | |
1840 | scsi_device_put(sdev); | |
1841 | } else if (sdev) { | |
1842 | scsi_rescan_device(&sdev->sdev_gendev); | |
1843 | scsi_device_put(sdev); | |
1844 | } | |
1845 | } | |
1846 | } | |
1847 | break; | |
1848 | ||
1849 | case SA_AIF_BPSTAT_CHANGE: | |
1850 | /* currently do nothing */ | |
1851 | break; | |
1852 | } | |
1853 | ||
1854 | for (i = 1; i <= 10; ++i) { | |
1855 | events = src_readl(dev, MUnit.IDR); | |
1856 | if (events & (1<<23)) { | |
1857 | pr_warn(" AIF not cleared by firmware - %d/%d)\n", | |
1858 | i, 10); | |
1859 | ssleep(1); | |
1860 | } | |
1861 | } | |
1862 | } | |
1863 | ||
7c0b5eda RAR |
1864 | static int get_fib_count(struct aac_dev *dev) |
1865 | { | |
1866 | unsigned int num = 0; | |
1867 | struct list_head *entry; | |
1868 | unsigned long flagv; | |
1869 | ||
1870 | /* | |
1871 | * Warning: no sleep allowed while | |
1872 | * holding spinlock. We take the estimate | |
1873 | * and pre-allocate a set of fibs outside the | |
1874 | * lock. | |
1875 | */ | |
1876 | num = le32_to_cpu(dev->init->r7.adapter_fibs_size) | |
1877 | / sizeof(struct hw_fib); /* some extra */ | |
1878 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
1879 | entry = dev->fib_list.next; | |
1880 | while (entry != &dev->fib_list) { | |
1881 | entry = entry->next; | |
1882 | ++num; | |
1883 | } | |
1884 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
1885 | ||
1886 | return num; | |
1887 | } | |
1888 | ||
1889 | static int fillup_pools(struct aac_dev *dev, struct hw_fib **hw_fib_pool, | |
1890 | struct fib **fib_pool, | |
1891 | unsigned int num) | |
1892 | { | |
1893 | struct hw_fib **hw_fib_p; | |
1894 | struct fib **fib_p; | |
1895 | int rcode = 1; | |
1896 | ||
1897 | hw_fib_p = hw_fib_pool; | |
1898 | fib_p = fib_pool; | |
1899 | while (hw_fib_p < &hw_fib_pool[num]) { | |
1900 | *(hw_fib_p) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL); | |
1901 | if (!(*(hw_fib_p++))) { | |
1902 | --hw_fib_p; | |
1903 | break; | |
1904 | } | |
1905 | ||
1906 | *(fib_p) = kmalloc(sizeof(struct fib), GFP_KERNEL); | |
1907 | if (!(*(fib_p++))) { | |
1908 | kfree(*(--hw_fib_p)); | |
1909 | break; | |
1910 | } | |
1911 | } | |
1912 | ||
1913 | num = hw_fib_p - hw_fib_pool; | |
1914 | if (!num) | |
1915 | rcode = 0; | |
1916 | ||
1917 | return rcode; | |
1918 | } | |
1919 | ||
1920 | static void wakeup_fibctx_threads(struct aac_dev *dev, | |
1921 | struct hw_fib **hw_fib_pool, | |
1922 | struct fib **fib_pool, | |
1923 | struct fib *fib, | |
1924 | struct hw_fib *hw_fib, | |
1925 | unsigned int num) | |
1926 | { | |
1927 | unsigned long flagv; | |
1928 | struct list_head *entry; | |
1929 | struct hw_fib **hw_fib_p; | |
1930 | struct fib **fib_p; | |
1931 | u32 time_now, time_last; | |
1932 | struct hw_fib *hw_newfib; | |
1933 | struct fib *newfib; | |
1934 | struct aac_fib_context *fibctx; | |
1935 | ||
1936 | time_now = jiffies/HZ; | |
1937 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
1938 | entry = dev->fib_list.next; | |
1939 | /* | |
1940 | * For each Context that is on the | |
1941 | * fibctxList, make a copy of the | |
1942 | * fib, and then set the event to wake up the | |
1943 | * thread that is waiting for it. | |
1944 | */ | |
1945 | ||
1946 | hw_fib_p = hw_fib_pool; | |
1947 | fib_p = fib_pool; | |
1948 | while (entry != &dev->fib_list) { | |
1949 | /* | |
1950 | * Extract the fibctx | |
1951 | */ | |
1952 | fibctx = list_entry(entry, struct aac_fib_context, | |
1953 | next); | |
1954 | /* | |
1955 | * Check if the queue is getting | |
1956 | * backlogged | |
1957 | */ | |
1958 | if (fibctx->count > 20) { | |
1959 | /* | |
1960 | * It's *not* jiffies folks, | |
1961 | * but jiffies / HZ so do not | |
1962 | * panic ... | |
1963 | */ | |
1964 | time_last = fibctx->jiffies; | |
1965 | /* | |
1966 | * Has it been > 2 minutes | |
1967 | * since the last read off | |
1968 | * the queue? | |
1969 | */ | |
1970 | if ((time_now - time_last) > aif_timeout) { | |
1971 | entry = entry->next; | |
1972 | aac_close_fib_context(dev, fibctx); | |
1973 | continue; | |
1974 | } | |
1975 | } | |
1976 | /* | |
1977 | * Warning: no sleep allowed while | |
1978 | * holding spinlock | |
1979 | */ | |
1980 | if (hw_fib_p >= &hw_fib_pool[num]) { | |
1981 | pr_warn("aifd: didn't allocate NewFib\n"); | |
1982 | entry = entry->next; | |
1983 | continue; | |
1984 | } | |
1985 | ||
1986 | hw_newfib = *hw_fib_p; | |
1987 | *(hw_fib_p++) = NULL; | |
1988 | newfib = *fib_p; | |
1989 | *(fib_p++) = NULL; | |
1990 | /* | |
1991 | * Make the copy of the FIB | |
1992 | */ | |
1993 | memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib)); | |
1994 | memcpy(newfib, fib, sizeof(struct fib)); | |
1995 | newfib->hw_fib_va = hw_newfib; | |
1996 | /* | |
1997 | * Put the FIB onto the | |
1998 | * fibctx's fibs | |
1999 | */ | |
2000 | list_add_tail(&newfib->fiblink, &fibctx->fib_list); | |
2001 | fibctx->count++; | |
2002 | /* | |
2003 | * Set the event to wake up the | |
2004 | * thread that is waiting. | |
2005 | */ | |
2006 | up(&fibctx->wait_sem); | |
2007 | ||
2008 | entry = entry->next; | |
2009 | } | |
2010 | /* | |
2011 | * Set the status of this FIB | |
2012 | */ | |
2013 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); | |
2014 | aac_fib_adapter_complete(fib, sizeof(u32)); | |
2015 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
2016 | ||
2017 | } | |
2018 | ||
2019 | static void aac_process_events(struct aac_dev *dev) | |
2020 | { | |
2021 | struct hw_fib *hw_fib; | |
2022 | struct fib *fib; | |
2023 | unsigned long flags; | |
2024 | spinlock_t *t_lock; | |
2025 | unsigned int rcode; | |
2026 | ||
2027 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2028 | spin_lock_irqsave(t_lock, flags); | |
2029 | ||
2030 | while (!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) { | |
2031 | struct list_head *entry; | |
2032 | struct aac_aifcmd *aifcmd; | |
2033 | unsigned int num; | |
2034 | struct hw_fib **hw_fib_pool, **hw_fib_p; | |
2035 | struct fib **fib_pool, **fib_p; | |
2036 | ||
2037 | set_current_state(TASK_RUNNING); | |
2038 | ||
2039 | entry = dev->queues->queue[HostNormCmdQueue].cmdq.next; | |
2040 | list_del(entry); | |
2041 | ||
2042 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2043 | spin_unlock_irqrestore(t_lock, flags); | |
2044 | ||
2045 | fib = list_entry(entry, struct fib, fiblink); | |
2046 | hw_fib = fib->hw_fib_va; | |
be6aeeed RAR |
2047 | if (dev->sa_firmware) { |
2048 | /* Thor AIF */ | |
2049 | aac_handle_sa_aif(dev, fib); | |
2050 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); | |
2051 | continue; | |
2052 | } | |
7c0b5eda RAR |
2053 | /* |
2054 | * We will process the FIB here or pass it to a | |
2055 | * worker thread that is TBD. We Really can't | |
2056 | * do anything at this point since we don't have | |
2057 | * anything defined for this thread to do. | |
2058 | */ | |
2059 | memset(fib, 0, sizeof(struct fib)); | |
2060 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
2061 | fib->size = sizeof(struct fib); | |
2062 | fib->hw_fib_va = hw_fib; | |
2063 | fib->data = hw_fib->data; | |
2064 | fib->dev = dev; | |
2065 | /* | |
2066 | * We only handle AifRequest fibs from the adapter. | |
2067 | */ | |
2068 | ||
2069 | aifcmd = (struct aac_aifcmd *) hw_fib->data; | |
2070 | if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) { | |
2071 | /* Handle Driver Notify Events */ | |
2072 | aac_handle_aif(dev, fib); | |
2073 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); | |
2074 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); | |
2075 | goto free_fib; | |
2076 | } | |
2077 | /* | |
2078 | * The u32 here is important and intended. We are using | |
2079 | * 32bit wrapping time to fit the adapter field | |
2080 | */ | |
2081 | ||
2082 | /* Sniff events */ | |
2083 | if (aifcmd->command == cpu_to_le32(AifCmdEventNotify) | |
2084 | || aifcmd->command == cpu_to_le32(AifCmdJobProgress)) { | |
2085 | aac_handle_aif(dev, fib); | |
2086 | } | |
2087 | ||
2088 | /* | |
2089 | * get number of fibs to process | |
2090 | */ | |
2091 | num = get_fib_count(dev); | |
2092 | if (!num) | |
2093 | goto free_fib; | |
2094 | ||
2095 | hw_fib_pool = kmalloc_array(num, sizeof(struct hw_fib *), | |
2096 | GFP_KERNEL); | |
2097 | if (!hw_fib_pool) | |
2098 | goto free_fib; | |
2099 | ||
2100 | fib_pool = kmalloc_array(num, sizeof(struct fib *), GFP_KERNEL); | |
2101 | if (!fib_pool) | |
2102 | goto free_hw_fib_pool; | |
2103 | ||
2104 | /* | |
2105 | * Fill up fib pointer pools with actual fibs | |
2106 | * and hw_fibs | |
2107 | */ | |
2108 | rcode = fillup_pools(dev, hw_fib_pool, fib_pool, num); | |
2109 | if (!rcode) | |
2110 | goto free_mem; | |
2111 | ||
2112 | /* | |
2113 | * wakeup the thread that is waiting for | |
2114 | * the response from fw (ioctl) | |
2115 | */ | |
2116 | wakeup_fibctx_threads(dev, hw_fib_pool, fib_pool, | |
2117 | fib, hw_fib, num); | |
2118 | ||
2119 | free_mem: | |
2120 | /* Free up the remaining resources */ | |
2121 | hw_fib_p = hw_fib_pool; | |
2122 | fib_p = fib_pool; | |
2123 | while (hw_fib_p < &hw_fib_pool[num]) { | |
2124 | kfree(*hw_fib_p); | |
2125 | kfree(*fib_p); | |
2126 | ++fib_p; | |
2127 | ++hw_fib_p; | |
2128 | } | |
2129 | kfree(fib_pool); | |
2130 | free_hw_fib_pool: | |
2131 | kfree(hw_fib_pool); | |
2132 | free_fib: | |
2133 | kfree(fib); | |
2134 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2135 | spin_lock_irqsave(t_lock, flags); | |
2136 | } | |
2137 | /* | |
2138 | * There are no more AIF's | |
2139 | */ | |
2140 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2141 | spin_unlock_irqrestore(t_lock, flags); | |
2142 | } | |
8c867b25 | 2143 | |
abd03305 RAR |
2144 | static int aac_send_wellness_command(struct aac_dev *dev, char *wellness_str, |
2145 | u32 datasize) | |
2146 | { | |
2147 | struct aac_srb *srbcmd; | |
2148 | struct sgmap64 *sg64; | |
2149 | dma_addr_t addr; | |
2150 | char *dma_buf; | |
2151 | struct fib *fibptr; | |
2152 | int ret = -ENOMEM; | |
2153 | u32 vbus, vid; | |
2154 | ||
2155 | fibptr = aac_fib_alloc(dev); | |
2156 | if (!fibptr) | |
2157 | goto out; | |
2158 | ||
2159 | dma_buf = pci_alloc_consistent(dev->pdev, datasize, &addr); | |
2160 | if (!dma_buf) | |
2161 | goto fib_free_out; | |
2162 | ||
2163 | aac_fib_init(fibptr); | |
2164 | ||
2165 | vbus = (u32)le16_to_cpu(dev->supplement_adapter_info.VirtDeviceBus); | |
2166 | vid = (u32)le16_to_cpu(dev->supplement_adapter_info.VirtDeviceTarget); | |
2167 | ||
2168 | srbcmd = (struct aac_srb *)fib_data(fibptr); | |
2169 | ||
2170 | srbcmd->function = cpu_to_le32(SRBF_ExecuteScsi); | |
2171 | srbcmd->channel = cpu_to_le32(vbus); | |
2172 | srbcmd->id = cpu_to_le32(vid); | |
2173 | srbcmd->lun = 0; | |
2174 | srbcmd->flags = cpu_to_le32(SRB_DataOut); | |
2175 | srbcmd->timeout = cpu_to_le32(10); | |
2176 | srbcmd->retry_limit = 0; | |
2177 | srbcmd->cdb_size = cpu_to_le32(12); | |
2178 | srbcmd->count = cpu_to_le32(datasize); | |
2179 | ||
2180 | memset(srbcmd->cdb, 0, sizeof(srbcmd->cdb)); | |
2181 | srbcmd->cdb[0] = BMIC_OUT; | |
2182 | srbcmd->cdb[6] = WRITE_HOST_WELLNESS; | |
2183 | memcpy(dma_buf, (char *)wellness_str, datasize); | |
2184 | ||
2185 | sg64 = (struct sgmap64 *)&srbcmd->sg; | |
2186 | sg64->count = cpu_to_le32(1); | |
2187 | sg64->sg[0].addr[1] = cpu_to_le32((u32)(((addr) >> 16) >> 16)); | |
2188 | sg64->sg[0].addr[0] = cpu_to_le32((u32)(addr & 0xffffffff)); | |
2189 | sg64->sg[0].count = cpu_to_le32(datasize); | |
2190 | ||
2191 | ret = aac_fib_send(ScsiPortCommand64, fibptr, sizeof(struct aac_srb), | |
2192 | FsaNormal, 1, 1, NULL, NULL); | |
2193 | ||
2194 | pci_free_consistent(dev->pdev, datasize, (void *)dma_buf, addr); | |
2195 | ||
2196 | /* | |
2197 | * Do not set XferState to zero unless | |
2198 | * receives a response from F/W | |
2199 | */ | |
2200 | if (ret >= 0) | |
2201 | aac_fib_complete(fibptr); | |
2202 | ||
2203 | /* | |
2204 | * FIB should be freed only after | |
2205 | * getting the response from the F/W | |
2206 | */ | |
2207 | if (ret != -ERESTARTSYS) | |
2208 | goto fib_free_out; | |
2209 | ||
2210 | out: | |
2211 | return ret; | |
2212 | fib_free_out: | |
2213 | aac_fib_free(fibptr); | |
2214 | goto out; | |
2215 | } | |
2216 | ||
2217 | int aac_send_safw_hostttime(struct aac_dev *dev, struct timeval *now) | |
2218 | { | |
2219 | struct tm cur_tm; | |
2220 | char wellness_str[] = "<HW>TD\010\0\0\0\0\0\0\0\0\0DW\0\0ZZ"; | |
2221 | u32 datasize = sizeof(wellness_str); | |
2222 | unsigned long local_time; | |
2223 | int ret = -ENODEV; | |
2224 | ||
2225 | if (!dev->sa_firmware) | |
2226 | goto out; | |
2227 | ||
2228 | local_time = (u32)(now->tv_sec - (sys_tz.tz_minuteswest * 60)); | |
2229 | time_to_tm(local_time, 0, &cur_tm); | |
2230 | cur_tm.tm_mon += 1; | |
2231 | cur_tm.tm_year += 1900; | |
2232 | wellness_str[8] = bin2bcd(cur_tm.tm_hour); | |
2233 | wellness_str[9] = bin2bcd(cur_tm.tm_min); | |
2234 | wellness_str[10] = bin2bcd(cur_tm.tm_sec); | |
2235 | wellness_str[12] = bin2bcd(cur_tm.tm_mon); | |
2236 | wellness_str[13] = bin2bcd(cur_tm.tm_mday); | |
2237 | wellness_str[14] = bin2bcd(cur_tm.tm_year / 100); | |
2238 | wellness_str[15] = bin2bcd(cur_tm.tm_year % 100); | |
2239 | ||
2240 | ret = aac_send_wellness_command(dev, wellness_str, datasize); | |
2241 | ||
2242 | out: | |
2243 | return ret; | |
2244 | } | |
2245 | ||
2246 | int aac_send_hosttime(struct aac_dev *dev, struct timeval *now) | |
2247 | { | |
2248 | int ret = -ENOMEM; | |
2249 | struct fib *fibptr; | |
2250 | __le32 *info; | |
2251 | ||
2252 | fibptr = aac_fib_alloc(dev); | |
2253 | if (!fibptr) | |
2254 | goto out; | |
2255 | ||
2256 | aac_fib_init(fibptr); | |
2257 | info = (__le32 *)fib_data(fibptr); | |
2258 | *info = cpu_to_le32(now->tv_sec); | |
2259 | ret = aac_fib_send(SendHostTime, fibptr, sizeof(*info), FsaNormal, | |
2260 | 1, 1, NULL, NULL); | |
2261 | ||
2262 | /* | |
2263 | * Do not set XferState to zero unless | |
2264 | * receives a response from F/W | |
2265 | */ | |
2266 | if (ret >= 0) | |
2267 | aac_fib_complete(fibptr); | |
2268 | ||
2269 | /* | |
2270 | * FIB should be freed only after | |
2271 | * getting the response from the F/W | |
2272 | */ | |
2273 | if (ret != -ERESTARTSYS) | |
2274 | aac_fib_free(fibptr); | |
2275 | ||
2276 | out: | |
2277 | return ret; | |
2278 | } | |
2279 | ||
1da177e4 LT |
2280 | /** |
2281 | * aac_command_thread - command processing thread | |
2282 | * @dev: Adapter to monitor | |
2283 | * | |
2284 | * Waits on the commandready event in it's queue. When the event gets set | |
2285 | * it will pull FIBs off it's queue. It will continue to pull FIBs off | |
2286 | * until the queue is empty. When the queue is empty it will wait for | |
2287 | * more FIBs. | |
2288 | */ | |
8ce3eca4 | 2289 | |
fe27381d | 2290 | int aac_command_thread(void *data) |
1da177e4 | 2291 | { |
fe27381d | 2292 | struct aac_dev *dev = data; |
1da177e4 | 2293 | DECLARE_WAITQUEUE(wait, current); |
29c97684 SM |
2294 | unsigned long next_jiffies = jiffies + HZ; |
2295 | unsigned long next_check_jiffies = next_jiffies; | |
2296 | long difference = HZ; | |
1da177e4 LT |
2297 | |
2298 | /* | |
2299 | * We can only have one thread per adapter for AIF's. | |
2300 | */ | |
2301 | if (dev->aif_thread) | |
2302 | return -EINVAL; | |
fe27381d | 2303 | |
1da177e4 LT |
2304 | /* |
2305 | * Let the DPC know it has a place to send the AIF's to. | |
2306 | */ | |
2307 | dev->aif_thread = 1; | |
2f130980 | 2308 | add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); |
1da177e4 | 2309 | set_current_state(TASK_INTERRUPTIBLE); |
2f130980 | 2310 | dprintk ((KERN_INFO "aac_command_thread start\n")); |
8ce3eca4 | 2311 | while (1) { |
1da177e4 | 2312 | |
7c0b5eda | 2313 | aac_process_events(dev); |
29c97684 SM |
2314 | |
2315 | /* | |
2316 | * Background activity | |
2317 | */ | |
2318 | if ((time_before(next_check_jiffies,next_jiffies)) | |
2319 | && ((difference = next_check_jiffies - jiffies) <= 0)) { | |
2320 | next_check_jiffies = next_jiffies; | |
2321 | if (aac_check_health(dev) == 0) { | |
2322 | difference = ((long)(unsigned)check_interval) | |
2323 | * HZ; | |
2324 | next_check_jiffies = jiffies + difference; | |
2325 | } else if (!dev->queues) | |
2326 | break; | |
2327 | } | |
2328 | if (!time_before(next_check_jiffies,next_jiffies) | |
2329 | && ((difference = next_jiffies - jiffies) <= 0)) { | |
2330 | struct timeval now; | |
2331 | int ret; | |
2332 | ||
2333 | /* Don't even try to talk to adapter if its sick */ | |
2334 | ret = aac_check_health(dev); | |
abd03305 | 2335 | if (!dev->queues) |
29c97684 SM |
2336 | break; |
2337 | next_check_jiffies = jiffies | |
2338 | + ((long)(unsigned)check_interval) | |
2339 | * HZ; | |
2340 | do_gettimeofday(&now); | |
2341 | ||
2342 | /* Synchronize our watches */ | |
2343 | if (((1000000 - (1000000 / HZ)) > now.tv_usec) | |
2344 | && (now.tv_usec > (1000000 / HZ))) | |
2345 | difference = (((1000000 - now.tv_usec) * HZ) | |
2346 | + 500000) / 1000000; | |
2347 | else if (ret == 0) { | |
abd03305 RAR |
2348 | |
2349 | if (now.tv_usec > 500000) | |
2350 | ++now.tv_sec; | |
2351 | ||
2352 | if (dev->sa_firmware) | |
2353 | ret = | |
2354 | aac_send_safw_hostttime(dev, &now); | |
2355 | else | |
2356 | ret = aac_send_hosttime(dev, &now); | |
2357 | ||
29c97684 SM |
2358 | difference = (long)(unsigned)update_interval*HZ; |
2359 | } else { | |
2360 | /* retry shortly */ | |
2361 | difference = 10 * HZ; | |
2362 | } | |
2363 | next_jiffies = jiffies + difference; | |
2364 | if (time_before(next_check_jiffies,next_jiffies)) | |
2365 | difference = next_check_jiffies - jiffies; | |
2366 | } | |
2367 | if (difference <= 0) | |
2368 | difference = 1; | |
2369 | set_current_state(TASK_INTERRUPTIBLE); | |
fc4bf75e RAR |
2370 | |
2371 | if (kthread_should_stop()) | |
2372 | break; | |
2373 | ||
29c97684 | 2374 | schedule_timeout(difference); |
1da177e4 | 2375 | |
fe27381d | 2376 | if (kthread_should_stop()) |
1da177e4 | 2377 | break; |
1da177e4 | 2378 | } |
2f130980 MH |
2379 | if (dev->queues) |
2380 | remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); | |
1da177e4 | 2381 | dev->aif_thread = 0; |
2f130980 | 2382 | return 0; |
1da177e4 | 2383 | } |
8b1462e0 MR |
2384 | |
2385 | int aac_acquire_irq(struct aac_dev *dev) | |
2386 | { | |
2387 | int i; | |
2388 | int j; | |
2389 | int ret = 0; | |
8b1462e0 | 2390 | |
8b1462e0 MR |
2391 | if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) { |
2392 | for (i = 0; i < dev->max_msix; i++) { | |
2393 | dev->aac_msix[i].vector_no = i; | |
2394 | dev->aac_msix[i].dev = dev; | |
0910d8bb | 2395 | if (request_irq(pci_irq_vector(dev->pdev, i), |
8b1462e0 MR |
2396 | dev->a_ops.adapter_intr, |
2397 | 0, "aacraid", &(dev->aac_msix[i]))) { | |
2398 | printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n", | |
2399 | dev->name, dev->id, i); | |
2400 | for (j = 0 ; j < i ; j++) | |
0910d8bb | 2401 | free_irq(pci_irq_vector(dev->pdev, j), |
8b1462e0 MR |
2402 | &(dev->aac_msix[j])); |
2403 | pci_disable_msix(dev->pdev); | |
2404 | ret = -1; | |
2405 | } | |
8b1462e0 MR |
2406 | } |
2407 | } else { | |
2408 | dev->aac_msix[0].vector_no = 0; | |
2409 | dev->aac_msix[0].dev = dev; | |
2410 | ||
2411 | if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, | |
2412 | IRQF_SHARED, "aacraid", | |
2413 | &(dev->aac_msix[0])) < 0) { | |
2414 | if (dev->msi) | |
2415 | pci_disable_msi(dev->pdev); | |
2416 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", | |
2417 | dev->name, dev->id); | |
2418 | ret = -1; | |
2419 | } | |
2420 | } | |
2421 | return ret; | |
2422 | } | |
2423 | ||
2424 | void aac_free_irq(struct aac_dev *dev) | |
2425 | { | |
2426 | int i; | |
2427 | int cpu; | |
2428 | ||
2429 | cpu = cpumask_first(cpu_online_mask); | |
2430 | if (dev->pdev->device == PMC_DEVICE_S6 || | |
2431 | dev->pdev->device == PMC_DEVICE_S7 || | |
2432 | dev->pdev->device == PMC_DEVICE_S8 || | |
2433 | dev->pdev->device == PMC_DEVICE_S9) { | |
2434 | if (dev->max_msix > 1) { | |
0910d8bb HR |
2435 | for (i = 0; i < dev->max_msix; i++) |
2436 | free_irq(pci_irq_vector(dev->pdev, i), | |
2437 | &(dev->aac_msix[i])); | |
8b1462e0 MR |
2438 | } else { |
2439 | free_irq(dev->pdev->irq, &(dev->aac_msix[0])); | |
2440 | } | |
2441 | } else { | |
2442 | free_irq(dev->pdev->irq, dev); | |
2443 | } | |
2444 | if (dev->msi) | |
2445 | pci_disable_msi(dev->pdev); | |
2446 | else if (dev->max_msix > 1) | |
2447 | pci_disable_msix(dev->pdev); | |
2448 | } |