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CommitLineData
1da177e4
LT
1/*
2 * Adaptec AAC series RAID controller driver
fa195afe 3 * (c) Copyright 2001 Red Hat Inc.
1da177e4
LT
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
e8b12f0f 8 * Copyright (c) 2000-2010 Adaptec, Inc.
1d4bcdad
RAR
9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
1da177e4
LT
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 * Module Name:
27 * commsup.c
28 *
29 * Abstract: Contain all routines that are required for FSA host/adapter
7c00ffa3 30 * communication.
1da177e4
LT
31 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/init.h>
36#include <linux/types.h>
37#include <linux/sched.h>
38#include <linux/pci.h>
39#include <linux/spinlock.h>
40#include <linux/slab.h>
41#include <linux/completion.h>
42#include <linux/blkdev.h>
164006da 43#include <linux/delay.h>
fe27381d 44#include <linux/kthread.h>
6a3670c4 45#include <linux/interrupt.h>
6188e10d 46#include <linux/semaphore.h>
abd03305 47#include <linux/bcd.h>
8c867b25 48#include <scsi/scsi.h>
7c00ffa3 49#include <scsi/scsi_host.h>
131256cf 50#include <scsi/scsi_device.h>
8c867b25 51#include <scsi/scsi_cmnd.h>
1da177e4
LT
52
53#include "aacraid.h"
54
55/**
56 * fib_map_alloc - allocate the fib objects
57 * @dev: Adapter to allocate for
58 *
59 * Allocate and map the shared PCI space for the FIB blocks used to
60 * talk to the Adaptec firmware.
61 */
8ce3eca4 62
1da177e4
LT
63static int fib_map_alloc(struct aac_dev *dev)
64{
932cc3d3
RAR
65 if (dev->max_fib_size > AAC_MAX_NATIVE_SIZE)
66 dev->max_cmd_size = AAC_MAX_NATIVE_SIZE;
67 else
68 dev->max_cmd_size = dev->max_fib_size;
5a05cc7c
RAR
69 if (dev->max_fib_size < AAC_MAX_NATIVE_SIZE) {
70 dev->max_cmd_size = AAC_MAX_NATIVE_SIZE;
71 } else {
72 dev->max_cmd_size = dev->max_fib_size;
73 }
932cc3d3 74
7c00ffa3 75 dprintk((KERN_INFO
d74d9d03
MR
76 "allocate hardware fibs dma_alloc_coherent(%p, %d * (%d + %d), %p)\n",
77 &dev->pdev->dev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue,
7c00ffa3 78 AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
d74d9d03 79 dev->hw_fib_va = dma_alloc_coherent(&dev->pdev->dev,
932cc3d3 80 (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr))
e8b12f0f 81 * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1),
d74d9d03 82 &dev->hw_fib_pa, GFP_KERNEL);
e8b12f0f 83 if (dev->hw_fib_va == NULL)
1da177e4
LT
84 return -ENOMEM;
85 return 0;
86}
87
88/**
bfb35aa8 89 * aac_fib_map_free - free the fib objects
1da177e4
LT
90 * @dev: Adapter to free
91 *
92 * Free the PCI mappings and the memory allocated for FIB blocks
93 * on this adapter.
94 */
95
bfb35aa8 96void aac_fib_map_free(struct aac_dev *dev)
1da177e4 97{
45f41c4d
RAR
98 size_t alloc_size;
99 size_t fib_size;
100 int num_fibs;
101
102 if(!dev->hw_fib_va || !dev->max_cmd_size)
103 return;
104
105 num_fibs = dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB;
106 fib_size = dev->max_fib_size + sizeof(struct aac_fib_xporthdr);
107 alloc_size = fib_size * num_fibs + ALIGN32 - 1;
108
d74d9d03
MR
109 dma_free_coherent(&dev->pdev->dev, alloc_size, dev->hw_fib_va,
110 dev->hw_fib_pa);
45f41c4d 111
9ad5204d
SM
112 dev->hw_fib_va = NULL;
113 dev->hw_fib_pa = 0;
1da177e4
LT
114}
115
3f4ce057
RAR
116void aac_fib_vector_assign(struct aac_dev *dev)
117{
118 u32 i = 0;
119 u32 vector = 1;
120 struct fib *fibptr = NULL;
121
122 for (i = 0, fibptr = &dev->fibs[i];
123 i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
124 i++, fibptr++) {
125 if ((dev->max_msix == 1) ||
126 (i > ((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1)
127 - dev->vector_cap))) {
128 fibptr->vector_no = 0;
129 } else {
130 fibptr->vector_no = vector;
131 vector++;
132 if (vector == dev->max_msix)
133 vector = 1;
134 }
135 }
136}
137
1da177e4 138/**
bfb35aa8 139 * aac_fib_setup - setup the fibs
1da177e4
LT
140 * @dev: Adapter to set up
141 *
b595076a 142 * Allocate the PCI space for the fibs, map it and then initialise the
1da177e4
LT
143 * fib area, the unmapped fib data and also the free list
144 */
145
bfb35aa8 146int aac_fib_setup(struct aac_dev * dev)
1da177e4
LT
147{
148 struct fib *fibptr;
a8166a52 149 struct hw_fib *hw_fib;
1da177e4
LT
150 dma_addr_t hw_fib_pa;
151 int i;
a1751cda 152 u32 max_cmds;
7c00ffa3
MH
153
154 while (((i = fib_map_alloc(dev)) == -ENOMEM)
155 && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
a1751cda
RAR
156 max_cmds = (dev->scsi_host_ptr->can_queue+AAC_NUM_MGT_FIB) >> 1;
157 dev->scsi_host_ptr->can_queue = max_cmds - AAC_NUM_MGT_FIB;
158 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)
159 dev->init->r7.max_io_commands = cpu_to_le32(max_cmds);
7c00ffa3
MH
160 }
161 if (i<0)
1da177e4 162 return -ENOMEM;
8ce3eca4 163
e8b12f0f 164 memset(dev->hw_fib_va, 0,
5a05cc7c 165 (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)) *
e8b12f0f
MR
166 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
167
45f41c4d
RAR
168 /* 32 byte alignment for PMC */
169 hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1);
170 hw_fib = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
171 (hw_fib_pa - dev->hw_fib_pa));
172
e8b12f0f 173 /* add Xport header */
45f41c4d 174 hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
e8b12f0f 175 sizeof(struct aac_fib_xporthdr));
45f41c4d 176 hw_fib_pa += sizeof(struct aac_fib_xporthdr);
e8b12f0f 177
1da177e4
LT
178 /*
179 * Initialise the fibs
180 */
8ce3eca4
SM
181 for (i = 0, fibptr = &dev->fibs[i];
182 i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
183 i++, fibptr++)
1da177e4 184 {
85d22bbf 185 fibptr->flags = 0;
6bf3b630 186 fibptr->size = sizeof(struct fib);
1da177e4 187 fibptr->dev = dev;
a8166a52
MH
188 fibptr->hw_fib_va = hw_fib;
189 fibptr->data = (void *) fibptr->hw_fib_va->data;
1da177e4 190 fibptr->next = fibptr+1; /* Forward chain the fibs */
6de76cfc 191 sema_init(&fibptr->event_wait, 0);
1da177e4 192 spin_lock_init(&fibptr->event_lock);
a8166a52 193 hw_fib->header.XferState = cpu_to_le32(0xffffffff);
5a05cc7c
RAR
194 hw_fib->header.SenderSize =
195 cpu_to_le16(dev->max_fib_size); /* ?? max_cmd_size */
1da177e4 196 fibptr->hw_fib_pa = hw_fib_pa;
5a05cc7c
RAR
197 fibptr->hw_sgl_pa = hw_fib_pa +
198 offsetof(struct aac_hba_cmd_req, sge[2]);
199 /*
200 * one element is for the ptr to the separate sg list,
201 * second element for 32 byte alignment
202 */
203 fibptr->hw_error_pa = hw_fib_pa +
204 offsetof(struct aac_native_hba, resp.resp_bytes[0]);
205
e8b12f0f 206 hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
932cc3d3 207 dev->max_cmd_size + sizeof(struct aac_fib_xporthdr));
e8b12f0f 208 hw_fib_pa = hw_fib_pa +
932cc3d3 209 dev->max_cmd_size + sizeof(struct aac_fib_xporthdr);
1da177e4 210 }
3f4ce057
RAR
211
212 /*
213 *Assign vector numbers to fibs
214 */
215 aac_fib_vector_assign(dev);
216
1da177e4
LT
217 /*
218 * Add the fib chain to the free list
219 */
7c00ffa3 220 dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
1da177e4 221 /*
6bf3b630
RAR
222 * Set 8 fibs aside for management tools
223 */
224 dev->free_fib = &dev->fibs[dev->scsi_host_ptr->can_queue];
1da177e4
LT
225 return 0;
226}
227
6bf3b630
RAR
228/**
229 * aac_fib_alloc_tag-allocate a fib using tags
230 * @dev: Adapter to allocate the fib for
231 *
232 * Allocate a fib from the adapter fib pool using tags
233 * from the blk layer.
234 */
235
236struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd)
237{
238 struct fib *fibptr;
239
240 fibptr = &dev->fibs[scmd->request->tag];
241 /*
242 * Null out fields that depend on being zero at the start of
243 * each I/O
244 */
245 fibptr->hw_fib_va->header.XferState = 0;
246 fibptr->type = FSAFS_NTC_FIB_CONTEXT;
247 fibptr->callback_data = NULL;
248 fibptr->callback = NULL;
249
250 return fibptr;
251}
252
1da177e4 253/**
bfb35aa8 254 * aac_fib_alloc - allocate a fib
1da177e4
LT
255 * @dev: Adapter to allocate the fib for
256 *
257 * Allocate a fib from the adapter fib pool. If the pool is empty we
7c00ffa3 258 * return NULL.
1da177e4 259 */
8ce3eca4 260
bfb35aa8 261struct fib *aac_fib_alloc(struct aac_dev *dev)
1da177e4
LT
262{
263 struct fib * fibptr;
264 unsigned long flags;
265 spin_lock_irqsave(&dev->fib_lock, flags);
8ce3eca4 266 fibptr = dev->free_fib;
7c00ffa3
MH
267 if(!fibptr){
268 spin_unlock_irqrestore(&dev->fib_lock, flags);
269 return fibptr;
270 }
1da177e4
LT
271 dev->free_fib = fibptr->next;
272 spin_unlock_irqrestore(&dev->fib_lock, flags);
273 /*
274 * Set the proper node type code and node byte size
275 */
276 fibptr->type = FSAFS_NTC_FIB_CONTEXT;
277 fibptr->size = sizeof(struct fib);
278 /*
279 * Null out fields that depend on being zero at the start of
280 * each I/O
281 */
a8166a52 282 fibptr->hw_fib_va->header.XferState = 0;
b6ef70f3 283 fibptr->flags = 0;
1da177e4
LT
284 fibptr->callback = NULL;
285 fibptr->callback_data = NULL;
286
287 return fibptr;
288}
289
290/**
bfb35aa8 291 * aac_fib_free - free a fib
1da177e4
LT
292 * @fibptr: fib to free up
293 *
294 * Frees up a fib and places it on the appropriate queue
1da177e4 295 */
8ce3eca4 296
bfb35aa8 297void aac_fib_free(struct fib *fibptr)
1da177e4 298{
ef616233 299 unsigned long flags;
cacb6dc3 300
ef616233 301 if (fibptr->done == 2)
cacb6dc3 302 return;
1da177e4
LT
303
304 spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
03d44337 305 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 306 aac_config.fib_timeouts++;
5a05cc7c
RAR
307 if (!(fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) &&
308 fibptr->hw_fib_va->header.XferState != 0) {
03d44337
MH
309 printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
310 (void*)fibptr,
311 le32_to_cpu(fibptr->hw_fib_va->header.XferState));
312 }
313 fibptr->next = fibptr->dev->free_fib;
314 fibptr->dev->free_fib = fibptr;
1da177e4
LT
315 spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
316}
317
318/**
bfb35aa8 319 * aac_fib_init - initialise a fib
1da177e4 320 * @fibptr: The fib to initialize
8ce3eca4 321 *
1da177e4
LT
322 * Set up the generic fib fields ready for use
323 */
8ce3eca4 324
bfb35aa8 325void aac_fib_init(struct fib *fibptr)
1da177e4 326{
a8166a52 327 struct hw_fib *hw_fib = fibptr->hw_fib_va;
1da177e4 328
85d22bbf 329 memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr));
1da177e4 330 hw_fib->header.StructType = FIB_MAGIC;
7c00ffa3
MH
331 hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
332 hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
85d22bbf 333 hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
7c00ffa3 334 hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
1da177e4
LT
335}
336
337/**
338 * fib_deallocate - deallocate a fib
339 * @fibptr: fib to deallocate
340 *
341 * Will deallocate and return to the free pool the FIB pointed to by the
342 * caller.
343 */
8ce3eca4 344
4833869e 345static void fib_dealloc(struct fib * fibptr)
1da177e4 346{
a8166a52 347 struct hw_fib *hw_fib = fibptr->hw_fib_va;
8ce3eca4 348 hw_fib->header.XferState = 0;
1da177e4
LT
349}
350
351/*
352 * Commuication primitives define and support the queuing method we use to
353 * support host to adapter commuication. All queue accesses happen through
354 * these routines and are the only routines which have a knowledge of the
355 * how these queues are implemented.
356 */
8ce3eca4 357
1da177e4
LT
358/**
359 * aac_get_entry - get a queue entry
360 * @dev: Adapter
361 * @qid: Queue Number
362 * @entry: Entry return
363 * @index: Index return
364 * @nonotify: notification control
365 *
366 * With a priority the routine returns a queue entry if the queue has free entries. If the queue
367 * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
368 * returned.
369 */
8ce3eca4 370
1da177e4
LT
371static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
372{
373 struct aac_queue * q;
bed30de4 374 unsigned long idx;
1da177e4
LT
375
376 /*
377 * All of the queues wrap when they reach the end, so we check
378 * to see if they have reached the end and if they have we just
379 * set the index back to zero. This is a wrap. You could or off
380 * the high bits in all updates but this is a bit faster I think.
381 */
382
383 q = &dev->queues->queue[qid];
bed30de4
MH
384
385 idx = *index = le32_to_cpu(*(q->headers.producer));
386 /* Interrupt Moderation, only interrupt for first two entries */
387 if (idx != le32_to_cpu(*(q->headers.consumer))) {
388 if (--idx == 0) {
1640a2c3 389 if (qid == AdapNormCmdQueue)
bed30de4 390 idx = ADAP_NORM_CMD_ENTRIES;
1640a2c3 391 else
bed30de4
MH
392 idx = ADAP_NORM_RESP_ENTRIES;
393 }
394 if (idx != le32_to_cpu(*(q->headers.consumer)))
8ce3eca4 395 *nonotify = 1;
bed30de4 396 }
1da177e4 397
1640a2c3 398 if (qid == AdapNormCmdQueue) {
8ce3eca4 399 if (*index >= ADAP_NORM_CMD_ENTRIES)
1da177e4 400 *index = 0; /* Wrap to front of the Producer Queue. */
1640a2c3 401 } else {
8ce3eca4 402 if (*index >= ADAP_NORM_RESP_ENTRIES)
1da177e4
LT
403 *index = 0; /* Wrap to front of the Producer Queue. */
404 }
1da177e4 405
8ce3eca4
SM
406 /* Queue is full */
407 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) {
7c00ffa3 408 printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
ef616233 409 qid, atomic_read(&q->numpending));
1da177e4
LT
410 return 0;
411 } else {
8ce3eca4 412 *entry = q->base + *index;
1da177e4
LT
413 return 1;
414 }
8ce3eca4 415}
1da177e4
LT
416
417/**
418 * aac_queue_get - get the next free QE
419 * @dev: Adapter
420 * @index: Returned index
421 * @priority: Priority of fib
422 * @fib: Fib to associate with the queue entry
423 * @wait: Wait if queue full
424 * @fibptr: Driver fib object to go with fib
425 * @nonotify: Don't notify the adapter
426 *
427 * Gets the next free QE off the requested priorty adapter command
428 * queue and associates the Fib with the QE. The QE represented by
429 * index is ready to insert on the queue when this routine returns
430 * success.
431 */
432
28713324 433int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
1da177e4
LT
434{
435 struct aac_entry * entry = NULL;
436 int map = 0;
8ce3eca4 437
1640a2c3 438 if (qid == AdapNormCmdQueue) {
1da177e4 439 /* if no entries wait for some if caller wants to */
8ce3eca4 440 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
441 printk(KERN_ERR "GetEntries failed\n");
442 }
8ce3eca4
SM
443 /*
444 * Setup queue entry with a command, status and fib mapped
445 */
446 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
447 map = 1;
1640a2c3 448 } else {
8ce3eca4 449 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
450 /* if no entries wait for some if caller wants to */
451 }
8ce3eca4
SM
452 /*
453 * Setup queue entry with command, status and fib mapped
454 */
455 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
456 entry->addr = hw_fib->header.SenderFibAddress;
457 /* Restore adapters pointer to the FIB */
85d22bbf 458 hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
8ce3eca4 459 map = 0;
1da177e4
LT
460 }
461 /*
462 * If MapFib is true than we need to map the Fib and put pointers
463 * in the queue entry.
464 */
465 if (map)
466 entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
467 return 0;
468}
469
9fad09f7
RAR
470#ifdef CONFIG_EEH
471static inline int aac_check_eeh_failure(struct aac_dev *dev)
472{
473 /* Check for an EEH failure for the given
474 * device node. Function eeh_dev_check_failure()
475 * returns 0 if there has not been an EEH error
476 * otherwise returns a non-zero value.
477 *
478 * Need to be called before any PCI operation,
479 * i.e.,before aac_adapter_check_health()
480 */
481 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev->pdev);
482
483 if (eeh_dev_check_failure(edev)) {
484 /* The EEH mechanisms will handle this
485 * error and reset the device if
486 * necessary.
487 */
488 return 1;
489 }
490 return 0;
491}
492#else
493static inline int aac_check_eeh_failure(struct aac_dev *dev)
494{
495 return 0;
496}
497#endif
498
1da177e4 499/*
8ce3eca4
SM
500 * Define the highest level of host to adapter communication routines.
501 * These routines will support host to adapter FS commuication. These
1da177e4
LT
502 * routines have no knowledge of the commuication method used. This level
503 * sends and receives FIBs. This level has no knowledge of how these FIBs
504 * get passed back and forth.
505 */
506
507/**
bfb35aa8 508 * aac_fib_send - send a fib to the adapter
1da177e4
LT
509 * @command: Command to send
510 * @fibptr: The fib
511 * @size: Size of fib data area
512 * @priority: Priority of Fib
513 * @wait: Async/sync select
514 * @reply: True if a reply is wanted
515 * @callback: Called with reply
516 * @callback_data: Passed to callback
517 *
518 * Sends the requested FIB to the adapter and optionally will wait for a
519 * response FIB. If the caller does not wish to wait for a response than
520 * an event to wait on must be supplied. This event will be set when a
521 * response FIB is received from the adapter.
522 */
8ce3eca4 523
bfb35aa8
MH
524int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
525 int priority, int wait, int reply, fib_callback callback,
526 void *callback_data)
1da177e4 527{
1da177e4 528 struct aac_dev * dev = fibptr->dev;
a8166a52 529 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 530 unsigned long flags = 0;
cacb6dc3 531 unsigned long mflags = 0;
11604612 532 unsigned long sflags = 0;
cacb6dc3 533
1da177e4
LT
534 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
535 return -EBUSY;
7d04d85a
RAR
536
537 if (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))
538 return -EINVAL;
539
1da177e4 540 /*
25985edc 541 * There are 5 cases with the wait and response requested flags.
1da177e4
LT
542 * The only invalid cases are if the caller requests to wait and
543 * does not request a response and if the caller does not want a
544 * response and the Fib is not allocated from pool. If a response
545 * is not requesed the Fib will just be deallocaed by the DPC
546 * routine when the response comes back from the adapter. No
8ce3eca4 547 * further processing will be done besides deleting the Fib. We
1da177e4
LT
548 * will have a debug mode where the adapter can notify the host
549 * it had a problem and the host can log that fact.
550 */
b6ef70f3 551 fibptr->flags = 0;
1da177e4
LT
552 if (wait && !reply) {
553 return -EINVAL;
554 } else if (!wait && reply) {
555 hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
556 FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
557 } else if (!wait && !reply) {
558 hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
559 FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
560 } else if (wait && reply) {
561 hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
562 FIB_COUNTER_INCREMENT(aac_config.NormalSent);
8ce3eca4 563 }
1da177e4
LT
564 /*
565 * Map the fib into 32bits by using the fib number
566 */
567
5a05cc7c
RAR
568 hw_fib->header.SenderFibAddress =
569 cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
570
571 /* use the same shifted value for handle to be compatible
572 * with the new native hba command handle
573 */
574 hw_fib->header.Handle =
575 cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1);
576
1da177e4
LT
577 /*
578 * Set FIB state to indicate where it came from and if we want a
579 * response from the adapter. Also load the command from the
580 * caller.
581 *
582 * Map the hw fib pointer as a 32bit value
583 */
584 hw_fib->header.Command = cpu_to_le16(command);
585 hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
1da177e4
LT
586 /*
587 * Set the size of the Fib we want to send to the adapter
588 */
589 hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
590 if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
591 return -EMSGSIZE;
8ce3eca4 592 }
1da177e4
LT
593 /*
594 * Get a queue entry connect the FIB to it and send an notify
595 * the adapter a command is ready.
596 */
1640a2c3 597 hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
1da177e4 598
1da177e4
LT
599 /*
600 * Fill in the Callback and CallbackContext if we are not
601 * going to wait.
602 */
603 if (!wait) {
604 fibptr->callback = callback;
605 fibptr->callback_data = callback_data;
b6ef70f3 606 fibptr->flags = FIB_CONTEXT_FLAG;
1da177e4 607 }
1da177e4
LT
608
609 fibptr->done = 0;
1da177e4 610
1640a2c3
MH
611 FIB_COUNTER_INCREMENT(aac_config.FibsSent);
612
1640a2c3 613 dprintk((KERN_DEBUG "Fib contents:.\n"));
8e0c5ebd
MH
614 dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
615 dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
616 dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
a8166a52 617 dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va));
1640a2c3
MH
618 dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
619 dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
620
c8f7b073 621 if (!dev->queues)
65101355 622 return -EBUSY;
1640a2c3 623
cacb6dc3
PNRCEH
624 if (wait) {
625
626 spin_lock_irqsave(&dev->manage_lock, mflags);
627 if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
628 printk(KERN_INFO "No management Fibs Available:%d\n",
629 dev->management_fib_count);
630 spin_unlock_irqrestore(&dev->manage_lock, mflags);
631 return -EBUSY;
632 }
633 dev->management_fib_count++;
634 spin_unlock_irqrestore(&dev->manage_lock, mflags);
1640a2c3 635 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3
PNRCEH
636 }
637
11604612
MR
638 if (dev->sync_mode) {
639 if (wait)
640 spin_unlock_irqrestore(&fibptr->event_lock, flags);
641 spin_lock_irqsave(&dev->sync_lock, sflags);
642 if (dev->sync_fib) {
643 list_add_tail(&fibptr->fiblink, &dev->sync_fib_list);
644 spin_unlock_irqrestore(&dev->sync_lock, sflags);
645 } else {
646 dev->sync_fib = fibptr;
647 spin_unlock_irqrestore(&dev->sync_lock, sflags);
648 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
649 (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0,
650 NULL, NULL, NULL, NULL, NULL);
651 }
652 if (wait) {
653 fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
654 if (down_interruptible(&fibptr->event_wait)) {
655 fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT;
656 return -EFAULT;
657 }
658 return 0;
659 }
660 return -EINPROGRESS;
661 }
662
cacb6dc3
PNRCEH
663 if (aac_adapter_deliver(fibptr) != 0) {
664 printk(KERN_ERR "aac_fib_send: returned -EBUSY\n");
665 if (wait) {
666 spin_unlock_irqrestore(&fibptr->event_lock, flags);
667 spin_lock_irqsave(&dev->manage_lock, mflags);
668 dev->management_fib_count--;
669 spin_unlock_irqrestore(&dev->manage_lock, mflags);
670 }
671 return -EBUSY;
672 }
673
8e0c5ebd 674
1da177e4 675 /*
8ce3eca4 676 * If the caller wanted us to wait for response wait now.
1da177e4 677 */
8ce3eca4 678
1da177e4
LT
679 if (wait) {
680 spin_unlock_irqrestore(&fibptr->event_lock, flags);
9203344c
MH
681 /* Only set for first known interruptable command */
682 if (wait < 0) {
683 /*
684 * *VERY* Dangerous to time out a command, the
685 * assumption is made that we have no hope of
686 * functioning because an interrupt routing or other
687 * hardware failure has occurred.
688 */
30002f1c 689 unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */
9203344c 690 while (down_trylock(&fibptr->event_wait)) {
33524b70 691 int blink;
30002f1c 692 if (time_is_before_eq_jiffies(timeout)) {
28713324 693 struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
ef616233 694 atomic_dec(&q->numpending);
9203344c 695 if (wait == -1) {
bfb35aa8 696 printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
9203344c
MH
697 "Usually a result of a PCI interrupt routing problem;\n"
698 "update mother board BIOS or consider utilizing one of\n"
699 "the SAFE mode kernel options (acpi, apic etc)\n");
700 }
701 return -ETIMEDOUT;
702 }
9fad09f7
RAR
703
704 if (aac_check_eeh_failure(dev))
705 return -EFAULT;
706
33524b70
MH
707 if ((blink = aac_adapter_check_health(dev)) > 0) {
708 if (wait == -1) {
709 printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n"
710 "Usually a result of a serious unrecoverable hardware problem\n",
711 blink);
712 }
713 return -EFAULT;
714 }
07beca2b
RAR
715 /*
716 * Allow other processes / CPUS to use core
717 */
718 schedule();
9203344c 719 }
0462590e 720 } else if (down_interruptible(&fibptr->event_wait)) {
cacb6dc3
PNRCEH
721 /* Do nothing ... satisfy
722 * down_interruptible must_check */
e6990c64 723 }
cacb6dc3 724
33bb3b29 725 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3 726 if (fibptr->done == 0) {
33bb3b29 727 fibptr->done = 2; /* Tell interrupt we aborted */
c8f7b073 728 spin_unlock_irqrestore(&fibptr->event_lock, flags);
cacb6dc3 729 return -ERESTARTSYS;
c8f7b073 730 }
33bb3b29 731 spin_unlock_irqrestore(&fibptr->event_lock, flags);
125e1874 732 BUG_ON(fibptr->done == 0);
8ce3eca4 733
912d4e88 734 if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 735 return -ETIMEDOUT;
912d4e88 736 return 0;
1da177e4
LT
737 }
738 /*
739 * If the user does not want a response than return success otherwise
740 * return pending
741 */
742 if (reply)
743 return -EINPROGRESS;
744 else
745 return 0;
746}
747
5a05cc7c
RAR
748int aac_hba_send(u8 command, struct fib *fibptr, fib_callback callback,
749 void *callback_data)
750{
751 struct aac_dev *dev = fibptr->dev;
752 int wait;
753 unsigned long flags = 0;
754 unsigned long mflags = 0;
755
756 fibptr->flags = (FIB_CONTEXT_FLAG | FIB_CONTEXT_FLAG_NATIVE_HBA);
757 if (callback) {
758 wait = 0;
759 fibptr->callback = callback;
760 fibptr->callback_data = callback_data;
761 } else
762 wait = 1;
763
764
765 if (command == HBA_IU_TYPE_SCSI_CMD_REQ) {
766 struct aac_hba_cmd_req *hbacmd =
767 (struct aac_hba_cmd_req *)fibptr->hw_fib_va;
768
769 hbacmd->iu_type = command;
770 /* bit1 of request_id must be 0 */
771 hbacmd->request_id =
772 cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1);
773 } else
774 return -EINVAL;
775
776
777 if (wait) {
778 spin_lock_irqsave(&dev->manage_lock, mflags);
779 if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
780 spin_unlock_irqrestore(&dev->manage_lock, mflags);
781 return -EBUSY;
782 }
783 dev->management_fib_count++;
784 spin_unlock_irqrestore(&dev->manage_lock, mflags);
785 spin_lock_irqsave(&fibptr->event_lock, flags);
786 }
787
788 if (aac_adapter_deliver(fibptr) != 0) {
789 if (wait) {
790 spin_unlock_irqrestore(&fibptr->event_lock, flags);
791 spin_lock_irqsave(&dev->manage_lock, mflags);
792 dev->management_fib_count--;
793 spin_unlock_irqrestore(&dev->manage_lock, mflags);
794 }
795 return -EBUSY;
796 }
797 FIB_COUNTER_INCREMENT(aac_config.NativeSent);
798
799 if (wait) {
9fad09f7 800
5a05cc7c 801 spin_unlock_irqrestore(&fibptr->event_lock, flags);
9fad09f7
RAR
802
803 if (aac_check_eeh_failure(dev))
804 return -EFAULT;
805
5a05cc7c
RAR
806 /* Only set for first known interruptable command */
807 if (down_interruptible(&fibptr->event_wait)) {
808 fibptr->done = 2;
809 up(&fibptr->event_wait);
810 }
811 spin_lock_irqsave(&fibptr->event_lock, flags);
812 if ((fibptr->done == 0) || (fibptr->done == 2)) {
813 fibptr->done = 2; /* Tell interrupt we aborted */
814 spin_unlock_irqrestore(&fibptr->event_lock, flags);
815 return -ERESTARTSYS;
816 }
817 spin_unlock_irqrestore(&fibptr->event_lock, flags);
818 WARN_ON(fibptr->done == 0);
819
820 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
821 return -ETIMEDOUT;
822
823 return 0;
824 }
825
826 return -EINPROGRESS;
827}
828
8ce3eca4 829/**
1da177e4
LT
830 * aac_consumer_get - get the top of the queue
831 * @dev: Adapter
832 * @q: Queue
833 * @entry: Return entry
834 *
835 * Will return a pointer to the entry on the top of the queue requested that
8ce3eca4
SM
836 * we are a consumer of, and return the address of the queue entry. It does
837 * not change the state of the queue.
1da177e4
LT
838 */
839
840int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
841{
842 u32 index;
843 int status;
844 if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
845 status = 0;
846 } else {
847 /*
848 * The consumer index must be wrapped if we have reached
849 * the end of the queue, else we just use the entry
850 * pointed to by the header index
851 */
8ce3eca4
SM
852 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
853 index = 0;
1da177e4 854 else
8ce3eca4 855 index = le32_to_cpu(*q->headers.consumer);
1da177e4
LT
856 *entry = q->base + index;
857 status = 1;
858 }
859 return(status);
860}
861
862/**
863 * aac_consumer_free - free consumer entry
864 * @dev: Adapter
865 * @q: Queue
866 * @qid: Queue ident
867 *
868 * Frees up the current top of the queue we are a consumer of. If the
869 * queue was full notify the producer that the queue is no longer full.
870 */
871
872void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
873{
874 int wasfull = 0;
875 u32 notify;
876
877 if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
878 wasfull = 1;
8ce3eca4 879
1da177e4
LT
880 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
881 *q->headers.consumer = cpu_to_le32(1);
882 else
36b8dd1b 883 le32_add_cpu(q->headers.consumer, 1);
8ce3eca4 884
1da177e4
LT
885 if (wasfull) {
886 switch (qid) {
887
888 case HostNormCmdQueue:
889 notify = HostNormCmdNotFull;
890 break;
1da177e4
LT
891 case HostNormRespQueue:
892 notify = HostNormRespNotFull;
893 break;
1da177e4
LT
894 default:
895 BUG();
896 return;
897 }
898 aac_adapter_notify(dev, notify);
899 }
8ce3eca4 900}
1da177e4
LT
901
902/**
bfb35aa8 903 * aac_fib_adapter_complete - complete adapter issued fib
1da177e4
LT
904 * @fibptr: fib to complete
905 * @size: size of fib
906 *
907 * Will do all necessary work to complete a FIB that was sent from
908 * the adapter.
909 */
910
bfb35aa8 911int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
1da177e4 912{
a8166a52 913 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 914 struct aac_dev * dev = fibptr->dev;
1640a2c3 915 struct aac_queue * q;
1da177e4 916 unsigned long nointr = 0;
1640a2c3
MH
917 unsigned long qflags;
918
85d22bbf 919 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 ||
a1751cda
RAR
920 dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 ||
921 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) {
e8b12f0f
MR
922 kfree(hw_fib);
923 return 0;
924 }
925
1640a2c3 926 if (hw_fib->header.XferState == 0) {
28713324 927 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 928 kfree(hw_fib);
8ce3eca4 929 return 0;
1640a2c3 930 }
1da177e4
LT
931 /*
932 * If we plan to do anything check the structure type first.
8ce3eca4 933 */
85d22bbf
MR
934 if (hw_fib->header.StructType != FIB_MAGIC &&
935 hw_fib->header.StructType != FIB_MAGIC2 &&
936 hw_fib->header.StructType != FIB_MAGIC2_64) {
28713324 937 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 938 kfree(hw_fib);
8ce3eca4 939 return -EINVAL;
1da177e4
LT
940 }
941 /*
942 * This block handles the case where the adapter had sent us a
943 * command and we have finished processing the command. We
8ce3eca4
SM
944 * call completeFib when we are done processing the command
945 * and want to send a response back to the adapter. This will
1da177e4
LT
946 * send the completed cdb to the adapter.
947 */
948 if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
28713324 949 if (dev->comm_interface == AAC_COMM_MESSAGE) {
8e0c5ebd
MH
950 kfree (hw_fib);
951 } else {
8ce3eca4
SM
952 u32 index;
953 hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
8e0c5ebd
MH
954 if (size) {
955 size += sizeof(struct aac_fibhdr);
8ce3eca4 956 if (size > le16_to_cpu(hw_fib->header.SenderSize))
8e0c5ebd
MH
957 return -EMSGSIZE;
958 hw_fib->header.Size = cpu_to_le16(size);
959 }
960 q = &dev->queues->queue[AdapNormRespQueue];
961 spin_lock_irqsave(q->lock, qflags);
962 aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
963 *(q->headers.producer) = cpu_to_le32(index + 1);
964 spin_unlock_irqrestore(q->lock, qflags);
965 if (!(nointr & (int)aac_config.irq_mod))
966 aac_adapter_notify(dev, AdapNormRespQueue);
1da177e4 967 }
8ce3eca4
SM
968 } else {
969 printk(KERN_WARNING "aac_fib_adapter_complete: "
970 "Unknown xferstate detected.\n");
971 BUG();
1da177e4 972 }
1da177e4
LT
973 return 0;
974}
975
976/**
bfb35aa8 977 * aac_fib_complete - fib completion handler
1da177e4
LT
978 * @fib: FIB to complete
979 *
980 * Will do all necessary work to complete a FIB.
981 */
8ce3eca4 982
bfb35aa8 983int aac_fib_complete(struct fib *fibptr)
1da177e4 984{
a8166a52 985 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 986
5a05cc7c
RAR
987 if (fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) {
988 fib_dealloc(fibptr);
989 return 0;
990 }
991
1da177e4 992 /*
5a05cc7c
RAR
993 * Check for a fib which has already been completed or with a
994 * status wait timeout
1da177e4
LT
995 */
996
5a05cc7c 997 if (hw_fib->header.XferState == 0 || fibptr->done == 2)
8ce3eca4 998 return 0;
1da177e4
LT
999 /*
1000 * If we plan to do anything check the structure type first.
8ce3eca4 1001 */
1da177e4 1002
85d22bbf
MR
1003 if (hw_fib->header.StructType != FIB_MAGIC &&
1004 hw_fib->header.StructType != FIB_MAGIC2 &&
1005 hw_fib->header.StructType != FIB_MAGIC2_64)
8ce3eca4 1006 return -EINVAL;
1da177e4 1007 /*
8ce3eca4 1008 * This block completes a cdb which orginated on the host and we
1da177e4
LT
1009 * just need to deallocate the cdb or reinit it. At this point the
1010 * command is complete that we had sent to the adapter and this
1011 * cdb could be reused.
1012 */
cacb6dc3 1013
1da177e4
LT
1014 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
1015 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
1016 {
1017 fib_dealloc(fibptr);
1018 }
1019 else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
1020 {
1021 /*
1022 * This handles the case when the host has aborted the I/O
1023 * to the adapter because the adapter is not responding
1024 */
1025 fib_dealloc(fibptr);
1026 } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
1027 fib_dealloc(fibptr);
1028 } else {
1029 BUG();
8ce3eca4 1030 }
1da177e4
LT
1031 return 0;
1032}
1033
1034/**
1035 * aac_printf - handle printf from firmware
1036 * @dev: Adapter
1037 * @val: Message info
1038 *
1039 * Print a message passed to us by the controller firmware on the
1040 * Adaptec board
1041 */
1042
1043void aac_printf(struct aac_dev *dev, u32 val)
1044{
1da177e4 1045 char *cp = dev->printfbuf;
7c00ffa3
MH
1046 if (dev->printf_enabled)
1047 {
1048 int length = val & 0xffff;
1049 int level = (val >> 16) & 0xffff;
8ce3eca4 1050
7c00ffa3
MH
1051 /*
1052 * The size of the printfbuf is set in port.c
1053 * There is no variable or define for it
1054 */
1055 if (length > 255)
1056 length = 255;
1057 if (cp[length] != 0)
1058 cp[length] = 0;
1059 if (level == LOG_AAC_HIGH_ERROR)
1241f359 1060 printk(KERN_WARNING "%s:%s", dev->name, cp);
7c00ffa3 1061 else
1241f359 1062 printk(KERN_INFO "%s:%s", dev->name, cp);
7c00ffa3 1063 }
8ce3eca4 1064 memset(cp, 0, 256);
1da177e4
LT
1065}
1066
9cb62fa2
RAR
1067static inline int aac_aif_data(struct aac_aifcmd *aifcmd, uint32_t index)
1068{
1069 return le32_to_cpu(((__le32 *)aifcmd->data)[index]);
1070}
1071
1072
1073static void aac_handle_aif_bu(struct aac_dev *dev, struct aac_aifcmd *aifcmd)
1074{
1075 switch (aac_aif_data(aifcmd, 1)) {
1076 case AifBuCacheDataLoss:
1077 if (aac_aif_data(aifcmd, 2))
1078 dev_info(&dev->pdev->dev, "Backup unit had cache data loss - [%d]\n",
1079 aac_aif_data(aifcmd, 2));
1080 else
1081 dev_info(&dev->pdev->dev, "Backup Unit had cache data loss\n");
1082 break;
1083 case AifBuCacheDataRecover:
1084 if (aac_aif_data(aifcmd, 2))
1085 dev_info(&dev->pdev->dev, "DDR cache data recovered successfully - [%d]\n",
1086 aac_aif_data(aifcmd, 2));
1087 else
1088 dev_info(&dev->pdev->dev, "DDR cache data recovered successfully\n");
1089 break;
1090 }
1091}
131256cf
MH
1092
1093/**
1094 * aac_handle_aif - Handle a message from the firmware
1095 * @dev: Which adapter this fib is from
1096 * @fibptr: Pointer to fibptr from adapter
1097 *
1098 * This routine handles a driver notify fib from the adapter and
1099 * dispatches it to the appropriate routine for handling.
1100 */
1101
495c0217 1102#define AIF_SNIFF_TIMEOUT (500*HZ)
131256cf
MH
1103static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
1104{
a8166a52 1105 struct hw_fib * hw_fib = fibptr->hw_fib_va;
131256cf 1106 struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
0995ad38 1107 u32 channel, id, lun, container;
131256cf
MH
1108 struct scsi_device *device;
1109 enum {
1110 NOTHING,
1111 DELETE,
1112 ADD,
1113 CHANGE
0995ad38 1114 } device_config_needed = NOTHING;
131256cf
MH
1115
1116 /* Sniff for container changes */
1117
c8f7b073 1118 if (!dev || !dev->fsa_dev)
131256cf 1119 return;
0995ad38 1120 container = channel = id = lun = (u32)-1;
131256cf
MH
1121
1122 /*
1123 * We have set this up to try and minimize the number of
1124 * re-configures that take place. As a result of this when
1125 * certain AIF's come in we will set a flag waiting for another
1126 * type of AIF before setting the re-config flag.
1127 */
1128 switch (le32_to_cpu(aifcmd->command)) {
1129 case AifCmdDriverNotify:
f3307f72 1130 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
dab04b01
MR
1131 case AifRawDeviceRemove:
1132 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
1133 if ((container >> 28)) {
1134 container = (u32)-1;
1135 break;
1136 }
1137 channel = (container >> 24) & 0xF;
1138 if (channel >= dev->maximum_num_channels) {
1139 container = (u32)-1;
1140 break;
1141 }
1142 id = container & 0xFFFF;
1143 if (id >= dev->maximum_num_physicals) {
1144 container = (u32)-1;
1145 break;
1146 }
1147 lun = (container >> 16) & 0xFF;
1148 container = (u32)-1;
1149 channel = aac_phys_to_logical(channel);
5a05cc7c 1150 device_config_needed = DELETE;
dab04b01 1151 break;
5a05cc7c 1152
131256cf
MH
1153 /*
1154 * Morph or Expand complete
1155 */
1156 case AifDenMorphComplete:
1157 case AifDenVolumeExtendComplete:
f3307f72 1158 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1159 if (container >= dev->maximum_num_containers)
1160 break;
1161
1162 /*
f64a181d 1163 * Find the scsi_device associated with the SCSI
131256cf
MH
1164 * address. Make sure we have the right array, and if
1165 * so set the flag to initiate a new re-config once we
1166 * see an AifEnConfigChange AIF come through.
1167 */
1168
1169 if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
8ce3eca4
SM
1170 device = scsi_device_lookup(dev->scsi_host_ptr,
1171 CONTAINER_TO_CHANNEL(container),
1172 CONTAINER_TO_ID(container),
131256cf
MH
1173 CONTAINER_TO_LUN(container));
1174 if (device) {
1175 dev->fsa_dev[container].config_needed = CHANGE;
1176 dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
31876f32 1177 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1178 scsi_device_put(device);
1179 }
1180 }
1181 }
1182
1183 /*
1184 * If we are waiting on something and this happens to be
1185 * that thing then set the re-configure flag.
1186 */
1187 if (container != (u32)-1) {
1188 if (container >= dev->maximum_num_containers)
1189 break;
31876f32 1190 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1191 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1192 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1193 dev->fsa_dev[container].config_waiting_on = 0;
1194 } else for (container = 0;
1195 container < dev->maximum_num_containers; ++container) {
31876f32 1196 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1197 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1198 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1199 dev->fsa_dev[container].config_waiting_on = 0;
1200 }
1201 break;
1202
1203 case AifCmdEventNotify:
f3307f72 1204 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
95e852e1
SM
1205 case AifEnBatteryEvent:
1206 dev->cache_protected =
1207 (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3));
1208 break;
131256cf
MH
1209 /*
1210 * Add an Array.
1211 */
1212 case AifEnAddContainer:
f3307f72 1213 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1214 if (container >= dev->maximum_num_containers)
1215 break;
1216 dev->fsa_dev[container].config_needed = ADD;
1217 dev->fsa_dev[container].config_waiting_on =
1218 AifEnConfigChange;
31876f32 1219 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1220 break;
1221
1222 /*
1223 * Delete an Array.
1224 */
1225 case AifEnDeleteContainer:
f3307f72 1226 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1227 if (container >= dev->maximum_num_containers)
1228 break;
1229 dev->fsa_dev[container].config_needed = DELETE;
1230 dev->fsa_dev[container].config_waiting_on =
1231 AifEnConfigChange;
31876f32 1232 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1233 break;
1234
1235 /*
1236 * Container change detected. If we currently are not
1237 * waiting on something else, setup to wait on a Config Change.
1238 */
1239 case AifEnContainerChange:
f3307f72 1240 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
1241 if (container >= dev->maximum_num_containers)
1242 break;
31876f32
MH
1243 if (dev->fsa_dev[container].config_waiting_on &&
1244 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1245 break;
1246 dev->fsa_dev[container].config_needed = CHANGE;
1247 dev->fsa_dev[container].config_waiting_on =
1248 AifEnConfigChange;
31876f32 1249 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
1250 break;
1251
1252 case AifEnConfigChange:
1253 break;
1254
cb1042f2
SM
1255 case AifEnAddJBOD:
1256 case AifEnDeleteJBOD:
1257 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
a4576b5d
MS
1258 if ((container >> 28)) {
1259 container = (u32)-1;
cb1042f2 1260 break;
a4576b5d 1261 }
cb1042f2 1262 channel = (container >> 24) & 0xF;
a4576b5d
MS
1263 if (channel >= dev->maximum_num_channels) {
1264 container = (u32)-1;
cb1042f2 1265 break;
a4576b5d 1266 }
cb1042f2 1267 id = container & 0xFFFF;
a4576b5d
MS
1268 if (id >= dev->maximum_num_physicals) {
1269 container = (u32)-1;
cb1042f2 1270 break;
a4576b5d 1271 }
cb1042f2 1272 lun = (container >> 16) & 0xFF;
a4576b5d 1273 container = (u32)-1;
cb1042f2
SM
1274 channel = aac_phys_to_logical(channel);
1275 device_config_needed =
1276 (((__le32 *)aifcmd->data)[0] ==
1277 cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE;
5ca05594
RM
1278 if (device_config_needed == ADD) {
1279 device = scsi_device_lookup(dev->scsi_host_ptr,
1280 channel,
1281 id,
1282 lun);
1283 if (device) {
1284 scsi_remove_device(device);
1285 scsi_device_put(device);
1286 }
1287 }
cb1042f2
SM
1288 break;
1289
0995ad38 1290 case AifEnEnclosureManagement:
cb1042f2
SM
1291 /*
1292 * If in JBOD mode, automatic exposure of new
1293 * physical target to be suppressed until configured.
1294 */
1295 if (dev->jbod)
1296 break;
0995ad38
SM
1297 switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) {
1298 case EM_DRIVE_INSERTION:
1299 case EM_DRIVE_REMOVAL:
46154a02
MR
1300 case EM_SES_DRIVE_INSERTION:
1301 case EM_SES_DRIVE_REMOVAL:
0995ad38
SM
1302 container = le32_to_cpu(
1303 ((__le32 *)aifcmd->data)[2]);
a4576b5d
MS
1304 if ((container >> 28)) {
1305 container = (u32)-1;
0995ad38 1306 break;
a4576b5d 1307 }
0995ad38 1308 channel = (container >> 24) & 0xF;
a4576b5d
MS
1309 if (channel >= dev->maximum_num_channels) {
1310 container = (u32)-1;
0995ad38 1311 break;
a4576b5d 1312 }
0995ad38
SM
1313 id = container & 0xFFFF;
1314 lun = (container >> 16) & 0xFF;
a4576b5d 1315 container = (u32)-1;
0995ad38
SM
1316 if (id >= dev->maximum_num_physicals) {
1317 /* legacy dev_t ? */
1318 if ((0x2000 <= id) || lun || channel ||
1319 ((channel = (id >> 7) & 0x3F) >=
1320 dev->maximum_num_channels))
1321 break;
1322 lun = (id >> 4) & 7;
1323 id &= 0xF;
1324 }
1325 channel = aac_phys_to_logical(channel);
1326 device_config_needed =
46154a02
MR
1327 ((((__le32 *)aifcmd->data)[3]
1328 == cpu_to_le32(EM_DRIVE_INSERTION)) ||
1329 (((__le32 *)aifcmd->data)[3]
1330 == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ?
0995ad38
SM
1331 ADD : DELETE;
1332 break;
1333 }
9cb62fa2
RAR
1334 case AifBuManagerEvent:
1335 aac_handle_aif_bu(dev, aifcmd);
0995ad38 1336 break;
131256cf
MH
1337 }
1338
1339 /*
1340 * If we are waiting on something and this happens to be
1341 * that thing then set the re-configure flag.
1342 */
1343 if (container != (u32)-1) {
1344 if (container >= dev->maximum_num_containers)
1345 break;
31876f32 1346 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1347 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1348 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1349 dev->fsa_dev[container].config_waiting_on = 0;
1350 } else for (container = 0;
1351 container < dev->maximum_num_containers; ++container) {
31876f32 1352 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1353 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1354 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1355 dev->fsa_dev[container].config_waiting_on = 0;
1356 }
1357 break;
1358
1359 case AifCmdJobProgress:
1360 /*
1361 * These are job progress AIF's. When a Clear is being
1362 * done on a container it is initially created then hidden from
1363 * the OS. When the clear completes we don't get a config
1364 * change so we monitor the job status complete on a clear then
1365 * wait for a container change.
1366 */
1367
f3307f72
CH
1368 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1369 (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] ||
1370 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) {
131256cf
MH
1371 for (container = 0;
1372 container < dev->maximum_num_containers;
1373 ++container) {
1374 /*
1375 * Stomp on all config sequencing for all
1376 * containers?
1377 */
1378 dev->fsa_dev[container].config_waiting_on =
1379 AifEnContainerChange;
1380 dev->fsa_dev[container].config_needed = ADD;
31876f32
MH
1381 dev->fsa_dev[container].config_waiting_stamp =
1382 jiffies;
131256cf
MH
1383 }
1384 }
f3307f72
CH
1385 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1386 ((__le32 *)aifcmd->data)[6] == 0 &&
1387 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) {
131256cf
MH
1388 for (container = 0;
1389 container < dev->maximum_num_containers;
1390 ++container) {
1391 /*
1392 * Stomp on all config sequencing for all
1393 * containers?
1394 */
1395 dev->fsa_dev[container].config_waiting_on =
1396 AifEnContainerChange;
1397 dev->fsa_dev[container].config_needed = DELETE;
31876f32
MH
1398 dev->fsa_dev[container].config_waiting_stamp =
1399 jiffies;
131256cf
MH
1400 }
1401 }
1402 break;
1403 }
1404
a4576b5d
MS
1405 container = 0;
1406retry_next:
0995ad38 1407 if (device_config_needed == NOTHING)
a4576b5d 1408 for (; container < dev->maximum_num_containers; ++container) {
31876f32
MH
1409 if ((dev->fsa_dev[container].config_waiting_on == 0) &&
1410 (dev->fsa_dev[container].config_needed != NOTHING) &&
1411 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
131256cf
MH
1412 device_config_needed =
1413 dev->fsa_dev[container].config_needed;
1414 dev->fsa_dev[container].config_needed = NOTHING;
0995ad38
SM
1415 channel = CONTAINER_TO_CHANNEL(container);
1416 id = CONTAINER_TO_ID(container);
1417 lun = CONTAINER_TO_LUN(container);
131256cf
MH
1418 break;
1419 }
1420 }
1421 if (device_config_needed == NOTHING)
1422 return;
1423
1424 /*
1425 * If we decided that a re-configuration needs to be done,
1426 * schedule it here on the way out the door, please close the door
1427 * behind you.
1428 */
1429
131256cf 1430 /*
f64a181d 1431 * Find the scsi_device associated with the SCSI address,
131256cf
MH
1432 * and mark it as changed, invalidating the cache. This deals
1433 * with changes to existing device IDs.
1434 */
1435
1436 if (!dev || !dev->scsi_host_ptr)
1437 return;
1438 /*
bfb35aa8 1439 * force reload of disk info via aac_probe_container
131256cf 1440 */
0995ad38
SM
1441 if ((channel == CONTAINER_CHANNEL) &&
1442 (device_config_needed != NOTHING)) {
1443 if (dev->fsa_dev[container].valid == 1)
1444 dev->fsa_dev[container].valid = 2;
bfb35aa8 1445 aac_probe_container(dev, container);
0995ad38
SM
1446 }
1447 device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun);
131256cf
MH
1448 if (device) {
1449 switch (device_config_needed) {
1450 case DELETE:
9cccde93
RM
1451#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1452 scsi_remove_device(device);
1453#else
0995ad38
SM
1454 if (scsi_device_online(device)) {
1455 scsi_device_set_state(device, SDEV_OFFLINE);
1456 sdev_printk(KERN_INFO, device,
1457 "Device offlined - %s\n",
1458 (channel == CONTAINER_CHANNEL) ?
1459 "array deleted" :
1460 "enclosure services event");
1461 }
9cccde93 1462#endif
0995ad38
SM
1463 break;
1464 case ADD:
1465 if (!scsi_device_online(device)) {
1466 sdev_printk(KERN_INFO, device,
1467 "Device online - %s\n",
1468 (channel == CONTAINER_CHANNEL) ?
1469 "array created" :
1470 "enclosure services event");
1471 scsi_device_set_state(device, SDEV_RUNNING);
1472 }
1473 /* FALLTHRU */
131256cf 1474 case CHANGE:
0995ad38
SM
1475 if ((channel == CONTAINER_CHANNEL)
1476 && (!dev->fsa_dev[container].valid)) {
9cccde93
RM
1477#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1478 scsi_remove_device(device);
1479#else
0995ad38
SM
1480 if (!scsi_device_online(device))
1481 break;
1482 scsi_device_set_state(device, SDEV_OFFLINE);
1483 sdev_printk(KERN_INFO, device,
1484 "Device offlined - %s\n",
1485 "array failed");
9cccde93 1486#endif
0995ad38
SM
1487 break;
1488 }
131256cf
MH
1489 scsi_rescan_device(&device->sdev_gendev);
1490
1491 default:
1492 break;
1493 }
1494 scsi_device_put(device);
0995ad38 1495 device_config_needed = NOTHING;
131256cf 1496 }
0995ad38
SM
1497 if (device_config_needed == ADD)
1498 scsi_add_device(dev->scsi_host_ptr, channel, id, lun);
a4576b5d
MS
1499 if (channel == CONTAINER_CHANNEL) {
1500 container++;
1501 device_config_needed = NOTHING;
1502 goto retry_next;
1503 }
131256cf
MH
1504}
1505
3a4c3699 1506static int _aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type)
8c867b25
MH
1507{
1508 int index, quirks;
8b1462e0 1509 int retval;
8c867b25
MH
1510 struct Scsi_Host *host;
1511 struct scsi_device *dev;
1512 struct scsi_cmnd *command;
1513 struct scsi_cmnd *command_list;
29c97684 1514 int jafo = 0;
3a4c3699 1515 int bled;
c28b121f 1516 u64 dmamask;
8c867b25
MH
1517
1518 /*
1519 * Assumptions:
29c97684
SM
1520 * - host is locked, unless called by the aacraid thread.
1521 * (a matter of convenience, due to legacy issues surrounding
1522 * eh_host_adapter_reset).
8c867b25
MH
1523 * - in_reset is asserted, so no new i/o is getting to the
1524 * card.
29c97684
SM
1525 * - The card is dead, or will be very shortly ;-/ so no new
1526 * commands are completing in the interrupt service.
8c867b25
MH
1527 */
1528 host = aac->scsi_host_ptr;
1529 scsi_block_requests(host);
1530 aac_adapter_disable_int(aac);
29c97684
SM
1531 if (aac->thread->pid != current->pid) {
1532 spin_unlock_irq(host->host_lock);
1533 kthread_stop(aac->thread);
1534 jafo = 1;
1535 }
8c867b25
MH
1536
1537 /*
1538 * If a positive health, means in a known DEAD PANIC
1539 * state and the adapter could be reset to `try again'.
1540 */
3a4c3699
RAR
1541 bled = forced ? 0 : aac_adapter_check_health(aac);
1542 retval = aac_adapter_restart(aac, bled, reset_type);
8c867b25
MH
1543
1544 if (retval)
1545 goto out;
8c867b25 1546
d18b448f
MH
1547 /*
1548 * Loop through the fibs, close the synchronous FIBS
1549 */
33bb3b29 1550 for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) {
d18b448f 1551 struct fib *fib = &aac->fibs[index];
a8166a52
MH
1552 if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) &&
1553 (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) {
d18b448f
MH
1554 unsigned long flagv;
1555 spin_lock_irqsave(&fib->event_lock, flagv);
1556 up(&fib->event_wait);
1557 spin_unlock_irqrestore(&fib->event_lock, flagv);
1558 schedule();
33bb3b29 1559 retval = 0;
d18b448f
MH
1560 }
1561 }
33bb3b29
MH
1562 /* Give some extra time for ioctls to complete. */
1563 if (retval == 0)
1564 ssleep(2);
8c867b25
MH
1565 index = aac->cardtype;
1566
1567 /*
1568 * Re-initialize the adapter, first free resources, then carefully
1569 * apply the initialization sequence to come back again. Only risk
1570 * is a change in Firmware dropping cache, it is assumed the caller
1571 * will ensure that i/o is queisced and the card is flushed in that
1572 * case.
1573 */
1574 aac_fib_map_free(aac);
d74d9d03
MR
1575 dma_free_coherent(&aac->pdev->dev, aac->comm_size, aac->comm_addr,
1576 aac->comm_phys);
8c867b25
MH
1577 aac->comm_addr = NULL;
1578 aac->comm_phys = 0;
1579 kfree(aac->queues);
1580 aac->queues = NULL;
8b1462e0 1581 aac_free_irq(aac);
8c867b25
MH
1582 kfree(aac->fsa_dev);
1583 aac->fsa_dev = NULL;
c28b121f
RAR
1584
1585 dmamask = DMA_BIT_MASK(32);
94cf6ba1 1586 quirks = aac_get_driver_ident(index)->quirks;
c28b121f
RAR
1587 if (quirks & AAC_QUIRK_31BIT)
1588 retval = pci_set_dma_mask(aac->pdev, dmamask);
1589 else if (!(quirks & AAC_QUIRK_SRC))
1590 retval = pci_set_dma_mask(aac->pdev, dmamask);
1591 else
1592 retval = pci_set_consistent_dma_mask(aac->pdev, dmamask);
1593
1594 if (quirks & AAC_QUIRK_31BIT && !retval) {
1595 dmamask = DMA_BIT_MASK(31);
1596 retval = pci_set_consistent_dma_mask(aac->pdev, dmamask);
8c867b25 1597 }
c28b121f
RAR
1598
1599 if (retval)
1600 goto out;
1601
8c867b25
MH
1602 if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
1603 goto out;
c28b121f 1604
29c97684 1605 if (jafo) {
f170168b
KC
1606 aac->thread = kthread_run(aac_command_thread, aac, "%s",
1607 aac->name);
29c97684
SM
1608 if (IS_ERR(aac->thread)) {
1609 retval = PTR_ERR(aac->thread);
1610 goto out;
1611 }
8c867b25
MH
1612 }
1613 (void)aac_get_adapter_info(aac);
8c867b25 1614 if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
8ce3eca4
SM
1615 host->sg_tablesize = 34;
1616 host->max_sectors = (host->sg_tablesize * 8) + 112;
1617 }
1618 if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
1619 host->sg_tablesize = 17;
1620 host->max_sectors = (host->sg_tablesize * 8) + 112;
1621 }
8c867b25
MH
1622 aac_get_config_status(aac, 1);
1623 aac_get_containers(aac);
1624 /*
1625 * This is where the assumption that the Adapter is quiesced
1626 * is important.
1627 */
1628 command_list = NULL;
1629 __shost_for_each_device(dev, host) {
1630 unsigned long flags;
1631 spin_lock_irqsave(&dev->list_lock, flags);
1632 list_for_each_entry(command, &dev->cmd_list, list)
1633 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1634 command->SCp.buffer = (struct scatterlist *)command_list;
1635 command_list = command;
1636 }
1637 spin_unlock_irqrestore(&dev->list_lock, flags);
1638 }
1639 while ((command = command_list)) {
1640 command_list = (struct scsi_cmnd *)command->SCp.buffer;
1641 command->SCp.buffer = NULL;
1642 command->result = DID_OK << 16
1643 | COMMAND_COMPLETE << 8
1644 | SAM_STAT_TASK_SET_FULL;
1645 command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
1646 command->scsi_done(command);
1647 }
82b3ca8f
RAR
1648 /*
1649 * Any Device that was already marked offline needs to be cleaned up
1650 */
1651 __shost_for_each_device(dev, host) {
1652 if (!scsi_device_online(dev)) {
1653 sdev_printk(KERN_INFO, dev, "Removing offline device\n");
1654 scsi_remove_device(dev);
1655 scsi_device_put(dev);
1656 }
1657 }
8c867b25
MH
1658 retval = 0;
1659
1660out:
1661 aac->in_reset = 0;
1662 scsi_unblock_requests(host);
82b3ca8f
RAR
1663 /*
1664 * Issue bus rescan to catch any configuration that might have
1665 * occurred
1666 */
1667 if (!retval) {
1668 dev_info(&aac->pdev->dev, "Issuing bus rescan\n");
1669 scsi_scan_host(host);
1670 }
29c97684
SM
1671 if (jafo) {
1672 spin_lock_irq(host->host_lock);
1673 }
1674 return retval;
1675}
1676
3a4c3699 1677int aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type)
29c97684
SM
1678{
1679 unsigned long flagv = 0;
1680 int retval;
1681 struct Scsi_Host * host;
3a4c3699 1682 int bled;
29c97684
SM
1683
1684 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1685 return -EBUSY;
1686
1687 if (aac->in_reset) {
1688 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1689 return -EBUSY;
1690 }
1691 aac->in_reset = 1;
1692 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1693
1694 /*
1695 * Wait for all commands to complete to this specific
1696 * target (block maximum 60 seconds). Although not necessary,
1697 * it does make us a good storage citizen.
1698 */
1699 host = aac->scsi_host_ptr;
1700 scsi_block_requests(host);
1701 if (forced < 2) for (retval = 60; retval; --retval) {
1702 struct scsi_device * dev;
1703 struct scsi_cmnd * command;
1704 int active = 0;
1705
1706 __shost_for_each_device(dev, host) {
1707 spin_lock_irqsave(&dev->list_lock, flagv);
1708 list_for_each_entry(command, &dev->cmd_list, list) {
1709 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1710 active++;
1711 break;
1712 }
1713 }
1714 spin_unlock_irqrestore(&dev->list_lock, flagv);
1715 if (active)
1716 break;
1717
1718 }
1719 /*
1720 * We can exit If all the commands are complete
1721 */
1722 if (active == 0)
1723 break;
1724 ssleep(1);
1725 }
1726
1727 /* Quiesce build, flush cache, write through mode */
f858317d
SM
1728 if (forced < 2)
1729 aac_send_shutdown(aac);
29c97684 1730 spin_lock_irqsave(host->host_lock, flagv);
3a4c3699
RAR
1731 bled = forced ? forced :
1732 (aac_check_reset != 0 && aac_check_reset != 1);
1733 retval = _aac_reset_adapter(aac, bled, reset_type);
29c97684
SM
1734 spin_unlock_irqrestore(host->host_lock, flagv);
1735
f858317d 1736 if ((forced < 2) && (retval == -ENODEV)) {
29c97684
SM
1737 /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */
1738 struct fib * fibctx = aac_fib_alloc(aac);
1739 if (fibctx) {
1740 struct aac_pause *cmd;
1741 int status;
1742
1743 aac_fib_init(fibctx);
1744
1745 cmd = (struct aac_pause *) fib_data(fibctx);
1746
1747 cmd->command = cpu_to_le32(VM_ContainerConfig);
1748 cmd->type = cpu_to_le32(CT_PAUSE_IO);
1749 cmd->timeout = cpu_to_le32(1);
1750 cmd->min = cpu_to_le32(1);
1751 cmd->noRescan = cpu_to_le32(1);
1752 cmd->count = cpu_to_le32(0);
1753
1754 status = aac_fib_send(ContainerCommand,
1755 fibctx,
1756 sizeof(struct aac_pause),
1757 FsaNormal,
1758 -2 /* Timeout silently */, 1,
1759 NULL, NULL);
1760
1761 if (status >= 0)
1762 aac_fib_complete(fibctx);
cacb6dc3
PNRCEH
1763 /* FIB should be freed only after getting
1764 * the response from the F/W */
1765 if (status != -ERESTARTSYS)
1766 aac_fib_free(fibctx);
29c97684
SM
1767 }
1768 }
1769
8c867b25
MH
1770 return retval;
1771}
1772
1773int aac_check_health(struct aac_dev * aac)
1774{
1775 int BlinkLED;
1776 unsigned long time_now, flagv = 0;
1777 struct list_head * entry;
1778 struct Scsi_Host * host;
3a4c3699 1779 int bled;
8c867b25
MH
1780
1781 /* Extending the scope of fib_lock slightly to protect aac->in_reset */
1782 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1783 return 0;
1784
1785 if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
1786 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1787 return 0; /* OK */
1788 }
1789
1790 aac->in_reset = 1;
1791
1792 /* Fake up an AIF:
1793 * aac_aifcmd.command = AifCmdEventNotify = 1
1794 * aac_aifcmd.seqnum = 0xFFFFFFFF
1795 * aac_aifcmd.data[0] = AifEnExpEvent = 23
1796 * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
1797 * aac.aifcmd.data[2] = AifHighPriority = 3
1798 * aac.aifcmd.data[3] = BlinkLED
1799 */
1800
1801 time_now = jiffies/HZ;
1802 entry = aac->fib_list.next;
1803
1804 /*
1805 * For each Context that is on the
1806 * fibctxList, make a copy of the
1807 * fib, and then set the event to wake up the
1808 * thread that is waiting for it.
1809 */
1810 while (entry != &aac->fib_list) {
1811 /*
1812 * Extract the fibctx
1813 */
1814 struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
1815 struct hw_fib * hw_fib;
1816 struct fib * fib;
1817 /*
1818 * Check if the queue is getting
1819 * backlogged
1820 */
1821 if (fibctx->count > 20) {
1822 /*
1823 * It's *not* jiffies folks,
1824 * but jiffies / HZ, so do not
1825 * panic ...
1826 */
1827 u32 time_last = fibctx->jiffies;
1828 /*
1829 * Has it been > 2 minutes
1830 * since the last read off
1831 * the queue?
1832 */
1833 if ((time_now - time_last) > aif_timeout) {
1834 entry = entry->next;
1835 aac_close_fib_context(aac, fibctx);
1836 continue;
1837 }
1838 }
1839 /*
1840 * Warning: no sleep allowed while
1841 * holding spinlock
1842 */
4dbc22d7
SM
1843 hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC);
1844 fib = kzalloc(sizeof(struct fib), GFP_ATOMIC);
8c867b25
MH
1845 if (fib && hw_fib) {
1846 struct aac_aifcmd * aif;
1847
a8166a52 1848 fib->hw_fib_va = hw_fib;
8c867b25
MH
1849 fib->dev = aac;
1850 aac_fib_init(fib);
1851 fib->type = FSAFS_NTC_FIB_CONTEXT;
1852 fib->size = sizeof (struct fib);
1853 fib->data = hw_fib->data;
1854 aif = (struct aac_aifcmd *)hw_fib->data;
1855 aif->command = cpu_to_le32(AifCmdEventNotify);
a3940da5
SM
1856 aif->seqnum = cpu_to_le32(0xFFFFFFFF);
1857 ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent);
1858 ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic);
1859 ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority);
1860 ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED);
8c867b25
MH
1861
1862 /*
1863 * Put the FIB onto the
1864 * fibctx's fibs
1865 */
1866 list_add_tail(&fib->fiblink, &fibctx->fib_list);
1867 fibctx->count++;
1868 /*
1869 * Set the event to wake up the
1870 * thread that will waiting.
1871 */
1872 up(&fibctx->wait_sem);
1873 } else {
1874 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1875 kfree(fib);
1876 kfree(hw_fib);
1877 }
1878 entry = entry->next;
1879 }
1880
1881 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1882
1883 if (BlinkLED < 0) {
1db16265
GP
1884 printk(KERN_ERR "%s: Host adapter is dead (or got a PCI error) %d\n",
1885 aac->name, BlinkLED);
8c867b25
MH
1886 goto out;
1887 }
1888
1889 printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
1890
2f7ecc55 1891 if (!aac_check_reset || ((aac_check_reset == 1) &&
bca379d8 1892 (aac->supplement_adapter_info.supported_options2 &
a3940da5 1893 AAC_OPTION_IGNORE_RESET)))
29c97684 1894 goto out;
8c867b25 1895 host = aac->scsi_host_ptr;
29c97684
SM
1896 if (aac->thread->pid != current->pid)
1897 spin_lock_irqsave(host->host_lock, flagv);
3a4c3699
RAR
1898 bled = aac_check_reset != 1 ? 1 : 0;
1899 _aac_reset_adapter(aac, bled, IOP_HWSOFT_RESET);
29c97684
SM
1900 if (aac->thread->pid != current->pid)
1901 spin_unlock_irqrestore(host->host_lock, flagv);
8c867b25
MH
1902 return BlinkLED;
1903
1904out:
1905 aac->in_reset = 0;
1906 return BlinkLED;
1907}
1908
be6aeeed
RAR
1909
1910static void aac_resolve_luns(struct aac_dev *dev)
1911{
1912 int bus, target, channel;
1913 struct scsi_device *sdev;
1914 u8 devtype;
1915 u8 new_devtype;
1916
1917 for (bus = 0; bus < AAC_MAX_BUSES; bus++) {
1918 for (target = 0; target < AAC_MAX_TARGETS; target++) {
1919
be6aeeed
RAR
1920 if (bus == CONTAINER_CHANNEL)
1921 channel = CONTAINER_CHANNEL;
1922 else
1923 channel = aac_phys_to_logical(bus);
1924
1925 devtype = dev->hba_map[bus][target].devtype;
1926 new_devtype = dev->hba_map[bus][target].new_devtype;
1927
1928 sdev = scsi_device_lookup(dev->scsi_host_ptr, channel,
1929 target, 0);
1930
4918fa46 1931 if (!sdev && new_devtype)
be6aeeed
RAR
1932 scsi_add_device(dev->scsi_host_ptr, channel,
1933 target, 0);
1934 else if (sdev && new_devtype != devtype)
1935 scsi_remove_device(sdev);
1936 else if (sdev && new_devtype == devtype)
1937 scsi_rescan_device(&sdev->sdev_gendev);
1938
1939 if (sdev)
1940 scsi_device_put(sdev);
1941
1942 dev->hba_map[bus][target].devtype = new_devtype;
1943 }
1944 }
1945}
1946
1947/**
1948 * aac_handle_sa_aif Handle a message from the firmware
1949 * @dev: Which adapter this fib is from
1950 * @fibptr: Pointer to fibptr from adapter
1951 *
1952 * This routine handles a driver notify fib from the adapter and
1953 * dispatches it to the appropriate routine for handling.
1954 */
1955static void aac_handle_sa_aif(struct aac_dev *dev, struct fib *fibptr)
1956{
1957 int i, bus, target, container, rcode = 0;
1958 u32 events = 0;
1959 struct fib *fib;
1960 struct scsi_device *sdev;
1961
1962 if (fibptr->hbacmd_size & SA_AIF_HOTPLUG)
1963 events = SA_AIF_HOTPLUG;
1964 else if (fibptr->hbacmd_size & SA_AIF_HARDWARE)
1965 events = SA_AIF_HARDWARE;
1966 else if (fibptr->hbacmd_size & SA_AIF_PDEV_CHANGE)
1967 events = SA_AIF_PDEV_CHANGE;
1968 else if (fibptr->hbacmd_size & SA_AIF_LDEV_CHANGE)
1969 events = SA_AIF_LDEV_CHANGE;
1970 else if (fibptr->hbacmd_size & SA_AIF_BPSTAT_CHANGE)
1971 events = SA_AIF_BPSTAT_CHANGE;
1972 else if (fibptr->hbacmd_size & SA_AIF_BPCFG_CHANGE)
1973 events = SA_AIF_BPCFG_CHANGE;
1974
1975 switch (events) {
1976 case SA_AIF_HOTPLUG:
1977 case SA_AIF_HARDWARE:
1978 case SA_AIF_PDEV_CHANGE:
1979 case SA_AIF_LDEV_CHANGE:
1980 case SA_AIF_BPCFG_CHANGE:
1981
1982 fib = aac_fib_alloc(dev);
1983 if (!fib) {
1984 pr_err("aac_handle_sa_aif: out of memory\n");
1985 return;
1986 }
1987 for (bus = 0; bus < AAC_MAX_BUSES; bus++)
1988 for (target = 0; target < AAC_MAX_TARGETS; target++)
1989 dev->hba_map[bus][target].new_devtype = 0;
1990
1991 rcode = aac_report_phys_luns(dev, fib, AAC_RESCAN);
1992
1993 if (rcode != -ERESTARTSYS)
1994 aac_fib_free(fib);
1995
1996 aac_resolve_luns(dev);
1997
1998 if (events == SA_AIF_LDEV_CHANGE ||
1999 events == SA_AIF_BPCFG_CHANGE) {
2000 aac_get_containers(dev);
2001 for (container = 0; container <
2002 dev->maximum_num_containers; ++container) {
2003 sdev = scsi_device_lookup(dev->scsi_host_ptr,
2004 CONTAINER_CHANNEL,
2005 container, 0);
2006 if (dev->fsa_dev[container].valid && !sdev) {
2007 scsi_add_device(dev->scsi_host_ptr,
2008 CONTAINER_CHANNEL,
2009 container, 0);
2010 } else if (!dev->fsa_dev[container].valid &&
2011 sdev) {
2012 scsi_remove_device(sdev);
2013 scsi_device_put(sdev);
2014 } else if (sdev) {
2015 scsi_rescan_device(&sdev->sdev_gendev);
2016 scsi_device_put(sdev);
2017 }
2018 }
2019 }
2020 break;
2021
2022 case SA_AIF_BPSTAT_CHANGE:
2023 /* currently do nothing */
2024 break;
2025 }
2026
2027 for (i = 1; i <= 10; ++i) {
2028 events = src_readl(dev, MUnit.IDR);
2029 if (events & (1<<23)) {
2030 pr_warn(" AIF not cleared by firmware - %d/%d)\n",
2031 i, 10);
2032 ssleep(1);
2033 }
2034 }
2035}
2036
7c0b5eda
RAR
2037static int get_fib_count(struct aac_dev *dev)
2038{
2039 unsigned int num = 0;
2040 struct list_head *entry;
2041 unsigned long flagv;
2042
2043 /*
2044 * Warning: no sleep allowed while
2045 * holding spinlock. We take the estimate
2046 * and pre-allocate a set of fibs outside the
2047 * lock.
2048 */
2049 num = le32_to_cpu(dev->init->r7.adapter_fibs_size)
2050 / sizeof(struct hw_fib); /* some extra */
2051 spin_lock_irqsave(&dev->fib_lock, flagv);
2052 entry = dev->fib_list.next;
2053 while (entry != &dev->fib_list) {
2054 entry = entry->next;
2055 ++num;
2056 }
2057 spin_unlock_irqrestore(&dev->fib_lock, flagv);
2058
2059 return num;
2060}
2061
2062static int fillup_pools(struct aac_dev *dev, struct hw_fib **hw_fib_pool,
2063 struct fib **fib_pool,
2064 unsigned int num)
2065{
2066 struct hw_fib **hw_fib_p;
2067 struct fib **fib_p;
7c0b5eda
RAR
2068
2069 hw_fib_p = hw_fib_pool;
2070 fib_p = fib_pool;
2071 while (hw_fib_p < &hw_fib_pool[num]) {
2072 *(hw_fib_p) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL);
2073 if (!(*(hw_fib_p++))) {
2074 --hw_fib_p;
2075 break;
2076 }
2077
2078 *(fib_p) = kmalloc(sizeof(struct fib), GFP_KERNEL);
2079 if (!(*(fib_p++))) {
2080 kfree(*(--hw_fib_p));
2081 break;
2082 }
2083 }
2084
393c9273
RAR
2085 /*
2086 * Get the actual number of allocated fibs
2087 */
7c0b5eda 2088 num = hw_fib_p - hw_fib_pool;
393c9273 2089 return num;
7c0b5eda
RAR
2090}
2091
2092static void wakeup_fibctx_threads(struct aac_dev *dev,
2093 struct hw_fib **hw_fib_pool,
2094 struct fib **fib_pool,
2095 struct fib *fib,
2096 struct hw_fib *hw_fib,
2097 unsigned int num)
2098{
2099 unsigned long flagv;
2100 struct list_head *entry;
2101 struct hw_fib **hw_fib_p;
2102 struct fib **fib_p;
2103 u32 time_now, time_last;
2104 struct hw_fib *hw_newfib;
2105 struct fib *newfib;
2106 struct aac_fib_context *fibctx;
2107
2108 time_now = jiffies/HZ;
2109 spin_lock_irqsave(&dev->fib_lock, flagv);
2110 entry = dev->fib_list.next;
2111 /*
2112 * For each Context that is on the
2113 * fibctxList, make a copy of the
2114 * fib, and then set the event to wake up the
2115 * thread that is waiting for it.
2116 */
2117
2118 hw_fib_p = hw_fib_pool;
2119 fib_p = fib_pool;
2120 while (entry != &dev->fib_list) {
2121 /*
2122 * Extract the fibctx
2123 */
2124 fibctx = list_entry(entry, struct aac_fib_context,
2125 next);
2126 /*
2127 * Check if the queue is getting
2128 * backlogged
2129 */
2130 if (fibctx->count > 20) {
2131 /*
2132 * It's *not* jiffies folks,
2133 * but jiffies / HZ so do not
2134 * panic ...
2135 */
2136 time_last = fibctx->jiffies;
2137 /*
2138 * Has it been > 2 minutes
2139 * since the last read off
2140 * the queue?
2141 */
2142 if ((time_now - time_last) > aif_timeout) {
2143 entry = entry->next;
2144 aac_close_fib_context(dev, fibctx);
2145 continue;
2146 }
2147 }
2148 /*
2149 * Warning: no sleep allowed while
2150 * holding spinlock
2151 */
2152 if (hw_fib_p >= &hw_fib_pool[num]) {
2153 pr_warn("aifd: didn't allocate NewFib\n");
2154 entry = entry->next;
2155 continue;
2156 }
2157
2158 hw_newfib = *hw_fib_p;
2159 *(hw_fib_p++) = NULL;
2160 newfib = *fib_p;
2161 *(fib_p++) = NULL;
2162 /*
2163 * Make the copy of the FIB
2164 */
2165 memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
2166 memcpy(newfib, fib, sizeof(struct fib));
2167 newfib->hw_fib_va = hw_newfib;
2168 /*
2169 * Put the FIB onto the
2170 * fibctx's fibs
2171 */
2172 list_add_tail(&newfib->fiblink, &fibctx->fib_list);
2173 fibctx->count++;
2174 /*
2175 * Set the event to wake up the
2176 * thread that is waiting.
2177 */
2178 up(&fibctx->wait_sem);
2179
2180 entry = entry->next;
2181 }
2182 /*
2183 * Set the status of this FIB
2184 */
2185 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
2186 aac_fib_adapter_complete(fib, sizeof(u32));
2187 spin_unlock_irqrestore(&dev->fib_lock, flagv);
2188
2189}
2190
2191static void aac_process_events(struct aac_dev *dev)
2192{
2193 struct hw_fib *hw_fib;
2194 struct fib *fib;
2195 unsigned long flags;
2196 spinlock_t *t_lock;
7c0b5eda
RAR
2197
2198 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
2199 spin_lock_irqsave(t_lock, flags);
2200
2201 while (!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
2202 struct list_head *entry;
2203 struct aac_aifcmd *aifcmd;
2204 unsigned int num;
2205 struct hw_fib **hw_fib_pool, **hw_fib_p;
2206 struct fib **fib_pool, **fib_p;
2207
2208 set_current_state(TASK_RUNNING);
2209
2210 entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
2211 list_del(entry);
2212
2213 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
2214 spin_unlock_irqrestore(t_lock, flags);
2215
2216 fib = list_entry(entry, struct fib, fiblink);
2217 hw_fib = fib->hw_fib_va;
be6aeeed
RAR
2218 if (dev->sa_firmware) {
2219 /* Thor AIF */
2220 aac_handle_sa_aif(dev, fib);
2221 aac_fib_adapter_complete(fib, (u16)sizeof(u32));
e2cdb876 2222 goto free_fib;
be6aeeed 2223 }
7c0b5eda
RAR
2224 /*
2225 * We will process the FIB here or pass it to a
2226 * worker thread that is TBD. We Really can't
2227 * do anything at this point since we don't have
2228 * anything defined for this thread to do.
2229 */
2230 memset(fib, 0, sizeof(struct fib));
2231 fib->type = FSAFS_NTC_FIB_CONTEXT;
2232 fib->size = sizeof(struct fib);
2233 fib->hw_fib_va = hw_fib;
2234 fib->data = hw_fib->data;
2235 fib->dev = dev;
2236 /*
2237 * We only handle AifRequest fibs from the adapter.
2238 */
2239
2240 aifcmd = (struct aac_aifcmd *) hw_fib->data;
2241 if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
2242 /* Handle Driver Notify Events */
2243 aac_handle_aif(dev, fib);
2244 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
2245 aac_fib_adapter_complete(fib, (u16)sizeof(u32));
2246 goto free_fib;
2247 }
2248 /*
2249 * The u32 here is important and intended. We are using
2250 * 32bit wrapping time to fit the adapter field
2251 */
2252
2253 /* Sniff events */
2254 if (aifcmd->command == cpu_to_le32(AifCmdEventNotify)
2255 || aifcmd->command == cpu_to_le32(AifCmdJobProgress)) {
2256 aac_handle_aif(dev, fib);
2257 }
2258
2259 /*
2260 * get number of fibs to process
2261 */
2262 num = get_fib_count(dev);
2263 if (!num)
2264 goto free_fib;
2265
2266 hw_fib_pool = kmalloc_array(num, sizeof(struct hw_fib *),
2267 GFP_KERNEL);
2268 if (!hw_fib_pool)
2269 goto free_fib;
2270
2271 fib_pool = kmalloc_array(num, sizeof(struct fib *), GFP_KERNEL);
2272 if (!fib_pool)
2273 goto free_hw_fib_pool;
2274
2275 /*
2276 * Fill up fib pointer pools with actual fibs
2277 * and hw_fibs
2278 */
393c9273
RAR
2279 num = fillup_pools(dev, hw_fib_pool, fib_pool, num);
2280 if (!num)
7c0b5eda
RAR
2281 goto free_mem;
2282
2283 /*
2284 * wakeup the thread that is waiting for
2285 * the response from fw (ioctl)
2286 */
2287 wakeup_fibctx_threads(dev, hw_fib_pool, fib_pool,
2288 fib, hw_fib, num);
2289
2290free_mem:
2291 /* Free up the remaining resources */
2292 hw_fib_p = hw_fib_pool;
2293 fib_p = fib_pool;
2294 while (hw_fib_p < &hw_fib_pool[num]) {
2295 kfree(*hw_fib_p);
2296 kfree(*fib_p);
2297 ++fib_p;
2298 ++hw_fib_p;
2299 }
2300 kfree(fib_pool);
2301free_hw_fib_pool:
2302 kfree(hw_fib_pool);
2303free_fib:
2304 kfree(fib);
2305 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
2306 spin_lock_irqsave(t_lock, flags);
2307 }
2308 /*
2309 * There are no more AIF's
2310 */
2311 t_lock = dev->queues->queue[HostNormCmdQueue].lock;
2312 spin_unlock_irqrestore(t_lock, flags);
2313}
8c867b25 2314
abd03305
RAR
2315static int aac_send_wellness_command(struct aac_dev *dev, char *wellness_str,
2316 u32 datasize)
2317{
2318 struct aac_srb *srbcmd;
2319 struct sgmap64 *sg64;
2320 dma_addr_t addr;
2321 char *dma_buf;
2322 struct fib *fibptr;
2323 int ret = -ENOMEM;
2324 u32 vbus, vid;
2325
2326 fibptr = aac_fib_alloc(dev);
2327 if (!fibptr)
2328 goto out;
2329
d74d9d03
MR
2330 dma_buf = dma_alloc_coherent(&dev->pdev->dev, datasize, &addr,
2331 GFP_KERNEL);
abd03305
RAR
2332 if (!dma_buf)
2333 goto fib_free_out;
2334
2335 aac_fib_init(fibptr);
2336
bca379d8
RAR
2337 vbus = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_bus);
2338 vid = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_target);
abd03305
RAR
2339
2340 srbcmd = (struct aac_srb *)fib_data(fibptr);
2341
2342 srbcmd->function = cpu_to_le32(SRBF_ExecuteScsi);
2343 srbcmd->channel = cpu_to_le32(vbus);
2344 srbcmd->id = cpu_to_le32(vid);
2345 srbcmd->lun = 0;
2346 srbcmd->flags = cpu_to_le32(SRB_DataOut);
2347 srbcmd->timeout = cpu_to_le32(10);
2348 srbcmd->retry_limit = 0;
2349 srbcmd->cdb_size = cpu_to_le32(12);
2350 srbcmd->count = cpu_to_le32(datasize);
2351
2352 memset(srbcmd->cdb, 0, sizeof(srbcmd->cdb));
2353 srbcmd->cdb[0] = BMIC_OUT;
2354 srbcmd->cdb[6] = WRITE_HOST_WELLNESS;
2355 memcpy(dma_buf, (char *)wellness_str, datasize);
2356
2357 sg64 = (struct sgmap64 *)&srbcmd->sg;
2358 sg64->count = cpu_to_le32(1);
2359 sg64->sg[0].addr[1] = cpu_to_le32((u32)(((addr) >> 16) >> 16));
2360 sg64->sg[0].addr[0] = cpu_to_le32((u32)(addr & 0xffffffff));
2361 sg64->sg[0].count = cpu_to_le32(datasize);
2362
2363 ret = aac_fib_send(ScsiPortCommand64, fibptr, sizeof(struct aac_srb),
2364 FsaNormal, 1, 1, NULL, NULL);
2365
d74d9d03 2366 dma_free_coherent(&dev->pdev->dev, datasize, dma_buf, addr);
abd03305
RAR
2367
2368 /*
2369 * Do not set XferState to zero unless
2370 * receives a response from F/W
2371 */
2372 if (ret >= 0)
2373 aac_fib_complete(fibptr);
2374
2375 /*
2376 * FIB should be freed only after
2377 * getting the response from the F/W
2378 */
2379 if (ret != -ERESTARTSYS)
2380 goto fib_free_out;
2381
2382out:
2383 return ret;
2384fib_free_out:
2385 aac_fib_free(fibptr);
2386 goto out;
2387}
2388
2389int aac_send_safw_hostttime(struct aac_dev *dev, struct timeval *now)
2390{
2391 struct tm cur_tm;
2392 char wellness_str[] = "<HW>TD\010\0\0\0\0\0\0\0\0\0DW\0\0ZZ";
2393 u32 datasize = sizeof(wellness_str);
2394 unsigned long local_time;
2395 int ret = -ENODEV;
2396
2397 if (!dev->sa_firmware)
2398 goto out;
2399
2400 local_time = (u32)(now->tv_sec - (sys_tz.tz_minuteswest * 60));
2401 time_to_tm(local_time, 0, &cur_tm);
2402 cur_tm.tm_mon += 1;
2403 cur_tm.tm_year += 1900;
2404 wellness_str[8] = bin2bcd(cur_tm.tm_hour);
2405 wellness_str[9] = bin2bcd(cur_tm.tm_min);
2406 wellness_str[10] = bin2bcd(cur_tm.tm_sec);
2407 wellness_str[12] = bin2bcd(cur_tm.tm_mon);
2408 wellness_str[13] = bin2bcd(cur_tm.tm_mday);
2409 wellness_str[14] = bin2bcd(cur_tm.tm_year / 100);
2410 wellness_str[15] = bin2bcd(cur_tm.tm_year % 100);
2411
2412 ret = aac_send_wellness_command(dev, wellness_str, datasize);
2413
2414out:
2415 return ret;
2416}
2417
2418int aac_send_hosttime(struct aac_dev *dev, struct timeval *now)
2419{
2420 int ret = -ENOMEM;
2421 struct fib *fibptr;
2422 __le32 *info;
2423
2424 fibptr = aac_fib_alloc(dev);
2425 if (!fibptr)
2426 goto out;
2427
2428 aac_fib_init(fibptr);
2429 info = (__le32 *)fib_data(fibptr);
2430 *info = cpu_to_le32(now->tv_sec);
2431 ret = aac_fib_send(SendHostTime, fibptr, sizeof(*info), FsaNormal,
2432 1, 1, NULL, NULL);
2433
2434 /*
2435 * Do not set XferState to zero unless
2436 * receives a response from F/W
2437 */
2438 if (ret >= 0)
2439 aac_fib_complete(fibptr);
2440
2441 /*
2442 * FIB should be freed only after
2443 * getting the response from the F/W
2444 */
2445 if (ret != -ERESTARTSYS)
2446 aac_fib_free(fibptr);
2447
2448out:
2449 return ret;
2450}
2451
1da177e4
LT
2452/**
2453 * aac_command_thread - command processing thread
2454 * @dev: Adapter to monitor
2455 *
2456 * Waits on the commandready event in it's queue. When the event gets set
2457 * it will pull FIBs off it's queue. It will continue to pull FIBs off
2458 * until the queue is empty. When the queue is empty it will wait for
2459 * more FIBs.
2460 */
8ce3eca4 2461
fe27381d 2462int aac_command_thread(void *data)
1da177e4 2463{
fe27381d 2464 struct aac_dev *dev = data;
1da177e4 2465 DECLARE_WAITQUEUE(wait, current);
29c97684
SM
2466 unsigned long next_jiffies = jiffies + HZ;
2467 unsigned long next_check_jiffies = next_jiffies;
2468 long difference = HZ;
1da177e4
LT
2469
2470 /*
2471 * We can only have one thread per adapter for AIF's.
2472 */
2473 if (dev->aif_thread)
2474 return -EINVAL;
fe27381d 2475
1da177e4
LT
2476 /*
2477 * Let the DPC know it has a place to send the AIF's to.
2478 */
2479 dev->aif_thread = 1;
2f130980 2480 add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 2481 set_current_state(TASK_INTERRUPTIBLE);
2f130980 2482 dprintk ((KERN_INFO "aac_command_thread start\n"));
8ce3eca4 2483 while (1) {
1da177e4 2484
7c0b5eda 2485 aac_process_events(dev);
29c97684
SM
2486
2487 /*
2488 * Background activity
2489 */
2490 if ((time_before(next_check_jiffies,next_jiffies))
2491 && ((difference = next_check_jiffies - jiffies) <= 0)) {
2492 next_check_jiffies = next_jiffies;
2493 if (aac_check_health(dev) == 0) {
2494 difference = ((long)(unsigned)check_interval)
2495 * HZ;
2496 next_check_jiffies = jiffies + difference;
2497 } else if (!dev->queues)
2498 break;
2499 }
2500 if (!time_before(next_check_jiffies,next_jiffies)
2501 && ((difference = next_jiffies - jiffies) <= 0)) {
2502 struct timeval now;
2503 int ret;
2504
2505 /* Don't even try to talk to adapter if its sick */
2506 ret = aac_check_health(dev);
22a8a0fb 2507 if (ret || !dev->queues)
29c97684
SM
2508 break;
2509 next_check_jiffies = jiffies
2510 + ((long)(unsigned)check_interval)
2511 * HZ;
2512 do_gettimeofday(&now);
2513
2514 /* Synchronize our watches */
2515 if (((1000000 - (1000000 / HZ)) > now.tv_usec)
2516 && (now.tv_usec > (1000000 / HZ)))
2517 difference = (((1000000 - now.tv_usec) * HZ)
2518 + 500000) / 1000000;
4eb435c8 2519 else {
abd03305
RAR
2520 if (now.tv_usec > 500000)
2521 ++now.tv_sec;
2522
2523 if (dev->sa_firmware)
2524 ret =
2525 aac_send_safw_hostttime(dev, &now);
2526 else
2527 ret = aac_send_hosttime(dev, &now);
2528
29c97684 2529 difference = (long)(unsigned)update_interval*HZ;
29c97684
SM
2530 }
2531 next_jiffies = jiffies + difference;
2532 if (time_before(next_check_jiffies,next_jiffies))
2533 difference = next_check_jiffies - jiffies;
2534 }
2535 if (difference <= 0)
2536 difference = 1;
2537 set_current_state(TASK_INTERRUPTIBLE);
fc4bf75e
RAR
2538
2539 if (kthread_should_stop())
2540 break;
2541
29c97684 2542 schedule_timeout(difference);
1da177e4 2543
fe27381d 2544 if (kthread_should_stop())
1da177e4 2545 break;
1da177e4 2546 }
2f130980
MH
2547 if (dev->queues)
2548 remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 2549 dev->aif_thread = 0;
2f130980 2550 return 0;
1da177e4 2551}
8b1462e0
MR
2552
2553int aac_acquire_irq(struct aac_dev *dev)
2554{
2555 int i;
2556 int j;
2557 int ret = 0;
8b1462e0 2558
8b1462e0
MR
2559 if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) {
2560 for (i = 0; i < dev->max_msix; i++) {
2561 dev->aac_msix[i].vector_no = i;
2562 dev->aac_msix[i].dev = dev;
0910d8bb 2563 if (request_irq(pci_irq_vector(dev->pdev, i),
8b1462e0
MR
2564 dev->a_ops.adapter_intr,
2565 0, "aacraid", &(dev->aac_msix[i]))) {
2566 printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n",
2567 dev->name, dev->id, i);
2568 for (j = 0 ; j < i ; j++)
0910d8bb 2569 free_irq(pci_irq_vector(dev->pdev, j),
8b1462e0
MR
2570 &(dev->aac_msix[j]));
2571 pci_disable_msix(dev->pdev);
2572 ret = -1;
2573 }
8b1462e0
MR
2574 }
2575 } else {
2576 dev->aac_msix[0].vector_no = 0;
2577 dev->aac_msix[0].dev = dev;
2578
2579 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
2580 IRQF_SHARED, "aacraid",
2581 &(dev->aac_msix[0])) < 0) {
2582 if (dev->msi)
2583 pci_disable_msi(dev->pdev);
2584 printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
2585 dev->name, dev->id);
2586 ret = -1;
2587 }
2588 }
2589 return ret;
2590}
2591
2592void aac_free_irq(struct aac_dev *dev)
2593{
2594 int i;
2595 int cpu;
2596
2597 cpu = cpumask_first(cpu_online_mask);
2598 if (dev->pdev->device == PMC_DEVICE_S6 ||
2599 dev->pdev->device == PMC_DEVICE_S7 ||
2600 dev->pdev->device == PMC_DEVICE_S8 ||
2601 dev->pdev->device == PMC_DEVICE_S9) {
2602 if (dev->max_msix > 1) {
0910d8bb
HR
2603 for (i = 0; i < dev->max_msix; i++)
2604 free_irq(pci_irq_vector(dev->pdev, i),
2605 &(dev->aac_msix[i]));
8b1462e0
MR
2606 } else {
2607 free_irq(dev->pdev->irq, &(dev->aac_msix[0]));
2608 }
2609 } else {
2610 free_irq(dev->pdev->irq, dev);
2611 }
2612 if (dev->msi)
2613 pci_disable_msi(dev->pdev);
2614 else if (dev->max_msix > 1)
2615 pci_disable_msix(dev->pdev);
2616}