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Commit | Line | Data |
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c82ee6d3 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * Adaptec AAC series RAID controller driver | |
fa195afe | 4 | * (c) Copyright 2001 Red Hat Inc. |
1da177e4 LT |
5 | * |
6 | * based on the old aacraid driver that is.. | |
7 | * Adaptec aacraid device driver for Linux. | |
8 | * | |
e8b12f0f | 9 | * Copyright (c) 2000-2010 Adaptec, Inc. |
f4babba0 RAR |
10 | * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) |
11 | * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) | |
1da177e4 | 12 | * |
1da177e4 LT |
13 | * Module Name: |
14 | * commsup.c | |
15 | * | |
16 | * Abstract: Contain all routines that are required for FSA host/adapter | |
7c00ffa3 | 17 | * communication. |
1da177e4 LT |
18 | */ |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/init.h> | |
fe523759 | 22 | #include <linux/crash_dump.h> |
1da177e4 LT |
23 | #include <linux/types.h> |
24 | #include <linux/sched.h> | |
25 | #include <linux/pci.h> | |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/completion.h> | |
29 | #include <linux/blkdev.h> | |
164006da | 30 | #include <linux/delay.h> |
fe27381d | 31 | #include <linux/kthread.h> |
6a3670c4 | 32 | #include <linux/interrupt.h> |
3d77d840 | 33 | #include <linux/bcd.h> |
8c867b25 | 34 | #include <scsi/scsi.h> |
7c00ffa3 | 35 | #include <scsi/scsi_host.h> |
131256cf | 36 | #include <scsi/scsi_device.h> |
8c867b25 | 37 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
38 | |
39 | #include "aacraid.h" | |
40 | ||
41 | /** | |
42 | * fib_map_alloc - allocate the fib objects | |
43 | * @dev: Adapter to allocate for | |
44 | * | |
45 | * Allocate and map the shared PCI space for the FIB blocks used to | |
46 | * talk to the Adaptec firmware. | |
47 | */ | |
8ce3eca4 | 48 | |
1da177e4 LT |
49 | static int fib_map_alloc(struct aac_dev *dev) |
50 | { | |
3ffd6c5a RAR |
51 | if (dev->max_fib_size > AAC_MAX_NATIVE_SIZE) |
52 | dev->max_cmd_size = AAC_MAX_NATIVE_SIZE; | |
53 | else | |
54 | dev->max_cmd_size = dev->max_fib_size; | |
423400e6 RAR |
55 | if (dev->max_fib_size < AAC_MAX_NATIVE_SIZE) { |
56 | dev->max_cmd_size = AAC_MAX_NATIVE_SIZE; | |
57 | } else { | |
58 | dev->max_cmd_size = dev->max_fib_size; | |
59 | } | |
3ffd6c5a | 60 | |
7c00ffa3 | 61 | dprintk((KERN_INFO |
f481973d MR |
62 | "allocate hardware fibs dma_alloc_coherent(%p, %d * (%d + %d), %p)\n", |
63 | &dev->pdev->dev, dev->max_cmd_size, dev->scsi_host_ptr->can_queue, | |
7c00ffa3 | 64 | AAC_NUM_MGT_FIB, &dev->hw_fib_pa)); |
f481973d | 65 | dev->hw_fib_va = dma_alloc_coherent(&dev->pdev->dev, |
3ffd6c5a | 66 | (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)) |
e8b12f0f | 67 | * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1), |
f481973d | 68 | &dev->hw_fib_pa, GFP_KERNEL); |
e8b12f0f | 69 | if (dev->hw_fib_va == NULL) |
1da177e4 LT |
70 | return -ENOMEM; |
71 | return 0; | |
72 | } | |
73 | ||
74 | /** | |
bfb35aa8 | 75 | * aac_fib_map_free - free the fib objects |
1da177e4 LT |
76 | * @dev: Adapter to free |
77 | * | |
78 | * Free the PCI mappings and the memory allocated for FIB blocks | |
79 | * on this adapter. | |
80 | */ | |
81 | ||
bfb35aa8 | 82 | void aac_fib_map_free(struct aac_dev *dev) |
1da177e4 | 83 | { |
1bff5abc RAR |
84 | size_t alloc_size; |
85 | size_t fib_size; | |
86 | int num_fibs; | |
87 | ||
88 | if(!dev->hw_fib_va || !dev->max_cmd_size) | |
89 | return; | |
90 | ||
91 | num_fibs = dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB; | |
92 | fib_size = dev->max_fib_size + sizeof(struct aac_fib_xporthdr); | |
93 | alloc_size = fib_size * num_fibs + ALIGN32 - 1; | |
94 | ||
f481973d MR |
95 | dma_free_coherent(&dev->pdev->dev, alloc_size, dev->hw_fib_va, |
96 | dev->hw_fib_pa); | |
1bff5abc | 97 | |
9ad5204d SM |
98 | dev->hw_fib_va = NULL; |
99 | dev->hw_fib_pa = 0; | |
1da177e4 LT |
100 | } |
101 | ||
3f4ce057 RAR |
102 | void aac_fib_vector_assign(struct aac_dev *dev) |
103 | { | |
104 | u32 i = 0; | |
105 | u32 vector = 1; | |
106 | struct fib *fibptr = NULL; | |
107 | ||
108 | for (i = 0, fibptr = &dev->fibs[i]; | |
109 | i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); | |
110 | i++, fibptr++) { | |
111 | if ((dev->max_msix == 1) || | |
112 | (i > ((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1) | |
113 | - dev->vector_cap))) { | |
114 | fibptr->vector_no = 0; | |
115 | } else { | |
116 | fibptr->vector_no = vector; | |
117 | vector++; | |
118 | if (vector == dev->max_msix) | |
119 | vector = 1; | |
120 | } | |
121 | } | |
122 | } | |
123 | ||
1da177e4 | 124 | /** |
bfb35aa8 | 125 | * aac_fib_setup - setup the fibs |
1da177e4 LT |
126 | * @dev: Adapter to set up |
127 | * | |
b595076a | 128 | * Allocate the PCI space for the fibs, map it and then initialise the |
1da177e4 LT |
129 | * fib area, the unmapped fib data and also the free list |
130 | */ | |
131 | ||
bfb35aa8 | 132 | int aac_fib_setup(struct aac_dev * dev) |
1da177e4 LT |
133 | { |
134 | struct fib *fibptr; | |
a8166a52 | 135 | struct hw_fib *hw_fib; |
1da177e4 LT |
136 | dma_addr_t hw_fib_pa; |
137 | int i; | |
d1ef4da8 | 138 | u32 max_cmds; |
7c00ffa3 MH |
139 | |
140 | while (((i = fib_map_alloc(dev)) == -ENOMEM) | |
141 | && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) { | |
d1ef4da8 RAR |
142 | max_cmds = (dev->scsi_host_ptr->can_queue+AAC_NUM_MGT_FIB) >> 1; |
143 | dev->scsi_host_ptr->can_queue = max_cmds - AAC_NUM_MGT_FIB; | |
144 | if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) | |
145 | dev->init->r7.max_io_commands = cpu_to_le32(max_cmds); | |
7c00ffa3 MH |
146 | } |
147 | if (i<0) | |
1da177e4 | 148 | return -ENOMEM; |
8ce3eca4 | 149 | |
e8b12f0f | 150 | memset(dev->hw_fib_va, 0, |
423400e6 | 151 | (dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)) * |
e8b12f0f MR |
152 | (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB)); |
153 | ||
1bff5abc RAR |
154 | /* 32 byte alignment for PMC */ |
155 | hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1); | |
156 | hw_fib = (struct hw_fib *)((unsigned char *)dev->hw_fib_va + | |
157 | (hw_fib_pa - dev->hw_fib_pa)); | |
158 | ||
e8b12f0f | 159 | /* add Xport header */ |
1bff5abc | 160 | hw_fib = (struct hw_fib *)((unsigned char *)hw_fib + |
e8b12f0f | 161 | sizeof(struct aac_fib_xporthdr)); |
1bff5abc | 162 | hw_fib_pa += sizeof(struct aac_fib_xporthdr); |
e8b12f0f | 163 | |
1da177e4 LT |
164 | /* |
165 | * Initialise the fibs | |
166 | */ | |
8ce3eca4 SM |
167 | for (i = 0, fibptr = &dev->fibs[i]; |
168 | i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); | |
169 | i++, fibptr++) | |
1da177e4 | 170 | { |
85d22bbf | 171 | fibptr->flags = 0; |
6bf3b630 | 172 | fibptr->size = sizeof(struct fib); |
1da177e4 | 173 | fibptr->dev = dev; |
a8166a52 MH |
174 | fibptr->hw_fib_va = hw_fib; |
175 | fibptr->data = (void *) fibptr->hw_fib_va->data; | |
1da177e4 | 176 | fibptr->next = fibptr+1; /* Forward chain the fibs */ |
bc127d93 | 177 | init_completion(&fibptr->event_wait); |
1da177e4 | 178 | spin_lock_init(&fibptr->event_lock); |
a8166a52 | 179 | hw_fib->header.XferState = cpu_to_le32(0xffffffff); |
423400e6 RAR |
180 | hw_fib->header.SenderSize = |
181 | cpu_to_le16(dev->max_fib_size); /* ?? max_cmd_size */ | |
1da177e4 | 182 | fibptr->hw_fib_pa = hw_fib_pa; |
423400e6 RAR |
183 | fibptr->hw_sgl_pa = hw_fib_pa + |
184 | offsetof(struct aac_hba_cmd_req, sge[2]); | |
185 | /* | |
186 | * one element is for the ptr to the separate sg list, | |
187 | * second element for 32 byte alignment | |
188 | */ | |
189 | fibptr->hw_error_pa = hw_fib_pa + | |
190 | offsetof(struct aac_native_hba, resp.resp_bytes[0]); | |
191 | ||
e8b12f0f | 192 | hw_fib = (struct hw_fib *)((unsigned char *)hw_fib + |
3ffd6c5a | 193 | dev->max_cmd_size + sizeof(struct aac_fib_xporthdr)); |
e8b12f0f | 194 | hw_fib_pa = hw_fib_pa + |
3ffd6c5a | 195 | dev->max_cmd_size + sizeof(struct aac_fib_xporthdr); |
1da177e4 | 196 | } |
3f4ce057 RAR |
197 | |
198 | /* | |
199 | *Assign vector numbers to fibs | |
200 | */ | |
201 | aac_fib_vector_assign(dev); | |
202 | ||
1da177e4 LT |
203 | /* |
204 | * Add the fib chain to the free list | |
205 | */ | |
7c00ffa3 | 206 | dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL; |
1da177e4 | 207 | /* |
6bf3b630 RAR |
208 | * Set 8 fibs aside for management tools |
209 | */ | |
210 | dev->free_fib = &dev->fibs[dev->scsi_host_ptr->can_queue]; | |
1da177e4 LT |
211 | return 0; |
212 | } | |
213 | ||
6bf3b630 RAR |
214 | /** |
215 | * aac_fib_alloc_tag-allocate a fib using tags | |
216 | * @dev: Adapter to allocate the fib for | |
f1134f0e | 217 | * @scmd: SCSI command |
6bf3b630 RAR |
218 | * |
219 | * Allocate a fib from the adapter fib pool using tags | |
220 | * from the blk layer. | |
221 | */ | |
222 | ||
223 | struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd) | |
224 | { | |
225 | struct fib *fibptr; | |
226 | ||
227 | fibptr = &dev->fibs[scmd->request->tag]; | |
228 | /* | |
229 | * Null out fields that depend on being zero at the start of | |
230 | * each I/O | |
231 | */ | |
232 | fibptr->hw_fib_va->header.XferState = 0; | |
233 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
234 | fibptr->callback_data = NULL; | |
235 | fibptr->callback = NULL; | |
f2244c1b | 236 | fibptr->flags = 0; |
6bf3b630 RAR |
237 | |
238 | return fibptr; | |
239 | } | |
240 | ||
1da177e4 | 241 | /** |
bfb35aa8 | 242 | * aac_fib_alloc - allocate a fib |
1da177e4 LT |
243 | * @dev: Adapter to allocate the fib for |
244 | * | |
245 | * Allocate a fib from the adapter fib pool. If the pool is empty we | |
7c00ffa3 | 246 | * return NULL. |
1da177e4 | 247 | */ |
8ce3eca4 | 248 | |
bfb35aa8 | 249 | struct fib *aac_fib_alloc(struct aac_dev *dev) |
1da177e4 LT |
250 | { |
251 | struct fib * fibptr; | |
252 | unsigned long flags; | |
253 | spin_lock_irqsave(&dev->fib_lock, flags); | |
8ce3eca4 | 254 | fibptr = dev->free_fib; |
7c00ffa3 MH |
255 | if(!fibptr){ |
256 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
257 | return fibptr; | |
258 | } | |
1da177e4 LT |
259 | dev->free_fib = fibptr->next; |
260 | spin_unlock_irqrestore(&dev->fib_lock, flags); | |
261 | /* | |
262 | * Set the proper node type code and node byte size | |
263 | */ | |
264 | fibptr->type = FSAFS_NTC_FIB_CONTEXT; | |
265 | fibptr->size = sizeof(struct fib); | |
266 | /* | |
267 | * Null out fields that depend on being zero at the start of | |
268 | * each I/O | |
269 | */ | |
a8166a52 | 270 | fibptr->hw_fib_va->header.XferState = 0; |
b6ef70f3 | 271 | fibptr->flags = 0; |
1da177e4 LT |
272 | fibptr->callback = NULL; |
273 | fibptr->callback_data = NULL; | |
274 | ||
275 | return fibptr; | |
276 | } | |
277 | ||
278 | /** | |
bfb35aa8 | 279 | * aac_fib_free - free a fib |
1da177e4 LT |
280 | * @fibptr: fib to free up |
281 | * | |
282 | * Frees up a fib and places it on the appropriate queue | |
1da177e4 | 283 | */ |
8ce3eca4 | 284 | |
bfb35aa8 | 285 | void aac_fib_free(struct fib *fibptr) |
1da177e4 | 286 | { |
ef616233 | 287 | unsigned long flags; |
cacb6dc3 | 288 | |
ef616233 | 289 | if (fibptr->done == 2) |
cacb6dc3 | 290 | return; |
1da177e4 LT |
291 | |
292 | spin_lock_irqsave(&fibptr->dev->fib_lock, flags); | |
03d44337 | 293 | if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 294 | aac_config.fib_timeouts++; |
423400e6 RAR |
295 | if (!(fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) && |
296 | fibptr->hw_fib_va->header.XferState != 0) { | |
03d44337 MH |
297 | printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n", |
298 | (void*)fibptr, | |
299 | le32_to_cpu(fibptr->hw_fib_va->header.XferState)); | |
300 | } | |
301 | fibptr->next = fibptr->dev->free_fib; | |
302 | fibptr->dev->free_fib = fibptr; | |
1da177e4 LT |
303 | spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags); |
304 | } | |
305 | ||
306 | /** | |
bfb35aa8 | 307 | * aac_fib_init - initialise a fib |
1da177e4 | 308 | * @fibptr: The fib to initialize |
8ce3eca4 | 309 | * |
1da177e4 LT |
310 | * Set up the generic fib fields ready for use |
311 | */ | |
8ce3eca4 | 312 | |
bfb35aa8 | 313 | void aac_fib_init(struct fib *fibptr) |
1da177e4 | 314 | { |
a8166a52 | 315 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
1da177e4 | 316 | |
85d22bbf | 317 | memset(&hw_fib->header, 0, sizeof(struct aac_fibhdr)); |
1da177e4 | 318 | hw_fib->header.StructType = FIB_MAGIC; |
7c00ffa3 MH |
319 | hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size); |
320 | hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable); | |
85d22bbf | 321 | hw_fib->header.u.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa); |
7c00ffa3 | 322 | hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size); |
1da177e4 LT |
323 | } |
324 | ||
325 | /** | |
326 | * fib_deallocate - deallocate a fib | |
327 | * @fibptr: fib to deallocate | |
328 | * | |
329 | * Will deallocate and return to the free pool the FIB pointed to by the | |
330 | * caller. | |
331 | */ | |
8ce3eca4 | 332 | |
4833869e | 333 | static void fib_dealloc(struct fib * fibptr) |
1da177e4 | 334 | { |
a8166a52 | 335 | struct hw_fib *hw_fib = fibptr->hw_fib_va; |
8ce3eca4 | 336 | hw_fib->header.XferState = 0; |
1da177e4 LT |
337 | } |
338 | ||
339 | /* | |
340 | * Commuication primitives define and support the queuing method we use to | |
341 | * support host to adapter commuication. All queue accesses happen through | |
342 | * these routines and are the only routines which have a knowledge of the | |
343 | * how these queues are implemented. | |
344 | */ | |
8ce3eca4 | 345 | |
1da177e4 LT |
346 | /** |
347 | * aac_get_entry - get a queue entry | |
348 | * @dev: Adapter | |
349 | * @qid: Queue Number | |
350 | * @entry: Entry return | |
351 | * @index: Index return | |
352 | * @nonotify: notification control | |
353 | * | |
354 | * With a priority the routine returns a queue entry if the queue has free entries. If the queue | |
355 | * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is | |
356 | * returned. | |
357 | */ | |
8ce3eca4 | 358 | |
1da177e4 LT |
359 | static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify) |
360 | { | |
361 | struct aac_queue * q; | |
bed30de4 | 362 | unsigned long idx; |
1da177e4 LT |
363 | |
364 | /* | |
365 | * All of the queues wrap when they reach the end, so we check | |
366 | * to see if they have reached the end and if they have we just | |
367 | * set the index back to zero. This is a wrap. You could or off | |
368 | * the high bits in all updates but this is a bit faster I think. | |
369 | */ | |
370 | ||
371 | q = &dev->queues->queue[qid]; | |
bed30de4 MH |
372 | |
373 | idx = *index = le32_to_cpu(*(q->headers.producer)); | |
374 | /* Interrupt Moderation, only interrupt for first two entries */ | |
375 | if (idx != le32_to_cpu(*(q->headers.consumer))) { | |
376 | if (--idx == 0) { | |
1640a2c3 | 377 | if (qid == AdapNormCmdQueue) |
bed30de4 | 378 | idx = ADAP_NORM_CMD_ENTRIES; |
1640a2c3 | 379 | else |
bed30de4 MH |
380 | idx = ADAP_NORM_RESP_ENTRIES; |
381 | } | |
382 | if (idx != le32_to_cpu(*(q->headers.consumer))) | |
8ce3eca4 | 383 | *nonotify = 1; |
bed30de4 | 384 | } |
1da177e4 | 385 | |
1640a2c3 | 386 | if (qid == AdapNormCmdQueue) { |
8ce3eca4 | 387 | if (*index >= ADAP_NORM_CMD_ENTRIES) |
1da177e4 | 388 | *index = 0; /* Wrap to front of the Producer Queue. */ |
1640a2c3 | 389 | } else { |
8ce3eca4 | 390 | if (*index >= ADAP_NORM_RESP_ENTRIES) |
1da177e4 LT |
391 | *index = 0; /* Wrap to front of the Producer Queue. */ |
392 | } | |
1da177e4 | 393 | |
8ce3eca4 SM |
394 | /* Queue is full */ |
395 | if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) { | |
7c00ffa3 | 396 | printk(KERN_WARNING "Queue %d full, %u outstanding.\n", |
ef616233 | 397 | qid, atomic_read(&q->numpending)); |
1da177e4 LT |
398 | return 0; |
399 | } else { | |
8ce3eca4 | 400 | *entry = q->base + *index; |
1da177e4 LT |
401 | return 1; |
402 | } | |
8ce3eca4 | 403 | } |
1da177e4 LT |
404 | |
405 | /** | |
406 | * aac_queue_get - get the next free QE | |
407 | * @dev: Adapter | |
408 | * @index: Returned index | |
f1134f0e LJ |
409 | * @qid: Queue number |
410 | * @hw_fib: Fib to associate with the queue entry | |
1da177e4 LT |
411 | * @wait: Wait if queue full |
412 | * @fibptr: Driver fib object to go with fib | |
413 | * @nonotify: Don't notify the adapter | |
414 | * | |
415 | * Gets the next free QE off the requested priorty adapter command | |
416 | * queue and associates the Fib with the QE. The QE represented by | |
417 | * index is ready to insert on the queue when this routine returns | |
418 | * success. | |
419 | */ | |
420 | ||
28713324 | 421 | int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify) |
1da177e4 LT |
422 | { |
423 | struct aac_entry * entry = NULL; | |
424 | int map = 0; | |
8ce3eca4 | 425 | |
1640a2c3 | 426 | if (qid == AdapNormCmdQueue) { |
1da177e4 | 427 | /* if no entries wait for some if caller wants to */ |
8ce3eca4 | 428 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) { |
1da177e4 LT |
429 | printk(KERN_ERR "GetEntries failed\n"); |
430 | } | |
8ce3eca4 SM |
431 | /* |
432 | * Setup queue entry with a command, status and fib mapped | |
433 | */ | |
434 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
435 | map = 1; | |
1640a2c3 | 436 | } else { |
8ce3eca4 | 437 | while (!aac_get_entry(dev, qid, &entry, index, nonotify)) { |
1da177e4 LT |
438 | /* if no entries wait for some if caller wants to */ |
439 | } | |
8ce3eca4 SM |
440 | /* |
441 | * Setup queue entry with command, status and fib mapped | |
442 | */ | |
443 | entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size)); | |
444 | entry->addr = hw_fib->header.SenderFibAddress; | |
445 | /* Restore adapters pointer to the FIB */ | |
85d22bbf | 446 | hw_fib->header.u.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */ |
8ce3eca4 | 447 | map = 0; |
1da177e4 LT |
448 | } |
449 | /* | |
450 | * If MapFib is true than we need to map the Fib and put pointers | |
451 | * in the queue entry. | |
452 | */ | |
453 | if (map) | |
454 | entry->addr = cpu_to_le32(fibptr->hw_fib_pa); | |
455 | return 0; | |
456 | } | |
457 | ||
1da177e4 | 458 | /* |
8ce3eca4 SM |
459 | * Define the highest level of host to adapter communication routines. |
460 | * These routines will support host to adapter FS commuication. These | |
1da177e4 LT |
461 | * routines have no knowledge of the commuication method used. This level |
462 | * sends and receives FIBs. This level has no knowledge of how these FIBs | |
463 | * get passed back and forth. | |
464 | */ | |
465 | ||
466 | /** | |
bfb35aa8 | 467 | * aac_fib_send - send a fib to the adapter |
1da177e4 LT |
468 | * @command: Command to send |
469 | * @fibptr: The fib | |
470 | * @size: Size of fib data area | |
471 | * @priority: Priority of Fib | |
472 | * @wait: Async/sync select | |
473 | * @reply: True if a reply is wanted | |
474 | * @callback: Called with reply | |
475 | * @callback_data: Passed to callback | |
476 | * | |
477 | * Sends the requested FIB to the adapter and optionally will wait for a | |
478 | * response FIB. If the caller does not wish to wait for a response than | |
479 | * an event to wait on must be supplied. This event will be set when a | |
480 | * response FIB is received from the adapter. | |
481 | */ | |
8ce3eca4 | 482 | |
bfb35aa8 MH |
483 | int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size, |
484 | int priority, int wait, int reply, fib_callback callback, | |
485 | void *callback_data) | |
1da177e4 | 486 | { |
1da177e4 | 487 | struct aac_dev * dev = fibptr->dev; |
a8166a52 | 488 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 489 | unsigned long flags = 0; |
cacb6dc3 | 490 | unsigned long mflags = 0; |
11604612 | 491 | unsigned long sflags = 0; |
cacb6dc3 | 492 | |
1da177e4 LT |
493 | if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned))) |
494 | return -EBUSY; | |
a0c6143e RAR |
495 | |
496 | if (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)) | |
497 | return -EINVAL; | |
498 | ||
1da177e4 | 499 | /* |
25985edc | 500 | * There are 5 cases with the wait and response requested flags. |
1da177e4 LT |
501 | * The only invalid cases are if the caller requests to wait and |
502 | * does not request a response and if the caller does not want a | |
503 | * response and the Fib is not allocated from pool. If a response | |
d98e000c | 504 | * is not requested the Fib will just be deallocaed by the DPC |
1da177e4 | 505 | * routine when the response comes back from the adapter. No |
8ce3eca4 | 506 | * further processing will be done besides deleting the Fib. We |
1da177e4 LT |
507 | * will have a debug mode where the adapter can notify the host |
508 | * it had a problem and the host can log that fact. | |
509 | */ | |
b6ef70f3 | 510 | fibptr->flags = 0; |
1da177e4 LT |
511 | if (wait && !reply) { |
512 | return -EINVAL; | |
513 | } else if (!wait && reply) { | |
514 | hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected); | |
515 | FIB_COUNTER_INCREMENT(aac_config.AsyncSent); | |
516 | } else if (!wait && !reply) { | |
517 | hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected); | |
518 | FIB_COUNTER_INCREMENT(aac_config.NoResponseSent); | |
519 | } else if (wait && reply) { | |
520 | hw_fib->header.XferState |= cpu_to_le32(ResponseExpected); | |
521 | FIB_COUNTER_INCREMENT(aac_config.NormalSent); | |
8ce3eca4 | 522 | } |
1da177e4 LT |
523 | /* |
524 | * Map the fib into 32bits by using the fib number | |
525 | */ | |
526 | ||
423400e6 RAR |
527 | hw_fib->header.SenderFibAddress = |
528 | cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2); | |
529 | ||
530 | /* use the same shifted value for handle to be compatible | |
531 | * with the new native hba command handle | |
532 | */ | |
533 | hw_fib->header.Handle = | |
534 | cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1); | |
535 | ||
1da177e4 LT |
536 | /* |
537 | * Set FIB state to indicate where it came from and if we want a | |
538 | * response from the adapter. Also load the command from the | |
539 | * caller. | |
540 | * | |
541 | * Map the hw fib pointer as a 32bit value | |
542 | */ | |
543 | hw_fib->header.Command = cpu_to_le16(command); | |
544 | hw_fib->header.XferState |= cpu_to_le32(SentFromHost); | |
1da177e4 LT |
545 | /* |
546 | * Set the size of the Fib we want to send to the adapter | |
547 | */ | |
548 | hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size); | |
549 | if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) { | |
550 | return -EMSGSIZE; | |
8ce3eca4 | 551 | } |
1da177e4 LT |
552 | /* |
553 | * Get a queue entry connect the FIB to it and send an notify | |
554 | * the adapter a command is ready. | |
555 | */ | |
1640a2c3 | 556 | hw_fib->header.XferState |= cpu_to_le32(NormalPriority); |
1da177e4 | 557 | |
1da177e4 LT |
558 | /* |
559 | * Fill in the Callback and CallbackContext if we are not | |
560 | * going to wait. | |
561 | */ | |
562 | if (!wait) { | |
563 | fibptr->callback = callback; | |
564 | fibptr->callback_data = callback_data; | |
b6ef70f3 | 565 | fibptr->flags = FIB_CONTEXT_FLAG; |
1da177e4 | 566 | } |
1da177e4 LT |
567 | |
568 | fibptr->done = 0; | |
1da177e4 | 569 | |
1640a2c3 MH |
570 | FIB_COUNTER_INCREMENT(aac_config.FibsSent); |
571 | ||
1640a2c3 | 572 | dprintk((KERN_DEBUG "Fib contents:.\n")); |
8e0c5ebd MH |
573 | dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command))); |
574 | dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command))); | |
575 | dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState))); | |
a8166a52 | 576 | dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va)); |
1640a2c3 MH |
577 | dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa)); |
578 | dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr)); | |
579 | ||
c8f7b073 | 580 | if (!dev->queues) |
65101355 | 581 | return -EBUSY; |
1640a2c3 | 582 | |
cacb6dc3 PNRCEH |
583 | if (wait) { |
584 | ||
585 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
586 | if (dev->management_fib_count >= AAC_NUM_MGT_FIB) { | |
587 | printk(KERN_INFO "No management Fibs Available:%d\n", | |
588 | dev->management_fib_count); | |
589 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
590 | return -EBUSY; | |
591 | } | |
592 | dev->management_fib_count++; | |
593 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
1640a2c3 | 594 | spin_lock_irqsave(&fibptr->event_lock, flags); |
cacb6dc3 PNRCEH |
595 | } |
596 | ||
11604612 MR |
597 | if (dev->sync_mode) { |
598 | if (wait) | |
599 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
600 | spin_lock_irqsave(&dev->sync_lock, sflags); | |
601 | if (dev->sync_fib) { | |
602 | list_add_tail(&fibptr->fiblink, &dev->sync_fib_list); | |
603 | spin_unlock_irqrestore(&dev->sync_lock, sflags); | |
604 | } else { | |
605 | dev->sync_fib = fibptr; | |
606 | spin_unlock_irqrestore(&dev->sync_lock, sflags); | |
607 | aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, | |
608 | (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0, | |
609 | NULL, NULL, NULL, NULL, NULL); | |
610 | } | |
611 | if (wait) { | |
612 | fibptr->flags |= FIB_CONTEXT_FLAG_WAIT; | |
bc127d93 | 613 | if (wait_for_completion_interruptible(&fibptr->event_wait)) { |
11604612 MR |
614 | fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT; |
615 | return -EFAULT; | |
616 | } | |
617 | return 0; | |
618 | } | |
619 | return -EINPROGRESS; | |
620 | } | |
621 | ||
cacb6dc3 PNRCEH |
622 | if (aac_adapter_deliver(fibptr) != 0) { |
623 | printk(KERN_ERR "aac_fib_send: returned -EBUSY\n"); | |
624 | if (wait) { | |
625 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
626 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
627 | dev->management_fib_count--; | |
628 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
629 | } | |
630 | return -EBUSY; | |
631 | } | |
632 | ||
8e0c5ebd | 633 | |
1da177e4 | 634 | /* |
8ce3eca4 | 635 | * If the caller wanted us to wait for response wait now. |
1da177e4 | 636 | */ |
8ce3eca4 | 637 | |
1da177e4 LT |
638 | if (wait) { |
639 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
9203344c MH |
640 | /* Only set for first known interruptable command */ |
641 | if (wait < 0) { | |
642 | /* | |
643 | * *VERY* Dangerous to time out a command, the | |
644 | * assumption is made that we have no hope of | |
645 | * functioning because an interrupt routing or other | |
646 | * hardware failure has occurred. | |
647 | */ | |
30002f1c | 648 | unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */ |
bc127d93 | 649 | while (!try_wait_for_completion(&fibptr->event_wait)) { |
33524b70 | 650 | int blink; |
30002f1c | 651 | if (time_is_before_eq_jiffies(timeout)) { |
28713324 | 652 | struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue]; |
ef616233 | 653 | atomic_dec(&q->numpending); |
9203344c | 654 | if (wait == -1) { |
bfb35aa8 | 655 | printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n" |
9203344c MH |
656 | "Usually a result of a PCI interrupt routing problem;\n" |
657 | "update mother board BIOS or consider utilizing one of\n" | |
658 | "the SAFE mode kernel options (acpi, apic etc)\n"); | |
659 | } | |
660 | return -ETIMEDOUT; | |
661 | } | |
16ae9dd3 | 662 | |
b6554cfe | 663 | if (unlikely(aac_pci_offline(dev))) |
16ae9dd3 RAR |
664 | return -EFAULT; |
665 | ||
33524b70 MH |
666 | if ((blink = aac_adapter_check_health(dev)) > 0) { |
667 | if (wait == -1) { | |
668 | printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n" | |
669 | "Usually a result of a serious unrecoverable hardware problem\n", | |
670 | blink); | |
671 | } | |
672 | return -EFAULT; | |
673 | } | |
07beca2b RAR |
674 | /* |
675 | * Allow other processes / CPUS to use core | |
676 | */ | |
677 | schedule(); | |
9203344c | 678 | } |
bc127d93 | 679 | } else if (wait_for_completion_interruptible(&fibptr->event_wait)) { |
cacb6dc3 | 680 | /* Do nothing ... satisfy |
bc127d93 | 681 | * wait_for_completion_interruptible must_check */ |
e6990c64 | 682 | } |
cacb6dc3 | 683 | |
33bb3b29 | 684 | spin_lock_irqsave(&fibptr->event_lock, flags); |
cacb6dc3 | 685 | if (fibptr->done == 0) { |
33bb3b29 | 686 | fibptr->done = 2; /* Tell interrupt we aborted */ |
c8f7b073 | 687 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
cacb6dc3 | 688 | return -ERESTARTSYS; |
c8f7b073 | 689 | } |
33bb3b29 | 690 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
125e1874 | 691 | BUG_ON(fibptr->done == 0); |
8ce3eca4 | 692 | |
912d4e88 | 693 | if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) |
1da177e4 | 694 | return -ETIMEDOUT; |
912d4e88 | 695 | return 0; |
1da177e4 LT |
696 | } |
697 | /* | |
698 | * If the user does not want a response than return success otherwise | |
699 | * return pending | |
700 | */ | |
701 | if (reply) | |
702 | return -EINPROGRESS; | |
703 | else | |
704 | return 0; | |
705 | } | |
706 | ||
423400e6 RAR |
707 | int aac_hba_send(u8 command, struct fib *fibptr, fib_callback callback, |
708 | void *callback_data) | |
709 | { | |
710 | struct aac_dev *dev = fibptr->dev; | |
711 | int wait; | |
712 | unsigned long flags = 0; | |
713 | unsigned long mflags = 0; | |
7d3af7d9 DC |
714 | struct aac_hba_cmd_req *hbacmd = (struct aac_hba_cmd_req *) |
715 | fibptr->hw_fib_va; | |
423400e6 RAR |
716 | |
717 | fibptr->flags = (FIB_CONTEXT_FLAG | FIB_CONTEXT_FLAG_NATIVE_HBA); | |
718 | if (callback) { | |
719 | wait = 0; | |
720 | fibptr->callback = callback; | |
721 | fibptr->callback_data = callback_data; | |
722 | } else | |
723 | wait = 1; | |
724 | ||
725 | ||
7d3af7d9 | 726 | hbacmd->iu_type = command; |
423400e6 | 727 | |
7d3af7d9 | 728 | if (command == HBA_IU_TYPE_SCSI_CMD_REQ) { |
423400e6 RAR |
729 | /* bit1 of request_id must be 0 */ |
730 | hbacmd->request_id = | |
731 | cpu_to_le32((((u32)(fibptr - dev->fibs)) << 2) + 1); | |
c323eab7 | 732 | fibptr->flags |= FIB_CONTEXT_FLAG_SCSI_CMD; |
bef18d30 | 733 | } else |
423400e6 RAR |
734 | return -EINVAL; |
735 | ||
736 | ||
737 | if (wait) { | |
738 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
739 | if (dev->management_fib_count >= AAC_NUM_MGT_FIB) { | |
740 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
741 | return -EBUSY; | |
742 | } | |
743 | dev->management_fib_count++; | |
744 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
745 | spin_lock_irqsave(&fibptr->event_lock, flags); | |
746 | } | |
747 | ||
748 | if (aac_adapter_deliver(fibptr) != 0) { | |
749 | if (wait) { | |
750 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
751 | spin_lock_irqsave(&dev->manage_lock, mflags); | |
752 | dev->management_fib_count--; | |
753 | spin_unlock_irqrestore(&dev->manage_lock, mflags); | |
754 | } | |
755 | return -EBUSY; | |
756 | } | |
757 | FIB_COUNTER_INCREMENT(aac_config.NativeSent); | |
758 | ||
759 | if (wait) { | |
16ae9dd3 | 760 | |
423400e6 | 761 | spin_unlock_irqrestore(&fibptr->event_lock, flags); |
16ae9dd3 | 762 | |
b6554cfe | 763 | if (unlikely(aac_pci_offline(dev))) |
16ae9dd3 RAR |
764 | return -EFAULT; |
765 | ||
8c41b9b7 | 766 | fibptr->flags |= FIB_CONTEXT_FLAG_WAIT; |
bc127d93 | 767 | if (wait_for_completion_interruptible(&fibptr->event_wait)) |
423400e6 | 768 | fibptr->done = 2; |
8c41b9b7 RAR |
769 | fibptr->flags &= ~(FIB_CONTEXT_FLAG_WAIT); |
770 | ||
423400e6 RAR |
771 | spin_lock_irqsave(&fibptr->event_lock, flags); |
772 | if ((fibptr->done == 0) || (fibptr->done == 2)) { | |
773 | fibptr->done = 2; /* Tell interrupt we aborted */ | |
774 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
775 | return -ERESTARTSYS; | |
776 | } | |
777 | spin_unlock_irqrestore(&fibptr->event_lock, flags); | |
778 | WARN_ON(fibptr->done == 0); | |
779 | ||
780 | if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT)) | |
781 | return -ETIMEDOUT; | |
782 | ||
783 | return 0; | |
784 | } | |
785 | ||
786 | return -EINPROGRESS; | |
787 | } | |
788 | ||
8ce3eca4 | 789 | /** |
1da177e4 LT |
790 | * aac_consumer_get - get the top of the queue |
791 | * @dev: Adapter | |
792 | * @q: Queue | |
793 | * @entry: Return entry | |
794 | * | |
795 | * Will return a pointer to the entry on the top of the queue requested that | |
8ce3eca4 SM |
796 | * we are a consumer of, and return the address of the queue entry. It does |
797 | * not change the state of the queue. | |
1da177e4 LT |
798 | */ |
799 | ||
800 | int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry) | |
801 | { | |
802 | u32 index; | |
803 | int status; | |
804 | if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) { | |
805 | status = 0; | |
806 | } else { | |
807 | /* | |
808 | * The consumer index must be wrapped if we have reached | |
809 | * the end of the queue, else we just use the entry | |
810 | * pointed to by the header index | |
811 | */ | |
8ce3eca4 SM |
812 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) |
813 | index = 0; | |
1da177e4 | 814 | else |
8ce3eca4 | 815 | index = le32_to_cpu(*q->headers.consumer); |
1da177e4 LT |
816 | *entry = q->base + index; |
817 | status = 1; | |
818 | } | |
819 | return(status); | |
820 | } | |
821 | ||
822 | /** | |
823 | * aac_consumer_free - free consumer entry | |
824 | * @dev: Adapter | |
825 | * @q: Queue | |
826 | * @qid: Queue ident | |
827 | * | |
828 | * Frees up the current top of the queue we are a consumer of. If the | |
829 | * queue was full notify the producer that the queue is no longer full. | |
830 | */ | |
831 | ||
832 | void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid) | |
833 | { | |
834 | int wasfull = 0; | |
835 | u32 notify; | |
836 | ||
837 | if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer)) | |
838 | wasfull = 1; | |
8ce3eca4 | 839 | |
1da177e4 LT |
840 | if (le32_to_cpu(*q->headers.consumer) >= q->entries) |
841 | *q->headers.consumer = cpu_to_le32(1); | |
842 | else | |
36b8dd1b | 843 | le32_add_cpu(q->headers.consumer, 1); |
8ce3eca4 | 844 | |
1da177e4 LT |
845 | if (wasfull) { |
846 | switch (qid) { | |
847 | ||
848 | case HostNormCmdQueue: | |
849 | notify = HostNormCmdNotFull; | |
850 | break; | |
1da177e4 LT |
851 | case HostNormRespQueue: |
852 | notify = HostNormRespNotFull; | |
853 | break; | |
1da177e4 LT |
854 | default: |
855 | BUG(); | |
856 | return; | |
857 | } | |
858 | aac_adapter_notify(dev, notify); | |
859 | } | |
8ce3eca4 | 860 | } |
1da177e4 LT |
861 | |
862 | /** | |
bfb35aa8 | 863 | * aac_fib_adapter_complete - complete adapter issued fib |
1da177e4 LT |
864 | * @fibptr: fib to complete |
865 | * @size: size of fib | |
866 | * | |
867 | * Will do all necessary work to complete a FIB that was sent from | |
868 | * the adapter. | |
869 | */ | |
870 | ||
bfb35aa8 | 871 | int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size) |
1da177e4 | 872 | { |
a8166a52 | 873 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 874 | struct aac_dev * dev = fibptr->dev; |
1640a2c3 | 875 | struct aac_queue * q; |
1da177e4 | 876 | unsigned long nointr = 0; |
1640a2c3 MH |
877 | unsigned long qflags; |
878 | ||
85d22bbf | 879 | if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 || |
d1ef4da8 RAR |
880 | dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 || |
881 | dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { | |
e8b12f0f MR |
882 | kfree(hw_fib); |
883 | return 0; | |
884 | } | |
885 | ||
1640a2c3 | 886 | if (hw_fib->header.XferState == 0) { |
28713324 | 887 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
e8b12f0f | 888 | kfree(hw_fib); |
8ce3eca4 | 889 | return 0; |
1640a2c3 | 890 | } |
1da177e4 LT |
891 | /* |
892 | * If we plan to do anything check the structure type first. | |
8ce3eca4 | 893 | */ |
85d22bbf MR |
894 | if (hw_fib->header.StructType != FIB_MAGIC && |
895 | hw_fib->header.StructType != FIB_MAGIC2 && | |
896 | hw_fib->header.StructType != FIB_MAGIC2_64) { | |
28713324 | 897 | if (dev->comm_interface == AAC_COMM_MESSAGE) |
e8b12f0f | 898 | kfree(hw_fib); |
8ce3eca4 | 899 | return -EINVAL; |
1da177e4 LT |
900 | } |
901 | /* | |
902 | * This block handles the case where the adapter had sent us a | |
903 | * command and we have finished processing the command. We | |
8ce3eca4 SM |
904 | * call completeFib when we are done processing the command |
905 | * and want to send a response back to the adapter. This will | |
1da177e4 LT |
906 | * send the completed cdb to the adapter. |
907 | */ | |
908 | if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) { | |
28713324 | 909 | if (dev->comm_interface == AAC_COMM_MESSAGE) { |
8e0c5ebd MH |
910 | kfree (hw_fib); |
911 | } else { | |
8ce3eca4 SM |
912 | u32 index; |
913 | hw_fib->header.XferState |= cpu_to_le32(HostProcessed); | |
8e0c5ebd MH |
914 | if (size) { |
915 | size += sizeof(struct aac_fibhdr); | |
8ce3eca4 | 916 | if (size > le16_to_cpu(hw_fib->header.SenderSize)) |
8e0c5ebd MH |
917 | return -EMSGSIZE; |
918 | hw_fib->header.Size = cpu_to_le16(size); | |
919 | } | |
920 | q = &dev->queues->queue[AdapNormRespQueue]; | |
921 | spin_lock_irqsave(q->lock, qflags); | |
922 | aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr); | |
923 | *(q->headers.producer) = cpu_to_le32(index + 1); | |
924 | spin_unlock_irqrestore(q->lock, qflags); | |
925 | if (!(nointr & (int)aac_config.irq_mod)) | |
926 | aac_adapter_notify(dev, AdapNormRespQueue); | |
1da177e4 | 927 | } |
8ce3eca4 SM |
928 | } else { |
929 | printk(KERN_WARNING "aac_fib_adapter_complete: " | |
930 | "Unknown xferstate detected.\n"); | |
931 | BUG(); | |
1da177e4 | 932 | } |
1da177e4 LT |
933 | return 0; |
934 | } | |
935 | ||
936 | /** | |
bfb35aa8 | 937 | * aac_fib_complete - fib completion handler |
f1134f0e | 938 | * @fibptr: FIB to complete |
1da177e4 LT |
939 | * |
940 | * Will do all necessary work to complete a FIB. | |
941 | */ | |
8ce3eca4 | 942 | |
bfb35aa8 | 943 | int aac_fib_complete(struct fib *fibptr) |
1da177e4 | 944 | { |
a8166a52 | 945 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
1da177e4 | 946 | |
423400e6 RAR |
947 | if (fibptr->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) { |
948 | fib_dealloc(fibptr); | |
949 | return 0; | |
950 | } | |
951 | ||
1da177e4 | 952 | /* |
423400e6 RAR |
953 | * Check for a fib which has already been completed or with a |
954 | * status wait timeout | |
1da177e4 LT |
955 | */ |
956 | ||
423400e6 | 957 | if (hw_fib->header.XferState == 0 || fibptr->done == 2) |
8ce3eca4 | 958 | return 0; |
1da177e4 LT |
959 | /* |
960 | * If we plan to do anything check the structure type first. | |
8ce3eca4 | 961 | */ |
1da177e4 | 962 | |
85d22bbf MR |
963 | if (hw_fib->header.StructType != FIB_MAGIC && |
964 | hw_fib->header.StructType != FIB_MAGIC2 && | |
965 | hw_fib->header.StructType != FIB_MAGIC2_64) | |
8ce3eca4 | 966 | return -EINVAL; |
1da177e4 | 967 | /* |
8ce3eca4 | 968 | * This block completes a cdb which orginated on the host and we |
1da177e4 LT |
969 | * just need to deallocate the cdb or reinit it. At this point the |
970 | * command is complete that we had sent to the adapter and this | |
971 | * cdb could be reused. | |
972 | */ | |
cacb6dc3 | 973 | |
1da177e4 LT |
974 | if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) && |
975 | (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed))) | |
976 | { | |
977 | fib_dealloc(fibptr); | |
978 | } | |
979 | else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost)) | |
980 | { | |
981 | /* | |
982 | * This handles the case when the host has aborted the I/O | |
983 | * to the adapter because the adapter is not responding | |
984 | */ | |
985 | fib_dealloc(fibptr); | |
986 | } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) { | |
987 | fib_dealloc(fibptr); | |
988 | } else { | |
989 | BUG(); | |
8ce3eca4 | 990 | } |
1da177e4 LT |
991 | return 0; |
992 | } | |
993 | ||
994 | /** | |
995 | * aac_printf - handle printf from firmware | |
996 | * @dev: Adapter | |
997 | * @val: Message info | |
998 | * | |
999 | * Print a message passed to us by the controller firmware on the | |
1000 | * Adaptec board | |
1001 | */ | |
1002 | ||
1003 | void aac_printf(struct aac_dev *dev, u32 val) | |
1004 | { | |
1da177e4 | 1005 | char *cp = dev->printfbuf; |
7c00ffa3 MH |
1006 | if (dev->printf_enabled) |
1007 | { | |
1008 | int length = val & 0xffff; | |
1009 | int level = (val >> 16) & 0xffff; | |
8ce3eca4 | 1010 | |
7c00ffa3 MH |
1011 | /* |
1012 | * The size of the printfbuf is set in port.c | |
1013 | * There is no variable or define for it | |
1014 | */ | |
1015 | if (length > 255) | |
1016 | length = 255; | |
1017 | if (cp[length] != 0) | |
1018 | cp[length] = 0; | |
1019 | if (level == LOG_AAC_HIGH_ERROR) | |
1241f359 | 1020 | printk(KERN_WARNING "%s:%s", dev->name, cp); |
7c00ffa3 | 1021 | else |
1241f359 | 1022 | printk(KERN_INFO "%s:%s", dev->name, cp); |
7c00ffa3 | 1023 | } |
8ce3eca4 | 1024 | memset(cp, 0, 256); |
1da177e4 LT |
1025 | } |
1026 | ||
9cb62fa2 RAR |
1027 | static inline int aac_aif_data(struct aac_aifcmd *aifcmd, uint32_t index) |
1028 | { | |
1029 | return le32_to_cpu(((__le32 *)aifcmd->data)[index]); | |
1030 | } | |
1031 | ||
1032 | ||
1033 | static void aac_handle_aif_bu(struct aac_dev *dev, struct aac_aifcmd *aifcmd) | |
1034 | { | |
1035 | switch (aac_aif_data(aifcmd, 1)) { | |
1036 | case AifBuCacheDataLoss: | |
1037 | if (aac_aif_data(aifcmd, 2)) | |
1038 | dev_info(&dev->pdev->dev, "Backup unit had cache data loss - [%d]\n", | |
1039 | aac_aif_data(aifcmd, 2)); | |
1040 | else | |
1041 | dev_info(&dev->pdev->dev, "Backup Unit had cache data loss\n"); | |
1042 | break; | |
1043 | case AifBuCacheDataRecover: | |
1044 | if (aac_aif_data(aifcmd, 2)) | |
1045 | dev_info(&dev->pdev->dev, "DDR cache data recovered successfully - [%d]\n", | |
1046 | aac_aif_data(aifcmd, 2)); | |
1047 | else | |
1048 | dev_info(&dev->pdev->dev, "DDR cache data recovered successfully\n"); | |
1049 | break; | |
1050 | } | |
1051 | } | |
131256cf | 1052 | |
f1134f0e | 1053 | #define AIF_SNIFF_TIMEOUT (500*HZ) |
131256cf MH |
1054 | /** |
1055 | * aac_handle_aif - Handle a message from the firmware | |
1056 | * @dev: Which adapter this fib is from | |
1057 | * @fibptr: Pointer to fibptr from adapter | |
1058 | * | |
1059 | * This routine handles a driver notify fib from the adapter and | |
1060 | * dispatches it to the appropriate routine for handling. | |
1061 | */ | |
131256cf MH |
1062 | static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr) |
1063 | { | |
a8166a52 | 1064 | struct hw_fib * hw_fib = fibptr->hw_fib_va; |
131256cf | 1065 | struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data; |
0995ad38 | 1066 | u32 channel, id, lun, container; |
131256cf MH |
1067 | struct scsi_device *device; |
1068 | enum { | |
1069 | NOTHING, | |
1070 | DELETE, | |
1071 | ADD, | |
1072 | CHANGE | |
0995ad38 | 1073 | } device_config_needed = NOTHING; |
131256cf MH |
1074 | |
1075 | /* Sniff for container changes */ | |
1076 | ||
c8f7b073 | 1077 | if (!dev || !dev->fsa_dev) |
131256cf | 1078 | return; |
0995ad38 | 1079 | container = channel = id = lun = (u32)-1; |
131256cf MH |
1080 | |
1081 | /* | |
1082 | * We have set this up to try and minimize the number of | |
1083 | * re-configures that take place. As a result of this when | |
1084 | * certain AIF's come in we will set a flag waiting for another | |
1085 | * type of AIF before setting the re-config flag. | |
1086 | */ | |
1087 | switch (le32_to_cpu(aifcmd->command)) { | |
1088 | case AifCmdDriverNotify: | |
f3307f72 | 1089 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
dab04b01 MR |
1090 | case AifRawDeviceRemove: |
1091 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); | |
1092 | if ((container >> 28)) { | |
1093 | container = (u32)-1; | |
1094 | break; | |
1095 | } | |
1096 | channel = (container >> 24) & 0xF; | |
1097 | if (channel >= dev->maximum_num_channels) { | |
1098 | container = (u32)-1; | |
1099 | break; | |
1100 | } | |
1101 | id = container & 0xFFFF; | |
1102 | if (id >= dev->maximum_num_physicals) { | |
1103 | container = (u32)-1; | |
1104 | break; | |
1105 | } | |
1106 | lun = (container >> 16) & 0xFF; | |
1107 | container = (u32)-1; | |
1108 | channel = aac_phys_to_logical(channel); | |
423400e6 | 1109 | device_config_needed = DELETE; |
dab04b01 | 1110 | break; |
423400e6 | 1111 | |
131256cf MH |
1112 | /* |
1113 | * Morph or Expand complete | |
1114 | */ | |
1115 | case AifDenMorphComplete: | |
1116 | case AifDenVolumeExtendComplete: | |
f3307f72 | 1117 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1118 | if (container >= dev->maximum_num_containers) |
1119 | break; | |
1120 | ||
1121 | /* | |
f64a181d | 1122 | * Find the scsi_device associated with the SCSI |
131256cf MH |
1123 | * address. Make sure we have the right array, and if |
1124 | * so set the flag to initiate a new re-config once we | |
1125 | * see an AifEnConfigChange AIF come through. | |
1126 | */ | |
1127 | ||
1128 | if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) { | |
8ce3eca4 SM |
1129 | device = scsi_device_lookup(dev->scsi_host_ptr, |
1130 | CONTAINER_TO_CHANNEL(container), | |
1131 | CONTAINER_TO_ID(container), | |
131256cf MH |
1132 | CONTAINER_TO_LUN(container)); |
1133 | if (device) { | |
1134 | dev->fsa_dev[container].config_needed = CHANGE; | |
1135 | dev->fsa_dev[container].config_waiting_on = AifEnConfigChange; | |
31876f32 | 1136 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1137 | scsi_device_put(device); |
1138 | } | |
1139 | } | |
1140 | } | |
1141 | ||
1142 | /* | |
1143 | * If we are waiting on something and this happens to be | |
1144 | * that thing then set the re-configure flag. | |
1145 | */ | |
1146 | if (container != (u32)-1) { | |
1147 | if (container >= dev->maximum_num_containers) | |
1148 | break; | |
31876f32 | 1149 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1150 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1151 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1152 | dev->fsa_dev[container].config_waiting_on = 0; |
1153 | } else for (container = 0; | |
1154 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 1155 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1156 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1157 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1158 | dev->fsa_dev[container].config_waiting_on = 0; |
1159 | } | |
1160 | break; | |
1161 | ||
1162 | case AifCmdEventNotify: | |
f3307f72 | 1163 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) { |
95e852e1 SM |
1164 | case AifEnBatteryEvent: |
1165 | dev->cache_protected = | |
1166 | (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3)); | |
1167 | break; | |
131256cf MH |
1168 | /* |
1169 | * Add an Array. | |
1170 | */ | |
1171 | case AifEnAddContainer: | |
f3307f72 | 1172 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1173 | if (container >= dev->maximum_num_containers) |
1174 | break; | |
1175 | dev->fsa_dev[container].config_needed = ADD; | |
1176 | dev->fsa_dev[container].config_waiting_on = | |
1177 | AifEnConfigChange; | |
31876f32 | 1178 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1179 | break; |
1180 | ||
1181 | /* | |
1182 | * Delete an Array. | |
1183 | */ | |
1184 | case AifEnDeleteContainer: | |
f3307f72 | 1185 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1186 | if (container >= dev->maximum_num_containers) |
1187 | break; | |
1188 | dev->fsa_dev[container].config_needed = DELETE; | |
1189 | dev->fsa_dev[container].config_waiting_on = | |
1190 | AifEnConfigChange; | |
31876f32 | 1191 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1192 | break; |
1193 | ||
1194 | /* | |
1195 | * Container change detected. If we currently are not | |
1196 | * waiting on something else, setup to wait on a Config Change. | |
1197 | */ | |
1198 | case AifEnContainerChange: | |
f3307f72 | 1199 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); |
131256cf MH |
1200 | if (container >= dev->maximum_num_containers) |
1201 | break; | |
31876f32 MH |
1202 | if (dev->fsa_dev[container].config_waiting_on && |
1203 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) | |
131256cf MH |
1204 | break; |
1205 | dev->fsa_dev[container].config_needed = CHANGE; | |
1206 | dev->fsa_dev[container].config_waiting_on = | |
1207 | AifEnConfigChange; | |
31876f32 | 1208 | dev->fsa_dev[container].config_waiting_stamp = jiffies; |
131256cf MH |
1209 | break; |
1210 | ||
1211 | case AifEnConfigChange: | |
1212 | break; | |
1213 | ||
cb1042f2 SM |
1214 | case AifEnAddJBOD: |
1215 | case AifEnDeleteJBOD: | |
1216 | container = le32_to_cpu(((__le32 *)aifcmd->data)[1]); | |
a4576b5d MS |
1217 | if ((container >> 28)) { |
1218 | container = (u32)-1; | |
cb1042f2 | 1219 | break; |
a4576b5d | 1220 | } |
cb1042f2 | 1221 | channel = (container >> 24) & 0xF; |
a4576b5d MS |
1222 | if (channel >= dev->maximum_num_channels) { |
1223 | container = (u32)-1; | |
cb1042f2 | 1224 | break; |
a4576b5d | 1225 | } |
cb1042f2 | 1226 | id = container & 0xFFFF; |
a4576b5d MS |
1227 | if (id >= dev->maximum_num_physicals) { |
1228 | container = (u32)-1; | |
cb1042f2 | 1229 | break; |
a4576b5d | 1230 | } |
cb1042f2 | 1231 | lun = (container >> 16) & 0xFF; |
a4576b5d | 1232 | container = (u32)-1; |
cb1042f2 SM |
1233 | channel = aac_phys_to_logical(channel); |
1234 | device_config_needed = | |
1235 | (((__le32 *)aifcmd->data)[0] == | |
1236 | cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE; | |
5ca05594 RM |
1237 | if (device_config_needed == ADD) { |
1238 | device = scsi_device_lookup(dev->scsi_host_ptr, | |
1239 | channel, | |
1240 | id, | |
1241 | lun); | |
1242 | if (device) { | |
1243 | scsi_remove_device(device); | |
1244 | scsi_device_put(device); | |
1245 | } | |
1246 | } | |
cb1042f2 SM |
1247 | break; |
1248 | ||
0995ad38 | 1249 | case AifEnEnclosureManagement: |
cb1042f2 SM |
1250 | /* |
1251 | * If in JBOD mode, automatic exposure of new | |
1252 | * physical target to be suppressed until configured. | |
1253 | */ | |
1254 | if (dev->jbod) | |
1255 | break; | |
0995ad38 SM |
1256 | switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) { |
1257 | case EM_DRIVE_INSERTION: | |
1258 | case EM_DRIVE_REMOVAL: | |
46154a02 MR |
1259 | case EM_SES_DRIVE_INSERTION: |
1260 | case EM_SES_DRIVE_REMOVAL: | |
0995ad38 SM |
1261 | container = le32_to_cpu( |
1262 | ((__le32 *)aifcmd->data)[2]); | |
a4576b5d MS |
1263 | if ((container >> 28)) { |
1264 | container = (u32)-1; | |
0995ad38 | 1265 | break; |
a4576b5d | 1266 | } |
0995ad38 | 1267 | channel = (container >> 24) & 0xF; |
a4576b5d MS |
1268 | if (channel >= dev->maximum_num_channels) { |
1269 | container = (u32)-1; | |
0995ad38 | 1270 | break; |
a4576b5d | 1271 | } |
0995ad38 SM |
1272 | id = container & 0xFFFF; |
1273 | lun = (container >> 16) & 0xFF; | |
a4576b5d | 1274 | container = (u32)-1; |
0995ad38 SM |
1275 | if (id >= dev->maximum_num_physicals) { |
1276 | /* legacy dev_t ? */ | |
1277 | if ((0x2000 <= id) || lun || channel || | |
1278 | ((channel = (id >> 7) & 0x3F) >= | |
1279 | dev->maximum_num_channels)) | |
1280 | break; | |
1281 | lun = (id >> 4) & 7; | |
1282 | id &= 0xF; | |
1283 | } | |
1284 | channel = aac_phys_to_logical(channel); | |
1285 | device_config_needed = | |
46154a02 MR |
1286 | ((((__le32 *)aifcmd->data)[3] |
1287 | == cpu_to_le32(EM_DRIVE_INSERTION)) || | |
1288 | (((__le32 *)aifcmd->data)[3] | |
1289 | == cpu_to_le32(EM_SES_DRIVE_INSERTION))) ? | |
0995ad38 SM |
1290 | ADD : DELETE; |
1291 | break; | |
1292 | } | |
5e420fe6 GS |
1293 | break; |
1294 | case AifBuManagerEvent: | |
1295 | aac_handle_aif_bu(dev, aifcmd); | |
0995ad38 | 1296 | break; |
131256cf MH |
1297 | } |
1298 | ||
1299 | /* | |
1300 | * If we are waiting on something and this happens to be | |
1301 | * that thing then set the re-configure flag. | |
1302 | */ | |
1303 | if (container != (u32)-1) { | |
1304 | if (container >= dev->maximum_num_containers) | |
1305 | break; | |
31876f32 | 1306 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1307 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1308 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1309 | dev->fsa_dev[container].config_waiting_on = 0; |
1310 | } else for (container = 0; | |
1311 | container < dev->maximum_num_containers; ++container) { | |
31876f32 | 1312 | if ((dev->fsa_dev[container].config_waiting_on == |
f3307f72 | 1313 | le32_to_cpu(*(__le32 *)aifcmd->data)) && |
31876f32 | 1314 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) |
131256cf MH |
1315 | dev->fsa_dev[container].config_waiting_on = 0; |
1316 | } | |
1317 | break; | |
1318 | ||
1319 | case AifCmdJobProgress: | |
1320 | /* | |
1321 | * These are job progress AIF's. When a Clear is being | |
1322 | * done on a container it is initially created then hidden from | |
1323 | * the OS. When the clear completes we don't get a config | |
1324 | * change so we monitor the job status complete on a clear then | |
1325 | * wait for a container change. | |
1326 | */ | |
1327 | ||
f3307f72 CH |
1328 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
1329 | (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] || | |
1330 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) { | |
131256cf MH |
1331 | for (container = 0; |
1332 | container < dev->maximum_num_containers; | |
1333 | ++container) { | |
1334 | /* | |
1335 | * Stomp on all config sequencing for all | |
1336 | * containers? | |
1337 | */ | |
1338 | dev->fsa_dev[container].config_waiting_on = | |
1339 | AifEnContainerChange; | |
1340 | dev->fsa_dev[container].config_needed = ADD; | |
31876f32 MH |
1341 | dev->fsa_dev[container].config_waiting_stamp = |
1342 | jiffies; | |
131256cf MH |
1343 | } |
1344 | } | |
f3307f72 CH |
1345 | if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) && |
1346 | ((__le32 *)aifcmd->data)[6] == 0 && | |
1347 | ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) { | |
131256cf MH |
1348 | for (container = 0; |
1349 | container < dev->maximum_num_containers; | |
1350 | ++container) { | |
1351 | /* | |
1352 | * Stomp on all config sequencing for all | |
1353 | * containers? | |
1354 | */ | |
1355 | dev->fsa_dev[container].config_waiting_on = | |
1356 | AifEnContainerChange; | |
1357 | dev->fsa_dev[container].config_needed = DELETE; | |
31876f32 MH |
1358 | dev->fsa_dev[container].config_waiting_stamp = |
1359 | jiffies; | |
131256cf MH |
1360 | } |
1361 | } | |
1362 | break; | |
1363 | } | |
1364 | ||
a4576b5d MS |
1365 | container = 0; |
1366 | retry_next: | |
e13949ae CIK |
1367 | if (device_config_needed == NOTHING) { |
1368 | for (; container < dev->maximum_num_containers; ++container) { | |
1369 | if ((dev->fsa_dev[container].config_waiting_on == 0) && | |
1370 | (dev->fsa_dev[container].config_needed != NOTHING) && | |
1371 | time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) { | |
1372 | device_config_needed = | |
1373 | dev->fsa_dev[container].config_needed; | |
1374 | dev->fsa_dev[container].config_needed = NOTHING; | |
1375 | channel = CONTAINER_TO_CHANNEL(container); | |
1376 | id = CONTAINER_TO_ID(container); | |
1377 | lun = CONTAINER_TO_LUN(container); | |
1378 | break; | |
1379 | } | |
131256cf MH |
1380 | } |
1381 | } | |
1382 | if (device_config_needed == NOTHING) | |
1383 | return; | |
1384 | ||
1385 | /* | |
1386 | * If we decided that a re-configuration needs to be done, | |
1387 | * schedule it here on the way out the door, please close the door | |
1388 | * behind you. | |
1389 | */ | |
1390 | ||
131256cf | 1391 | /* |
f64a181d | 1392 | * Find the scsi_device associated with the SCSI address, |
131256cf MH |
1393 | * and mark it as changed, invalidating the cache. This deals |
1394 | * with changes to existing device IDs. | |
1395 | */ | |
1396 | ||
1397 | if (!dev || !dev->scsi_host_ptr) | |
1398 | return; | |
1399 | /* | |
bfb35aa8 | 1400 | * force reload of disk info via aac_probe_container |
131256cf | 1401 | */ |
0995ad38 SM |
1402 | if ((channel == CONTAINER_CHANNEL) && |
1403 | (device_config_needed != NOTHING)) { | |
1404 | if (dev->fsa_dev[container].valid == 1) | |
1405 | dev->fsa_dev[container].valid = 2; | |
bfb35aa8 | 1406 | aac_probe_container(dev, container); |
0995ad38 SM |
1407 | } |
1408 | device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun); | |
131256cf MH |
1409 | if (device) { |
1410 | switch (device_config_needed) { | |
1411 | case DELETE: | |
9cccde93 RM |
1412 | #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE)) |
1413 | scsi_remove_device(device); | |
1414 | #else | |
0995ad38 SM |
1415 | if (scsi_device_online(device)) { |
1416 | scsi_device_set_state(device, SDEV_OFFLINE); | |
1417 | sdev_printk(KERN_INFO, device, | |
1418 | "Device offlined - %s\n", | |
1419 | (channel == CONTAINER_CHANNEL) ? | |
1420 | "array deleted" : | |
1421 | "enclosure services event"); | |
1422 | } | |
9cccde93 | 1423 | #endif |
0995ad38 SM |
1424 | break; |
1425 | case ADD: | |
1426 | if (!scsi_device_online(device)) { | |
1427 | sdev_printk(KERN_INFO, device, | |
1428 | "Device online - %s\n", | |
1429 | (channel == CONTAINER_CHANNEL) ? | |
1430 | "array created" : | |
1431 | "enclosure services event"); | |
1432 | scsi_device_set_state(device, SDEV_RUNNING); | |
1433 | } | |
df561f66 | 1434 | fallthrough; |
131256cf | 1435 | case CHANGE: |
0995ad38 SM |
1436 | if ((channel == CONTAINER_CHANNEL) |
1437 | && (!dev->fsa_dev[container].valid)) { | |
9cccde93 RM |
1438 | #if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE)) |
1439 | scsi_remove_device(device); | |
1440 | #else | |
0995ad38 SM |
1441 | if (!scsi_device_online(device)) |
1442 | break; | |
1443 | scsi_device_set_state(device, SDEV_OFFLINE); | |
1444 | sdev_printk(KERN_INFO, device, | |
1445 | "Device offlined - %s\n", | |
1446 | "array failed"); | |
9cccde93 | 1447 | #endif |
0995ad38 SM |
1448 | break; |
1449 | } | |
131256cf MH |
1450 | scsi_rescan_device(&device->sdev_gendev); |
1451 | ||
1452 | default: | |
1453 | break; | |
1454 | } | |
1455 | scsi_device_put(device); | |
0995ad38 | 1456 | device_config_needed = NOTHING; |
131256cf | 1457 | } |
0995ad38 SM |
1458 | if (device_config_needed == ADD) |
1459 | scsi_add_device(dev->scsi_host_ptr, channel, id, lun); | |
a4576b5d MS |
1460 | if (channel == CONTAINER_CHANNEL) { |
1461 | container++; | |
1462 | device_config_needed = NOTHING; | |
1463 | goto retry_next; | |
1464 | } | |
131256cf MH |
1465 | } |
1466 | ||
26c54d0e B |
1467 | static void aac_schedule_bus_scan(struct aac_dev *aac) |
1468 | { | |
1469 | if (aac->sa_firmware) | |
1470 | aac_schedule_safw_scan_worker(aac); | |
1471 | else | |
1472 | aac_schedule_src_reinit_aif_worker(aac); | |
1473 | } | |
1474 | ||
31364329 | 1475 | static int _aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type) |
8c867b25 MH |
1476 | { |
1477 | int index, quirks; | |
8b1462e0 | 1478 | int retval; |
5646e13a | 1479 | struct Scsi_Host *host = aac->scsi_host_ptr; |
29c97684 | 1480 | int jafo = 0; |
31364329 | 1481 | int bled; |
8105d39d | 1482 | u64 dmamask; |
8c41b9b7 | 1483 | int num_of_fibs = 0; |
8c867b25 MH |
1484 | |
1485 | /* | |
1486 | * Assumptions: | |
29c97684 SM |
1487 | * - host is locked, unless called by the aacraid thread. |
1488 | * (a matter of convenience, due to legacy issues surrounding | |
1489 | * eh_host_adapter_reset). | |
8c867b25 MH |
1490 | * - in_reset is asserted, so no new i/o is getting to the |
1491 | * card. | |
29c97684 SM |
1492 | * - The card is dead, or will be very shortly ;-/ so no new |
1493 | * commands are completing in the interrupt service. | |
8c867b25 | 1494 | */ |
8c867b25 | 1495 | aac_adapter_disable_int(aac); |
1c6b41fb | 1496 | if (aac->thread && aac->thread->pid != current->pid) { |
29c97684 SM |
1497 | spin_unlock_irq(host->host_lock); |
1498 | kthread_stop(aac->thread); | |
1c6b41fb | 1499 | aac->thread = NULL; |
29c97684 SM |
1500 | jafo = 1; |
1501 | } | |
8c867b25 MH |
1502 | |
1503 | /* | |
1504 | * If a positive health, means in a known DEAD PANIC | |
1505 | * state and the adapter could be reset to `try again'. | |
1506 | */ | |
31364329 RAR |
1507 | bled = forced ? 0 : aac_adapter_check_health(aac); |
1508 | retval = aac_adapter_restart(aac, bled, reset_type); | |
8c867b25 MH |
1509 | |
1510 | if (retval) | |
1511 | goto out; | |
8c867b25 | 1512 | |
d18b448f MH |
1513 | /* |
1514 | * Loop through the fibs, close the synchronous FIBS | |
1515 | */ | |
8c41b9b7 RAR |
1516 | retval = 1; |
1517 | num_of_fibs = aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB; | |
1518 | for (index = 0; index < num_of_fibs; index++) { | |
1519 | ||
d18b448f | 1520 | struct fib *fib = &aac->fibs[index]; |
8c41b9b7 RAR |
1521 | __le32 XferState = fib->hw_fib_va->header.XferState; |
1522 | bool is_response_expected = false; | |
1523 | ||
1524 | if (!(XferState & cpu_to_le32(NoResponseExpected | Async)) && | |
1525 | (XferState & cpu_to_le32(ResponseExpected))) | |
1526 | is_response_expected = true; | |
1527 | ||
1528 | if (is_response_expected | |
1529 | || fib->flags & FIB_CONTEXT_FLAG_WAIT) { | |
d18b448f MH |
1530 | unsigned long flagv; |
1531 | spin_lock_irqsave(&fib->event_lock, flagv); | |
bc127d93 | 1532 | complete(&fib->event_wait); |
d18b448f MH |
1533 | spin_unlock_irqrestore(&fib->event_lock, flagv); |
1534 | schedule(); | |
33bb3b29 | 1535 | retval = 0; |
d18b448f MH |
1536 | } |
1537 | } | |
33bb3b29 MH |
1538 | /* Give some extra time for ioctls to complete. */ |
1539 | if (retval == 0) | |
1540 | ssleep(2); | |
8c867b25 MH |
1541 | index = aac->cardtype; |
1542 | ||
1543 | /* | |
1544 | * Re-initialize the adapter, first free resources, then carefully | |
1545 | * apply the initialization sequence to come back again. Only risk | |
1546 | * is a change in Firmware dropping cache, it is assumed the caller | |
1547 | * will ensure that i/o is queisced and the card is flushed in that | |
1548 | * case. | |
1549 | */ | |
e4717292 | 1550 | aac_free_irq(aac); |
8c867b25 | 1551 | aac_fib_map_free(aac); |
f481973d MR |
1552 | dma_free_coherent(&aac->pdev->dev, aac->comm_size, aac->comm_addr, |
1553 | aac->comm_phys); | |
8c867b25 MH |
1554 | aac->comm_addr = NULL; |
1555 | aac->comm_phys = 0; | |
1556 | kfree(aac->queues); | |
1557 | aac->queues = NULL; | |
8c867b25 MH |
1558 | kfree(aac->fsa_dev); |
1559 | aac->fsa_dev = NULL; | |
8105d39d RAR |
1560 | |
1561 | dmamask = DMA_BIT_MASK(32); | |
94cf6ba1 | 1562 | quirks = aac_get_driver_ident(index)->quirks; |
8105d39d RAR |
1563 | if (quirks & AAC_QUIRK_31BIT) |
1564 | retval = pci_set_dma_mask(aac->pdev, dmamask); | |
1565 | else if (!(quirks & AAC_QUIRK_SRC)) | |
1566 | retval = pci_set_dma_mask(aac->pdev, dmamask); | |
1567 | else | |
1568 | retval = pci_set_consistent_dma_mask(aac->pdev, dmamask); | |
1569 | ||
1570 | if (quirks & AAC_QUIRK_31BIT && !retval) { | |
1571 | dmamask = DMA_BIT_MASK(31); | |
1572 | retval = pci_set_consistent_dma_mask(aac->pdev, dmamask); | |
8c867b25 | 1573 | } |
8105d39d RAR |
1574 | |
1575 | if (retval) | |
1576 | goto out; | |
1577 | ||
8c867b25 MH |
1578 | if ((retval = (*(aac_get_driver_ident(index)->init))(aac))) |
1579 | goto out; | |
8105d39d | 1580 | |
29c97684 | 1581 | if (jafo) { |
f170168b KC |
1582 | aac->thread = kthread_run(aac_command_thread, aac, "%s", |
1583 | aac->name); | |
29c97684 SM |
1584 | if (IS_ERR(aac->thread)) { |
1585 | retval = PTR_ERR(aac->thread); | |
1c6b41fb | 1586 | aac->thread = NULL; |
29c97684 SM |
1587 | goto out; |
1588 | } | |
8c867b25 MH |
1589 | } |
1590 | (void)aac_get_adapter_info(aac); | |
8c867b25 | 1591 | if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) { |
8ce3eca4 SM |
1592 | host->sg_tablesize = 34; |
1593 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1594 | } | |
1595 | if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) { | |
1596 | host->sg_tablesize = 17; | |
1597 | host->max_sectors = (host->sg_tablesize * 8) + 112; | |
1598 | } | |
8c867b25 MH |
1599 | aac_get_config_status(aac, 1); |
1600 | aac_get_containers(aac); | |
1601 | /* | |
1602 | * This is where the assumption that the Adapter is quiesced | |
1603 | * is important. | |
1604 | */ | |
a1855f61 HR |
1605 | scsi_host_complete_all_commands(host, DID_RESET); |
1606 | ||
8c867b25 | 1607 | retval = 0; |
8c867b25 MH |
1608 | out: |
1609 | aac->in_reset = 0; | |
c5313ae8 | 1610 | |
a2d0321d RAR |
1611 | /* |
1612 | * Issue bus rescan to catch any configuration that might have | |
1613 | * occurred | |
1614 | */ | |
fe523759 | 1615 | if (!retval && !is_kdump_kernel()) { |
8a30e50b | 1616 | dev_info(&aac->pdev->dev, "Scheduling bus rescan\n"); |
26c54d0e | 1617 | aac_schedule_bus_scan(aac); |
a2d0321d | 1618 | } |
8a30e50b | 1619 | |
29c97684 SM |
1620 | if (jafo) { |
1621 | spin_lock_irq(host->host_lock); | |
1622 | } | |
1623 | return retval; | |
1624 | } | |
1625 | ||
31364329 | 1626 | int aac_reset_adapter(struct aac_dev *aac, int forced, u8 reset_type) |
29c97684 SM |
1627 | { |
1628 | unsigned long flagv = 0; | |
4e6c78d1 | 1629 | int retval, unblock_retval; |
5646e13a | 1630 | struct Scsi_Host *host = aac->scsi_host_ptr; |
31364329 | 1631 | int bled; |
29c97684 SM |
1632 | |
1633 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1634 | return -EBUSY; | |
1635 | ||
1636 | if (aac->in_reset) { | |
1637 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1638 | return -EBUSY; | |
1639 | } | |
1640 | aac->in_reset = 1; | |
1641 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1642 | ||
1643 | /* | |
1644 | * Wait for all commands to complete to this specific | |
1645 | * target (block maximum 60 seconds). Although not necessary, | |
1646 | * it does make us a good storage citizen. | |
1647 | */ | |
3d3ca53b | 1648 | scsi_host_block(host); |
29c97684 SM |
1649 | |
1650 | /* Quiesce build, flush cache, write through mode */ | |
f858317d SM |
1651 | if (forced < 2) |
1652 | aac_send_shutdown(aac); | |
29c97684 | 1653 | spin_lock_irqsave(host->host_lock, flagv); |
31364329 RAR |
1654 | bled = forced ? forced : |
1655 | (aac_check_reset != 0 && aac_check_reset != 1); | |
1656 | retval = _aac_reset_adapter(aac, bled, reset_type); | |
29c97684 SM |
1657 | spin_unlock_irqrestore(host->host_lock, flagv); |
1658 | ||
4e6c78d1 HR |
1659 | unblock_retval = scsi_host_unblock(host, SDEV_RUNNING); |
1660 | if (!retval) | |
1661 | retval = unblock_retval; | |
f858317d | 1662 | if ((forced < 2) && (retval == -ENODEV)) { |
29c97684 SM |
1663 | /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */ |
1664 | struct fib * fibctx = aac_fib_alloc(aac); | |
1665 | if (fibctx) { | |
1666 | struct aac_pause *cmd; | |
1667 | int status; | |
1668 | ||
1669 | aac_fib_init(fibctx); | |
1670 | ||
1671 | cmd = (struct aac_pause *) fib_data(fibctx); | |
1672 | ||
1673 | cmd->command = cpu_to_le32(VM_ContainerConfig); | |
1674 | cmd->type = cpu_to_le32(CT_PAUSE_IO); | |
1675 | cmd->timeout = cpu_to_le32(1); | |
1676 | cmd->min = cpu_to_le32(1); | |
1677 | cmd->noRescan = cpu_to_le32(1); | |
1678 | cmd->count = cpu_to_le32(0); | |
1679 | ||
1680 | status = aac_fib_send(ContainerCommand, | |
1681 | fibctx, | |
1682 | sizeof(struct aac_pause), | |
1683 | FsaNormal, | |
1684 | -2 /* Timeout silently */, 1, | |
1685 | NULL, NULL); | |
1686 | ||
1687 | if (status >= 0) | |
1688 | aac_fib_complete(fibctx); | |
cacb6dc3 PNRCEH |
1689 | /* FIB should be freed only after getting |
1690 | * the response from the F/W */ | |
1691 | if (status != -ERESTARTSYS) | |
1692 | aac_fib_free(fibctx); | |
29c97684 SM |
1693 | } |
1694 | } | |
1695 | ||
8c867b25 MH |
1696 | return retval; |
1697 | } | |
1698 | ||
1699 | int aac_check_health(struct aac_dev * aac) | |
1700 | { | |
1701 | int BlinkLED; | |
1702 | unsigned long time_now, flagv = 0; | |
1703 | struct list_head * entry; | |
8c867b25 MH |
1704 | |
1705 | /* Extending the scope of fib_lock slightly to protect aac->in_reset */ | |
1706 | if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0) | |
1707 | return 0; | |
1708 | ||
1709 | if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) { | |
1710 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1711 | return 0; /* OK */ | |
1712 | } | |
1713 | ||
1714 | aac->in_reset = 1; | |
1715 | ||
1716 | /* Fake up an AIF: | |
1717 | * aac_aifcmd.command = AifCmdEventNotify = 1 | |
1718 | * aac_aifcmd.seqnum = 0xFFFFFFFF | |
1719 | * aac_aifcmd.data[0] = AifEnExpEvent = 23 | |
1720 | * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3 | |
1721 | * aac.aifcmd.data[2] = AifHighPriority = 3 | |
1722 | * aac.aifcmd.data[3] = BlinkLED | |
1723 | */ | |
1724 | ||
1725 | time_now = jiffies/HZ; | |
1726 | entry = aac->fib_list.next; | |
1727 | ||
1728 | /* | |
1729 | * For each Context that is on the | |
1730 | * fibctxList, make a copy of the | |
1731 | * fib, and then set the event to wake up the | |
1732 | * thread that is waiting for it. | |
1733 | */ | |
1734 | while (entry != &aac->fib_list) { | |
1735 | /* | |
1736 | * Extract the fibctx | |
1737 | */ | |
1738 | struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next); | |
1739 | struct hw_fib * hw_fib; | |
1740 | struct fib * fib; | |
1741 | /* | |
1742 | * Check if the queue is getting | |
1743 | * backlogged | |
1744 | */ | |
1745 | if (fibctx->count > 20) { | |
1746 | /* | |
1747 | * It's *not* jiffies folks, | |
1748 | * but jiffies / HZ, so do not | |
1749 | * panic ... | |
1750 | */ | |
1751 | u32 time_last = fibctx->jiffies; | |
1752 | /* | |
1753 | * Has it been > 2 minutes | |
1754 | * since the last read off | |
1755 | * the queue? | |
1756 | */ | |
1757 | if ((time_now - time_last) > aif_timeout) { | |
1758 | entry = entry->next; | |
1759 | aac_close_fib_context(aac, fibctx); | |
1760 | continue; | |
1761 | } | |
1762 | } | |
1763 | /* | |
1764 | * Warning: no sleep allowed while | |
1765 | * holding spinlock | |
1766 | */ | |
4dbc22d7 SM |
1767 | hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC); |
1768 | fib = kzalloc(sizeof(struct fib), GFP_ATOMIC); | |
8c867b25 MH |
1769 | if (fib && hw_fib) { |
1770 | struct aac_aifcmd * aif; | |
1771 | ||
a8166a52 | 1772 | fib->hw_fib_va = hw_fib; |
8c867b25 MH |
1773 | fib->dev = aac; |
1774 | aac_fib_init(fib); | |
1775 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
1776 | fib->size = sizeof (struct fib); | |
1777 | fib->data = hw_fib->data; | |
1778 | aif = (struct aac_aifcmd *)hw_fib->data; | |
1779 | aif->command = cpu_to_le32(AifCmdEventNotify); | |
a3940da5 SM |
1780 | aif->seqnum = cpu_to_le32(0xFFFFFFFF); |
1781 | ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent); | |
1782 | ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic); | |
1783 | ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority); | |
1784 | ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED); | |
8c867b25 MH |
1785 | |
1786 | /* | |
1787 | * Put the FIB onto the | |
1788 | * fibctx's fibs | |
1789 | */ | |
1790 | list_add_tail(&fib->fiblink, &fibctx->fib_list); | |
1791 | fibctx->count++; | |
1792 | /* | |
1793 | * Set the event to wake up the | |
1794 | * thread that will waiting. | |
1795 | */ | |
dc71eccc | 1796 | complete(&fibctx->completion); |
8c867b25 MH |
1797 | } else { |
1798 | printk(KERN_WARNING "aifd: didn't allocate NewFib.\n"); | |
1799 | kfree(fib); | |
1800 | kfree(hw_fib); | |
1801 | } | |
1802 | entry = entry->next; | |
1803 | } | |
1804 | ||
1805 | spin_unlock_irqrestore(&aac->fib_lock, flagv); | |
1806 | ||
1807 | if (BlinkLED < 0) { | |
911e572e GP |
1808 | printk(KERN_ERR "%s: Host adapter is dead (or got a PCI error) %d\n", |
1809 | aac->name, BlinkLED); | |
8c867b25 MH |
1810 | goto out; |
1811 | } | |
1812 | ||
1813 | printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED); | |
1814 | ||
8c867b25 MH |
1815 | out: |
1816 | aac->in_reset = 0; | |
1817 | return BlinkLED; | |
1818 | } | |
1819 | ||
f2d2caba RAR |
1820 | static inline int is_safw_raid_volume(struct aac_dev *aac, int bus, int target) |
1821 | { | |
1822 | return bus == CONTAINER_CHANNEL && target < aac->maximum_num_containers; | |
1823 | } | |
6223a39f | 1824 | |
3031c656 RAR |
1825 | static struct scsi_device *aac_lookup_safw_scsi_device(struct aac_dev *dev, |
1826 | int bus, | |
1827 | int target) | |
1828 | { | |
1829 | if (bus != CONTAINER_CHANNEL) | |
1830 | bus = aac_phys_to_logical(bus); | |
1831 | ||
1832 | return scsi_device_lookup(dev->scsi_host_ptr, bus, target, 0); | |
1833 | } | |
1834 | ||
1835 | static int aac_add_safw_device(struct aac_dev *dev, int bus, int target) | |
1836 | { | |
1837 | if (bus != CONTAINER_CHANNEL) | |
1838 | bus = aac_phys_to_logical(bus); | |
1839 | ||
1840 | return scsi_add_device(dev->scsi_host_ptr, bus, target, 0); | |
1841 | } | |
1842 | ||
1843 | static void aac_put_safw_scsi_device(struct scsi_device *sdev) | |
1844 | { | |
1845 | if (sdev) | |
1846 | scsi_device_put(sdev); | |
1847 | } | |
1848 | ||
1849 | static void aac_remove_safw_device(struct aac_dev *dev, int bus, int target) | |
6223a39f | 1850 | { |
6223a39f | 1851 | struct scsi_device *sdev; |
6223a39f | 1852 | |
3031c656 RAR |
1853 | sdev = aac_lookup_safw_scsi_device(dev, bus, target); |
1854 | scsi_remove_device(sdev); | |
1855 | aac_put_safw_scsi_device(sdev); | |
1856 | } | |
6223a39f | 1857 | |
f2d2caba RAR |
1858 | static inline int aac_is_safw_scan_count_equal(struct aac_dev *dev, |
1859 | int bus, int target) | |
1860 | { | |
1861 | return dev->hba_map[bus][target].scan_counter == dev->scan_counter; | |
1862 | } | |
1863 | ||
1864 | static int aac_is_safw_target_valid(struct aac_dev *dev, int bus, int target) | |
1865 | { | |
1866 | if (is_safw_raid_volume(dev, bus, target)) | |
1867 | return dev->fsa_dev[target].valid; | |
1868 | else | |
1869 | return aac_is_safw_scan_count_equal(dev, bus, target); | |
1870 | } | |
6223a39f | 1871 | |
3031c656 RAR |
1872 | static int aac_is_safw_device_exposed(struct aac_dev *dev, int bus, int target) |
1873 | { | |
1874 | int is_exposed = 0; | |
1875 | struct scsi_device *sdev; | |
6223a39f | 1876 | |
3031c656 RAR |
1877 | sdev = aac_lookup_safw_scsi_device(dev, bus, target); |
1878 | if (sdev) | |
1879 | is_exposed = 1; | |
1880 | aac_put_safw_scsi_device(sdev); | |
6223a39f | 1881 | |
3031c656 RAR |
1882 | return is_exposed; |
1883 | } | |
6223a39f | 1884 | |
75be67cd | 1885 | static int aac_update_safw_host_devices(struct aac_dev *dev) |
6223a39f | 1886 | { |
2290678f | 1887 | int i; |
6f44a22b RAR |
1888 | int bus; |
1889 | int target; | |
3031c656 | 1890 | int is_exposed = 0; |
6f44a22b | 1891 | int rcode = 0; |
6223a39f | 1892 | |
75be67cd | 1893 | rcode = aac_setup_safw_adapter(dev); |
6f44a22b RAR |
1894 | if (unlikely(rcode < 0)) { |
1895 | goto out; | |
6223a39f | 1896 | } |
6223a39f | 1897 | |
2290678f | 1898 | for (i = 0; i < AAC_BUS_TARGET_LOOP; i++) { |
6223a39f | 1899 | |
2290678f RAR |
1900 | bus = get_bus_number(i); |
1901 | target = get_target_number(i); | |
6223a39f | 1902 | |
3031c656 | 1903 | is_exposed = aac_is_safw_device_exposed(dev, bus, target); |
6223a39f | 1904 | |
3031c656 RAR |
1905 | if (aac_is_safw_target_valid(dev, bus, target) && !is_exposed) |
1906 | aac_add_safw_device(dev, bus, target); | |
1907 | else if (!aac_is_safw_target_valid(dev, bus, target) && | |
1908 | is_exposed) | |
1909 | aac_remove_safw_device(dev, bus, target); | |
6223a39f | 1910 | } |
6f44a22b RAR |
1911 | out: |
1912 | return rcode; | |
6223a39f RAR |
1913 | } |
1914 | ||
75be67cd | 1915 | static int aac_scan_safw_host(struct aac_dev *dev) |
a1367e4a RAR |
1916 | { |
1917 | int rcode = 0; | |
1918 | ||
75be67cd | 1919 | rcode = aac_update_safw_host_devices(dev); |
a1367e4a RAR |
1920 | if (rcode) |
1921 | aac_schedule_safw_scan_worker(dev); | |
1922 | ||
1923 | return rcode; | |
1924 | } | |
1925 | ||
75be67cd | 1926 | int aac_scan_host(struct aac_dev *dev) |
8ebaa67f RAR |
1927 | { |
1928 | int rcode = 0; | |
1929 | ||
1930 | mutex_lock(&dev->scan_mutex); | |
1931 | if (dev->sa_firmware) | |
75be67cd | 1932 | rcode = aac_scan_safw_host(dev); |
8ebaa67f RAR |
1933 | else |
1934 | scsi_scan_host(dev->scsi_host_ptr); | |
1935 | mutex_unlock(&dev->scan_mutex); | |
a1367e4a | 1936 | |
8ebaa67f | 1937 | return rcode; |
6223a39f RAR |
1938 | } |
1939 | ||
26c54d0e B |
1940 | void aac_src_reinit_aif_worker(struct work_struct *work) |
1941 | { | |
1942 | struct aac_dev *dev = container_of(to_delayed_work(work), | |
1943 | struct aac_dev, src_reinit_aif_worker); | |
1944 | ||
1945 | wait_event(dev->scsi_host_ptr->host_wait, | |
1946 | !scsi_host_in_recovery(dev->scsi_host_ptr)); | |
1947 | aac_reinit_aif(dev, dev->cardtype); | |
1948 | } | |
1949 | ||
6223a39f RAR |
1950 | /** |
1951 | * aac_handle_sa_aif Handle a message from the firmware | |
1952 | * @dev: Which adapter this fib is from | |
1953 | * @fibptr: Pointer to fibptr from adapter | |
1954 | * | |
1955 | * This routine handles a driver notify fib from the adapter and | |
1956 | * dispatches it to the appropriate routine for handling. | |
1957 | */ | |
1958 | static void aac_handle_sa_aif(struct aac_dev *dev, struct fib *fibptr) | |
1959 | { | |
f2d2caba | 1960 | int i; |
6223a39f | 1961 | u32 events = 0; |
6223a39f RAR |
1962 | |
1963 | if (fibptr->hbacmd_size & SA_AIF_HOTPLUG) | |
1964 | events = SA_AIF_HOTPLUG; | |
1965 | else if (fibptr->hbacmd_size & SA_AIF_HARDWARE) | |
1966 | events = SA_AIF_HARDWARE; | |
1967 | else if (fibptr->hbacmd_size & SA_AIF_PDEV_CHANGE) | |
1968 | events = SA_AIF_PDEV_CHANGE; | |
1969 | else if (fibptr->hbacmd_size & SA_AIF_LDEV_CHANGE) | |
1970 | events = SA_AIF_LDEV_CHANGE; | |
1971 | else if (fibptr->hbacmd_size & SA_AIF_BPSTAT_CHANGE) | |
1972 | events = SA_AIF_BPSTAT_CHANGE; | |
1973 | else if (fibptr->hbacmd_size & SA_AIF_BPCFG_CHANGE) | |
1974 | events = SA_AIF_BPCFG_CHANGE; | |
1975 | ||
1976 | switch (events) { | |
1977 | case SA_AIF_HOTPLUG: | |
1978 | case SA_AIF_HARDWARE: | |
1979 | case SA_AIF_PDEV_CHANGE: | |
1980 | case SA_AIF_LDEV_CHANGE: | |
1981 | case SA_AIF_BPCFG_CHANGE: | |
1982 | ||
75be67cd | 1983 | aac_scan_host(dev); |
8ebaa67f | 1984 | |
6223a39f RAR |
1985 | break; |
1986 | ||
1987 | case SA_AIF_BPSTAT_CHANGE: | |
1988 | /* currently do nothing */ | |
1989 | break; | |
1990 | } | |
1991 | ||
1992 | for (i = 1; i <= 10; ++i) { | |
1993 | events = src_readl(dev, MUnit.IDR); | |
1994 | if (events & (1<<23)) { | |
1995 | pr_warn(" AIF not cleared by firmware - %d/%d)\n", | |
1996 | i, 10); | |
1997 | ssleep(1); | |
1998 | } | |
1999 | } | |
2000 | } | |
2001 | ||
113156bc RAR |
2002 | static int get_fib_count(struct aac_dev *dev) |
2003 | { | |
2004 | unsigned int num = 0; | |
2005 | struct list_head *entry; | |
2006 | unsigned long flagv; | |
2007 | ||
2008 | /* | |
2009 | * Warning: no sleep allowed while | |
2010 | * holding spinlock. We take the estimate | |
2011 | * and pre-allocate a set of fibs outside the | |
2012 | * lock. | |
2013 | */ | |
2014 | num = le32_to_cpu(dev->init->r7.adapter_fibs_size) | |
2015 | / sizeof(struct hw_fib); /* some extra */ | |
2016 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
2017 | entry = dev->fib_list.next; | |
2018 | while (entry != &dev->fib_list) { | |
2019 | entry = entry->next; | |
2020 | ++num; | |
2021 | } | |
2022 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
2023 | ||
2024 | return num; | |
2025 | } | |
2026 | ||
2027 | static int fillup_pools(struct aac_dev *dev, struct hw_fib **hw_fib_pool, | |
2028 | struct fib **fib_pool, | |
2029 | unsigned int num) | |
2030 | { | |
2031 | struct hw_fib **hw_fib_p; | |
2032 | struct fib **fib_p; | |
113156bc RAR |
2033 | |
2034 | hw_fib_p = hw_fib_pool; | |
2035 | fib_p = fib_pool; | |
2036 | while (hw_fib_p < &hw_fib_pool[num]) { | |
2037 | *(hw_fib_p) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL); | |
2038 | if (!(*(hw_fib_p++))) { | |
2039 | --hw_fib_p; | |
2040 | break; | |
2041 | } | |
2042 | ||
2043 | *(fib_p) = kmalloc(sizeof(struct fib), GFP_KERNEL); | |
2044 | if (!(*(fib_p++))) { | |
2045 | kfree(*(--hw_fib_p)); | |
2046 | break; | |
2047 | } | |
2048 | } | |
2049 | ||
e498520e RAR |
2050 | /* |
2051 | * Get the actual number of allocated fibs | |
2052 | */ | |
113156bc | 2053 | num = hw_fib_p - hw_fib_pool; |
e498520e | 2054 | return num; |
113156bc RAR |
2055 | } |
2056 | ||
2057 | static void wakeup_fibctx_threads(struct aac_dev *dev, | |
2058 | struct hw_fib **hw_fib_pool, | |
2059 | struct fib **fib_pool, | |
2060 | struct fib *fib, | |
2061 | struct hw_fib *hw_fib, | |
2062 | unsigned int num) | |
2063 | { | |
2064 | unsigned long flagv; | |
2065 | struct list_head *entry; | |
2066 | struct hw_fib **hw_fib_p; | |
2067 | struct fib **fib_p; | |
2068 | u32 time_now, time_last; | |
2069 | struct hw_fib *hw_newfib; | |
2070 | struct fib *newfib; | |
2071 | struct aac_fib_context *fibctx; | |
2072 | ||
2073 | time_now = jiffies/HZ; | |
2074 | spin_lock_irqsave(&dev->fib_lock, flagv); | |
2075 | entry = dev->fib_list.next; | |
2076 | /* | |
2077 | * For each Context that is on the | |
2078 | * fibctxList, make a copy of the | |
2079 | * fib, and then set the event to wake up the | |
2080 | * thread that is waiting for it. | |
2081 | */ | |
2082 | ||
2083 | hw_fib_p = hw_fib_pool; | |
2084 | fib_p = fib_pool; | |
2085 | while (entry != &dev->fib_list) { | |
2086 | /* | |
2087 | * Extract the fibctx | |
2088 | */ | |
2089 | fibctx = list_entry(entry, struct aac_fib_context, | |
2090 | next); | |
2091 | /* | |
2092 | * Check if the queue is getting | |
2093 | * backlogged | |
2094 | */ | |
2095 | if (fibctx->count > 20) { | |
2096 | /* | |
2097 | * It's *not* jiffies folks, | |
2098 | * but jiffies / HZ so do not | |
2099 | * panic ... | |
2100 | */ | |
2101 | time_last = fibctx->jiffies; | |
2102 | /* | |
2103 | * Has it been > 2 minutes | |
2104 | * since the last read off | |
2105 | * the queue? | |
2106 | */ | |
2107 | if ((time_now - time_last) > aif_timeout) { | |
2108 | entry = entry->next; | |
2109 | aac_close_fib_context(dev, fibctx); | |
2110 | continue; | |
2111 | } | |
2112 | } | |
2113 | /* | |
2114 | * Warning: no sleep allowed while | |
2115 | * holding spinlock | |
2116 | */ | |
2117 | if (hw_fib_p >= &hw_fib_pool[num]) { | |
2118 | pr_warn("aifd: didn't allocate NewFib\n"); | |
2119 | entry = entry->next; | |
2120 | continue; | |
2121 | } | |
2122 | ||
2123 | hw_newfib = *hw_fib_p; | |
2124 | *(hw_fib_p++) = NULL; | |
2125 | newfib = *fib_p; | |
2126 | *(fib_p++) = NULL; | |
2127 | /* | |
2128 | * Make the copy of the FIB | |
2129 | */ | |
2130 | memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib)); | |
2131 | memcpy(newfib, fib, sizeof(struct fib)); | |
2132 | newfib->hw_fib_va = hw_newfib; | |
2133 | /* | |
2134 | * Put the FIB onto the | |
2135 | * fibctx's fibs | |
2136 | */ | |
2137 | list_add_tail(&newfib->fiblink, &fibctx->fib_list); | |
2138 | fibctx->count++; | |
2139 | /* | |
2140 | * Set the event to wake up the | |
2141 | * thread that is waiting. | |
2142 | */ | |
dc71eccc | 2143 | complete(&fibctx->completion); |
113156bc RAR |
2144 | |
2145 | entry = entry->next; | |
2146 | } | |
2147 | /* | |
2148 | * Set the status of this FIB | |
2149 | */ | |
2150 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); | |
2151 | aac_fib_adapter_complete(fib, sizeof(u32)); | |
2152 | spin_unlock_irqrestore(&dev->fib_lock, flagv); | |
2153 | ||
2154 | } | |
2155 | ||
2156 | static void aac_process_events(struct aac_dev *dev) | |
2157 | { | |
2158 | struct hw_fib *hw_fib; | |
2159 | struct fib *fib; | |
2160 | unsigned long flags; | |
2161 | spinlock_t *t_lock; | |
113156bc RAR |
2162 | |
2163 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2164 | spin_lock_irqsave(t_lock, flags); | |
2165 | ||
2166 | while (!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) { | |
2167 | struct list_head *entry; | |
2168 | struct aac_aifcmd *aifcmd; | |
2169 | unsigned int num; | |
2170 | struct hw_fib **hw_fib_pool, **hw_fib_p; | |
2171 | struct fib **fib_pool, **fib_p; | |
2172 | ||
2173 | set_current_state(TASK_RUNNING); | |
2174 | ||
2175 | entry = dev->queues->queue[HostNormCmdQueue].cmdq.next; | |
2176 | list_del(entry); | |
2177 | ||
2178 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2179 | spin_unlock_irqrestore(t_lock, flags); | |
2180 | ||
2181 | fib = list_entry(entry, struct fib, fiblink); | |
2182 | hw_fib = fib->hw_fib_va; | |
6223a39f RAR |
2183 | if (dev->sa_firmware) { |
2184 | /* Thor AIF */ | |
2185 | aac_handle_sa_aif(dev, fib); | |
2186 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); | |
d844752e | 2187 | goto free_fib; |
6223a39f | 2188 | } |
113156bc RAR |
2189 | /* |
2190 | * We will process the FIB here or pass it to a | |
2191 | * worker thread that is TBD. We Really can't | |
2192 | * do anything at this point since we don't have | |
2193 | * anything defined for this thread to do. | |
2194 | */ | |
2195 | memset(fib, 0, sizeof(struct fib)); | |
2196 | fib->type = FSAFS_NTC_FIB_CONTEXT; | |
2197 | fib->size = sizeof(struct fib); | |
2198 | fib->hw_fib_va = hw_fib; | |
2199 | fib->data = hw_fib->data; | |
2200 | fib->dev = dev; | |
2201 | /* | |
2202 | * We only handle AifRequest fibs from the adapter. | |
2203 | */ | |
2204 | ||
2205 | aifcmd = (struct aac_aifcmd *) hw_fib->data; | |
2206 | if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) { | |
2207 | /* Handle Driver Notify Events */ | |
2208 | aac_handle_aif(dev, fib); | |
2209 | *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK); | |
2210 | aac_fib_adapter_complete(fib, (u16)sizeof(u32)); | |
2211 | goto free_fib; | |
2212 | } | |
2213 | /* | |
2214 | * The u32 here is important and intended. We are using | |
2215 | * 32bit wrapping time to fit the adapter field | |
2216 | */ | |
2217 | ||
2218 | /* Sniff events */ | |
2219 | if (aifcmd->command == cpu_to_le32(AifCmdEventNotify) | |
2220 | || aifcmd->command == cpu_to_le32(AifCmdJobProgress)) { | |
2221 | aac_handle_aif(dev, fib); | |
2222 | } | |
2223 | ||
2224 | /* | |
2225 | * get number of fibs to process | |
2226 | */ | |
2227 | num = get_fib_count(dev); | |
2228 | if (!num) | |
2229 | goto free_fib; | |
2230 | ||
2231 | hw_fib_pool = kmalloc_array(num, sizeof(struct hw_fib *), | |
2232 | GFP_KERNEL); | |
2233 | if (!hw_fib_pool) | |
2234 | goto free_fib; | |
2235 | ||
2236 | fib_pool = kmalloc_array(num, sizeof(struct fib *), GFP_KERNEL); | |
2237 | if (!fib_pool) | |
2238 | goto free_hw_fib_pool; | |
2239 | ||
2240 | /* | |
2241 | * Fill up fib pointer pools with actual fibs | |
2242 | * and hw_fibs | |
2243 | */ | |
e498520e RAR |
2244 | num = fillup_pools(dev, hw_fib_pool, fib_pool, num); |
2245 | if (!num) | |
113156bc RAR |
2246 | goto free_mem; |
2247 | ||
2248 | /* | |
2249 | * wakeup the thread that is waiting for | |
2250 | * the response from fw (ioctl) | |
2251 | */ | |
2252 | wakeup_fibctx_threads(dev, hw_fib_pool, fib_pool, | |
2253 | fib, hw_fib, num); | |
2254 | ||
2255 | free_mem: | |
2256 | /* Free up the remaining resources */ | |
2257 | hw_fib_p = hw_fib_pool; | |
2258 | fib_p = fib_pool; | |
2259 | while (hw_fib_p < &hw_fib_pool[num]) { | |
2260 | kfree(*hw_fib_p); | |
2261 | kfree(*fib_p); | |
2262 | ++fib_p; | |
2263 | ++hw_fib_p; | |
2264 | } | |
2265 | kfree(fib_pool); | |
2266 | free_hw_fib_pool: | |
2267 | kfree(hw_fib_pool); | |
2268 | free_fib: | |
2269 | kfree(fib); | |
2270 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2271 | spin_lock_irqsave(t_lock, flags); | |
2272 | } | |
2273 | /* | |
2274 | * There are no more AIF's | |
2275 | */ | |
2276 | t_lock = dev->queues->queue[HostNormCmdQueue].lock; | |
2277 | spin_unlock_irqrestore(t_lock, flags); | |
2278 | } | |
8c867b25 | 2279 | |
3d77d840 RAR |
2280 | static int aac_send_wellness_command(struct aac_dev *dev, char *wellness_str, |
2281 | u32 datasize) | |
2282 | { | |
2283 | struct aac_srb *srbcmd; | |
2284 | struct sgmap64 *sg64; | |
2285 | dma_addr_t addr; | |
2286 | char *dma_buf; | |
2287 | struct fib *fibptr; | |
2288 | int ret = -ENOMEM; | |
2289 | u32 vbus, vid; | |
2290 | ||
2291 | fibptr = aac_fib_alloc(dev); | |
2292 | if (!fibptr) | |
2293 | goto out; | |
2294 | ||
f481973d MR |
2295 | dma_buf = dma_alloc_coherent(&dev->pdev->dev, datasize, &addr, |
2296 | GFP_KERNEL); | |
3d77d840 RAR |
2297 | if (!dma_buf) |
2298 | goto fib_free_out; | |
2299 | ||
2300 | aac_fib_init(fibptr); | |
2301 | ||
1c68856e RAR |
2302 | vbus = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_bus); |
2303 | vid = (u32)le16_to_cpu(dev->supplement_adapter_info.virt_device_target); | |
3d77d840 RAR |
2304 | |
2305 | srbcmd = (struct aac_srb *)fib_data(fibptr); | |
2306 | ||
2307 | srbcmd->function = cpu_to_le32(SRBF_ExecuteScsi); | |
2308 | srbcmd->channel = cpu_to_le32(vbus); | |
2309 | srbcmd->id = cpu_to_le32(vid); | |
2310 | srbcmd->lun = 0; | |
2311 | srbcmd->flags = cpu_to_le32(SRB_DataOut); | |
2312 | srbcmd->timeout = cpu_to_le32(10); | |
2313 | srbcmd->retry_limit = 0; | |
2314 | srbcmd->cdb_size = cpu_to_le32(12); | |
2315 | srbcmd->count = cpu_to_le32(datasize); | |
2316 | ||
2317 | memset(srbcmd->cdb, 0, sizeof(srbcmd->cdb)); | |
2318 | srbcmd->cdb[0] = BMIC_OUT; | |
2319 | srbcmd->cdb[6] = WRITE_HOST_WELLNESS; | |
2320 | memcpy(dma_buf, (char *)wellness_str, datasize); | |
2321 | ||
2322 | sg64 = (struct sgmap64 *)&srbcmd->sg; | |
2323 | sg64->count = cpu_to_le32(1); | |
2324 | sg64->sg[0].addr[1] = cpu_to_le32((u32)(((addr) >> 16) >> 16)); | |
2325 | sg64->sg[0].addr[0] = cpu_to_le32((u32)(addr & 0xffffffff)); | |
2326 | sg64->sg[0].count = cpu_to_le32(datasize); | |
2327 | ||
2328 | ret = aac_fib_send(ScsiPortCommand64, fibptr, sizeof(struct aac_srb), | |
2329 | FsaNormal, 1, 1, NULL, NULL); | |
2330 | ||
f481973d | 2331 | dma_free_coherent(&dev->pdev->dev, datasize, dma_buf, addr); |
3d77d840 RAR |
2332 | |
2333 | /* | |
2334 | * Do not set XferState to zero unless | |
2335 | * receives a response from F/W | |
2336 | */ | |
2337 | if (ret >= 0) | |
2338 | aac_fib_complete(fibptr); | |
2339 | ||
2340 | /* | |
2341 | * FIB should be freed only after | |
2342 | * getting the response from the F/W | |
2343 | */ | |
2344 | if (ret != -ERESTARTSYS) | |
2345 | goto fib_free_out; | |
2346 | ||
2347 | out: | |
2348 | return ret; | |
2349 | fib_free_out: | |
2350 | aac_fib_free(fibptr); | |
2351 | goto out; | |
2352 | } | |
2353 | ||
297083f6 | 2354 | static int aac_send_safw_hostttime(struct aac_dev *dev, struct timespec64 *now) |
3d77d840 RAR |
2355 | { |
2356 | struct tm cur_tm; | |
2357 | char wellness_str[] = "<HW>TD\010\0\0\0\0\0\0\0\0\0DW\0\0ZZ"; | |
2358 | u32 datasize = sizeof(wellness_str); | |
820f1886 | 2359 | time64_t local_time; |
3d77d840 RAR |
2360 | int ret = -ENODEV; |
2361 | ||
2362 | if (!dev->sa_firmware) | |
2363 | goto out; | |
2364 | ||
820f1886 AB |
2365 | local_time = (now->tv_sec - (sys_tz.tz_minuteswest * 60)); |
2366 | time64_to_tm(local_time, 0, &cur_tm); | |
3d77d840 RAR |
2367 | cur_tm.tm_mon += 1; |
2368 | cur_tm.tm_year += 1900; | |
2369 | wellness_str[8] = bin2bcd(cur_tm.tm_hour); | |
2370 | wellness_str[9] = bin2bcd(cur_tm.tm_min); | |
2371 | wellness_str[10] = bin2bcd(cur_tm.tm_sec); | |
2372 | wellness_str[12] = bin2bcd(cur_tm.tm_mon); | |
2373 | wellness_str[13] = bin2bcd(cur_tm.tm_mday); | |
2374 | wellness_str[14] = bin2bcd(cur_tm.tm_year / 100); | |
2375 | wellness_str[15] = bin2bcd(cur_tm.tm_year % 100); | |
2376 | ||
2377 | ret = aac_send_wellness_command(dev, wellness_str, datasize); | |
2378 | ||
2379 | out: | |
2380 | return ret; | |
2381 | } | |
2382 | ||
297083f6 | 2383 | static int aac_send_hosttime(struct aac_dev *dev, struct timespec64 *now) |
3d77d840 RAR |
2384 | { |
2385 | int ret = -ENOMEM; | |
2386 | struct fib *fibptr; | |
2387 | __le32 *info; | |
2388 | ||
2389 | fibptr = aac_fib_alloc(dev); | |
2390 | if (!fibptr) | |
2391 | goto out; | |
2392 | ||
2393 | aac_fib_init(fibptr); | |
2394 | info = (__le32 *)fib_data(fibptr); | |
820f1886 | 2395 | *info = cpu_to_le32(now->tv_sec); /* overflow in y2106 */ |
3d77d840 RAR |
2396 | ret = aac_fib_send(SendHostTime, fibptr, sizeof(*info), FsaNormal, |
2397 | 1, 1, NULL, NULL); | |
2398 | ||
2399 | /* | |
2400 | * Do not set XferState to zero unless | |
2401 | * receives a response from F/W | |
2402 | */ | |
2403 | if (ret >= 0) | |
2404 | aac_fib_complete(fibptr); | |
2405 | ||
2406 | /* | |
2407 | * FIB should be freed only after | |
2408 | * getting the response from the F/W | |
2409 | */ | |
2410 | if (ret != -ERESTARTSYS) | |
2411 | aac_fib_free(fibptr); | |
2412 | ||
2413 | out: | |
2414 | return ret; | |
2415 | } | |
2416 | ||
1da177e4 LT |
2417 | /** |
2418 | * aac_command_thread - command processing thread | |
f1134f0e | 2419 | * @data: Adapter to monitor |
1da177e4 LT |
2420 | * |
2421 | * Waits on the commandready event in it's queue. When the event gets set | |
2422 | * it will pull FIBs off it's queue. It will continue to pull FIBs off | |
2423 | * until the queue is empty. When the queue is empty it will wait for | |
2424 | * more FIBs. | |
2425 | */ | |
8ce3eca4 | 2426 | |
fe27381d | 2427 | int aac_command_thread(void *data) |
1da177e4 | 2428 | { |
fe27381d | 2429 | struct aac_dev *dev = data; |
1da177e4 | 2430 | DECLARE_WAITQUEUE(wait, current); |
29c97684 SM |
2431 | unsigned long next_jiffies = jiffies + HZ; |
2432 | unsigned long next_check_jiffies = next_jiffies; | |
2433 | long difference = HZ; | |
1da177e4 LT |
2434 | |
2435 | /* | |
2436 | * We can only have one thread per adapter for AIF's. | |
2437 | */ | |
2438 | if (dev->aif_thread) | |
2439 | return -EINVAL; | |
fe27381d | 2440 | |
1da177e4 LT |
2441 | /* |
2442 | * Let the DPC know it has a place to send the AIF's to. | |
2443 | */ | |
2444 | dev->aif_thread = 1; | |
2f130980 | 2445 | add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); |
1da177e4 | 2446 | set_current_state(TASK_INTERRUPTIBLE); |
2f130980 | 2447 | dprintk ((KERN_INFO "aac_command_thread start\n")); |
8ce3eca4 | 2448 | while (1) { |
1da177e4 | 2449 | |
113156bc | 2450 | aac_process_events(dev); |
29c97684 SM |
2451 | |
2452 | /* | |
2453 | * Background activity | |
2454 | */ | |
2455 | if ((time_before(next_check_jiffies,next_jiffies)) | |
2456 | && ((difference = next_check_jiffies - jiffies) <= 0)) { | |
2457 | next_check_jiffies = next_jiffies; | |
9473ddb2 | 2458 | if (aac_adapter_check_health(dev) == 0) { |
29c97684 SM |
2459 | difference = ((long)(unsigned)check_interval) |
2460 | * HZ; | |
2461 | next_check_jiffies = jiffies + difference; | |
2462 | } else if (!dev->queues) | |
2463 | break; | |
2464 | } | |
2465 | if (!time_before(next_check_jiffies,next_jiffies) | |
2466 | && ((difference = next_jiffies - jiffies) <= 0)) { | |
820f1886 | 2467 | struct timespec64 now; |
29c97684 SM |
2468 | int ret; |
2469 | ||
2470 | /* Don't even try to talk to adapter if its sick */ | |
9473ddb2 | 2471 | ret = aac_adapter_check_health(dev); |
849ac6a5 | 2472 | if (ret || !dev->queues) |
29c97684 SM |
2473 | break; |
2474 | next_check_jiffies = jiffies | |
2475 | + ((long)(unsigned)check_interval) | |
2476 | * HZ; | |
820f1886 | 2477 | ktime_get_real_ts64(&now); |
29c97684 SM |
2478 | |
2479 | /* Synchronize our watches */ | |
820f1886 AB |
2480 | if (((NSEC_PER_SEC - (NSEC_PER_SEC / HZ)) > now.tv_nsec) |
2481 | && (now.tv_nsec > (NSEC_PER_SEC / HZ))) | |
d1853975 AB |
2482 | difference = HZ + HZ / 2 - |
2483 | now.tv_nsec / (NSEC_PER_SEC / HZ); | |
fbdab3e7 | 2484 | else { |
820f1886 | 2485 | if (now.tv_nsec > NSEC_PER_SEC / 2) |
3d77d840 RAR |
2486 | ++now.tv_sec; |
2487 | ||
2488 | if (dev->sa_firmware) | |
2489 | ret = | |
2490 | aac_send_safw_hostttime(dev, &now); | |
2491 | else | |
2492 | ret = aac_send_hosttime(dev, &now); | |
2493 | ||
29c97684 | 2494 | difference = (long)(unsigned)update_interval*HZ; |
29c97684 SM |
2495 | } |
2496 | next_jiffies = jiffies + difference; | |
2497 | if (time_before(next_check_jiffies,next_jiffies)) | |
2498 | difference = next_check_jiffies - jiffies; | |
2499 | } | |
2500 | if (difference <= 0) | |
2501 | difference = 1; | |
2502 | set_current_state(TASK_INTERRUPTIBLE); | |
fc4bf75e RAR |
2503 | |
2504 | if (kthread_should_stop()) | |
2505 | break; | |
2506 | ||
d1853975 AB |
2507 | /* |
2508 | * we probably want usleep_range() here instead of the | |
2509 | * jiffies computation | |
2510 | */ | |
29c97684 | 2511 | schedule_timeout(difference); |
1da177e4 | 2512 | |
fe27381d | 2513 | if (kthread_should_stop()) |
1da177e4 | 2514 | break; |
1da177e4 | 2515 | } |
2f130980 MH |
2516 | if (dev->queues) |
2517 | remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait); | |
1da177e4 | 2518 | dev->aif_thread = 0; |
2f130980 | 2519 | return 0; |
1da177e4 | 2520 | } |
8b1462e0 MR |
2521 | |
2522 | int aac_acquire_irq(struct aac_dev *dev) | |
2523 | { | |
2524 | int i; | |
2525 | int j; | |
2526 | int ret = 0; | |
8b1462e0 | 2527 | |
8b1462e0 MR |
2528 | if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) { |
2529 | for (i = 0; i < dev->max_msix; i++) { | |
2530 | dev->aac_msix[i].vector_no = i; | |
2531 | dev->aac_msix[i].dev = dev; | |
0910d8bb | 2532 | if (request_irq(pci_irq_vector(dev->pdev, i), |
8b1462e0 MR |
2533 | dev->a_ops.adapter_intr, |
2534 | 0, "aacraid", &(dev->aac_msix[i]))) { | |
2535 | printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n", | |
2536 | dev->name, dev->id, i); | |
2537 | for (j = 0 ; j < i ; j++) | |
0910d8bb | 2538 | free_irq(pci_irq_vector(dev->pdev, j), |
8b1462e0 MR |
2539 | &(dev->aac_msix[j])); |
2540 | pci_disable_msix(dev->pdev); | |
2541 | ret = -1; | |
2542 | } | |
8b1462e0 MR |
2543 | } |
2544 | } else { | |
2545 | dev->aac_msix[0].vector_no = 0; | |
2546 | dev->aac_msix[0].dev = dev; | |
2547 | ||
2548 | if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, | |
2549 | IRQF_SHARED, "aacraid", | |
2550 | &(dev->aac_msix[0])) < 0) { | |
2551 | if (dev->msi) | |
2552 | pci_disable_msi(dev->pdev); | |
2553 | printk(KERN_ERR "%s%d: Interrupt unavailable.\n", | |
2554 | dev->name, dev->id); | |
2555 | ret = -1; | |
2556 | } | |
2557 | } | |
2558 | return ret; | |
2559 | } | |
2560 | ||
2561 | void aac_free_irq(struct aac_dev *dev) | |
2562 | { | |
2563 | int i; | |
8b1462e0 | 2564 | |
395e5df7 | 2565 | if (aac_is_src(dev)) { |
8b1462e0 | 2566 | if (dev->max_msix > 1) { |
0910d8bb HR |
2567 | for (i = 0; i < dev->max_msix; i++) |
2568 | free_irq(pci_irq_vector(dev->pdev, i), | |
2569 | &(dev->aac_msix[i])); | |
8b1462e0 MR |
2570 | } else { |
2571 | free_irq(dev->pdev->irq, &(dev->aac_msix[0])); | |
2572 | } | |
2573 | } else { | |
2574 | free_irq(dev->pdev->irq, dev); | |
2575 | } | |
2576 | if (dev->msi) | |
2577 | pci_disable_msi(dev->pdev); | |
2578 | else if (dev->max_msix > 1) | |
2579 | pci_disable_msix(dev->pdev); | |
2580 | } |