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CommitLineData
1da177e4
LT
1/*
2 * Adaptec AAC series RAID controller driver
fa195afe 3 * (c) Copyright 2001 Red Hat Inc.
1da177e4
LT
4 *
5 * based on the old aacraid driver that is..
6 * Adaptec aacraid device driver for Linux.
7 *
e8b12f0f
MR
8 * Copyright (c) 2000-2010 Adaptec, Inc.
9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
1da177e4
LT
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24 *
25 * Module Name:
26 * commsup.c
27 *
28 * Abstract: Contain all routines that are required for FSA host/adapter
7c00ffa3 29 * communication.
1da177e4
LT
30 *
31 */
32
33#include <linux/kernel.h>
34#include <linux/init.h>
35#include <linux/types.h>
36#include <linux/sched.h>
37#include <linux/pci.h>
38#include <linux/spinlock.h>
39#include <linux/slab.h>
40#include <linux/completion.h>
41#include <linux/blkdev.h>
164006da 42#include <linux/delay.h>
fe27381d 43#include <linux/kthread.h>
6a3670c4 44#include <linux/interrupt.h>
6188e10d 45#include <linux/semaphore.h>
8c867b25 46#include <scsi/scsi.h>
7c00ffa3 47#include <scsi/scsi_host.h>
131256cf 48#include <scsi/scsi_device.h>
8c867b25 49#include <scsi/scsi_cmnd.h>
1da177e4
LT
50
51#include "aacraid.h"
52
53/**
54 * fib_map_alloc - allocate the fib objects
55 * @dev: Adapter to allocate for
56 *
57 * Allocate and map the shared PCI space for the FIB blocks used to
58 * talk to the Adaptec firmware.
59 */
8ce3eca4 60
1da177e4
LT
61static int fib_map_alloc(struct aac_dev *dev)
62{
7c00ffa3
MH
63 dprintk((KERN_INFO
64 "allocate hardware fibs pci_alloc_consistent(%p, %d * (%d + %d), %p)\n",
65 dev->pdev, dev->max_fib_size, dev->scsi_host_ptr->can_queue,
66 AAC_NUM_MGT_FIB, &dev->hw_fib_pa));
e8b12f0f
MR
67 dev->hw_fib_va = pci_alloc_consistent(dev->pdev,
68 (dev->max_fib_size + sizeof(struct aac_fib_xporthdr))
69 * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) + (ALIGN32 - 1),
70 &dev->hw_fib_pa);
71 if (dev->hw_fib_va == NULL)
1da177e4
LT
72 return -ENOMEM;
73 return 0;
74}
75
76/**
bfb35aa8 77 * aac_fib_map_free - free the fib objects
1da177e4
LT
78 * @dev: Adapter to free
79 *
80 * Free the PCI mappings and the memory allocated for FIB blocks
81 * on this adapter.
82 */
83
bfb35aa8 84void aac_fib_map_free(struct aac_dev *dev)
1da177e4 85{
9ad5204d
SM
86 pci_free_consistent(dev->pdev,
87 dev->max_fib_size * (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB),
88 dev->hw_fib_va, dev->hw_fib_pa);
89 dev->hw_fib_va = NULL;
90 dev->hw_fib_pa = 0;
1da177e4
LT
91}
92
93/**
bfb35aa8 94 * aac_fib_setup - setup the fibs
1da177e4
LT
95 * @dev: Adapter to set up
96 *
b595076a 97 * Allocate the PCI space for the fibs, map it and then initialise the
1da177e4
LT
98 * fib area, the unmapped fib data and also the free list
99 */
100
bfb35aa8 101int aac_fib_setup(struct aac_dev * dev)
1da177e4
LT
102{
103 struct fib *fibptr;
a8166a52 104 struct hw_fib *hw_fib;
1da177e4
LT
105 dma_addr_t hw_fib_pa;
106 int i;
7c00ffa3
MH
107
108 while (((i = fib_map_alloc(dev)) == -ENOMEM)
109 && (dev->scsi_host_ptr->can_queue > (64 - AAC_NUM_MGT_FIB))) {
110 dev->init->MaxIoCommands = cpu_to_le32((dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) >> 1);
111 dev->scsi_host_ptr->can_queue = le32_to_cpu(dev->init->MaxIoCommands) - AAC_NUM_MGT_FIB;
112 }
113 if (i<0)
1da177e4 114 return -ENOMEM;
8ce3eca4 115
e8b12f0f
MR
116 /* 32 byte alignment for PMC */
117 hw_fib_pa = (dev->hw_fib_pa + (ALIGN32 - 1)) & ~(ALIGN32 - 1);
118 dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
119 (hw_fib_pa - dev->hw_fib_pa));
120 dev->hw_fib_pa = hw_fib_pa;
121 memset(dev->hw_fib_va, 0,
122 (dev->max_fib_size + sizeof(struct aac_fib_xporthdr)) *
123 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB));
124
125 /* add Xport header */
126 dev->hw_fib_va = (struct hw_fib *)((unsigned char *)dev->hw_fib_va +
127 sizeof(struct aac_fib_xporthdr));
128 dev->hw_fib_pa += sizeof(struct aac_fib_xporthdr);
129
a8166a52 130 hw_fib = dev->hw_fib_va;
1da177e4 131 hw_fib_pa = dev->hw_fib_pa;
1da177e4
LT
132 /*
133 * Initialise the fibs
134 */
8ce3eca4
SM
135 for (i = 0, fibptr = &dev->fibs[i];
136 i < (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
137 i++, fibptr++)
1da177e4
LT
138 {
139 fibptr->dev = dev;
a8166a52
MH
140 fibptr->hw_fib_va = hw_fib;
141 fibptr->data = (void *) fibptr->hw_fib_va->data;
1da177e4 142 fibptr->next = fibptr+1; /* Forward chain the fibs */
6de76cfc 143 sema_init(&fibptr->event_wait, 0);
1da177e4 144 spin_lock_init(&fibptr->event_lock);
a8166a52
MH
145 hw_fib->header.XferState = cpu_to_le32(0xffffffff);
146 hw_fib->header.SenderSize = cpu_to_le16(dev->max_fib_size);
1da177e4 147 fibptr->hw_fib_pa = hw_fib_pa;
e8b12f0f
MR
148 hw_fib = (struct hw_fib *)((unsigned char *)hw_fib +
149 dev->max_fib_size + sizeof(struct aac_fib_xporthdr));
150 hw_fib_pa = hw_fib_pa +
151 dev->max_fib_size + sizeof(struct aac_fib_xporthdr);
1da177e4
LT
152 }
153 /*
154 * Add the fib chain to the free list
155 */
7c00ffa3 156 dev->fibs[dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB - 1].next = NULL;
1da177e4
LT
157 /*
158 * Enable this to debug out of queue space
159 */
160 dev->free_fib = &dev->fibs[0];
161 return 0;
162}
163
164/**
bfb35aa8 165 * aac_fib_alloc - allocate a fib
1da177e4
LT
166 * @dev: Adapter to allocate the fib for
167 *
168 * Allocate a fib from the adapter fib pool. If the pool is empty we
7c00ffa3 169 * return NULL.
1da177e4 170 */
8ce3eca4 171
bfb35aa8 172struct fib *aac_fib_alloc(struct aac_dev *dev)
1da177e4
LT
173{
174 struct fib * fibptr;
175 unsigned long flags;
176 spin_lock_irqsave(&dev->fib_lock, flags);
8ce3eca4 177 fibptr = dev->free_fib;
7c00ffa3
MH
178 if(!fibptr){
179 spin_unlock_irqrestore(&dev->fib_lock, flags);
180 return fibptr;
181 }
1da177e4
LT
182 dev->free_fib = fibptr->next;
183 spin_unlock_irqrestore(&dev->fib_lock, flags);
184 /*
185 * Set the proper node type code and node byte size
186 */
187 fibptr->type = FSAFS_NTC_FIB_CONTEXT;
188 fibptr->size = sizeof(struct fib);
189 /*
190 * Null out fields that depend on being zero at the start of
191 * each I/O
192 */
a8166a52 193 fibptr->hw_fib_va->header.XferState = 0;
b6ef70f3 194 fibptr->flags = 0;
1da177e4
LT
195 fibptr->callback = NULL;
196 fibptr->callback_data = NULL;
197
198 return fibptr;
199}
200
201/**
bfb35aa8 202 * aac_fib_free - free a fib
1da177e4
LT
203 * @fibptr: fib to free up
204 *
205 * Frees up a fib and places it on the appropriate queue
1da177e4 206 */
8ce3eca4 207
bfb35aa8 208void aac_fib_free(struct fib *fibptr)
1da177e4 209{
cacb6dc3
PNRCEH
210 unsigned long flags, flagsv;
211
212 spin_lock_irqsave(&fibptr->event_lock, flagsv);
213 if (fibptr->done == 2) {
214 spin_unlock_irqrestore(&fibptr->event_lock, flagsv);
215 return;
216 }
217 spin_unlock_irqrestore(&fibptr->event_lock, flagsv);
1da177e4
LT
218
219 spin_lock_irqsave(&fibptr->dev->fib_lock, flags);
03d44337 220 if (unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 221 aac_config.fib_timeouts++;
03d44337
MH
222 if (fibptr->hw_fib_va->header.XferState != 0) {
223 printk(KERN_WARNING "aac_fib_free, XferState != 0, fibptr = 0x%p, XferState = 0x%x\n",
224 (void*)fibptr,
225 le32_to_cpu(fibptr->hw_fib_va->header.XferState));
226 }
227 fibptr->next = fibptr->dev->free_fib;
228 fibptr->dev->free_fib = fibptr;
1da177e4
LT
229 spin_unlock_irqrestore(&fibptr->dev->fib_lock, flags);
230}
231
232/**
bfb35aa8 233 * aac_fib_init - initialise a fib
1da177e4 234 * @fibptr: The fib to initialize
8ce3eca4 235 *
1da177e4
LT
236 * Set up the generic fib fields ready for use
237 */
8ce3eca4 238
bfb35aa8 239void aac_fib_init(struct fib *fibptr)
1da177e4 240{
a8166a52 241 struct hw_fib *hw_fib = fibptr->hw_fib_va;
1da177e4
LT
242
243 hw_fib->header.StructType = FIB_MAGIC;
7c00ffa3
MH
244 hw_fib->header.Size = cpu_to_le16(fibptr->dev->max_fib_size);
245 hw_fib->header.XferState = cpu_to_le32(HostOwned | FibInitialized | FibEmpty | FastResponseCapable);
8e0c5ebd 246 hw_fib->header.SenderFibAddress = 0; /* Filled in later if needed */
1da177e4 247 hw_fib->header.ReceiverFibAddress = cpu_to_le32(fibptr->hw_fib_pa);
7c00ffa3 248 hw_fib->header.SenderSize = cpu_to_le16(fibptr->dev->max_fib_size);
1da177e4
LT
249}
250
251/**
252 * fib_deallocate - deallocate a fib
253 * @fibptr: fib to deallocate
254 *
255 * Will deallocate and return to the free pool the FIB pointed to by the
256 * caller.
257 */
8ce3eca4 258
4833869e 259static void fib_dealloc(struct fib * fibptr)
1da177e4 260{
a8166a52 261 struct hw_fib *hw_fib = fibptr->hw_fib_va;
125e1874 262 BUG_ON(hw_fib->header.StructType != FIB_MAGIC);
8ce3eca4 263 hw_fib->header.XferState = 0;
1da177e4
LT
264}
265
266/*
267 * Commuication primitives define and support the queuing method we use to
268 * support host to adapter commuication. All queue accesses happen through
269 * these routines and are the only routines which have a knowledge of the
270 * how these queues are implemented.
271 */
8ce3eca4 272
1da177e4
LT
273/**
274 * aac_get_entry - get a queue entry
275 * @dev: Adapter
276 * @qid: Queue Number
277 * @entry: Entry return
278 * @index: Index return
279 * @nonotify: notification control
280 *
281 * With a priority the routine returns a queue entry if the queue has free entries. If the queue
282 * is full(no free entries) than no entry is returned and the function returns 0 otherwise 1 is
283 * returned.
284 */
8ce3eca4 285
1da177e4
LT
286static int aac_get_entry (struct aac_dev * dev, u32 qid, struct aac_entry **entry, u32 * index, unsigned long *nonotify)
287{
288 struct aac_queue * q;
bed30de4 289 unsigned long idx;
1da177e4
LT
290
291 /*
292 * All of the queues wrap when they reach the end, so we check
293 * to see if they have reached the end and if they have we just
294 * set the index back to zero. This is a wrap. You could or off
295 * the high bits in all updates but this is a bit faster I think.
296 */
297
298 q = &dev->queues->queue[qid];
bed30de4
MH
299
300 idx = *index = le32_to_cpu(*(q->headers.producer));
301 /* Interrupt Moderation, only interrupt for first two entries */
302 if (idx != le32_to_cpu(*(q->headers.consumer))) {
303 if (--idx == 0) {
1640a2c3 304 if (qid == AdapNormCmdQueue)
bed30de4 305 idx = ADAP_NORM_CMD_ENTRIES;
1640a2c3 306 else
bed30de4
MH
307 idx = ADAP_NORM_RESP_ENTRIES;
308 }
309 if (idx != le32_to_cpu(*(q->headers.consumer)))
8ce3eca4 310 *nonotify = 1;
bed30de4 311 }
1da177e4 312
1640a2c3 313 if (qid == AdapNormCmdQueue) {
8ce3eca4 314 if (*index >= ADAP_NORM_CMD_ENTRIES)
1da177e4 315 *index = 0; /* Wrap to front of the Producer Queue. */
1640a2c3 316 } else {
8ce3eca4 317 if (*index >= ADAP_NORM_RESP_ENTRIES)
1da177e4
LT
318 *index = 0; /* Wrap to front of the Producer Queue. */
319 }
1da177e4 320
8ce3eca4
SM
321 /* Queue is full */
322 if ((*index + 1) == le32_to_cpu(*(q->headers.consumer))) {
7c00ffa3 323 printk(KERN_WARNING "Queue %d full, %u outstanding.\n",
1da177e4
LT
324 qid, q->numpending);
325 return 0;
326 } else {
8ce3eca4 327 *entry = q->base + *index;
1da177e4
LT
328 return 1;
329 }
8ce3eca4 330}
1da177e4
LT
331
332/**
333 * aac_queue_get - get the next free QE
334 * @dev: Adapter
335 * @index: Returned index
336 * @priority: Priority of fib
337 * @fib: Fib to associate with the queue entry
338 * @wait: Wait if queue full
339 * @fibptr: Driver fib object to go with fib
340 * @nonotify: Don't notify the adapter
341 *
342 * Gets the next free QE off the requested priorty adapter command
343 * queue and associates the Fib with the QE. The QE represented by
344 * index is ready to insert on the queue when this routine returns
345 * success.
346 */
347
28713324 348int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify)
1da177e4
LT
349{
350 struct aac_entry * entry = NULL;
351 int map = 0;
8ce3eca4 352
1640a2c3 353 if (qid == AdapNormCmdQueue) {
1da177e4 354 /* if no entries wait for some if caller wants to */
8ce3eca4 355 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
356 printk(KERN_ERR "GetEntries failed\n");
357 }
8ce3eca4
SM
358 /*
359 * Setup queue entry with a command, status and fib mapped
360 */
361 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
362 map = 1;
1640a2c3 363 } else {
8ce3eca4 364 while (!aac_get_entry(dev, qid, &entry, index, nonotify)) {
1da177e4
LT
365 /* if no entries wait for some if caller wants to */
366 }
8ce3eca4
SM
367 /*
368 * Setup queue entry with command, status and fib mapped
369 */
370 entry->size = cpu_to_le32(le16_to_cpu(hw_fib->header.Size));
371 entry->addr = hw_fib->header.SenderFibAddress;
372 /* Restore adapters pointer to the FIB */
1da177e4 373 hw_fib->header.ReceiverFibAddress = hw_fib->header.SenderFibAddress; /* Let the adapter now where to find its data */
8ce3eca4 374 map = 0;
1da177e4
LT
375 }
376 /*
377 * If MapFib is true than we need to map the Fib and put pointers
378 * in the queue entry.
379 */
380 if (map)
381 entry->addr = cpu_to_le32(fibptr->hw_fib_pa);
382 return 0;
383}
384
1da177e4 385/*
8ce3eca4
SM
386 * Define the highest level of host to adapter communication routines.
387 * These routines will support host to adapter FS commuication. These
1da177e4
LT
388 * routines have no knowledge of the commuication method used. This level
389 * sends and receives FIBs. This level has no knowledge of how these FIBs
390 * get passed back and forth.
391 */
392
393/**
bfb35aa8 394 * aac_fib_send - send a fib to the adapter
1da177e4
LT
395 * @command: Command to send
396 * @fibptr: The fib
397 * @size: Size of fib data area
398 * @priority: Priority of Fib
399 * @wait: Async/sync select
400 * @reply: True if a reply is wanted
401 * @callback: Called with reply
402 * @callback_data: Passed to callback
403 *
404 * Sends the requested FIB to the adapter and optionally will wait for a
405 * response FIB. If the caller does not wish to wait for a response than
406 * an event to wait on must be supplied. This event will be set when a
407 * response FIB is received from the adapter.
408 */
8ce3eca4 409
bfb35aa8
MH
410int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
411 int priority, int wait, int reply, fib_callback callback,
412 void *callback_data)
1da177e4 413{
1da177e4 414 struct aac_dev * dev = fibptr->dev;
a8166a52 415 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 416 unsigned long flags = 0;
1640a2c3 417 unsigned long qflags;
cacb6dc3 418 unsigned long mflags = 0;
11604612 419 unsigned long sflags = 0;
cacb6dc3 420
1640a2c3 421
1da177e4
LT
422 if (!(hw_fib->header.XferState & cpu_to_le32(HostOwned)))
423 return -EBUSY;
424 /*
25985edc 425 * There are 5 cases with the wait and response requested flags.
1da177e4
LT
426 * The only invalid cases are if the caller requests to wait and
427 * does not request a response and if the caller does not want a
428 * response and the Fib is not allocated from pool. If a response
429 * is not requesed the Fib will just be deallocaed by the DPC
430 * routine when the response comes back from the adapter. No
8ce3eca4 431 * further processing will be done besides deleting the Fib. We
1da177e4
LT
432 * will have a debug mode where the adapter can notify the host
433 * it had a problem and the host can log that fact.
434 */
b6ef70f3 435 fibptr->flags = 0;
1da177e4
LT
436 if (wait && !reply) {
437 return -EINVAL;
438 } else if (!wait && reply) {
439 hw_fib->header.XferState |= cpu_to_le32(Async | ResponseExpected);
440 FIB_COUNTER_INCREMENT(aac_config.AsyncSent);
441 } else if (!wait && !reply) {
442 hw_fib->header.XferState |= cpu_to_le32(NoResponseExpected);
443 FIB_COUNTER_INCREMENT(aac_config.NoResponseSent);
444 } else if (wait && reply) {
445 hw_fib->header.XferState |= cpu_to_le32(ResponseExpected);
446 FIB_COUNTER_INCREMENT(aac_config.NormalSent);
8ce3eca4 447 }
1da177e4
LT
448 /*
449 * Map the fib into 32bits by using the fib number
450 */
451
8e0c5ebd 452 hw_fib->header.SenderFibAddress = cpu_to_le32(((u32)(fibptr - dev->fibs)) << 2);
1da177e4
LT
453 hw_fib->header.SenderData = (u32)(fibptr - dev->fibs);
454 /*
455 * Set FIB state to indicate where it came from and if we want a
456 * response from the adapter. Also load the command from the
457 * caller.
458 *
459 * Map the hw fib pointer as a 32bit value
460 */
461 hw_fib->header.Command = cpu_to_le16(command);
462 hw_fib->header.XferState |= cpu_to_le32(SentFromHost);
a8166a52 463 fibptr->hw_fib_va->header.Flags = 0; /* 0 the flags field - internal only*/
1da177e4
LT
464 /*
465 * Set the size of the Fib we want to send to the adapter
466 */
467 hw_fib->header.Size = cpu_to_le16(sizeof(struct aac_fibhdr) + size);
468 if (le16_to_cpu(hw_fib->header.Size) > le16_to_cpu(hw_fib->header.SenderSize)) {
469 return -EMSGSIZE;
8ce3eca4 470 }
1da177e4
LT
471 /*
472 * Get a queue entry connect the FIB to it and send an notify
473 * the adapter a command is ready.
474 */
1640a2c3 475 hw_fib->header.XferState |= cpu_to_le32(NormalPriority);
1da177e4 476
1da177e4
LT
477 /*
478 * Fill in the Callback and CallbackContext if we are not
479 * going to wait.
480 */
481 if (!wait) {
482 fibptr->callback = callback;
483 fibptr->callback_data = callback_data;
b6ef70f3 484 fibptr->flags = FIB_CONTEXT_FLAG;
1da177e4 485 }
1da177e4
LT
486
487 fibptr->done = 0;
1da177e4 488
1640a2c3
MH
489 FIB_COUNTER_INCREMENT(aac_config.FibsSent);
490
1640a2c3 491 dprintk((KERN_DEBUG "Fib contents:.\n"));
8e0c5ebd
MH
492 dprintk((KERN_DEBUG " Command = %d.\n", le32_to_cpu(hw_fib->header.Command)));
493 dprintk((KERN_DEBUG " SubCommand = %d.\n", le32_to_cpu(((struct aac_query_mount *)fib_data(fibptr))->command)));
494 dprintk((KERN_DEBUG " XferState = %x.\n", le32_to_cpu(hw_fib->header.XferState)));
a8166a52 495 dprintk((KERN_DEBUG " hw_fib va being sent=%p\n",fibptr->hw_fib_va));
1640a2c3
MH
496 dprintk((KERN_DEBUG " hw_fib pa being sent=%lx\n",(ulong)fibptr->hw_fib_pa));
497 dprintk((KERN_DEBUG " fib being sent=%p\n",fibptr));
498
c8f7b073 499 if (!dev->queues)
65101355 500 return -EBUSY;
1640a2c3 501
cacb6dc3
PNRCEH
502 if (wait) {
503
504 spin_lock_irqsave(&dev->manage_lock, mflags);
505 if (dev->management_fib_count >= AAC_NUM_MGT_FIB) {
506 printk(KERN_INFO "No management Fibs Available:%d\n",
507 dev->management_fib_count);
508 spin_unlock_irqrestore(&dev->manage_lock, mflags);
509 return -EBUSY;
510 }
511 dev->management_fib_count++;
512 spin_unlock_irqrestore(&dev->manage_lock, mflags);
1640a2c3 513 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3
PNRCEH
514 }
515
11604612
MR
516 if (dev->sync_mode) {
517 if (wait)
518 spin_unlock_irqrestore(&fibptr->event_lock, flags);
519 spin_lock_irqsave(&dev->sync_lock, sflags);
520 if (dev->sync_fib) {
521 list_add_tail(&fibptr->fiblink, &dev->sync_fib_list);
522 spin_unlock_irqrestore(&dev->sync_lock, sflags);
523 } else {
524 dev->sync_fib = fibptr;
525 spin_unlock_irqrestore(&dev->sync_lock, sflags);
526 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
527 (u32)fibptr->hw_fib_pa, 0, 0, 0, 0, 0,
528 NULL, NULL, NULL, NULL, NULL);
529 }
530 if (wait) {
531 fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
532 if (down_interruptible(&fibptr->event_wait)) {
533 fibptr->flags &= ~FIB_CONTEXT_FLAG_WAIT;
534 return -EFAULT;
535 }
536 return 0;
537 }
538 return -EINPROGRESS;
539 }
540
cacb6dc3
PNRCEH
541 if (aac_adapter_deliver(fibptr) != 0) {
542 printk(KERN_ERR "aac_fib_send: returned -EBUSY\n");
543 if (wait) {
544 spin_unlock_irqrestore(&fibptr->event_lock, flags);
545 spin_lock_irqsave(&dev->manage_lock, mflags);
546 dev->management_fib_count--;
547 spin_unlock_irqrestore(&dev->manage_lock, mflags);
548 }
549 return -EBUSY;
550 }
551
8e0c5ebd 552
1da177e4 553 /*
8ce3eca4 554 * If the caller wanted us to wait for response wait now.
1da177e4 555 */
8ce3eca4 556
1da177e4
LT
557 if (wait) {
558 spin_unlock_irqrestore(&fibptr->event_lock, flags);
9203344c
MH
559 /* Only set for first known interruptable command */
560 if (wait < 0) {
561 /*
562 * *VERY* Dangerous to time out a command, the
563 * assumption is made that we have no hope of
564 * functioning because an interrupt routing or other
565 * hardware failure has occurred.
566 */
30002f1c 567 unsigned long timeout = jiffies + (180 * HZ); /* 3 minutes */
9203344c 568 while (down_trylock(&fibptr->event_wait)) {
33524b70 569 int blink;
30002f1c 570 if (time_is_before_eq_jiffies(timeout)) {
28713324 571 struct aac_queue * q = &dev->queues->queue[AdapNormCmdQueue];
9203344c
MH
572 spin_lock_irqsave(q->lock, qflags);
573 q->numpending--;
9203344c
MH
574 spin_unlock_irqrestore(q->lock, qflags);
575 if (wait == -1) {
bfb35aa8 576 printk(KERN_ERR "aacraid: aac_fib_send: first asynchronous command timed out.\n"
9203344c
MH
577 "Usually a result of a PCI interrupt routing problem;\n"
578 "update mother board BIOS or consider utilizing one of\n"
579 "the SAFE mode kernel options (acpi, apic etc)\n");
580 }
581 return -ETIMEDOUT;
582 }
33524b70
MH
583 if ((blink = aac_adapter_check_health(dev)) > 0) {
584 if (wait == -1) {
585 printk(KERN_ERR "aacraid: aac_fib_send: adapter blinkLED 0x%x.\n"
586 "Usually a result of a serious unrecoverable hardware problem\n",
587 blink);
588 }
589 return -EFAULT;
590 }
30002f1c
BC
591 /* We used to udelay() here but that absorbed
592 * a CPU when a timeout occured. Not very
593 * useful. */
594 cpu_relax();
9203344c 595 }
0462590e 596 } else if (down_interruptible(&fibptr->event_wait)) {
cacb6dc3
PNRCEH
597 /* Do nothing ... satisfy
598 * down_interruptible must_check */
e6990c64 599 }
cacb6dc3 600
33bb3b29 601 spin_lock_irqsave(&fibptr->event_lock, flags);
cacb6dc3 602 if (fibptr->done == 0) {
33bb3b29 603 fibptr->done = 2; /* Tell interrupt we aborted */
c8f7b073 604 spin_unlock_irqrestore(&fibptr->event_lock, flags);
cacb6dc3 605 return -ERESTARTSYS;
c8f7b073 606 }
33bb3b29 607 spin_unlock_irqrestore(&fibptr->event_lock, flags);
125e1874 608 BUG_ON(fibptr->done == 0);
8ce3eca4 609
912d4e88 610 if(unlikely(fibptr->flags & FIB_CONTEXT_FLAG_TIMED_OUT))
1da177e4 611 return -ETIMEDOUT;
912d4e88 612 return 0;
1da177e4
LT
613 }
614 /*
615 * If the user does not want a response than return success otherwise
616 * return pending
617 */
618 if (reply)
619 return -EINPROGRESS;
620 else
621 return 0;
622}
623
8ce3eca4 624/**
1da177e4
LT
625 * aac_consumer_get - get the top of the queue
626 * @dev: Adapter
627 * @q: Queue
628 * @entry: Return entry
629 *
630 * Will return a pointer to the entry on the top of the queue requested that
8ce3eca4
SM
631 * we are a consumer of, and return the address of the queue entry. It does
632 * not change the state of the queue.
1da177e4
LT
633 */
634
635int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry)
636{
637 u32 index;
638 int status;
639 if (le32_to_cpu(*q->headers.producer) == le32_to_cpu(*q->headers.consumer)) {
640 status = 0;
641 } else {
642 /*
643 * The consumer index must be wrapped if we have reached
644 * the end of the queue, else we just use the entry
645 * pointed to by the header index
646 */
8ce3eca4
SM
647 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
648 index = 0;
1da177e4 649 else
8ce3eca4 650 index = le32_to_cpu(*q->headers.consumer);
1da177e4
LT
651 *entry = q->base + index;
652 status = 1;
653 }
654 return(status);
655}
656
657/**
658 * aac_consumer_free - free consumer entry
659 * @dev: Adapter
660 * @q: Queue
661 * @qid: Queue ident
662 *
663 * Frees up the current top of the queue we are a consumer of. If the
664 * queue was full notify the producer that the queue is no longer full.
665 */
666
667void aac_consumer_free(struct aac_dev * dev, struct aac_queue *q, u32 qid)
668{
669 int wasfull = 0;
670 u32 notify;
671
672 if ((le32_to_cpu(*q->headers.producer)+1) == le32_to_cpu(*q->headers.consumer))
673 wasfull = 1;
8ce3eca4 674
1da177e4
LT
675 if (le32_to_cpu(*q->headers.consumer) >= q->entries)
676 *q->headers.consumer = cpu_to_le32(1);
677 else
36b8dd1b 678 le32_add_cpu(q->headers.consumer, 1);
8ce3eca4 679
1da177e4
LT
680 if (wasfull) {
681 switch (qid) {
682
683 case HostNormCmdQueue:
684 notify = HostNormCmdNotFull;
685 break;
1da177e4
LT
686 case HostNormRespQueue:
687 notify = HostNormRespNotFull;
688 break;
1da177e4
LT
689 default:
690 BUG();
691 return;
692 }
693 aac_adapter_notify(dev, notify);
694 }
8ce3eca4 695}
1da177e4
LT
696
697/**
bfb35aa8 698 * aac_fib_adapter_complete - complete adapter issued fib
1da177e4
LT
699 * @fibptr: fib to complete
700 * @size: size of fib
701 *
702 * Will do all necessary work to complete a FIB that was sent from
703 * the adapter.
704 */
705
bfb35aa8 706int aac_fib_adapter_complete(struct fib *fibptr, unsigned short size)
1da177e4 707{
a8166a52 708 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4 709 struct aac_dev * dev = fibptr->dev;
1640a2c3 710 struct aac_queue * q;
1da177e4 711 unsigned long nointr = 0;
1640a2c3
MH
712 unsigned long qflags;
713
e8b12f0f
MR
714 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) {
715 kfree(hw_fib);
716 return 0;
717 }
718
1640a2c3 719 if (hw_fib->header.XferState == 0) {
28713324 720 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 721 kfree(hw_fib);
8ce3eca4 722 return 0;
1640a2c3 723 }
1da177e4
LT
724 /*
725 * If we plan to do anything check the structure type first.
8ce3eca4
SM
726 */
727 if (hw_fib->header.StructType != FIB_MAGIC) {
28713324 728 if (dev->comm_interface == AAC_COMM_MESSAGE)
e8b12f0f 729 kfree(hw_fib);
8ce3eca4 730 return -EINVAL;
1da177e4
LT
731 }
732 /*
733 * This block handles the case where the adapter had sent us a
734 * command and we have finished processing the command. We
8ce3eca4
SM
735 * call completeFib when we are done processing the command
736 * and want to send a response back to the adapter. This will
1da177e4
LT
737 * send the completed cdb to the adapter.
738 */
739 if (hw_fib->header.XferState & cpu_to_le32(SentFromAdapter)) {
28713324 740 if (dev->comm_interface == AAC_COMM_MESSAGE) {
8e0c5ebd
MH
741 kfree (hw_fib);
742 } else {
8ce3eca4
SM
743 u32 index;
744 hw_fib->header.XferState |= cpu_to_le32(HostProcessed);
8e0c5ebd
MH
745 if (size) {
746 size += sizeof(struct aac_fibhdr);
8ce3eca4 747 if (size > le16_to_cpu(hw_fib->header.SenderSize))
8e0c5ebd
MH
748 return -EMSGSIZE;
749 hw_fib->header.Size = cpu_to_le16(size);
750 }
751 q = &dev->queues->queue[AdapNormRespQueue];
752 spin_lock_irqsave(q->lock, qflags);
753 aac_queue_get(dev, &index, AdapNormRespQueue, hw_fib, 1, NULL, &nointr);
754 *(q->headers.producer) = cpu_to_le32(index + 1);
755 spin_unlock_irqrestore(q->lock, qflags);
756 if (!(nointr & (int)aac_config.irq_mod))
757 aac_adapter_notify(dev, AdapNormRespQueue);
1da177e4 758 }
8ce3eca4
SM
759 } else {
760 printk(KERN_WARNING "aac_fib_adapter_complete: "
761 "Unknown xferstate detected.\n");
762 BUG();
1da177e4 763 }
1da177e4
LT
764 return 0;
765}
766
767/**
bfb35aa8 768 * aac_fib_complete - fib completion handler
1da177e4
LT
769 * @fib: FIB to complete
770 *
771 * Will do all necessary work to complete a FIB.
772 */
8ce3eca4 773
bfb35aa8 774int aac_fib_complete(struct fib *fibptr)
1da177e4 775{
cacb6dc3 776 unsigned long flags;
a8166a52 777 struct hw_fib * hw_fib = fibptr->hw_fib_va;
1da177e4
LT
778
779 /*
780 * Check for a fib which has already been completed
781 */
782
783 if (hw_fib->header.XferState == 0)
8ce3eca4 784 return 0;
1da177e4
LT
785 /*
786 * If we plan to do anything check the structure type first.
8ce3eca4 787 */
1da177e4
LT
788
789 if (hw_fib->header.StructType != FIB_MAGIC)
8ce3eca4 790 return -EINVAL;
1da177e4 791 /*
8ce3eca4 792 * This block completes a cdb which orginated on the host and we
1da177e4
LT
793 * just need to deallocate the cdb or reinit it. At this point the
794 * command is complete that we had sent to the adapter and this
795 * cdb could be reused.
796 */
cacb6dc3
PNRCEH
797 spin_lock_irqsave(&fibptr->event_lock, flags);
798 if (fibptr->done == 2) {
799 spin_unlock_irqrestore(&fibptr->event_lock, flags);
800 return 0;
801 }
802 spin_unlock_irqrestore(&fibptr->event_lock, flags);
803
1da177e4
LT
804 if((hw_fib->header.XferState & cpu_to_le32(SentFromHost)) &&
805 (hw_fib->header.XferState & cpu_to_le32(AdapterProcessed)))
806 {
807 fib_dealloc(fibptr);
808 }
809 else if(hw_fib->header.XferState & cpu_to_le32(SentFromHost))
810 {
811 /*
812 * This handles the case when the host has aborted the I/O
813 * to the adapter because the adapter is not responding
814 */
815 fib_dealloc(fibptr);
816 } else if(hw_fib->header.XferState & cpu_to_le32(HostOwned)) {
817 fib_dealloc(fibptr);
818 } else {
819 BUG();
8ce3eca4 820 }
1da177e4
LT
821 return 0;
822}
823
824/**
825 * aac_printf - handle printf from firmware
826 * @dev: Adapter
827 * @val: Message info
828 *
829 * Print a message passed to us by the controller firmware on the
830 * Adaptec board
831 */
832
833void aac_printf(struct aac_dev *dev, u32 val)
834{
1da177e4 835 char *cp = dev->printfbuf;
7c00ffa3
MH
836 if (dev->printf_enabled)
837 {
838 int length = val & 0xffff;
839 int level = (val >> 16) & 0xffff;
8ce3eca4 840
7c00ffa3
MH
841 /*
842 * The size of the printfbuf is set in port.c
843 * There is no variable or define for it
844 */
845 if (length > 255)
846 length = 255;
847 if (cp[length] != 0)
848 cp[length] = 0;
849 if (level == LOG_AAC_HIGH_ERROR)
1241f359 850 printk(KERN_WARNING "%s:%s", dev->name, cp);
7c00ffa3 851 else
1241f359 852 printk(KERN_INFO "%s:%s", dev->name, cp);
7c00ffa3 853 }
8ce3eca4 854 memset(cp, 0, 256);
1da177e4
LT
855}
856
131256cf
MH
857
858/**
859 * aac_handle_aif - Handle a message from the firmware
860 * @dev: Which adapter this fib is from
861 * @fibptr: Pointer to fibptr from adapter
862 *
863 * This routine handles a driver notify fib from the adapter and
864 * dispatches it to the appropriate routine for handling.
865 */
866
31876f32 867#define AIF_SNIFF_TIMEOUT (30*HZ)
131256cf
MH
868static void aac_handle_aif(struct aac_dev * dev, struct fib * fibptr)
869{
a8166a52 870 struct hw_fib * hw_fib = fibptr->hw_fib_va;
131256cf 871 struct aac_aifcmd * aifcmd = (struct aac_aifcmd *)hw_fib->data;
0995ad38 872 u32 channel, id, lun, container;
131256cf
MH
873 struct scsi_device *device;
874 enum {
875 NOTHING,
876 DELETE,
877 ADD,
878 CHANGE
0995ad38 879 } device_config_needed = NOTHING;
131256cf
MH
880
881 /* Sniff for container changes */
882
c8f7b073 883 if (!dev || !dev->fsa_dev)
131256cf 884 return;
0995ad38 885 container = channel = id = lun = (u32)-1;
131256cf
MH
886
887 /*
888 * We have set this up to try and minimize the number of
889 * re-configures that take place. As a result of this when
890 * certain AIF's come in we will set a flag waiting for another
891 * type of AIF before setting the re-config flag.
892 */
893 switch (le32_to_cpu(aifcmd->command)) {
894 case AifCmdDriverNotify:
f3307f72 895 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
131256cf
MH
896 /*
897 * Morph or Expand complete
898 */
899 case AifDenMorphComplete:
900 case AifDenVolumeExtendComplete:
f3307f72 901 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
902 if (container >= dev->maximum_num_containers)
903 break;
904
905 /*
f64a181d 906 * Find the scsi_device associated with the SCSI
131256cf
MH
907 * address. Make sure we have the right array, and if
908 * so set the flag to initiate a new re-config once we
909 * see an AifEnConfigChange AIF come through.
910 */
911
912 if ((dev != NULL) && (dev->scsi_host_ptr != NULL)) {
8ce3eca4
SM
913 device = scsi_device_lookup(dev->scsi_host_ptr,
914 CONTAINER_TO_CHANNEL(container),
915 CONTAINER_TO_ID(container),
131256cf
MH
916 CONTAINER_TO_LUN(container));
917 if (device) {
918 dev->fsa_dev[container].config_needed = CHANGE;
919 dev->fsa_dev[container].config_waiting_on = AifEnConfigChange;
31876f32 920 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
921 scsi_device_put(device);
922 }
923 }
924 }
925
926 /*
927 * If we are waiting on something and this happens to be
928 * that thing then set the re-configure flag.
929 */
930 if (container != (u32)-1) {
931 if (container >= dev->maximum_num_containers)
932 break;
31876f32 933 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 934 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 935 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
936 dev->fsa_dev[container].config_waiting_on = 0;
937 } else for (container = 0;
938 container < dev->maximum_num_containers; ++container) {
31876f32 939 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 940 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 941 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
942 dev->fsa_dev[container].config_waiting_on = 0;
943 }
944 break;
945
946 case AifCmdEventNotify:
f3307f72 947 switch (le32_to_cpu(((__le32 *)aifcmd->data)[0])) {
95e852e1
SM
948 case AifEnBatteryEvent:
949 dev->cache_protected =
950 (((__le32 *)aifcmd->data)[1] == cpu_to_le32(3));
951 break;
131256cf
MH
952 /*
953 * Add an Array.
954 */
955 case AifEnAddContainer:
f3307f72 956 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
957 if (container >= dev->maximum_num_containers)
958 break;
959 dev->fsa_dev[container].config_needed = ADD;
960 dev->fsa_dev[container].config_waiting_on =
961 AifEnConfigChange;
31876f32 962 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
963 break;
964
965 /*
966 * Delete an Array.
967 */
968 case AifEnDeleteContainer:
f3307f72 969 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
970 if (container >= dev->maximum_num_containers)
971 break;
972 dev->fsa_dev[container].config_needed = DELETE;
973 dev->fsa_dev[container].config_waiting_on =
974 AifEnConfigChange;
31876f32 975 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
976 break;
977
978 /*
979 * Container change detected. If we currently are not
980 * waiting on something else, setup to wait on a Config Change.
981 */
982 case AifEnContainerChange:
f3307f72 983 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
131256cf
MH
984 if (container >= dev->maximum_num_containers)
985 break;
31876f32
MH
986 if (dev->fsa_dev[container].config_waiting_on &&
987 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
988 break;
989 dev->fsa_dev[container].config_needed = CHANGE;
990 dev->fsa_dev[container].config_waiting_on =
991 AifEnConfigChange;
31876f32 992 dev->fsa_dev[container].config_waiting_stamp = jiffies;
131256cf
MH
993 break;
994
995 case AifEnConfigChange:
996 break;
997
cb1042f2
SM
998 case AifEnAddJBOD:
999 case AifEnDeleteJBOD:
1000 container = le32_to_cpu(((__le32 *)aifcmd->data)[1]);
a4576b5d
MS
1001 if ((container >> 28)) {
1002 container = (u32)-1;
cb1042f2 1003 break;
a4576b5d 1004 }
cb1042f2 1005 channel = (container >> 24) & 0xF;
a4576b5d
MS
1006 if (channel >= dev->maximum_num_channels) {
1007 container = (u32)-1;
cb1042f2 1008 break;
a4576b5d 1009 }
cb1042f2 1010 id = container & 0xFFFF;
a4576b5d
MS
1011 if (id >= dev->maximum_num_physicals) {
1012 container = (u32)-1;
cb1042f2 1013 break;
a4576b5d 1014 }
cb1042f2 1015 lun = (container >> 16) & 0xFF;
a4576b5d 1016 container = (u32)-1;
cb1042f2
SM
1017 channel = aac_phys_to_logical(channel);
1018 device_config_needed =
1019 (((__le32 *)aifcmd->data)[0] ==
1020 cpu_to_le32(AifEnAddJBOD)) ? ADD : DELETE;
5ca05594
RM
1021 if (device_config_needed == ADD) {
1022 device = scsi_device_lookup(dev->scsi_host_ptr,
1023 channel,
1024 id,
1025 lun);
1026 if (device) {
1027 scsi_remove_device(device);
1028 scsi_device_put(device);
1029 }
1030 }
cb1042f2
SM
1031 break;
1032
0995ad38 1033 case AifEnEnclosureManagement:
cb1042f2
SM
1034 /*
1035 * If in JBOD mode, automatic exposure of new
1036 * physical target to be suppressed until configured.
1037 */
1038 if (dev->jbod)
1039 break;
0995ad38
SM
1040 switch (le32_to_cpu(((__le32 *)aifcmd->data)[3])) {
1041 case EM_DRIVE_INSERTION:
1042 case EM_DRIVE_REMOVAL:
1043 container = le32_to_cpu(
1044 ((__le32 *)aifcmd->data)[2]);
a4576b5d
MS
1045 if ((container >> 28)) {
1046 container = (u32)-1;
0995ad38 1047 break;
a4576b5d 1048 }
0995ad38 1049 channel = (container >> 24) & 0xF;
a4576b5d
MS
1050 if (channel >= dev->maximum_num_channels) {
1051 container = (u32)-1;
0995ad38 1052 break;
a4576b5d 1053 }
0995ad38
SM
1054 id = container & 0xFFFF;
1055 lun = (container >> 16) & 0xFF;
a4576b5d 1056 container = (u32)-1;
0995ad38
SM
1057 if (id >= dev->maximum_num_physicals) {
1058 /* legacy dev_t ? */
1059 if ((0x2000 <= id) || lun || channel ||
1060 ((channel = (id >> 7) & 0x3F) >=
1061 dev->maximum_num_channels))
1062 break;
1063 lun = (id >> 4) & 7;
1064 id &= 0xF;
1065 }
1066 channel = aac_phys_to_logical(channel);
1067 device_config_needed =
1068 (((__le32 *)aifcmd->data)[3]
1069 == cpu_to_le32(EM_DRIVE_INSERTION)) ?
1070 ADD : DELETE;
1071 break;
1072 }
1073 break;
131256cf
MH
1074 }
1075
1076 /*
1077 * If we are waiting on something and this happens to be
1078 * that thing then set the re-configure flag.
1079 */
1080 if (container != (u32)-1) {
1081 if (container >= dev->maximum_num_containers)
1082 break;
31876f32 1083 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1084 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1085 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1086 dev->fsa_dev[container].config_waiting_on = 0;
1087 } else for (container = 0;
1088 container < dev->maximum_num_containers; ++container) {
31876f32 1089 if ((dev->fsa_dev[container].config_waiting_on ==
f3307f72 1090 le32_to_cpu(*(__le32 *)aifcmd->data)) &&
31876f32 1091 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT))
131256cf
MH
1092 dev->fsa_dev[container].config_waiting_on = 0;
1093 }
1094 break;
1095
1096 case AifCmdJobProgress:
1097 /*
1098 * These are job progress AIF's. When a Clear is being
1099 * done on a container it is initially created then hidden from
1100 * the OS. When the clear completes we don't get a config
1101 * change so we monitor the job status complete on a clear then
1102 * wait for a container change.
1103 */
1104
f3307f72
CH
1105 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1106 (((__le32 *)aifcmd->data)[6] == ((__le32 *)aifcmd->data)[5] ||
1107 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsSuccess))) {
131256cf
MH
1108 for (container = 0;
1109 container < dev->maximum_num_containers;
1110 ++container) {
1111 /*
1112 * Stomp on all config sequencing for all
1113 * containers?
1114 */
1115 dev->fsa_dev[container].config_waiting_on =
1116 AifEnContainerChange;
1117 dev->fsa_dev[container].config_needed = ADD;
31876f32
MH
1118 dev->fsa_dev[container].config_waiting_stamp =
1119 jiffies;
131256cf
MH
1120 }
1121 }
f3307f72
CH
1122 if (((__le32 *)aifcmd->data)[1] == cpu_to_le32(AifJobCtrZero) &&
1123 ((__le32 *)aifcmd->data)[6] == 0 &&
1124 ((__le32 *)aifcmd->data)[4] == cpu_to_le32(AifJobStsRunning)) {
131256cf
MH
1125 for (container = 0;
1126 container < dev->maximum_num_containers;
1127 ++container) {
1128 /*
1129 * Stomp on all config sequencing for all
1130 * containers?
1131 */
1132 dev->fsa_dev[container].config_waiting_on =
1133 AifEnContainerChange;
1134 dev->fsa_dev[container].config_needed = DELETE;
31876f32
MH
1135 dev->fsa_dev[container].config_waiting_stamp =
1136 jiffies;
131256cf
MH
1137 }
1138 }
1139 break;
1140 }
1141
a4576b5d
MS
1142 container = 0;
1143retry_next:
0995ad38 1144 if (device_config_needed == NOTHING)
a4576b5d 1145 for (; container < dev->maximum_num_containers; ++container) {
31876f32
MH
1146 if ((dev->fsa_dev[container].config_waiting_on == 0) &&
1147 (dev->fsa_dev[container].config_needed != NOTHING) &&
1148 time_before(jiffies, dev->fsa_dev[container].config_waiting_stamp + AIF_SNIFF_TIMEOUT)) {
131256cf
MH
1149 device_config_needed =
1150 dev->fsa_dev[container].config_needed;
1151 dev->fsa_dev[container].config_needed = NOTHING;
0995ad38
SM
1152 channel = CONTAINER_TO_CHANNEL(container);
1153 id = CONTAINER_TO_ID(container);
1154 lun = CONTAINER_TO_LUN(container);
131256cf
MH
1155 break;
1156 }
1157 }
1158 if (device_config_needed == NOTHING)
1159 return;
1160
1161 /*
1162 * If we decided that a re-configuration needs to be done,
1163 * schedule it here on the way out the door, please close the door
1164 * behind you.
1165 */
1166
131256cf 1167 /*
f64a181d 1168 * Find the scsi_device associated with the SCSI address,
131256cf
MH
1169 * and mark it as changed, invalidating the cache. This deals
1170 * with changes to existing device IDs.
1171 */
1172
1173 if (!dev || !dev->scsi_host_ptr)
1174 return;
1175 /*
bfb35aa8 1176 * force reload of disk info via aac_probe_container
131256cf 1177 */
0995ad38
SM
1178 if ((channel == CONTAINER_CHANNEL) &&
1179 (device_config_needed != NOTHING)) {
1180 if (dev->fsa_dev[container].valid == 1)
1181 dev->fsa_dev[container].valid = 2;
bfb35aa8 1182 aac_probe_container(dev, container);
0995ad38
SM
1183 }
1184 device = scsi_device_lookup(dev->scsi_host_ptr, channel, id, lun);
131256cf
MH
1185 if (device) {
1186 switch (device_config_needed) {
1187 case DELETE:
9cccde93
RM
1188#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1189 scsi_remove_device(device);
1190#else
0995ad38
SM
1191 if (scsi_device_online(device)) {
1192 scsi_device_set_state(device, SDEV_OFFLINE);
1193 sdev_printk(KERN_INFO, device,
1194 "Device offlined - %s\n",
1195 (channel == CONTAINER_CHANNEL) ?
1196 "array deleted" :
1197 "enclosure services event");
1198 }
9cccde93 1199#endif
0995ad38
SM
1200 break;
1201 case ADD:
1202 if (!scsi_device_online(device)) {
1203 sdev_printk(KERN_INFO, device,
1204 "Device online - %s\n",
1205 (channel == CONTAINER_CHANNEL) ?
1206 "array created" :
1207 "enclosure services event");
1208 scsi_device_set_state(device, SDEV_RUNNING);
1209 }
1210 /* FALLTHRU */
131256cf 1211 case CHANGE:
0995ad38
SM
1212 if ((channel == CONTAINER_CHANNEL)
1213 && (!dev->fsa_dev[container].valid)) {
9cccde93
RM
1214#if (defined(AAC_DEBUG_INSTRUMENT_AIF_DELETE))
1215 scsi_remove_device(device);
1216#else
0995ad38
SM
1217 if (!scsi_device_online(device))
1218 break;
1219 scsi_device_set_state(device, SDEV_OFFLINE);
1220 sdev_printk(KERN_INFO, device,
1221 "Device offlined - %s\n",
1222 "array failed");
9cccde93 1223#endif
0995ad38
SM
1224 break;
1225 }
131256cf
MH
1226 scsi_rescan_device(&device->sdev_gendev);
1227
1228 default:
1229 break;
1230 }
1231 scsi_device_put(device);
0995ad38 1232 device_config_needed = NOTHING;
131256cf 1233 }
0995ad38
SM
1234 if (device_config_needed == ADD)
1235 scsi_add_device(dev->scsi_host_ptr, channel, id, lun);
a4576b5d
MS
1236 if (channel == CONTAINER_CHANNEL) {
1237 container++;
1238 device_config_needed = NOTHING;
1239 goto retry_next;
1240 }
131256cf
MH
1241}
1242
29c97684 1243static int _aac_reset_adapter(struct aac_dev *aac, int forced)
8c867b25
MH
1244{
1245 int index, quirks;
8c867b25
MH
1246 int retval;
1247 struct Scsi_Host *host;
1248 struct scsi_device *dev;
1249 struct scsi_cmnd *command;
1250 struct scsi_cmnd *command_list;
29c97684 1251 int jafo = 0;
8c867b25
MH
1252
1253 /*
1254 * Assumptions:
29c97684
SM
1255 * - host is locked, unless called by the aacraid thread.
1256 * (a matter of convenience, due to legacy issues surrounding
1257 * eh_host_adapter_reset).
8c867b25
MH
1258 * - in_reset is asserted, so no new i/o is getting to the
1259 * card.
29c97684
SM
1260 * - The card is dead, or will be very shortly ;-/ so no new
1261 * commands are completing in the interrupt service.
8c867b25
MH
1262 */
1263 host = aac->scsi_host_ptr;
1264 scsi_block_requests(host);
1265 aac_adapter_disable_int(aac);
29c97684
SM
1266 if (aac->thread->pid != current->pid) {
1267 spin_unlock_irq(host->host_lock);
1268 kthread_stop(aac->thread);
1269 jafo = 1;
1270 }
8c867b25
MH
1271
1272 /*
1273 * If a positive health, means in a known DEAD PANIC
1274 * state and the adapter could be reset to `try again'.
1275 */
29c97684 1276 retval = aac_adapter_restart(aac, forced ? 0 : aac_adapter_check_health(aac));
8c867b25
MH
1277
1278 if (retval)
1279 goto out;
8c867b25 1280
d18b448f
MH
1281 /*
1282 * Loop through the fibs, close the synchronous FIBS
1283 */
33bb3b29 1284 for (retval = 1, index = 0; index < (aac->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); index++) {
d18b448f 1285 struct fib *fib = &aac->fibs[index];
a8166a52
MH
1286 if (!(fib->hw_fib_va->header.XferState & cpu_to_le32(NoResponseExpected | Async)) &&
1287 (fib->hw_fib_va->header.XferState & cpu_to_le32(ResponseExpected))) {
d18b448f
MH
1288 unsigned long flagv;
1289 spin_lock_irqsave(&fib->event_lock, flagv);
1290 up(&fib->event_wait);
1291 spin_unlock_irqrestore(&fib->event_lock, flagv);
1292 schedule();
33bb3b29 1293 retval = 0;
d18b448f
MH
1294 }
1295 }
33bb3b29
MH
1296 /* Give some extra time for ioctls to complete. */
1297 if (retval == 0)
1298 ssleep(2);
8c867b25
MH
1299 index = aac->cardtype;
1300
1301 /*
1302 * Re-initialize the adapter, first free resources, then carefully
1303 * apply the initialization sequence to come back again. Only risk
1304 * is a change in Firmware dropping cache, it is assumed the caller
1305 * will ensure that i/o is queisced and the card is flushed in that
1306 * case.
1307 */
1308 aac_fib_map_free(aac);
8c867b25
MH
1309 pci_free_consistent(aac->pdev, aac->comm_size, aac->comm_addr, aac->comm_phys);
1310 aac->comm_addr = NULL;
1311 aac->comm_phys = 0;
1312 kfree(aac->queues);
1313 aac->queues = NULL;
1314 free_irq(aac->pdev->irq, aac);
d0efab26
VA
1315 if (aac->msi)
1316 pci_disable_msi(aac->pdev);
8c867b25
MH
1317 kfree(aac->fsa_dev);
1318 aac->fsa_dev = NULL;
94cf6ba1
SM
1319 quirks = aac_get_driver_ident(index)->quirks;
1320 if (quirks & AAC_QUIRK_31BIT) {
929a22a5
YH
1321 if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(31)))) ||
1322 ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(31)))))
8c867b25
MH
1323 goto out;
1324 } else {
284901a9
YH
1325 if (((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32)))) ||
1326 ((retval = pci_set_consistent_dma_mask(aac->pdev, DMA_BIT_MASK(32)))))
8c867b25
MH
1327 goto out;
1328 }
1329 if ((retval = (*(aac_get_driver_ident(index)->init))(aac)))
1330 goto out;
94cf6ba1 1331 if (quirks & AAC_QUIRK_31BIT)
284901a9 1332 if ((retval = pci_set_dma_mask(aac->pdev, DMA_BIT_MASK(32))))
8c867b25 1333 goto out;
29c97684
SM
1334 if (jafo) {
1335 aac->thread = kthread_run(aac_command_thread, aac, aac->name);
1336 if (IS_ERR(aac->thread)) {
1337 retval = PTR_ERR(aac->thread);
1338 goto out;
1339 }
8c867b25
MH
1340 }
1341 (void)aac_get_adapter_info(aac);
8c867b25 1342 if ((quirks & AAC_QUIRK_34SG) && (host->sg_tablesize > 34)) {
8ce3eca4
SM
1343 host->sg_tablesize = 34;
1344 host->max_sectors = (host->sg_tablesize * 8) + 112;
1345 }
1346 if ((quirks & AAC_QUIRK_17SG) && (host->sg_tablesize > 17)) {
1347 host->sg_tablesize = 17;
1348 host->max_sectors = (host->sg_tablesize * 8) + 112;
1349 }
8c867b25
MH
1350 aac_get_config_status(aac, 1);
1351 aac_get_containers(aac);
1352 /*
1353 * This is where the assumption that the Adapter is quiesced
1354 * is important.
1355 */
1356 command_list = NULL;
1357 __shost_for_each_device(dev, host) {
1358 unsigned long flags;
1359 spin_lock_irqsave(&dev->list_lock, flags);
1360 list_for_each_entry(command, &dev->cmd_list, list)
1361 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1362 command->SCp.buffer = (struct scatterlist *)command_list;
1363 command_list = command;
1364 }
1365 spin_unlock_irqrestore(&dev->list_lock, flags);
1366 }
1367 while ((command = command_list)) {
1368 command_list = (struct scsi_cmnd *)command->SCp.buffer;
1369 command->SCp.buffer = NULL;
1370 command->result = DID_OK << 16
1371 | COMMAND_COMPLETE << 8
1372 | SAM_STAT_TASK_SET_FULL;
1373 command->SCp.phase = AAC_OWNER_ERROR_HANDLER;
1374 command->scsi_done(command);
1375 }
1376 retval = 0;
1377
1378out:
1379 aac->in_reset = 0;
1380 scsi_unblock_requests(host);
29c97684
SM
1381 if (jafo) {
1382 spin_lock_irq(host->host_lock);
1383 }
1384 return retval;
1385}
1386
1387int aac_reset_adapter(struct aac_dev * aac, int forced)
1388{
1389 unsigned long flagv = 0;
1390 int retval;
1391 struct Scsi_Host * host;
1392
1393 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1394 return -EBUSY;
1395
1396 if (aac->in_reset) {
1397 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1398 return -EBUSY;
1399 }
1400 aac->in_reset = 1;
1401 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1402
1403 /*
1404 * Wait for all commands to complete to this specific
1405 * target (block maximum 60 seconds). Although not necessary,
1406 * it does make us a good storage citizen.
1407 */
1408 host = aac->scsi_host_ptr;
1409 scsi_block_requests(host);
1410 if (forced < 2) for (retval = 60; retval; --retval) {
1411 struct scsi_device * dev;
1412 struct scsi_cmnd * command;
1413 int active = 0;
1414
1415 __shost_for_each_device(dev, host) {
1416 spin_lock_irqsave(&dev->list_lock, flagv);
1417 list_for_each_entry(command, &dev->cmd_list, list) {
1418 if (command->SCp.phase == AAC_OWNER_FIRMWARE) {
1419 active++;
1420 break;
1421 }
1422 }
1423 spin_unlock_irqrestore(&dev->list_lock, flagv);
1424 if (active)
1425 break;
1426
1427 }
1428 /*
1429 * We can exit If all the commands are complete
1430 */
1431 if (active == 0)
1432 break;
1433 ssleep(1);
1434 }
1435
1436 /* Quiesce build, flush cache, write through mode */
f858317d
SM
1437 if (forced < 2)
1438 aac_send_shutdown(aac);
29c97684 1439 spin_lock_irqsave(host->host_lock, flagv);
f858317d 1440 retval = _aac_reset_adapter(aac, forced ? forced : ((aac_check_reset != 0) && (aac_check_reset != 1)));
29c97684
SM
1441 spin_unlock_irqrestore(host->host_lock, flagv);
1442
f858317d 1443 if ((forced < 2) && (retval == -ENODEV)) {
29c97684
SM
1444 /* Unwind aac_send_shutdown() IOP_RESET unsupported/disabled */
1445 struct fib * fibctx = aac_fib_alloc(aac);
1446 if (fibctx) {
1447 struct aac_pause *cmd;
1448 int status;
1449
1450 aac_fib_init(fibctx);
1451
1452 cmd = (struct aac_pause *) fib_data(fibctx);
1453
1454 cmd->command = cpu_to_le32(VM_ContainerConfig);
1455 cmd->type = cpu_to_le32(CT_PAUSE_IO);
1456 cmd->timeout = cpu_to_le32(1);
1457 cmd->min = cpu_to_le32(1);
1458 cmd->noRescan = cpu_to_le32(1);
1459 cmd->count = cpu_to_le32(0);
1460
1461 status = aac_fib_send(ContainerCommand,
1462 fibctx,
1463 sizeof(struct aac_pause),
1464 FsaNormal,
1465 -2 /* Timeout silently */, 1,
1466 NULL, NULL);
1467
1468 if (status >= 0)
1469 aac_fib_complete(fibctx);
cacb6dc3
PNRCEH
1470 /* FIB should be freed only after getting
1471 * the response from the F/W */
1472 if (status != -ERESTARTSYS)
1473 aac_fib_free(fibctx);
29c97684
SM
1474 }
1475 }
1476
8c867b25
MH
1477 return retval;
1478}
1479
1480int aac_check_health(struct aac_dev * aac)
1481{
1482 int BlinkLED;
1483 unsigned long time_now, flagv = 0;
1484 struct list_head * entry;
1485 struct Scsi_Host * host;
1486
1487 /* Extending the scope of fib_lock slightly to protect aac->in_reset */
1488 if (spin_trylock_irqsave(&aac->fib_lock, flagv) == 0)
1489 return 0;
1490
1491 if (aac->in_reset || !(BlinkLED = aac_adapter_check_health(aac))) {
1492 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1493 return 0; /* OK */
1494 }
1495
1496 aac->in_reset = 1;
1497
1498 /* Fake up an AIF:
1499 * aac_aifcmd.command = AifCmdEventNotify = 1
1500 * aac_aifcmd.seqnum = 0xFFFFFFFF
1501 * aac_aifcmd.data[0] = AifEnExpEvent = 23
1502 * aac_aifcmd.data[1] = AifExeFirmwarePanic = 3
1503 * aac.aifcmd.data[2] = AifHighPriority = 3
1504 * aac.aifcmd.data[3] = BlinkLED
1505 */
1506
1507 time_now = jiffies/HZ;
1508 entry = aac->fib_list.next;
1509
1510 /*
1511 * For each Context that is on the
1512 * fibctxList, make a copy of the
1513 * fib, and then set the event to wake up the
1514 * thread that is waiting for it.
1515 */
1516 while (entry != &aac->fib_list) {
1517 /*
1518 * Extract the fibctx
1519 */
1520 struct aac_fib_context *fibctx = list_entry(entry, struct aac_fib_context, next);
1521 struct hw_fib * hw_fib;
1522 struct fib * fib;
1523 /*
1524 * Check if the queue is getting
1525 * backlogged
1526 */
1527 if (fibctx->count > 20) {
1528 /*
1529 * It's *not* jiffies folks,
1530 * but jiffies / HZ, so do not
1531 * panic ...
1532 */
1533 u32 time_last = fibctx->jiffies;
1534 /*
1535 * Has it been > 2 minutes
1536 * since the last read off
1537 * the queue?
1538 */
1539 if ((time_now - time_last) > aif_timeout) {
1540 entry = entry->next;
1541 aac_close_fib_context(aac, fibctx);
1542 continue;
1543 }
1544 }
1545 /*
1546 * Warning: no sleep allowed while
1547 * holding spinlock
1548 */
4dbc22d7
SM
1549 hw_fib = kzalloc(sizeof(struct hw_fib), GFP_ATOMIC);
1550 fib = kzalloc(sizeof(struct fib), GFP_ATOMIC);
8c867b25
MH
1551 if (fib && hw_fib) {
1552 struct aac_aifcmd * aif;
1553
a8166a52 1554 fib->hw_fib_va = hw_fib;
8c867b25
MH
1555 fib->dev = aac;
1556 aac_fib_init(fib);
1557 fib->type = FSAFS_NTC_FIB_CONTEXT;
1558 fib->size = sizeof (struct fib);
1559 fib->data = hw_fib->data;
1560 aif = (struct aac_aifcmd *)hw_fib->data;
1561 aif->command = cpu_to_le32(AifCmdEventNotify);
a3940da5
SM
1562 aif->seqnum = cpu_to_le32(0xFFFFFFFF);
1563 ((__le32 *)aif->data)[0] = cpu_to_le32(AifEnExpEvent);
1564 ((__le32 *)aif->data)[1] = cpu_to_le32(AifExeFirmwarePanic);
1565 ((__le32 *)aif->data)[2] = cpu_to_le32(AifHighPriority);
1566 ((__le32 *)aif->data)[3] = cpu_to_le32(BlinkLED);
8c867b25
MH
1567
1568 /*
1569 * Put the FIB onto the
1570 * fibctx's fibs
1571 */
1572 list_add_tail(&fib->fiblink, &fibctx->fib_list);
1573 fibctx->count++;
1574 /*
1575 * Set the event to wake up the
1576 * thread that will waiting.
1577 */
1578 up(&fibctx->wait_sem);
1579 } else {
1580 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1581 kfree(fib);
1582 kfree(hw_fib);
1583 }
1584 entry = entry->next;
1585 }
1586
1587 spin_unlock_irqrestore(&aac->fib_lock, flagv);
1588
1589 if (BlinkLED < 0) {
1590 printk(KERN_ERR "%s: Host adapter dead %d\n", aac->name, BlinkLED);
1591 goto out;
1592 }
1593
1594 printk(KERN_ERR "%s: Host adapter BLINK LED 0x%x\n", aac->name, BlinkLED);
1595
2f7ecc55 1596 if (!aac_check_reset || ((aac_check_reset == 1) &&
a3940da5
SM
1597 (aac->supplement_adapter_info.SupportedOptions2 &
1598 AAC_OPTION_IGNORE_RESET)))
29c97684 1599 goto out;
8c867b25 1600 host = aac->scsi_host_ptr;
29c97684
SM
1601 if (aac->thread->pid != current->pid)
1602 spin_lock_irqsave(host->host_lock, flagv);
f858317d 1603 BlinkLED = _aac_reset_adapter(aac, aac_check_reset != 1);
29c97684
SM
1604 if (aac->thread->pid != current->pid)
1605 spin_unlock_irqrestore(host->host_lock, flagv);
8c867b25
MH
1606 return BlinkLED;
1607
1608out:
1609 aac->in_reset = 0;
1610 return BlinkLED;
1611}
1612
1613
1da177e4
LT
1614/**
1615 * aac_command_thread - command processing thread
1616 * @dev: Adapter to monitor
1617 *
1618 * Waits on the commandready event in it's queue. When the event gets set
1619 * it will pull FIBs off it's queue. It will continue to pull FIBs off
1620 * until the queue is empty. When the queue is empty it will wait for
1621 * more FIBs.
1622 */
8ce3eca4 1623
fe27381d 1624int aac_command_thread(void *data)
1da177e4 1625{
fe27381d 1626 struct aac_dev *dev = data;
1da177e4
LT
1627 struct hw_fib *hw_fib, *hw_newfib;
1628 struct fib *fib, *newfib;
1da177e4
LT
1629 struct aac_fib_context *fibctx;
1630 unsigned long flags;
1631 DECLARE_WAITQUEUE(wait, current);
29c97684
SM
1632 unsigned long next_jiffies = jiffies + HZ;
1633 unsigned long next_check_jiffies = next_jiffies;
1634 long difference = HZ;
1da177e4
LT
1635
1636 /*
1637 * We can only have one thread per adapter for AIF's.
1638 */
1639 if (dev->aif_thread)
1640 return -EINVAL;
fe27381d 1641
1da177e4
LT
1642 /*
1643 * Let the DPC know it has a place to send the AIF's to.
1644 */
1645 dev->aif_thread = 1;
2f130980 1646 add_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 1647 set_current_state(TASK_INTERRUPTIBLE);
2f130980 1648 dprintk ((KERN_INFO "aac_command_thread start\n"));
8ce3eca4 1649 while (1) {
2f130980
MH
1650 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
1651 while(!list_empty(&(dev->queues->queue[HostNormCmdQueue].cmdq))) {
1da177e4
LT
1652 struct list_head *entry;
1653 struct aac_aifcmd * aifcmd;
1654
1655 set_current_state(TASK_RUNNING);
8ce3eca4 1656
2f130980 1657 entry = dev->queues->queue[HostNormCmdQueue].cmdq.next;
1da177e4 1658 list_del(entry);
8ce3eca4 1659
2f130980 1660 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
1da177e4
LT
1661 fib = list_entry(entry, struct fib, fiblink);
1662 /*
8ce3eca4
SM
1663 * We will process the FIB here or pass it to a
1664 * worker thread that is TBD. We Really can't
1da177e4
LT
1665 * do anything at this point since we don't have
1666 * anything defined for this thread to do.
1667 */
a8166a52 1668 hw_fib = fib->hw_fib_va;
1da177e4
LT
1669 memset(fib, 0, sizeof(struct fib));
1670 fib->type = FSAFS_NTC_FIB_CONTEXT;
8ce3eca4 1671 fib->size = sizeof(struct fib);
a8166a52 1672 fib->hw_fib_va = hw_fib;
1da177e4
LT
1673 fib->data = hw_fib->data;
1674 fib->dev = dev;
1675 /*
1676 * We only handle AifRequest fibs from the adapter.
1677 */
1678 aifcmd = (struct aac_aifcmd *) hw_fib->data;
1679 if (aifcmd->command == cpu_to_le32(AifCmdDriverNotify)) {
1680 /* Handle Driver Notify Events */
131256cf 1681 aac_handle_aif(dev, fib);
56b58712 1682 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
bfb35aa8 1683 aac_fib_adapter_complete(fib, (u16)sizeof(u32));
1da177e4 1684 } else {
1da177e4
LT
1685 /* The u32 here is important and intended. We are using
1686 32bit wrapping time to fit the adapter field */
8ce3eca4 1687
1da177e4
LT
1688 u32 time_now, time_last;
1689 unsigned long flagv;
2f130980
MH
1690 unsigned num;
1691 struct hw_fib ** hw_fib_pool, ** hw_fib_p;
1692 struct fib ** fib_pool, ** fib_p;
8ce3eca4 1693
131256cf 1694 /* Sniff events */
8ce3eca4 1695 if ((aifcmd->command ==
131256cf 1696 cpu_to_le32(AifCmdEventNotify)) ||
8ce3eca4 1697 (aifcmd->command ==
131256cf
MH
1698 cpu_to_le32(AifCmdJobProgress))) {
1699 aac_handle_aif(dev, fib);
1700 }
29c97684 1701
1da177e4
LT
1702 time_now = jiffies/HZ;
1703
2f130980
MH
1704 /*
1705 * Warning: no sleep allowed while
1706 * holding spinlock. We take the estimate
1707 * and pre-allocate a set of fibs outside the
1708 * lock.
1709 */
1710 num = le32_to_cpu(dev->init->AdapterFibsSize)
1711 / sizeof(struct hw_fib); /* some extra */
1712 spin_lock_irqsave(&dev->fib_lock, flagv);
1713 entry = dev->fib_list.next;
1714 while (entry != &dev->fib_list) {
1715 entry = entry->next;
1716 ++num;
1717 }
1718 spin_unlock_irqrestore(&dev->fib_lock, flagv);
1719 hw_fib_pool = NULL;
1720 fib_pool = NULL;
1721 if (num
1722 && ((hw_fib_pool = kmalloc(sizeof(struct hw_fib *) * num, GFP_KERNEL)))
1723 && ((fib_pool = kmalloc(sizeof(struct fib *) * num, GFP_KERNEL)))) {
1724 hw_fib_p = hw_fib_pool;
1725 fib_p = fib_pool;
1726 while (hw_fib_p < &hw_fib_pool[num]) {
1727 if (!(*(hw_fib_p++) = kmalloc(sizeof(struct hw_fib), GFP_KERNEL))) {
1728 --hw_fib_p;
1729 break;
1730 }
1731 if (!(*(fib_p++) = kmalloc(sizeof(struct fib), GFP_KERNEL))) {
1732 kfree(*(--hw_fib_p));
1733 break;
1734 }
1735 }
1736 if ((num = hw_fib_p - hw_fib_pool) == 0) {
1737 kfree(fib_pool);
1738 fib_pool = NULL;
1739 kfree(hw_fib_pool);
1740 hw_fib_pool = NULL;
1741 }
c9475cb0 1742 } else {
2f130980
MH
1743 kfree(hw_fib_pool);
1744 hw_fib_pool = NULL;
1745 }
1da177e4
LT
1746 spin_lock_irqsave(&dev->fib_lock, flagv);
1747 entry = dev->fib_list.next;
1748 /*
8ce3eca4 1749 * For each Context that is on the
1da177e4
LT
1750 * fibctxList, make a copy of the
1751 * fib, and then set the event to wake up the
1752 * thread that is waiting for it.
1753 */
2f130980
MH
1754 hw_fib_p = hw_fib_pool;
1755 fib_p = fib_pool;
1da177e4
LT
1756 while (entry != &dev->fib_list) {
1757 /*
1758 * Extract the fibctx
1759 */
1760 fibctx = list_entry(entry, struct aac_fib_context, next);
1761 /*
1762 * Check if the queue is getting
1763 * backlogged
1764 */
1765 if (fibctx->count > 20)
1766 {
1767 /*
1768 * It's *not* jiffies folks,
1769 * but jiffies / HZ so do not
1770 * panic ...
1771 */
1772 time_last = fibctx->jiffies;
1773 /*
8ce3eca4 1774 * Has it been > 2 minutes
1da177e4
LT
1775 * since the last read off
1776 * the queue?
1777 */
404d9a90 1778 if ((time_now - time_last) > aif_timeout) {
1da177e4
LT
1779 entry = entry->next;
1780 aac_close_fib_context(dev, fibctx);
1781 continue;
1782 }
1783 }
1784 /*
1785 * Warning: no sleep allowed while
1786 * holding spinlock
1787 */
2f130980
MH
1788 if (hw_fib_p < &hw_fib_pool[num]) {
1789 hw_newfib = *hw_fib_p;
1790 *(hw_fib_p++) = NULL;
1791 newfib = *fib_p;
1792 *(fib_p++) = NULL;
1da177e4
LT
1793 /*
1794 * Make the copy of the FIB
1795 */
1796 memcpy(hw_newfib, hw_fib, sizeof(struct hw_fib));
1797 memcpy(newfib, fib, sizeof(struct fib));
a8166a52 1798 newfib->hw_fib_va = hw_newfib;
1da177e4
LT
1799 /*
1800 * Put the FIB onto the
1801 * fibctx's fibs
1802 */
1803 list_add_tail(&newfib->fiblink, &fibctx->fib_list);
1804 fibctx->count++;
8ce3eca4 1805 /*
1da177e4 1806 * Set the event to wake up the
2f130980 1807 * thread that is waiting.
1da177e4
LT
1808 */
1809 up(&fibctx->wait_sem);
1810 } else {
1811 printk(KERN_WARNING "aifd: didn't allocate NewFib.\n");
1da177e4
LT
1812 }
1813 entry = entry->next;
1814 }
1815 /*
1816 * Set the status of this FIB
1817 */
56b58712 1818 *(__le32 *)hw_fib->data = cpu_to_le32(ST_OK);
bfb35aa8 1819 aac_fib_adapter_complete(fib, sizeof(u32));
1da177e4 1820 spin_unlock_irqrestore(&dev->fib_lock, flagv);
2f130980
MH
1821 /* Free up the remaining resources */
1822 hw_fib_p = hw_fib_pool;
1823 fib_p = fib_pool;
1824 while (hw_fib_p < &hw_fib_pool[num]) {
c9475cb0
JJ
1825 kfree(*hw_fib_p);
1826 kfree(*fib_p);
2f130980
MH
1827 ++fib_p;
1828 ++hw_fib_p;
1829 }
c9475cb0
JJ
1830 kfree(hw_fib_pool);
1831 kfree(fib_pool);
1da177e4 1832 }
1da177e4 1833 kfree(fib);
2f130980 1834 spin_lock_irqsave(dev->queues->queue[HostNormCmdQueue].lock, flags);
1da177e4
LT
1835 }
1836 /*
1837 * There are no more AIF's
1838 */
2f130980 1839 spin_unlock_irqrestore(dev->queues->queue[HostNormCmdQueue].lock, flags);
29c97684
SM
1840
1841 /*
1842 * Background activity
1843 */
1844 if ((time_before(next_check_jiffies,next_jiffies))
1845 && ((difference = next_check_jiffies - jiffies) <= 0)) {
1846 next_check_jiffies = next_jiffies;
1847 if (aac_check_health(dev) == 0) {
1848 difference = ((long)(unsigned)check_interval)
1849 * HZ;
1850 next_check_jiffies = jiffies + difference;
1851 } else if (!dev->queues)
1852 break;
1853 }
1854 if (!time_before(next_check_jiffies,next_jiffies)
1855 && ((difference = next_jiffies - jiffies) <= 0)) {
1856 struct timeval now;
1857 int ret;
1858
1859 /* Don't even try to talk to adapter if its sick */
1860 ret = aac_check_health(dev);
1861 if (!ret && !dev->queues)
1862 break;
1863 next_check_jiffies = jiffies
1864 + ((long)(unsigned)check_interval)
1865 * HZ;
1866 do_gettimeofday(&now);
1867
1868 /* Synchronize our watches */
1869 if (((1000000 - (1000000 / HZ)) > now.tv_usec)
1870 && (now.tv_usec > (1000000 / HZ)))
1871 difference = (((1000000 - now.tv_usec) * HZ)
1872 + 500000) / 1000000;
1873 else if (ret == 0) {
1874 struct fib *fibptr;
1875
1876 if ((fibptr = aac_fib_alloc(dev))) {
cacb6dc3 1877 int status;
f3307f72 1878 __le32 *info;
29c97684
SM
1879
1880 aac_fib_init(fibptr);
1881
f3307f72 1882 info = (__le32 *) fib_data(fibptr);
29c97684
SM
1883 if (now.tv_usec > 500000)
1884 ++now.tv_sec;
1885
1886 *info = cpu_to_le32(now.tv_sec);
1887
cacb6dc3 1888 status = aac_fib_send(SendHostTime,
29c97684
SM
1889 fibptr,
1890 sizeof(*info),
1891 FsaNormal,
1892 1, 1,
1893 NULL,
1894 NULL);
cacb6dc3
PNRCEH
1895 /* Do not set XferState to zero unless
1896 * receives a response from F/W */
1897 if (status >= 0)
1898 aac_fib_complete(fibptr);
1899 /* FIB should be freed only after
1900 * getting the response from the F/W */
1901 if (status != -ERESTARTSYS)
1902 aac_fib_free(fibptr);
29c97684
SM
1903 }
1904 difference = (long)(unsigned)update_interval*HZ;
1905 } else {
1906 /* retry shortly */
1907 difference = 10 * HZ;
1908 }
1909 next_jiffies = jiffies + difference;
1910 if (time_before(next_check_jiffies,next_jiffies))
1911 difference = next_check_jiffies - jiffies;
1912 }
1913 if (difference <= 0)
1914 difference = 1;
1915 set_current_state(TASK_INTERRUPTIBLE);
1916 schedule_timeout(difference);
1da177e4 1917
fe27381d 1918 if (kthread_should_stop())
1da177e4 1919 break;
1da177e4 1920 }
2f130980
MH
1921 if (dev->queues)
1922 remove_wait_queue(&dev->queues->queue[HostNormCmdQueue].cmdready, &wait);
1da177e4 1923 dev->aif_thread = 0;
2f130980 1924 return 0;
1da177e4 1925}